projects / mesa.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
vk/device: Do lazy surface state emission for binding tables
[mesa.git] / src / vulkan / device.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29
30 #include "private.h"
31
32 static int
33 anv_env_get_int(const char *name)
34 {
35 const char *val = getenv(name);
36
37 if (!val)
38 return 0;
39
40 return strtol(val, NULL, 0);
41 }
42
43 static VkResult
44 fill_physical_device(struct anv_physical_device *device,
45 struct anv_instance *instance,
46 const char *path)
47 {
48 int fd;
49
50 fd = open("/dev/dri/renderD128", O_RDWR | O_CLOEXEC);
51 if (fd < 0)
52 return vk_error(VK_ERROR_UNAVAILABLE);
53
54 device->instance = instance;
55 device->path = path;
56
57 device->chipset_id = anv_env_get_int("INTEL_DEVID_OVERRIDE");
58 device->no_hw = false;
59 if (device->chipset_id) {
60 /* INTEL_DEVID_OVERRIDE implies INTEL_NO_HW. */
61 device->no_hw = true;
62 } else {
63 device->chipset_id = anv_gem_get_param(fd, I915_PARAM_CHIPSET_ID);
64 }
65 if (!device->chipset_id)
66 goto fail;
67
68 device->name = brw_get_device_name(device->chipset_id);
69 device->info = brw_get_device_info(device->chipset_id, -1);
70 if (!device->info)
71 goto fail;
72
73 if (!anv_gem_get_param(fd, I915_PARAM_HAS_WAIT_TIMEOUT))
74 goto fail;
75
76 if (!anv_gem_get_param(fd, I915_PARAM_HAS_EXECBUF2))
77 goto fail;
78
79 if (!anv_gem_get_param(fd, I915_PARAM_HAS_LLC))
80 goto fail;
81
82 if (!anv_gem_get_param(fd, I915_PARAM_HAS_EXEC_CONSTANTS))
83 goto fail;
84
85 close(fd);
86
87 return VK_SUCCESS;
88
89 fail:
90 close(fd);
91
92 return vk_error(VK_ERROR_UNAVAILABLE);
93 }
94
95 static void *default_alloc(
96 void* pUserData,
97 size_t size,
98 size_t alignment,
99 VkSystemAllocType allocType)
100 {
101 return malloc(size);
102 }
103
104 static void default_free(
105 void* pUserData,
106 void* pMem)
107 {
108 free(pMem);
109 }
110
111 static const VkAllocCallbacks default_alloc_callbacks = {
112 .pUserData = NULL,
113 .pfnAlloc = default_alloc,
114 .pfnFree = default_free
115 };
116
117 VkResult anv_CreateInstance(
118 const VkInstanceCreateInfo* pCreateInfo,
119 VkInstance* pInstance)
120 {
121 struct anv_instance *instance;
122 const VkAllocCallbacks *alloc_callbacks = &default_alloc_callbacks;
123 void *user_data = NULL;
124 VkResult result;
125
126 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_INSTANCE_CREATE_INFO);
127
128 if (pCreateInfo->pAllocCb) {
129 alloc_callbacks = pCreateInfo->pAllocCb;
130 user_data = pCreateInfo->pAllocCb->pUserData;
131 }
132 instance = alloc_callbacks->pfnAlloc(user_data, sizeof(*instance), 8,
133 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
134 if (!instance)
135 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
136
137 instance->pAllocUserData = alloc_callbacks->pUserData;
138 instance->pfnAlloc = alloc_callbacks->pfnAlloc;
139 instance->pfnFree = alloc_callbacks->pfnFree;
140 instance->apiVersion = pCreateInfo->pAppInfo->apiVersion;
141
142 instance->physicalDeviceCount = 0;
143 result = fill_physical_device(&instance->physicalDevice,
144 instance, "/dev/dri/renderD128");
145
146 if (result != VK_SUCCESS)
147 return result;
148
149 instance->physicalDeviceCount++;
150 *pInstance = (VkInstance) instance;
151
152 return VK_SUCCESS;
153 }
154
155 VkResult anv_DestroyInstance(
156 VkInstance _instance)
157 {
158 struct anv_instance *instance = (struct anv_instance *) _instance;
159
160 instance->pfnFree(instance->pAllocUserData, instance);
161
162 return VK_SUCCESS;
163 }
164
165 VkResult anv_EnumeratePhysicalDevices(
166 VkInstance _instance,
167 uint32_t* pPhysicalDeviceCount,
168 VkPhysicalDevice* pPhysicalDevices)
169 {
170 struct anv_instance *instance = (struct anv_instance *) _instance;
171
172 if (*pPhysicalDeviceCount >= 1)
173 pPhysicalDevices[0] = (VkPhysicalDevice) &instance->physicalDevice;
174 *pPhysicalDeviceCount = instance->physicalDeviceCount;
175
176 return VK_SUCCESS;
177 }
178
179 VkResult anv_GetPhysicalDeviceInfo(
180 VkPhysicalDevice physicalDevice,
181 VkPhysicalDeviceInfoType infoType,
182 size_t* pDataSize,
183 void* pData)
184 {
185 struct anv_physical_device *device = (struct anv_physical_device *) physicalDevice;
186 VkPhysicalDeviceProperties *properties;
187 VkPhysicalDevicePerformance *performance;
188 VkPhysicalDeviceQueueProperties *queue_properties;
189 VkPhysicalDeviceMemoryProperties *memory_properties;
190 VkDisplayPropertiesWSI *display_properties;
191 uint64_t ns_per_tick = 80;
192
193 switch ((uint32_t) infoType) {
194 case VK_PHYSICAL_DEVICE_INFO_TYPE_PROPERTIES:
195 properties = pData;
196
197 *pDataSize = sizeof(*properties);
198 if (pData == NULL)
199 return VK_SUCCESS;
200
201 properties->apiVersion = 1;
202 properties->driverVersion = 1;
203 properties->vendorId = 0x8086;
204 properties->deviceId = device->chipset_id;
205 properties->deviceType = VK_PHYSICAL_DEVICE_TYPE_INTEGRATED_GPU;
206 strcpy(properties->deviceName, device->name);
207 properties->maxInlineMemoryUpdateSize = 0;
208 properties->maxBoundDescriptorSets = MAX_SETS;
209 properties->maxThreadGroupSize = 512;
210 properties->timestampFrequency = 1000 * 1000 * 1000 / ns_per_tick;
211 properties->multiColorAttachmentClears = true;
212 properties->maxDescriptorSets = 8;
213 properties->maxViewports = 16;
214 properties->maxColorAttachments = 8;
215 return VK_SUCCESS;
216
217 case VK_PHYSICAL_DEVICE_INFO_TYPE_PERFORMANCE:
218 performance = pData;
219
220 *pDataSize = sizeof(*performance);
221 if (pData == NULL)
222 return VK_SUCCESS;
223
224 performance->maxDeviceClock = 1.0;
225 performance->aluPerClock = 1.0;
226 performance->texPerClock = 1.0;
227 performance->primsPerClock = 1.0;
228 performance->pixelsPerClock = 1.0;
229 return VK_SUCCESS;
230
231 case VK_PHYSICAL_DEVICE_INFO_TYPE_QUEUE_PROPERTIES:
232 queue_properties = pData;
233
234 *pDataSize = sizeof(*queue_properties);
235 if (pData == NULL)
236 return VK_SUCCESS;
237
238 queue_properties->queueFlags = 0;
239 queue_properties->queueCount = 1;
240 queue_properties->maxAtomicCounters = 0;
241 queue_properties->supportsTimestamps = true;
242 queue_properties->maxMemReferences = 256;
243 return VK_SUCCESS;
244
245 case VK_PHYSICAL_DEVICE_INFO_TYPE_MEMORY_PROPERTIES:
246 memory_properties = pData;
247
248 *pDataSize = sizeof(*memory_properties);
249 if (pData == NULL)
250 return VK_SUCCESS;
251
252 memory_properties->supportsMigration = false;
253 memory_properties->supportsPinning = false;
254 return VK_SUCCESS;
255
256 case VK_PHYSICAL_DEVICE_INFO_TYPE_DISPLAY_PROPERTIES_WSI:
257 anv_finishme("VK_PHYSICAL_DEVICE_INFO_TYPE_DISPLAY_PROPERTIES_WSI");
258
259 *pDataSize = sizeof(*display_properties);
260 if (pData == NULL)
261 return VK_SUCCESS;
262
263 display_properties = pData;
264 display_properties->display = 0;
265 display_properties->physicalResolution = (VkExtent2D) { 0, 0 };
266 return VK_SUCCESS;
267
268 case VK_PHYSICAL_DEVICE_INFO_TYPE_QUEUE_PRESENT_PROPERTIES_WSI:
269 anv_finishme("VK_PHYSICAL_DEVICE_INFO_TYPE_QUEUE_PRESENT_PROPERTIES_WSI");
270 return VK_SUCCESS;
271
272
273 default:
274 return VK_UNSUPPORTED;
275 }
276
277 }
278
279 void * vkGetProcAddr(
280 VkPhysicalDevice physicalDevice,
281 const char* pName)
282 {
283 return anv_lookup_entrypoint(pName);
284 }
285
286 static void
287 parse_debug_flags(struct anv_device *device)
288 {
289 const char *debug, *p, *end;
290
291 debug = getenv("INTEL_DEBUG");
292 device->dump_aub = false;
293 if (debug) {
294 for (p = debug; *p; p = end + 1) {
295 end = strchrnul(p, ',');
296 if (end - p == 3 && memcmp(p, "aub", 3) == 0)
297 device->dump_aub = true;
298 if (end - p == 5 && memcmp(p, "no_hw", 5) == 0)
299 device->no_hw = true;
300 if (*end == '\0')
301 break;
302 }
303 }
304 }
305
306 static const uint32_t BATCH_SIZE = 8192;
307
308 VkResult anv_CreateDevice(
309 VkPhysicalDevice _physicalDevice,
310 const VkDeviceCreateInfo* pCreateInfo,
311 VkDevice* pDevice)
312 {
313 struct anv_physical_device *physicalDevice =
314 (struct anv_physical_device *) _physicalDevice;
315 struct anv_instance *instance = physicalDevice->instance;
316 struct anv_device *device;
317
318 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DEVICE_CREATE_INFO);
319
320 device = instance->pfnAlloc(instance->pAllocUserData,
321 sizeof(*device), 8,
322 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
323 if (!device)
324 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
325
326 device->no_hw = physicalDevice->no_hw;
327 parse_debug_flags(device);
328
329 device->instance = physicalDevice->instance;
330 device->fd = open("/dev/dri/renderD128", O_RDWR | O_CLOEXEC);
331 if (device->fd == -1)
332 goto fail_device;
333
334 device->context_id = anv_gem_create_context(device);
335 if (device->context_id == -1)
336 goto fail_fd;
337
338 anv_bo_pool_init(&device->batch_bo_pool, device, BATCH_SIZE);
339
340 anv_block_pool_init(&device->dynamic_state_block_pool, device, 2048);
341
342 anv_state_pool_init(&device->dynamic_state_pool,
343 &device->dynamic_state_block_pool);
344
345 anv_block_pool_init(&device->instruction_block_pool, device, 2048);
346 anv_block_pool_init(&device->surface_state_block_pool, device, 2048);
347
348
349 /* Binding table pointers are only 16 bits so we have to make sure that
350 * they get allocated at the beginning of the surface state BO. To
351 * handle this, we create a separate block pool that works out of the
352 * first 64 KB of the surface state BO.
353 */
354 anv_block_pool_init_slave(&device->binding_table_block_pool,
355 &device->surface_state_block_pool, 32);
356
357 anv_state_pool_init(&device->surface_state_pool,
358 &device->surface_state_block_pool);
359
360 device->compiler = anv_compiler_create(device->fd);
361 device->aub_writer = NULL;
362
363 device->info = *physicalDevice->info;
364
365 pthread_mutex_init(&device->mutex, NULL);
366
367 anv_device_init_meta(device);
368
369 *pDevice = (VkDevice) device;
370
371 return VK_SUCCESS;
372
373 fail_fd:
374 close(device->fd);
375 fail_device:
376 anv_device_free(device, device);
377
378 return vk_error(VK_ERROR_UNAVAILABLE);
379 }
380
381 VkResult anv_DestroyDevice(
382 VkDevice _device)
383 {
384 struct anv_device *device = (struct anv_device *) _device;
385
386 anv_compiler_destroy(device->compiler);
387
388
389 anv_bo_pool_finish(&device->batch_bo_pool);
390 anv_block_pool_finish(&device->dynamic_state_block_pool);
391 anv_block_pool_finish(&device->instruction_block_pool);
392 anv_block_pool_finish(&device->surface_state_block_pool);
393
394 close(device->fd);
395
396 if (device->aub_writer)
397 anv_aub_writer_destroy(device->aub_writer);
398
399 anv_device_free(device, device);
400
401 return VK_SUCCESS;
402 }
403
404 VkResult anv_GetGlobalExtensionInfo(
405 VkExtensionInfoType infoType,
406 uint32_t extensionIndex,
407 size_t* pDataSize,
408 void* pData)
409 {
410 static const VkExtensionProperties extensions[] = {
411 {
412 .extName = "VK_WSI_LunarG",
413 .version = 3
414 }
415 };
416 uint32_t count = ARRAY_SIZE(extensions);
417
418 switch (infoType) {
419 case VK_EXTENSION_INFO_TYPE_COUNT:
420 memcpy(pData, &count, sizeof(count));
421 *pDataSize = sizeof(count);
422 return VK_SUCCESS;
423
424 case VK_EXTENSION_INFO_TYPE_PROPERTIES:
425 if (extensionIndex >= count)
426 return vk_error(VK_ERROR_INVALID_EXTENSION);
427
428 memcpy(pData, &extensions[extensionIndex], sizeof(extensions[0]));
429 *pDataSize = sizeof(extensions[0]);
430 return VK_SUCCESS;
431
432 default:
433 return VK_UNSUPPORTED;
434 }
435 }
436
437 VkResult anv_GetPhysicalDeviceExtensionInfo(
438 VkPhysicalDevice physicalDevice,
439 VkExtensionInfoType infoType,
440 uint32_t extensionIndex,
441 size_t* pDataSize,
442 void* pData)
443 {
444 uint32_t *count;
445
446 switch (infoType) {
447 case VK_EXTENSION_INFO_TYPE_COUNT:
448 *pDataSize = 4;
449 if (pData == NULL)
450 return VK_SUCCESS;
451
452 count = pData;
453 *count = 0;
454 return VK_SUCCESS;
455
456 case VK_EXTENSION_INFO_TYPE_PROPERTIES:
457 return vk_error(VK_ERROR_INVALID_EXTENSION);
458
459 default:
460 return VK_UNSUPPORTED;
461 }
462 }
463
464 VkResult anv_EnumerateLayers(
465 VkPhysicalDevice physicalDevice,
466 size_t maxStringSize,
467 size_t* pLayerCount,
468 char* const* pOutLayers,
469 void* pReserved)
470 {
471 *pLayerCount = 0;
472
473 return VK_SUCCESS;
474 }
475
476 VkResult anv_GetDeviceQueue(
477 VkDevice _device,
478 uint32_t queueNodeIndex,
479 uint32_t queueIndex,
480 VkQueue* pQueue)
481 {
482 struct anv_device *device = (struct anv_device *) _device;
483 struct anv_queue *queue;
484
485 /* FIXME: Should allocate these at device create time. */
486
487 queue = anv_device_alloc(device, sizeof(*queue), 8,
488 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
489 if (queue == NULL)
490 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
491
492 queue->device = device;
493 queue->pool = &device->surface_state_pool;
494
495 queue->completed_serial = anv_state_pool_alloc(queue->pool, 4, 4);
496 *(uint32_t *)queue->completed_serial.map = 0;
497 queue->next_serial = 1;
498
499 *pQueue = (VkQueue) queue;
500
501 return VK_SUCCESS;
502 }
503
504 VkResult
505 anv_reloc_list_init(struct anv_reloc_list *list, struct anv_device *device)
506 {
507 list->num_relocs = 0;
508 list->array_length = 256;
509 list->relocs =
510 anv_device_alloc(device, list->array_length * sizeof(*list->relocs), 8,
511 VK_SYSTEM_ALLOC_TYPE_INTERNAL);
512
513 if (list->relocs == NULL)
514 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
515
516 list->reloc_bos =
517 anv_device_alloc(device, list->array_length * sizeof(*list->reloc_bos), 8,
518 VK_SYSTEM_ALLOC_TYPE_INTERNAL);
519
520 if (list->relocs == NULL) {
521 anv_device_free(device, list->relocs);
522 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
523 }
524
525 return VK_SUCCESS;
526 }
527
528 void
529 anv_reloc_list_finish(struct anv_reloc_list *list, struct anv_device *device)
530 {
531 anv_device_free(device, list->relocs);
532 anv_device_free(device, list->reloc_bos);
533 }
534
535 static VkResult
536 anv_reloc_list_grow(struct anv_reloc_list *list, struct anv_device *device,
537 size_t num_additional_relocs)
538 {
539 if (list->num_relocs + num_additional_relocs <= list->array_length)
540 return VK_SUCCESS;
541
542 size_t new_length = list->array_length * 2;
543 while (new_length < list->num_relocs + num_additional_relocs)
544 new_length *= 2;
545
546 struct drm_i915_gem_relocation_entry *new_relocs =
547 anv_device_alloc(device, new_length * sizeof(*list->relocs), 8,
548 VK_SYSTEM_ALLOC_TYPE_INTERNAL);
549 if (new_relocs == NULL)
550 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
551
552 struct anv_bo **new_reloc_bos =
553 anv_device_alloc(device, new_length * sizeof(*list->reloc_bos), 8,
554 VK_SYSTEM_ALLOC_TYPE_INTERNAL);
555 if (new_relocs == NULL) {
556 anv_device_free(device, new_relocs);
557 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
558 }
559
560 memcpy(new_relocs, list->relocs, list->num_relocs * sizeof(*list->relocs));
561 memcpy(new_reloc_bos, list->reloc_bos,
562 list->num_relocs * sizeof(*list->reloc_bos));
563
564 anv_device_free(device, list->relocs);
565 anv_device_free(device, list->reloc_bos);
566
567 list->relocs = new_relocs;
568 list->reloc_bos = new_reloc_bos;
569
570 return VK_SUCCESS;
571 }
572
573 static VkResult
574 anv_batch_bo_create(struct anv_device *device, struct anv_batch_bo **bbo_out)
575 {
576 VkResult result;
577
578 struct anv_batch_bo *bbo =
579 anv_device_alloc(device, sizeof(*bbo), 8, VK_SYSTEM_ALLOC_TYPE_INTERNAL);
580 if (bbo == NULL)
581 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
582
583 bbo->num_relocs = 0;
584 bbo->prev_batch_bo = NULL;
585
586 result = anv_bo_pool_alloc(&device->batch_bo_pool, &bbo->bo);
587 if (result != VK_SUCCESS) {
588 anv_device_free(device, bbo);
589 return result;
590 }
591
592 *bbo_out = bbo;
593
594 return VK_SUCCESS;
595 }
596
597 static void
598 anv_batch_bo_start(struct anv_batch_bo *bbo, struct anv_batch *batch,
599 size_t batch_padding)
600 {
601 batch->next = batch->start = bbo->bo.map;
602 batch->end = bbo->bo.map + bbo->bo.size - batch_padding;
603 bbo->first_reloc = batch->relocs.num_relocs;
604 }
605
606 static void
607 anv_batch_bo_finish(struct anv_batch_bo *bbo, struct anv_batch *batch)
608 {
609 assert(batch->start == bbo->bo.map);
610 bbo->length = batch->next - batch->start;
611 bbo->num_relocs = batch->relocs.num_relocs - bbo->first_reloc;
612 }
613
614 static void
615 anv_batch_bo_destroy(struct anv_batch_bo *bbo, struct anv_device *device)
616 {
617 anv_bo_pool_free(&device->batch_bo_pool, &bbo->bo);
618 anv_device_free(device, bbo);
619 }
620
621 void *
622 anv_batch_emit_dwords(struct anv_batch *batch, int num_dwords)
623 {
624 if (batch->next + num_dwords * 4 > batch->end)
625 batch->extend_cb(batch, batch->user_data);
626
627 void *p = batch->next;
628
629 batch->next += num_dwords * 4;
630 assert(batch->next <= batch->end);
631
632 return p;
633 }
634
635 static void
636 anv_reloc_list_append(struct anv_reloc_list *list, struct anv_device *device,
637 struct anv_reloc_list *other, uint32_t offset)
638 {
639 anv_reloc_list_grow(list, device, other->num_relocs);
640 /* TODO: Handle failure */
641
642 memcpy(&list->relocs[list->num_relocs], &other->relocs[0],
643 other->num_relocs * sizeof(other->relocs[0]));
644 memcpy(&list->reloc_bos[list->num_relocs], &other->reloc_bos[0],
645 other->num_relocs * sizeof(other->reloc_bos[0]));
646
647 for (uint32_t i = 0; i < other->num_relocs; i++)
648 list->relocs[i + list->num_relocs].offset += offset;
649
650 list->num_relocs += other->num_relocs;
651 }
652
653 static uint64_t
654 anv_reloc_list_add(struct anv_reloc_list *list, struct anv_device *device,
655 uint32_t offset, struct anv_bo *target_bo, uint32_t delta)
656 {
657 struct drm_i915_gem_relocation_entry *entry;
658 int index;
659
660 anv_reloc_list_grow(list, device, 1);
661 /* TODO: Handle failure */
662
663 /* XXX: Can we use I915_EXEC_HANDLE_LUT? */
664 index = list->num_relocs++;
665 list->reloc_bos[index] = target_bo;
666 entry = &list->relocs[index];
667 entry->target_handle = target_bo->gem_handle;
668 entry->delta = delta;
669 entry->offset = offset;
670 entry->presumed_offset = target_bo->offset;
671 entry->read_domains = 0;
672 entry->write_domain = 0;
673
674 return target_bo->offset + delta;
675 }
676
677 void
678 anv_batch_emit_batch(struct anv_batch *batch, struct anv_batch *other)
679 {
680 uint32_t size, offset;
681
682 size = other->next - other->start;
683 assert(size % 4 == 0);
684
685 if (batch->next + size > batch->end)
686 batch->extend_cb(batch, batch->user_data);
687
688 assert(batch->next + size <= batch->end);
689
690 memcpy(batch->next, other->start, size);
691
692 offset = batch->next - batch->start;
693 anv_reloc_list_append(&batch->relocs, batch->device,
694 &other->relocs, offset);
695
696 batch->next += size;
697 }
698
699 uint64_t
700 anv_batch_emit_reloc(struct anv_batch *batch,
701 void *location, struct anv_bo *bo, uint32_t delta)
702 {
703 return anv_reloc_list_add(&batch->relocs, batch->device,
704 location - batch->start, bo, delta);
705 }
706
707 VkResult anv_QueueSubmit(
708 VkQueue _queue,
709 uint32_t cmdBufferCount,
710 const VkCmdBuffer* pCmdBuffers,
711 VkFence _fence)
712 {
713 struct anv_queue *queue = (struct anv_queue *) _queue;
714 struct anv_device *device = queue->device;
715 struct anv_fence *fence = (struct anv_fence *) _fence;
716 int ret;
717
718 for (uint32_t i = 0; i < cmdBufferCount; i++) {
719 struct anv_cmd_buffer *cmd_buffer =
720 (struct anv_cmd_buffer *) pCmdBuffers[i];
721
722 if (device->dump_aub)
723 anv_cmd_buffer_dump(cmd_buffer);
724
725 if (!device->no_hw) {
726 ret = anv_gem_execbuffer(device, &cmd_buffer->execbuf);
727 if (ret != 0)
728 return vk_error(VK_ERROR_UNKNOWN);
729
730 if (fence) {
731 ret = anv_gem_execbuffer(device, &fence->execbuf);
732 if (ret != 0)
733 return vk_error(VK_ERROR_UNKNOWN);
734 }
735
736 for (uint32_t i = 0; i < cmd_buffer->bo_count; i++)
737 cmd_buffer->exec2_bos[i]->offset = cmd_buffer->exec2_objects[i].offset;
738 } else {
739 *(uint32_t *)queue->completed_serial.map = cmd_buffer->serial;
740 }
741 }
742
743 return VK_SUCCESS;
744 }
745
746 VkResult anv_QueueAddMemReferences(
747 VkQueue queue,
748 uint32_t count,
749 const VkDeviceMemory* pMems)
750 {
751 return VK_SUCCESS;
752 }
753
754 VkResult anv_QueueRemoveMemReferences(
755 VkQueue queue,
756 uint32_t count,
757 const VkDeviceMemory* pMems)
758 {
759 return VK_SUCCESS;
760 }
761
762 VkResult anv_QueueWaitIdle(
763 VkQueue _queue)
764 {
765 struct anv_queue *queue = (struct anv_queue *) _queue;
766
767 return vkDeviceWaitIdle((VkDevice) queue->device);
768 }
769
770 VkResult anv_DeviceWaitIdle(
771 VkDevice _device)
772 {
773 struct anv_device *device = (struct anv_device *) _device;
774 struct anv_state state;
775 struct anv_batch batch;
776 struct drm_i915_gem_execbuffer2 execbuf;
777 struct drm_i915_gem_exec_object2 exec2_objects[1];
778 struct anv_bo *bo = NULL;
779 VkResult result;
780 int64_t timeout;
781 int ret;
782
783 state = anv_state_pool_alloc(&device->dynamic_state_pool, 32, 32);
784 bo = &device->dynamic_state_pool.block_pool->bo;
785 batch.start = batch.next = state.map;
786 batch.end = state.map + 32;
787 anv_batch_emit(&batch, GEN8_MI_BATCH_BUFFER_END);
788 anv_batch_emit(&batch, GEN8_MI_NOOP);
789
790 exec2_objects[0].handle = bo->gem_handle;
791 exec2_objects[0].relocation_count = 0;
792 exec2_objects[0].relocs_ptr = 0;
793 exec2_objects[0].alignment = 0;
794 exec2_objects[0].offset = bo->offset;
795 exec2_objects[0].flags = 0;
796 exec2_objects[0].rsvd1 = 0;
797 exec2_objects[0].rsvd2 = 0;
798
799 execbuf.buffers_ptr = (uintptr_t) exec2_objects;
800 execbuf.buffer_count = 1;
801 execbuf.batch_start_offset = state.offset;
802 execbuf.batch_len = batch.next - state.map;
803 execbuf.cliprects_ptr = 0;
804 execbuf.num_cliprects = 0;
805 execbuf.DR1 = 0;
806 execbuf.DR4 = 0;
807
808 execbuf.flags =
809 I915_EXEC_HANDLE_LUT | I915_EXEC_NO_RELOC | I915_EXEC_RENDER;
810 execbuf.rsvd1 = device->context_id;
811 execbuf.rsvd2 = 0;
812
813 if (!device->no_hw) {
814 ret = anv_gem_execbuffer(device, &execbuf);
815 if (ret != 0) {
816 result = vk_error(VK_ERROR_UNKNOWN);
817 goto fail;
818 }
819
820 timeout = INT64_MAX;
821 ret = anv_gem_wait(device, bo->gem_handle, &timeout);
822 if (ret != 0) {
823 result = vk_error(VK_ERROR_UNKNOWN);
824 goto fail;
825 }
826 }
827
828 anv_state_pool_free(&device->dynamic_state_pool, state);
829
830 return VK_SUCCESS;
831
832 fail:
833 anv_state_pool_free(&device->dynamic_state_pool, state);
834
835 return result;
836 }
837
838 void *
839 anv_device_alloc(struct anv_device * device,
840 size_t size,
841 size_t alignment,
842 VkSystemAllocType allocType)
843 {
844 return device->instance->pfnAlloc(device->instance->pAllocUserData,
845 size,
846 alignment,
847 allocType);
848 }
849
850 void
851 anv_device_free(struct anv_device * device,
852 void * mem)
853 {
854 return device->instance->pfnFree(device->instance->pAllocUserData,
855 mem);
856 }
857
858 VkResult
859 anv_bo_init_new(struct anv_bo *bo, struct anv_device *device, uint64_t size)
860 {
861 bo->gem_handle = anv_gem_create(device, size);
862 if (!bo->gem_handle)
863 return vk_error(VK_ERROR_OUT_OF_DEVICE_MEMORY);
864
865 bo->map = NULL;
866 bo->index = 0;
867 bo->offset = 0;
868 bo->size = size;
869
870 return VK_SUCCESS;
871 }
872
873 VkResult anv_AllocMemory(
874 VkDevice _device,
875 const VkMemoryAllocInfo* pAllocInfo,
876 VkDeviceMemory* pMem)
877 {
878 struct anv_device *device = (struct anv_device *) _device;
879 struct anv_device_memory *mem;
880 VkResult result;
881
882 assert(pAllocInfo->sType == VK_STRUCTURE_TYPE_MEMORY_ALLOC_INFO);
883
884 mem = anv_device_alloc(device, sizeof(*mem), 8,
885 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
886 if (mem == NULL)
887 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
888
889 result = anv_bo_init_new(&mem->bo, device, pAllocInfo->allocationSize);
890 if (result != VK_SUCCESS)
891 goto fail;
892
893 *pMem = (VkDeviceMemory) mem;
894
895 return VK_SUCCESS;
896
897 fail:
898 anv_device_free(device, mem);
899
900 return result;
901 }
902
903 VkResult anv_FreeMemory(
904 VkDevice _device,
905 VkDeviceMemory _mem)
906 {
907 struct anv_device *device = (struct anv_device *) _device;
908 struct anv_device_memory *mem = (struct anv_device_memory *) _mem;
909
910 if (mem->bo.map)
911 anv_gem_munmap(mem->bo.map, mem->bo.size);
912
913 if (mem->bo.gem_handle != 0)
914 anv_gem_close(device, mem->bo.gem_handle);
915
916 anv_device_free(device, mem);
917
918 return VK_SUCCESS;
919 }
920
921 VkResult anv_SetMemoryPriority(
922 VkDevice device,
923 VkDeviceMemory mem,
924 VkMemoryPriority priority)
925 {
926 return VK_SUCCESS;
927 }
928
929 VkResult anv_MapMemory(
930 VkDevice _device,
931 VkDeviceMemory _mem,
932 VkDeviceSize offset,
933 VkDeviceSize size,
934 VkMemoryMapFlags flags,
935 void** ppData)
936 {
937 struct anv_device *device = (struct anv_device *) _device;
938 struct anv_device_memory *mem = (struct anv_device_memory *) _mem;
939
940 /* FIXME: Is this supposed to be thread safe? Since vkUnmapMemory() only
941 * takes a VkDeviceMemory pointer, it seems like only one map of the memory
942 * at a time is valid. We could just mmap up front and return an offset
943 * pointer here, but that may exhaust virtual memory on 32 bit
944 * userspace. */
945
946 mem->map = anv_gem_mmap(device, mem->bo.gem_handle, offset, size);
947 mem->map_size = size;
948
949 *ppData = mem->map;
950
951 return VK_SUCCESS;
952 }
953
954 VkResult anv_UnmapMemory(
955 VkDevice _device,
956 VkDeviceMemory _mem)
957 {
958 struct anv_device_memory *mem = (struct anv_device_memory *) _mem;
959
960 anv_gem_munmap(mem->map, mem->map_size);
961
962 return VK_SUCCESS;
963 }
964
965 VkResult anv_FlushMappedMemory(
966 VkDevice device,
967 VkDeviceMemory mem,
968 VkDeviceSize offset,
969 VkDeviceSize size)
970 {
971 /* clflush here for !llc platforms */
972
973 return VK_SUCCESS;
974 }
975
976 VkResult anv_PinSystemMemory(
977 VkDevice device,
978 const void* pSysMem,
979 size_t memSize,
980 VkDeviceMemory* pMem)
981 {
982 return VK_SUCCESS;
983 }
984
985 VkResult anv_GetMultiDeviceCompatibility(
986 VkPhysicalDevice physicalDevice0,
987 VkPhysicalDevice physicalDevice1,
988 VkPhysicalDeviceCompatibilityInfo* pInfo)
989 {
990 return VK_UNSUPPORTED;
991 }
992
993 VkResult anv_OpenSharedMemory(
994 VkDevice device,
995 const VkMemoryOpenInfo* pOpenInfo,
996 VkDeviceMemory* pMem)
997 {
998 return VK_UNSUPPORTED;
999 }
1000
1001 VkResult anv_OpenSharedSemaphore(
1002 VkDevice device,
1003 const VkSemaphoreOpenInfo* pOpenInfo,
1004 VkSemaphore* pSemaphore)
1005 {
1006 return VK_UNSUPPORTED;
1007 }
1008
1009 VkResult anv_OpenPeerMemory(
1010 VkDevice device,
1011 const VkPeerMemoryOpenInfo* pOpenInfo,
1012 VkDeviceMemory* pMem)
1013 {
1014 return VK_UNSUPPORTED;
1015 }
1016
1017 VkResult anv_OpenPeerImage(
1018 VkDevice device,
1019 const VkPeerImageOpenInfo* pOpenInfo,
1020 VkImage* pImage,
1021 VkDeviceMemory* pMem)
1022 {
1023 return VK_UNSUPPORTED;
1024 }
1025
1026 VkResult anv_DestroyObject(
1027 VkDevice _device,
1028 VkObjectType objType,
1029 VkObject _object)
1030 {
1031 struct anv_device *device = (struct anv_device *) _device;
1032 struct anv_object *object = (struct anv_object *) _object;
1033
1034 switch (objType) {
1035 case VK_OBJECT_TYPE_INSTANCE:
1036 return anv_DestroyInstance((VkInstance) _object);
1037
1038 case VK_OBJECT_TYPE_PHYSICAL_DEVICE:
1039 /* We don't want to actually destroy physical devices */
1040 return VK_SUCCESS;
1041
1042 case VK_OBJECT_TYPE_DEVICE:
1043 assert(_device == (VkDevice) _object);
1044 return anv_DestroyDevice((VkDevice) _object);
1045
1046 case VK_OBJECT_TYPE_QUEUE:
1047 /* TODO */
1048 return VK_SUCCESS;
1049
1050 case VK_OBJECT_TYPE_DEVICE_MEMORY:
1051 return anv_FreeMemory(_device, (VkDeviceMemory) _object);
1052
1053 case VK_OBJECT_TYPE_DESCRIPTOR_POOL:
1054 /* These are just dummys anyway, so we don't need to destroy them */
1055 return VK_SUCCESS;
1056
1057 case VK_OBJECT_TYPE_BUFFER:
1058 case VK_OBJECT_TYPE_BUFFER_VIEW:
1059 case VK_OBJECT_TYPE_IMAGE:
1060 case VK_OBJECT_TYPE_IMAGE_VIEW:
1061 case VK_OBJECT_TYPE_COLOR_ATTACHMENT_VIEW:
1062 case VK_OBJECT_TYPE_DEPTH_STENCIL_VIEW:
1063 case VK_OBJECT_TYPE_SHADER:
1064 case VK_OBJECT_TYPE_PIPELINE_LAYOUT:
1065 case VK_OBJECT_TYPE_SAMPLER:
1066 case VK_OBJECT_TYPE_DESCRIPTOR_SET:
1067 case VK_OBJECT_TYPE_DESCRIPTOR_SET_LAYOUT:
1068 case VK_OBJECT_TYPE_DYNAMIC_RS_STATE:
1069 case VK_OBJECT_TYPE_DYNAMIC_CB_STATE:
1070 case VK_OBJECT_TYPE_DYNAMIC_DS_STATE:
1071 case VK_OBJECT_TYPE_RENDER_PASS:
1072 /* These are trivially destroyable */
1073 anv_device_free(device, (void *) _object);
1074 return VK_SUCCESS;
1075
1076 case VK_OBJECT_TYPE_COMMAND_BUFFER:
1077 case VK_OBJECT_TYPE_PIPELINE:
1078 case VK_OBJECT_TYPE_DYNAMIC_VP_STATE:
1079 case VK_OBJECT_TYPE_FENCE:
1080 case VK_OBJECT_TYPE_QUERY_POOL:
1081 case VK_OBJECT_TYPE_FRAMEBUFFER:
1082 (object->destructor)(device, object, objType);
1083 return VK_SUCCESS;
1084
1085 case VK_OBJECT_TYPE_SEMAPHORE:
1086 case VK_OBJECT_TYPE_EVENT:
1087 stub_return(VK_UNSUPPORTED);
1088
1089 default:
1090 unreachable("Invalid object type");
1091 }
1092 }
1093
1094 static void
1095 fill_memory_requirements(
1096 VkObjectType objType,
1097 VkObject object,
1098 VkMemoryRequirements * memory_requirements)
1099 {
1100 struct anv_buffer *buffer;
1101 struct anv_image *image;
1102
1103 memory_requirements->memPropsAllowed =
1104 VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT |
1105 VK_MEMORY_PROPERTY_HOST_DEVICE_COHERENT_BIT |
1106 /* VK_MEMORY_PROPERTY_HOST_UNCACHED_BIT | */
1107 VK_MEMORY_PROPERTY_HOST_WRITE_COMBINED_BIT |
1108 VK_MEMORY_PROPERTY_PREFER_HOST_LOCAL |
1109 VK_MEMORY_PROPERTY_SHAREABLE_BIT;
1110
1111 memory_requirements->memPropsRequired = 0;
1112
1113 switch (objType) {
1114 case VK_OBJECT_TYPE_BUFFER:
1115 buffer = (struct anv_buffer *) object;
1116 memory_requirements->size = buffer->size;
1117 memory_requirements->alignment = 16;
1118 break;
1119 case VK_OBJECT_TYPE_IMAGE:
1120 image = (struct anv_image *) object;
1121 memory_requirements->size = image->size;
1122 memory_requirements->alignment = image->alignment;
1123 break;
1124 default:
1125 memory_requirements->size = 0;
1126 break;
1127 }
1128 }
1129
1130 static uint32_t
1131 get_allocation_count(VkObjectType objType)
1132 {
1133 switch (objType) {
1134 case VK_OBJECT_TYPE_BUFFER:
1135 case VK_OBJECT_TYPE_IMAGE:
1136 return 1;
1137 default:
1138 return 0;
1139 }
1140 }
1141
1142 VkResult anv_GetObjectInfo(
1143 VkDevice _device,
1144 VkObjectType objType,
1145 VkObject object,
1146 VkObjectInfoType infoType,
1147 size_t* pDataSize,
1148 void* pData)
1149 {
1150 VkMemoryRequirements memory_requirements;
1151 uint32_t *count;
1152
1153 switch (infoType) {
1154 case VK_OBJECT_INFO_TYPE_MEMORY_REQUIREMENTS:
1155 *pDataSize = sizeof(memory_requirements);
1156 if (pData == NULL)
1157 return VK_SUCCESS;
1158
1159 fill_memory_requirements(objType, object, pData);
1160 return VK_SUCCESS;
1161
1162 case VK_OBJECT_INFO_TYPE_MEMORY_ALLOCATION_COUNT:
1163 *pDataSize = sizeof(count);
1164 if (pData == NULL)
1165 return VK_SUCCESS;
1166
1167 count = pData;
1168 *count = get_allocation_count(objType);
1169 return VK_SUCCESS;
1170
1171 default:
1172 return VK_UNSUPPORTED;
1173 }
1174
1175 }
1176
1177 VkResult anv_QueueBindObjectMemory(
1178 VkQueue queue,
1179 VkObjectType objType,
1180 VkObject object,
1181 uint32_t allocationIdx,
1182 VkDeviceMemory _mem,
1183 VkDeviceSize memOffset)
1184 {
1185 struct anv_buffer *buffer;
1186 struct anv_image *image;
1187 struct anv_device_memory *mem = (struct anv_device_memory *) _mem;
1188
1189 switch (objType) {
1190 case VK_OBJECT_TYPE_BUFFER:
1191 buffer = (struct anv_buffer *) object;
1192 buffer->bo = &mem->bo;
1193 buffer->offset = memOffset;
1194 break;
1195 case VK_OBJECT_TYPE_IMAGE:
1196 image = (struct anv_image *) object;
1197 image->bo = &mem->bo;
1198 image->offset = memOffset;
1199 break;
1200 default:
1201 break;
1202 }
1203
1204 return VK_SUCCESS;
1205 }
1206
1207 VkResult anv_QueueBindObjectMemoryRange(
1208 VkQueue queue,
1209 VkObjectType objType,
1210 VkObject object,
1211 uint32_t allocationIdx,
1212 VkDeviceSize rangeOffset,
1213 VkDeviceSize rangeSize,
1214 VkDeviceMemory mem,
1215 VkDeviceSize memOffset)
1216 {
1217 stub_return(VK_UNSUPPORTED);
1218 }
1219
1220 VkResult anv_QueueBindImageMemoryRange(
1221 VkQueue queue,
1222 VkImage image,
1223 uint32_t allocationIdx,
1224 const VkImageMemoryBindInfo* pBindInfo,
1225 VkDeviceMemory mem,
1226 VkDeviceSize memOffset)
1227 {
1228 stub_return(VK_UNSUPPORTED);
1229 }
1230
1231 static void
1232 anv_fence_destroy(struct anv_device *device,
1233 struct anv_object *object,
1234 VkObjectType obj_type)
1235 {
1236 struct anv_fence *fence = (struct anv_fence *) object;
1237
1238 assert(obj_type == VK_OBJECT_TYPE_FENCE);
1239
1240 anv_gem_munmap(fence->bo.map, fence->bo.size);
1241 anv_gem_close(device, fence->bo.gem_handle);
1242 anv_device_free(device, fence);
1243 }
1244
1245 VkResult anv_CreateFence(
1246 VkDevice _device,
1247 const VkFenceCreateInfo* pCreateInfo,
1248 VkFence* pFence)
1249 {
1250 struct anv_device *device = (struct anv_device *) _device;
1251 struct anv_fence *fence;
1252 struct anv_batch batch;
1253 VkResult result;
1254
1255 const uint32_t fence_size = 128;
1256
1257 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_FENCE_CREATE_INFO);
1258
1259 fence = anv_device_alloc(device, sizeof(*fence), 8,
1260 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1261 if (fence == NULL)
1262 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1263
1264 result = anv_bo_init_new(&fence->bo, device, fence_size);
1265 if (result != VK_SUCCESS)
1266 goto fail;
1267
1268 fence->base.destructor = anv_fence_destroy;
1269
1270 fence->bo.map =
1271 anv_gem_mmap(device, fence->bo.gem_handle, 0, fence->bo.size);
1272 batch.next = batch.start = fence->bo.map;
1273 batch.end = fence->bo.map + fence->bo.size;
1274 anv_batch_emit(&batch, GEN8_MI_BATCH_BUFFER_END);
1275 anv_batch_emit(&batch, GEN8_MI_NOOP);
1276
1277 fence->exec2_objects[0].handle = fence->bo.gem_handle;
1278 fence->exec2_objects[0].relocation_count = 0;
1279 fence->exec2_objects[0].relocs_ptr = 0;
1280 fence->exec2_objects[0].alignment = 0;
1281 fence->exec2_objects[0].offset = fence->bo.offset;
1282 fence->exec2_objects[0].flags = 0;
1283 fence->exec2_objects[0].rsvd1 = 0;
1284 fence->exec2_objects[0].rsvd2 = 0;
1285
1286 fence->execbuf.buffers_ptr = (uintptr_t) fence->exec2_objects;
1287 fence->execbuf.buffer_count = 1;
1288 fence->execbuf.batch_start_offset = 0;
1289 fence->execbuf.batch_len = batch.next - fence->bo.map;
1290 fence->execbuf.cliprects_ptr = 0;
1291 fence->execbuf.num_cliprects = 0;
1292 fence->execbuf.DR1 = 0;
1293 fence->execbuf.DR4 = 0;
1294
1295 fence->execbuf.flags =
1296 I915_EXEC_HANDLE_LUT | I915_EXEC_NO_RELOC | I915_EXEC_RENDER;
1297 fence->execbuf.rsvd1 = device->context_id;
1298 fence->execbuf.rsvd2 = 0;
1299
1300 *pFence = (VkQueryPool) fence;
1301
1302 return VK_SUCCESS;
1303
1304 fail:
1305 anv_device_free(device, fence);
1306
1307 return result;
1308 }
1309
1310 VkResult anv_ResetFences(
1311 VkDevice _device,
1312 uint32_t fenceCount,
1313 VkFence* pFences)
1314 {
1315 struct anv_fence **fences = (struct anv_fence **) pFences;
1316
1317 for (uint32_t i; i < fenceCount; i++)
1318 fences[i]->ready = false;
1319
1320 return VK_SUCCESS;
1321 }
1322
1323 VkResult anv_GetFenceStatus(
1324 VkDevice _device,
1325 VkFence _fence)
1326 {
1327 struct anv_device *device = (struct anv_device *) _device;
1328 struct anv_fence *fence = (struct anv_fence *) _fence;
1329 int64_t t = 0;
1330 int ret;
1331
1332 if (fence->ready)
1333 return VK_SUCCESS;
1334
1335 ret = anv_gem_wait(device, fence->bo.gem_handle, &t);
1336 if (ret == 0) {
1337 fence->ready = true;
1338 return VK_SUCCESS;
1339 }
1340
1341 return VK_NOT_READY;
1342 }
1343
1344 VkResult anv_WaitForFences(
1345 VkDevice _device,
1346 uint32_t fenceCount,
1347 const VkFence* pFences,
1348 bool32_t waitAll,
1349 uint64_t timeout)
1350 {
1351 struct anv_device *device = (struct anv_device *) _device;
1352 struct anv_fence **fences = (struct anv_fence **) pFences;
1353 int64_t t = timeout;
1354 int ret;
1355
1356 /* FIXME: handle !waitAll */
1357
1358 for (uint32_t i = 0; i < fenceCount; i++) {
1359 ret = anv_gem_wait(device, fences[i]->bo.gem_handle, &t);
1360 if (ret == -1 && errno == ETIME)
1361 return VK_TIMEOUT;
1362 else if (ret == -1)
1363 return vk_error(VK_ERROR_UNKNOWN);
1364 }
1365
1366 return VK_SUCCESS;
1367 }
1368
1369 // Queue semaphore functions
1370
1371 VkResult anv_CreateSemaphore(
1372 VkDevice device,
1373 const VkSemaphoreCreateInfo* pCreateInfo,
1374 VkSemaphore* pSemaphore)
1375 {
1376 stub_return(VK_UNSUPPORTED);
1377 }
1378
1379 VkResult anv_QueueSignalSemaphore(
1380 VkQueue queue,
1381 VkSemaphore semaphore)
1382 {
1383 stub_return(VK_UNSUPPORTED);
1384 }
1385
1386 VkResult anv_QueueWaitSemaphore(
1387 VkQueue queue,
1388 VkSemaphore semaphore)
1389 {
1390 stub_return(VK_UNSUPPORTED);
1391 }
1392
1393 // Event functions
1394
1395 VkResult anv_CreateEvent(
1396 VkDevice device,
1397 const VkEventCreateInfo* pCreateInfo,
1398 VkEvent* pEvent)
1399 {
1400 stub_return(VK_UNSUPPORTED);
1401 }
1402
1403 VkResult anv_GetEventStatus(
1404 VkDevice device,
1405 VkEvent event)
1406 {
1407 stub_return(VK_UNSUPPORTED);
1408 }
1409
1410 VkResult anv_SetEvent(
1411 VkDevice device,
1412 VkEvent event)
1413 {
1414 stub_return(VK_UNSUPPORTED);
1415 }
1416
1417 VkResult anv_ResetEvent(
1418 VkDevice device,
1419 VkEvent event)
1420 {
1421 stub_return(VK_UNSUPPORTED);
1422 }
1423
1424 // Query functions
1425
1426 static void
1427 anv_query_pool_destroy(struct anv_device *device,
1428 struct anv_object *object,
1429 VkObjectType obj_type)
1430 {
1431 struct anv_query_pool *pool = (struct anv_query_pool *) object;
1432
1433 assert(obj_type == VK_OBJECT_TYPE_QUERY_POOL);
1434
1435 anv_gem_munmap(pool->bo.map, pool->bo.size);
1436 anv_gem_close(device, pool->bo.gem_handle);
1437 anv_device_free(device, pool);
1438 }
1439
1440 VkResult anv_CreateQueryPool(
1441 VkDevice _device,
1442 const VkQueryPoolCreateInfo* pCreateInfo,
1443 VkQueryPool* pQueryPool)
1444 {
1445 struct anv_device *device = (struct anv_device *) _device;
1446 struct anv_query_pool *pool;
1447 VkResult result;
1448 size_t size;
1449
1450 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_QUERY_POOL_CREATE_INFO);
1451
1452 switch (pCreateInfo->queryType) {
1453 case VK_QUERY_TYPE_OCCLUSION:
1454 break;
1455 case VK_QUERY_TYPE_PIPELINE_STATISTICS:
1456 return VK_UNSUPPORTED;
1457 default:
1458 unreachable("");
1459 }
1460
1461 pool = anv_device_alloc(device, sizeof(*pool), 8,
1462 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1463 if (pool == NULL)
1464 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1465
1466 pool->base.destructor = anv_query_pool_destroy;
1467
1468 pool->type = pCreateInfo->queryType;
1469 size = pCreateInfo->slots * sizeof(struct anv_query_pool_slot);
1470 result = anv_bo_init_new(&pool->bo, device, size);
1471 if (result != VK_SUCCESS)
1472 goto fail;
1473
1474 pool->bo.map = anv_gem_mmap(device, pool->bo.gem_handle, 0, size);
1475
1476 *pQueryPool = (VkQueryPool) pool;
1477
1478 return VK_SUCCESS;
1479
1480 fail:
1481 anv_device_free(device, pool);
1482
1483 return result;
1484 }
1485
1486 VkResult anv_GetQueryPoolResults(
1487 VkDevice _device,
1488 VkQueryPool queryPool,
1489 uint32_t startQuery,
1490 uint32_t queryCount,
1491 size_t* pDataSize,
1492 void* pData,
1493 VkQueryResultFlags flags)
1494 {
1495 struct anv_device *device = (struct anv_device *) _device;
1496 struct anv_query_pool *pool = (struct anv_query_pool *) queryPool;
1497 struct anv_query_pool_slot *slot = pool->bo.map;
1498 int64_t timeout = INT64_MAX;
1499 uint32_t *dst32 = pData;
1500 uint64_t *dst64 = pData;
1501 uint64_t result;
1502 int ret;
1503
1504 if (flags & VK_QUERY_RESULT_WITH_AVAILABILITY_BIT) {
1505 /* Where is the availabilty info supposed to go? */
1506 anv_finishme("VK_QUERY_RESULT_WITH_AVAILABILITY_BIT");
1507 return VK_UNSUPPORTED;
1508 }
1509
1510 assert(pool->type == VK_QUERY_TYPE_OCCLUSION);
1511
1512 if (flags & VK_QUERY_RESULT_64_BIT)
1513 *pDataSize = queryCount * sizeof(uint64_t);
1514 else
1515 *pDataSize = queryCount * sizeof(uint32_t);
1516
1517 if (pData == NULL)
1518 return VK_SUCCESS;
1519
1520 if (flags & VK_QUERY_RESULT_WAIT_BIT) {
1521 ret = anv_gem_wait(device, pool->bo.gem_handle, &timeout);
1522 if (ret == -1)
1523 return vk_error(VK_ERROR_UNKNOWN);
1524 }
1525
1526 for (uint32_t i = 0; i < queryCount; i++) {
1527 result = slot[startQuery + i].end - slot[startQuery + i].begin;
1528 if (flags & VK_QUERY_RESULT_64_BIT) {
1529 *dst64++ = result;
1530 } else {
1531 if (result > UINT32_MAX)
1532 result = UINT32_MAX;
1533 *dst32++ = result;
1534 }
1535 }
1536
1537 return VK_SUCCESS;
1538 }
1539
1540 // Buffer functions
1541
1542 VkResult anv_CreateBuffer(
1543 VkDevice _device,
1544 const VkBufferCreateInfo* pCreateInfo,
1545 VkBuffer* pBuffer)
1546 {
1547 struct anv_device *device = (struct anv_device *) _device;
1548 struct anv_buffer *buffer;
1549
1550 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO);
1551
1552 buffer = anv_device_alloc(device, sizeof(*buffer), 8,
1553 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1554 if (buffer == NULL)
1555 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1556
1557 buffer->size = pCreateInfo->size;
1558 buffer->bo = NULL;
1559 buffer->offset = 0;
1560
1561 *pBuffer = (VkBuffer) buffer;
1562
1563 return VK_SUCCESS;
1564 }
1565
1566 // Buffer view functions
1567
1568 static void
1569 fill_buffer_surface_state(void *state, VkFormat format,
1570 uint32_t offset, uint32_t range)
1571 {
1572 const struct anv_format *info;
1573
1574 info = anv_format_for_vk_format(format);
1575 /* This assumes RGBA float format. */
1576 uint32_t stride = 4;
1577 uint32_t num_elements = range / stride;
1578
1579 struct GEN8_RENDER_SURFACE_STATE surface_state = {
1580 .SurfaceType = SURFTYPE_BUFFER,
1581 .SurfaceArray = false,
1582 .SurfaceFormat = info->format,
1583 .SurfaceVerticalAlignment = VALIGN4,
1584 .SurfaceHorizontalAlignment = HALIGN4,
1585 .TileMode = LINEAR,
1586 .VerticalLineStride = 0,
1587 .VerticalLineStrideOffset = 0,
1588 .SamplerL2BypassModeDisable = true,
1589 .RenderCacheReadWriteMode = WriteOnlyCache,
1590 .MemoryObjectControlState = GEN8_MOCS,
1591 .BaseMipLevel = 0,
1592 .SurfaceQPitch = 0,
1593 .Height = (num_elements >> 7) & 0x3fff,
1594 .Width = num_elements & 0x7f,
1595 .Depth = (num_elements >> 21) & 0x3f,
1596 .SurfacePitch = stride - 1,
1597 .MinimumArrayElement = 0,
1598 .NumberofMultisamples = MULTISAMPLECOUNT_1,
1599 .XOffset = 0,
1600 .YOffset = 0,
1601 .SurfaceMinLOD = 0,
1602 .MIPCountLOD = 0,
1603 .AuxiliarySurfaceMode = AUX_NONE,
1604 .RedClearColor = 0,
1605 .GreenClearColor = 0,
1606 .BlueClearColor = 0,
1607 .AlphaClearColor = 0,
1608 .ShaderChannelSelectRed = SCS_RED,
1609 .ShaderChannelSelectGreen = SCS_GREEN,
1610 .ShaderChannelSelectBlue = SCS_BLUE,
1611 .ShaderChannelSelectAlpha = SCS_ALPHA,
1612 .ResourceMinLOD = 0,
1613 /* FIXME: We assume that the image must be bound at this time. */
1614 .SurfaceBaseAddress = { NULL, offset },
1615 };
1616
1617 GEN8_RENDER_SURFACE_STATE_pack(NULL, state, &surface_state);
1618 }
1619
1620 VkResult anv_CreateBufferView(
1621 VkDevice _device,
1622 const VkBufferViewCreateInfo* pCreateInfo,
1623 VkBufferView* pView)
1624 {
1625 struct anv_device *device = (struct anv_device *) _device;
1626 struct anv_buffer *buffer = (struct anv_buffer *) pCreateInfo->buffer;
1627 struct anv_surface_view *view;
1628
1629 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO);
1630
1631 view = anv_device_alloc(device, sizeof(*view), 8,
1632 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1633 if (view == NULL)
1634 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1635
1636 view->bo = buffer->bo;
1637 view->offset = buffer->offset + pCreateInfo->offset;
1638 view->surface_state =
1639 anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
1640 view->format = pCreateInfo->format;
1641 view->range = pCreateInfo->range;
1642
1643 fill_buffer_surface_state(view->surface_state.map,
1644 pCreateInfo->format, view->offset, pCreateInfo->range);
1645
1646 *pView = (VkImageView) view;
1647
1648 return VK_SUCCESS;
1649 }
1650
1651 // Sampler functions
1652
1653 VkResult anv_CreateSampler(
1654 VkDevice _device,
1655 const VkSamplerCreateInfo* pCreateInfo,
1656 VkSampler* pSampler)
1657 {
1658 struct anv_device *device = (struct anv_device *) _device;
1659 struct anv_sampler *sampler;
1660
1661 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO);
1662
1663 sampler = anv_device_alloc(device, sizeof(*sampler), 8,
1664 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1665 if (!sampler)
1666 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1667
1668 static const uint32_t vk_to_gen_tex_filter[] = {
1669 [VK_TEX_FILTER_NEAREST] = MAPFILTER_NEAREST,
1670 [VK_TEX_FILTER_LINEAR] = MAPFILTER_LINEAR
1671 };
1672
1673 static const uint32_t vk_to_gen_mipmap_mode[] = {
1674 [VK_TEX_MIPMAP_MODE_BASE] = MIPFILTER_NONE,
1675 [VK_TEX_MIPMAP_MODE_NEAREST] = MIPFILTER_NEAREST,
1676 [VK_TEX_MIPMAP_MODE_LINEAR] = MIPFILTER_LINEAR
1677 };
1678
1679 static const uint32_t vk_to_gen_tex_address[] = {
1680 [VK_TEX_ADDRESS_WRAP] = TCM_WRAP,
1681 [VK_TEX_ADDRESS_MIRROR] = TCM_MIRROR,
1682 [VK_TEX_ADDRESS_CLAMP] = TCM_CLAMP,
1683 [VK_TEX_ADDRESS_MIRROR_ONCE] = TCM_MIRROR_ONCE,
1684 [VK_TEX_ADDRESS_CLAMP_BORDER] = TCM_CLAMP_BORDER,
1685 };
1686
1687 static const uint32_t vk_to_gen_compare_op[] = {
1688 [VK_COMPARE_OP_NEVER] = PREFILTEROPNEVER,
1689 [VK_COMPARE_OP_LESS] = PREFILTEROPLESS,
1690 [VK_COMPARE_OP_EQUAL] = PREFILTEROPEQUAL,
1691 [VK_COMPARE_OP_LESS_EQUAL] = PREFILTEROPLEQUAL,
1692 [VK_COMPARE_OP_GREATER] = PREFILTEROPGREATER,
1693 [VK_COMPARE_OP_NOT_EQUAL] = PREFILTEROPNOTEQUAL,
1694 [VK_COMPARE_OP_GREATER_EQUAL] = PREFILTEROPGEQUAL,
1695 [VK_COMPARE_OP_ALWAYS] = PREFILTEROPALWAYS,
1696 };
1697
1698 if (pCreateInfo->maxAnisotropy > 0)
1699 anv_finishme("missing support for anisotropic filtering");
1700
1701 struct GEN8_SAMPLER_STATE sampler_state = {
1702 .SamplerDisable = false,
1703 .TextureBorderColorMode = DX10OGL,
1704 .LODPreClampMode = 0,
1705 .BaseMipLevel = 0,
1706 .MipModeFilter = vk_to_gen_mipmap_mode[pCreateInfo->mipMode],
1707 .MagModeFilter = vk_to_gen_tex_filter[pCreateInfo->magFilter],
1708 .MinModeFilter = vk_to_gen_tex_filter[pCreateInfo->minFilter],
1709 .TextureLODBias = pCreateInfo->mipLodBias * 256,
1710 .AnisotropicAlgorithm = EWAApproximation,
1711 .MinLOD = pCreateInfo->minLod * 256,
1712 .MaxLOD = pCreateInfo->maxLod * 256,
1713 .ChromaKeyEnable = 0,
1714 .ChromaKeyIndex = 0,
1715 .ChromaKeyMode = 0,
1716 .ShadowFunction = vk_to_gen_compare_op[pCreateInfo->compareOp],
1717 .CubeSurfaceControlMode = 0,
1718 .IndirectStatePointer = 0,
1719 .LODClampMagnificationMode = MIPNONE,
1720 .MaximumAnisotropy = 0,
1721 .RAddressMinFilterRoundingEnable = 0,
1722 .RAddressMagFilterRoundingEnable = 0,
1723 .VAddressMinFilterRoundingEnable = 0,
1724 .VAddressMagFilterRoundingEnable = 0,
1725 .UAddressMinFilterRoundingEnable = 0,
1726 .UAddressMagFilterRoundingEnable = 0,
1727 .TrilinearFilterQuality = 0,
1728 .NonnormalizedCoordinateEnable = 0,
1729 .TCXAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressU],
1730 .TCYAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressV],
1731 .TCZAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressW],
1732 };
1733
1734 GEN8_SAMPLER_STATE_pack(NULL, sampler->state, &sampler_state);
1735
1736 *pSampler = (VkSampler) sampler;
1737
1738 return VK_SUCCESS;
1739 }
1740
1741 // Descriptor set functions
1742
1743 VkResult anv_CreateDescriptorSetLayout(
1744 VkDevice _device,
1745 const VkDescriptorSetLayoutCreateInfo* pCreateInfo,
1746 VkDescriptorSetLayout* pSetLayout)
1747 {
1748 struct anv_device *device = (struct anv_device *) _device;
1749 struct anv_descriptor_set_layout *set_layout;
1750
1751 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO);
1752
1753 uint32_t sampler_count[VK_NUM_SHADER_STAGE] = { 0, };
1754 uint32_t surface_count[VK_NUM_SHADER_STAGE] = { 0, };
1755 uint32_t num_dynamic_buffers = 0;
1756 uint32_t count = 0;
1757 uint32_t s;
1758
1759 for (uint32_t i = 0; i < pCreateInfo->count; i++) {
1760 switch (pCreateInfo->pBinding[i].descriptorType) {
1761 case VK_DESCRIPTOR_TYPE_SAMPLER:
1762 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
1763 for_each_bit(s, pCreateInfo->pBinding[i].stageFlags)
1764 sampler_count[s] += pCreateInfo->pBinding[i].count;
1765 break;
1766 default:
1767 break;
1768 }
1769
1770 switch (pCreateInfo->pBinding[i].descriptorType) {
1771 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
1772 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
1773 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
1774 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
1775 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
1776 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
1777 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
1778 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
1779 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
1780 for_each_bit(s, pCreateInfo->pBinding[i].stageFlags)
1781 surface_count[s] += pCreateInfo->pBinding[i].count;
1782 break;
1783 default:
1784 break;
1785 }
1786
1787 switch (pCreateInfo->pBinding[i].descriptorType) {
1788 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
1789 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
1790 num_dynamic_buffers += pCreateInfo->pBinding[i].count;
1791 break;
1792 default:
1793 break;
1794 }
1795
1796 count += pCreateInfo->pBinding[i].count;
1797 }
1798
1799 uint32_t sampler_total = 0;
1800 uint32_t surface_total = 0;
1801 for (uint32_t s = 0; s < VK_NUM_SHADER_STAGE; s++) {
1802 sampler_total += sampler_count[s];
1803 surface_total += surface_count[s];
1804 }
1805
1806 size_t size = sizeof(*set_layout) +
1807 (sampler_total + surface_total) * sizeof(set_layout->entries[0]);
1808 set_layout = anv_device_alloc(device, size, 8,
1809 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1810 if (!set_layout)
1811 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1812
1813 set_layout->num_dynamic_buffers = num_dynamic_buffers;
1814 set_layout->count = count;
1815
1816 struct anv_descriptor_slot *p = set_layout->entries;
1817 struct anv_descriptor_slot *sampler[VK_NUM_SHADER_STAGE];
1818 struct anv_descriptor_slot *surface[VK_NUM_SHADER_STAGE];
1819 for (uint32_t s = 0; s < VK_NUM_SHADER_STAGE; s++) {
1820 set_layout->stage[s].surface_count = surface_count[s];
1821 set_layout->stage[s].surface_start = surface[s] = p;
1822 p += surface_count[s];
1823 set_layout->stage[s].sampler_count = sampler_count[s];
1824 set_layout->stage[s].sampler_start = sampler[s] = p;
1825 p += sampler_count[s];
1826 }
1827
1828 uint32_t descriptor = 0;
1829 int8_t dynamic_slot = 0;
1830 bool is_dynamic;
1831 for (uint32_t i = 0; i < pCreateInfo->count; i++) {
1832 switch (pCreateInfo->pBinding[i].descriptorType) {
1833 case VK_DESCRIPTOR_TYPE_SAMPLER:
1834 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
1835 for_each_bit(s, pCreateInfo->pBinding[i].stageFlags)
1836 for (uint32_t j = 0; j < pCreateInfo->pBinding[i].count; j++) {
1837 sampler[s]->index = descriptor + j;
1838 sampler[s]->dynamic_slot = -1;
1839 sampler[s]++;
1840 }
1841 break;
1842 default:
1843 break;
1844 }
1845
1846 switch (pCreateInfo->pBinding[i].descriptorType) {
1847 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
1848 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
1849 is_dynamic = true;
1850 break;
1851 default:
1852 is_dynamic = false;
1853 break;
1854 }
1855
1856 switch (pCreateInfo->pBinding[i].descriptorType) {
1857 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
1858 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
1859 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
1860 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
1861 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
1862 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
1863 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
1864 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
1865 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
1866 for_each_bit(s, pCreateInfo->pBinding[i].stageFlags)
1867 for (uint32_t j = 0; j < pCreateInfo->pBinding[i].count; j++) {
1868 surface[s]->index = descriptor + j;
1869 if (is_dynamic)
1870 surface[s]->dynamic_slot = dynamic_slot + j;
1871 else
1872 surface[s]->dynamic_slot = -1;
1873 surface[s]++;
1874 }
1875 break;
1876 default:
1877 break;
1878 }
1879
1880 if (is_dynamic)
1881 dynamic_slot += pCreateInfo->pBinding[i].count;
1882
1883 descriptor += pCreateInfo->pBinding[i].count;
1884 }
1885
1886 *pSetLayout = (VkDescriptorSetLayout) set_layout;
1887
1888 return VK_SUCCESS;
1889 }
1890
1891 VkResult anv_BeginDescriptorPoolUpdate(
1892 VkDevice device,
1893 VkDescriptorUpdateMode updateMode)
1894 {
1895 return VK_SUCCESS;
1896 }
1897
1898 VkResult anv_EndDescriptorPoolUpdate(
1899 VkDevice device,
1900 VkCmdBuffer cmd)
1901 {
1902 return VK_SUCCESS;
1903 }
1904
1905 VkResult anv_CreateDescriptorPool(
1906 VkDevice device,
1907 VkDescriptorPoolUsage poolUsage,
1908 uint32_t maxSets,
1909 const VkDescriptorPoolCreateInfo* pCreateInfo,
1910 VkDescriptorPool* pDescriptorPool)
1911 {
1912 *pDescriptorPool = 1;
1913
1914 return VK_SUCCESS;
1915 }
1916
1917 VkResult anv_ResetDescriptorPool(
1918 VkDevice device,
1919 VkDescriptorPool descriptorPool)
1920 {
1921 return VK_SUCCESS;
1922 }
1923
1924 VkResult anv_AllocDescriptorSets(
1925 VkDevice _device,
1926 VkDescriptorPool descriptorPool,
1927 VkDescriptorSetUsage setUsage,
1928 uint32_t count,
1929 const VkDescriptorSetLayout* pSetLayouts,
1930 VkDescriptorSet* pDescriptorSets,
1931 uint32_t* pCount)
1932 {
1933 struct anv_device *device = (struct anv_device *) _device;
1934 const struct anv_descriptor_set_layout *layout;
1935 struct anv_descriptor_set *set;
1936 size_t size;
1937
1938 for (uint32_t i = 0; i < count; i++) {
1939 layout = (struct anv_descriptor_set_layout *) pSetLayouts[i];
1940 size = sizeof(*set) + layout->count * sizeof(set->descriptors[0]);
1941 set = anv_device_alloc(device, size, 8,
1942 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1943 if (!set) {
1944 *pCount = i;
1945 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1946 }
1947
1948 /* Descriptor sets may not be 100% filled out so we need to memset to
1949 * ensure that we can properly detect and handle holes.
1950 */
1951 memset(set, 0, size);
1952
1953 pDescriptorSets[i] = (VkDescriptorSet) set;
1954 }
1955
1956 *pCount = count;
1957
1958 return VK_SUCCESS;
1959 }
1960
1961 void anv_ClearDescriptorSets(
1962 VkDevice device,
1963 VkDescriptorPool descriptorPool,
1964 uint32_t count,
1965 const VkDescriptorSet* pDescriptorSets)
1966 {
1967 }
1968
1969 void anv_UpdateDescriptors(
1970 VkDevice _device,
1971 VkDescriptorSet descriptorSet,
1972 uint32_t updateCount,
1973 const void** ppUpdateArray)
1974 {
1975 struct anv_descriptor_set *set = (struct anv_descriptor_set *) descriptorSet;
1976 VkUpdateSamplers *update_samplers;
1977 VkUpdateSamplerTextures *update_sampler_textures;
1978 VkUpdateImages *update_images;
1979 VkUpdateBuffers *update_buffers;
1980 VkUpdateAsCopy *update_as_copy;
1981
1982 for (uint32_t i = 0; i < updateCount; i++) {
1983 const struct anv_common *common = ppUpdateArray[i];
1984
1985 switch (common->sType) {
1986 case VK_STRUCTURE_TYPE_UPDATE_SAMPLERS:
1987 update_samplers = (VkUpdateSamplers *) common;
1988
1989 for (uint32_t j = 0; j < update_samplers->count; j++) {
1990 set->descriptors[update_samplers->binding + j].sampler =
1991 (struct anv_sampler *) update_samplers->pSamplers[j];
1992 }
1993 break;
1994
1995 case VK_STRUCTURE_TYPE_UPDATE_SAMPLER_TEXTURES:
1996 /* FIXME: Shouldn't this be *_UPDATE_SAMPLER_IMAGES? */
1997 update_sampler_textures = (VkUpdateSamplerTextures *) common;
1998
1999 for (uint32_t j = 0; j < update_sampler_textures->count; j++) {
2000 set->descriptors[update_sampler_textures->binding + j].view =
2001 (struct anv_surface_view *)
2002 update_sampler_textures->pSamplerImageViews[j].pImageView->view;
2003 set->descriptors[update_sampler_textures->binding + j].sampler =
2004 (struct anv_sampler *)
2005 update_sampler_textures->pSamplerImageViews[j].sampler;
2006 }
2007 break;
2008
2009 case VK_STRUCTURE_TYPE_UPDATE_IMAGES:
2010 update_images = (VkUpdateImages *) common;
2011
2012 for (uint32_t j = 0; j < update_images->count; j++) {
2013 set->descriptors[update_images->binding + j].view =
2014 (struct anv_surface_view *) update_images->pImageViews[j].view;
2015 }
2016 break;
2017
2018 case VK_STRUCTURE_TYPE_UPDATE_BUFFERS:
2019 update_buffers = (VkUpdateBuffers *) common;
2020
2021 for (uint32_t j = 0; j < update_buffers->count; j++) {
2022 set->descriptors[update_buffers->binding + j].view =
2023 (struct anv_surface_view *) update_buffers->pBufferViews[j].view;
2024 }
2025 /* FIXME: descriptor arrays? */
2026 break;
2027
2028 case VK_STRUCTURE_TYPE_UPDATE_AS_COPY:
2029 update_as_copy = (VkUpdateAsCopy *) common;
2030 (void) update_as_copy;
2031 break;
2032
2033 default:
2034 break;
2035 }
2036 }
2037 }
2038
2039 // State object functions
2040
2041 static inline int64_t
2042 clamp_int64(int64_t x, int64_t min, int64_t max)
2043 {
2044 if (x < min)
2045 return min;
2046 else if (x < max)
2047 return x;
2048 else
2049 return max;
2050 }
2051
2052 static void
2053 anv_dynamic_vp_state_destroy(struct anv_device *device,
2054 struct anv_object *object,
2055 VkObjectType obj_type)
2056 {
2057 struct anv_dynamic_vp_state *state = (void *)object;
2058
2059 assert(obj_type == VK_OBJECT_TYPE_DYNAMIC_VP_STATE);
2060
2061 anv_state_pool_free(&device->dynamic_state_pool, state->sf_clip_vp);
2062 anv_state_pool_free(&device->dynamic_state_pool, state->cc_vp);
2063 anv_state_pool_free(&device->dynamic_state_pool, state->scissor);
2064
2065 anv_device_free(device, state);
2066 }
2067
2068 VkResult anv_CreateDynamicViewportState(
2069 VkDevice _device,
2070 const VkDynamicVpStateCreateInfo* pCreateInfo,
2071 VkDynamicVpState* pState)
2072 {
2073 struct anv_device *device = (struct anv_device *) _device;
2074 struct anv_dynamic_vp_state *state;
2075
2076 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DYNAMIC_VP_STATE_CREATE_INFO);
2077
2078 state = anv_device_alloc(device, sizeof(*state), 8,
2079 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
2080 if (state == NULL)
2081 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2082
2083 state->base.destructor = anv_dynamic_vp_state_destroy;
2084
2085 unsigned count = pCreateInfo->viewportAndScissorCount;
2086 state->sf_clip_vp = anv_state_pool_alloc(&device->dynamic_state_pool,
2087 count * 64, 64);
2088 state->cc_vp = anv_state_pool_alloc(&device->dynamic_state_pool,
2089 count * 8, 32);
2090 state->scissor = anv_state_pool_alloc(&device->dynamic_state_pool,
2091 count * 32, 32);
2092
2093 for (uint32_t i = 0; i < pCreateInfo->viewportAndScissorCount; i++) {
2094 const VkViewport *vp = &pCreateInfo->pViewports[i];
2095 const VkRect *s = &pCreateInfo->pScissors[i];
2096
2097 struct GEN8_SF_CLIP_VIEWPORT sf_clip_viewport = {
2098 .ViewportMatrixElementm00 = vp->width / 2,
2099 .ViewportMatrixElementm11 = vp->height / 2,
2100 .ViewportMatrixElementm22 = (vp->maxDepth - vp->minDepth) / 2,
2101 .ViewportMatrixElementm30 = vp->originX + vp->width / 2,
2102 .ViewportMatrixElementm31 = vp->originY + vp->height / 2,
2103 .ViewportMatrixElementm32 = (vp->maxDepth + vp->minDepth) / 2,
2104 .XMinClipGuardband = -1.0f,
2105 .XMaxClipGuardband = 1.0f,
2106 .YMinClipGuardband = -1.0f,
2107 .YMaxClipGuardband = 1.0f,
2108 .XMinViewPort = vp->originX,
2109 .XMaxViewPort = vp->originX + vp->width - 1,
2110 .YMinViewPort = vp->originY,
2111 .YMaxViewPort = vp->originY + vp->height - 1,
2112 };
2113
2114 struct GEN8_CC_VIEWPORT cc_viewport = {
2115 .MinimumDepth = vp->minDepth,
2116 .MaximumDepth = vp->maxDepth
2117 };
2118
2119 /* Since xmax and ymax are inclusive, we have to have xmax < xmin or
2120 * ymax < ymin for empty clips. In case clip x, y, width height are all
2121 * 0, the clamps below produce 0 for xmin, ymin, xmax, ymax, which isn't
2122 * what we want. Just special case empty clips and produce a canonical
2123 * empty clip. */
2124 static const struct GEN8_SCISSOR_RECT empty_scissor = {
2125 .ScissorRectangleYMin = 1,
2126 .ScissorRectangleXMin = 1,
2127 .ScissorRectangleYMax = 0,
2128 .ScissorRectangleXMax = 0
2129 };
2130
2131 const int max = 0xffff;
2132 struct GEN8_SCISSOR_RECT scissor = {
2133 /* Do this math using int64_t so overflow gets clamped correctly. */
2134 .ScissorRectangleYMin = clamp_int64(s->offset.y, 0, max),
2135 .ScissorRectangleXMin = clamp_int64(s->offset.x, 0, max),
2136 .ScissorRectangleYMax = clamp_int64((uint64_t) s->offset.y + s->extent.height - 1, 0, max),
2137 .ScissorRectangleXMax = clamp_int64((uint64_t) s->offset.x + s->extent.width - 1, 0, max)
2138 };
2139
2140 GEN8_SF_CLIP_VIEWPORT_pack(NULL, state->sf_clip_vp.map + i * 64, &sf_clip_viewport);
2141 GEN8_CC_VIEWPORT_pack(NULL, state->cc_vp.map + i * 32, &cc_viewport);
2142
2143 if (s->extent.width <= 0 || s->extent.height <= 0) {
2144 GEN8_SCISSOR_RECT_pack(NULL, state->scissor.map + i * 32, &empty_scissor);
2145 } else {
2146 GEN8_SCISSOR_RECT_pack(NULL, state->scissor.map + i * 32, &scissor);
2147 }
2148 }
2149
2150 *pState = (VkDynamicVpState) state;
2151
2152 return VK_SUCCESS;
2153 }
2154
2155 VkResult anv_CreateDynamicRasterState(
2156 VkDevice _device,
2157 const VkDynamicRsStateCreateInfo* pCreateInfo,
2158 VkDynamicRsState* pState)
2159 {
2160 struct anv_device *device = (struct anv_device *) _device;
2161 struct anv_dynamic_rs_state *state;
2162
2163 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DYNAMIC_RS_STATE_CREATE_INFO);
2164
2165 state = anv_device_alloc(device, sizeof(*state), 8,
2166 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
2167 if (state == NULL)
2168 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2169
2170 /* Missing these:
2171 * float pointFadeThreshold;
2172 * // optional (GL45) - Size of point fade threshold
2173 */
2174
2175 struct GEN8_3DSTATE_SF sf = {
2176 GEN8_3DSTATE_SF_header,
2177 .LineWidth = pCreateInfo->lineWidth,
2178 .PointWidth = pCreateInfo->pointSize,
2179 };
2180
2181 GEN8_3DSTATE_SF_pack(NULL, state->state_sf, &sf);
2182
2183 bool enable_bias = pCreateInfo->depthBias != 0.0f ||
2184 pCreateInfo->slopeScaledDepthBias != 0.0f;
2185 struct GEN8_3DSTATE_RASTER raster = {
2186 .GlobalDepthOffsetEnableSolid = enable_bias,
2187 .GlobalDepthOffsetEnableWireframe = enable_bias,
2188 .GlobalDepthOffsetEnablePoint = enable_bias,
2189 .GlobalDepthOffsetConstant = pCreateInfo->depthBias,
2190 .GlobalDepthOffsetScale = pCreateInfo->slopeScaledDepthBias,
2191 .GlobalDepthOffsetClamp = pCreateInfo->depthBiasClamp
2192 };
2193
2194 GEN8_3DSTATE_RASTER_pack(NULL, state->state_raster, &raster);
2195
2196 *pState = (VkDynamicRsState) state;
2197
2198 return VK_SUCCESS;
2199 }
2200
2201 VkResult anv_CreateDynamicColorBlendState(
2202 VkDevice _device,
2203 const VkDynamicCbStateCreateInfo* pCreateInfo,
2204 VkDynamicCbState* pState)
2205 {
2206 struct anv_device *device = (struct anv_device *) _device;
2207 struct anv_dynamic_cb_state *state;
2208
2209 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DYNAMIC_CB_STATE_CREATE_INFO);
2210
2211 state = anv_device_alloc(device, sizeof(*state), 8,
2212 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
2213 if (state == NULL)
2214 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2215
2216 struct GEN8_COLOR_CALC_STATE color_calc_state = {
2217 .BlendConstantColorRed = pCreateInfo->blendConst[0],
2218 .BlendConstantColorGreen = pCreateInfo->blendConst[1],
2219 .BlendConstantColorBlue = pCreateInfo->blendConst[2],
2220 .BlendConstantColorAlpha = pCreateInfo->blendConst[3]
2221 };
2222
2223 GEN8_COLOR_CALC_STATE_pack(NULL, state->state_color_calc, &color_calc_state);
2224
2225 *pState = (VkDynamicCbState) state;
2226
2227 return VK_SUCCESS;
2228 }
2229
2230 VkResult anv_CreateDynamicDepthStencilState(
2231 VkDevice _device,
2232 const VkDynamicDsStateCreateInfo* pCreateInfo,
2233 VkDynamicDsState* pState)
2234 {
2235 struct anv_device *device = (struct anv_device *) _device;
2236 struct anv_dynamic_ds_state *state;
2237
2238 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DYNAMIC_DS_STATE_CREATE_INFO);
2239
2240 state = anv_device_alloc(device, sizeof(*state), 8,
2241 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
2242 if (state == NULL)
2243 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2244
2245 struct GEN8_3DSTATE_WM_DEPTH_STENCIL wm_depth_stencil = {
2246 GEN8_3DSTATE_WM_DEPTH_STENCIL_header,
2247
2248 /* Is this what we need to do? */
2249 .StencilBufferWriteEnable = pCreateInfo->stencilWriteMask != 0,
2250
2251 .StencilTestMask = pCreateInfo->stencilReadMask,
2252 .StencilWriteMask = pCreateInfo->stencilWriteMask,
2253
2254 .BackfaceStencilTestMask = pCreateInfo->stencilReadMask,
2255 .BackfaceStencilWriteMask = pCreateInfo->stencilWriteMask,
2256 };
2257
2258 GEN8_3DSTATE_WM_DEPTH_STENCIL_pack(NULL, state->state_wm_depth_stencil,
2259 &wm_depth_stencil);
2260
2261 struct GEN8_COLOR_CALC_STATE color_calc_state = {
2262 .StencilReferenceValue = pCreateInfo->stencilFrontRef,
2263 .BackFaceStencilReferenceValue = pCreateInfo->stencilBackRef
2264 };
2265
2266 GEN8_COLOR_CALC_STATE_pack(NULL, state->state_color_calc, &color_calc_state);
2267
2268 *pState = (VkDynamicDsState) state;
2269
2270 return VK_SUCCESS;
2271 }
2272
2273 // Command buffer functions
2274
2275 static void
2276 anv_cmd_buffer_destroy(struct anv_device *device,
2277 struct anv_object *object,
2278 VkObjectType obj_type)
2279 {
2280 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) object;
2281
2282 assert(obj_type == VK_OBJECT_TYPE_COMMAND_BUFFER);
2283
2284 /* Destroy all of the batch buffers */
2285 struct anv_batch_bo *bbo = cmd_buffer->last_batch_bo;
2286 while (bbo->prev_batch_bo) {
2287 struct anv_batch_bo *prev = bbo->prev_batch_bo;
2288 anv_batch_bo_destroy(bbo, cmd_buffer->device);
2289 bbo = prev;
2290 }
2291
2292 anv_bo_pool_free(&device->batch_bo_pool, &cmd_buffer->surface_bo);
2293 anv_reloc_list_finish(&cmd_buffer->surface_relocs, device);
2294 anv_state_stream_finish(&cmd_buffer->surface_state_stream);
2295 anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
2296 anv_state_stream_finish(&cmd_buffer->binding_table_state_stream);
2297 anv_reloc_list_finish(&cmd_buffer->batch.relocs, device);
2298 anv_device_free(device, cmd_buffer->exec2_objects);
2299 anv_device_free(device, cmd_buffer->exec2_bos);
2300 anv_device_free(device, cmd_buffer);
2301 }
2302
2303 static VkResult
2304 anv_cmd_buffer_chain_batch(struct anv_batch *batch, void *_data)
2305 {
2306 struct anv_cmd_buffer *cmd_buffer = _data;
2307
2308 struct anv_batch_bo *new_bbo, *old_bbo = cmd_buffer->last_batch_bo;
2309
2310 VkResult result = anv_batch_bo_create(cmd_buffer->device, &new_bbo);
2311 if (result != VK_SUCCESS)
2312 return result;
2313
2314 /* We set the end of the batch a little short so we would be sure we
2315 * have room for the chaining command. Since we're about to emit the
2316 * chaining command, let's set it back where it should go.
2317 */
2318 batch->end += GEN8_MI_BATCH_BUFFER_START_length * 4;
2319 assert(batch->end == old_bbo->bo.map + old_bbo->bo.size);
2320
2321 anv_batch_emit(batch, GEN8_MI_BATCH_BUFFER_START,
2322 GEN8_MI_BATCH_BUFFER_START_header,
2323 ._2ndLevelBatchBuffer = _1stlevelbatch,
2324 .AddressSpaceIndicator = ASI_PPGTT,
2325 .BatchBufferStartAddress = { &new_bbo->bo, 0 },
2326 );
2327
2328 /* Pad out to a 2-dword aligned boundary with zeros */
2329 if ((uintptr_t)batch->next % 8 != 0) {
2330 *(uint32_t *)batch->next = 0;
2331 batch->next += 4;
2332 }
2333
2334 anv_batch_bo_finish(cmd_buffer->last_batch_bo, batch);
2335
2336 new_bbo->prev_batch_bo = old_bbo;
2337 cmd_buffer->last_batch_bo = new_bbo;
2338
2339 anv_batch_bo_start(new_bbo, batch, GEN8_MI_BATCH_BUFFER_START_length * 4);
2340
2341 return VK_SUCCESS;
2342 }
2343
2344 VkResult anv_CreateCommandBuffer(
2345 VkDevice _device,
2346 const VkCmdBufferCreateInfo* pCreateInfo,
2347 VkCmdBuffer* pCmdBuffer)
2348 {
2349 struct anv_device *device = (struct anv_device *) _device;
2350 struct anv_cmd_buffer *cmd_buffer;
2351 VkResult result;
2352
2353 cmd_buffer = anv_device_alloc(device, sizeof(*cmd_buffer), 8,
2354 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
2355 if (cmd_buffer == NULL)
2356 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2357
2358 cmd_buffer->base.destructor = anv_cmd_buffer_destroy;
2359
2360 cmd_buffer->device = device;
2361 cmd_buffer->rs_state = NULL;
2362 cmd_buffer->vp_state = NULL;
2363 memset(&cmd_buffer->descriptors, 0, sizeof(cmd_buffer->descriptors));
2364
2365 result = anv_batch_bo_create(device, &cmd_buffer->last_batch_bo);
2366 if (result != VK_SUCCESS)
2367 goto fail;
2368
2369 result = anv_reloc_list_init(&cmd_buffer->batch.relocs, device);
2370 if (result != VK_SUCCESS)
2371 goto fail_batch_bo;
2372
2373 cmd_buffer->batch.device = device;
2374 cmd_buffer->batch.extend_cb = anv_cmd_buffer_chain_batch;
2375 cmd_buffer->batch.user_data = cmd_buffer;
2376
2377 anv_batch_bo_start(cmd_buffer->last_batch_bo, &cmd_buffer->batch,
2378 GEN8_MI_BATCH_BUFFER_START_length * 4);
2379
2380 result = anv_bo_pool_alloc(&device->batch_bo_pool, &cmd_buffer->surface_bo);
2381 if (result != VK_SUCCESS)
2382 goto fail_batch_relocs;
2383
2384 /* Start surface_next at 1 so surface offset 0 is invalid. */
2385 cmd_buffer->surface_next = 1;
2386 anv_reloc_list_init(&cmd_buffer->surface_relocs, device);
2387
2388 cmd_buffer->exec2_objects = NULL;
2389 cmd_buffer->exec2_bos = NULL;
2390 cmd_buffer->exec2_array_length = 0;
2391
2392 anv_state_stream_init(&cmd_buffer->binding_table_state_stream,
2393 &device->binding_table_block_pool);
2394 anv_state_stream_init(&cmd_buffer->surface_state_stream,
2395 &device->surface_state_block_pool);
2396 anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
2397 &device->dynamic_state_block_pool);
2398
2399 cmd_buffer->dirty = 0;
2400 cmd_buffer->vb_dirty = 0;
2401 cmd_buffer->pipeline = NULL;
2402 cmd_buffer->vp_state = NULL;
2403 cmd_buffer->rs_state = NULL;
2404 cmd_buffer->ds_state = NULL;
2405
2406 *pCmdBuffer = (VkCmdBuffer) cmd_buffer;
2407
2408 return VK_SUCCESS;
2409
2410 fail_batch_relocs:
2411 anv_reloc_list_finish(&cmd_buffer->batch.relocs, device);
2412 fail_batch_bo:
2413 anv_batch_bo_destroy(cmd_buffer->last_batch_bo, device);
2414 fail:
2415 anv_device_free(device, cmd_buffer);
2416
2417 return result;
2418 }
2419
2420 static void
2421 anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer)
2422 {
2423 struct anv_device *device = cmd_buffer->device;
2424
2425 anv_batch_emit(&cmd_buffer->batch, GEN8_STATE_BASE_ADDRESS,
2426 .GeneralStateBaseAddress = { NULL, 0 },
2427 .GeneralStateMemoryObjectControlState = GEN8_MOCS,
2428 .GeneralStateBaseAddressModifyEnable = true,
2429 .GeneralStateBufferSize = 0xfffff,
2430 .GeneralStateBufferSizeModifyEnable = true,
2431
2432 .SurfaceStateBaseAddress = { &cmd_buffer->surface_bo, 0 },
2433 .SurfaceStateMemoryObjectControlState = GEN8_MOCS,
2434 .SurfaceStateBaseAddressModifyEnable = true,
2435
2436 .DynamicStateBaseAddress = { &device->dynamic_state_block_pool.bo, 0 },
2437 .DynamicStateMemoryObjectControlState = GEN8_MOCS,
2438 .DynamicStateBaseAddressModifyEnable = true,
2439 .DynamicStateBufferSize = 0xfffff,
2440 .DynamicStateBufferSizeModifyEnable = true,
2441
2442 .IndirectObjectBaseAddress = { NULL, 0 },
2443 .IndirectObjectMemoryObjectControlState = GEN8_MOCS,
2444 .IndirectObjectBaseAddressModifyEnable = true,
2445 .IndirectObjectBufferSize = 0xfffff,
2446 .IndirectObjectBufferSizeModifyEnable = true,
2447
2448 .InstructionBaseAddress = { &device->instruction_block_pool.bo, 0 },
2449 .InstructionMemoryObjectControlState = GEN8_MOCS,
2450 .InstructionBaseAddressModifyEnable = true,
2451 .InstructionBufferSize = 0xfffff,
2452 .InstructionBuffersizeModifyEnable = true);
2453 }
2454
2455 VkResult anv_BeginCommandBuffer(
2456 VkCmdBuffer cmdBuffer,
2457 const VkCmdBufferBeginInfo* pBeginInfo)
2458 {
2459 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2460
2461 anv_batch_emit(&cmd_buffer->batch, GEN8_PIPELINE_SELECT,
2462 .PipelineSelection = _3D);
2463 anv_batch_emit(&cmd_buffer->batch, GEN8_STATE_SIP);
2464
2465 anv_cmd_buffer_emit_state_base_address(cmd_buffer);
2466
2467 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_VF_STATISTICS,
2468 .StatisticsEnable = true);
2469 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_HS, .Enable = false);
2470 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_TE, .TEEnable = false);
2471 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_DS, .FunctionEnable = false);
2472 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_STREAMOUT, .SOFunctionEnable = false);
2473
2474 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS,
2475 .ConstantBufferOffset = 0,
2476 .ConstantBufferSize = 4);
2477 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS,
2478 .ConstantBufferOffset = 4,
2479 .ConstantBufferSize = 4);
2480 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS,
2481 .ConstantBufferOffset = 8,
2482 .ConstantBufferSize = 4);
2483
2484 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_WM_CHROMAKEY,
2485 .ChromaKeyKillEnable = false);
2486 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_SBE_SWIZ);
2487 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_AA_LINE_PARAMETERS);
2488
2489 return VK_SUCCESS;
2490 }
2491
2492 static VkResult
2493 anv_cmd_buffer_add_bo(struct anv_cmd_buffer *cmd_buffer,
2494 struct anv_bo *bo,
2495 struct drm_i915_gem_relocation_entry *relocs,
2496 size_t num_relocs)
2497 {
2498 struct drm_i915_gem_exec_object2 *obj;
2499
2500 if (bo->index < cmd_buffer->bo_count &&
2501 cmd_buffer->exec2_bos[bo->index] == bo)
2502 return VK_SUCCESS;
2503
2504 if (cmd_buffer->bo_count >= cmd_buffer->exec2_array_length) {
2505 uint32_t new_len = cmd_buffer->exec2_objects ?
2506 cmd_buffer->exec2_array_length * 2 : 64;
2507
2508 struct drm_i915_gem_exec_object2 *new_objects =
2509 anv_device_alloc(cmd_buffer->device, new_len * sizeof(*new_objects),
2510 8, VK_SYSTEM_ALLOC_TYPE_INTERNAL);
2511 if (new_objects == NULL)
2512 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2513
2514 struct anv_bo **new_bos =
2515 anv_device_alloc(cmd_buffer->device, new_len * sizeof(*new_bos),
2516 8, VK_SYSTEM_ALLOC_TYPE_INTERNAL);
2517 if (new_objects == NULL) {
2518 anv_device_free(cmd_buffer->device, new_objects);
2519 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2520 }
2521
2522 if (cmd_buffer->exec2_objects) {
2523 memcpy(new_objects, cmd_buffer->exec2_objects,
2524 cmd_buffer->bo_count * sizeof(*new_objects));
2525 memcpy(new_bos, cmd_buffer->exec2_bos,
2526 cmd_buffer->bo_count * sizeof(*new_bos));
2527 }
2528
2529 cmd_buffer->exec2_objects = new_objects;
2530 cmd_buffer->exec2_bos = new_bos;
2531 cmd_buffer->exec2_array_length = new_len;
2532 }
2533
2534 assert(cmd_buffer->bo_count < cmd_buffer->exec2_array_length);
2535
2536 bo->index = cmd_buffer->bo_count++;
2537 obj = &cmd_buffer->exec2_objects[bo->index];
2538 cmd_buffer->exec2_bos[bo->index] = bo;
2539
2540 obj->handle = bo->gem_handle;
2541 obj->relocation_count = 0;
2542 obj->relocs_ptr = 0;
2543 obj->alignment = 0;
2544 obj->offset = bo->offset;
2545 obj->flags = 0;
2546 obj->rsvd1 = 0;
2547 obj->rsvd2 = 0;
2548
2549 if (relocs) {
2550 obj->relocation_count = num_relocs;
2551 obj->relocs_ptr = (uintptr_t) relocs;
2552 }
2553
2554 return VK_SUCCESS;
2555 }
2556
2557 static void
2558 anv_cmd_buffer_add_validate_bos(struct anv_cmd_buffer *cmd_buffer,
2559 struct anv_reloc_list *list)
2560 {
2561 for (size_t i = 0; i < list->num_relocs; i++)
2562 anv_cmd_buffer_add_bo(cmd_buffer, list->reloc_bos[i], NULL, 0);
2563 }
2564
2565 static void
2566 anv_cmd_buffer_process_relocs(struct anv_cmd_buffer *cmd_buffer,
2567 struct anv_reloc_list *list)
2568 {
2569 struct anv_bo *bo;
2570
2571 /* If the kernel supports I915_EXEC_NO_RELOC, it will compare offset in
2572 * struct drm_i915_gem_exec_object2 against the bos current offset and if
2573 * all bos haven't moved it will skip relocation processing alltogether.
2574 * If I915_EXEC_NO_RELOC is not supported, the kernel ignores the incoming
2575 * value of offset so we can set it either way. For that to work we need
2576 * to make sure all relocs use the same presumed offset.
2577 */
2578
2579 for (size_t i = 0; i < list->num_relocs; i++) {
2580 bo = list->reloc_bos[i];
2581 if (bo->offset != list->relocs[i].presumed_offset)
2582 cmd_buffer->need_reloc = true;
2583
2584 list->relocs[i].target_handle = bo->index;
2585 }
2586 }
2587
2588 VkResult anv_EndCommandBuffer(
2589 VkCmdBuffer cmdBuffer)
2590 {
2591 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2592 struct anv_device *device = cmd_buffer->device;
2593 struct anv_batch *batch = &cmd_buffer->batch;
2594
2595 anv_batch_emit(batch, GEN8_MI_BATCH_BUFFER_END);
2596
2597 /* Round batch up to an even number of dwords. */
2598 if ((batch->next - batch->start) & 4)
2599 anv_batch_emit(batch, GEN8_MI_NOOP);
2600
2601 anv_batch_bo_finish(cmd_buffer->last_batch_bo, &cmd_buffer->batch);
2602
2603 cmd_buffer->bo_count = 0;
2604 cmd_buffer->need_reloc = false;
2605
2606 /* Lock for access to bo->index. */
2607 pthread_mutex_lock(&device->mutex);
2608
2609 /* Add block pool bos first so we can add them with their relocs. */
2610 anv_cmd_buffer_add_bo(cmd_buffer, &cmd_buffer->surface_bo,
2611 cmd_buffer->surface_relocs.relocs,
2612 cmd_buffer->surface_relocs.num_relocs);
2613
2614 /* Add all of the BOs referenced by surface state */
2615 anv_cmd_buffer_add_validate_bos(cmd_buffer, &cmd_buffer->surface_relocs);
2616
2617 /* Add all but the first batch BO */
2618 struct anv_batch_bo *batch_bo = cmd_buffer->last_batch_bo;
2619 while (batch_bo->prev_batch_bo) {
2620 anv_cmd_buffer_add_bo(cmd_buffer, &batch_bo->bo,
2621 &batch->relocs.relocs[batch_bo->first_reloc],
2622 batch_bo->num_relocs);
2623 batch_bo = batch_bo->prev_batch_bo;
2624 }
2625
2626 /* Add everything referenced by the batches */
2627 anv_cmd_buffer_add_validate_bos(cmd_buffer, &batch->relocs);
2628
2629 /* Add the first batch bo last */
2630 assert(batch_bo->prev_batch_bo == NULL && batch_bo->first_reloc == 0);
2631 anv_cmd_buffer_add_bo(cmd_buffer, &batch_bo->bo,
2632 &batch->relocs.relocs[batch_bo->first_reloc],
2633 batch_bo->num_relocs);
2634 assert(batch_bo->bo.index == cmd_buffer->bo_count - 1);
2635
2636 anv_cmd_buffer_process_relocs(cmd_buffer, &cmd_buffer->surface_relocs);
2637 anv_cmd_buffer_process_relocs(cmd_buffer, &batch->relocs);
2638
2639 cmd_buffer->execbuf.buffers_ptr = (uintptr_t) cmd_buffer->exec2_objects;
2640 cmd_buffer->execbuf.buffer_count = cmd_buffer->bo_count;
2641 cmd_buffer->execbuf.batch_start_offset = 0;
2642 cmd_buffer->execbuf.batch_len = batch->next - batch->start;
2643 cmd_buffer->execbuf.cliprects_ptr = 0;
2644 cmd_buffer->execbuf.num_cliprects = 0;
2645 cmd_buffer->execbuf.DR1 = 0;
2646 cmd_buffer->execbuf.DR4 = 0;
2647
2648 cmd_buffer->execbuf.flags = I915_EXEC_HANDLE_LUT;
2649 if (!cmd_buffer->need_reloc)
2650 cmd_buffer->execbuf.flags |= I915_EXEC_NO_RELOC;
2651 cmd_buffer->execbuf.flags |= I915_EXEC_RENDER;
2652 cmd_buffer->execbuf.rsvd1 = device->context_id;
2653 cmd_buffer->execbuf.rsvd2 = 0;
2654
2655 pthread_mutex_unlock(&device->mutex);
2656
2657 return VK_SUCCESS;
2658 }
2659
2660 VkResult anv_ResetCommandBuffer(
2661 VkCmdBuffer cmdBuffer)
2662 {
2663 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2664
2665 /* Delete all but the first batch bo */
2666 while (cmd_buffer->last_batch_bo->prev_batch_bo) {
2667 struct anv_batch_bo *prev = cmd_buffer->last_batch_bo->prev_batch_bo;
2668 anv_batch_bo_destroy(cmd_buffer->last_batch_bo, cmd_buffer->device);
2669 cmd_buffer->last_batch_bo = prev;
2670 }
2671 assert(cmd_buffer->last_batch_bo->prev_batch_bo == NULL);
2672
2673 cmd_buffer->batch.relocs.num_relocs = 0;
2674 anv_batch_bo_start(cmd_buffer->last_batch_bo, &cmd_buffer->batch,
2675 GEN8_MI_BATCH_BUFFER_START_length * 4);
2676
2677 cmd_buffer->surface_next = 0;
2678 cmd_buffer->surface_relocs.num_relocs = 0;
2679
2680 return VK_SUCCESS;
2681 }
2682
2683 // Command buffer building functions
2684
2685 void anv_CmdBindPipeline(
2686 VkCmdBuffer cmdBuffer,
2687 VkPipelineBindPoint pipelineBindPoint,
2688 VkPipeline _pipeline)
2689 {
2690 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2691 struct anv_pipeline *pipeline = (struct anv_pipeline *) _pipeline;
2692
2693 cmd_buffer->pipeline = pipeline;
2694 cmd_buffer->vb_dirty |= pipeline->vb_used;
2695 cmd_buffer->dirty |= ANV_CMD_BUFFER_PIPELINE_DIRTY;
2696 }
2697
2698 void anv_CmdBindDynamicStateObject(
2699 VkCmdBuffer cmdBuffer,
2700 VkStateBindPoint stateBindPoint,
2701 VkDynamicStateObject dynamicState)
2702 {
2703 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2704 struct anv_dynamic_vp_state *vp_state;
2705
2706 switch (stateBindPoint) {
2707 case VK_STATE_BIND_POINT_VIEWPORT:
2708 vp_state = (struct anv_dynamic_vp_state *) dynamicState;
2709 /* We emit state immediately, but set cmd_buffer->vp_state to indicate
2710 * that vp state has been set in this command buffer. */
2711 cmd_buffer->vp_state = vp_state;
2712 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_SCISSOR_STATE_POINTERS,
2713 .ScissorRectPointer = vp_state->scissor.offset);
2714 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC,
2715 .CCViewportPointer = vp_state->cc_vp.offset);
2716 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP,
2717 .SFClipViewportPointer = vp_state->sf_clip_vp.offset);
2718 break;
2719 case VK_STATE_BIND_POINT_RASTER:
2720 cmd_buffer->rs_state = (struct anv_dynamic_rs_state *) dynamicState;
2721 cmd_buffer->dirty |= ANV_CMD_BUFFER_RS_DIRTY;
2722 break;
2723 case VK_STATE_BIND_POINT_COLOR_BLEND:
2724 cmd_buffer->cb_state = (struct anv_dynamic_cb_state *) dynamicState;
2725 cmd_buffer->dirty |= ANV_CMD_BUFFER_CB_DIRTY;
2726 break;
2727 case VK_STATE_BIND_POINT_DEPTH_STENCIL:
2728 cmd_buffer->ds_state = (struct anv_dynamic_ds_state *) dynamicState;
2729 cmd_buffer->dirty |= ANV_CMD_BUFFER_DS_DIRTY;
2730 break;
2731 default:
2732 break;
2733 };
2734 }
2735
2736 static struct anv_state
2737 anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer *cmd_buffer,
2738 uint32_t size, uint32_t alignment)
2739 {
2740 struct anv_state state;
2741
2742 state.offset = ALIGN_U32(cmd_buffer->surface_next, alignment);
2743 state.map = cmd_buffer->surface_bo.map + state.offset;
2744 state.alloc_size = size;
2745 cmd_buffer->surface_next = state.offset + size;
2746
2747 assert(state.offset + size < cmd_buffer->surface_bo.size);
2748
2749 return state;
2750 }
2751
2752 void anv_CmdBindDescriptorSets(
2753 VkCmdBuffer cmdBuffer,
2754 VkPipelineBindPoint pipelineBindPoint,
2755 uint32_t firstSet,
2756 uint32_t setCount,
2757 const VkDescriptorSet* pDescriptorSets,
2758 uint32_t dynamicOffsetCount,
2759 const uint32_t* pDynamicOffsets)
2760 {
2761 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2762 struct anv_pipeline_layout *layout = cmd_buffer->pipeline->layout;
2763 struct anv_descriptor_set *set;
2764 struct anv_descriptor_set_layout *set_layout;
2765
2766 assert(firstSet + setCount < MAX_SETS);
2767
2768 uint32_t dynamic_slot = 0;
2769 for (uint32_t i = 0; i < setCount; i++) {
2770 set = (struct anv_descriptor_set *) pDescriptorSets[i];
2771 set_layout = layout->set[firstSet + i].layout;
2772
2773 cmd_buffer->descriptors[firstSet + i].set = set;
2774
2775 assert(set_layout->num_dynamic_buffers <
2776 ARRAY_SIZE(cmd_buffer->descriptors[0].dynamic_offsets));
2777 memcpy(cmd_buffer->descriptors[firstSet + i].dynamic_offsets,
2778 pDynamicOffsets + dynamic_slot,
2779 set_layout->num_dynamic_buffers * sizeof(*pDynamicOffsets));
2780
2781 dynamic_slot += set_layout->num_dynamic_buffers;
2782 }
2783
2784 cmd_buffer->dirty |= ANV_CMD_BUFFER_DESCRIPTOR_SET_DIRTY;
2785 }
2786
2787 void anv_CmdBindIndexBuffer(
2788 VkCmdBuffer cmdBuffer,
2789 VkBuffer _buffer,
2790 VkDeviceSize offset,
2791 VkIndexType indexType)
2792 {
2793 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2794 struct anv_buffer *buffer = (struct anv_buffer *) _buffer;
2795
2796 static const uint32_t vk_to_gen_index_type[] = {
2797 [VK_INDEX_TYPE_UINT8] = INDEX_BYTE,
2798 [VK_INDEX_TYPE_UINT16] = INDEX_WORD,
2799 [VK_INDEX_TYPE_UINT32] = INDEX_DWORD,
2800 };
2801
2802 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_INDEX_BUFFER,
2803 .IndexFormat = vk_to_gen_index_type[indexType],
2804 .MemoryObjectControlState = GEN8_MOCS,
2805 .BufferStartingAddress = { buffer->bo, buffer->offset + offset },
2806 .BufferSize = buffer->size - offset);
2807 }
2808
2809 void anv_CmdBindVertexBuffers(
2810 VkCmdBuffer cmdBuffer,
2811 uint32_t startBinding,
2812 uint32_t bindingCount,
2813 const VkBuffer* pBuffers,
2814 const VkDeviceSize* pOffsets)
2815 {
2816 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2817 struct anv_vertex_binding *vb = cmd_buffer->vertex_bindings;
2818
2819 /* We have to defer setting up vertex buffer since we need the buffer
2820 * stride from the pipeline. */
2821
2822 assert(startBinding + bindingCount < MAX_VBS);
2823 for (uint32_t i = 0; i < bindingCount; i++) {
2824 vb[startBinding + i].buffer = (struct anv_buffer *) pBuffers[i];
2825 vb[startBinding + i].offset = pOffsets[i];
2826 cmd_buffer->vb_dirty |= 1 << (startBinding + i);
2827 }
2828 }
2829
2830 static void
2831 cmd_buffer_emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
2832 unsigned stage)
2833 {
2834 struct anv_pipeline_layout *layout = cmd_buffer->pipeline->layout;
2835 uint32_t color_attachments, bias, size;
2836 struct anv_state bt_state;
2837
2838 if (stage == VK_SHADER_STAGE_FRAGMENT) {
2839 bias = MAX_RTS;
2840 color_attachments = cmd_buffer->framebuffer->color_attachment_count;
2841 } else {
2842 bias = 0;
2843 color_attachments = 0;
2844 }
2845
2846 /* This is a little awkward: layout can be NULL but we still have to
2847 * allocate and set a binding table for the PS stage for render
2848 * targets. */
2849 uint32_t surface_count = layout ? layout->stage[stage].surface_count : 0;
2850
2851 if (color_attachments + surface_count == 0)
2852 return;
2853
2854 size = (bias + surface_count) * sizeof(uint32_t);
2855 bt_state = anv_cmd_buffer_alloc_surface_state(cmd_buffer, size, 32);
2856 uint32_t *bt_map = bt_state.map;
2857
2858 static const uint32_t binding_table_opcodes[] = {
2859 [VK_SHADER_STAGE_VERTEX] = 38,
2860 [VK_SHADER_STAGE_TESS_CONTROL] = 39,
2861 [VK_SHADER_STAGE_TESS_EVALUATION] = 40,
2862 [VK_SHADER_STAGE_GEOMETRY] = 41,
2863 [VK_SHADER_STAGE_FRAGMENT] = 42,
2864 [VK_SHADER_STAGE_COMPUTE] = 0,
2865 };
2866
2867 anv_batch_emit(&cmd_buffer->batch,
2868 GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS,
2869 ._3DCommandSubOpcode = binding_table_opcodes[stage],
2870 .PointertoVSBindingTable = bt_state.offset);
2871
2872 for (uint32_t ca = 0; ca < color_attachments; ca++) {
2873 const struct anv_surface_view *view =
2874 cmd_buffer->framebuffer->color_attachments[ca];
2875
2876 struct anv_state state =
2877 anv_cmd_buffer_alloc_surface_state(cmd_buffer, 64, 64);
2878
2879 memcpy(state.map, view->surface_state.map, 64);
2880
2881 /* The address goes in dwords 8 and 9 of the SURFACE_STATE */
2882 *(uint64_t *)(state.map + 8 * 4) =
2883 anv_reloc_list_add(&cmd_buffer->surface_relocs,
2884 cmd_buffer->device,
2885 state.offset + 8 * 4,
2886 view->bo, view->offset);
2887
2888 bt_map[ca] = state.offset;
2889 }
2890
2891 if (layout == NULL)
2892 return;
2893
2894 for (uint32_t set = 0; set < layout->num_sets; set++) {
2895 struct anv_descriptor_set_binding *d = &cmd_buffer->descriptors[set];
2896 struct anv_descriptor_set_layout *set_layout = layout->set[set].layout;
2897 struct anv_descriptor_slot *surface_slots =
2898 set_layout->stage[stage].surface_start;
2899
2900 uint32_t start = bias + layout->set[set].surface_start[stage];
2901
2902 for (uint32_t b = 0; b < set_layout->stage[stage].surface_count; b++) {
2903 struct anv_surface_view *view =
2904 d->set->descriptors[surface_slots[b].index].view;
2905
2906 struct anv_state state =
2907 anv_cmd_buffer_alloc_surface_state(cmd_buffer, 64, 64);
2908
2909 uint32_t offset;
2910 if (surface_slots[b].dynamic_slot >= 0) {
2911 uint32_t dynamic_offset =
2912 d->dynamic_offsets[surface_slots[b].dynamic_slot];
2913
2914 offset = view->offset + dynamic_offset;
2915 fill_buffer_surface_state(state.map, view->format, offset,
2916 view->range - dynamic_offset);
2917 } else {
2918 offset = view->offset;
2919 memcpy(state.map, view->surface_state.map, 64);
2920 }
2921
2922 /* The address goes in dwords 8 and 9 of the SURFACE_STATE */
2923 *(uint64_t *)(state.map + 8 * 4) =
2924 anv_reloc_list_add(&cmd_buffer->surface_relocs,
2925 cmd_buffer->device,
2926 state.offset + 8 * 4,
2927 view->bo, offset);
2928
2929 bt_map[start + b] = state.offset;
2930 }
2931 }
2932 }
2933
2934 static void
2935 cmd_buffer_emit_samplers(struct anv_cmd_buffer *cmd_buffer, unsigned stage)
2936 {
2937 struct anv_pipeline_layout *layout = cmd_buffer->pipeline->layout;
2938 struct anv_state state;
2939
2940 if (!layout)
2941 return;
2942
2943 uint32_t sampler_count = layout->stage[stage].sampler_count;
2944
2945 if (sampler_count == 0)
2946 return;
2947
2948 uint32_t size = sampler_count * 16;
2949 state = anv_state_stream_alloc(&cmd_buffer->dynamic_state_stream, size, 32);
2950
2951 static const uint32_t sampler_state_opcodes[] = {
2952 [VK_SHADER_STAGE_VERTEX] = 43,
2953 [VK_SHADER_STAGE_TESS_CONTROL] = 44, /* HS */
2954 [VK_SHADER_STAGE_TESS_EVALUATION] = 45, /* DS */
2955 [VK_SHADER_STAGE_GEOMETRY] = 46,
2956 [VK_SHADER_STAGE_FRAGMENT] = 47,
2957 [VK_SHADER_STAGE_COMPUTE] = 0,
2958 };
2959
2960 anv_batch_emit(&cmd_buffer->batch,
2961 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS,
2962 ._3DCommandSubOpcode = sampler_state_opcodes[stage],
2963 .PointertoVSSamplerState = state.offset);
2964
2965 for (uint32_t set = 0; set < layout->num_sets; set++) {
2966 struct anv_descriptor_set_binding *d = &cmd_buffer->descriptors[set];
2967 struct anv_descriptor_set_layout *set_layout = layout->set[set].layout;
2968 struct anv_descriptor_slot *sampler_slots =
2969 set_layout->stage[stage].sampler_start;
2970
2971 uint32_t start = layout->set[set].sampler_start[stage];
2972
2973 for (uint32_t b = 0; b < set_layout->stage[stage].sampler_count; b++) {
2974 struct anv_sampler *sampler =
2975 d->set->descriptors[sampler_slots[b].index].sampler;
2976
2977 if (!sampler)
2978 continue;
2979
2980 memcpy(state.map + (start + b) * 16,
2981 sampler->state, sizeof(sampler->state));
2982 }
2983 }
2984 }
2985
2986 static void
2987 flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer)
2988 {
2989 for (uint32_t s = 0; s < VK_NUM_SHADER_STAGE; s++) {
2990 cmd_buffer_emit_binding_table(cmd_buffer, s);
2991 cmd_buffer_emit_samplers(cmd_buffer, s);
2992 }
2993
2994 cmd_buffer->dirty &= ~ANV_CMD_BUFFER_DESCRIPTOR_SET_DIRTY;
2995 }
2996
2997 static struct anv_state
2998 anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
2999 uint32_t *a, uint32_t dwords, uint32_t alignment)
3000 {
3001 struct anv_device *device = cmd_buffer->device;
3002 struct anv_state state;
3003
3004 state = anv_state_pool_alloc(&device->dynamic_state_pool, dwords * 4, alignment);
3005 memcpy(state.map, a, dwords * 4);
3006
3007 return state;
3008 }
3009
3010 static struct anv_state
3011 anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
3012 uint32_t *a, uint32_t *b, uint32_t dwords, uint32_t alignment)
3013 {
3014 struct anv_device *device = cmd_buffer->device;
3015 struct anv_state state;
3016 uint32_t *p;
3017
3018 state = anv_state_pool_alloc(&device->dynamic_state_pool, dwords * 4, alignment);
3019 p = state.map;
3020 for (uint32_t i = 0; i < dwords; i++)
3021 p[i] = a[i] | b[i];
3022
3023 return state;
3024 }
3025
3026 static void
3027 anv_cmd_buffer_flush_state(struct anv_cmd_buffer *cmd_buffer)
3028 {
3029 struct anv_pipeline *pipeline = cmd_buffer->pipeline;
3030 uint32_t *p;
3031
3032 uint32_t vb_emit = cmd_buffer->vb_dirty & pipeline->vb_used;
3033
3034 if (vb_emit) {
3035 const uint32_t num_buffers = __builtin_popcount(vb_emit);
3036 const uint32_t num_dwords = 1 + num_buffers * 4;
3037
3038 p = anv_batch_emitn(&cmd_buffer->batch, num_dwords,
3039 GEN8_3DSTATE_VERTEX_BUFFERS);
3040 uint32_t vb, i = 0;
3041 for_each_bit(vb, vb_emit) {
3042 struct anv_buffer *buffer = cmd_buffer->vertex_bindings[vb].buffer;
3043 uint32_t offset = cmd_buffer->vertex_bindings[vb].offset;
3044
3045 struct GEN8_VERTEX_BUFFER_STATE state = {
3046 .VertexBufferIndex = vb,
3047 .MemoryObjectControlState = GEN8_MOCS,
3048 .AddressModifyEnable = true,
3049 .BufferPitch = pipeline->binding_stride[vb],
3050 .BufferStartingAddress = { buffer->bo, buffer->offset + offset },
3051 .BufferSize = buffer->size - offset
3052 };
3053
3054 GEN8_VERTEX_BUFFER_STATE_pack(&cmd_buffer->batch, &p[1 + i * 4], &state);
3055 i++;
3056 }
3057 }
3058
3059 if (cmd_buffer->dirty & ANV_CMD_BUFFER_PIPELINE_DIRTY)
3060 anv_batch_emit_batch(&cmd_buffer->batch, &pipeline->batch);
3061
3062 if (cmd_buffer->dirty & ANV_CMD_BUFFER_DESCRIPTOR_SET_DIRTY)
3063 flush_descriptor_sets(cmd_buffer);
3064
3065 if (cmd_buffer->dirty & (ANV_CMD_BUFFER_PIPELINE_DIRTY | ANV_CMD_BUFFER_RS_DIRTY)) {
3066 anv_batch_emit_merge(&cmd_buffer->batch,
3067 cmd_buffer->rs_state->state_sf, pipeline->state_sf);
3068 anv_batch_emit_merge(&cmd_buffer->batch,
3069 cmd_buffer->rs_state->state_raster, pipeline->state_raster);
3070 }
3071
3072 if (cmd_buffer->ds_state &&
3073 (cmd_buffer->dirty & (ANV_CMD_BUFFER_PIPELINE_DIRTY | ANV_CMD_BUFFER_DS_DIRTY)))
3074 anv_batch_emit_merge(&cmd_buffer->batch,
3075 cmd_buffer->ds_state->state_wm_depth_stencil,
3076 pipeline->state_wm_depth_stencil);
3077
3078 if (cmd_buffer->dirty & (ANV_CMD_BUFFER_CB_DIRTY | ANV_CMD_BUFFER_DS_DIRTY)) {
3079 struct anv_state state;
3080 if (cmd_buffer->ds_state == NULL)
3081 state = anv_cmd_buffer_emit_dynamic(cmd_buffer,
3082 cmd_buffer->cb_state->state_color_calc,
3083 GEN8_COLOR_CALC_STATE_length, 32);
3084 else if (cmd_buffer->cb_state == NULL)
3085 state = anv_cmd_buffer_emit_dynamic(cmd_buffer,
3086 cmd_buffer->ds_state->state_color_calc,
3087 GEN8_COLOR_CALC_STATE_length, 32);
3088 else
3089 state = anv_cmd_buffer_merge_dynamic(cmd_buffer,
3090 cmd_buffer->ds_state->state_color_calc,
3091 cmd_buffer->cb_state->state_color_calc,
3092 GEN8_COLOR_CALC_STATE_length, 32);
3093
3094 anv_batch_emit(&cmd_buffer->batch,
3095 GEN8_3DSTATE_CC_STATE_POINTERS,
3096 .ColorCalcStatePointer = state.offset,
3097 .ColorCalcStatePointerValid = true);
3098 }
3099
3100 cmd_buffer->vb_dirty &= ~vb_emit;
3101 cmd_buffer->dirty = 0;
3102 }
3103
3104 void anv_CmdDraw(
3105 VkCmdBuffer cmdBuffer,
3106 uint32_t firstVertex,
3107 uint32_t vertexCount,
3108 uint32_t firstInstance,
3109 uint32_t instanceCount)
3110 {
3111 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
3112
3113 anv_cmd_buffer_flush_state(cmd_buffer);
3114
3115 anv_batch_emit(&cmd_buffer->batch, GEN8_3DPRIMITIVE,
3116 .VertexAccessType = SEQUENTIAL,
3117 .VertexCountPerInstance = vertexCount,
3118 .StartVertexLocation = firstVertex,
3119 .InstanceCount = instanceCount,
3120 .StartInstanceLocation = firstInstance,
3121 .BaseVertexLocation = 0);
3122 }
3123
3124 void anv_CmdDrawIndexed(
3125 VkCmdBuffer cmdBuffer,
3126 uint32_t firstIndex,
3127 uint32_t indexCount,
3128 int32_t vertexOffset,
3129 uint32_t firstInstance,
3130 uint32_t instanceCount)
3131 {
3132 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
3133
3134 anv_cmd_buffer_flush_state(cmd_buffer);
3135
3136 anv_batch_emit(&cmd_buffer->batch, GEN8_3DPRIMITIVE,
3137 .VertexAccessType = RANDOM,
3138 .VertexCountPerInstance = indexCount,
3139 .StartVertexLocation = firstIndex,
3140 .InstanceCount = instanceCount,
3141 .StartInstanceLocation = firstInstance,
3142 .BaseVertexLocation = 0);
3143 }
3144
3145 static void
3146 anv_batch_lrm(struct anv_batch *batch,
3147 uint32_t reg, struct anv_bo *bo, uint32_t offset)
3148 {
3149 anv_batch_emit(batch, GEN8_MI_LOAD_REGISTER_MEM,
3150 .RegisterAddress = reg,
3151 .MemoryAddress = { bo, offset });
3152 }
3153
3154 static void
3155 anv_batch_lri(struct anv_batch *batch, uint32_t reg, uint32_t imm)
3156 {
3157 anv_batch_emit(batch, GEN8_MI_LOAD_REGISTER_IMM,
3158 .RegisterOffset = reg,
3159 .DataDWord = imm);
3160 }
3161
3162 /* Auto-Draw / Indirect Registers */
3163 #define GEN7_3DPRIM_END_OFFSET 0x2420
3164 #define GEN7_3DPRIM_START_VERTEX 0x2430
3165 #define GEN7_3DPRIM_VERTEX_COUNT 0x2434
3166 #define GEN7_3DPRIM_INSTANCE_COUNT 0x2438
3167 #define GEN7_3DPRIM_START_INSTANCE 0x243C
3168 #define GEN7_3DPRIM_BASE_VERTEX 0x2440
3169
3170 void anv_CmdDrawIndirect(
3171 VkCmdBuffer cmdBuffer,
3172 VkBuffer _buffer,
3173 VkDeviceSize offset,
3174 uint32_t count,
3175 uint32_t stride)
3176 {
3177 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
3178 struct anv_buffer *buffer = (struct anv_buffer *) _buffer;
3179 struct anv_bo *bo = buffer->bo;
3180 uint32_t bo_offset = buffer->offset + offset;
3181
3182 anv_cmd_buffer_flush_state(cmd_buffer);
3183
3184 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_VERTEX_COUNT, bo, bo_offset);
3185 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_INSTANCE_COUNT, bo, bo_offset + 4);
3186 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_START_VERTEX, bo, bo_offset + 8);
3187 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_START_INSTANCE, bo, bo_offset + 12);
3188 anv_batch_lri(&cmd_buffer->batch, GEN7_3DPRIM_BASE_VERTEX, 0);
3189
3190 anv_batch_emit(&cmd_buffer->batch, GEN8_3DPRIMITIVE,
3191 .IndirectParameterEnable = true,
3192 .VertexAccessType = SEQUENTIAL);
3193 }
3194
3195 void anv_CmdDrawIndexedIndirect(
3196 VkCmdBuffer cmdBuffer,
3197 VkBuffer _buffer,
3198 VkDeviceSize offset,
3199 uint32_t count,
3200 uint32_t stride)
3201 {
3202 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
3203 struct anv_buffer *buffer = (struct anv_buffer *) _buffer;
3204 struct anv_bo *bo = buffer->bo;
3205 uint32_t bo_offset = buffer->offset + offset;
3206
3207 anv_cmd_buffer_flush_state(cmd_buffer);
3208
3209 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_VERTEX_COUNT, bo, bo_offset);
3210 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_INSTANCE_COUNT, bo, bo_offset + 4);
3211 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_START_VERTEX, bo, bo_offset + 8);
3212 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_BASE_VERTEX, bo, bo_offset + 12);
3213 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_START_INSTANCE, bo, bo_offset + 16);
3214
3215 anv_batch_emit(&cmd_buffer->batch, GEN8_3DPRIMITIVE,
3216 .IndirectParameterEnable = true,
3217 .VertexAccessType = RANDOM);
3218 }
3219
3220 void anv_CmdDispatch(
3221 VkCmdBuffer cmdBuffer,
3222 uint32_t x,
3223 uint32_t y,
3224 uint32_t z)
3225 {
3226 stub();
3227 }
3228
3229 void anv_CmdDispatchIndirect(
3230 VkCmdBuffer cmdBuffer,
3231 VkBuffer buffer,
3232 VkDeviceSize offset)
3233 {
3234 stub();
3235 }
3236
3237 void anv_CmdSetEvent(
3238 VkCmdBuffer cmdBuffer,
3239 VkEvent event,
3240 VkPipeEvent pipeEvent)
3241 {
3242 stub();
3243 }
3244
3245 void anv_CmdResetEvent(
3246 VkCmdBuffer cmdBuffer,
3247 VkEvent event,
3248 VkPipeEvent pipeEvent)
3249 {
3250 stub();
3251 }
3252
3253 void anv_CmdWaitEvents(
3254 VkCmdBuffer cmdBuffer,
3255 VkWaitEvent waitEvent,
3256 uint32_t eventCount,
3257 const VkEvent* pEvents,
3258 uint32_t memBarrierCount,
3259 const void** ppMemBarriers)
3260 {
3261 stub();
3262 }
3263
3264 void anv_CmdPipelineBarrier(
3265 VkCmdBuffer cmdBuffer,
3266 VkWaitEvent waitEvent,
3267 uint32_t pipeEventCount,
3268 const VkPipeEvent* pPipeEvents,
3269 uint32_t memBarrierCount,
3270 const void** ppMemBarriers)
3271 {
3272 stub();
3273 }
3274
3275 static void
3276 anv_batch_emit_ps_depth_count(struct anv_batch *batch,
3277 struct anv_bo *bo, uint32_t offset)
3278 {
3279 anv_batch_emit(batch, GEN8_PIPE_CONTROL,
3280 .DestinationAddressType = DAT_PPGTT,
3281 .PostSyncOperation = WritePSDepthCount,
3282 .Address = { bo, offset }); /* FIXME: This is only lower 32 bits */
3283 }
3284
3285 void anv_CmdBeginQuery(
3286 VkCmdBuffer cmdBuffer,
3287 VkQueryPool queryPool,
3288 uint32_t slot,
3289 VkQueryControlFlags flags)
3290 {
3291 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
3292 struct anv_query_pool *pool = (struct anv_query_pool *) queryPool;
3293
3294 switch (pool->type) {
3295 case VK_QUERY_TYPE_OCCLUSION:
3296 anv_batch_emit_ps_depth_count(&cmd_buffer->batch, &pool->bo,
3297 slot * sizeof(struct anv_query_pool_slot));
3298 break;
3299
3300 case VK_QUERY_TYPE_PIPELINE_STATISTICS:
3301 default:
3302 unreachable("");
3303 }
3304 }
3305
3306 void anv_CmdEndQuery(
3307 VkCmdBuffer cmdBuffer,
3308 VkQueryPool queryPool,
3309 uint32_t slot)
3310 {
3311 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
3312 struct anv_query_pool *pool = (struct anv_query_pool *) queryPool;
3313
3314 switch (pool->type) {
3315 case VK_QUERY_TYPE_OCCLUSION:
3316 anv_batch_emit_ps_depth_count(&cmd_buffer->batch, &pool->bo,
3317 slot * sizeof(struct anv_query_pool_slot) + 8);
3318 break;
3319
3320 case VK_QUERY_TYPE_PIPELINE_STATISTICS:
3321 default:
3322 unreachable("");
3323 }
3324 }
3325
3326 void anv_CmdResetQueryPool(
3327 VkCmdBuffer cmdBuffer,
3328 VkQueryPool queryPool,
3329 uint32_t startQuery,
3330 uint32_t queryCount)
3331 {
3332 stub();
3333 }
3334
3335 #define TIMESTAMP 0x2358
3336
3337 void anv_CmdWriteTimestamp(
3338 VkCmdBuffer cmdBuffer,
3339 VkTimestampType timestampType,
3340 VkBuffer destBuffer,
3341 VkDeviceSize destOffset)
3342 {
3343 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
3344 struct anv_buffer *buffer = (struct anv_buffer *) destBuffer;
3345 struct anv_bo *bo = buffer->bo;
3346
3347 switch (timestampType) {
3348 case VK_TIMESTAMP_TYPE_TOP:
3349 anv_batch_emit(&cmd_buffer->batch, GEN8_MI_STORE_REGISTER_MEM,
3350 .RegisterAddress = TIMESTAMP,
3351 .MemoryAddress = { bo, buffer->offset + destOffset });
3352 anv_batch_emit(&cmd_buffer->batch, GEN8_MI_STORE_REGISTER_MEM,
3353 .RegisterAddress = TIMESTAMP + 4,
3354 .MemoryAddress = { bo, buffer->offset + destOffset + 4 });
3355 break;
3356
3357 case VK_TIMESTAMP_TYPE_BOTTOM:
3358 anv_batch_emit(&cmd_buffer->batch, GEN8_PIPE_CONTROL,
3359 .DestinationAddressType = DAT_PPGTT,
3360 .PostSyncOperation = WriteTimestamp,
3361 .Address = /* FIXME: This is only lower 32 bits */
3362 { bo, buffer->offset + destOffset });
3363 break;
3364
3365 default:
3366 break;
3367 }
3368 }
3369
3370 #define alu_opcode(v) __gen_field((v), 20, 31)
3371 #define alu_operand1(v) __gen_field((v), 10, 19)
3372 #define alu_operand2(v) __gen_field((v), 0, 9)
3373 #define alu(opcode, operand1, operand2) \
3374 alu_opcode(opcode) | alu_operand1(operand1) | alu_operand2(operand2)
3375
3376 #define OPCODE_NOOP 0x000
3377 #define OPCODE_LOAD 0x080
3378 #define OPCODE_LOADINV 0x480
3379 #define OPCODE_LOAD0 0x081
3380 #define OPCODE_LOAD1 0x481
3381 #define OPCODE_ADD 0x100
3382 #define OPCODE_SUB 0x101
3383 #define OPCODE_AND 0x102
3384 #define OPCODE_OR 0x103
3385 #define OPCODE_XOR 0x104
3386 #define OPCODE_STORE 0x180
3387 #define OPCODE_STOREINV 0x580
3388
3389 #define OPERAND_R0 0x00
3390 #define OPERAND_R1 0x01
3391 #define OPERAND_R2 0x02
3392 #define OPERAND_R3 0x03
3393 #define OPERAND_R4 0x04
3394 #define OPERAND_SRCA 0x20
3395 #define OPERAND_SRCB 0x21
3396 #define OPERAND_ACCU 0x31
3397 #define OPERAND_ZF 0x32
3398 #define OPERAND_CF 0x33
3399
3400 #define CS_GPR(n) (0x2600 + (n) * 8)
3401
3402 static void
3403 emit_load_alu_reg_u64(struct anv_batch *batch, uint32_t reg,
3404 struct anv_bo *bo, uint32_t offset)
3405 {
3406 anv_batch_emit(batch, GEN8_MI_LOAD_REGISTER_MEM,
3407 .RegisterAddress = reg,
3408 .MemoryAddress = { bo, offset });
3409 anv_batch_emit(batch, GEN8_MI_LOAD_REGISTER_MEM,
3410 .RegisterAddress = reg + 4,
3411 .MemoryAddress = { bo, offset + 4 });
3412 }
3413
3414 void anv_CmdCopyQueryPoolResults(
3415 VkCmdBuffer cmdBuffer,
3416 VkQueryPool queryPool,
3417 uint32_t startQuery,
3418 uint32_t queryCount,
3419 VkBuffer destBuffer,
3420 VkDeviceSize destOffset,
3421 VkDeviceSize destStride,
3422 VkQueryResultFlags flags)
3423 {
3424 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
3425 struct anv_query_pool *pool = (struct anv_query_pool *) queryPool;
3426 struct anv_buffer *buffer = (struct anv_buffer *) destBuffer;
3427 uint32_t slot_offset, dst_offset;
3428
3429 if (flags & VK_QUERY_RESULT_WITH_AVAILABILITY_BIT) {
3430 /* Where is the availabilty info supposed to go? */
3431 anv_finishme("VK_QUERY_RESULT_WITH_AVAILABILITY_BIT");
3432 return;
3433 }
3434
3435 assert(pool->type == VK_QUERY_TYPE_OCCLUSION);
3436
3437 /* FIXME: If we're not waiting, should we just do this on the CPU? */
3438 if (flags & VK_QUERY_RESULT_WAIT_BIT)
3439 anv_batch_emit(&cmd_buffer->batch, GEN8_PIPE_CONTROL,
3440 .CommandStreamerStallEnable = true,
3441 .StallAtPixelScoreboard = true);
3442
3443 dst_offset = buffer->offset + destOffset;
3444 for (uint32_t i = 0; i < queryCount; i++) {
3445
3446 slot_offset = (startQuery + i) * sizeof(struct anv_query_pool_slot);
3447
3448 emit_load_alu_reg_u64(&cmd_buffer->batch, CS_GPR(0), &pool->bo, slot_offset);
3449 emit_load_alu_reg_u64(&cmd_buffer->batch, CS_GPR(1), &pool->bo, slot_offset + 8);
3450
3451 /* FIXME: We need to clamp the result for 32 bit. */
3452
3453 uint32_t *dw = anv_batch_emitn(&cmd_buffer->batch, 5, GEN8_MI_MATH);
3454 dw[1] = alu(OPCODE_LOAD, OPERAND_SRCA, OPERAND_R1);
3455 dw[2] = alu(OPCODE_LOAD, OPERAND_SRCB, OPERAND_R0);
3456 dw[3] = alu(OPCODE_SUB, 0, 0);
3457 dw[4] = alu(OPCODE_STORE, OPERAND_R2, OPERAND_ACCU);
3458
3459 anv_batch_emit(&cmd_buffer->batch, GEN8_MI_STORE_REGISTER_MEM,
3460 .RegisterAddress = CS_GPR(2),
3461 /* FIXME: This is only lower 32 bits */
3462 .MemoryAddress = { buffer->bo, dst_offset });
3463
3464 if (flags & VK_QUERY_RESULT_64_BIT)
3465 anv_batch_emit(&cmd_buffer->batch, GEN8_MI_STORE_REGISTER_MEM,
3466 .RegisterAddress = CS_GPR(2) + 4,
3467 /* FIXME: This is only lower 32 bits */
3468 .MemoryAddress = { buffer->bo, dst_offset + 4 });
3469
3470 dst_offset += destStride;
3471 }
3472 }
3473
3474 void anv_CmdInitAtomicCounters(
3475 VkCmdBuffer cmdBuffer,
3476 VkPipelineBindPoint pipelineBindPoint,
3477 uint32_t startCounter,
3478 uint32_t counterCount,
3479 const uint32_t* pData)
3480 {
3481 stub();
3482 }
3483
3484 void anv_CmdLoadAtomicCounters(
3485 VkCmdBuffer cmdBuffer,
3486 VkPipelineBindPoint pipelineBindPoint,
3487 uint32_t startCounter,
3488 uint32_t counterCount,
3489 VkBuffer srcBuffer,
3490 VkDeviceSize srcOffset)
3491 {
3492 stub();
3493 }
3494
3495 void anv_CmdSaveAtomicCounters(
3496 VkCmdBuffer cmdBuffer,
3497 VkPipelineBindPoint pipelineBindPoint,
3498 uint32_t startCounter,
3499 uint32_t counterCount,
3500 VkBuffer destBuffer,
3501 VkDeviceSize destOffset)
3502 {
3503 stub();
3504 }
3505
3506 static void
3507 anv_framebuffer_destroy(struct anv_device *device,
3508 struct anv_object *object,
3509 VkObjectType obj_type)
3510 {
3511 struct anv_framebuffer *fb = (struct anv_framebuffer *)object;
3512
3513 assert(obj_type == VK_OBJECT_TYPE_FRAMEBUFFER);
3514
3515 anv_DestroyObject((VkDevice) device,
3516 VK_OBJECT_TYPE_DYNAMIC_VP_STATE,
3517 fb->vp_state);
3518
3519 anv_device_free(device, fb);
3520 }
3521
3522 VkResult anv_CreateFramebuffer(
3523 VkDevice _device,
3524 const VkFramebufferCreateInfo* pCreateInfo,
3525 VkFramebuffer* pFramebuffer)
3526 {
3527 struct anv_device *device = (struct anv_device *) _device;
3528 struct anv_framebuffer *framebuffer;
3529
3530 static const struct anv_depth_stencil_view null_view =
3531 { .depth_format = D16_UNORM, .depth_stride = 0, .stencil_stride = 0 };
3532
3533 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO);
3534
3535 framebuffer = anv_device_alloc(device, sizeof(*framebuffer), 8,
3536 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
3537 if (framebuffer == NULL)
3538 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
3539
3540 framebuffer->base.destructor = anv_framebuffer_destroy;
3541
3542 framebuffer->color_attachment_count = pCreateInfo->colorAttachmentCount;
3543 for (uint32_t i = 0; i < pCreateInfo->colorAttachmentCount; i++) {
3544 framebuffer->color_attachments[i] =
3545 (struct anv_surface_view *) pCreateInfo->pColorAttachments[i].view;
3546 }
3547
3548 if (pCreateInfo->pDepthStencilAttachment) {
3549 framebuffer->depth_stencil =
3550 (struct anv_depth_stencil_view *) pCreateInfo->pDepthStencilAttachment->view;
3551 } else {
3552 framebuffer->depth_stencil = &null_view;
3553 }
3554
3555 framebuffer->sample_count = pCreateInfo->sampleCount;
3556 framebuffer->width = pCreateInfo->width;
3557 framebuffer->height = pCreateInfo->height;
3558 framebuffer->layers = pCreateInfo->layers;
3559
3560 vkCreateDynamicViewportState((VkDevice) device,
3561 &(VkDynamicVpStateCreateInfo) {
3562 .sType = VK_STRUCTURE_TYPE_DYNAMIC_VP_STATE_CREATE_INFO,
3563 .viewportAndScissorCount = 1,
3564 .pViewports = (VkViewport[]) {
3565 {
3566 .originX = 0,
3567 .originY = 0,
3568 .width = pCreateInfo->width,
3569 .height = pCreateInfo->height,
3570 .minDepth = 0,
3571 .maxDepth = 1
3572 },
3573 },
3574 .pScissors = (VkRect[]) {
3575 { { 0, 0 },
3576 { pCreateInfo->width, pCreateInfo->height } },
3577 }
3578 },
3579 &framebuffer->vp_state);
3580
3581 *pFramebuffer = (VkFramebuffer) framebuffer;
3582
3583 return VK_SUCCESS;
3584 }
3585
3586 VkResult anv_CreateRenderPass(
3587 VkDevice _device,
3588 const VkRenderPassCreateInfo* pCreateInfo,
3589 VkRenderPass* pRenderPass)
3590 {
3591 struct anv_device *device = (struct anv_device *) _device;
3592 struct anv_render_pass *pass;
3593 size_t size;
3594
3595 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO);
3596
3597 size = sizeof(*pass) +
3598 pCreateInfo->layers * sizeof(struct anv_render_pass_layer);
3599 pass = anv_device_alloc(device, size, 8,
3600 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
3601 if (pass == NULL)
3602 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
3603
3604 pass->render_area = pCreateInfo->renderArea;
3605
3606 pass->num_layers = pCreateInfo->layers;
3607
3608 pass->num_clear_layers = 0;
3609 for (uint32_t i = 0; i < pCreateInfo->layers; i++) {
3610 pass->layers[i].color_load_op = pCreateInfo->pColorLoadOps[i];
3611 pass->layers[i].clear_color = pCreateInfo->pColorLoadClearValues[i];
3612 if (pass->layers[i].color_load_op == VK_ATTACHMENT_LOAD_OP_CLEAR)
3613 pass->num_clear_layers++;
3614 }
3615
3616 *pRenderPass = (VkRenderPass) pass;
3617
3618 return VK_SUCCESS;
3619 }
3620
3621 static void
3622 anv_cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer *cmd_buffer,
3623 struct anv_render_pass *pass)
3624 {
3625 const struct anv_depth_stencil_view *view =
3626 cmd_buffer->framebuffer->depth_stencil;
3627
3628 /* FIXME: Implement the PMA stall W/A */
3629
3630 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_DEPTH_BUFFER,
3631 .SurfaceType = SURFTYPE_2D,
3632 .DepthWriteEnable = view->depth_stride > 0,
3633 .StencilWriteEnable = view->stencil_stride > 0,
3634 .HierarchicalDepthBufferEnable = false,
3635 .SurfaceFormat = view->depth_format,
3636 .SurfacePitch = view->depth_stride > 0 ? view->depth_stride - 1 : 0,
3637 .SurfaceBaseAddress = { view->bo, view->depth_offset },
3638 .Height = pass->render_area.extent.height - 1,
3639 .Width = pass->render_area.extent.width - 1,
3640 .LOD = 0,
3641 .Depth = 1 - 1,
3642 .MinimumArrayElement = 0,
3643 .DepthBufferObjectControlState = GEN8_MOCS,
3644 .RenderTargetViewExtent = 1 - 1,
3645 .SurfaceQPitch = 0);
3646
3647 /* Disable hierarchial depth buffers. */
3648 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_HIER_DEPTH_BUFFER);
3649
3650 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_STENCIL_BUFFER,
3651 .StencilBufferEnable = view->stencil_stride > 0,
3652 .StencilBufferObjectControlState = GEN8_MOCS,
3653 .SurfacePitch = view->stencil_stride > 0 ? view->stencil_stride - 1 : 0,
3654 .SurfaceBaseAddress = { view->bo, view->stencil_offset },
3655 .SurfaceQPitch = 0);
3656
3657 /* Clear the clear params. */
3658 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_CLEAR_PARAMS);
3659 }
3660
3661 void anv_CmdBeginRenderPass(
3662 VkCmdBuffer cmdBuffer,
3663 const VkRenderPassBegin* pRenderPassBegin)
3664 {
3665 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
3666 struct anv_render_pass *pass = (struct anv_render_pass *) pRenderPassBegin->renderPass;
3667 struct anv_framebuffer *framebuffer =
3668 (struct anv_framebuffer *) pRenderPassBegin->framebuffer;
3669
3670 cmd_buffer->framebuffer = framebuffer;
3671
3672 cmd_buffer->dirty |= ANV_CMD_BUFFER_DESCRIPTOR_SET_DIRTY;
3673
3674 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_DRAWING_RECTANGLE,
3675 .ClippedDrawingRectangleYMin = pass->render_area.offset.y,
3676 .ClippedDrawingRectangleXMin = pass->render_area.offset.x,
3677 .ClippedDrawingRectangleYMax =
3678 pass->render_area.offset.y + pass->render_area.extent.height - 1,
3679 .ClippedDrawingRectangleXMax =
3680 pass->render_area.offset.x + pass->render_area.extent.width - 1,
3681 .DrawingRectangleOriginY = 0,
3682 .DrawingRectangleOriginX = 0);
3683
3684 anv_cmd_buffer_emit_depth_stencil(cmd_buffer, pass);
3685
3686 anv_cmd_buffer_clear(cmd_buffer, pass);
3687 }
3688
3689 void anv_CmdEndRenderPass(
3690 VkCmdBuffer cmdBuffer,
3691 VkRenderPass renderPass)
3692 {
3693 /* Emit a flushing pipe control at the end of a pass. This is kind of a
3694 * hack but it ensures that render targets always actually get written.
3695 * Eventually, we should do flushing based on image format transitions
3696 * or something of that nature.
3697 */
3698 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *)cmdBuffer;
3699 anv_batch_emit(&cmd_buffer->batch, GEN8_PIPE_CONTROL,
3700 .PostSyncOperation = NoWrite,
3701 .RenderTargetCacheFlushEnable = true,
3702 .InstructionCacheInvalidateEnable = true,
3703 .DepthCacheFlushEnable = true,
3704 .VFCacheInvalidationEnable = true,
3705 .TextureCacheInvalidationEnable = true,
3706 .CommandStreamerStallEnable = true);
3707 }
3708
3709 void vkCmdDbgMarkerBegin(
3710 VkCmdBuffer cmdBuffer,
3711 const char* pMarker)
3712 __attribute__ ((visibility ("default")));
3713
3714 void vkCmdDbgMarkerEnd(
3715 VkCmdBuffer cmdBuffer)
3716 __attribute__ ((visibility ("default")));
3717
3718 VkResult vkDbgSetObjectTag(
3719 VkDevice device,
3720 VkObject object,
3721 size_t tagSize,
3722 const void* pTag)
3723 __attribute__ ((visibility ("default")));
3724
3725
3726 void vkCmdDbgMarkerBegin(
3727 VkCmdBuffer cmdBuffer,
3728 const char* pMarker)
3729 {
3730 }
3731
3732 void vkCmdDbgMarkerEnd(
3733 VkCmdBuffer cmdBuffer)
3734 {
3735 }
3736
3737 VkResult vkDbgSetObjectTag(
3738 VkDevice device,
3739 VkObject object,
3740 size_t tagSize,
3741 const void* pTag)
3742 {
3743 return VK_SUCCESS;
3744 }