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Merge branch 'nir-spirv' into vulkan
[mesa.git] / src / vulkan / gen75_pack.h
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24
25 /* Instructions, enums and structures for HSW.
26 *
27 * This file has been generated, do not hand edit.
28 */
29
30 #pragma once
31
32 #include <stdio.h>
33 #include <assert.h>
34
35 #ifndef __gen_validate_value
36 #define __gen_validate_value(x)
37 #endif
38
39 #ifndef __gen_field_functions
40 #define __gen_field_functions
41
42 union __gen_value {
43 float f;
44 uint32_t dw;
45 };
46
47 static inline uint64_t
48 __gen_mbo(uint32_t start, uint32_t end)
49 {
50 return (~0ul >> (64 - (end - start + 1))) << start;
51 }
52
53 static inline uint64_t
54 __gen_field(uint64_t v, uint32_t start, uint32_t end)
55 {
56 __gen_validate_value(v);
57 #if DEBUG
58 if (end - start + 1 < 64)
59 assert(v < 1ul << (end - start + 1));
60 #endif
61
62 return v << start;
63 }
64
65 static inline uint64_t
66 __gen_offset(uint64_t v, uint32_t start, uint32_t end)
67 {
68 __gen_validate_value(v);
69 #if DEBUG
70 uint64_t mask = (~0ul >> (64 - (end - start + 1))) << start;
71
72 assert((v & ~mask) == 0);
73 #endif
74
75 return v;
76 }
77
78 static inline uint32_t
79 __gen_float(float v)
80 {
81 __gen_validate_value(v);
82 return ((union __gen_value) { .f = (v) }).dw;
83 }
84
85 #ifndef __gen_address_type
86 #error #define __gen_address_type before including this file
87 #endif
88
89 #ifndef __gen_user_data
90 #error #define __gen_combine_address before including this file
91 #endif
92
93 #endif
94
95 #define GEN75_3DSTATE_URB_VS_length_bias 0x00000002
96 #define GEN75_3DSTATE_URB_VS_header \
97 .CommandType = 3, \
98 .CommandSubType = 3, \
99 ._3DCommandOpcode = 0, \
100 ._3DCommandSubOpcode = 48, \
101 .DwordLength = 0
102
103 #define GEN75_3DSTATE_URB_VS_length 0x00000002
104
105 struct GEN75_3DSTATE_URB_VS {
106 uint32_t CommandType;
107 uint32_t CommandSubType;
108 uint32_t _3DCommandOpcode;
109 uint32_t _3DCommandSubOpcode;
110 uint32_t DwordLength;
111 uint32_t VSURBStartingAddress;
112 uint32_t VSURBEntryAllocationSize;
113 uint32_t VSNumberofURBEntries;
114 };
115
116 static inline void
117 GEN75_3DSTATE_URB_VS_pack(__gen_user_data *data, void * restrict dst,
118 const struct GEN75_3DSTATE_URB_VS * restrict values)
119 {
120 uint32_t *dw = (uint32_t * restrict) dst;
121
122 dw[0] =
123 __gen_field(values->CommandType, 29, 31) |
124 __gen_field(values->CommandSubType, 27, 28) |
125 __gen_field(values->_3DCommandOpcode, 24, 26) |
126 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
127 __gen_field(values->DwordLength, 0, 7) |
128 0;
129
130 dw[1] =
131 __gen_field(values->VSURBStartingAddress, 25, 30) |
132 __gen_field(values->VSURBEntryAllocationSize, 16, 24) |
133 __gen_field(values->VSNumberofURBEntries, 0, 15) |
134 0;
135
136 }
137
138 #define GEN75_GPGPU_CSR_BASE_ADDRESS_length_bias 0x00000002
139 #define GEN75_GPGPU_CSR_BASE_ADDRESS_header \
140 .CommandType = 3, \
141 .CommandSubType = 0, \
142 ._3DCommandOpcode = 1, \
143 ._3DCommandSubOpcode = 4, \
144 .DwordLength = 0
145
146 #define GEN75_GPGPU_CSR_BASE_ADDRESS_length 0x00000002
147
148 struct GEN75_GPGPU_CSR_BASE_ADDRESS {
149 uint32_t CommandType;
150 uint32_t CommandSubType;
151 uint32_t _3DCommandOpcode;
152 uint32_t _3DCommandSubOpcode;
153 uint32_t DwordLength;
154 __gen_address_type GPGPUCSRBaseAddress;
155 };
156
157 static inline void
158 GEN75_GPGPU_CSR_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
159 const struct GEN75_GPGPU_CSR_BASE_ADDRESS * restrict values)
160 {
161 uint32_t *dw = (uint32_t * restrict) dst;
162
163 dw[0] =
164 __gen_field(values->CommandType, 29, 31) |
165 __gen_field(values->CommandSubType, 27, 28) |
166 __gen_field(values->_3DCommandOpcode, 24, 26) |
167 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
168 __gen_field(values->DwordLength, 0, 7) |
169 0;
170
171 uint32_t dw1 =
172 0;
173
174 dw[1] =
175 __gen_combine_address(data, &dw[1], values->GPGPUCSRBaseAddress, dw1);
176
177 }
178
179 #define GEN75_MI_STORE_REGISTER_MEM_length_bias 0x00000002
180 #define GEN75_MI_STORE_REGISTER_MEM_header \
181 .CommandType = 0, \
182 .MICommandOpcode = 36, \
183 .DwordLength = 1
184
185 #define GEN75_MI_STORE_REGISTER_MEM_length 0x00000003
186
187 struct GEN75_MI_STORE_REGISTER_MEM {
188 uint32_t CommandType;
189 uint32_t MICommandOpcode;
190 bool UseGlobalGTT;
191 uint32_t PredicateEnable;
192 uint32_t DwordLength;
193 uint32_t RegisterAddress;
194 __gen_address_type MemoryAddress;
195 };
196
197 static inline void
198 GEN75_MI_STORE_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
199 const struct GEN75_MI_STORE_REGISTER_MEM * restrict values)
200 {
201 uint32_t *dw = (uint32_t * restrict) dst;
202
203 dw[0] =
204 __gen_field(values->CommandType, 29, 31) |
205 __gen_field(values->MICommandOpcode, 23, 28) |
206 __gen_field(values->UseGlobalGTT, 22, 22) |
207 __gen_field(values->PredicateEnable, 21, 21) |
208 __gen_field(values->DwordLength, 0, 7) |
209 0;
210
211 dw[1] =
212 __gen_offset(values->RegisterAddress, 2, 22) |
213 0;
214
215 uint32_t dw2 =
216 0;
217
218 dw[2] =
219 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
220
221 }
222
223 #define GEN75_PIPELINE_SELECT_length_bias 0x00000001
224 #define GEN75_PIPELINE_SELECT_header \
225 .CommandType = 3, \
226 .CommandSubType = 1, \
227 ._3DCommandOpcode = 1, \
228 ._3DCommandSubOpcode = 4
229
230 #define GEN75_PIPELINE_SELECT_length 0x00000001
231
232 struct GEN75_PIPELINE_SELECT {
233 uint32_t CommandType;
234 uint32_t CommandSubType;
235 uint32_t _3DCommandOpcode;
236 uint32_t _3DCommandSubOpcode;
237 #define _3D 0
238 #define Media 1
239 #define GPGPU 2
240 uint32_t PipelineSelection;
241 };
242
243 static inline void
244 GEN75_PIPELINE_SELECT_pack(__gen_user_data *data, void * restrict dst,
245 const struct GEN75_PIPELINE_SELECT * restrict values)
246 {
247 uint32_t *dw = (uint32_t * restrict) dst;
248
249 dw[0] =
250 __gen_field(values->CommandType, 29, 31) |
251 __gen_field(values->CommandSubType, 27, 28) |
252 __gen_field(values->_3DCommandOpcode, 24, 26) |
253 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
254 __gen_field(values->PipelineSelection, 0, 1) |
255 0;
256
257 }
258
259 #define GEN75_STATE_BASE_ADDRESS_length_bias 0x00000002
260 #define GEN75_STATE_BASE_ADDRESS_header \
261 .CommandType = 3, \
262 .CommandSubType = 0, \
263 ._3DCommandOpcode = 1, \
264 ._3DCommandSubOpcode = 1, \
265 .DwordLength = 8
266
267 #define GEN75_STATE_BASE_ADDRESS_length 0x0000000a
268
269 #define GEN75_MEMORY_OBJECT_CONTROL_STATE_length 0x00000001
270
271 struct GEN75_MEMORY_OBJECT_CONTROL_STATE {
272 uint32_t LLCeLLCCacheabilityControlLLCCC;
273 uint32_t L3CacheabilityControlL3CC;
274 };
275
276 static inline void
277 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(__gen_user_data *data, void * restrict dst,
278 const struct GEN75_MEMORY_OBJECT_CONTROL_STATE * restrict values)
279 {
280 uint32_t *dw = (uint32_t * restrict) dst;
281
282 dw[0] =
283 __gen_field(values->LLCeLLCCacheabilityControlLLCCC, 1, 2) |
284 __gen_field(values->L3CacheabilityControlL3CC, 0, 0) |
285 0;
286
287 }
288
289 struct GEN75_STATE_BASE_ADDRESS {
290 uint32_t CommandType;
291 uint32_t CommandSubType;
292 uint32_t _3DCommandOpcode;
293 uint32_t _3DCommandSubOpcode;
294 uint32_t DwordLength;
295 __gen_address_type GeneralStateBaseAddress;
296 struct GEN75_MEMORY_OBJECT_CONTROL_STATE GeneralStateMemoryObjectControlState;
297 struct GEN75_MEMORY_OBJECT_CONTROL_STATE StatelessDataPortAccessMemoryObjectControlState;
298 bool GeneralStateBaseAddressModifyEnable;
299 __gen_address_type SurfaceStateBaseAddress;
300 struct GEN75_MEMORY_OBJECT_CONTROL_STATE SurfaceStateMemoryObjectControlState;
301 bool SurfaceStateBaseAddressModifyEnable;
302 __gen_address_type DynamicStateBaseAddress;
303 struct GEN75_MEMORY_OBJECT_CONTROL_STATE DynamicStateMemoryObjectControlState;
304 bool DynamicStateBaseAddressModifyEnable;
305 __gen_address_type IndirectObjectBaseAddress;
306 struct GEN75_MEMORY_OBJECT_CONTROL_STATE IndirectObjectMemoryObjectControlState;
307 bool IndirectObjectBaseAddressModifyEnable;
308 __gen_address_type InstructionBaseAddress;
309 struct GEN75_MEMORY_OBJECT_CONTROL_STATE InstructionMemoryObjectControlState;
310 bool InstructionBaseAddressModifyEnable;
311 __gen_address_type GeneralStateAccessUpperBound;
312 bool GeneralStateAccessUpperBoundModifyEnable;
313 __gen_address_type DynamicStateAccessUpperBound;
314 bool DynamicStateAccessUpperBoundModifyEnable;
315 __gen_address_type IndirectObjectAccessUpperBound;
316 bool IndirectObjectAccessUpperBoundModifyEnable;
317 __gen_address_type InstructionAccessUpperBound;
318 bool InstructionAccessUpperBoundModifyEnable;
319 };
320
321 static inline void
322 GEN75_STATE_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
323 const struct GEN75_STATE_BASE_ADDRESS * restrict values)
324 {
325 uint32_t *dw = (uint32_t * restrict) dst;
326
327 dw[0] =
328 __gen_field(values->CommandType, 29, 31) |
329 __gen_field(values->CommandSubType, 27, 28) |
330 __gen_field(values->_3DCommandOpcode, 24, 26) |
331 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
332 __gen_field(values->DwordLength, 0, 7) |
333 0;
334
335 uint32_t dw_GeneralStateMemoryObjectControlState;
336 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_GeneralStateMemoryObjectControlState, &values->GeneralStateMemoryObjectControlState);
337 uint32_t dw_StatelessDataPortAccessMemoryObjectControlState;
338 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StatelessDataPortAccessMemoryObjectControlState, &values->StatelessDataPortAccessMemoryObjectControlState);
339 uint32_t dw1 =
340 __gen_field(dw_GeneralStateMemoryObjectControlState, 8, 11) |
341 __gen_field(dw_StatelessDataPortAccessMemoryObjectControlState, 4, 7) |
342 __gen_field(values->GeneralStateBaseAddressModifyEnable, 0, 0) |
343 0;
344
345 dw[1] =
346 __gen_combine_address(data, &dw[1], values->GeneralStateBaseAddress, dw1);
347
348 uint32_t dw_SurfaceStateMemoryObjectControlState;
349 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceStateMemoryObjectControlState, &values->SurfaceStateMemoryObjectControlState);
350 uint32_t dw2 =
351 __gen_field(dw_SurfaceStateMemoryObjectControlState, 8, 11) |
352 __gen_field(values->SurfaceStateBaseAddressModifyEnable, 0, 0) |
353 0;
354
355 dw[2] =
356 __gen_combine_address(data, &dw[2], values->SurfaceStateBaseAddress, dw2);
357
358 uint32_t dw_DynamicStateMemoryObjectControlState;
359 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DynamicStateMemoryObjectControlState, &values->DynamicStateMemoryObjectControlState);
360 uint32_t dw3 =
361 __gen_field(dw_DynamicStateMemoryObjectControlState, 8, 11) |
362 __gen_field(values->DynamicStateBaseAddressModifyEnable, 0, 0) |
363 0;
364
365 dw[3] =
366 __gen_combine_address(data, &dw[3], values->DynamicStateBaseAddress, dw3);
367
368 uint32_t dw_IndirectObjectMemoryObjectControlState;
369 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_IndirectObjectMemoryObjectControlState, &values->IndirectObjectMemoryObjectControlState);
370 uint32_t dw4 =
371 __gen_field(dw_IndirectObjectMemoryObjectControlState, 8, 11) |
372 __gen_field(values->IndirectObjectBaseAddressModifyEnable, 0, 0) |
373 0;
374
375 dw[4] =
376 __gen_combine_address(data, &dw[4], values->IndirectObjectBaseAddress, dw4);
377
378 uint32_t dw_InstructionMemoryObjectControlState;
379 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_InstructionMemoryObjectControlState, &values->InstructionMemoryObjectControlState);
380 uint32_t dw5 =
381 __gen_field(dw_InstructionMemoryObjectControlState, 8, 11) |
382 __gen_field(values->InstructionBaseAddressModifyEnable, 0, 0) |
383 0;
384
385 dw[5] =
386 __gen_combine_address(data, &dw[5], values->InstructionBaseAddress, dw5);
387
388 uint32_t dw6 =
389 __gen_field(values->GeneralStateAccessUpperBoundModifyEnable, 0, 0) |
390 0;
391
392 dw[6] =
393 __gen_combine_address(data, &dw[6], values->GeneralStateAccessUpperBound, dw6);
394
395 uint32_t dw7 =
396 __gen_field(values->DynamicStateAccessUpperBoundModifyEnable, 0, 0) |
397 0;
398
399 dw[7] =
400 __gen_combine_address(data, &dw[7], values->DynamicStateAccessUpperBound, dw7);
401
402 uint32_t dw8 =
403 __gen_field(values->IndirectObjectAccessUpperBoundModifyEnable, 0, 0) |
404 0;
405
406 dw[8] =
407 __gen_combine_address(data, &dw[8], values->IndirectObjectAccessUpperBound, dw8);
408
409 uint32_t dw9 =
410 __gen_field(values->InstructionAccessUpperBoundModifyEnable, 0, 0) |
411 0;
412
413 dw[9] =
414 __gen_combine_address(data, &dw[9], values->InstructionAccessUpperBound, dw9);
415
416 }
417
418 #define GEN75_STATE_PREFETCH_length_bias 0x00000002
419 #define GEN75_STATE_PREFETCH_header \
420 .CommandType = 3, \
421 .CommandSubType = 0, \
422 ._3DCommandOpcode = 0, \
423 ._3DCommandSubOpcode = 3, \
424 .DwordLength = 0
425
426 #define GEN75_STATE_PREFETCH_length 0x00000002
427
428 struct GEN75_STATE_PREFETCH {
429 uint32_t CommandType;
430 uint32_t CommandSubType;
431 uint32_t _3DCommandOpcode;
432 uint32_t _3DCommandSubOpcode;
433 uint32_t DwordLength;
434 __gen_address_type PrefetchPointer;
435 uint32_t PrefetchCount;
436 };
437
438 static inline void
439 GEN75_STATE_PREFETCH_pack(__gen_user_data *data, void * restrict dst,
440 const struct GEN75_STATE_PREFETCH * restrict values)
441 {
442 uint32_t *dw = (uint32_t * restrict) dst;
443
444 dw[0] =
445 __gen_field(values->CommandType, 29, 31) |
446 __gen_field(values->CommandSubType, 27, 28) |
447 __gen_field(values->_3DCommandOpcode, 24, 26) |
448 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
449 __gen_field(values->DwordLength, 0, 7) |
450 0;
451
452 uint32_t dw1 =
453 __gen_field(values->PrefetchCount, 0, 2) |
454 0;
455
456 dw[1] =
457 __gen_combine_address(data, &dw[1], values->PrefetchPointer, dw1);
458
459 }
460
461 #define GEN75_STATE_SIP_length_bias 0x00000002
462 #define GEN75_STATE_SIP_header \
463 .CommandType = 3, \
464 .CommandSubType = 0, \
465 ._3DCommandOpcode = 1, \
466 ._3DCommandSubOpcode = 2, \
467 .DwordLength = 0
468
469 #define GEN75_STATE_SIP_length 0x00000002
470
471 struct GEN75_STATE_SIP {
472 uint32_t CommandType;
473 uint32_t CommandSubType;
474 uint32_t _3DCommandOpcode;
475 uint32_t _3DCommandSubOpcode;
476 uint32_t DwordLength;
477 uint32_t SystemInstructionPointer;
478 };
479
480 static inline void
481 GEN75_STATE_SIP_pack(__gen_user_data *data, void * restrict dst,
482 const struct GEN75_STATE_SIP * restrict values)
483 {
484 uint32_t *dw = (uint32_t * restrict) dst;
485
486 dw[0] =
487 __gen_field(values->CommandType, 29, 31) |
488 __gen_field(values->CommandSubType, 27, 28) |
489 __gen_field(values->_3DCommandOpcode, 24, 26) |
490 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
491 __gen_field(values->DwordLength, 0, 7) |
492 0;
493
494 dw[1] =
495 __gen_offset(values->SystemInstructionPointer, 4, 31) |
496 0;
497
498 }
499
500 #define GEN75_SWTESS_BASE_ADDRESS_length_bias 0x00000002
501 #define GEN75_SWTESS_BASE_ADDRESS_header \
502 .CommandType = 3, \
503 .CommandSubType = 0, \
504 ._3DCommandOpcode = 1, \
505 ._3DCommandSubOpcode = 3, \
506 .DwordLength = 0
507
508 #define GEN75_SWTESS_BASE_ADDRESS_length 0x00000002
509
510 struct GEN75_SWTESS_BASE_ADDRESS {
511 uint32_t CommandType;
512 uint32_t CommandSubType;
513 uint32_t _3DCommandOpcode;
514 uint32_t _3DCommandSubOpcode;
515 uint32_t DwordLength;
516 __gen_address_type SWTessellationBaseAddress;
517 struct GEN75_MEMORY_OBJECT_CONTROL_STATE SWTessellationMemoryObjectControlState;
518 };
519
520 static inline void
521 GEN75_SWTESS_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
522 const struct GEN75_SWTESS_BASE_ADDRESS * restrict values)
523 {
524 uint32_t *dw = (uint32_t * restrict) dst;
525
526 dw[0] =
527 __gen_field(values->CommandType, 29, 31) |
528 __gen_field(values->CommandSubType, 27, 28) |
529 __gen_field(values->_3DCommandOpcode, 24, 26) |
530 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
531 __gen_field(values->DwordLength, 0, 7) |
532 0;
533
534 uint32_t dw_SWTessellationMemoryObjectControlState;
535 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SWTessellationMemoryObjectControlState, &values->SWTessellationMemoryObjectControlState);
536 uint32_t dw1 =
537 __gen_field(dw_SWTessellationMemoryObjectControlState, 8, 11) |
538 0;
539
540 dw[1] =
541 __gen_combine_address(data, &dw[1], values->SWTessellationBaseAddress, dw1);
542
543 }
544
545 #define GEN75_3DPRIMITIVE_length_bias 0x00000002
546 #define GEN75_3DPRIMITIVE_header \
547 .CommandType = 3, \
548 .CommandSubType = 3, \
549 ._3DCommandOpcode = 3, \
550 ._3DCommandSubOpcode = 0, \
551 .DwordLength = 5
552
553 #define GEN75_3DPRIMITIVE_length 0x00000007
554
555 struct GEN75_3DPRIMITIVE {
556 uint32_t CommandType;
557 uint32_t CommandSubType;
558 uint32_t _3DCommandOpcode;
559 uint32_t _3DCommandSubOpcode;
560 bool IndirectParameterEnable;
561 uint32_t UAVCoherencyRequired;
562 bool PredicateEnable;
563 uint32_t DwordLength;
564 bool EndOffsetEnable;
565 #define SEQUENTIAL 0
566 #define RANDOM 1
567 uint32_t VertexAccessType;
568 uint32_t PrimitiveTopologyType;
569 uint32_t VertexCountPerInstance;
570 uint32_t StartVertexLocation;
571 uint32_t InstanceCount;
572 uint32_t StartInstanceLocation;
573 uint32_t BaseVertexLocation;
574 };
575
576 static inline void
577 GEN75_3DPRIMITIVE_pack(__gen_user_data *data, void * restrict dst,
578 const struct GEN75_3DPRIMITIVE * restrict values)
579 {
580 uint32_t *dw = (uint32_t * restrict) dst;
581
582 dw[0] =
583 __gen_field(values->CommandType, 29, 31) |
584 __gen_field(values->CommandSubType, 27, 28) |
585 __gen_field(values->_3DCommandOpcode, 24, 26) |
586 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
587 __gen_field(values->IndirectParameterEnable, 10, 10) |
588 __gen_field(values->UAVCoherencyRequired, 9, 9) |
589 __gen_field(values->PredicateEnable, 8, 8) |
590 __gen_field(values->DwordLength, 0, 7) |
591 0;
592
593 dw[1] =
594 __gen_field(values->EndOffsetEnable, 9, 9) |
595 __gen_field(values->VertexAccessType, 8, 8) |
596 __gen_field(values->PrimitiveTopologyType, 0, 5) |
597 0;
598
599 dw[2] =
600 __gen_field(values->VertexCountPerInstance, 0, 31) |
601 0;
602
603 dw[3] =
604 __gen_field(values->StartVertexLocation, 0, 31) |
605 0;
606
607 dw[4] =
608 __gen_field(values->InstanceCount, 0, 31) |
609 0;
610
611 dw[5] =
612 __gen_field(values->StartInstanceLocation, 0, 31) |
613 0;
614
615 dw[6] =
616 __gen_field(values->BaseVertexLocation, 0, 31) |
617 0;
618
619 }
620
621 #define GEN75_3DSTATE_AA_LINE_PARAMETERS_length_bias 0x00000002
622 #define GEN75_3DSTATE_AA_LINE_PARAMETERS_header \
623 .CommandType = 3, \
624 .CommandSubType = 3, \
625 ._3DCommandOpcode = 1, \
626 ._3DCommandSubOpcode = 10, \
627 .DwordLength = 1
628
629 #define GEN75_3DSTATE_AA_LINE_PARAMETERS_length 0x00000003
630
631 struct GEN75_3DSTATE_AA_LINE_PARAMETERS {
632 uint32_t CommandType;
633 uint32_t CommandSubType;
634 uint32_t _3DCommandOpcode;
635 uint32_t _3DCommandSubOpcode;
636 uint32_t DwordLength;
637 float AACoverageBias;
638 float AACoverageSlope;
639 float AACoverageEndCapBias;
640 float AACoverageEndCapSlope;
641 };
642
643 static inline void
644 GEN75_3DSTATE_AA_LINE_PARAMETERS_pack(__gen_user_data *data, void * restrict dst,
645 const struct GEN75_3DSTATE_AA_LINE_PARAMETERS * restrict values)
646 {
647 uint32_t *dw = (uint32_t * restrict) dst;
648
649 dw[0] =
650 __gen_field(values->CommandType, 29, 31) |
651 __gen_field(values->CommandSubType, 27, 28) |
652 __gen_field(values->_3DCommandOpcode, 24, 26) |
653 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
654 __gen_field(values->DwordLength, 0, 7) |
655 0;
656
657 dw[1] =
658 __gen_field(values->AACoverageBias * (1 << 8), 16, 23) |
659 __gen_field(values->AACoverageSlope * (1 << 8), 0, 7) |
660 0;
661
662 dw[2] =
663 __gen_field(values->AACoverageEndCapBias * (1 << 8), 16, 23) |
664 __gen_field(values->AACoverageEndCapSlope * (1 << 8), 0, 7) |
665 0;
666
667 }
668
669 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_length_bias 0x00000002
670 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_header\
671 .CommandType = 3, \
672 .CommandSubType = 3, \
673 ._3DCommandOpcode = 0, \
674 ._3DCommandSubOpcode = 70
675
676 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_length 0x00000000
677
678 #define GEN75_BINDING_TABLE_EDIT_ENTRY_length 0x00000001
679
680 struct GEN75_BINDING_TABLE_EDIT_ENTRY {
681 uint32_t BindingTableIndex;
682 uint32_t SurfaceStatePointer;
683 };
684
685 static inline void
686 GEN75_BINDING_TABLE_EDIT_ENTRY_pack(__gen_user_data *data, void * restrict dst,
687 const struct GEN75_BINDING_TABLE_EDIT_ENTRY * restrict values)
688 {
689 uint32_t *dw = (uint32_t * restrict) dst;
690
691 dw[0] =
692 __gen_field(values->BindingTableIndex, 16, 23) |
693 __gen_offset(values->SurfaceStatePointer, 0, 15) |
694 0;
695
696 }
697
698 struct GEN75_3DSTATE_BINDING_TABLE_EDIT_DS {
699 uint32_t CommandType;
700 uint32_t CommandSubType;
701 uint32_t _3DCommandOpcode;
702 uint32_t _3DCommandSubOpcode;
703 uint32_t DwordLength;
704 uint32_t BindingTableBlockClear;
705 #define AllCores 3
706 #define Core1 2
707 #define Core0 1
708 uint32_t BindingTableEditTarget;
709 /* variable length fields follow */
710 };
711
712 static inline void
713 GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_pack(__gen_user_data *data, void * restrict dst,
714 const struct GEN75_3DSTATE_BINDING_TABLE_EDIT_DS * restrict values)
715 {
716 uint32_t *dw = (uint32_t * restrict) dst;
717
718 dw[0] =
719 __gen_field(values->CommandType, 29, 31) |
720 __gen_field(values->CommandSubType, 27, 28) |
721 __gen_field(values->_3DCommandOpcode, 24, 26) |
722 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
723 __gen_field(values->DwordLength, 0, 8) |
724 0;
725
726 dw[1] =
727 __gen_field(values->BindingTableBlockClear, 16, 31) |
728 __gen_field(values->BindingTableEditTarget, 0, 1) |
729 0;
730
731 /* variable length fields follow */
732 }
733
734 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_length_bias 0x00000002
735 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_header\
736 .CommandType = 3, \
737 .CommandSubType = 3, \
738 ._3DCommandOpcode = 0, \
739 ._3DCommandSubOpcode = 68
740
741 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_length 0x00000000
742
743 struct GEN75_3DSTATE_BINDING_TABLE_EDIT_GS {
744 uint32_t CommandType;
745 uint32_t CommandSubType;
746 uint32_t _3DCommandOpcode;
747 uint32_t _3DCommandSubOpcode;
748 uint32_t DwordLength;
749 uint32_t BindingTableBlockClear;
750 #define AllCores 3
751 #define Core1 2
752 #define Core0 1
753 uint32_t BindingTableEditTarget;
754 /* variable length fields follow */
755 };
756
757 static inline void
758 GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_pack(__gen_user_data *data, void * restrict dst,
759 const struct GEN75_3DSTATE_BINDING_TABLE_EDIT_GS * restrict values)
760 {
761 uint32_t *dw = (uint32_t * restrict) dst;
762
763 dw[0] =
764 __gen_field(values->CommandType, 29, 31) |
765 __gen_field(values->CommandSubType, 27, 28) |
766 __gen_field(values->_3DCommandOpcode, 24, 26) |
767 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
768 __gen_field(values->DwordLength, 0, 8) |
769 0;
770
771 dw[1] =
772 __gen_field(values->BindingTableBlockClear, 16, 31) |
773 __gen_field(values->BindingTableEditTarget, 0, 1) |
774 0;
775
776 /* variable length fields follow */
777 }
778
779 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_length_bias 0x00000002
780 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_header\
781 .CommandType = 3, \
782 .CommandSubType = 3, \
783 ._3DCommandOpcode = 0, \
784 ._3DCommandSubOpcode = 69
785
786 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_length 0x00000000
787
788 struct GEN75_3DSTATE_BINDING_TABLE_EDIT_HS {
789 uint32_t CommandType;
790 uint32_t CommandSubType;
791 uint32_t _3DCommandOpcode;
792 uint32_t _3DCommandSubOpcode;
793 uint32_t DwordLength;
794 uint32_t BindingTableBlockClear;
795 #define AllCores 3
796 #define Core1 2
797 #define Core0 1
798 uint32_t BindingTableEditTarget;
799 /* variable length fields follow */
800 };
801
802 static inline void
803 GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_pack(__gen_user_data *data, void * restrict dst,
804 const struct GEN75_3DSTATE_BINDING_TABLE_EDIT_HS * restrict values)
805 {
806 uint32_t *dw = (uint32_t * restrict) dst;
807
808 dw[0] =
809 __gen_field(values->CommandType, 29, 31) |
810 __gen_field(values->CommandSubType, 27, 28) |
811 __gen_field(values->_3DCommandOpcode, 24, 26) |
812 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
813 __gen_field(values->DwordLength, 0, 8) |
814 0;
815
816 dw[1] =
817 __gen_field(values->BindingTableBlockClear, 16, 31) |
818 __gen_field(values->BindingTableEditTarget, 0, 1) |
819 0;
820
821 /* variable length fields follow */
822 }
823
824 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_length_bias 0x00000002
825 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_header\
826 .CommandType = 3, \
827 .CommandSubType = 3, \
828 ._3DCommandOpcode = 0, \
829 ._3DCommandSubOpcode = 71
830
831 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_length 0x00000000
832
833 struct GEN75_3DSTATE_BINDING_TABLE_EDIT_PS {
834 uint32_t CommandType;
835 uint32_t CommandSubType;
836 uint32_t _3DCommandOpcode;
837 uint32_t _3DCommandSubOpcode;
838 uint32_t DwordLength;
839 uint32_t BindingTableBlockClear;
840 #define AllCores 3
841 #define Core1 2
842 #define Core0 1
843 uint32_t BindingTableEditTarget;
844 /* variable length fields follow */
845 };
846
847 static inline void
848 GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_pack(__gen_user_data *data, void * restrict dst,
849 const struct GEN75_3DSTATE_BINDING_TABLE_EDIT_PS * restrict values)
850 {
851 uint32_t *dw = (uint32_t * restrict) dst;
852
853 dw[0] =
854 __gen_field(values->CommandType, 29, 31) |
855 __gen_field(values->CommandSubType, 27, 28) |
856 __gen_field(values->_3DCommandOpcode, 24, 26) |
857 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
858 __gen_field(values->DwordLength, 0, 8) |
859 0;
860
861 dw[1] =
862 __gen_field(values->BindingTableBlockClear, 16, 31) |
863 __gen_field(values->BindingTableEditTarget, 0, 1) |
864 0;
865
866 /* variable length fields follow */
867 }
868
869 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_length_bias 0x00000002
870 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_header\
871 .CommandType = 3, \
872 .CommandSubType = 3, \
873 ._3DCommandOpcode = 0, \
874 ._3DCommandSubOpcode = 67
875
876 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_length 0x00000000
877
878 struct GEN75_3DSTATE_BINDING_TABLE_EDIT_VS {
879 uint32_t CommandType;
880 uint32_t CommandSubType;
881 uint32_t _3DCommandOpcode;
882 uint32_t _3DCommandSubOpcode;
883 uint32_t DwordLength;
884 uint32_t BindingTableBlockClear;
885 #define AllCores 3
886 #define Core1 2
887 #define Core0 1
888 uint32_t BindingTableEditTarget;
889 /* variable length fields follow */
890 };
891
892 static inline void
893 GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_pack(__gen_user_data *data, void * restrict dst,
894 const struct GEN75_3DSTATE_BINDING_TABLE_EDIT_VS * restrict values)
895 {
896 uint32_t *dw = (uint32_t * restrict) dst;
897
898 dw[0] =
899 __gen_field(values->CommandType, 29, 31) |
900 __gen_field(values->CommandSubType, 27, 28) |
901 __gen_field(values->_3DCommandOpcode, 24, 26) |
902 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
903 __gen_field(values->DwordLength, 0, 8) |
904 0;
905
906 dw[1] =
907 __gen_field(values->BindingTableBlockClear, 16, 31) |
908 __gen_field(values->BindingTableEditTarget, 0, 1) |
909 0;
910
911 /* variable length fields follow */
912 }
913
914 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_length_bias 0x00000002
915 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_header\
916 .CommandType = 3, \
917 .CommandSubType = 3, \
918 ._3DCommandOpcode = 0, \
919 ._3DCommandSubOpcode = 40, \
920 .DwordLength = 0
921
922 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_length 0x00000002
923
924 struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS {
925 uint32_t CommandType;
926 uint32_t CommandSubType;
927 uint32_t _3DCommandOpcode;
928 uint32_t _3DCommandSubOpcode;
929 uint32_t DwordLength;
930 uint32_t PointertoDSBindingTable;
931 };
932
933 static inline void
934 GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
935 const struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS * restrict values)
936 {
937 uint32_t *dw = (uint32_t * restrict) dst;
938
939 dw[0] =
940 __gen_field(values->CommandType, 29, 31) |
941 __gen_field(values->CommandSubType, 27, 28) |
942 __gen_field(values->_3DCommandOpcode, 24, 26) |
943 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
944 __gen_field(values->DwordLength, 0, 7) |
945 0;
946
947 dw[1] =
948 __gen_offset(values->PointertoDSBindingTable, 5, 15) |
949 0;
950
951 }
952
953 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_length_bias 0x00000002
954 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_header\
955 .CommandType = 3, \
956 .CommandSubType = 3, \
957 ._3DCommandOpcode = 0, \
958 ._3DCommandSubOpcode = 41, \
959 .DwordLength = 0
960
961 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_length 0x00000002
962
963 struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS {
964 uint32_t CommandType;
965 uint32_t CommandSubType;
966 uint32_t _3DCommandOpcode;
967 uint32_t _3DCommandSubOpcode;
968 uint32_t DwordLength;
969 uint32_t PointertoGSBindingTable;
970 };
971
972 static inline void
973 GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
974 const struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS * restrict values)
975 {
976 uint32_t *dw = (uint32_t * restrict) dst;
977
978 dw[0] =
979 __gen_field(values->CommandType, 29, 31) |
980 __gen_field(values->CommandSubType, 27, 28) |
981 __gen_field(values->_3DCommandOpcode, 24, 26) |
982 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
983 __gen_field(values->DwordLength, 0, 7) |
984 0;
985
986 dw[1] =
987 __gen_offset(values->PointertoGSBindingTable, 5, 15) |
988 0;
989
990 }
991
992 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_length_bias 0x00000002
993 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_header\
994 .CommandType = 3, \
995 .CommandSubType = 3, \
996 ._3DCommandOpcode = 0, \
997 ._3DCommandSubOpcode = 39, \
998 .DwordLength = 0
999
1000 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_length 0x00000002
1001
1002 struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS {
1003 uint32_t CommandType;
1004 uint32_t CommandSubType;
1005 uint32_t _3DCommandOpcode;
1006 uint32_t _3DCommandSubOpcode;
1007 uint32_t DwordLength;
1008 uint32_t PointertoHSBindingTable;
1009 };
1010
1011 static inline void
1012 GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
1013 const struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS * restrict values)
1014 {
1015 uint32_t *dw = (uint32_t * restrict) dst;
1016
1017 dw[0] =
1018 __gen_field(values->CommandType, 29, 31) |
1019 __gen_field(values->CommandSubType, 27, 28) |
1020 __gen_field(values->_3DCommandOpcode, 24, 26) |
1021 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1022 __gen_field(values->DwordLength, 0, 7) |
1023 0;
1024
1025 dw[1] =
1026 __gen_offset(values->PointertoHSBindingTable, 5, 15) |
1027 0;
1028
1029 }
1030
1031 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_length_bias 0x00000002
1032 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_header\
1033 .CommandType = 3, \
1034 .CommandSubType = 3, \
1035 ._3DCommandOpcode = 0, \
1036 ._3DCommandSubOpcode = 42, \
1037 .DwordLength = 0
1038
1039 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_length 0x00000002
1040
1041 struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS {
1042 uint32_t CommandType;
1043 uint32_t CommandSubType;
1044 uint32_t _3DCommandOpcode;
1045 uint32_t _3DCommandSubOpcode;
1046 uint32_t DwordLength;
1047 uint32_t PointertoPSBindingTable;
1048 };
1049
1050 static inline void
1051 GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
1052 const struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS * restrict values)
1053 {
1054 uint32_t *dw = (uint32_t * restrict) dst;
1055
1056 dw[0] =
1057 __gen_field(values->CommandType, 29, 31) |
1058 __gen_field(values->CommandSubType, 27, 28) |
1059 __gen_field(values->_3DCommandOpcode, 24, 26) |
1060 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1061 __gen_field(values->DwordLength, 0, 7) |
1062 0;
1063
1064 dw[1] =
1065 __gen_offset(values->PointertoPSBindingTable, 5, 15) |
1066 0;
1067
1068 }
1069
1070 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_length_bias 0x00000002
1071 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_header\
1072 .CommandType = 3, \
1073 .CommandSubType = 3, \
1074 ._3DCommandOpcode = 0, \
1075 ._3DCommandSubOpcode = 38, \
1076 .DwordLength = 0
1077
1078 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_length 0x00000002
1079
1080 struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS {
1081 uint32_t CommandType;
1082 uint32_t CommandSubType;
1083 uint32_t _3DCommandOpcode;
1084 uint32_t _3DCommandSubOpcode;
1085 uint32_t DwordLength;
1086 uint32_t PointertoVSBindingTable;
1087 };
1088
1089 static inline void
1090 GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
1091 const struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS * restrict values)
1092 {
1093 uint32_t *dw = (uint32_t * restrict) dst;
1094
1095 dw[0] =
1096 __gen_field(values->CommandType, 29, 31) |
1097 __gen_field(values->CommandSubType, 27, 28) |
1098 __gen_field(values->_3DCommandOpcode, 24, 26) |
1099 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1100 __gen_field(values->DwordLength, 0, 7) |
1101 0;
1102
1103 dw[1] =
1104 __gen_offset(values->PointertoVSBindingTable, 5, 15) |
1105 0;
1106
1107 }
1108
1109 #define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_length_bias 0x00000002
1110 #define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_header\
1111 .CommandType = 3, \
1112 .CommandSubType = 3, \
1113 ._3DCommandOpcode = 1, \
1114 ._3DCommandSubOpcode = 25, \
1115 .DwordLength = 1
1116
1117 #define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_length 0x00000003
1118
1119 struct GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC {
1120 uint32_t CommandType;
1121 uint32_t CommandSubType;
1122 uint32_t _3DCommandOpcode;
1123 uint32_t _3DCommandSubOpcode;
1124 uint32_t DwordLength;
1125 __gen_address_type BindingTablePoolBaseAddress;
1126 uint32_t BindingTablePoolEnable;
1127 struct GEN75_MEMORY_OBJECT_CONTROL_STATE SurfaceObjectControlState;
1128 __gen_address_type BindingTablePoolUpperBound;
1129 };
1130
1131 static inline void
1132 GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_pack(__gen_user_data *data, void * restrict dst,
1133 const struct GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC * restrict values)
1134 {
1135 uint32_t *dw = (uint32_t * restrict) dst;
1136
1137 dw[0] =
1138 __gen_field(values->CommandType, 29, 31) |
1139 __gen_field(values->CommandSubType, 27, 28) |
1140 __gen_field(values->_3DCommandOpcode, 24, 26) |
1141 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1142 __gen_field(values->DwordLength, 0, 7) |
1143 0;
1144
1145 uint32_t dw_SurfaceObjectControlState;
1146 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceObjectControlState, &values->SurfaceObjectControlState);
1147 uint32_t dw1 =
1148 __gen_field(values->BindingTablePoolEnable, 11, 11) |
1149 __gen_field(dw_SurfaceObjectControlState, 7, 10) |
1150 0;
1151
1152 dw[1] =
1153 __gen_combine_address(data, &dw[1], values->BindingTablePoolBaseAddress, dw1);
1154
1155 uint32_t dw2 =
1156 0;
1157
1158 dw[2] =
1159 __gen_combine_address(data, &dw[2], values->BindingTablePoolUpperBound, dw2);
1160
1161 }
1162
1163 #define GEN75_3DSTATE_BLEND_STATE_POINTERS_length_bias 0x00000002
1164 #define GEN75_3DSTATE_BLEND_STATE_POINTERS_header\
1165 .CommandType = 3, \
1166 .CommandSubType = 3, \
1167 ._3DCommandOpcode = 0, \
1168 ._3DCommandSubOpcode = 36, \
1169 .DwordLength = 0
1170
1171 #define GEN75_3DSTATE_BLEND_STATE_POINTERS_length 0x00000002
1172
1173 struct GEN75_3DSTATE_BLEND_STATE_POINTERS {
1174 uint32_t CommandType;
1175 uint32_t CommandSubType;
1176 uint32_t _3DCommandOpcode;
1177 uint32_t _3DCommandSubOpcode;
1178 uint32_t DwordLength;
1179 uint32_t BlendStatePointer;
1180 };
1181
1182 static inline void
1183 GEN75_3DSTATE_BLEND_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
1184 const struct GEN75_3DSTATE_BLEND_STATE_POINTERS * restrict values)
1185 {
1186 uint32_t *dw = (uint32_t * restrict) dst;
1187
1188 dw[0] =
1189 __gen_field(values->CommandType, 29, 31) |
1190 __gen_field(values->CommandSubType, 27, 28) |
1191 __gen_field(values->_3DCommandOpcode, 24, 26) |
1192 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1193 __gen_field(values->DwordLength, 0, 7) |
1194 0;
1195
1196 dw[1] =
1197 __gen_offset(values->BlendStatePointer, 6, 31) |
1198 __gen_mbo(0, 0) |
1199 0;
1200
1201 }
1202
1203 #define GEN75_3DSTATE_CC_STATE_POINTERS_length_bias 0x00000002
1204 #define GEN75_3DSTATE_CC_STATE_POINTERS_header \
1205 .CommandType = 3, \
1206 .CommandSubType = 3, \
1207 ._3DCommandOpcode = 0, \
1208 ._3DCommandSubOpcode = 14, \
1209 .DwordLength = 0
1210
1211 #define GEN75_3DSTATE_CC_STATE_POINTERS_length 0x00000002
1212
1213 struct GEN75_3DSTATE_CC_STATE_POINTERS {
1214 uint32_t CommandType;
1215 uint32_t CommandSubType;
1216 uint32_t _3DCommandOpcode;
1217 uint32_t _3DCommandSubOpcode;
1218 uint32_t DwordLength;
1219 uint32_t ColorCalcStatePointer;
1220 };
1221
1222 static inline void
1223 GEN75_3DSTATE_CC_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
1224 const struct GEN75_3DSTATE_CC_STATE_POINTERS * restrict values)
1225 {
1226 uint32_t *dw = (uint32_t * restrict) dst;
1227
1228 dw[0] =
1229 __gen_field(values->CommandType, 29, 31) |
1230 __gen_field(values->CommandSubType, 27, 28) |
1231 __gen_field(values->_3DCommandOpcode, 24, 26) |
1232 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1233 __gen_field(values->DwordLength, 0, 7) |
1234 0;
1235
1236 dw[1] =
1237 __gen_offset(values->ColorCalcStatePointer, 6, 31) |
1238 __gen_mbo(0, 0) |
1239 0;
1240
1241 }
1242
1243 #define GEN75_3DSTATE_CHROMA_KEY_length_bias 0x00000002
1244 #define GEN75_3DSTATE_CHROMA_KEY_header \
1245 .CommandType = 3, \
1246 .CommandSubType = 3, \
1247 ._3DCommandOpcode = 1, \
1248 ._3DCommandSubOpcode = 4, \
1249 .DwordLength = 2
1250
1251 #define GEN75_3DSTATE_CHROMA_KEY_length 0x00000004
1252
1253 struct GEN75_3DSTATE_CHROMA_KEY {
1254 uint32_t CommandType;
1255 uint32_t CommandSubType;
1256 uint32_t _3DCommandOpcode;
1257 uint32_t _3DCommandSubOpcode;
1258 uint32_t DwordLength;
1259 uint32_t ChromaKeyTableIndex;
1260 uint32_t ChromaKeyLowValue;
1261 uint32_t ChromaKeyHighValue;
1262 };
1263
1264 static inline void
1265 GEN75_3DSTATE_CHROMA_KEY_pack(__gen_user_data *data, void * restrict dst,
1266 const struct GEN75_3DSTATE_CHROMA_KEY * restrict values)
1267 {
1268 uint32_t *dw = (uint32_t * restrict) dst;
1269
1270 dw[0] =
1271 __gen_field(values->CommandType, 29, 31) |
1272 __gen_field(values->CommandSubType, 27, 28) |
1273 __gen_field(values->_3DCommandOpcode, 24, 26) |
1274 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1275 __gen_field(values->DwordLength, 0, 7) |
1276 0;
1277
1278 dw[1] =
1279 __gen_field(values->ChromaKeyTableIndex, 30, 31) |
1280 0;
1281
1282 dw[2] =
1283 __gen_field(values->ChromaKeyLowValue, 0, 31) |
1284 0;
1285
1286 dw[3] =
1287 __gen_field(values->ChromaKeyHighValue, 0, 31) |
1288 0;
1289
1290 }
1291
1292 #define GEN75_3DSTATE_CLEAR_PARAMS_length_bias 0x00000002
1293 #define GEN75_3DSTATE_CLEAR_PARAMS_header \
1294 .CommandType = 3, \
1295 .CommandSubType = 3, \
1296 ._3DCommandOpcode = 0, \
1297 ._3DCommandSubOpcode = 4, \
1298 .DwordLength = 1
1299
1300 #define GEN75_3DSTATE_CLEAR_PARAMS_length 0x00000003
1301
1302 struct GEN75_3DSTATE_CLEAR_PARAMS {
1303 uint32_t CommandType;
1304 uint32_t CommandSubType;
1305 uint32_t _3DCommandOpcode;
1306 uint32_t _3DCommandSubOpcode;
1307 uint32_t DwordLength;
1308 uint32_t DepthClearValue;
1309 bool DepthClearValueValid;
1310 };
1311
1312 static inline void
1313 GEN75_3DSTATE_CLEAR_PARAMS_pack(__gen_user_data *data, void * restrict dst,
1314 const struct GEN75_3DSTATE_CLEAR_PARAMS * restrict values)
1315 {
1316 uint32_t *dw = (uint32_t * restrict) dst;
1317
1318 dw[0] =
1319 __gen_field(values->CommandType, 29, 31) |
1320 __gen_field(values->CommandSubType, 27, 28) |
1321 __gen_field(values->_3DCommandOpcode, 24, 26) |
1322 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1323 __gen_field(values->DwordLength, 0, 7) |
1324 0;
1325
1326 dw[1] =
1327 __gen_field(values->DepthClearValue, 0, 31) |
1328 0;
1329
1330 dw[2] =
1331 __gen_field(values->DepthClearValueValid, 0, 0) |
1332 0;
1333
1334 }
1335
1336 #define GEN75_3DSTATE_CLIP_length_bias 0x00000002
1337 #define GEN75_3DSTATE_CLIP_header \
1338 .CommandType = 3, \
1339 .CommandSubType = 3, \
1340 ._3DCommandOpcode = 0, \
1341 ._3DCommandSubOpcode = 18, \
1342 .DwordLength = 2
1343
1344 #define GEN75_3DSTATE_CLIP_length 0x00000004
1345
1346 struct GEN75_3DSTATE_CLIP {
1347 uint32_t CommandType;
1348 uint32_t CommandSubType;
1349 uint32_t _3DCommandOpcode;
1350 uint32_t _3DCommandSubOpcode;
1351 uint32_t DwordLength;
1352 uint32_t FrontWinding;
1353 uint32_t VertexSubPixelPrecisionSelect;
1354 bool EarlyCullEnable;
1355 #define CULLMODE_BOTH 0
1356 #define CULLMODE_NONE 1
1357 #define CULLMODE_FRONT 2
1358 #define CULLMODE_BACK 3
1359 uint32_t CullMode;
1360 bool ClipperStatisticsEnable;
1361 uint32_t UserClipDistanceCullTestEnableBitmask;
1362 bool ClipEnable;
1363 #define APIMODE_OGL 0
1364 uint32_t APIMode;
1365 bool ViewportXYClipTestEnable;
1366 bool ViewportZClipTestEnable;
1367 bool GuardbandClipTestEnable;
1368 uint32_t UserClipDistanceClipTestEnableBitmask;
1369 #define CLIPMODE_NORMAL 0
1370 #define CLIPMODE_REJECT_ALL 3
1371 #define CLIPMODE_ACCEPT_ALL 4
1372 uint32_t ClipMode;
1373 bool PerspectiveDivideDisable;
1374 bool NonPerspectiveBarycentricEnable;
1375 #define Vertex0 0
1376 #define Vertex1 1
1377 #define Vertex2 2
1378 uint32_t TriangleStripListProvokingVertexSelect;
1379 #define Vertex0 0
1380 #define Vertex1 1
1381 uint32_t LineStripListProvokingVertexSelect;
1382 #define Vertex0 0
1383 #define Vertex1 1
1384 #define Vertex2 2
1385 uint32_t TriangleFanProvokingVertexSelect;
1386 float MinimumPointWidth;
1387 float MaximumPointWidth;
1388 bool ForceZeroRTAIndexEnable;
1389 uint32_t MaximumVPIndex;
1390 };
1391
1392 static inline void
1393 GEN75_3DSTATE_CLIP_pack(__gen_user_data *data, void * restrict dst,
1394 const struct GEN75_3DSTATE_CLIP * restrict values)
1395 {
1396 uint32_t *dw = (uint32_t * restrict) dst;
1397
1398 dw[0] =
1399 __gen_field(values->CommandType, 29, 31) |
1400 __gen_field(values->CommandSubType, 27, 28) |
1401 __gen_field(values->_3DCommandOpcode, 24, 26) |
1402 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1403 __gen_field(values->DwordLength, 0, 7) |
1404 0;
1405
1406 dw[1] =
1407 __gen_field(values->FrontWinding, 20, 20) |
1408 __gen_field(values->VertexSubPixelPrecisionSelect, 19, 19) |
1409 __gen_field(values->EarlyCullEnable, 18, 18) |
1410 __gen_field(values->CullMode, 16, 17) |
1411 __gen_field(values->ClipperStatisticsEnable, 10, 10) |
1412 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
1413 0;
1414
1415 dw[2] =
1416 __gen_field(values->ClipEnable, 31, 31) |
1417 __gen_field(values->APIMode, 30, 30) |
1418 __gen_field(values->ViewportXYClipTestEnable, 28, 28) |
1419 __gen_field(values->ViewportZClipTestEnable, 27, 27) |
1420 __gen_field(values->GuardbandClipTestEnable, 26, 26) |
1421 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 16, 23) |
1422 __gen_field(values->ClipMode, 13, 15) |
1423 __gen_field(values->PerspectiveDivideDisable, 9, 9) |
1424 __gen_field(values->NonPerspectiveBarycentricEnable, 8, 8) |
1425 __gen_field(values->TriangleStripListProvokingVertexSelect, 4, 5) |
1426 __gen_field(values->LineStripListProvokingVertexSelect, 2, 3) |
1427 __gen_field(values->TriangleFanProvokingVertexSelect, 0, 1) |
1428 0;
1429
1430 dw[3] =
1431 __gen_field(values->MinimumPointWidth * (1 << 3), 17, 27) |
1432 __gen_field(values->MaximumPointWidth * (1 << 3), 6, 16) |
1433 __gen_field(values->ForceZeroRTAIndexEnable, 5, 5) |
1434 __gen_field(values->MaximumVPIndex, 0, 3) |
1435 0;
1436
1437 }
1438
1439 #define GEN75_3DSTATE_CONSTANT_DS_length_bias 0x00000002
1440 #define GEN75_3DSTATE_CONSTANT_DS_header \
1441 .CommandType = 3, \
1442 .CommandSubType = 3, \
1443 ._3DCommandOpcode = 0, \
1444 ._3DCommandSubOpcode = 26, \
1445 .DwordLength = 5
1446
1447 #define GEN75_3DSTATE_CONSTANT_DS_length 0x00000007
1448
1449 #define GEN75_3DSTATE_CONSTANT_BODY_length 0x00000006
1450
1451 struct GEN75_3DSTATE_CONSTANT_BODY {
1452 uint32_t ConstantBuffer1ReadLength;
1453 uint32_t ConstantBuffer0ReadLength;
1454 uint32_t ConstantBuffer3ReadLength;
1455 uint32_t ConstantBuffer2ReadLength;
1456 __gen_address_type PointerToConstantBuffer0;
1457 struct GEN75_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
1458 __gen_address_type PointerToConstantBuffer1;
1459 __gen_address_type PointerToConstantBuffer2;
1460 __gen_address_type PointerToConstantBuffer3;
1461 };
1462
1463 static inline void
1464 GEN75_3DSTATE_CONSTANT_BODY_pack(__gen_user_data *data, void * restrict dst,
1465 const struct GEN75_3DSTATE_CONSTANT_BODY * restrict values)
1466 {
1467 uint32_t *dw = (uint32_t * restrict) dst;
1468
1469 dw[0] =
1470 __gen_field(values->ConstantBuffer1ReadLength, 16, 31) |
1471 __gen_field(values->ConstantBuffer0ReadLength, 0, 15) |
1472 0;
1473
1474 dw[1] =
1475 __gen_field(values->ConstantBuffer3ReadLength, 16, 31) |
1476 __gen_field(values->ConstantBuffer2ReadLength, 0, 15) |
1477 0;
1478
1479 uint32_t dw_ConstantBufferObjectControlState;
1480 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
1481 uint32_t dw2 =
1482 __gen_field(dw_ConstantBufferObjectControlState, 0, 4) |
1483 0;
1484
1485 dw[2] =
1486 __gen_combine_address(data, &dw[2], values->PointerToConstantBuffer0, dw2);
1487
1488 uint32_t dw3 =
1489 0;
1490
1491 dw[3] =
1492 __gen_combine_address(data, &dw[3], values->PointerToConstantBuffer1, dw3);
1493
1494 uint32_t dw4 =
1495 0;
1496
1497 dw[4] =
1498 __gen_combine_address(data, &dw[4], values->PointerToConstantBuffer2, dw4);
1499
1500 uint32_t dw5 =
1501 0;
1502
1503 dw[5] =
1504 __gen_combine_address(data, &dw[5], values->PointerToConstantBuffer3, dw5);
1505
1506 }
1507
1508 struct GEN75_3DSTATE_CONSTANT_DS {
1509 uint32_t CommandType;
1510 uint32_t CommandSubType;
1511 uint32_t _3DCommandOpcode;
1512 uint32_t _3DCommandSubOpcode;
1513 uint32_t DwordLength;
1514 struct GEN75_3DSTATE_CONSTANT_BODY ConstantBody;
1515 };
1516
1517 static inline void
1518 GEN75_3DSTATE_CONSTANT_DS_pack(__gen_user_data *data, void * restrict dst,
1519 const struct GEN75_3DSTATE_CONSTANT_DS * restrict values)
1520 {
1521 uint32_t *dw = (uint32_t * restrict) dst;
1522
1523 dw[0] =
1524 __gen_field(values->CommandType, 29, 31) |
1525 __gen_field(values->CommandSubType, 27, 28) |
1526 __gen_field(values->_3DCommandOpcode, 24, 26) |
1527 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1528 __gen_field(values->DwordLength, 0, 7) |
1529 0;
1530
1531 GEN75_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1532 }
1533
1534 #define GEN75_3DSTATE_CONSTANT_GS_length_bias 0x00000002
1535 #define GEN75_3DSTATE_CONSTANT_GS_header \
1536 .CommandType = 3, \
1537 .CommandSubType = 3, \
1538 ._3DCommandOpcode = 0, \
1539 ._3DCommandSubOpcode = 22, \
1540 .DwordLength = 5
1541
1542 #define GEN75_3DSTATE_CONSTANT_GS_length 0x00000007
1543
1544 struct GEN75_3DSTATE_CONSTANT_GS {
1545 uint32_t CommandType;
1546 uint32_t CommandSubType;
1547 uint32_t _3DCommandOpcode;
1548 uint32_t _3DCommandSubOpcode;
1549 uint32_t DwordLength;
1550 struct GEN75_3DSTATE_CONSTANT_BODY ConstantBody;
1551 };
1552
1553 static inline void
1554 GEN75_3DSTATE_CONSTANT_GS_pack(__gen_user_data *data, void * restrict dst,
1555 const struct GEN75_3DSTATE_CONSTANT_GS * restrict values)
1556 {
1557 uint32_t *dw = (uint32_t * restrict) dst;
1558
1559 dw[0] =
1560 __gen_field(values->CommandType, 29, 31) |
1561 __gen_field(values->CommandSubType, 27, 28) |
1562 __gen_field(values->_3DCommandOpcode, 24, 26) |
1563 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1564 __gen_field(values->DwordLength, 0, 7) |
1565 0;
1566
1567 GEN75_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1568 }
1569
1570 #define GEN75_3DSTATE_CONSTANT_HS_length_bias 0x00000002
1571 #define GEN75_3DSTATE_CONSTANT_HS_header \
1572 .CommandType = 3, \
1573 .CommandSubType = 3, \
1574 ._3DCommandOpcode = 0, \
1575 ._3DCommandSubOpcode = 25, \
1576 .DwordLength = 5
1577
1578 #define GEN75_3DSTATE_CONSTANT_HS_length 0x00000007
1579
1580 struct GEN75_3DSTATE_CONSTANT_HS {
1581 uint32_t CommandType;
1582 uint32_t CommandSubType;
1583 uint32_t _3DCommandOpcode;
1584 uint32_t _3DCommandSubOpcode;
1585 uint32_t DwordLength;
1586 struct GEN75_3DSTATE_CONSTANT_BODY ConstantBody;
1587 };
1588
1589 static inline void
1590 GEN75_3DSTATE_CONSTANT_HS_pack(__gen_user_data *data, void * restrict dst,
1591 const struct GEN75_3DSTATE_CONSTANT_HS * restrict values)
1592 {
1593 uint32_t *dw = (uint32_t * restrict) dst;
1594
1595 dw[0] =
1596 __gen_field(values->CommandType, 29, 31) |
1597 __gen_field(values->CommandSubType, 27, 28) |
1598 __gen_field(values->_3DCommandOpcode, 24, 26) |
1599 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1600 __gen_field(values->DwordLength, 0, 7) |
1601 0;
1602
1603 GEN75_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1604 }
1605
1606 #define GEN75_3DSTATE_CONSTANT_PS_length_bias 0x00000002
1607 #define GEN75_3DSTATE_CONSTANT_PS_header \
1608 .CommandType = 3, \
1609 .CommandSubType = 3, \
1610 ._3DCommandOpcode = 0, \
1611 ._3DCommandSubOpcode = 23, \
1612 .DwordLength = 5
1613
1614 #define GEN75_3DSTATE_CONSTANT_PS_length 0x00000007
1615
1616 struct GEN75_3DSTATE_CONSTANT_PS {
1617 uint32_t CommandType;
1618 uint32_t CommandSubType;
1619 uint32_t _3DCommandOpcode;
1620 uint32_t _3DCommandSubOpcode;
1621 uint32_t DwordLength;
1622 struct GEN75_3DSTATE_CONSTANT_BODY ConstantBody;
1623 };
1624
1625 static inline void
1626 GEN75_3DSTATE_CONSTANT_PS_pack(__gen_user_data *data, void * restrict dst,
1627 const struct GEN75_3DSTATE_CONSTANT_PS * restrict values)
1628 {
1629 uint32_t *dw = (uint32_t * restrict) dst;
1630
1631 dw[0] =
1632 __gen_field(values->CommandType, 29, 31) |
1633 __gen_field(values->CommandSubType, 27, 28) |
1634 __gen_field(values->_3DCommandOpcode, 24, 26) |
1635 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1636 __gen_field(values->DwordLength, 0, 7) |
1637 0;
1638
1639 GEN75_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1640 }
1641
1642 #define GEN75_3DSTATE_CONSTANT_VS_length_bias 0x00000002
1643 #define GEN75_3DSTATE_CONSTANT_VS_header \
1644 .CommandType = 3, \
1645 .CommandSubType = 3, \
1646 ._3DCommandOpcode = 0, \
1647 ._3DCommandSubOpcode = 21, \
1648 .DwordLength = 5
1649
1650 #define GEN75_3DSTATE_CONSTANT_VS_length 0x00000007
1651
1652 struct GEN75_3DSTATE_CONSTANT_VS {
1653 uint32_t CommandType;
1654 uint32_t CommandSubType;
1655 uint32_t _3DCommandOpcode;
1656 uint32_t _3DCommandSubOpcode;
1657 uint32_t DwordLength;
1658 struct GEN75_3DSTATE_CONSTANT_BODY ConstantBody;
1659 };
1660
1661 static inline void
1662 GEN75_3DSTATE_CONSTANT_VS_pack(__gen_user_data *data, void * restrict dst,
1663 const struct GEN75_3DSTATE_CONSTANT_VS * restrict values)
1664 {
1665 uint32_t *dw = (uint32_t * restrict) dst;
1666
1667 dw[0] =
1668 __gen_field(values->CommandType, 29, 31) |
1669 __gen_field(values->CommandSubType, 27, 28) |
1670 __gen_field(values->_3DCommandOpcode, 24, 26) |
1671 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1672 __gen_field(values->DwordLength, 0, 7) |
1673 0;
1674
1675 GEN75_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1676 }
1677
1678 #define GEN75_3DSTATE_DEPTH_BUFFER_length_bias 0x00000002
1679 #define GEN75_3DSTATE_DEPTH_BUFFER_header \
1680 .CommandType = 3, \
1681 .CommandSubType = 3, \
1682 ._3DCommandOpcode = 0, \
1683 ._3DCommandSubOpcode = 5, \
1684 .DwordLength = 5
1685
1686 #define GEN75_3DSTATE_DEPTH_BUFFER_length 0x00000007
1687
1688 struct GEN75_3DSTATE_DEPTH_BUFFER {
1689 uint32_t CommandType;
1690 uint32_t CommandSubType;
1691 uint32_t _3DCommandOpcode;
1692 uint32_t _3DCommandSubOpcode;
1693 uint32_t DwordLength;
1694 #define SURFTYPE_1D 0
1695 #define SURFTYPE_2D 1
1696 #define SURFTYPE_3D 2
1697 #define SURFTYPE_CUBE 3
1698 #define SURFTYPE_NULL 7
1699 uint32_t SurfaceType;
1700 bool DepthWriteEnable;
1701 bool StencilWriteEnable;
1702 bool HierarchicalDepthBufferEnable;
1703 #define D32_FLOAT 1
1704 #define D24_UNORM_X8_UINT 3
1705 #define D16_UNORM 5
1706 uint32_t SurfaceFormat;
1707 uint32_t SurfacePitch;
1708 __gen_address_type SurfaceBaseAddress;
1709 uint32_t Height;
1710 uint32_t Width;
1711 uint32_t LOD;
1712 #define SURFTYPE_CUBEmustbezero 0
1713 uint32_t Depth;
1714 uint32_t MinimumArrayElement;
1715 struct GEN75_MEMORY_OBJECT_CONTROL_STATE DepthBufferObjectControlState;
1716 uint32_t DepthCoordinateOffsetY;
1717 uint32_t DepthCoordinateOffsetX;
1718 uint32_t RenderTargetViewExtent;
1719 };
1720
1721 static inline void
1722 GEN75_3DSTATE_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
1723 const struct GEN75_3DSTATE_DEPTH_BUFFER * restrict values)
1724 {
1725 uint32_t *dw = (uint32_t * restrict) dst;
1726
1727 dw[0] =
1728 __gen_field(values->CommandType, 29, 31) |
1729 __gen_field(values->CommandSubType, 27, 28) |
1730 __gen_field(values->_3DCommandOpcode, 24, 26) |
1731 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1732 __gen_field(values->DwordLength, 0, 7) |
1733 0;
1734
1735 dw[1] =
1736 __gen_field(values->SurfaceType, 29, 31) |
1737 __gen_field(values->DepthWriteEnable, 28, 28) |
1738 __gen_field(values->StencilWriteEnable, 27, 27) |
1739 __gen_field(values->HierarchicalDepthBufferEnable, 22, 22) |
1740 __gen_field(values->SurfaceFormat, 18, 20) |
1741 __gen_field(values->SurfacePitch, 0, 17) |
1742 0;
1743
1744 uint32_t dw2 =
1745 0;
1746
1747 dw[2] =
1748 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
1749
1750 dw[3] =
1751 __gen_field(values->Height, 18, 31) |
1752 __gen_field(values->Width, 4, 17) |
1753 __gen_field(values->LOD, 0, 3) |
1754 0;
1755
1756 uint32_t dw_DepthBufferObjectControlState;
1757 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DepthBufferObjectControlState, &values->DepthBufferObjectControlState);
1758 dw[4] =
1759 __gen_field(values->Depth, 21, 31) |
1760 __gen_field(values->MinimumArrayElement, 10, 20) |
1761 __gen_field(dw_DepthBufferObjectControlState, 0, 3) |
1762 0;
1763
1764 dw[5] =
1765 __gen_field(values->DepthCoordinateOffsetY, 16, 31) |
1766 __gen_field(values->DepthCoordinateOffsetX, 0, 15) |
1767 0;
1768
1769 dw[6] =
1770 __gen_field(values->RenderTargetViewExtent, 21, 31) |
1771 0;
1772
1773 }
1774
1775 #define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_length_bias 0x00000002
1776 #define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_header\
1777 .CommandType = 3, \
1778 .CommandSubType = 3, \
1779 ._3DCommandOpcode = 0, \
1780 ._3DCommandSubOpcode = 37, \
1781 .DwordLength = 0
1782
1783 #define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_length 0x00000002
1784
1785 struct GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS {
1786 uint32_t CommandType;
1787 uint32_t CommandSubType;
1788 uint32_t _3DCommandOpcode;
1789 uint32_t _3DCommandSubOpcode;
1790 uint32_t DwordLength;
1791 uint32_t PointertoDEPTH_STENCIL_STATE;
1792 };
1793
1794 static inline void
1795 GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
1796 const struct GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS * restrict values)
1797 {
1798 uint32_t *dw = (uint32_t * restrict) dst;
1799
1800 dw[0] =
1801 __gen_field(values->CommandType, 29, 31) |
1802 __gen_field(values->CommandSubType, 27, 28) |
1803 __gen_field(values->_3DCommandOpcode, 24, 26) |
1804 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1805 __gen_field(values->DwordLength, 0, 7) |
1806 0;
1807
1808 dw[1] =
1809 __gen_offset(values->PointertoDEPTH_STENCIL_STATE, 6, 31) |
1810 __gen_mbo(0, 0) |
1811 0;
1812
1813 }
1814
1815 #define GEN75_3DSTATE_DRAWING_RECTANGLE_length_bias 0x00000002
1816 #define GEN75_3DSTATE_DRAWING_RECTANGLE_header \
1817 .CommandType = 3, \
1818 .CommandSubType = 3, \
1819 ._3DCommandOpcode = 1, \
1820 ._3DCommandSubOpcode = 0, \
1821 .DwordLength = 2
1822
1823 #define GEN75_3DSTATE_DRAWING_RECTANGLE_length 0x00000004
1824
1825 struct GEN75_3DSTATE_DRAWING_RECTANGLE {
1826 uint32_t CommandType;
1827 uint32_t CommandSubType;
1828 uint32_t _3DCommandOpcode;
1829 uint32_t _3DCommandSubOpcode;
1830 #define Legacy 0
1831 #define Core0Enabled 1
1832 #define Core1Enabled 2
1833 uint32_t CoreModeSelect;
1834 uint32_t DwordLength;
1835 uint32_t ClippedDrawingRectangleYMin;
1836 uint32_t ClippedDrawingRectangleXMin;
1837 uint32_t ClippedDrawingRectangleYMax;
1838 uint32_t ClippedDrawingRectangleXMax;
1839 uint32_t DrawingRectangleOriginY;
1840 uint32_t DrawingRectangleOriginX;
1841 };
1842
1843 static inline void
1844 GEN75_3DSTATE_DRAWING_RECTANGLE_pack(__gen_user_data *data, void * restrict dst,
1845 const struct GEN75_3DSTATE_DRAWING_RECTANGLE * restrict values)
1846 {
1847 uint32_t *dw = (uint32_t * restrict) dst;
1848
1849 dw[0] =
1850 __gen_field(values->CommandType, 29, 31) |
1851 __gen_field(values->CommandSubType, 27, 28) |
1852 __gen_field(values->_3DCommandOpcode, 24, 26) |
1853 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1854 __gen_field(values->CoreModeSelect, 14, 15) |
1855 __gen_field(values->DwordLength, 0, 7) |
1856 0;
1857
1858 dw[1] =
1859 __gen_field(values->ClippedDrawingRectangleYMin, 16, 31) |
1860 __gen_field(values->ClippedDrawingRectangleXMin, 0, 15) |
1861 0;
1862
1863 dw[2] =
1864 __gen_field(values->ClippedDrawingRectangleYMax, 16, 31) |
1865 __gen_field(values->ClippedDrawingRectangleXMax, 0, 15) |
1866 0;
1867
1868 dw[3] =
1869 __gen_field(values->DrawingRectangleOriginY, 16, 31) |
1870 __gen_field(values->DrawingRectangleOriginX, 0, 15) |
1871 0;
1872
1873 }
1874
1875 #define GEN75_3DSTATE_DS_length_bias 0x00000002
1876 #define GEN75_3DSTATE_DS_header \
1877 .CommandType = 3, \
1878 .CommandSubType = 3, \
1879 ._3DCommandOpcode = 0, \
1880 ._3DCommandSubOpcode = 29, \
1881 .DwordLength = 4
1882
1883 #define GEN75_3DSTATE_DS_length 0x00000006
1884
1885 struct GEN75_3DSTATE_DS {
1886 uint32_t CommandType;
1887 uint32_t CommandSubType;
1888 uint32_t _3DCommandOpcode;
1889 uint32_t _3DCommandSubOpcode;
1890 uint32_t DwordLength;
1891 uint32_t KernelStartPointer;
1892 #define Multiple 0
1893 #define Single 1
1894 uint32_t SingleDomainPointDispatch;
1895 #define Dmask 0
1896 #define Vmask 1
1897 uint32_t VectorMaskEnable;
1898 #define NoSamplers 0
1899 #define _14Samplers 1
1900 #define _58Samplers 2
1901 #define _912Samplers 3
1902 #define _1316Samplers 4
1903 uint32_t SamplerCount;
1904 uint32_t BindingTableEntryCount;
1905 #define Normal 0
1906 #define High 1
1907 uint32_t ThreadDispatchPriority;
1908 #define IEEE754 0
1909 #define Alternate 1
1910 uint32_t FloatingPointMode;
1911 bool AccessesUAV;
1912 bool IllegalOpcodeExceptionEnable;
1913 bool SoftwareExceptionEnable;
1914 uint32_t ScratchSpaceBasePointer;
1915 uint32_t PerThreadScratchSpace;
1916 uint32_t DispatchGRFStartRegisterForURBData;
1917 uint32_t PatchURBEntryReadLength;
1918 uint32_t PatchURBEntryReadOffset;
1919 uint32_t MaximumNumberofThreads;
1920 bool StatisticsEnable;
1921 bool ComputeWCoordinateEnable;
1922 bool DSCacheDisable;
1923 bool DSFunctionEnable;
1924 };
1925
1926 static inline void
1927 GEN75_3DSTATE_DS_pack(__gen_user_data *data, void * restrict dst,
1928 const struct GEN75_3DSTATE_DS * restrict values)
1929 {
1930 uint32_t *dw = (uint32_t * restrict) dst;
1931
1932 dw[0] =
1933 __gen_field(values->CommandType, 29, 31) |
1934 __gen_field(values->CommandSubType, 27, 28) |
1935 __gen_field(values->_3DCommandOpcode, 24, 26) |
1936 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1937 __gen_field(values->DwordLength, 0, 7) |
1938 0;
1939
1940 dw[1] =
1941 __gen_offset(values->KernelStartPointer, 6, 31) |
1942 0;
1943
1944 dw[2] =
1945 __gen_field(values->SingleDomainPointDispatch, 31, 31) |
1946 __gen_field(values->VectorMaskEnable, 30, 30) |
1947 __gen_field(values->SamplerCount, 27, 29) |
1948 __gen_field(values->BindingTableEntryCount, 18, 25) |
1949 __gen_field(values->ThreadDispatchPriority, 17, 17) |
1950 __gen_field(values->FloatingPointMode, 16, 16) |
1951 __gen_field(values->AccessesUAV, 14, 14) |
1952 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
1953 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
1954 0;
1955
1956 dw[3] =
1957 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
1958 __gen_field(values->PerThreadScratchSpace, 0, 3) |
1959 0;
1960
1961 dw[4] =
1962 __gen_field(values->DispatchGRFStartRegisterForURBData, 20, 24) |
1963 __gen_field(values->PatchURBEntryReadLength, 11, 17) |
1964 __gen_field(values->PatchURBEntryReadOffset, 4, 9) |
1965 0;
1966
1967 dw[5] =
1968 __gen_field(values->MaximumNumberofThreads, 21, 29) |
1969 __gen_field(values->StatisticsEnable, 10, 10) |
1970 __gen_field(values->ComputeWCoordinateEnable, 2, 2) |
1971 __gen_field(values->DSCacheDisable, 1, 1) |
1972 __gen_field(values->DSFunctionEnable, 0, 0) |
1973 0;
1974
1975 }
1976
1977 #define GEN75_3DSTATE_GATHER_CONSTANT_DS_length_bias 0x00000002
1978 #define GEN75_3DSTATE_GATHER_CONSTANT_DS_header \
1979 .CommandType = 3, \
1980 .CommandSubType = 3, \
1981 ._3DCommandOpcode = 0, \
1982 ._3DCommandSubOpcode = 55
1983
1984 #define GEN75_3DSTATE_GATHER_CONSTANT_DS_length 0x00000000
1985
1986 #define GEN75_GATHER_CONSTANT_ENTRY_length 0x00000001
1987
1988 struct GEN75_GATHER_CONSTANT_ENTRY {
1989 uint32_t ConstantBufferOffset;
1990 uint32_t ChannelMask;
1991 uint32_t BindingTableIndexOffset;
1992 };
1993
1994 static inline void
1995 GEN75_GATHER_CONSTANT_ENTRY_pack(__gen_user_data *data, void * restrict dst,
1996 const struct GEN75_GATHER_CONSTANT_ENTRY * restrict values)
1997 {
1998 uint32_t *dw = (uint32_t * restrict) dst;
1999
2000 dw[0] =
2001 __gen_offset(values->ConstantBufferOffset, 8, 15) |
2002 __gen_field(values->ChannelMask, 4, 7) |
2003 __gen_field(values->BindingTableIndexOffset, 0, 3) |
2004 0;
2005
2006 }
2007
2008 struct GEN75_3DSTATE_GATHER_CONSTANT_DS {
2009 uint32_t CommandType;
2010 uint32_t CommandSubType;
2011 uint32_t _3DCommandOpcode;
2012 uint32_t _3DCommandSubOpcode;
2013 uint32_t DwordLength;
2014 uint32_t ConstantBufferValid;
2015 uint32_t ConstantBufferBindingTableBlock;
2016 uint32_t GatherBufferOffset;
2017 /* variable length fields follow */
2018 };
2019
2020 static inline void
2021 GEN75_3DSTATE_GATHER_CONSTANT_DS_pack(__gen_user_data *data, void * restrict dst,
2022 const struct GEN75_3DSTATE_GATHER_CONSTANT_DS * restrict values)
2023 {
2024 uint32_t *dw = (uint32_t * restrict) dst;
2025
2026 dw[0] =
2027 __gen_field(values->CommandType, 29, 31) |
2028 __gen_field(values->CommandSubType, 27, 28) |
2029 __gen_field(values->_3DCommandOpcode, 24, 26) |
2030 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2031 __gen_field(values->DwordLength, 0, 7) |
2032 0;
2033
2034 dw[1] =
2035 __gen_field(values->ConstantBufferValid, 16, 31) |
2036 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2037 0;
2038
2039 dw[2] =
2040 __gen_offset(values->GatherBufferOffset, 6, 22) |
2041 0;
2042
2043 /* variable length fields follow */
2044 }
2045
2046 #define GEN75_3DSTATE_GATHER_CONSTANT_GS_length_bias 0x00000002
2047 #define GEN75_3DSTATE_GATHER_CONSTANT_GS_header \
2048 .CommandType = 3, \
2049 .CommandSubType = 3, \
2050 ._3DCommandOpcode = 0, \
2051 ._3DCommandSubOpcode = 53
2052
2053 #define GEN75_3DSTATE_GATHER_CONSTANT_GS_length 0x00000000
2054
2055 struct GEN75_3DSTATE_GATHER_CONSTANT_GS {
2056 uint32_t CommandType;
2057 uint32_t CommandSubType;
2058 uint32_t _3DCommandOpcode;
2059 uint32_t _3DCommandSubOpcode;
2060 uint32_t DwordLength;
2061 uint32_t ConstantBufferValid;
2062 uint32_t ConstantBufferBindingTableBlock;
2063 uint32_t GatherBufferOffset;
2064 /* variable length fields follow */
2065 };
2066
2067 static inline void
2068 GEN75_3DSTATE_GATHER_CONSTANT_GS_pack(__gen_user_data *data, void * restrict dst,
2069 const struct GEN75_3DSTATE_GATHER_CONSTANT_GS * restrict values)
2070 {
2071 uint32_t *dw = (uint32_t * restrict) dst;
2072
2073 dw[0] =
2074 __gen_field(values->CommandType, 29, 31) |
2075 __gen_field(values->CommandSubType, 27, 28) |
2076 __gen_field(values->_3DCommandOpcode, 24, 26) |
2077 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2078 __gen_field(values->DwordLength, 0, 7) |
2079 0;
2080
2081 dw[1] =
2082 __gen_field(values->ConstantBufferValid, 16, 31) |
2083 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2084 0;
2085
2086 dw[2] =
2087 __gen_offset(values->GatherBufferOffset, 6, 22) |
2088 0;
2089
2090 /* variable length fields follow */
2091 }
2092
2093 #define GEN75_3DSTATE_GATHER_CONSTANT_HS_length_bias 0x00000002
2094 #define GEN75_3DSTATE_GATHER_CONSTANT_HS_header \
2095 .CommandType = 3, \
2096 .CommandSubType = 3, \
2097 ._3DCommandOpcode = 0, \
2098 ._3DCommandSubOpcode = 54
2099
2100 #define GEN75_3DSTATE_GATHER_CONSTANT_HS_length 0x00000000
2101
2102 struct GEN75_3DSTATE_GATHER_CONSTANT_HS {
2103 uint32_t CommandType;
2104 uint32_t CommandSubType;
2105 uint32_t _3DCommandOpcode;
2106 uint32_t _3DCommandSubOpcode;
2107 uint32_t DwordLength;
2108 uint32_t ConstantBufferValid;
2109 uint32_t ConstantBufferBindingTableBlock;
2110 uint32_t GatherBufferOffset;
2111 /* variable length fields follow */
2112 };
2113
2114 static inline void
2115 GEN75_3DSTATE_GATHER_CONSTANT_HS_pack(__gen_user_data *data, void * restrict dst,
2116 const struct GEN75_3DSTATE_GATHER_CONSTANT_HS * restrict values)
2117 {
2118 uint32_t *dw = (uint32_t * restrict) dst;
2119
2120 dw[0] =
2121 __gen_field(values->CommandType, 29, 31) |
2122 __gen_field(values->CommandSubType, 27, 28) |
2123 __gen_field(values->_3DCommandOpcode, 24, 26) |
2124 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2125 __gen_field(values->DwordLength, 0, 7) |
2126 0;
2127
2128 dw[1] =
2129 __gen_field(values->ConstantBufferValid, 16, 31) |
2130 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2131 0;
2132
2133 dw[2] =
2134 __gen_offset(values->GatherBufferOffset, 6, 22) |
2135 0;
2136
2137 /* variable length fields follow */
2138 }
2139
2140 #define GEN75_3DSTATE_GATHER_CONSTANT_PS_length_bias 0x00000002
2141 #define GEN75_3DSTATE_GATHER_CONSTANT_PS_header \
2142 .CommandType = 3, \
2143 .CommandSubType = 3, \
2144 ._3DCommandOpcode = 0, \
2145 ._3DCommandSubOpcode = 56
2146
2147 #define GEN75_3DSTATE_GATHER_CONSTANT_PS_length 0x00000000
2148
2149 struct GEN75_3DSTATE_GATHER_CONSTANT_PS {
2150 uint32_t CommandType;
2151 uint32_t CommandSubType;
2152 uint32_t _3DCommandOpcode;
2153 uint32_t _3DCommandSubOpcode;
2154 uint32_t DwordLength;
2155 uint32_t ConstantBufferValid;
2156 uint32_t ConstantBufferBindingTableBlock;
2157 uint32_t GatherBufferOffset;
2158 bool ConstantBufferDx9Enable;
2159 /* variable length fields follow */
2160 };
2161
2162 static inline void
2163 GEN75_3DSTATE_GATHER_CONSTANT_PS_pack(__gen_user_data *data, void * restrict dst,
2164 const struct GEN75_3DSTATE_GATHER_CONSTANT_PS * restrict values)
2165 {
2166 uint32_t *dw = (uint32_t * restrict) dst;
2167
2168 dw[0] =
2169 __gen_field(values->CommandType, 29, 31) |
2170 __gen_field(values->CommandSubType, 27, 28) |
2171 __gen_field(values->_3DCommandOpcode, 24, 26) |
2172 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2173 __gen_field(values->DwordLength, 0, 7) |
2174 0;
2175
2176 dw[1] =
2177 __gen_field(values->ConstantBufferValid, 16, 31) |
2178 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2179 0;
2180
2181 dw[2] =
2182 __gen_offset(values->GatherBufferOffset, 6, 22) |
2183 __gen_field(values->ConstantBufferDx9Enable, 4, 4) |
2184 0;
2185
2186 /* variable length fields follow */
2187 }
2188
2189 #define GEN75_3DSTATE_GATHER_CONSTANT_VS_length_bias 0x00000002
2190 #define GEN75_3DSTATE_GATHER_CONSTANT_VS_header \
2191 .CommandType = 3, \
2192 .CommandSubType = 3, \
2193 ._3DCommandOpcode = 0, \
2194 ._3DCommandSubOpcode = 52
2195
2196 #define GEN75_3DSTATE_GATHER_CONSTANT_VS_length 0x00000000
2197
2198 struct GEN75_3DSTATE_GATHER_CONSTANT_VS {
2199 uint32_t CommandType;
2200 uint32_t CommandSubType;
2201 uint32_t _3DCommandOpcode;
2202 uint32_t _3DCommandSubOpcode;
2203 uint32_t DwordLength;
2204 uint32_t ConstantBufferValid;
2205 uint32_t ConstantBufferBindingTableBlock;
2206 uint32_t GatherBufferOffset;
2207 bool ConstantBufferDx9Enable;
2208 /* variable length fields follow */
2209 };
2210
2211 static inline void
2212 GEN75_3DSTATE_GATHER_CONSTANT_VS_pack(__gen_user_data *data, void * restrict dst,
2213 const struct GEN75_3DSTATE_GATHER_CONSTANT_VS * restrict values)
2214 {
2215 uint32_t *dw = (uint32_t * restrict) dst;
2216
2217 dw[0] =
2218 __gen_field(values->CommandType, 29, 31) |
2219 __gen_field(values->CommandSubType, 27, 28) |
2220 __gen_field(values->_3DCommandOpcode, 24, 26) |
2221 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2222 __gen_field(values->DwordLength, 0, 7) |
2223 0;
2224
2225 dw[1] =
2226 __gen_field(values->ConstantBufferValid, 16, 31) |
2227 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2228 0;
2229
2230 dw[2] =
2231 __gen_offset(values->GatherBufferOffset, 6, 22) |
2232 __gen_field(values->ConstantBufferDx9Enable, 4, 4) |
2233 0;
2234
2235 /* variable length fields follow */
2236 }
2237
2238 #define GEN75_3DSTATE_GATHER_POOL_ALLOC_length_bias 0x00000002
2239 #define GEN75_3DSTATE_GATHER_POOL_ALLOC_header \
2240 .CommandType = 3, \
2241 .CommandSubType = 3, \
2242 ._3DCommandOpcode = 1, \
2243 ._3DCommandSubOpcode = 26, \
2244 .DwordLength = 1
2245
2246 #define GEN75_3DSTATE_GATHER_POOL_ALLOC_length 0x00000003
2247
2248 struct GEN75_3DSTATE_GATHER_POOL_ALLOC {
2249 uint32_t CommandType;
2250 uint32_t CommandSubType;
2251 uint32_t _3DCommandOpcode;
2252 uint32_t _3DCommandSubOpcode;
2253 uint32_t DwordLength;
2254 __gen_address_type GatherPoolBaseAddress;
2255 bool GatherPoolEnable;
2256 struct GEN75_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
2257 __gen_address_type GatherPoolUpperBound;
2258 };
2259
2260 static inline void
2261 GEN75_3DSTATE_GATHER_POOL_ALLOC_pack(__gen_user_data *data, void * restrict dst,
2262 const struct GEN75_3DSTATE_GATHER_POOL_ALLOC * restrict values)
2263 {
2264 uint32_t *dw = (uint32_t * restrict) dst;
2265
2266 dw[0] =
2267 __gen_field(values->CommandType, 29, 31) |
2268 __gen_field(values->CommandSubType, 27, 28) |
2269 __gen_field(values->_3DCommandOpcode, 24, 26) |
2270 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2271 __gen_field(values->DwordLength, 0, 7) |
2272 0;
2273
2274 uint32_t dw_MemoryObjectControlState;
2275 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
2276 uint32_t dw1 =
2277 __gen_field(values->GatherPoolEnable, 11, 11) |
2278 __gen_mbo(4, 5) |
2279 __gen_field(dw_MemoryObjectControlState, 0, 3) |
2280 0;
2281
2282 dw[1] =
2283 __gen_combine_address(data, &dw[1], values->GatherPoolBaseAddress, dw1);
2284
2285 uint32_t dw2 =
2286 0;
2287
2288 dw[2] =
2289 __gen_combine_address(data, &dw[2], values->GatherPoolUpperBound, dw2);
2290
2291 }
2292
2293 #define GEN75_3DSTATE_GS_length_bias 0x00000002
2294 #define GEN75_3DSTATE_GS_header \
2295 .CommandType = 3, \
2296 .CommandSubType = 3, \
2297 ._3DCommandOpcode = 0, \
2298 ._3DCommandSubOpcode = 17, \
2299 .DwordLength = 5
2300
2301 #define GEN75_3DSTATE_GS_length 0x00000007
2302
2303 struct GEN75_3DSTATE_GS {
2304 uint32_t CommandType;
2305 uint32_t CommandSubType;
2306 uint32_t _3DCommandOpcode;
2307 uint32_t _3DCommandSubOpcode;
2308 uint32_t DwordLength;
2309 uint32_t KernelStartPointer;
2310 uint32_t SingleProgramFlowSPF;
2311 #define Dmask 0
2312 #define Vmask 1
2313 uint32_t VectorMaskEnableVME;
2314 #define NoSamplers 0
2315 #define _14Samplers 1
2316 #define _58Samplers 2
2317 #define _912Samplers 3
2318 #define _1316Samplers 4
2319 uint32_t SamplerCount;
2320 uint32_t BindingTableEntryCount;
2321 #define NormalPriority 0
2322 #define HighPriority 1
2323 uint32_t ThreadPriority;
2324 #define IEEE754 0
2325 #define alternate 1
2326 uint32_t FloatingPointMode;
2327 bool IllegalOpcodeExceptionEnable;
2328 uint32_t GSaccessesUAV;
2329 bool MaskStackExceptionEnable;
2330 bool SoftwareExceptionEnable;
2331 uint32_t ScratchSpaceBasePointer;
2332 uint32_t PerThreadScratchSpace;
2333 uint32_t OutputVertexSize;
2334 uint32_t OutputTopology;
2335 uint32_t VertexURBEntryReadLength;
2336 bool IncludeVertexHandles;
2337 uint32_t VertexURBEntryReadOffset;
2338 uint32_t DispatchGRFStartRegisterforURBData;
2339 uint32_t MaximumNumberofThreads;
2340 uint32_t ControlDataHeaderSize;
2341 uint32_t InstanceControl;
2342 uint32_t DefaultStreamID;
2343 #define SINGLE 0
2344 #define DUAL_INSTANCE 1
2345 #define DUAL_OBJECT 2
2346 uint32_t DispatchMode;
2347 uint32_t GSStatisticsEnable;
2348 uint32_t GSInvocationsIncrementValue;
2349 bool IncludePrimitiveID;
2350 uint32_t Hint;
2351 #define REORDER_LEADING 0
2352 #define REORDER_TRAILING 1
2353 uint32_t ReorderMode;
2354 bool DiscardAdjacency;
2355 bool GSEnable;
2356 #define GSCTL_CUT 0
2357 #define GSCTL_SID 1
2358 uint32_t ControlDataFormat;
2359 uint32_t SemaphoreHandle;
2360 };
2361
2362 static inline void
2363 GEN75_3DSTATE_GS_pack(__gen_user_data *data, void * restrict dst,
2364 const struct GEN75_3DSTATE_GS * restrict values)
2365 {
2366 uint32_t *dw = (uint32_t * restrict) dst;
2367
2368 dw[0] =
2369 __gen_field(values->CommandType, 29, 31) |
2370 __gen_field(values->CommandSubType, 27, 28) |
2371 __gen_field(values->_3DCommandOpcode, 24, 26) |
2372 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2373 __gen_field(values->DwordLength, 0, 7) |
2374 0;
2375
2376 dw[1] =
2377 __gen_offset(values->KernelStartPointer, 6, 31) |
2378 0;
2379
2380 dw[2] =
2381 __gen_field(values->SingleProgramFlowSPF, 31, 31) |
2382 __gen_field(values->VectorMaskEnableVME, 30, 30) |
2383 __gen_field(values->SamplerCount, 27, 29) |
2384 __gen_field(values->BindingTableEntryCount, 18, 25) |
2385 __gen_field(values->ThreadPriority, 17, 17) |
2386 __gen_field(values->FloatingPointMode, 16, 16) |
2387 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2388 __gen_field(values->GSaccessesUAV, 12, 12) |
2389 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
2390 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
2391 0;
2392
2393 dw[3] =
2394 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
2395 __gen_field(values->PerThreadScratchSpace, 0, 3) |
2396 0;
2397
2398 dw[4] =
2399 __gen_field(values->OutputVertexSize, 23, 28) |
2400 __gen_field(values->OutputTopology, 17, 22) |
2401 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
2402 __gen_field(values->IncludeVertexHandles, 10, 10) |
2403 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
2404 __gen_field(values->DispatchGRFStartRegisterforURBData, 0, 3) |
2405 0;
2406
2407 dw[5] =
2408 __gen_field(values->MaximumNumberofThreads, 24, 31) |
2409 __gen_field(values->ControlDataHeaderSize, 20, 23) |
2410 __gen_field(values->InstanceControl, 15, 19) |
2411 __gen_field(values->DefaultStreamID, 13, 14) |
2412 __gen_field(values->DispatchMode, 11, 12) |
2413 __gen_field(values->GSStatisticsEnable, 10, 10) |
2414 __gen_field(values->GSInvocationsIncrementValue, 5, 9) |
2415 __gen_field(values->IncludePrimitiveID, 4, 4) |
2416 __gen_field(values->Hint, 3, 3) |
2417 __gen_field(values->ReorderMode, 2, 2) |
2418 __gen_field(values->DiscardAdjacency, 1, 1) |
2419 __gen_field(values->GSEnable, 0, 0) |
2420 0;
2421
2422 dw[6] =
2423 __gen_field(values->ControlDataFormat, 31, 31) |
2424 __gen_offset(values->SemaphoreHandle, 0, 12) |
2425 0;
2426
2427 }
2428
2429 #define GEN75_3DSTATE_HIER_DEPTH_BUFFER_length_bias 0x00000002
2430 #define GEN75_3DSTATE_HIER_DEPTH_BUFFER_header \
2431 .CommandType = 3, \
2432 .CommandSubType = 3, \
2433 ._3DCommandOpcode = 0, \
2434 ._3DCommandSubOpcode = 7, \
2435 .DwordLength = 1
2436
2437 #define GEN75_3DSTATE_HIER_DEPTH_BUFFER_length 0x00000003
2438
2439 struct GEN75_3DSTATE_HIER_DEPTH_BUFFER {
2440 uint32_t CommandType;
2441 uint32_t CommandSubType;
2442 uint32_t _3DCommandOpcode;
2443 uint32_t _3DCommandSubOpcode;
2444 uint32_t DwordLength;
2445 struct GEN75_MEMORY_OBJECT_CONTROL_STATE HierarchicalDepthBufferObjectControlState;
2446 uint32_t SurfacePitch;
2447 __gen_address_type SurfaceBaseAddress;
2448 };
2449
2450 static inline void
2451 GEN75_3DSTATE_HIER_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
2452 const struct GEN75_3DSTATE_HIER_DEPTH_BUFFER * restrict values)
2453 {
2454 uint32_t *dw = (uint32_t * restrict) dst;
2455
2456 dw[0] =
2457 __gen_field(values->CommandType, 29, 31) |
2458 __gen_field(values->CommandSubType, 27, 28) |
2459 __gen_field(values->_3DCommandOpcode, 24, 26) |
2460 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2461 __gen_field(values->DwordLength, 0, 7) |
2462 0;
2463
2464 uint32_t dw_HierarchicalDepthBufferObjectControlState;
2465 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_HierarchicalDepthBufferObjectControlState, &values->HierarchicalDepthBufferObjectControlState);
2466 dw[1] =
2467 __gen_field(dw_HierarchicalDepthBufferObjectControlState, 25, 28) |
2468 __gen_field(values->SurfacePitch, 0, 16) |
2469 0;
2470
2471 uint32_t dw2 =
2472 0;
2473
2474 dw[2] =
2475 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
2476
2477 }
2478
2479 #define GEN75_3DSTATE_HS_length_bias 0x00000002
2480 #define GEN75_3DSTATE_HS_header \
2481 .CommandType = 3, \
2482 .CommandSubType = 3, \
2483 ._3DCommandOpcode = 0, \
2484 ._3DCommandSubOpcode = 27, \
2485 .DwordLength = 5
2486
2487 #define GEN75_3DSTATE_HS_length 0x00000007
2488
2489 struct GEN75_3DSTATE_HS {
2490 uint32_t CommandType;
2491 uint32_t CommandSubType;
2492 uint32_t _3DCommandOpcode;
2493 uint32_t _3DCommandSubOpcode;
2494 uint32_t DwordLength;
2495 #define NoSamplers 0
2496 #define _14Samplers 1
2497 #define _58Samplers 2
2498 #define _912Samplers 3
2499 #define _1316Samplers 4
2500 uint32_t SamplerCount;
2501 uint32_t BindingTableEntryCount;
2502 #define Normal 0
2503 #define High 1
2504 uint32_t ThreadDispatchPriority;
2505 #define IEEE754 0
2506 #define alternate 1
2507 uint32_t FloatingPointMode;
2508 bool IllegalOpcodeExceptionEnable;
2509 bool SoftwareExceptionEnable;
2510 uint32_t MaximumNumberofThreads;
2511 bool Enable;
2512 bool StatisticsEnable;
2513 uint32_t InstanceCount;
2514 uint32_t KernelStartPointer;
2515 uint32_t ScratchSpaceBasePointer;
2516 uint32_t PerThreadScratchSpace;
2517 uint32_t SingleProgramFlow;
2518 #define Dmask 0
2519 #define Vmask 1
2520 uint32_t VectorMaskEnable;
2521 bool HSaccessesUAV;
2522 bool IncludeVertexHandles;
2523 uint32_t DispatchGRFStartRegisterForURBData;
2524 uint32_t VertexURBEntryReadLength;
2525 uint32_t VertexURBEntryReadOffset;
2526 uint32_t SemaphoreHandle;
2527 };
2528
2529 static inline void
2530 GEN75_3DSTATE_HS_pack(__gen_user_data *data, void * restrict dst,
2531 const struct GEN75_3DSTATE_HS * restrict values)
2532 {
2533 uint32_t *dw = (uint32_t * restrict) dst;
2534
2535 dw[0] =
2536 __gen_field(values->CommandType, 29, 31) |
2537 __gen_field(values->CommandSubType, 27, 28) |
2538 __gen_field(values->_3DCommandOpcode, 24, 26) |
2539 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2540 __gen_field(values->DwordLength, 0, 7) |
2541 0;
2542
2543 dw[1] =
2544 __gen_field(values->SamplerCount, 27, 29) |
2545 __gen_field(values->BindingTableEntryCount, 18, 25) |
2546 __gen_field(values->ThreadDispatchPriority, 17, 17) |
2547 __gen_field(values->FloatingPointMode, 16, 16) |
2548 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2549 __gen_field(values->SoftwareExceptionEnable, 12, 12) |
2550 __gen_field(values->MaximumNumberofThreads, 0, 7) |
2551 0;
2552
2553 dw[2] =
2554 __gen_field(values->Enable, 31, 31) |
2555 __gen_field(values->StatisticsEnable, 29, 29) |
2556 __gen_field(values->InstanceCount, 0, 3) |
2557 0;
2558
2559 dw[3] =
2560 __gen_offset(values->KernelStartPointer, 6, 31) |
2561 0;
2562
2563 dw[4] =
2564 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
2565 __gen_field(values->PerThreadScratchSpace, 0, 3) |
2566 0;
2567
2568 dw[5] =
2569 __gen_field(values->SingleProgramFlow, 27, 27) |
2570 __gen_field(values->VectorMaskEnable, 26, 26) |
2571 __gen_field(values->HSaccessesUAV, 25, 25) |
2572 __gen_field(values->IncludeVertexHandles, 24, 24) |
2573 __gen_field(values->DispatchGRFStartRegisterForURBData, 19, 23) |
2574 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
2575 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
2576 0;
2577
2578 dw[6] =
2579 __gen_offset(values->SemaphoreHandle, 0, 12) |
2580 0;
2581
2582 }
2583
2584 #define GEN75_3DSTATE_INDEX_BUFFER_length_bias 0x00000002
2585 #define GEN75_3DSTATE_INDEX_BUFFER_header \
2586 .CommandType = 3, \
2587 .CommandSubType = 3, \
2588 ._3DCommandOpcode = 0, \
2589 ._3DCommandSubOpcode = 10, \
2590 .DwordLength = 1
2591
2592 #define GEN75_3DSTATE_INDEX_BUFFER_length 0x00000003
2593
2594 struct GEN75_3DSTATE_INDEX_BUFFER {
2595 uint32_t CommandType;
2596 uint32_t CommandSubType;
2597 uint32_t _3DCommandOpcode;
2598 uint32_t _3DCommandSubOpcode;
2599 struct GEN75_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
2600 #define INDEX_BYTE 0
2601 #define INDEX_WORD 1
2602 #define INDEX_DWORD 2
2603 uint32_t IndexFormat;
2604 uint32_t DwordLength;
2605 __gen_address_type BufferStartingAddress;
2606 __gen_address_type BufferEndingAddress;
2607 };
2608
2609 static inline void
2610 GEN75_3DSTATE_INDEX_BUFFER_pack(__gen_user_data *data, void * restrict dst,
2611 const struct GEN75_3DSTATE_INDEX_BUFFER * restrict values)
2612 {
2613 uint32_t *dw = (uint32_t * restrict) dst;
2614
2615 uint32_t dw_MemoryObjectControlState;
2616 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
2617 dw[0] =
2618 __gen_field(values->CommandType, 29, 31) |
2619 __gen_field(values->CommandSubType, 27, 28) |
2620 __gen_field(values->_3DCommandOpcode, 24, 26) |
2621 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2622 __gen_field(dw_MemoryObjectControlState, 12, 15) |
2623 __gen_field(values->IndexFormat, 8, 9) |
2624 __gen_field(values->DwordLength, 0, 7) |
2625 0;
2626
2627 uint32_t dw1 =
2628 0;
2629
2630 dw[1] =
2631 __gen_combine_address(data, &dw[1], values->BufferStartingAddress, dw1);
2632
2633 uint32_t dw2 =
2634 0;
2635
2636 dw[2] =
2637 __gen_combine_address(data, &dw[2], values->BufferEndingAddress, dw2);
2638
2639 }
2640
2641 #define GEN75_3DSTATE_LINE_STIPPLE_length_bias 0x00000002
2642 #define GEN75_3DSTATE_LINE_STIPPLE_header \
2643 .CommandType = 3, \
2644 .CommandSubType = 3, \
2645 ._3DCommandOpcode = 1, \
2646 ._3DCommandSubOpcode = 8, \
2647 .DwordLength = 1
2648
2649 #define GEN75_3DSTATE_LINE_STIPPLE_length 0x00000003
2650
2651 struct GEN75_3DSTATE_LINE_STIPPLE {
2652 uint32_t CommandType;
2653 uint32_t CommandSubType;
2654 uint32_t _3DCommandOpcode;
2655 uint32_t _3DCommandSubOpcode;
2656 uint32_t DwordLength;
2657 bool ModifyEnableCurrentRepeatCounterCurrentStippleIndex;
2658 uint32_t CurrentRepeatCounter;
2659 uint32_t CurrentStippleIndex;
2660 uint32_t LineStipplePattern;
2661 float LineStippleInverseRepeatCount;
2662 uint32_t LineStippleRepeatCount;
2663 };
2664
2665 static inline void
2666 GEN75_3DSTATE_LINE_STIPPLE_pack(__gen_user_data *data, void * restrict dst,
2667 const struct GEN75_3DSTATE_LINE_STIPPLE * restrict values)
2668 {
2669 uint32_t *dw = (uint32_t * restrict) dst;
2670
2671 dw[0] =
2672 __gen_field(values->CommandType, 29, 31) |
2673 __gen_field(values->CommandSubType, 27, 28) |
2674 __gen_field(values->_3DCommandOpcode, 24, 26) |
2675 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2676 __gen_field(values->DwordLength, 0, 7) |
2677 0;
2678
2679 dw[1] =
2680 __gen_field(values->ModifyEnableCurrentRepeatCounterCurrentStippleIndex, 31, 31) |
2681 __gen_field(values->CurrentRepeatCounter, 21, 29) |
2682 __gen_field(values->CurrentStippleIndex, 16, 19) |
2683 __gen_field(values->LineStipplePattern, 0, 15) |
2684 0;
2685
2686 dw[2] =
2687 __gen_field(values->LineStippleInverseRepeatCount * (1 << 16), 15, 31) |
2688 __gen_field(values->LineStippleRepeatCount, 0, 8) |
2689 0;
2690
2691 }
2692
2693 #define GEN75_3DSTATE_MONOFILTER_SIZE_length_bias 0x00000002
2694 #define GEN75_3DSTATE_MONOFILTER_SIZE_header \
2695 .CommandType = 3, \
2696 .CommandSubType = 3, \
2697 ._3DCommandOpcode = 1, \
2698 ._3DCommandSubOpcode = 17, \
2699 .DwordLength = 0
2700
2701 #define GEN75_3DSTATE_MONOFILTER_SIZE_length 0x00000002
2702
2703 struct GEN75_3DSTATE_MONOFILTER_SIZE {
2704 uint32_t CommandType;
2705 uint32_t CommandSubType;
2706 uint32_t _3DCommandOpcode;
2707 uint32_t _3DCommandSubOpcode;
2708 uint32_t DwordLength;
2709 uint32_t MonochromeFilterWidth;
2710 uint32_t MonochromeFilterHeight;
2711 };
2712
2713 static inline void
2714 GEN75_3DSTATE_MONOFILTER_SIZE_pack(__gen_user_data *data, void * restrict dst,
2715 const struct GEN75_3DSTATE_MONOFILTER_SIZE * restrict values)
2716 {
2717 uint32_t *dw = (uint32_t * restrict) dst;
2718
2719 dw[0] =
2720 __gen_field(values->CommandType, 29, 31) |
2721 __gen_field(values->CommandSubType, 27, 28) |
2722 __gen_field(values->_3DCommandOpcode, 24, 26) |
2723 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2724 __gen_field(values->DwordLength, 0, 7) |
2725 0;
2726
2727 dw[1] =
2728 __gen_field(values->MonochromeFilterWidth, 3, 5) |
2729 __gen_field(values->MonochromeFilterHeight, 0, 2) |
2730 0;
2731
2732 }
2733
2734 #define GEN75_3DSTATE_MULTISAMPLE_length_bias 0x00000002
2735 #define GEN75_3DSTATE_MULTISAMPLE_header \
2736 .CommandType = 3, \
2737 .CommandSubType = 3, \
2738 ._3DCommandOpcode = 1, \
2739 ._3DCommandSubOpcode = 13, \
2740 .DwordLength = 2
2741
2742 #define GEN75_3DSTATE_MULTISAMPLE_length 0x00000004
2743
2744 struct GEN75_3DSTATE_MULTISAMPLE {
2745 uint32_t CommandType;
2746 uint32_t CommandSubType;
2747 uint32_t _3DCommandOpcode;
2748 uint32_t _3DCommandSubOpcode;
2749 uint32_t DwordLength;
2750 bool MultiSampleEnable;
2751 #define PIXLOC_CENTER 0
2752 #define PIXLOC_UL_CORNER 1
2753 uint32_t PixelLocation;
2754 #define NUMSAMPLES_1 0
2755 #define NUMSAMPLES_4 2
2756 #define NUMSAMPLES_8 3
2757 uint32_t NumberofMultisamples;
2758 float Sample3XOffset;
2759 float Sample3YOffset;
2760 float Sample2XOffset;
2761 float Sample2YOffset;
2762 float Sample1XOffset;
2763 float Sample1YOffset;
2764 float Sample0XOffset;
2765 float Sample0YOffset;
2766 float Sample7XOffset;
2767 float Sample7YOffset;
2768 float Sample6XOffset;
2769 float Sample6YOffset;
2770 float Sample5XOffset;
2771 float Sample5YOffset;
2772 float Sample4XOffset;
2773 float Sample4YOffset;
2774 };
2775
2776 static inline void
2777 GEN75_3DSTATE_MULTISAMPLE_pack(__gen_user_data *data, void * restrict dst,
2778 const struct GEN75_3DSTATE_MULTISAMPLE * restrict values)
2779 {
2780 uint32_t *dw = (uint32_t * restrict) dst;
2781
2782 dw[0] =
2783 __gen_field(values->CommandType, 29, 31) |
2784 __gen_field(values->CommandSubType, 27, 28) |
2785 __gen_field(values->_3DCommandOpcode, 24, 26) |
2786 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2787 __gen_field(values->DwordLength, 0, 7) |
2788 0;
2789
2790 dw[1] =
2791 __gen_field(values->MultiSampleEnable, 5, 5) |
2792 __gen_field(values->PixelLocation, 4, 4) |
2793 __gen_field(values->NumberofMultisamples, 1, 3) |
2794 0;
2795
2796 dw[2] =
2797 __gen_field(values->Sample3XOffset * (1 << 4), 28, 31) |
2798 __gen_field(values->Sample3YOffset * (1 << 4), 24, 27) |
2799 __gen_field(values->Sample2XOffset * (1 << 4), 20, 23) |
2800 __gen_field(values->Sample2YOffset * (1 << 4), 16, 19) |
2801 __gen_field(values->Sample1XOffset * (1 << 4), 12, 15) |
2802 __gen_field(values->Sample1YOffset * (1 << 4), 8, 11) |
2803 __gen_field(values->Sample0XOffset * (1 << 4), 4, 7) |
2804 __gen_field(values->Sample0YOffset * (1 << 4), 0, 3) |
2805 0;
2806
2807 dw[3] =
2808 __gen_field(values->Sample7XOffset * (1 << 4), 28, 31) |
2809 __gen_field(values->Sample7YOffset * (1 << 4), 24, 27) |
2810 __gen_field(values->Sample6XOffset * (1 << 4), 20, 23) |
2811 __gen_field(values->Sample6YOffset * (1 << 4), 16, 19) |
2812 __gen_field(values->Sample5XOffset * (1 << 4), 12, 15) |
2813 __gen_field(values->Sample5YOffset * (1 << 4), 8, 11) |
2814 __gen_field(values->Sample4XOffset * (1 << 4), 4, 7) |
2815 __gen_field(values->Sample4YOffset * (1 << 4), 0, 3) |
2816 0;
2817
2818 }
2819
2820 #define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_length_bias 0x00000002
2821 #define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_header\
2822 .CommandType = 3, \
2823 .CommandSubType = 3, \
2824 ._3DCommandOpcode = 1, \
2825 ._3DCommandSubOpcode = 6, \
2826 .DwordLength = 0
2827
2828 #define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_length 0x00000002
2829
2830 struct GEN75_3DSTATE_POLY_STIPPLE_OFFSET {
2831 uint32_t CommandType;
2832 uint32_t CommandSubType;
2833 uint32_t _3DCommandOpcode;
2834 uint32_t _3DCommandSubOpcode;
2835 uint32_t DwordLength;
2836 uint32_t PolygonStippleXOffset;
2837 uint32_t PolygonStippleYOffset;
2838 };
2839
2840 static inline void
2841 GEN75_3DSTATE_POLY_STIPPLE_OFFSET_pack(__gen_user_data *data, void * restrict dst,
2842 const struct GEN75_3DSTATE_POLY_STIPPLE_OFFSET * restrict values)
2843 {
2844 uint32_t *dw = (uint32_t * restrict) dst;
2845
2846 dw[0] =
2847 __gen_field(values->CommandType, 29, 31) |
2848 __gen_field(values->CommandSubType, 27, 28) |
2849 __gen_field(values->_3DCommandOpcode, 24, 26) |
2850 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2851 __gen_field(values->DwordLength, 0, 7) |
2852 0;
2853
2854 dw[1] =
2855 __gen_field(values->PolygonStippleXOffset, 8, 12) |
2856 __gen_field(values->PolygonStippleYOffset, 0, 4) |
2857 0;
2858
2859 }
2860
2861 #define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_length_bias 0x00000002
2862 #define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_header\
2863 .CommandType = 3, \
2864 .CommandSubType = 3, \
2865 ._3DCommandOpcode = 1, \
2866 ._3DCommandSubOpcode = 7, \
2867 .DwordLength = 31
2868
2869 #define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_length 0x00000021
2870
2871 struct GEN75_3DSTATE_POLY_STIPPLE_PATTERN {
2872 uint32_t CommandType;
2873 uint32_t CommandSubType;
2874 uint32_t _3DCommandOpcode;
2875 uint32_t _3DCommandSubOpcode;
2876 uint32_t DwordLength;
2877 uint32_t PatternRow[32];
2878 };
2879
2880 static inline void
2881 GEN75_3DSTATE_POLY_STIPPLE_PATTERN_pack(__gen_user_data *data, void * restrict dst,
2882 const struct GEN75_3DSTATE_POLY_STIPPLE_PATTERN * restrict values)
2883 {
2884 uint32_t *dw = (uint32_t * restrict) dst;
2885
2886 dw[0] =
2887 __gen_field(values->CommandType, 29, 31) |
2888 __gen_field(values->CommandSubType, 27, 28) |
2889 __gen_field(values->_3DCommandOpcode, 24, 26) |
2890 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2891 __gen_field(values->DwordLength, 0, 7) |
2892 0;
2893
2894 for (uint32_t i = 0, j = 1; i < 32; i += 1, j++) {
2895 dw[j] =
2896 __gen_field(values->PatternRow[i + 0], 0, 31) |
2897 0;
2898 }
2899
2900 }
2901
2902 #define GEN75_3DSTATE_PS_length_bias 0x00000002
2903 #define GEN75_3DSTATE_PS_header \
2904 .CommandType = 3, \
2905 .CommandSubType = 3, \
2906 ._3DCommandOpcode = 0, \
2907 ._3DCommandSubOpcode = 32, \
2908 .DwordLength = 6
2909
2910 #define GEN75_3DSTATE_PS_length 0x00000008
2911
2912 struct GEN75_3DSTATE_PS {
2913 uint32_t CommandType;
2914 uint32_t CommandSubType;
2915 uint32_t _3DCommandOpcode;
2916 uint32_t _3DCommandSubOpcode;
2917 uint32_t DwordLength;
2918 uint32_t KernelStartPointer0;
2919 #define Multiple 0
2920 #define Single 1
2921 uint32_t SingleProgramFlowSPF;
2922 #define Dmask 0
2923 #define Vmask 1
2924 uint32_t VectorMaskEnableVME;
2925 uint32_t SamplerCount;
2926 #define FTZ 0
2927 #define RET 1
2928 uint32_t DenormalMode;
2929 uint32_t BindingTableEntryCount;
2930 #define Normal 0
2931 #define High 1
2932 uint32_t ThreadPriority;
2933 #define IEEE745 0
2934 #define Alt 1
2935 uint32_t FloatingPointMode;
2936 #define RTNE 0
2937 #define RU 1
2938 #define RD 2
2939 #define RTZ 3
2940 uint32_t RoundingMode;
2941 bool IllegalOpcodeExceptionEnable;
2942 bool MaskStackExceptionEnable;
2943 bool SoftwareExceptionEnable;
2944 uint32_t ScratchSpaceBasePointer;
2945 uint32_t PerThreadScratchSpace;
2946 uint32_t MaximumNumberofThreads;
2947 uint32_t SampleMask;
2948 bool PushConstantEnable;
2949 bool AttributeEnable;
2950 bool oMaskPresenttoRenderTarget;
2951 bool RenderTargetFastClearEnable;
2952 bool DualSourceBlendEnable;
2953 bool RenderTargetResolveEnable;
2954 bool PSAccessesUAV;
2955 #define POSOFFSET_NONE 0
2956 #define POSOFFSET_CENTROID 2
2957 #define POSOFFSET_SAMPLE 3
2958 uint32_t PositionXYOffsetSelect;
2959 bool _32PixelDispatchEnable;
2960 bool _16PixelDispatchEnable;
2961 bool _8PixelDispatchEnable;
2962 uint32_t DispatchGRFStartRegisterforConstantSetupData0;
2963 uint32_t DispatchGRFStartRegisterforConstantSetupData1;
2964 uint32_t DispatchGRFStartRegisterforConstantSetupData2;
2965 uint32_t KernelStartPointer1;
2966 uint32_t KernelStartPointer2;
2967 };
2968
2969 static inline void
2970 GEN75_3DSTATE_PS_pack(__gen_user_data *data, void * restrict dst,
2971 const struct GEN75_3DSTATE_PS * restrict values)
2972 {
2973 uint32_t *dw = (uint32_t * restrict) dst;
2974
2975 dw[0] =
2976 __gen_field(values->CommandType, 29, 31) |
2977 __gen_field(values->CommandSubType, 27, 28) |
2978 __gen_field(values->_3DCommandOpcode, 24, 26) |
2979 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2980 __gen_field(values->DwordLength, 0, 7) |
2981 0;
2982
2983 dw[1] =
2984 __gen_offset(values->KernelStartPointer0, 6, 31) |
2985 0;
2986
2987 dw[2] =
2988 __gen_field(values->SingleProgramFlowSPF, 31, 31) |
2989 __gen_field(values->VectorMaskEnableVME, 30, 30) |
2990 __gen_field(values->SamplerCount, 27, 29) |
2991 __gen_field(values->DenormalMode, 26, 26) |
2992 __gen_field(values->BindingTableEntryCount, 18, 25) |
2993 __gen_field(values->ThreadPriority, 17, 17) |
2994 __gen_field(values->FloatingPointMode, 16, 16) |
2995 __gen_field(values->RoundingMode, 14, 15) |
2996 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2997 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
2998 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
2999 0;
3000
3001 dw[3] =
3002 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
3003 __gen_field(values->PerThreadScratchSpace, 0, 3) |
3004 0;
3005
3006 dw[4] =
3007 __gen_field(values->MaximumNumberofThreads, 23, 31) |
3008 __gen_field(values->SampleMask, 12, 19) |
3009 __gen_field(values->PushConstantEnable, 11, 11) |
3010 __gen_field(values->AttributeEnable, 10, 10) |
3011 __gen_field(values->oMaskPresenttoRenderTarget, 9, 9) |
3012 __gen_field(values->RenderTargetFastClearEnable, 8, 8) |
3013 __gen_field(values->DualSourceBlendEnable, 7, 7) |
3014 __gen_field(values->RenderTargetResolveEnable, 6, 6) |
3015 __gen_field(values->PSAccessesUAV, 5, 5) |
3016 __gen_field(values->PositionXYOffsetSelect, 3, 4) |
3017 __gen_field(values->_32PixelDispatchEnable, 2, 2) |
3018 __gen_field(values->_16PixelDispatchEnable, 1, 1) |
3019 __gen_field(values->_8PixelDispatchEnable, 0, 0) |
3020 0;
3021
3022 dw[5] =
3023 __gen_field(values->DispatchGRFStartRegisterforConstantSetupData0, 16, 22) |
3024 __gen_field(values->DispatchGRFStartRegisterforConstantSetupData1, 8, 14) |
3025 __gen_field(values->DispatchGRFStartRegisterforConstantSetupData2, 0, 6) |
3026 0;
3027
3028 dw[6] =
3029 __gen_offset(values->KernelStartPointer1, 6, 31) |
3030 0;
3031
3032 dw[7] =
3033 __gen_offset(values->KernelStartPointer2, 6, 31) |
3034 0;
3035
3036 }
3037
3038 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length_bias 0x00000002
3039 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_header\
3040 .CommandType = 3, \
3041 .CommandSubType = 3, \
3042 ._3DCommandOpcode = 1, \
3043 ._3DCommandSubOpcode = 20, \
3044 .DwordLength = 0
3045
3046 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length 0x00000002
3047
3048 struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS {
3049 uint32_t CommandType;
3050 uint32_t CommandSubType;
3051 uint32_t _3DCommandOpcode;
3052 uint32_t _3DCommandSubOpcode;
3053 uint32_t DwordLength;
3054 uint32_t ConstantBufferOffset;
3055 uint32_t ConstantBufferSize;
3056 };
3057
3058 static inline void
3059 GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_pack(__gen_user_data *data, void * restrict dst,
3060 const struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS * restrict values)
3061 {
3062 uint32_t *dw = (uint32_t * restrict) dst;
3063
3064 dw[0] =
3065 __gen_field(values->CommandType, 29, 31) |
3066 __gen_field(values->CommandSubType, 27, 28) |
3067 __gen_field(values->_3DCommandOpcode, 24, 26) |
3068 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3069 __gen_field(values->DwordLength, 0, 7) |
3070 0;
3071
3072 dw[1] =
3073 __gen_field(values->ConstantBufferOffset, 16, 20) |
3074 __gen_field(values->ConstantBufferSize, 0, 5) |
3075 0;
3076
3077 }
3078
3079 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length_bias 0x00000002
3080 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_header\
3081 .CommandType = 3, \
3082 .CommandSubType = 3, \
3083 ._3DCommandOpcode = 1, \
3084 ._3DCommandSubOpcode = 21, \
3085 .DwordLength = 0
3086
3087 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length 0x00000002
3088
3089 struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS {
3090 uint32_t CommandType;
3091 uint32_t CommandSubType;
3092 uint32_t _3DCommandOpcode;
3093 uint32_t _3DCommandSubOpcode;
3094 uint32_t DwordLength;
3095 uint32_t ConstantBufferOffset;
3096 uint32_t ConstantBufferSize;
3097 };
3098
3099 static inline void
3100 GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_pack(__gen_user_data *data, void * restrict dst,
3101 const struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS * restrict values)
3102 {
3103 uint32_t *dw = (uint32_t * restrict) dst;
3104
3105 dw[0] =
3106 __gen_field(values->CommandType, 29, 31) |
3107 __gen_field(values->CommandSubType, 27, 28) |
3108 __gen_field(values->_3DCommandOpcode, 24, 26) |
3109 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3110 __gen_field(values->DwordLength, 0, 7) |
3111 0;
3112
3113 dw[1] =
3114 __gen_field(values->ConstantBufferOffset, 16, 20) |
3115 __gen_field(values->ConstantBufferSize, 0, 5) |
3116 0;
3117
3118 }
3119
3120 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length_bias 0x00000002
3121 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_header\
3122 .CommandType = 3, \
3123 .CommandSubType = 3, \
3124 ._3DCommandOpcode = 1, \
3125 ._3DCommandSubOpcode = 19, \
3126 .DwordLength = 0
3127
3128 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length 0x00000002
3129
3130 struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS {
3131 uint32_t CommandType;
3132 uint32_t CommandSubType;
3133 uint32_t _3DCommandOpcode;
3134 uint32_t _3DCommandSubOpcode;
3135 uint32_t DwordLength;
3136 uint32_t ConstantBufferOffset;
3137 uint32_t ConstantBufferSize;
3138 };
3139
3140 static inline void
3141 GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_pack(__gen_user_data *data, void * restrict dst,
3142 const struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS * restrict values)
3143 {
3144 uint32_t *dw = (uint32_t * restrict) dst;
3145
3146 dw[0] =
3147 __gen_field(values->CommandType, 29, 31) |
3148 __gen_field(values->CommandSubType, 27, 28) |
3149 __gen_field(values->_3DCommandOpcode, 24, 26) |
3150 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3151 __gen_field(values->DwordLength, 0, 7) |
3152 0;
3153
3154 dw[1] =
3155 __gen_field(values->ConstantBufferOffset, 16, 20) |
3156 __gen_field(values->ConstantBufferSize, 0, 5) |
3157 0;
3158
3159 }
3160
3161 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length_bias 0x00000002
3162 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_header\
3163 .CommandType = 3, \
3164 .CommandSubType = 3, \
3165 ._3DCommandOpcode = 1, \
3166 ._3DCommandSubOpcode = 22, \
3167 .DwordLength = 0
3168
3169 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length 0x00000002
3170
3171 struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS {
3172 uint32_t CommandType;
3173 uint32_t CommandSubType;
3174 uint32_t _3DCommandOpcode;
3175 uint32_t _3DCommandSubOpcode;
3176 uint32_t DwordLength;
3177 uint32_t ConstantBufferOffset;
3178 uint32_t ConstantBufferSize;
3179 };
3180
3181 static inline void
3182 GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_pack(__gen_user_data *data, void * restrict dst,
3183 const struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS * restrict values)
3184 {
3185 uint32_t *dw = (uint32_t * restrict) dst;
3186
3187 dw[0] =
3188 __gen_field(values->CommandType, 29, 31) |
3189 __gen_field(values->CommandSubType, 27, 28) |
3190 __gen_field(values->_3DCommandOpcode, 24, 26) |
3191 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3192 __gen_field(values->DwordLength, 0, 7) |
3193 0;
3194
3195 dw[1] =
3196 __gen_field(values->ConstantBufferOffset, 16, 20) |
3197 __gen_field(values->ConstantBufferSize, 0, 5) |
3198 0;
3199
3200 }
3201
3202 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length_bias 0x00000002
3203 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_header\
3204 .CommandType = 3, \
3205 .CommandSubType = 3, \
3206 ._3DCommandOpcode = 1, \
3207 ._3DCommandSubOpcode = 18, \
3208 .DwordLength = 0
3209
3210 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length 0x00000002
3211
3212 struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS {
3213 uint32_t CommandType;
3214 uint32_t CommandSubType;
3215 uint32_t _3DCommandOpcode;
3216 uint32_t _3DCommandSubOpcode;
3217 uint32_t DwordLength;
3218 uint32_t ConstantBufferOffset;
3219 uint32_t ConstantBufferSize;
3220 };
3221
3222 static inline void
3223 GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_pack(__gen_user_data *data, void * restrict dst,
3224 const struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS * restrict values)
3225 {
3226 uint32_t *dw = (uint32_t * restrict) dst;
3227
3228 dw[0] =
3229 __gen_field(values->CommandType, 29, 31) |
3230 __gen_field(values->CommandSubType, 27, 28) |
3231 __gen_field(values->_3DCommandOpcode, 24, 26) |
3232 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3233 __gen_field(values->DwordLength, 0, 7) |
3234 0;
3235
3236 dw[1] =
3237 __gen_field(values->ConstantBufferOffset, 16, 20) |
3238 __gen_field(values->ConstantBufferSize, 0, 5) |
3239 0;
3240
3241 }
3242
3243 #define GEN75_3DSTATE_RAST_MULTISAMPLE_length_bias 0x00000002
3244 #define GEN75_3DSTATE_RAST_MULTISAMPLE_header \
3245 .CommandType = 3, \
3246 .CommandSubType = 3, \
3247 ._3DCommandOpcode = 1, \
3248 ._3DCommandSubOpcode = 14, \
3249 .DwordLength = 4
3250
3251 #define GEN75_3DSTATE_RAST_MULTISAMPLE_length 0x00000006
3252
3253 struct GEN75_3DSTATE_RAST_MULTISAMPLE {
3254 uint32_t CommandType;
3255 uint32_t CommandSubType;
3256 uint32_t _3DCommandOpcode;
3257 uint32_t _3DCommandSubOpcode;
3258 uint32_t DwordLength;
3259 #define NRM_NUMRASTSAMPLES_1 0
3260 #define NRM_NUMRASTSAMPLES_2 1
3261 #define NRM_NUMRASTSAMPLES_4 2
3262 #define NRM_NUMRASTSAMPLES_8 3
3263 #define NRM_NUMRASTSAMPLES_16 4
3264 uint32_t NumberofRasterizationMultisamples;
3265 float Sample3XOffset;
3266 float Sample3YOffset;
3267 float Sample2XOffset;
3268 float Sample2YOffset;
3269 float Sample1XOffset;
3270 float Sample1YOffset;
3271 float Sample0XOffset;
3272 float Sample0YOffset;
3273 float Sample7XOffset;
3274 float Sample7YOffset;
3275 float Sample6XOffset;
3276 float Sample6YOffset;
3277 float Sample5XOffset;
3278 float Sample5YOffset;
3279 float Sample4XOffset;
3280 float Sample4YOffset;
3281 float Sample11XOffset;
3282 float Sample11YOffset;
3283 float Sample10XOffset;
3284 float Sample10YOffset;
3285 float Sample9XOffset;
3286 float Sample9YOffset;
3287 float Sample8XOffset;
3288 float Sample8YOffset;
3289 float Sample15XOffset;
3290 float Sample15YOffset;
3291 float Sample14XOffset;
3292 float Sample14YOffset;
3293 float Sample13XOffset;
3294 float Sample13YOffset;
3295 float Sample12XOffset;
3296 float Sample12YOffset;
3297 };
3298
3299 static inline void
3300 GEN75_3DSTATE_RAST_MULTISAMPLE_pack(__gen_user_data *data, void * restrict dst,
3301 const struct GEN75_3DSTATE_RAST_MULTISAMPLE * restrict values)
3302 {
3303 uint32_t *dw = (uint32_t * restrict) dst;
3304
3305 dw[0] =
3306 __gen_field(values->CommandType, 29, 31) |
3307 __gen_field(values->CommandSubType, 27, 28) |
3308 __gen_field(values->_3DCommandOpcode, 24, 26) |
3309 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3310 __gen_field(values->DwordLength, 0, 7) |
3311 0;
3312
3313 dw[1] =
3314 __gen_field(values->NumberofRasterizationMultisamples, 1, 3) |
3315 0;
3316
3317 dw[2] =
3318 __gen_field(values->Sample3XOffset * (1 << 4), 28, 31) |
3319 __gen_field(values->Sample3YOffset * (1 << 4), 24, 27) |
3320 __gen_field(values->Sample2XOffset * (1 << 4), 20, 23) |
3321 __gen_field(values->Sample2YOffset * (1 << 4), 16, 19) |
3322 __gen_field(values->Sample1XOffset * (1 << 4), 12, 15) |
3323 __gen_field(values->Sample1YOffset * (1 << 4), 8, 11) |
3324 __gen_field(values->Sample0XOffset * (1 << 4), 4, 7) |
3325 __gen_field(values->Sample0YOffset * (1 << 4), 0, 3) |
3326 0;
3327
3328 dw[3] =
3329 __gen_field(values->Sample7XOffset * (1 << 4), 28, 31) |
3330 __gen_field(values->Sample7YOffset * (1 << 4), 24, 27) |
3331 __gen_field(values->Sample6XOffset * (1 << 4), 20, 23) |
3332 __gen_field(values->Sample6YOffset * (1 << 4), 16, 19) |
3333 __gen_field(values->Sample5XOffset * (1 << 4), 12, 15) |
3334 __gen_field(values->Sample5YOffset * (1 << 4), 8, 11) |
3335 __gen_field(values->Sample4XOffset * (1 << 4), 4, 7) |
3336 __gen_field(values->Sample4YOffset * (1 << 4), 0, 3) |
3337 0;
3338
3339 dw[4] =
3340 __gen_field(values->Sample11XOffset * (1 << 4), 28, 31) |
3341 __gen_field(values->Sample11YOffset * (1 << 4), 24, 27) |
3342 __gen_field(values->Sample10XOffset * (1 << 4), 20, 23) |
3343 __gen_field(values->Sample10YOffset * (1 << 4), 16, 19) |
3344 __gen_field(values->Sample9XOffset * (1 << 4), 12, 15) |
3345 __gen_field(values->Sample9YOffset * (1 << 4), 8, 11) |
3346 __gen_field(values->Sample8XOffset * (1 << 4), 4, 7) |
3347 __gen_field(values->Sample8YOffset * (1 << 4), 0, 3) |
3348 0;
3349
3350 dw[5] =
3351 __gen_field(values->Sample15XOffset * (1 << 4), 28, 31) |
3352 __gen_field(values->Sample15YOffset * (1 << 4), 24, 27) |
3353 __gen_field(values->Sample14XOffset * (1 << 4), 20, 23) |
3354 __gen_field(values->Sample14YOffset * (1 << 4), 16, 19) |
3355 __gen_field(values->Sample13XOffset * (1 << 4), 12, 15) |
3356 __gen_field(values->Sample13YOffset * (1 << 4), 8, 11) |
3357 __gen_field(values->Sample12XOffset * (1 << 4), 4, 7) |
3358 __gen_field(values->Sample12YOffset * (1 << 4), 0, 3) |
3359 0;
3360
3361 }
3362
3363 #define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_length_bias 0x00000002
3364 #define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_header\
3365 .CommandType = 3, \
3366 .CommandSubType = 3, \
3367 ._3DCommandOpcode = 1, \
3368 ._3DCommandSubOpcode = 2
3369
3370 #define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_length 0x00000000
3371
3372 #define GEN75_PALETTE_ENTRY_length 0x00000001
3373
3374 struct GEN75_PALETTE_ENTRY {
3375 uint32_t Alpha;
3376 uint32_t Red;
3377 uint32_t Green;
3378 uint32_t Blue;
3379 };
3380
3381 static inline void
3382 GEN75_PALETTE_ENTRY_pack(__gen_user_data *data, void * restrict dst,
3383 const struct GEN75_PALETTE_ENTRY * restrict values)
3384 {
3385 uint32_t *dw = (uint32_t * restrict) dst;
3386
3387 dw[0] =
3388 __gen_field(values->Alpha, 24, 31) |
3389 __gen_field(values->Red, 16, 23) |
3390 __gen_field(values->Green, 8, 15) |
3391 __gen_field(values->Blue, 0, 7) |
3392 0;
3393
3394 }
3395
3396 struct GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0 {
3397 uint32_t CommandType;
3398 uint32_t CommandSubType;
3399 uint32_t _3DCommandOpcode;
3400 uint32_t _3DCommandSubOpcode;
3401 uint32_t DwordLength;
3402 /* variable length fields follow */
3403 };
3404
3405 static inline void
3406 GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_pack(__gen_user_data *data, void * restrict dst,
3407 const struct GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0 * restrict values)
3408 {
3409 uint32_t *dw = (uint32_t * restrict) dst;
3410
3411 dw[0] =
3412 __gen_field(values->CommandType, 29, 31) |
3413 __gen_field(values->CommandSubType, 27, 28) |
3414 __gen_field(values->_3DCommandOpcode, 24, 26) |
3415 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3416 __gen_field(values->DwordLength, 0, 7) |
3417 0;
3418
3419 /* variable length fields follow */
3420 }
3421
3422 #define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_length_bias 0x00000002
3423 #define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_header\
3424 .CommandType = 3, \
3425 .CommandSubType = 3, \
3426 ._3DCommandOpcode = 1, \
3427 ._3DCommandSubOpcode = 12
3428
3429 #define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_length 0x00000000
3430
3431 struct GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1 {
3432 uint32_t CommandType;
3433 uint32_t CommandSubType;
3434 uint32_t _3DCommandOpcode;
3435 uint32_t _3DCommandSubOpcode;
3436 uint32_t DwordLength;
3437 /* variable length fields follow */
3438 };
3439
3440 static inline void
3441 GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_pack(__gen_user_data *data, void * restrict dst,
3442 const struct GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1 * restrict values)
3443 {
3444 uint32_t *dw = (uint32_t * restrict) dst;
3445
3446 dw[0] =
3447 __gen_field(values->CommandType, 29, 31) |
3448 __gen_field(values->CommandSubType, 27, 28) |
3449 __gen_field(values->_3DCommandOpcode, 24, 26) |
3450 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3451 __gen_field(values->DwordLength, 0, 7) |
3452 0;
3453
3454 /* variable length fields follow */
3455 }
3456
3457 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_length_bias 0x00000002
3458 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_header\
3459 .CommandType = 3, \
3460 .CommandSubType = 3, \
3461 ._3DCommandOpcode = 0, \
3462 ._3DCommandSubOpcode = 45, \
3463 .DwordLength = 0
3464
3465 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_length 0x00000002
3466
3467 struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS {
3468 uint32_t CommandType;
3469 uint32_t CommandSubType;
3470 uint32_t _3DCommandOpcode;
3471 uint32_t _3DCommandSubOpcode;
3472 uint32_t DwordLength;
3473 uint32_t PointertoDSSamplerState;
3474 };
3475
3476 static inline void
3477 GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
3478 const struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS * restrict values)
3479 {
3480 uint32_t *dw = (uint32_t * restrict) dst;
3481
3482 dw[0] =
3483 __gen_field(values->CommandType, 29, 31) |
3484 __gen_field(values->CommandSubType, 27, 28) |
3485 __gen_field(values->_3DCommandOpcode, 24, 26) |
3486 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3487 __gen_field(values->DwordLength, 0, 7) |
3488 0;
3489
3490 dw[1] =
3491 __gen_offset(values->PointertoDSSamplerState, 5, 31) |
3492 0;
3493
3494 }
3495
3496 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_length_bias 0x00000002
3497 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_header\
3498 .CommandType = 3, \
3499 .CommandSubType = 3, \
3500 ._3DCommandOpcode = 0, \
3501 ._3DCommandSubOpcode = 46, \
3502 .DwordLength = 0
3503
3504 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_length 0x00000002
3505
3506 struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS {
3507 uint32_t CommandType;
3508 uint32_t CommandSubType;
3509 uint32_t _3DCommandOpcode;
3510 uint32_t _3DCommandSubOpcode;
3511 uint32_t DwordLength;
3512 uint32_t PointertoGSSamplerState;
3513 };
3514
3515 static inline void
3516 GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
3517 const struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS * restrict values)
3518 {
3519 uint32_t *dw = (uint32_t * restrict) dst;
3520
3521 dw[0] =
3522 __gen_field(values->CommandType, 29, 31) |
3523 __gen_field(values->CommandSubType, 27, 28) |
3524 __gen_field(values->_3DCommandOpcode, 24, 26) |
3525 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3526 __gen_field(values->DwordLength, 0, 7) |
3527 0;
3528
3529 dw[1] =
3530 __gen_offset(values->PointertoGSSamplerState, 5, 31) |
3531 0;
3532
3533 }
3534
3535 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_length_bias 0x00000002
3536 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_header\
3537 .CommandType = 3, \
3538 .CommandSubType = 3, \
3539 ._3DCommandOpcode = 0, \
3540 ._3DCommandSubOpcode = 44, \
3541 .DwordLength = 0
3542
3543 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_length 0x00000002
3544
3545 struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS {
3546 uint32_t CommandType;
3547 uint32_t CommandSubType;
3548 uint32_t _3DCommandOpcode;
3549 uint32_t _3DCommandSubOpcode;
3550 uint32_t DwordLength;
3551 uint32_t PointertoHSSamplerState;
3552 };
3553
3554 static inline void
3555 GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
3556 const struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS * restrict values)
3557 {
3558 uint32_t *dw = (uint32_t * restrict) dst;
3559
3560 dw[0] =
3561 __gen_field(values->CommandType, 29, 31) |
3562 __gen_field(values->CommandSubType, 27, 28) |
3563 __gen_field(values->_3DCommandOpcode, 24, 26) |
3564 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3565 __gen_field(values->DwordLength, 0, 7) |
3566 0;
3567
3568 dw[1] =
3569 __gen_offset(values->PointertoHSSamplerState, 5, 31) |
3570 0;
3571
3572 }
3573
3574 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_length_bias 0x00000002
3575 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_header\
3576 .CommandType = 3, \
3577 .CommandSubType = 3, \
3578 ._3DCommandOpcode = 0, \
3579 ._3DCommandSubOpcode = 47, \
3580 .DwordLength = 0
3581
3582 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_length 0x00000002
3583
3584 struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS {
3585 uint32_t CommandType;
3586 uint32_t CommandSubType;
3587 uint32_t _3DCommandOpcode;
3588 uint32_t _3DCommandSubOpcode;
3589 uint32_t DwordLength;
3590 uint32_t PointertoPSSamplerState;
3591 };
3592
3593 static inline void
3594 GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
3595 const struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS * restrict values)
3596 {
3597 uint32_t *dw = (uint32_t * restrict) dst;
3598
3599 dw[0] =
3600 __gen_field(values->CommandType, 29, 31) |
3601 __gen_field(values->CommandSubType, 27, 28) |
3602 __gen_field(values->_3DCommandOpcode, 24, 26) |
3603 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3604 __gen_field(values->DwordLength, 0, 7) |
3605 0;
3606
3607 dw[1] =
3608 __gen_offset(values->PointertoPSSamplerState, 5, 31) |
3609 0;
3610
3611 }
3612
3613 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_length_bias 0x00000002
3614 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_header\
3615 .CommandType = 3, \
3616 .CommandSubType = 3, \
3617 ._3DCommandOpcode = 0, \
3618 ._3DCommandSubOpcode = 43, \
3619 .DwordLength = 0
3620
3621 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_length 0x00000002
3622
3623 struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS {
3624 uint32_t CommandType;
3625 uint32_t CommandSubType;
3626 uint32_t _3DCommandOpcode;
3627 uint32_t _3DCommandSubOpcode;
3628 uint32_t DwordLength;
3629 uint32_t PointertoVSSamplerState;
3630 };
3631
3632 static inline void
3633 GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
3634 const struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS * restrict values)
3635 {
3636 uint32_t *dw = (uint32_t * restrict) dst;
3637
3638 dw[0] =
3639 __gen_field(values->CommandType, 29, 31) |
3640 __gen_field(values->CommandSubType, 27, 28) |
3641 __gen_field(values->_3DCommandOpcode, 24, 26) |
3642 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3643 __gen_field(values->DwordLength, 0, 7) |
3644 0;
3645
3646 dw[1] =
3647 __gen_offset(values->PointertoVSSamplerState, 5, 31) |
3648 0;
3649
3650 }
3651
3652 #define GEN75_3DSTATE_SAMPLE_MASK_length_bias 0x00000002
3653 #define GEN75_3DSTATE_SAMPLE_MASK_header \
3654 .CommandType = 3, \
3655 .CommandSubType = 3, \
3656 ._3DCommandOpcode = 0, \
3657 ._3DCommandSubOpcode = 24, \
3658 .DwordLength = 0
3659
3660 #define GEN75_3DSTATE_SAMPLE_MASK_length 0x00000002
3661
3662 struct GEN75_3DSTATE_SAMPLE_MASK {
3663 uint32_t CommandType;
3664 uint32_t CommandSubType;
3665 uint32_t _3DCommandOpcode;
3666 uint32_t _3DCommandSubOpcode;
3667 uint32_t DwordLength;
3668 uint32_t SampleMask;
3669 };
3670
3671 static inline void
3672 GEN75_3DSTATE_SAMPLE_MASK_pack(__gen_user_data *data, void * restrict dst,
3673 const struct GEN75_3DSTATE_SAMPLE_MASK * restrict values)
3674 {
3675 uint32_t *dw = (uint32_t * restrict) dst;
3676
3677 dw[0] =
3678 __gen_field(values->CommandType, 29, 31) |
3679 __gen_field(values->CommandSubType, 27, 28) |
3680 __gen_field(values->_3DCommandOpcode, 24, 26) |
3681 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3682 __gen_field(values->DwordLength, 0, 7) |
3683 0;
3684
3685 dw[1] =
3686 __gen_field(values->SampleMask, 0, 7) |
3687 0;
3688
3689 }
3690
3691 #define GEN75_3DSTATE_SBE_length_bias 0x00000002
3692 #define GEN75_3DSTATE_SBE_header \
3693 .CommandType = 3, \
3694 .CommandSubType = 3, \
3695 ._3DCommandOpcode = 0, \
3696 ._3DCommandSubOpcode = 31, \
3697 .DwordLength = 12
3698
3699 #define GEN75_3DSTATE_SBE_length 0x0000000e
3700
3701 struct GEN75_3DSTATE_SBE {
3702 uint32_t CommandType;
3703 uint32_t CommandSubType;
3704 uint32_t _3DCommandOpcode;
3705 uint32_t _3DCommandSubOpcode;
3706 uint32_t DwordLength;
3707 uint32_t AttributeSwizzleControlMode;
3708 uint32_t NumberofSFOutputAttributes;
3709 bool AttributeSwizzleEnable;
3710 #define UPPERLEFT 0
3711 #define LOWERLEFT 1
3712 uint32_t PointSpriteTextureCoordinateOrigin;
3713 uint32_t VertexURBEntryReadLength;
3714 uint32_t VertexURBEntryReadOffset;
3715 bool Attribute2n1ComponentOverrideW;
3716 bool Attribute2n1ComponentOverrideZ;
3717 bool Attribute2n1ComponentOverrideY;
3718 bool Attribute2n1ComponentOverrideX;
3719 #define CONST_0000 0
3720 #define CONST_0001_FLOAT 1
3721 #define CONST_1111_FLOAT 2
3722 #define PRIM_ID 3
3723 uint32_t Attribute2n1ConstantSource;
3724 #define INPUTATTR 0
3725 #define INPUTATTR_FACING 1
3726 #define INPUTATTR_W 2
3727 #define INPUTATTR_FACING_W 3
3728 uint32_t Attribute2n1SwizzleSelect;
3729 uint32_t Attribute2n1SourceAttribute;
3730 bool Attribute2nComponentOverrideW;
3731 bool Attribute2nComponentOverrideZ;
3732 bool Attribute2nComponentOverrideY;
3733 bool Attribute2nComponentOverrideX;
3734 #define CONST_0000 0
3735 #define CONST_0001_FLOAT 1
3736 #define CONST_1111_FLOAT 2
3737 #define PRIM_ID 3
3738 uint32_t Attribute2nConstantSource;
3739 #define INPUTATTR 0
3740 #define INPUTATTR_FACING 1
3741 #define INPUTATTR_W 2
3742 #define INPUTATTR_FACING_W 3
3743 uint32_t Attribute2nSwizzleSelect;
3744 uint32_t Attribute2nSourceAttribute;
3745 uint32_t PointSpriteTextureCoordinateEnable;
3746 uint32_t ConstantInterpolationEnable310;
3747 uint32_t Attribute7WrapShortestEnables;
3748 uint32_t Attribute6WrapShortestEnables;
3749 uint32_t Attribute5WrapShortestEnables;
3750 uint32_t Attribute4WrapShortestEnables;
3751 uint32_t Attribute3WrapShortestEnables;
3752 uint32_t Attribute2WrapShortestEnables;
3753 uint32_t Attribute1WrapShortestEnables;
3754 uint32_t Attribute0WrapShortestEnables;
3755 uint32_t Attribute15WrapShortestEnables;
3756 uint32_t Attribute14WrapShortestEnables;
3757 uint32_t Attribute13WrapShortestEnables;
3758 uint32_t Attribute12WrapShortestEnables;
3759 uint32_t Attribute11WrapShortestEnables;
3760 uint32_t Attribute10WrapShortestEnables;
3761 uint32_t Attribute9WrapShortestEnables;
3762 uint32_t Attribute8WrapShortestEnables;
3763 };
3764
3765 static inline void
3766 GEN75_3DSTATE_SBE_pack(__gen_user_data *data, void * restrict dst,
3767 const struct GEN75_3DSTATE_SBE * restrict values)
3768 {
3769 uint32_t *dw = (uint32_t * restrict) dst;
3770
3771 dw[0] =
3772 __gen_field(values->CommandType, 29, 31) |
3773 __gen_field(values->CommandSubType, 27, 28) |
3774 __gen_field(values->_3DCommandOpcode, 24, 26) |
3775 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3776 __gen_field(values->DwordLength, 0, 7) |
3777 0;
3778
3779 dw[1] =
3780 __gen_field(values->AttributeSwizzleControlMode, 28, 28) |
3781 __gen_field(values->NumberofSFOutputAttributes, 22, 27) |
3782 __gen_field(values->AttributeSwizzleEnable, 21, 21) |
3783 __gen_field(values->PointSpriteTextureCoordinateOrigin, 20, 20) |
3784 __gen_field(values->VertexURBEntryReadLength, 11, 15) |
3785 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
3786 0;
3787
3788 dw[2] =
3789 __gen_field(values->Attribute2n1ComponentOverrideW, 31, 31) |
3790 __gen_field(values->Attribute2n1ComponentOverrideZ, 30, 30) |
3791 __gen_field(values->Attribute2n1ComponentOverrideY, 29, 29) |
3792 __gen_field(values->Attribute2n1ComponentOverrideX, 28, 28) |
3793 __gen_field(values->Attribute2n1ConstantSource, 25, 26) |
3794 __gen_field(values->Attribute2n1SwizzleSelect, 22, 23) |
3795 __gen_field(values->Attribute2n1SourceAttribute, 16, 20) |
3796 __gen_field(values->Attribute2nComponentOverrideW, 15, 15) |
3797 __gen_field(values->Attribute2nComponentOverrideZ, 14, 14) |
3798 __gen_field(values->Attribute2nComponentOverrideY, 13, 13) |
3799 __gen_field(values->Attribute2nComponentOverrideX, 12, 12) |
3800 __gen_field(values->Attribute2nConstantSource, 9, 10) |
3801 __gen_field(values->Attribute2nSwizzleSelect, 6, 7) |
3802 __gen_field(values->Attribute2nSourceAttribute, 0, 4) |
3803 0;
3804
3805 dw[10] =
3806 __gen_field(values->PointSpriteTextureCoordinateEnable, 0, 31) |
3807 0;
3808
3809 dw[11] =
3810 __gen_field(values->ConstantInterpolationEnable310, 0, 31) |
3811 0;
3812
3813 dw[12] =
3814 __gen_field(values->Attribute7WrapShortestEnables, 28, 31) |
3815 __gen_field(values->Attribute6WrapShortestEnables, 24, 27) |
3816 __gen_field(values->Attribute5WrapShortestEnables, 20, 23) |
3817 __gen_field(values->Attribute4WrapShortestEnables, 16, 19) |
3818 __gen_field(values->Attribute3WrapShortestEnables, 12, 15) |
3819 __gen_field(values->Attribute2WrapShortestEnables, 8, 11) |
3820 __gen_field(values->Attribute1WrapShortestEnables, 4, 7) |
3821 __gen_field(values->Attribute0WrapShortestEnables, 0, 3) |
3822 0;
3823
3824 dw[13] =
3825 __gen_field(values->Attribute15WrapShortestEnables, 28, 31) |
3826 __gen_field(values->Attribute14WrapShortestEnables, 24, 27) |
3827 __gen_field(values->Attribute13WrapShortestEnables, 20, 23) |
3828 __gen_field(values->Attribute12WrapShortestEnables, 16, 19) |
3829 __gen_field(values->Attribute11WrapShortestEnables, 12, 15) |
3830 __gen_field(values->Attribute10WrapShortestEnables, 8, 11) |
3831 __gen_field(values->Attribute9WrapShortestEnables, 4, 7) |
3832 __gen_field(values->Attribute8WrapShortestEnables, 0, 3) |
3833 0;
3834
3835 }
3836
3837 #define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_length_bias 0x00000002
3838 #define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_header\
3839 .CommandType = 3, \
3840 .CommandSubType = 3, \
3841 ._3DCommandOpcode = 0, \
3842 ._3DCommandSubOpcode = 15, \
3843 .DwordLength = 0
3844
3845 #define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_length 0x00000002
3846
3847 struct GEN75_3DSTATE_SCISSOR_STATE_POINTERS {
3848 uint32_t CommandType;
3849 uint32_t CommandSubType;
3850 uint32_t _3DCommandOpcode;
3851 uint32_t _3DCommandSubOpcode;
3852 uint32_t DwordLength;
3853 uint32_t ScissorRectPointer;
3854 };
3855
3856 static inline void
3857 GEN75_3DSTATE_SCISSOR_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
3858 const struct GEN75_3DSTATE_SCISSOR_STATE_POINTERS * restrict values)
3859 {
3860 uint32_t *dw = (uint32_t * restrict) dst;
3861
3862 dw[0] =
3863 __gen_field(values->CommandType, 29, 31) |
3864 __gen_field(values->CommandSubType, 27, 28) |
3865 __gen_field(values->_3DCommandOpcode, 24, 26) |
3866 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3867 __gen_field(values->DwordLength, 0, 7) |
3868 0;
3869
3870 dw[1] =
3871 __gen_offset(values->ScissorRectPointer, 5, 31) |
3872 0;
3873
3874 }
3875
3876 #define GEN75_3DSTATE_SF_length_bias 0x00000002
3877 #define GEN75_3DSTATE_SF_header \
3878 .CommandType = 3, \
3879 .CommandSubType = 3, \
3880 ._3DCommandOpcode = 0, \
3881 ._3DCommandSubOpcode = 19, \
3882 .DwordLength = 5
3883
3884 #define GEN75_3DSTATE_SF_length 0x00000007
3885
3886 struct GEN75_3DSTATE_SF {
3887 uint32_t CommandType;
3888 uint32_t CommandSubType;
3889 uint32_t _3DCommandOpcode;
3890 uint32_t _3DCommandSubOpcode;
3891 uint32_t DwordLength;
3892 #define D32_FLOAT_S8X24_UINT 0
3893 #define D32_FLOAT 1
3894 #define D24_UNORM_S8_UINT 2
3895 #define D24_UNORM_X8_UINT 3
3896 #define D16_UNORM 5
3897 uint32_t DepthBufferSurfaceFormat;
3898 bool LegacyGlobalDepthBiasEnable;
3899 bool StatisticsEnable;
3900 bool GlobalDepthOffsetEnableSolid;
3901 bool GlobalDepthOffsetEnableWireframe;
3902 bool GlobalDepthOffsetEnablePoint;
3903 #define RASTER_SOLID 0
3904 #define RASTER_WIREFRAME 1
3905 #define RASTER_POINT 2
3906 uint32_t FrontFaceFillMode;
3907 #define RASTER_SOLID 0
3908 #define RASTER_WIREFRAME 1
3909 #define RASTER_POINT 2
3910 uint32_t BackFaceFillMode;
3911 bool ViewTransformEnable;
3912 uint32_t FrontWinding;
3913 bool AntiAliasingEnable;
3914 #define CULLMODE_BOTH 0
3915 #define CULLMODE_NONE 1
3916 #define CULLMODE_FRONT 2
3917 #define CULLMODE_BACK 3
3918 uint32_t CullMode;
3919 float LineWidth;
3920 uint32_t LineEndCapAntialiasingRegionWidth;
3921 bool LineStippleEnable;
3922 bool ScissorRectangleEnable;
3923 bool RTIndependentRasterizationEnable;
3924 uint32_t MultisampleRasterizationMode;
3925 bool LastPixelEnable;
3926 #define Vertex0 0
3927 #define Vertex1 1
3928 #define Vertex2 2
3929 uint32_t TriangleStripListProvokingVertexSelect;
3930 uint32_t LineStripListProvokingVertexSelect;
3931 #define Vertex0 0
3932 #define Vertex1 1
3933 #define Vertex2 2
3934 uint32_t TriangleFanProvokingVertexSelect;
3935 #define AALINEDISTANCE_TRUE 1
3936 uint32_t AALineDistanceMode;
3937 uint32_t VertexSubPixelPrecisionSelect;
3938 uint32_t UsePointWidthState;
3939 float PointWidth;
3940 float GlobalDepthOffsetConstant;
3941 float GlobalDepthOffsetScale;
3942 float GlobalDepthOffsetClamp;
3943 };
3944
3945 static inline void
3946 GEN75_3DSTATE_SF_pack(__gen_user_data *data, void * restrict dst,
3947 const struct GEN75_3DSTATE_SF * restrict values)
3948 {
3949 uint32_t *dw = (uint32_t * restrict) dst;
3950
3951 dw[0] =
3952 __gen_field(values->CommandType, 29, 31) |
3953 __gen_field(values->CommandSubType, 27, 28) |
3954 __gen_field(values->_3DCommandOpcode, 24, 26) |
3955 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3956 __gen_field(values->DwordLength, 0, 7) |
3957 0;
3958
3959 dw[1] =
3960 __gen_field(values->DepthBufferSurfaceFormat, 12, 14) |
3961 __gen_field(values->LegacyGlobalDepthBiasEnable, 11, 11) |
3962 __gen_field(values->StatisticsEnable, 10, 10) |
3963 __gen_field(values->GlobalDepthOffsetEnableSolid, 9, 9) |
3964 __gen_field(values->GlobalDepthOffsetEnableWireframe, 8, 8) |
3965 __gen_field(values->GlobalDepthOffsetEnablePoint, 7, 7) |
3966 __gen_field(values->FrontFaceFillMode, 5, 6) |
3967 __gen_field(values->BackFaceFillMode, 3, 4) |
3968 __gen_field(values->ViewTransformEnable, 1, 1) |
3969 __gen_field(values->FrontWinding, 0, 0) |
3970 0;
3971
3972 dw[2] =
3973 __gen_field(values->AntiAliasingEnable, 31, 31) |
3974 __gen_field(values->CullMode, 29, 30) |
3975 __gen_field(values->LineWidth * (1 << 7), 18, 27) |
3976 __gen_field(values->LineEndCapAntialiasingRegionWidth, 16, 17) |
3977 __gen_field(values->LineStippleEnable, 14, 14) |
3978 __gen_field(values->ScissorRectangleEnable, 11, 11) |
3979 __gen_field(values->RTIndependentRasterizationEnable, 10, 10) |
3980 __gen_field(values->MultisampleRasterizationMode, 8, 9) |
3981 0;
3982
3983 dw[3] =
3984 __gen_field(values->LastPixelEnable, 31, 31) |
3985 __gen_field(values->TriangleStripListProvokingVertexSelect, 29, 30) |
3986 __gen_field(values->LineStripListProvokingVertexSelect, 27, 28) |
3987 __gen_field(values->TriangleFanProvokingVertexSelect, 25, 26) |
3988 __gen_field(values->AALineDistanceMode, 14, 14) |
3989 __gen_field(values->VertexSubPixelPrecisionSelect, 12, 12) |
3990 __gen_field(values->UsePointWidthState, 11, 11) |
3991 __gen_field(values->PointWidth * (1 << 3), 0, 10) |
3992 0;
3993
3994 dw[4] =
3995 __gen_float(values->GlobalDepthOffsetConstant) |
3996 0;
3997
3998 dw[5] =
3999 __gen_float(values->GlobalDepthOffsetScale) |
4000 0;
4001
4002 dw[6] =
4003 __gen_float(values->GlobalDepthOffsetClamp) |
4004 0;
4005
4006 }
4007
4008 #define GEN75_3DSTATE_SO_BUFFER_length_bias 0x00000002
4009 #define GEN75_3DSTATE_SO_BUFFER_header \
4010 .CommandType = 3, \
4011 .CommandSubType = 3, \
4012 ._3DCommandOpcode = 1, \
4013 ._3DCommandSubOpcode = 24, \
4014 .DwordLength = 2
4015
4016 #define GEN75_3DSTATE_SO_BUFFER_length 0x00000004
4017
4018 struct GEN75_3DSTATE_SO_BUFFER {
4019 uint32_t CommandType;
4020 uint32_t CommandSubType;
4021 uint32_t _3DCommandOpcode;
4022 uint32_t _3DCommandSubOpcode;
4023 uint32_t DwordLength;
4024 uint32_t SOBufferIndex;
4025 struct GEN75_MEMORY_OBJECT_CONTROL_STATE SOBufferObjectControlState;
4026 uint32_t SurfacePitch;
4027 __gen_address_type SurfaceBaseAddress;
4028 __gen_address_type SurfaceEndAddress;
4029 };
4030
4031 static inline void
4032 GEN75_3DSTATE_SO_BUFFER_pack(__gen_user_data *data, void * restrict dst,
4033 const struct GEN75_3DSTATE_SO_BUFFER * restrict values)
4034 {
4035 uint32_t *dw = (uint32_t * restrict) dst;
4036
4037 dw[0] =
4038 __gen_field(values->CommandType, 29, 31) |
4039 __gen_field(values->CommandSubType, 27, 28) |
4040 __gen_field(values->_3DCommandOpcode, 24, 26) |
4041 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4042 __gen_field(values->DwordLength, 0, 7) |
4043 0;
4044
4045 uint32_t dw_SOBufferObjectControlState;
4046 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SOBufferObjectControlState, &values->SOBufferObjectControlState);
4047 dw[1] =
4048 __gen_field(values->SOBufferIndex, 29, 30) |
4049 __gen_field(dw_SOBufferObjectControlState, 25, 28) |
4050 __gen_field(values->SurfacePitch, 0, 11) |
4051 0;
4052
4053 uint32_t dw2 =
4054 0;
4055
4056 dw[2] =
4057 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
4058
4059 uint32_t dw3 =
4060 0;
4061
4062 dw[3] =
4063 __gen_combine_address(data, &dw[3], values->SurfaceEndAddress, dw3);
4064
4065 }
4066
4067 #define GEN75_3DSTATE_SO_DECL_LIST_length_bias 0x00000002
4068 #define GEN75_3DSTATE_SO_DECL_LIST_header \
4069 .CommandType = 3, \
4070 .CommandSubType = 3, \
4071 ._3DCommandOpcode = 1, \
4072 ._3DCommandSubOpcode = 23
4073
4074 #define GEN75_3DSTATE_SO_DECL_LIST_length 0x00000000
4075
4076 #define GEN75_SO_DECL_ENTRY_length 0x00000002
4077
4078 #define GEN75_SO_DECL_length 0x00000001
4079
4080 struct GEN75_SO_DECL {
4081 uint32_t OutputBufferSlot;
4082 uint32_t HoleFlag;
4083 uint32_t RegisterIndex;
4084 uint32_t ComponentMask;
4085 };
4086
4087 static inline void
4088 GEN75_SO_DECL_pack(__gen_user_data *data, void * restrict dst,
4089 const struct GEN75_SO_DECL * restrict values)
4090 {
4091 uint32_t *dw = (uint32_t * restrict) dst;
4092
4093 dw[0] =
4094 __gen_field(values->OutputBufferSlot, 12, 13) |
4095 __gen_field(values->HoleFlag, 11, 11) |
4096 __gen_field(values->RegisterIndex, 4, 9) |
4097 __gen_field(values->ComponentMask, 0, 3) |
4098 0;
4099
4100 }
4101
4102 struct GEN75_SO_DECL_ENTRY {
4103 struct GEN75_SO_DECL Stream3Decl;
4104 struct GEN75_SO_DECL Stream2Decl;
4105 struct GEN75_SO_DECL Stream1Decl;
4106 struct GEN75_SO_DECL Stream0Decl;
4107 };
4108
4109 static inline void
4110 GEN75_SO_DECL_ENTRY_pack(__gen_user_data *data, void * restrict dst,
4111 const struct GEN75_SO_DECL_ENTRY * restrict values)
4112 {
4113 uint32_t *dw = (uint32_t * restrict) dst;
4114
4115 uint32_t dw_Stream3Decl;
4116 GEN75_SO_DECL_pack(data, &dw_Stream3Decl, &values->Stream3Decl);
4117 uint32_t dw_Stream2Decl;
4118 GEN75_SO_DECL_pack(data, &dw_Stream2Decl, &values->Stream2Decl);
4119 uint32_t dw_Stream1Decl;
4120 GEN75_SO_DECL_pack(data, &dw_Stream1Decl, &values->Stream1Decl);
4121 uint32_t dw_Stream0Decl;
4122 GEN75_SO_DECL_pack(data, &dw_Stream0Decl, &values->Stream0Decl);
4123 uint64_t qw0 =
4124 __gen_field(dw_Stream3Decl, 48, 63) |
4125 __gen_field(dw_Stream2Decl, 32, 47) |
4126 __gen_field(dw_Stream1Decl, 16, 31) |
4127 __gen_field(dw_Stream0Decl, 0, 15) |
4128 0;
4129
4130 dw[0] = qw0;
4131 dw[1] = qw0 >> 32;
4132
4133 }
4134
4135 struct GEN75_3DSTATE_SO_DECL_LIST {
4136 uint32_t CommandType;
4137 uint32_t CommandSubType;
4138 uint32_t _3DCommandOpcode;
4139 uint32_t _3DCommandSubOpcode;
4140 uint32_t DwordLength;
4141 uint32_t StreamtoBufferSelects3;
4142 uint32_t StreamtoBufferSelects2;
4143 uint32_t StreamtoBufferSelects1;
4144 uint32_t StreamtoBufferSelects0;
4145 uint32_t NumEntries3;
4146 uint32_t NumEntries2;
4147 uint32_t NumEntries1;
4148 uint32_t NumEntries0;
4149 /* variable length fields follow */
4150 };
4151
4152 static inline void
4153 GEN75_3DSTATE_SO_DECL_LIST_pack(__gen_user_data *data, void * restrict dst,
4154 const struct GEN75_3DSTATE_SO_DECL_LIST * restrict values)
4155 {
4156 uint32_t *dw = (uint32_t * restrict) dst;
4157
4158 dw[0] =
4159 __gen_field(values->CommandType, 29, 31) |
4160 __gen_field(values->CommandSubType, 27, 28) |
4161 __gen_field(values->_3DCommandOpcode, 24, 26) |
4162 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4163 __gen_field(values->DwordLength, 0, 8) |
4164 0;
4165
4166 dw[1] =
4167 __gen_field(values->StreamtoBufferSelects3, 12, 15) |
4168 __gen_field(values->StreamtoBufferSelects2, 8, 11) |
4169 __gen_field(values->StreamtoBufferSelects1, 4, 7) |
4170 __gen_field(values->StreamtoBufferSelects0, 0, 3) |
4171 0;
4172
4173 dw[2] =
4174 __gen_field(values->NumEntries3, 24, 31) |
4175 __gen_field(values->NumEntries2, 16, 23) |
4176 __gen_field(values->NumEntries1, 8, 15) |
4177 __gen_field(values->NumEntries0, 0, 7) |
4178 0;
4179
4180 /* variable length fields follow */
4181 }
4182
4183 #define GEN75_3DSTATE_STENCIL_BUFFER_length_bias 0x00000002
4184 #define GEN75_3DSTATE_STENCIL_BUFFER_header \
4185 .CommandType = 3, \
4186 .CommandSubType = 3, \
4187 ._3DCommandOpcode = 0, \
4188 ._3DCommandSubOpcode = 6, \
4189 .DwordLength = 1
4190
4191 #define GEN75_3DSTATE_STENCIL_BUFFER_length 0x00000003
4192
4193 struct GEN75_3DSTATE_STENCIL_BUFFER {
4194 uint32_t CommandType;
4195 uint32_t CommandSubType;
4196 uint32_t _3DCommandOpcode;
4197 uint32_t _3DCommandSubOpcode;
4198 uint32_t DwordLength;
4199 uint32_t StencilBufferEnable;
4200 struct GEN75_MEMORY_OBJECT_CONTROL_STATE StencilBufferObjectControlState;
4201 uint32_t SurfacePitch;
4202 __gen_address_type SurfaceBaseAddress;
4203 };
4204
4205 static inline void
4206 GEN75_3DSTATE_STENCIL_BUFFER_pack(__gen_user_data *data, void * restrict dst,
4207 const struct GEN75_3DSTATE_STENCIL_BUFFER * restrict values)
4208 {
4209 uint32_t *dw = (uint32_t * restrict) dst;
4210
4211 dw[0] =
4212 __gen_field(values->CommandType, 29, 31) |
4213 __gen_field(values->CommandSubType, 27, 28) |
4214 __gen_field(values->_3DCommandOpcode, 24, 26) |
4215 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4216 __gen_field(values->DwordLength, 0, 7) |
4217 0;
4218
4219 uint32_t dw_StencilBufferObjectControlState;
4220 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StencilBufferObjectControlState, &values->StencilBufferObjectControlState);
4221 dw[1] =
4222 __gen_field(values->StencilBufferEnable, 31, 31) |
4223 __gen_field(dw_StencilBufferObjectControlState, 25, 28) |
4224 __gen_field(values->SurfacePitch, 0, 16) |
4225 0;
4226
4227 uint32_t dw2 =
4228 0;
4229
4230 dw[2] =
4231 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
4232
4233 }
4234
4235 #define GEN75_3DSTATE_STREAMOUT_length_bias 0x00000002
4236 #define GEN75_3DSTATE_STREAMOUT_header \
4237 .CommandType = 3, \
4238 .CommandSubType = 3, \
4239 ._3DCommandOpcode = 0, \
4240 ._3DCommandSubOpcode = 30, \
4241 .DwordLength = 1
4242
4243 #define GEN75_3DSTATE_STREAMOUT_length 0x00000003
4244
4245 struct GEN75_3DSTATE_STREAMOUT {
4246 uint32_t CommandType;
4247 uint32_t CommandSubType;
4248 uint32_t _3DCommandOpcode;
4249 uint32_t _3DCommandSubOpcode;
4250 uint32_t DwordLength;
4251 uint32_t SOFunctionEnable;
4252 uint32_t RenderingDisable;
4253 uint32_t RenderStreamSelect;
4254 #define LEADING 0
4255 #define TRAILING 1
4256 uint32_t ReorderMode;
4257 bool SOStatisticsEnable;
4258 uint32_t SOBufferEnable3;
4259 uint32_t SOBufferEnable2;
4260 uint32_t SOBufferEnable1;
4261 uint32_t SOBufferEnable0;
4262 uint32_t Stream3VertexReadOffset;
4263 uint32_t Stream3VertexReadLength;
4264 uint32_t Stream2VertexReadOffset;
4265 uint32_t Stream2VertexReadLength;
4266 uint32_t Stream1VertexReadOffset;
4267 uint32_t Stream1VertexReadLength;
4268 uint32_t Stream0VertexReadOffset;
4269 uint32_t Stream0VertexReadLength;
4270 };
4271
4272 static inline void
4273 GEN75_3DSTATE_STREAMOUT_pack(__gen_user_data *data, void * restrict dst,
4274 const struct GEN75_3DSTATE_STREAMOUT * restrict values)
4275 {
4276 uint32_t *dw = (uint32_t * restrict) dst;
4277
4278 dw[0] =
4279 __gen_field(values->CommandType, 29, 31) |
4280 __gen_field(values->CommandSubType, 27, 28) |
4281 __gen_field(values->_3DCommandOpcode, 24, 26) |
4282 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4283 __gen_field(values->DwordLength, 0, 7) |
4284 0;
4285
4286 dw[1] =
4287 __gen_field(values->SOFunctionEnable, 31, 31) |
4288 __gen_field(values->RenderingDisable, 30, 30) |
4289 __gen_field(values->RenderStreamSelect, 27, 28) |
4290 __gen_field(values->ReorderMode, 26, 26) |
4291 __gen_field(values->SOStatisticsEnable, 25, 25) |
4292 __gen_field(values->SOBufferEnable3, 11, 11) |
4293 __gen_field(values->SOBufferEnable2, 10, 10) |
4294 __gen_field(values->SOBufferEnable1, 9, 9) |
4295 __gen_field(values->SOBufferEnable0, 8, 8) |
4296 0;
4297
4298 dw[2] =
4299 __gen_field(values->Stream3VertexReadOffset, 29, 29) |
4300 __gen_field(values->Stream3VertexReadLength, 24, 28) |
4301 __gen_field(values->Stream2VertexReadOffset, 21, 21) |
4302 __gen_field(values->Stream2VertexReadLength, 16, 20) |
4303 __gen_field(values->Stream1VertexReadOffset, 13, 13) |
4304 __gen_field(values->Stream1VertexReadLength, 8, 12) |
4305 __gen_field(values->Stream0VertexReadOffset, 5, 5) |
4306 __gen_field(values->Stream0VertexReadLength, 0, 4) |
4307 0;
4308
4309 }
4310
4311 #define GEN75_3DSTATE_TE_length_bias 0x00000002
4312 #define GEN75_3DSTATE_TE_header \
4313 .CommandType = 3, \
4314 .CommandSubType = 3, \
4315 ._3DCommandOpcode = 0, \
4316 ._3DCommandSubOpcode = 28, \
4317 .DwordLength = 2
4318
4319 #define GEN75_3DSTATE_TE_length 0x00000004
4320
4321 struct GEN75_3DSTATE_TE {
4322 uint32_t CommandType;
4323 uint32_t CommandSubType;
4324 uint32_t _3DCommandOpcode;
4325 uint32_t _3DCommandSubOpcode;
4326 uint32_t DwordLength;
4327 #define INTEGER 0
4328 #define ODD_FRACTIONAL 1
4329 #define EVEN_FRACTIONAL 2
4330 uint32_t Partitioning;
4331 #define POINT 0
4332 #define OUTPUT_LINE 1
4333 #define OUTPUT_TRI_CW 2
4334 #define OUTPUT_TRI_CCW 3
4335 uint32_t OutputTopology;
4336 #define QUAD 0
4337 #define TRI 1
4338 #define ISOLINE 2
4339 uint32_t TEDomain;
4340 #define HW_TESS 0
4341 #define SW_TESS 1
4342 uint32_t TEMode;
4343 bool TEEnable;
4344 float MaximumTessellationFactorOdd;
4345 float MaximumTessellationFactorNotOdd;
4346 };
4347
4348 static inline void
4349 GEN75_3DSTATE_TE_pack(__gen_user_data *data, void * restrict dst,
4350 const struct GEN75_3DSTATE_TE * restrict values)
4351 {
4352 uint32_t *dw = (uint32_t * restrict) dst;
4353
4354 dw[0] =
4355 __gen_field(values->CommandType, 29, 31) |
4356 __gen_field(values->CommandSubType, 27, 28) |
4357 __gen_field(values->_3DCommandOpcode, 24, 26) |
4358 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4359 __gen_field(values->DwordLength, 0, 7) |
4360 0;
4361
4362 dw[1] =
4363 __gen_field(values->Partitioning, 12, 13) |
4364 __gen_field(values->OutputTopology, 8, 9) |
4365 __gen_field(values->TEDomain, 4, 5) |
4366 __gen_field(values->TEMode, 1, 2) |
4367 __gen_field(values->TEEnable, 0, 0) |
4368 0;
4369
4370 dw[2] =
4371 __gen_float(values->MaximumTessellationFactorOdd) |
4372 0;
4373
4374 dw[3] =
4375 __gen_float(values->MaximumTessellationFactorNotOdd) |
4376 0;
4377
4378 }
4379
4380 #define GEN75_3DSTATE_URB_DS_length_bias 0x00000002
4381 #define GEN75_3DSTATE_URB_DS_header \
4382 .CommandType = 3, \
4383 .CommandSubType = 3, \
4384 ._3DCommandOpcode = 0, \
4385 ._3DCommandSubOpcode = 50, \
4386 .DwordLength = 0
4387
4388 #define GEN75_3DSTATE_URB_DS_length 0x00000002
4389
4390 struct GEN75_3DSTATE_URB_DS {
4391 uint32_t CommandType;
4392 uint32_t CommandSubType;
4393 uint32_t _3DCommandOpcode;
4394 uint32_t _3DCommandSubOpcode;
4395 uint32_t DwordLength;
4396 uint32_t DSURBStartingAddress;
4397 uint32_t DSURBEntryAllocationSize;
4398 uint32_t DSNumberofURBEntries;
4399 };
4400
4401 static inline void
4402 GEN75_3DSTATE_URB_DS_pack(__gen_user_data *data, void * restrict dst,
4403 const struct GEN75_3DSTATE_URB_DS * restrict values)
4404 {
4405 uint32_t *dw = (uint32_t * restrict) dst;
4406
4407 dw[0] =
4408 __gen_field(values->CommandType, 29, 31) |
4409 __gen_field(values->CommandSubType, 27, 28) |
4410 __gen_field(values->_3DCommandOpcode, 24, 26) |
4411 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4412 __gen_field(values->DwordLength, 0, 7) |
4413 0;
4414
4415 dw[1] =
4416 __gen_field(values->DSURBStartingAddress, 25, 30) |
4417 __gen_field(values->DSURBEntryAllocationSize, 16, 24) |
4418 __gen_field(values->DSNumberofURBEntries, 0, 15) |
4419 0;
4420
4421 }
4422
4423 #define GEN75_3DSTATE_URB_GS_length_bias 0x00000002
4424 #define GEN75_3DSTATE_URB_GS_header \
4425 .CommandType = 3, \
4426 .CommandSubType = 3, \
4427 ._3DCommandOpcode = 0, \
4428 ._3DCommandSubOpcode = 51, \
4429 .DwordLength = 0
4430
4431 #define GEN75_3DSTATE_URB_GS_length 0x00000002
4432
4433 struct GEN75_3DSTATE_URB_GS {
4434 uint32_t CommandType;
4435 uint32_t CommandSubType;
4436 uint32_t _3DCommandOpcode;
4437 uint32_t _3DCommandSubOpcode;
4438 uint32_t DwordLength;
4439 uint32_t GSURBStartingAddress;
4440 uint32_t GSURBEntryAllocationSize;
4441 uint32_t GSNumberofURBEntries;
4442 };
4443
4444 static inline void
4445 GEN75_3DSTATE_URB_GS_pack(__gen_user_data *data, void * restrict dst,
4446 const struct GEN75_3DSTATE_URB_GS * restrict values)
4447 {
4448 uint32_t *dw = (uint32_t * restrict) dst;
4449
4450 dw[0] =
4451 __gen_field(values->CommandType, 29, 31) |
4452 __gen_field(values->CommandSubType, 27, 28) |
4453 __gen_field(values->_3DCommandOpcode, 24, 26) |
4454 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4455 __gen_field(values->DwordLength, 0, 7) |
4456 0;
4457
4458 dw[1] =
4459 __gen_field(values->GSURBStartingAddress, 25, 30) |
4460 __gen_field(values->GSURBEntryAllocationSize, 16, 24) |
4461 __gen_field(values->GSNumberofURBEntries, 0, 15) |
4462 0;
4463
4464 }
4465
4466 #define GEN75_3DSTATE_URB_HS_length_bias 0x00000002
4467 #define GEN75_3DSTATE_URB_HS_header \
4468 .CommandType = 3, \
4469 .CommandSubType = 3, \
4470 ._3DCommandOpcode = 0, \
4471 ._3DCommandSubOpcode = 49, \
4472 .DwordLength = 0
4473
4474 #define GEN75_3DSTATE_URB_HS_length 0x00000002
4475
4476 struct GEN75_3DSTATE_URB_HS {
4477 uint32_t CommandType;
4478 uint32_t CommandSubType;
4479 uint32_t _3DCommandOpcode;
4480 uint32_t _3DCommandSubOpcode;
4481 uint32_t DwordLength;
4482 uint32_t HSURBStartingAddress;
4483 uint32_t HSURBEntryAllocationSize;
4484 uint32_t HSNumberofURBEntries;
4485 };
4486
4487 static inline void
4488 GEN75_3DSTATE_URB_HS_pack(__gen_user_data *data, void * restrict dst,
4489 const struct GEN75_3DSTATE_URB_HS * restrict values)
4490 {
4491 uint32_t *dw = (uint32_t * restrict) dst;
4492
4493 dw[0] =
4494 __gen_field(values->CommandType, 29, 31) |
4495 __gen_field(values->CommandSubType, 27, 28) |
4496 __gen_field(values->_3DCommandOpcode, 24, 26) |
4497 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4498 __gen_field(values->DwordLength, 0, 7) |
4499 0;
4500
4501 dw[1] =
4502 __gen_field(values->HSURBStartingAddress, 25, 30) |
4503 __gen_field(values->HSURBEntryAllocationSize, 16, 24) |
4504 __gen_field(values->HSNumberofURBEntries, 0, 15) |
4505 0;
4506
4507 }
4508
4509 #define GEN75_3DSTATE_VERTEX_BUFFERS_length_bias 0x00000002
4510 #define GEN75_3DSTATE_VERTEX_BUFFERS_header \
4511 .CommandType = 3, \
4512 .CommandSubType = 3, \
4513 ._3DCommandOpcode = 0, \
4514 ._3DCommandSubOpcode = 8
4515
4516 #define GEN75_3DSTATE_VERTEX_BUFFERS_length 0x00000000
4517
4518 #define GEN75_VERTEX_BUFFER_STATE_length 0x00000004
4519
4520 struct GEN75_VERTEX_BUFFER_STATE {
4521 uint32_t VertexBufferIndex;
4522 #define VERTEXDATA 0
4523 #define INSTANCEDATA 1
4524 uint32_t BufferAccessType;
4525 struct GEN75_MEMORY_OBJECT_CONTROL_STATE VertexBufferMemoryObjectControlState;
4526 uint32_t AddressModifyEnable;
4527 bool NullVertexBuffer;
4528 uint32_t VertexFetchInvalidate;
4529 uint32_t BufferPitch;
4530 __gen_address_type BufferStartingAddress;
4531 __gen_address_type EndAddress;
4532 uint32_t InstanceDataStepRate;
4533 };
4534
4535 static inline void
4536 GEN75_VERTEX_BUFFER_STATE_pack(__gen_user_data *data, void * restrict dst,
4537 const struct GEN75_VERTEX_BUFFER_STATE * restrict values)
4538 {
4539 uint32_t *dw = (uint32_t * restrict) dst;
4540
4541 uint32_t dw_VertexBufferMemoryObjectControlState;
4542 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_VertexBufferMemoryObjectControlState, &values->VertexBufferMemoryObjectControlState);
4543 dw[0] =
4544 __gen_field(values->VertexBufferIndex, 26, 31) |
4545 __gen_field(values->BufferAccessType, 20, 20) |
4546 __gen_field(dw_VertexBufferMemoryObjectControlState, 16, 19) |
4547 __gen_field(values->AddressModifyEnable, 14, 14) |
4548 __gen_field(values->NullVertexBuffer, 13, 13) |
4549 __gen_field(values->VertexFetchInvalidate, 12, 12) |
4550 __gen_field(values->BufferPitch, 0, 11) |
4551 0;
4552
4553 uint32_t dw1 =
4554 0;
4555
4556 dw[1] =
4557 __gen_combine_address(data, &dw[1], values->BufferStartingAddress, dw1);
4558
4559 uint32_t dw2 =
4560 0;
4561
4562 dw[2] =
4563 __gen_combine_address(data, &dw[2], values->EndAddress, dw2);
4564
4565 dw[3] =
4566 __gen_field(values->InstanceDataStepRate, 0, 31) |
4567 0;
4568
4569 }
4570
4571 struct GEN75_3DSTATE_VERTEX_BUFFERS {
4572 uint32_t CommandType;
4573 uint32_t CommandSubType;
4574 uint32_t _3DCommandOpcode;
4575 uint32_t _3DCommandSubOpcode;
4576 uint32_t DwordLength;
4577 /* variable length fields follow */
4578 };
4579
4580 static inline void
4581 GEN75_3DSTATE_VERTEX_BUFFERS_pack(__gen_user_data *data, void * restrict dst,
4582 const struct GEN75_3DSTATE_VERTEX_BUFFERS * restrict values)
4583 {
4584 uint32_t *dw = (uint32_t * restrict) dst;
4585
4586 dw[0] =
4587 __gen_field(values->CommandType, 29, 31) |
4588 __gen_field(values->CommandSubType, 27, 28) |
4589 __gen_field(values->_3DCommandOpcode, 24, 26) |
4590 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4591 __gen_field(values->DwordLength, 0, 7) |
4592 0;
4593
4594 /* variable length fields follow */
4595 }
4596
4597 #define GEN75_3DSTATE_VERTEX_ELEMENTS_length_bias 0x00000002
4598 #define GEN75_3DSTATE_VERTEX_ELEMENTS_header \
4599 .CommandType = 3, \
4600 .CommandSubType = 3, \
4601 ._3DCommandOpcode = 0, \
4602 ._3DCommandSubOpcode = 9
4603
4604 #define GEN75_3DSTATE_VERTEX_ELEMENTS_length 0x00000000
4605
4606 #define GEN75_VERTEX_ELEMENT_STATE_length 0x00000002
4607
4608 struct GEN75_VERTEX_ELEMENT_STATE {
4609 uint32_t VertexBufferIndex;
4610 bool Valid;
4611 uint32_t SourceElementFormat;
4612 bool EdgeFlagEnable;
4613 uint32_t SourceElementOffset;
4614 uint32_t Component0Control;
4615 uint32_t Component1Control;
4616 uint32_t Component2Control;
4617 uint32_t Component3Control;
4618 };
4619
4620 static inline void
4621 GEN75_VERTEX_ELEMENT_STATE_pack(__gen_user_data *data, void * restrict dst,
4622 const struct GEN75_VERTEX_ELEMENT_STATE * restrict values)
4623 {
4624 uint32_t *dw = (uint32_t * restrict) dst;
4625
4626 dw[0] =
4627 __gen_field(values->VertexBufferIndex, 26, 31) |
4628 __gen_field(values->Valid, 25, 25) |
4629 __gen_field(values->SourceElementFormat, 16, 24) |
4630 __gen_field(values->EdgeFlagEnable, 15, 15) |
4631 __gen_field(values->SourceElementOffset, 0, 11) |
4632 0;
4633
4634 dw[1] =
4635 __gen_field(values->Component0Control, 28, 30) |
4636 __gen_field(values->Component1Control, 24, 26) |
4637 __gen_field(values->Component2Control, 20, 22) |
4638 __gen_field(values->Component3Control, 16, 18) |
4639 0;
4640
4641 }
4642
4643 struct GEN75_3DSTATE_VERTEX_ELEMENTS {
4644 uint32_t CommandType;
4645 uint32_t CommandSubType;
4646 uint32_t _3DCommandOpcode;
4647 uint32_t _3DCommandSubOpcode;
4648 uint32_t DwordLength;
4649 /* variable length fields follow */
4650 };
4651
4652 static inline void
4653 GEN75_3DSTATE_VERTEX_ELEMENTS_pack(__gen_user_data *data, void * restrict dst,
4654 const struct GEN75_3DSTATE_VERTEX_ELEMENTS * restrict values)
4655 {
4656 uint32_t *dw = (uint32_t * restrict) dst;
4657
4658 dw[0] =
4659 __gen_field(values->CommandType, 29, 31) |
4660 __gen_field(values->CommandSubType, 27, 28) |
4661 __gen_field(values->_3DCommandOpcode, 24, 26) |
4662 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4663 __gen_field(values->DwordLength, 0, 7) |
4664 0;
4665
4666 /* variable length fields follow */
4667 }
4668
4669 #define GEN75_3DSTATE_VF_length_bias 0x00000002
4670 #define GEN75_3DSTATE_VF_header \
4671 .CommandType = 3, \
4672 .CommandSubType = 3, \
4673 ._3DCommandOpcode = 0, \
4674 ._3DCommandSubOpcode = 12, \
4675 .DwordLength = 0
4676
4677 #define GEN75_3DSTATE_VF_length 0x00000002
4678
4679 struct GEN75_3DSTATE_VF {
4680 uint32_t CommandType;
4681 uint32_t CommandSubType;
4682 uint32_t _3DCommandOpcode;
4683 uint32_t _3DCommandSubOpcode;
4684 bool IndexedDrawCutIndexEnable;
4685 uint32_t DwordLength;
4686 uint32_t CutIndex;
4687 };
4688
4689 static inline void
4690 GEN75_3DSTATE_VF_pack(__gen_user_data *data, void * restrict dst,
4691 const struct GEN75_3DSTATE_VF * restrict values)
4692 {
4693 uint32_t *dw = (uint32_t * restrict) dst;
4694
4695 dw[0] =
4696 __gen_field(values->CommandType, 29, 31) |
4697 __gen_field(values->CommandSubType, 27, 28) |
4698 __gen_field(values->_3DCommandOpcode, 24, 26) |
4699 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4700 __gen_field(values->IndexedDrawCutIndexEnable, 8, 8) |
4701 __gen_field(values->DwordLength, 0, 7) |
4702 0;
4703
4704 dw[1] =
4705 __gen_field(values->CutIndex, 0, 31) |
4706 0;
4707
4708 }
4709
4710 #define GEN75_3DSTATE_VF_STATISTICS_length_bias 0x00000001
4711 #define GEN75_3DSTATE_VF_STATISTICS_header \
4712 .CommandType = 3, \
4713 .CommandSubType = 1, \
4714 ._3DCommandOpcode = 0, \
4715 ._3DCommandSubOpcode = 11
4716
4717 #define GEN75_3DSTATE_VF_STATISTICS_length 0x00000001
4718
4719 struct GEN75_3DSTATE_VF_STATISTICS {
4720 uint32_t CommandType;
4721 uint32_t CommandSubType;
4722 uint32_t _3DCommandOpcode;
4723 uint32_t _3DCommandSubOpcode;
4724 bool StatisticsEnable;
4725 };
4726
4727 static inline void
4728 GEN75_3DSTATE_VF_STATISTICS_pack(__gen_user_data *data, void * restrict dst,
4729 const struct GEN75_3DSTATE_VF_STATISTICS * restrict values)
4730 {
4731 uint32_t *dw = (uint32_t * restrict) dst;
4732
4733 dw[0] =
4734 __gen_field(values->CommandType, 29, 31) |
4735 __gen_field(values->CommandSubType, 27, 28) |
4736 __gen_field(values->_3DCommandOpcode, 24, 26) |
4737 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4738 __gen_field(values->StatisticsEnable, 0, 0) |
4739 0;
4740
4741 }
4742
4743 #define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length_bias 0x00000002
4744 #define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_header\
4745 .CommandType = 3, \
4746 .CommandSubType = 3, \
4747 ._3DCommandOpcode = 0, \
4748 ._3DCommandSubOpcode = 35, \
4749 .DwordLength = 0
4750
4751 #define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length 0x00000002
4752
4753 struct GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC {
4754 uint32_t CommandType;
4755 uint32_t CommandSubType;
4756 uint32_t _3DCommandOpcode;
4757 uint32_t _3DCommandSubOpcode;
4758 uint32_t DwordLength;
4759 uint32_t CCViewportPointer;
4760 };
4761
4762 static inline void
4763 GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_pack(__gen_user_data *data, void * restrict dst,
4764 const struct GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC * restrict values)
4765 {
4766 uint32_t *dw = (uint32_t * restrict) dst;
4767
4768 dw[0] =
4769 __gen_field(values->CommandType, 29, 31) |
4770 __gen_field(values->CommandSubType, 27, 28) |
4771 __gen_field(values->_3DCommandOpcode, 24, 26) |
4772 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4773 __gen_field(values->DwordLength, 0, 7) |
4774 0;
4775
4776 dw[1] =
4777 __gen_offset(values->CCViewportPointer, 5, 31) |
4778 0;
4779
4780 }
4781
4782 #define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length_bias 0x00000002
4783 #define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_header\
4784 .CommandType = 3, \
4785 .CommandSubType = 3, \
4786 ._3DCommandOpcode = 0, \
4787 ._3DCommandSubOpcode = 33, \
4788 .DwordLength = 0
4789
4790 #define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length 0x00000002
4791
4792 struct GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP {
4793 uint32_t CommandType;
4794 uint32_t CommandSubType;
4795 uint32_t _3DCommandOpcode;
4796 uint32_t _3DCommandSubOpcode;
4797 uint32_t DwordLength;
4798 uint32_t SFClipViewportPointer;
4799 };
4800
4801 static inline void
4802 GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_pack(__gen_user_data *data, void * restrict dst,
4803 const struct GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP * restrict values)
4804 {
4805 uint32_t *dw = (uint32_t * restrict) dst;
4806
4807 dw[0] =
4808 __gen_field(values->CommandType, 29, 31) |
4809 __gen_field(values->CommandSubType, 27, 28) |
4810 __gen_field(values->_3DCommandOpcode, 24, 26) |
4811 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4812 __gen_field(values->DwordLength, 0, 7) |
4813 0;
4814
4815 dw[1] =
4816 __gen_offset(values->SFClipViewportPointer, 6, 31) |
4817 0;
4818
4819 }
4820
4821 #define GEN75_3DSTATE_VS_length_bias 0x00000002
4822 #define GEN75_3DSTATE_VS_header \
4823 .CommandType = 3, \
4824 .CommandSubType = 3, \
4825 ._3DCommandOpcode = 0, \
4826 ._3DCommandSubOpcode = 16, \
4827 .DwordLength = 4
4828
4829 #define GEN75_3DSTATE_VS_length 0x00000006
4830
4831 struct GEN75_3DSTATE_VS {
4832 uint32_t CommandType;
4833 uint32_t CommandSubType;
4834 uint32_t _3DCommandOpcode;
4835 uint32_t _3DCommandSubOpcode;
4836 uint32_t DwordLength;
4837 uint32_t KernelStartPointer;
4838 #define Multiple 0
4839 #define Single 1
4840 uint32_t SingleVertexDispatch;
4841 #define Dmask 0
4842 #define Vmask 1
4843 uint32_t VectorMaskEnableVME;
4844 #define NoSamplers 0
4845 #define _14Samplers 1
4846 #define _58Samplers 2
4847 #define _912Samplers 3
4848 #define _1316Samplers 4
4849 uint32_t SamplerCount;
4850 uint32_t BindingTableEntryCount;
4851 #define NormalPriority 0
4852 #define HighPriority 1
4853 uint32_t ThreadPriority;
4854 #define IEEE754 0
4855 #define Alternate 1
4856 uint32_t FloatingPointMode;
4857 bool IllegalOpcodeExceptionEnable;
4858 bool VSaccessesUAV;
4859 bool SoftwareExceptionEnable;
4860 uint32_t ScratchSpaceBaseOffset;
4861 uint32_t PerThreadScratchSpace;
4862 uint32_t DispatchGRFStartRegisterforURBData;
4863 uint32_t VertexURBEntryReadLength;
4864 uint32_t VertexURBEntryReadOffset;
4865 uint32_t MaximumNumberofThreads;
4866 bool StatisticsEnable;
4867 bool VertexCacheDisable;
4868 bool VSFunctionEnable;
4869 };
4870
4871 static inline void
4872 GEN75_3DSTATE_VS_pack(__gen_user_data *data, void * restrict dst,
4873 const struct GEN75_3DSTATE_VS * restrict values)
4874 {
4875 uint32_t *dw = (uint32_t * restrict) dst;
4876
4877 dw[0] =
4878 __gen_field(values->CommandType, 29, 31) |
4879 __gen_field(values->CommandSubType, 27, 28) |
4880 __gen_field(values->_3DCommandOpcode, 24, 26) |
4881 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4882 __gen_field(values->DwordLength, 0, 7) |
4883 0;
4884
4885 dw[1] =
4886 __gen_offset(values->KernelStartPointer, 6, 31) |
4887 0;
4888
4889 dw[2] =
4890 __gen_field(values->SingleVertexDispatch, 31, 31) |
4891 __gen_field(values->VectorMaskEnableVME, 30, 30) |
4892 __gen_field(values->SamplerCount, 27, 29) |
4893 __gen_field(values->BindingTableEntryCount, 18, 25) |
4894 __gen_field(values->ThreadPriority, 17, 17) |
4895 __gen_field(values->FloatingPointMode, 16, 16) |
4896 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
4897 __gen_field(values->VSaccessesUAV, 12, 12) |
4898 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
4899 0;
4900
4901 dw[3] =
4902 __gen_offset(values->ScratchSpaceBaseOffset, 10, 31) |
4903 __gen_field(values->PerThreadScratchSpace, 0, 3) |
4904 0;
4905
4906 dw[4] =
4907 __gen_field(values->DispatchGRFStartRegisterforURBData, 20, 24) |
4908 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
4909 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
4910 0;
4911
4912 dw[5] =
4913 __gen_field(values->MaximumNumberofThreads, 23, 31) |
4914 __gen_field(values->StatisticsEnable, 10, 10) |
4915 __gen_field(values->VertexCacheDisable, 1, 1) |
4916 __gen_field(values->VSFunctionEnable, 0, 0) |
4917 0;
4918
4919 }
4920
4921 #define GEN75_3DSTATE_WM_length_bias 0x00000002
4922 #define GEN75_3DSTATE_WM_header \
4923 .CommandType = 3, \
4924 .CommandSubType = 3, \
4925 ._3DCommandOpcode = 0, \
4926 ._3DCommandSubOpcode = 20, \
4927 .DwordLength = 1
4928
4929 #define GEN75_3DSTATE_WM_length 0x00000003
4930
4931 struct GEN75_3DSTATE_WM {
4932 uint32_t CommandType;
4933 uint32_t CommandSubType;
4934 uint32_t _3DCommandOpcode;
4935 uint32_t _3DCommandSubOpcode;
4936 uint32_t DwordLength;
4937 bool StatisticsEnable;
4938 bool DepthBufferClear;
4939 bool ThreadDispatchEnable;
4940 bool DepthBufferResolveEnable;
4941 bool HierarchicalDepthBufferResolveEnable;
4942 bool LegacyDiamondLineRasterization;
4943 bool PixelShaderKillPixel;
4944 #define PSCDEPTH_OFF 0
4945 #define PSCDEPTH_ON 1
4946 #define PSCDEPTH_ON_GE 2
4947 #define PSCDEPTH_ON_LE 3
4948 uint32_t PixelShaderComputedDepthMode;
4949 #define EDSC_NORMAL 0
4950 #define EDSC_PSEXEC 1
4951 #define EDSC_PREPS 2
4952 uint32_t EarlyDepthStencilControl;
4953 bool PixelShaderUsesSourceDepth;
4954 bool PixelShaderUsesSourceW;
4955 #define INTERP_PIXEL 0
4956 #define INTERP_CENTROID 2
4957 #define INTERP_SAMPLE 3
4958 uint32_t PositionZWInterpolationMode;
4959 uint32_t BarycentricInterpolationMode;
4960 bool PixelShaderUsesInputCoverageMask;
4961 uint32_t LineEndCapAntialiasingRegionWidth;
4962 uint32_t LineAntialiasingRegionWidth;
4963 bool RTIndependentRasterizationEnable;
4964 bool PolygonStippleEnable;
4965 bool LineStippleEnable;
4966 #define RASTRULE_UPPER_LEFT 0
4967 #define RASTRULE_UPPER_RIGHT 1
4968 uint32_t PointRasterizationRule;
4969 #define MSRASTMODE_OFF_PIXEL 0
4970 #define MSRASTMODE_OFF_PATTERN 1
4971 #define MSRASTMODE_ON_PIXEL 2
4972 #define MSRASTMODE_ON_PATTERN 3
4973 uint32_t MultisampleRasterizationMode;
4974 #define MSDISPMODE_PERSAMPLE 0
4975 #define MSDISPMODE_PERPIXEL 1
4976 uint32_t MultisampleDispatchMode;
4977 #define OFF 0
4978 #define ON 1
4979 uint32_t PSUAVonly;
4980 };
4981
4982 static inline void
4983 GEN75_3DSTATE_WM_pack(__gen_user_data *data, void * restrict dst,
4984 const struct GEN75_3DSTATE_WM * restrict values)
4985 {
4986 uint32_t *dw = (uint32_t * restrict) dst;
4987
4988 dw[0] =
4989 __gen_field(values->CommandType, 29, 31) |
4990 __gen_field(values->CommandSubType, 27, 28) |
4991 __gen_field(values->_3DCommandOpcode, 24, 26) |
4992 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4993 __gen_field(values->DwordLength, 0, 7) |
4994 0;
4995
4996 dw[1] =
4997 __gen_field(values->StatisticsEnable, 31, 31) |
4998 __gen_field(values->DepthBufferClear, 30, 30) |
4999 __gen_field(values->ThreadDispatchEnable, 29, 29) |
5000 __gen_field(values->DepthBufferResolveEnable, 28, 28) |
5001 __gen_field(values->HierarchicalDepthBufferResolveEnable, 27, 27) |
5002 __gen_field(values->LegacyDiamondLineRasterization, 26, 26) |
5003 __gen_field(values->PixelShaderKillPixel, 25, 25) |
5004 __gen_field(values->PixelShaderComputedDepthMode, 23, 24) |
5005 __gen_field(values->EarlyDepthStencilControl, 21, 22) |
5006 __gen_field(values->PixelShaderUsesSourceDepth, 20, 20) |
5007 __gen_field(values->PixelShaderUsesSourceW, 19, 19) |
5008 __gen_field(values->PositionZWInterpolationMode, 17, 18) |
5009 __gen_field(values->BarycentricInterpolationMode, 11, 16) |
5010 __gen_field(values->PixelShaderUsesInputCoverageMask, 10, 10) |
5011 __gen_field(values->LineEndCapAntialiasingRegionWidth, 8, 9) |
5012 __gen_field(values->LineAntialiasingRegionWidth, 6, 7) |
5013 __gen_field(values->RTIndependentRasterizationEnable, 5, 5) |
5014 __gen_field(values->PolygonStippleEnable, 4, 4) |
5015 __gen_field(values->LineStippleEnable, 3, 3) |
5016 __gen_field(values->PointRasterizationRule, 2, 2) |
5017 __gen_field(values->MultisampleRasterizationMode, 0, 1) |
5018 0;
5019
5020 dw[2] =
5021 __gen_field(values->MultisampleDispatchMode, 31, 31) |
5022 __gen_field(values->PSUAVonly, 30, 30) |
5023 0;
5024
5025 }
5026
5027 #define GEN75_GPGPU_OBJECT_length_bias 0x00000002
5028 #define GEN75_GPGPU_OBJECT_header \
5029 .CommandType = 3, \
5030 .Pipeline = 2, \
5031 .MediaCommandOpcode = 1, \
5032 .SubOpcode = 4, \
5033 .DwordLength = 6
5034
5035 #define GEN75_GPGPU_OBJECT_length 0x00000008
5036
5037 struct GEN75_GPGPU_OBJECT {
5038 uint32_t CommandType;
5039 uint32_t Pipeline;
5040 uint32_t MediaCommandOpcode;
5041 uint32_t SubOpcode;
5042 bool PredicateEnable;
5043 uint32_t DwordLength;
5044 uint32_t SharedLocalMemoryFixedOffset;
5045 uint32_t InterfaceDescriptorOffset;
5046 uint32_t SharedLocalMemoryOffset;
5047 uint32_t EndofThreadGroup;
5048 #define Slice0 0
5049 #define Slice1 1
5050 uint32_t SliceDestinationSelect;
5051 #define HalfSlice1 2
5052 #define HalfSlice0 1
5053 #define EitherHalfSlice 0
5054 uint32_t HalfSliceDestinationSelect;
5055 uint32_t IndirectDataLength;
5056 uint32_t IndirectDataStartAddress;
5057 uint32_t ThreadGroupIDX;
5058 uint32_t ThreadGroupIDY;
5059 uint32_t ThreadGroupIDZ;
5060 uint32_t ExecutionMask;
5061 };
5062
5063 static inline void
5064 GEN75_GPGPU_OBJECT_pack(__gen_user_data *data, void * restrict dst,
5065 const struct GEN75_GPGPU_OBJECT * restrict values)
5066 {
5067 uint32_t *dw = (uint32_t * restrict) dst;
5068
5069 dw[0] =
5070 __gen_field(values->CommandType, 29, 31) |
5071 __gen_field(values->Pipeline, 27, 28) |
5072 __gen_field(values->MediaCommandOpcode, 24, 26) |
5073 __gen_field(values->SubOpcode, 16, 23) |
5074 __gen_field(values->PredicateEnable, 8, 8) |
5075 __gen_field(values->DwordLength, 0, 7) |
5076 0;
5077
5078 dw[1] =
5079 __gen_field(values->SharedLocalMemoryFixedOffset, 7, 7) |
5080 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
5081 0;
5082
5083 dw[2] =
5084 __gen_field(values->SharedLocalMemoryOffset, 28, 31) |
5085 __gen_field(values->EndofThreadGroup, 24, 24) |
5086 __gen_field(values->SliceDestinationSelect, 19, 19) |
5087 __gen_field(values->HalfSliceDestinationSelect, 17, 18) |
5088 __gen_field(values->IndirectDataLength, 0, 16) |
5089 0;
5090
5091 dw[3] =
5092 __gen_offset(values->IndirectDataStartAddress, 0, 31) |
5093 0;
5094
5095 dw[4] =
5096 __gen_field(values->ThreadGroupIDX, 0, 31) |
5097 0;
5098
5099 dw[5] =
5100 __gen_field(values->ThreadGroupIDY, 0, 31) |
5101 0;
5102
5103 dw[6] =
5104 __gen_field(values->ThreadGroupIDZ, 0, 31) |
5105 0;
5106
5107 dw[7] =
5108 __gen_field(values->ExecutionMask, 0, 31) |
5109 0;
5110
5111 }
5112
5113 #define GEN75_GPGPU_WALKER_length_bias 0x00000002
5114 #define GEN75_GPGPU_WALKER_header \
5115 .CommandType = 3, \
5116 .Pipeline = 2, \
5117 .MediaCommandOpcode = 1, \
5118 .SubOpcodeA = 5, \
5119 .DwordLength = 9
5120
5121 #define GEN75_GPGPU_WALKER_length 0x0000000b
5122
5123 struct GEN75_GPGPU_WALKER {
5124 uint32_t CommandType;
5125 uint32_t Pipeline;
5126 uint32_t MediaCommandOpcode;
5127 uint32_t SubOpcodeA;
5128 bool IndirectParameterEnable;
5129 bool PredicateEnable;
5130 uint32_t DwordLength;
5131 uint32_t InterfaceDescriptorOffset;
5132 #define SIMD8 0
5133 #define SIMD16 1
5134 #define SIMD32 2
5135 uint32_t SIMDSize;
5136 uint32_t ThreadDepthCounterMaximum;
5137 uint32_t ThreadHeightCounterMaximum;
5138 uint32_t ThreadWidthCounterMaximum;
5139 uint32_t ThreadGroupIDStartingX;
5140 uint32_t ThreadGroupIDXDimension;
5141 uint32_t ThreadGroupIDStartingY;
5142 uint32_t ThreadGroupIDYDimension;
5143 uint32_t ThreadGroupIDStartingZ;
5144 uint32_t ThreadGroupIDZDimension;
5145 uint32_t RightExecutionMask;
5146 uint32_t BottomExecutionMask;
5147 };
5148
5149 static inline void
5150 GEN75_GPGPU_WALKER_pack(__gen_user_data *data, void * restrict dst,
5151 const struct GEN75_GPGPU_WALKER * restrict values)
5152 {
5153 uint32_t *dw = (uint32_t * restrict) dst;
5154
5155 dw[0] =
5156 __gen_field(values->CommandType, 29, 31) |
5157 __gen_field(values->Pipeline, 27, 28) |
5158 __gen_field(values->MediaCommandOpcode, 24, 26) |
5159 __gen_field(values->SubOpcodeA, 16, 23) |
5160 __gen_field(values->IndirectParameterEnable, 10, 10) |
5161 __gen_field(values->PredicateEnable, 8, 8) |
5162 __gen_field(values->DwordLength, 0, 7) |
5163 0;
5164
5165 dw[1] =
5166 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
5167 0;
5168
5169 dw[2] =
5170 __gen_field(values->SIMDSize, 30, 31) |
5171 __gen_field(values->ThreadDepthCounterMaximum, 16, 21) |
5172 __gen_field(values->ThreadHeightCounterMaximum, 8, 13) |
5173 __gen_field(values->ThreadWidthCounterMaximum, 0, 5) |
5174 0;
5175
5176 dw[3] =
5177 __gen_field(values->ThreadGroupIDStartingX, 0, 31) |
5178 0;
5179
5180 dw[4] =
5181 __gen_field(values->ThreadGroupIDXDimension, 0, 31) |
5182 0;
5183
5184 dw[5] =
5185 __gen_field(values->ThreadGroupIDStartingY, 0, 31) |
5186 0;
5187
5188 dw[6] =
5189 __gen_field(values->ThreadGroupIDYDimension, 0, 31) |
5190 0;
5191
5192 dw[7] =
5193 __gen_field(values->ThreadGroupIDStartingZ, 0, 31) |
5194 0;
5195
5196 dw[8] =
5197 __gen_field(values->ThreadGroupIDZDimension, 0, 31) |
5198 0;
5199
5200 dw[9] =
5201 __gen_field(values->RightExecutionMask, 0, 31) |
5202 0;
5203
5204 dw[10] =
5205 __gen_field(values->BottomExecutionMask, 0, 31) |
5206 0;
5207
5208 }
5209
5210 #define GEN75_MEDIA_CURBE_LOAD_length_bias 0x00000002
5211 #define GEN75_MEDIA_CURBE_LOAD_header \
5212 .CommandType = 3, \
5213 .Pipeline = 2, \
5214 .MediaCommandOpcode = 0, \
5215 .SubOpcode = 1, \
5216 .DwordLength = 2
5217
5218 #define GEN75_MEDIA_CURBE_LOAD_length 0x00000004
5219
5220 struct GEN75_MEDIA_CURBE_LOAD {
5221 uint32_t CommandType;
5222 uint32_t Pipeline;
5223 uint32_t MediaCommandOpcode;
5224 uint32_t SubOpcode;
5225 uint32_t DwordLength;
5226 uint32_t CURBETotalDataLength;
5227 uint32_t CURBEDataStartAddress;
5228 };
5229
5230 static inline void
5231 GEN75_MEDIA_CURBE_LOAD_pack(__gen_user_data *data, void * restrict dst,
5232 const struct GEN75_MEDIA_CURBE_LOAD * restrict values)
5233 {
5234 uint32_t *dw = (uint32_t * restrict) dst;
5235
5236 dw[0] =
5237 __gen_field(values->CommandType, 29, 31) |
5238 __gen_field(values->Pipeline, 27, 28) |
5239 __gen_field(values->MediaCommandOpcode, 24, 26) |
5240 __gen_field(values->SubOpcode, 16, 23) |
5241 __gen_field(values->DwordLength, 0, 15) |
5242 0;
5243
5244 dw[1] =
5245 0;
5246
5247 dw[2] =
5248 __gen_field(values->CURBETotalDataLength, 0, 16) |
5249 0;
5250
5251 dw[3] =
5252 __gen_field(values->CURBEDataStartAddress, 0, 31) |
5253 0;
5254
5255 }
5256
5257 #define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length_bias 0x00000002
5258 #define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_header\
5259 .CommandType = 3, \
5260 .Pipeline = 2, \
5261 .MediaCommandOpcode = 0, \
5262 .SubOpcode = 2, \
5263 .DwordLength = 2
5264
5265 #define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 0x00000004
5266
5267 struct GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD {
5268 uint32_t CommandType;
5269 uint32_t Pipeline;
5270 uint32_t MediaCommandOpcode;
5271 uint32_t SubOpcode;
5272 uint32_t DwordLength;
5273 uint32_t InterfaceDescriptorTotalLength;
5274 uint32_t InterfaceDescriptorDataStartAddress;
5275 };
5276
5277 static inline void
5278 GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_pack(__gen_user_data *data, void * restrict dst,
5279 const struct GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD * restrict values)
5280 {
5281 uint32_t *dw = (uint32_t * restrict) dst;
5282
5283 dw[0] =
5284 __gen_field(values->CommandType, 29, 31) |
5285 __gen_field(values->Pipeline, 27, 28) |
5286 __gen_field(values->MediaCommandOpcode, 24, 26) |
5287 __gen_field(values->SubOpcode, 16, 23) |
5288 __gen_field(values->DwordLength, 0, 15) |
5289 0;
5290
5291 dw[1] =
5292 0;
5293
5294 dw[2] =
5295 __gen_field(values->InterfaceDescriptorTotalLength, 0, 16) |
5296 0;
5297
5298 dw[3] =
5299 __gen_offset(values->InterfaceDescriptorDataStartAddress, 0, 31) |
5300 0;
5301
5302 }
5303
5304 #define GEN75_MEDIA_OBJECT_length_bias 0x00000002
5305 #define GEN75_MEDIA_OBJECT_header \
5306 .CommandType = 3, \
5307 .MediaCommandPipeline = 2, \
5308 .MediaCommandOpcode = 1, \
5309 .MediaCommandSubOpcode = 0
5310
5311 #define GEN75_MEDIA_OBJECT_length 0x00000000
5312
5313 struct GEN75_MEDIA_OBJECT {
5314 uint32_t CommandType;
5315 uint32_t MediaCommandPipeline;
5316 uint32_t MediaCommandOpcode;
5317 uint32_t MediaCommandSubOpcode;
5318 uint32_t DwordLength;
5319 uint32_t InterfaceDescriptorOffset;
5320 bool ChildrenPresent;
5321 #define Nothreadsynchronization 0
5322 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
5323 uint32_t ThreadSynchronization;
5324 #define Notusingscoreboard 0
5325 #define Usingscoreboard 1
5326 uint32_t UseScoreboard;
5327 #define Slice0 0
5328 #define Slice1 1
5329 #define EitherSlice 0
5330 uint32_t SliceDestinationSelect;
5331 #define HalfSlice1 2
5332 #define HalfSlice0 1
5333 #define Eitherhalfslice 0
5334 uint32_t HalfSliceDestinationSelect;
5335 uint32_t IndirectDataLength;
5336 __gen_address_type IndirectDataStartAddress;
5337 uint32_t ScoredboardY;
5338 uint32_t ScoreboardX;
5339 uint32_t ScoreboardColor;
5340 bool ScoreboardMask;
5341 /* variable length fields follow */
5342 };
5343
5344 static inline void
5345 GEN75_MEDIA_OBJECT_pack(__gen_user_data *data, void * restrict dst,
5346 const struct GEN75_MEDIA_OBJECT * restrict values)
5347 {
5348 uint32_t *dw = (uint32_t * restrict) dst;
5349
5350 dw[0] =
5351 __gen_field(values->CommandType, 29, 31) |
5352 __gen_field(values->MediaCommandPipeline, 27, 28) |
5353 __gen_field(values->MediaCommandOpcode, 24, 26) |
5354 __gen_field(values->MediaCommandSubOpcode, 16, 23) |
5355 __gen_field(values->DwordLength, 0, 15) |
5356 0;
5357
5358 dw[1] =
5359 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
5360 0;
5361
5362 dw[2] =
5363 __gen_field(values->ChildrenPresent, 31, 31) |
5364 __gen_field(values->ThreadSynchronization, 24, 24) |
5365 __gen_field(values->UseScoreboard, 21, 21) |
5366 __gen_field(values->SliceDestinationSelect, 19, 19) |
5367 __gen_field(values->HalfSliceDestinationSelect, 17, 18) |
5368 __gen_field(values->IndirectDataLength, 0, 16) |
5369 0;
5370
5371 uint32_t dw3 =
5372 0;
5373
5374 dw[3] =
5375 __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, dw3);
5376
5377 dw[4] =
5378 __gen_field(values->ScoredboardY, 16, 24) |
5379 __gen_field(values->ScoreboardX, 0, 8) |
5380 0;
5381
5382 dw[5] =
5383 __gen_field(values->ScoreboardColor, 16, 19) |
5384 __gen_field(values->ScoreboardMask, 0, 7) |
5385 0;
5386
5387 /* variable length fields follow */
5388 }
5389
5390 #define GEN75_MEDIA_OBJECT_PRT_length_bias 0x00000002
5391 #define GEN75_MEDIA_OBJECT_PRT_header \
5392 .CommandType = 3, \
5393 .Pipeline = 2, \
5394 .MediaCommandOpcode = 1, \
5395 .SubOpcode = 2, \
5396 .DwordLength = 14
5397
5398 #define GEN75_MEDIA_OBJECT_PRT_length 0x00000010
5399
5400 struct GEN75_MEDIA_OBJECT_PRT {
5401 uint32_t CommandType;
5402 uint32_t Pipeline;
5403 uint32_t MediaCommandOpcode;
5404 uint32_t SubOpcode;
5405 uint32_t DwordLength;
5406 uint32_t InterfaceDescriptorOffset;
5407 bool ChildrenPresent;
5408 bool PRT_FenceNeeded;
5409 #define Rootthreadqueue 0
5410 #define VFEstateflush 1
5411 uint32_t PRT_FenceType;
5412 uint32_t InlineData[12];
5413 };
5414
5415 static inline void
5416 GEN75_MEDIA_OBJECT_PRT_pack(__gen_user_data *data, void * restrict dst,
5417 const struct GEN75_MEDIA_OBJECT_PRT * restrict values)
5418 {
5419 uint32_t *dw = (uint32_t * restrict) dst;
5420
5421 dw[0] =
5422 __gen_field(values->CommandType, 29, 31) |
5423 __gen_field(values->Pipeline, 27, 28) |
5424 __gen_field(values->MediaCommandOpcode, 24, 26) |
5425 __gen_field(values->SubOpcode, 16, 23) |
5426 __gen_field(values->DwordLength, 0, 15) |
5427 0;
5428
5429 dw[1] =
5430 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
5431 0;
5432
5433 dw[2] =
5434 __gen_field(values->ChildrenPresent, 31, 31) |
5435 __gen_field(values->PRT_FenceNeeded, 23, 23) |
5436 __gen_field(values->PRT_FenceType, 22, 22) |
5437 0;
5438
5439 dw[3] =
5440 0;
5441
5442 for (uint32_t i = 0, j = 4; i < 12; i += 1, j++) {
5443 dw[j] =
5444 __gen_field(values->InlineData[i + 0], 0, 31) |
5445 0;
5446 }
5447
5448 }
5449
5450 #define GEN75_MEDIA_OBJECT_WALKER_length_bias 0x00000002
5451 #define GEN75_MEDIA_OBJECT_WALKER_header \
5452 .CommandType = 3, \
5453 .Pipeline = 2, \
5454 .MediaCommandOpcode = 1, \
5455 .SubOpcode = 3
5456
5457 #define GEN75_MEDIA_OBJECT_WALKER_length 0x00000000
5458
5459 struct GEN75_MEDIA_OBJECT_WALKER {
5460 uint32_t CommandType;
5461 uint32_t Pipeline;
5462 uint32_t MediaCommandOpcode;
5463 uint32_t SubOpcode;
5464 uint32_t DwordLength;
5465 uint32_t InterfaceDescriptorOffset;
5466 bool ChildrenPresent;
5467 #define Nothreadsynchronization 0
5468 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
5469 uint32_t ThreadSynchronization;
5470 #define Notusingscoreboard 0
5471 #define Usingscoreboard 1
5472 uint32_t UseScoreboard;
5473 uint32_t IndirectDataLength;
5474 uint32_t IndirectDataStartAddress;
5475 bool ScoreboardMask;
5476 bool DualMode;
5477 bool Repel;
5478 bool QuadMode;
5479 uint32_t ColorCountMinusOne;
5480 uint32_t MiddleLoopExtraSteps;
5481 uint32_t LocalMidLoopUnitY;
5482 uint32_t MidLoopUnitX;
5483 uint32_t GlobalLoopExecCount;
5484 uint32_t LocalLoopExecCount;
5485 uint32_t BlockResolutionY;
5486 uint32_t BlockResolutionX;
5487 uint32_t LocalStartY;
5488 uint32_t LocalStartX;
5489 uint32_t LocalOuterLoopStrideY;
5490 uint32_t LocalOuterLoopStrideX;
5491 uint32_t LocalInnerLoopUnitY;
5492 uint32_t LocalInnerLoopUnitX;
5493 uint32_t GlobalResolutionY;
5494 uint32_t GlobalResolutionX;
5495 uint32_t GlobalStartY;
5496 uint32_t GlobalStartX;
5497 uint32_t GlobalOuterLoopStrideY;
5498 uint32_t GlobalOuterLoopStrideX;
5499 uint32_t GlobalInnerLoopUnitY;
5500 uint32_t GlobalInnerLoopUnitX;
5501 /* variable length fields follow */
5502 };
5503
5504 static inline void
5505 GEN75_MEDIA_OBJECT_WALKER_pack(__gen_user_data *data, void * restrict dst,
5506 const struct GEN75_MEDIA_OBJECT_WALKER * restrict values)
5507 {
5508 uint32_t *dw = (uint32_t * restrict) dst;
5509
5510 dw[0] =
5511 __gen_field(values->CommandType, 29, 31) |
5512 __gen_field(values->Pipeline, 27, 28) |
5513 __gen_field(values->MediaCommandOpcode, 24, 26) |
5514 __gen_field(values->SubOpcode, 16, 23) |
5515 __gen_field(values->DwordLength, 0, 15) |
5516 0;
5517
5518 dw[1] =
5519 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
5520 0;
5521
5522 dw[2] =
5523 __gen_field(values->ChildrenPresent, 31, 31) |
5524 __gen_field(values->ThreadSynchronization, 24, 24) |
5525 __gen_field(values->UseScoreboard, 21, 21) |
5526 __gen_field(values->IndirectDataLength, 0, 16) |
5527 0;
5528
5529 dw[3] =
5530 __gen_offset(values->IndirectDataStartAddress, 0, 31) |
5531 0;
5532
5533 dw[4] =
5534 0;
5535
5536 dw[5] =
5537 __gen_field(values->ScoreboardMask, 0, 7) |
5538 0;
5539
5540 dw[6] =
5541 __gen_field(values->DualMode, 31, 31) |
5542 __gen_field(values->Repel, 30, 30) |
5543 __gen_field(values->QuadMode, 29, 29) |
5544 __gen_field(values->ColorCountMinusOne, 24, 27) |
5545 __gen_field(values->MiddleLoopExtraSteps, 16, 20) |
5546 __gen_field(values->LocalMidLoopUnitY, 12, 13) |
5547 __gen_field(values->MidLoopUnitX, 8, 9) |
5548 0;
5549
5550 dw[7] =
5551 __gen_field(values->GlobalLoopExecCount, 16, 25) |
5552 __gen_field(values->LocalLoopExecCount, 0, 9) |
5553 0;
5554
5555 dw[8] =
5556 __gen_field(values->BlockResolutionY, 16, 24) |
5557 __gen_field(values->BlockResolutionX, 0, 8) |
5558 0;
5559
5560 dw[9] =
5561 __gen_field(values->LocalStartY, 16, 24) |
5562 __gen_field(values->LocalStartX, 0, 8) |
5563 0;
5564
5565 dw[10] =
5566 0;
5567
5568 dw[11] =
5569 __gen_field(values->LocalOuterLoopStrideY, 16, 25) |
5570 __gen_field(values->LocalOuterLoopStrideX, 0, 9) |
5571 0;
5572
5573 dw[12] =
5574 __gen_field(values->LocalInnerLoopUnitY, 16, 25) |
5575 __gen_field(values->LocalInnerLoopUnitX, 0, 9) |
5576 0;
5577
5578 dw[13] =
5579 __gen_field(values->GlobalResolutionY, 16, 24) |
5580 __gen_field(values->GlobalResolutionX, 0, 8) |
5581 0;
5582
5583 dw[14] =
5584 __gen_field(values->GlobalStartY, 16, 25) |
5585 __gen_field(values->GlobalStartX, 0, 9) |
5586 0;
5587
5588 dw[15] =
5589 __gen_field(values->GlobalOuterLoopStrideY, 16, 25) |
5590 __gen_field(values->GlobalOuterLoopStrideX, 0, 9) |
5591 0;
5592
5593 dw[16] =
5594 __gen_field(values->GlobalInnerLoopUnitY, 16, 25) |
5595 __gen_field(values->GlobalInnerLoopUnitX, 0, 9) |
5596 0;
5597
5598 /* variable length fields follow */
5599 }
5600
5601 #define GEN75_MEDIA_STATE_FLUSH_length_bias 0x00000002
5602 #define GEN75_MEDIA_STATE_FLUSH_header \
5603 .CommandType = 3, \
5604 .Pipeline = 2, \
5605 .MediaCommandOpcode = 0, \
5606 .SubOpcode = 4, \
5607 .DwordLength = 0
5608
5609 #define GEN75_MEDIA_STATE_FLUSH_length 0x00000002
5610
5611 struct GEN75_MEDIA_STATE_FLUSH {
5612 uint32_t CommandType;
5613 uint32_t Pipeline;
5614 uint32_t MediaCommandOpcode;
5615 uint32_t SubOpcode;
5616 uint32_t DwordLength;
5617 bool DisablePreemption;
5618 bool FlushtoGO;
5619 uint32_t WatermarkRequired;
5620 uint32_t InterfaceDescriptorOffset;
5621 };
5622
5623 static inline void
5624 GEN75_MEDIA_STATE_FLUSH_pack(__gen_user_data *data, void * restrict dst,
5625 const struct GEN75_MEDIA_STATE_FLUSH * restrict values)
5626 {
5627 uint32_t *dw = (uint32_t * restrict) dst;
5628
5629 dw[0] =
5630 __gen_field(values->CommandType, 29, 31) |
5631 __gen_field(values->Pipeline, 27, 28) |
5632 __gen_field(values->MediaCommandOpcode, 24, 26) |
5633 __gen_field(values->SubOpcode, 16, 23) |
5634 __gen_field(values->DwordLength, 0, 15) |
5635 0;
5636
5637 dw[1] =
5638 __gen_field(values->DisablePreemption, 8, 8) |
5639 __gen_field(values->FlushtoGO, 7, 7) |
5640 __gen_field(values->WatermarkRequired, 6, 6) |
5641 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
5642 0;
5643
5644 }
5645
5646 #define GEN75_MEDIA_VFE_STATE_length_bias 0x00000002
5647 #define GEN75_MEDIA_VFE_STATE_header \
5648 .CommandType = 3, \
5649 .Pipeline = 2, \
5650 .MediaCommandOpcode = 0, \
5651 .SubOpcode = 0, \
5652 .DwordLength = 6
5653
5654 #define GEN75_MEDIA_VFE_STATE_length 0x00000008
5655
5656 struct GEN75_MEDIA_VFE_STATE {
5657 uint32_t CommandType;
5658 uint32_t Pipeline;
5659 uint32_t MediaCommandOpcode;
5660 uint32_t SubOpcode;
5661 uint32_t DwordLength;
5662 uint32_t ScratchSpaceBasePointer;
5663 uint32_t StackSize;
5664 uint32_t PerThreadScratchSpace;
5665 uint32_t MaximumNumberofThreads;
5666 uint32_t NumberofURBEntries;
5667 #define Maintainingtheexistingtimestampstate 0
5668 #define Resettingrelativetimerandlatchingtheglobaltimestamp 1
5669 uint32_t ResetGatewayTimer;
5670 #define MaintainingOpenGatewayForwardMsgCloseGatewayprotocollegacymode 0
5671 #define BypassingOpenGatewayCloseGatewayprotocol 1
5672 uint32_t BypassGatewayControl;
5673 uint32_t GPGPUMode;
5674 uint32_t HalfSliceDisable;
5675 uint32_t URBEntryAllocationSize;
5676 uint32_t CURBEAllocationSize;
5677 #define Scoreboarddisabled 0
5678 #define Scoreboardenabled 1
5679 uint32_t ScoreboardEnable;
5680 #define StallingScoreboard 0
5681 #define NonStallingScoreboard 1
5682 uint32_t ScoreboardType;
5683 uint32_t ScoreboardMask;
5684 uint32_t Scoreboard3DeltaY;
5685 uint32_t Scoreboard3DeltaX;
5686 uint32_t Scoreboard2DeltaY;
5687 uint32_t Scoreboard2DeltaX;
5688 uint32_t Scoreboard1DeltaY;
5689 uint32_t Scoreboard1DeltaX;
5690 uint32_t Scoreboard0DeltaY;
5691 uint32_t Scoreboard0DeltaX;
5692 uint32_t Scoreboard7DeltaY;
5693 uint32_t Scoreboard7DeltaX;
5694 uint32_t Scoreboard6DeltaY;
5695 uint32_t Scoreboard6DeltaX;
5696 uint32_t Scoreboard5DeltaY;
5697 uint32_t Scoreboard5DeltaX;
5698 uint32_t Scoreboard4DeltaY;
5699 uint32_t Scoreboard4DeltaX;
5700 };
5701
5702 static inline void
5703 GEN75_MEDIA_VFE_STATE_pack(__gen_user_data *data, void * restrict dst,
5704 const struct GEN75_MEDIA_VFE_STATE * restrict values)
5705 {
5706 uint32_t *dw = (uint32_t * restrict) dst;
5707
5708 dw[0] =
5709 __gen_field(values->CommandType, 29, 31) |
5710 __gen_field(values->Pipeline, 27, 28) |
5711 __gen_field(values->MediaCommandOpcode, 24, 26) |
5712 __gen_field(values->SubOpcode, 16, 23) |
5713 __gen_field(values->DwordLength, 0, 15) |
5714 0;
5715
5716 dw[1] =
5717 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
5718 __gen_field(values->StackSize, 4, 7) |
5719 __gen_field(values->PerThreadScratchSpace, 0, 3) |
5720 0;
5721
5722 dw[2] =
5723 __gen_field(values->MaximumNumberofThreads, 16, 31) |
5724 __gen_field(values->NumberofURBEntries, 8, 15) |
5725 __gen_field(values->ResetGatewayTimer, 7, 7) |
5726 __gen_field(values->BypassGatewayControl, 6, 6) |
5727 __gen_field(values->GPGPUMode, 2, 2) |
5728 0;
5729
5730 dw[3] =
5731 __gen_field(values->HalfSliceDisable, 0, 1) |
5732 0;
5733
5734 dw[4] =
5735 __gen_field(values->URBEntryAllocationSize, 16, 31) |
5736 __gen_field(values->CURBEAllocationSize, 0, 15) |
5737 0;
5738
5739 dw[5] =
5740 __gen_field(values->ScoreboardEnable, 31, 31) |
5741 __gen_field(values->ScoreboardType, 30, 30) |
5742 __gen_field(values->ScoreboardMask, 0, 7) |
5743 0;
5744
5745 dw[6] =
5746 __gen_field(values->Scoreboard3DeltaY, 28, 31) |
5747 __gen_field(values->Scoreboard3DeltaX, 24, 27) |
5748 __gen_field(values->Scoreboard2DeltaY, 20, 23) |
5749 __gen_field(values->Scoreboard2DeltaX, 16, 19) |
5750 __gen_field(values->Scoreboard1DeltaY, 12, 15) |
5751 __gen_field(values->Scoreboard1DeltaX, 8, 11) |
5752 __gen_field(values->Scoreboard0DeltaY, 4, 7) |
5753 __gen_field(values->Scoreboard0DeltaX, 0, 3) |
5754 0;
5755
5756 dw[7] =
5757 __gen_field(values->Scoreboard7DeltaY, 28, 31) |
5758 __gen_field(values->Scoreboard7DeltaX, 24, 27) |
5759 __gen_field(values->Scoreboard6DeltaY, 20, 23) |
5760 __gen_field(values->Scoreboard6DeltaX, 16, 19) |
5761 __gen_field(values->Scoreboard5DeltaY, 12, 15) |
5762 __gen_field(values->Scoreboard5DeltaX, 8, 11) |
5763 __gen_field(values->Scoreboard4DeltaY, 4, 7) |
5764 __gen_field(values->Scoreboard4DeltaX, 0, 3) |
5765 0;
5766
5767 }
5768
5769 #define GEN75_MI_ARB_CHECK_length_bias 0x00000001
5770 #define GEN75_MI_ARB_CHECK_header \
5771 .CommandType = 0, \
5772 .MICommandOpcode = 5
5773
5774 #define GEN75_MI_ARB_CHECK_length 0x00000001
5775
5776 struct GEN75_MI_ARB_CHECK {
5777 uint32_t CommandType;
5778 uint32_t MICommandOpcode;
5779 };
5780
5781 static inline void
5782 GEN75_MI_ARB_CHECK_pack(__gen_user_data *data, void * restrict dst,
5783 const struct GEN75_MI_ARB_CHECK * restrict values)
5784 {
5785 uint32_t *dw = (uint32_t * restrict) dst;
5786
5787 dw[0] =
5788 __gen_field(values->CommandType, 29, 31) |
5789 __gen_field(values->MICommandOpcode, 23, 28) |
5790 0;
5791
5792 }
5793
5794 #define GEN75_MI_ARB_ON_OFF_length_bias 0x00000001
5795 #define GEN75_MI_ARB_ON_OFF_header \
5796 .CommandType = 0, \
5797 .MICommandOpcode = 8
5798
5799 #define GEN75_MI_ARB_ON_OFF_length 0x00000001
5800
5801 struct GEN75_MI_ARB_ON_OFF {
5802 uint32_t CommandType;
5803 uint32_t MICommandOpcode;
5804 bool ArbitrationEnable;
5805 };
5806
5807 static inline void
5808 GEN75_MI_ARB_ON_OFF_pack(__gen_user_data *data, void * restrict dst,
5809 const struct GEN75_MI_ARB_ON_OFF * restrict values)
5810 {
5811 uint32_t *dw = (uint32_t * restrict) dst;
5812
5813 dw[0] =
5814 __gen_field(values->CommandType, 29, 31) |
5815 __gen_field(values->MICommandOpcode, 23, 28) |
5816 __gen_field(values->ArbitrationEnable, 0, 0) |
5817 0;
5818
5819 }
5820
5821 #define GEN75_MI_BATCH_BUFFER_END_length_bias 0x00000001
5822 #define GEN75_MI_BATCH_BUFFER_END_header \
5823 .CommandType = 0, \
5824 .MICommandOpcode = 10
5825
5826 #define GEN75_MI_BATCH_BUFFER_END_length 0x00000001
5827
5828 struct GEN75_MI_BATCH_BUFFER_END {
5829 uint32_t CommandType;
5830 uint32_t MICommandOpcode;
5831 };
5832
5833 static inline void
5834 GEN75_MI_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
5835 const struct GEN75_MI_BATCH_BUFFER_END * restrict values)
5836 {
5837 uint32_t *dw = (uint32_t * restrict) dst;
5838
5839 dw[0] =
5840 __gen_field(values->CommandType, 29, 31) |
5841 __gen_field(values->MICommandOpcode, 23, 28) |
5842 0;
5843
5844 }
5845
5846 #define GEN75_MI_BATCH_BUFFER_START_length_bias 0x00000002
5847 #define GEN75_MI_BATCH_BUFFER_START_header \
5848 .CommandType = 0, \
5849 .MICommandOpcode = 49, \
5850 .DwordLength = 0
5851
5852 #define GEN75_MI_BATCH_BUFFER_START_length 0x00000002
5853
5854 struct GEN75_MI_BATCH_BUFFER_START {
5855 uint32_t CommandType;
5856 uint32_t MICommandOpcode;
5857 #define _1stlevelbatch 0
5858 #define _2ndlevelbatch 1
5859 uint32_t _2ndLevelBatchBuffer;
5860 bool AddOffsetEnable;
5861 bool PredicationEnable;
5862 uint32_t NonPrivileged;
5863 bool ClearCommandBufferEnable;
5864 bool ResourceStreamerEnable;
5865 #define ASI_GGTT 0
5866 #define ASI_PPGTT 1
5867 uint32_t AddressSpaceIndicator;
5868 uint32_t DwordLength;
5869 __gen_address_type BatchBufferStartAddress;
5870 };
5871
5872 static inline void
5873 GEN75_MI_BATCH_BUFFER_START_pack(__gen_user_data *data, void * restrict dst,
5874 const struct GEN75_MI_BATCH_BUFFER_START * restrict values)
5875 {
5876 uint32_t *dw = (uint32_t * restrict) dst;
5877
5878 dw[0] =
5879 __gen_field(values->CommandType, 29, 31) |
5880 __gen_field(values->MICommandOpcode, 23, 28) |
5881 __gen_field(values->_2ndLevelBatchBuffer, 22, 22) |
5882 __gen_field(values->AddOffsetEnable, 16, 16) |
5883 __gen_field(values->PredicationEnable, 15, 15) |
5884 __gen_field(values->NonPrivileged, 13, 13) |
5885 __gen_field(values->ClearCommandBufferEnable, 11, 11) |
5886 __gen_field(values->ResourceStreamerEnable, 10, 10) |
5887 __gen_field(values->AddressSpaceIndicator, 8, 8) |
5888 __gen_field(values->DwordLength, 0, 7) |
5889 0;
5890
5891 uint32_t dw1 =
5892 0;
5893
5894 dw[1] =
5895 __gen_combine_address(data, &dw[1], values->BatchBufferStartAddress, dw1);
5896
5897 }
5898
5899 #define GEN75_MI_CLFLUSH_length_bias 0x00000002
5900 #define GEN75_MI_CLFLUSH_header \
5901 .CommandType = 0, \
5902 .MICommandOpcode = 39
5903
5904 #define GEN75_MI_CLFLUSH_length 0x00000000
5905
5906 struct GEN75_MI_CLFLUSH {
5907 uint32_t CommandType;
5908 uint32_t MICommandOpcode;
5909 #define PerProcessGraphicsAddress 0
5910 #define GlobalGraphicsAddress 1
5911 uint32_t UseGlobalGTT;
5912 uint32_t DwordLength;
5913 __gen_address_type PageBaseAddress;
5914 uint32_t StartingCachelineOffset;
5915 __gen_address_type PageBaseAddressHigh;
5916 /* variable length fields follow */
5917 };
5918
5919 static inline void
5920 GEN75_MI_CLFLUSH_pack(__gen_user_data *data, void * restrict dst,
5921 const struct GEN75_MI_CLFLUSH * restrict values)
5922 {
5923 uint32_t *dw = (uint32_t * restrict) dst;
5924
5925 dw[0] =
5926 __gen_field(values->CommandType, 29, 31) |
5927 __gen_field(values->MICommandOpcode, 23, 28) |
5928 __gen_field(values->UseGlobalGTT, 22, 22) |
5929 __gen_field(values->DwordLength, 0, 9) |
5930 0;
5931
5932 uint32_t dw1 =
5933 __gen_field(values->StartingCachelineOffset, 6, 11) |
5934 0;
5935
5936 dw[1] =
5937 __gen_combine_address(data, &dw[1], values->PageBaseAddress, dw1);
5938
5939 uint32_t dw2 =
5940 0;
5941
5942 dw[2] =
5943 __gen_combine_address(data, &dw[2], values->PageBaseAddressHigh, dw2);
5944
5945 /* variable length fields follow */
5946 }
5947
5948 #define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_length_bias 0x00000002
5949 #define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_header\
5950 .CommandType = 0, \
5951 .MICommandOpcode = 54, \
5952 .UseGlobalGTT = 0, \
5953 .CompareSemaphore = 0, \
5954 .DwordLength = 0
5955
5956 #define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_length 0x00000002
5957
5958 struct GEN75_MI_CONDITIONAL_BATCH_BUFFER_END {
5959 uint32_t CommandType;
5960 uint32_t MICommandOpcode;
5961 uint32_t UseGlobalGTT;
5962 uint32_t CompareSemaphore;
5963 uint32_t DwordLength;
5964 uint32_t CompareDataDword;
5965 __gen_address_type CompareAddress;
5966 };
5967
5968 static inline void
5969 GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
5970 const struct GEN75_MI_CONDITIONAL_BATCH_BUFFER_END * restrict values)
5971 {
5972 uint32_t *dw = (uint32_t * restrict) dst;
5973
5974 dw[0] =
5975 __gen_field(values->CommandType, 29, 31) |
5976 __gen_field(values->MICommandOpcode, 23, 28) |
5977 __gen_field(values->UseGlobalGTT, 22, 22) |
5978 __gen_field(values->CompareSemaphore, 21, 21) |
5979 __gen_field(values->DwordLength, 0, 7) |
5980 0;
5981
5982 dw[1] =
5983 __gen_field(values->CompareDataDword, 0, 31) |
5984 0;
5985
5986 uint32_t dw2 =
5987 0;
5988
5989 dw[2] =
5990 __gen_combine_address(data, &dw[2], values->CompareAddress, dw2);
5991
5992 }
5993
5994 #define GEN75_MI_FLUSH_length_bias 0x00000001
5995 #define GEN75_MI_FLUSH_header \
5996 .CommandType = 0, \
5997 .MICommandOpcode = 4
5998
5999 #define GEN75_MI_FLUSH_length 0x00000001
6000
6001 struct GEN75_MI_FLUSH {
6002 uint32_t CommandType;
6003 uint32_t MICommandOpcode;
6004 bool IndirectStatePointersDisable;
6005 bool GenericMediaStateClear;
6006 #define DontReset 0
6007 #define Reset 1
6008 bool GlobalSnapshotCountReset;
6009 #define Flush 0
6010 #define DontFlush 1
6011 bool RenderCacheFlushInhibit;
6012 #define DontInvalidate 0
6013 #define Invalidate 1
6014 bool StateInstructionCacheInvalidate;
6015 };
6016
6017 static inline void
6018 GEN75_MI_FLUSH_pack(__gen_user_data *data, void * restrict dst,
6019 const struct GEN75_MI_FLUSH * restrict values)
6020 {
6021 uint32_t *dw = (uint32_t * restrict) dst;
6022
6023 dw[0] =
6024 __gen_field(values->CommandType, 29, 31) |
6025 __gen_field(values->MICommandOpcode, 23, 28) |
6026 __gen_field(values->IndirectStatePointersDisable, 5, 5) |
6027 __gen_field(values->GenericMediaStateClear, 4, 4) |
6028 __gen_field(values->GlobalSnapshotCountReset, 3, 3) |
6029 __gen_field(values->RenderCacheFlushInhibit, 2, 2) |
6030 __gen_field(values->StateInstructionCacheInvalidate, 1, 1) |
6031 0;
6032
6033 }
6034
6035 #define GEN75_MI_LOAD_REGISTER_IMM_length_bias 0x00000002
6036 #define GEN75_MI_LOAD_REGISTER_IMM_header \
6037 .CommandType = 0, \
6038 .MICommandOpcode = 34, \
6039 .DwordLength = 1
6040
6041 #define GEN75_MI_LOAD_REGISTER_IMM_length 0x00000003
6042
6043 struct GEN75_MI_LOAD_REGISTER_IMM {
6044 uint32_t CommandType;
6045 uint32_t MICommandOpcode;
6046 uint32_t ByteWriteDisables;
6047 uint32_t DwordLength;
6048 uint32_t RegisterOffset;
6049 uint32_t DataDWord;
6050 };
6051
6052 static inline void
6053 GEN75_MI_LOAD_REGISTER_IMM_pack(__gen_user_data *data, void * restrict dst,
6054 const struct GEN75_MI_LOAD_REGISTER_IMM * restrict values)
6055 {
6056 uint32_t *dw = (uint32_t * restrict) dst;
6057
6058 dw[0] =
6059 __gen_field(values->CommandType, 29, 31) |
6060 __gen_field(values->MICommandOpcode, 23, 28) |
6061 __gen_field(values->ByteWriteDisables, 8, 11) |
6062 __gen_field(values->DwordLength, 0, 7) |
6063 0;
6064
6065 dw[1] =
6066 __gen_offset(values->RegisterOffset, 2, 22) |
6067 0;
6068
6069 dw[2] =
6070 __gen_field(values->DataDWord, 0, 31) |
6071 0;
6072
6073 }
6074
6075 #define GEN75_MI_LOAD_REGISTER_MEM_length_bias 0x00000002
6076 #define GEN75_MI_LOAD_REGISTER_MEM_header \
6077 .CommandType = 0, \
6078 .MICommandOpcode = 41, \
6079 .DwordLength = 1
6080
6081 #define GEN75_MI_LOAD_REGISTER_MEM_length 0x00000003
6082
6083 struct GEN75_MI_LOAD_REGISTER_MEM {
6084 uint32_t CommandType;
6085 uint32_t MICommandOpcode;
6086 bool UseGlobalGTT;
6087 uint32_t AsyncModeEnable;
6088 uint32_t DwordLength;
6089 uint32_t RegisterAddress;
6090 __gen_address_type MemoryAddress;
6091 };
6092
6093 static inline void
6094 GEN75_MI_LOAD_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
6095 const struct GEN75_MI_LOAD_REGISTER_MEM * restrict values)
6096 {
6097 uint32_t *dw = (uint32_t * restrict) dst;
6098
6099 dw[0] =
6100 __gen_field(values->CommandType, 29, 31) |
6101 __gen_field(values->MICommandOpcode, 23, 28) |
6102 __gen_field(values->UseGlobalGTT, 22, 22) |
6103 __gen_field(values->AsyncModeEnable, 21, 21) |
6104 __gen_field(values->DwordLength, 0, 7) |
6105 0;
6106
6107 dw[1] =
6108 __gen_offset(values->RegisterAddress, 2, 22) |
6109 0;
6110
6111 uint32_t dw2 =
6112 0;
6113
6114 dw[2] =
6115 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
6116
6117 }
6118
6119 #define GEN75_MI_LOAD_REGISTER_REG_length_bias 0x00000002
6120 #define GEN75_MI_LOAD_REGISTER_REG_header \
6121 .CommandType = 0, \
6122 .MICommandOpcode = 42, \
6123 .DwordLength = 1
6124
6125 #define GEN75_MI_LOAD_REGISTER_REG_length 0x00000003
6126
6127 struct GEN75_MI_LOAD_REGISTER_REG {
6128 uint32_t CommandType;
6129 uint32_t MICommandOpcode;
6130 uint32_t DwordLength;
6131 uint32_t SourceRegisterAddress;
6132 uint32_t DestinationRegisterAddress;
6133 };
6134
6135 static inline void
6136 GEN75_MI_LOAD_REGISTER_REG_pack(__gen_user_data *data, void * restrict dst,
6137 const struct GEN75_MI_LOAD_REGISTER_REG * restrict values)
6138 {
6139 uint32_t *dw = (uint32_t * restrict) dst;
6140
6141 dw[0] =
6142 __gen_field(values->CommandType, 29, 31) |
6143 __gen_field(values->MICommandOpcode, 23, 28) |
6144 __gen_field(values->DwordLength, 0, 7) |
6145 0;
6146
6147 dw[1] =
6148 __gen_offset(values->SourceRegisterAddress, 2, 22) |
6149 0;
6150
6151 dw[2] =
6152 __gen_offset(values->DestinationRegisterAddress, 2, 22) |
6153 0;
6154
6155 }
6156
6157 #define GEN75_MI_LOAD_SCAN_LINES_EXCL_length_bias 0x00000002
6158 #define GEN75_MI_LOAD_SCAN_LINES_EXCL_header \
6159 .CommandType = 0, \
6160 .MICommandOpcode = 19, \
6161 .DwordLength = 0
6162
6163 #define GEN75_MI_LOAD_SCAN_LINES_EXCL_length 0x00000002
6164
6165 struct GEN75_MI_LOAD_SCAN_LINES_EXCL {
6166 uint32_t CommandType;
6167 uint32_t MICommandOpcode;
6168 #define DisplayPlaneA 0
6169 #define DisplayPlaneB 1
6170 #define DisplayPlaneC 4
6171 uint32_t DisplayPlaneSelect;
6172 uint32_t DwordLength;
6173 uint32_t StartScanLineNumber;
6174 uint32_t EndScanLineNumber;
6175 };
6176
6177 static inline void
6178 GEN75_MI_LOAD_SCAN_LINES_EXCL_pack(__gen_user_data *data, void * restrict dst,
6179 const struct GEN75_MI_LOAD_SCAN_LINES_EXCL * restrict values)
6180 {
6181 uint32_t *dw = (uint32_t * restrict) dst;
6182
6183 dw[0] =
6184 __gen_field(values->CommandType, 29, 31) |
6185 __gen_field(values->MICommandOpcode, 23, 28) |
6186 __gen_field(values->DisplayPlaneSelect, 19, 21) |
6187 __gen_field(values->DwordLength, 0, 5) |
6188 0;
6189
6190 dw[1] =
6191 __gen_field(values->StartScanLineNumber, 16, 28) |
6192 __gen_field(values->EndScanLineNumber, 0, 12) |
6193 0;
6194
6195 }
6196
6197 #define GEN75_MI_LOAD_SCAN_LINES_INCL_length_bias 0x00000002
6198 #define GEN75_MI_LOAD_SCAN_LINES_INCL_header \
6199 .CommandType = 0, \
6200 .MICommandOpcode = 18, \
6201 .DwordLength = 0
6202
6203 #define GEN75_MI_LOAD_SCAN_LINES_INCL_length 0x00000002
6204
6205 struct GEN75_MI_LOAD_SCAN_LINES_INCL {
6206 uint32_t CommandType;
6207 uint32_t MICommandOpcode;
6208 #define DisplayPlaneA 0
6209 #define DisplayPlaneB 1
6210 #define DisplayPlaneC 4
6211 uint32_t DisplayPlaneSelect;
6212 uint32_t DwordLength;
6213 uint32_t StartScanLineNumber;
6214 uint32_t EndScanLineNumber;
6215 };
6216
6217 static inline void
6218 GEN75_MI_LOAD_SCAN_LINES_INCL_pack(__gen_user_data *data, void * restrict dst,
6219 const struct GEN75_MI_LOAD_SCAN_LINES_INCL * restrict values)
6220 {
6221 uint32_t *dw = (uint32_t * restrict) dst;
6222
6223 dw[0] =
6224 __gen_field(values->CommandType, 29, 31) |
6225 __gen_field(values->MICommandOpcode, 23, 28) |
6226 __gen_field(values->DisplayPlaneSelect, 19, 21) |
6227 __gen_field(values->DwordLength, 0, 5) |
6228 0;
6229
6230 dw[1] =
6231 __gen_field(values->StartScanLineNumber, 16, 28) |
6232 __gen_field(values->EndScanLineNumber, 0, 12) |
6233 0;
6234
6235 }
6236
6237 #define GEN75_MI_LOAD_URB_MEM_length_bias 0x00000002
6238 #define GEN75_MI_LOAD_URB_MEM_header \
6239 .CommandType = 0, \
6240 .MICommandOpcode = 44, \
6241 .DwordLength = 1
6242
6243 #define GEN75_MI_LOAD_URB_MEM_length 0x00000003
6244
6245 struct GEN75_MI_LOAD_URB_MEM {
6246 uint32_t CommandType;
6247 uint32_t MICommandOpcode;
6248 uint32_t DwordLength;
6249 uint32_t URBAddress;
6250 __gen_address_type MemoryAddress;
6251 };
6252
6253 static inline void
6254 GEN75_MI_LOAD_URB_MEM_pack(__gen_user_data *data, void * restrict dst,
6255 const struct GEN75_MI_LOAD_URB_MEM * restrict values)
6256 {
6257 uint32_t *dw = (uint32_t * restrict) dst;
6258
6259 dw[0] =
6260 __gen_field(values->CommandType, 29, 31) |
6261 __gen_field(values->MICommandOpcode, 23, 28) |
6262 __gen_field(values->DwordLength, 0, 7) |
6263 0;
6264
6265 dw[1] =
6266 __gen_field(values->URBAddress, 2, 14) |
6267 0;
6268
6269 uint32_t dw2 =
6270 0;
6271
6272 dw[2] =
6273 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
6274
6275 }
6276
6277 #define GEN75_MI_MATH_length_bias 0x00000002
6278 #define GEN75_MI_MATH_header \
6279 .CommandType = 0, \
6280 .MICommandOpcode = 26
6281
6282 #define GEN75_MI_MATH_length 0x00000000
6283
6284 struct GEN75_MI_MATH {
6285 uint32_t CommandType;
6286 uint32_t MICommandOpcode;
6287 uint32_t DwordLength;
6288 uint32_t ALUINSTRUCTION1;
6289 uint32_t ALUINSTRUCTION2;
6290 /* variable length fields follow */
6291 };
6292
6293 static inline void
6294 GEN75_MI_MATH_pack(__gen_user_data *data, void * restrict dst,
6295 const struct GEN75_MI_MATH * restrict values)
6296 {
6297 uint32_t *dw = (uint32_t * restrict) dst;
6298
6299 dw[0] =
6300 __gen_field(values->CommandType, 29, 31) |
6301 __gen_field(values->MICommandOpcode, 23, 28) |
6302 __gen_field(values->DwordLength, 0, 5) |
6303 0;
6304
6305 dw[1] =
6306 __gen_field(values->ALUINSTRUCTION1, 0, 31) |
6307 0;
6308
6309 dw[2] =
6310 __gen_field(values->ALUINSTRUCTION2, 0, 31) |
6311 0;
6312
6313 /* variable length fields follow */
6314 }
6315
6316 #define GEN75_MI_NOOP_length_bias 0x00000001
6317 #define GEN75_MI_NOOP_header \
6318 .CommandType = 0, \
6319 .MICommandOpcode = 0
6320
6321 #define GEN75_MI_NOOP_length 0x00000001
6322
6323 struct GEN75_MI_NOOP {
6324 uint32_t CommandType;
6325 uint32_t MICommandOpcode;
6326 bool IdentificationNumberRegisterWriteEnable;
6327 uint32_t IdentificationNumber;
6328 };
6329
6330 static inline void
6331 GEN75_MI_NOOP_pack(__gen_user_data *data, void * restrict dst,
6332 const struct GEN75_MI_NOOP * restrict values)
6333 {
6334 uint32_t *dw = (uint32_t * restrict) dst;
6335
6336 dw[0] =
6337 __gen_field(values->CommandType, 29, 31) |
6338 __gen_field(values->MICommandOpcode, 23, 28) |
6339 __gen_field(values->IdentificationNumberRegisterWriteEnable, 22, 22) |
6340 __gen_field(values->IdentificationNumber, 0, 21) |
6341 0;
6342
6343 }
6344
6345 #define GEN75_MI_PREDICATE_length_bias 0x00000001
6346 #define GEN75_MI_PREDICATE_header \
6347 .CommandType = 0, \
6348 .MICommandOpcode = 12
6349
6350 #define GEN75_MI_PREDICATE_length 0x00000001
6351
6352 struct GEN75_MI_PREDICATE {
6353 uint32_t CommandType;
6354 uint32_t MICommandOpcode;
6355 #define LOAD_KEEP 0
6356 #define LOAD_LOAD 2
6357 #define LOAD_LOADINV 3
6358 uint32_t LoadOperation;
6359 #define COMBINE_SET 0
6360 #define COMBINE_AND 1
6361 #define COMBINE_OR 2
6362 #define COMBINE_XOR 3
6363 uint32_t CombineOperation;
6364 #define COMPARE_SRCS_EQUAL 2
6365 #define COMPARE_DELTAS_EQUAL 3
6366 uint32_t CompareOperation;
6367 };
6368
6369 static inline void
6370 GEN75_MI_PREDICATE_pack(__gen_user_data *data, void * restrict dst,
6371 const struct GEN75_MI_PREDICATE * restrict values)
6372 {
6373 uint32_t *dw = (uint32_t * restrict) dst;
6374
6375 dw[0] =
6376 __gen_field(values->CommandType, 29, 31) |
6377 __gen_field(values->MICommandOpcode, 23, 28) |
6378 __gen_field(values->LoadOperation, 6, 7) |
6379 __gen_field(values->CombineOperation, 3, 4) |
6380 __gen_field(values->CompareOperation, 0, 1) |
6381 0;
6382
6383 }
6384
6385 #define GEN75_MI_REPORT_HEAD_length_bias 0x00000001
6386 #define GEN75_MI_REPORT_HEAD_header \
6387 .CommandType = 0, \
6388 .MICommandOpcode = 7
6389
6390 #define GEN75_MI_REPORT_HEAD_length 0x00000001
6391
6392 struct GEN75_MI_REPORT_HEAD {
6393 uint32_t CommandType;
6394 uint32_t MICommandOpcode;
6395 };
6396
6397 static inline void
6398 GEN75_MI_REPORT_HEAD_pack(__gen_user_data *data, void * restrict dst,
6399 const struct GEN75_MI_REPORT_HEAD * restrict values)
6400 {
6401 uint32_t *dw = (uint32_t * restrict) dst;
6402
6403 dw[0] =
6404 __gen_field(values->CommandType, 29, 31) |
6405 __gen_field(values->MICommandOpcode, 23, 28) |
6406 0;
6407
6408 }
6409
6410 #define GEN75_MI_RS_CONTEXT_length_bias 0x00000001
6411 #define GEN75_MI_RS_CONTEXT_header \
6412 .CommandType = 0, \
6413 .MICommandOpcode = 15
6414
6415 #define GEN75_MI_RS_CONTEXT_length 0x00000001
6416
6417 struct GEN75_MI_RS_CONTEXT {
6418 uint32_t CommandType;
6419 uint32_t MICommandOpcode;
6420 #define RS_RESTORE 0
6421 #define RS_SAVE 1
6422 uint32_t ResourceStreamerSave;
6423 };
6424
6425 static inline void
6426 GEN75_MI_RS_CONTEXT_pack(__gen_user_data *data, void * restrict dst,
6427 const struct GEN75_MI_RS_CONTEXT * restrict values)
6428 {
6429 uint32_t *dw = (uint32_t * restrict) dst;
6430
6431 dw[0] =
6432 __gen_field(values->CommandType, 29, 31) |
6433 __gen_field(values->MICommandOpcode, 23, 28) |
6434 __gen_field(values->ResourceStreamerSave, 0, 0) |
6435 0;
6436
6437 }
6438
6439 #define GEN75_MI_RS_CONTROL_length_bias 0x00000001
6440 #define GEN75_MI_RS_CONTROL_header \
6441 .CommandType = 0, \
6442 .MICommandOpcode = 6
6443
6444 #define GEN75_MI_RS_CONTROL_length 0x00000001
6445
6446 struct GEN75_MI_RS_CONTROL {
6447 uint32_t CommandType;
6448 uint32_t MICommandOpcode;
6449 #define RS_STOP 0
6450 #define RS_START 1
6451 uint32_t ResourceStreamerControl;
6452 };
6453
6454 static inline void
6455 GEN75_MI_RS_CONTROL_pack(__gen_user_data *data, void * restrict dst,
6456 const struct GEN75_MI_RS_CONTROL * restrict values)
6457 {
6458 uint32_t *dw = (uint32_t * restrict) dst;
6459
6460 dw[0] =
6461 __gen_field(values->CommandType, 29, 31) |
6462 __gen_field(values->MICommandOpcode, 23, 28) |
6463 __gen_field(values->ResourceStreamerControl, 0, 0) |
6464 0;
6465
6466 }
6467
6468 #define GEN75_MI_RS_STORE_DATA_IMM_length_bias 0x00000002
6469 #define GEN75_MI_RS_STORE_DATA_IMM_header \
6470 .CommandType = 0, \
6471 .MICommandOpcode = 43, \
6472 .DwordLength = 2
6473
6474 #define GEN75_MI_RS_STORE_DATA_IMM_length 0x00000004
6475
6476 struct GEN75_MI_RS_STORE_DATA_IMM {
6477 uint32_t CommandType;
6478 uint32_t MICommandOpcode;
6479 uint32_t DwordLength;
6480 __gen_address_type DestinationAddress;
6481 uint32_t CoreModeEnable;
6482 uint32_t DataDWord0;
6483 };
6484
6485 static inline void
6486 GEN75_MI_RS_STORE_DATA_IMM_pack(__gen_user_data *data, void * restrict dst,
6487 const struct GEN75_MI_RS_STORE_DATA_IMM * restrict values)
6488 {
6489 uint32_t *dw = (uint32_t * restrict) dst;
6490
6491 dw[0] =
6492 __gen_field(values->CommandType, 29, 31) |
6493 __gen_field(values->MICommandOpcode, 23, 28) |
6494 __gen_field(values->DwordLength, 0, 7) |
6495 0;
6496
6497 dw[1] =
6498 0;
6499
6500 uint32_t dw2 =
6501 __gen_field(values->CoreModeEnable, 0, 0) |
6502 0;
6503
6504 dw[2] =
6505 __gen_combine_address(data, &dw[2], values->DestinationAddress, dw2);
6506
6507 dw[3] =
6508 __gen_field(values->DataDWord0, 0, 31) |
6509 0;
6510
6511 }
6512
6513 #define GEN75_MI_SEMAPHORE_MBOX_length_bias 0x00000002
6514 #define GEN75_MI_SEMAPHORE_MBOX_header \
6515 .CommandType = 0, \
6516 .MICommandOpcode = 22, \
6517 .DwordLength = 1
6518
6519 #define GEN75_MI_SEMAPHORE_MBOX_length 0x00000003
6520
6521 struct GEN75_MI_SEMAPHORE_MBOX {
6522 uint32_t CommandType;
6523 uint32_t MICommandOpcode;
6524 #define RVSYNC 0
6525 #define RVESYNC 1
6526 #define RBSYNC 2
6527 #define UseGeneralRegisterSelect 3
6528 uint32_t RegisterSelect;
6529 uint32_t GeneralRegisterSelect;
6530 uint32_t DwordLength;
6531 uint32_t SemaphoreDataDword;
6532 };
6533
6534 static inline void
6535 GEN75_MI_SEMAPHORE_MBOX_pack(__gen_user_data *data, void * restrict dst,
6536 const struct GEN75_MI_SEMAPHORE_MBOX * restrict values)
6537 {
6538 uint32_t *dw = (uint32_t * restrict) dst;
6539
6540 dw[0] =
6541 __gen_field(values->CommandType, 29, 31) |
6542 __gen_field(values->MICommandOpcode, 23, 28) |
6543 __gen_field(values->RegisterSelect, 16, 17) |
6544 __gen_field(values->GeneralRegisterSelect, 8, 13) |
6545 __gen_field(values->DwordLength, 0, 7) |
6546 0;
6547
6548 dw[1] =
6549 __gen_field(values->SemaphoreDataDword, 0, 31) |
6550 0;
6551
6552 dw[2] =
6553 0;
6554
6555 }
6556
6557 #define GEN75_MI_SET_CONTEXT_length_bias 0x00000002
6558 #define GEN75_MI_SET_CONTEXT_header \
6559 .CommandType = 0, \
6560 .MICommandOpcode = 24, \
6561 .DwordLength = 0
6562
6563 #define GEN75_MI_SET_CONTEXT_length 0x00000002
6564
6565 struct GEN75_MI_SET_CONTEXT {
6566 uint32_t CommandType;
6567 uint32_t MICommandOpcode;
6568 uint32_t DwordLength;
6569 __gen_address_type LogicalContextAddress;
6570 uint32_t ReservedMustbe1;
6571 bool CoreModeEnable;
6572 bool ResourceStreamerStateSaveEnable;
6573 bool ResourceStreamerStateRestoreEnable;
6574 uint32_t ForceRestore;
6575 uint32_t RestoreInhibit;
6576 };
6577
6578 static inline void
6579 GEN75_MI_SET_CONTEXT_pack(__gen_user_data *data, void * restrict dst,
6580 const struct GEN75_MI_SET_CONTEXT * restrict values)
6581 {
6582 uint32_t *dw = (uint32_t * restrict) dst;
6583
6584 dw[0] =
6585 __gen_field(values->CommandType, 29, 31) |
6586 __gen_field(values->MICommandOpcode, 23, 28) |
6587 __gen_field(values->DwordLength, 0, 7) |
6588 0;
6589
6590 uint32_t dw1 =
6591 __gen_field(values->ReservedMustbe1, 8, 8) |
6592 __gen_field(values->CoreModeEnable, 4, 4) |
6593 __gen_field(values->ResourceStreamerStateSaveEnable, 3, 3) |
6594 __gen_field(values->ResourceStreamerStateRestoreEnable, 2, 2) |
6595 __gen_field(values->ForceRestore, 1, 1) |
6596 __gen_field(values->RestoreInhibit, 0, 0) |
6597 0;
6598
6599 dw[1] =
6600 __gen_combine_address(data, &dw[1], values->LogicalContextAddress, dw1);
6601
6602 }
6603
6604 #define GEN75_MI_SET_PREDICATE_length_bias 0x00000001
6605 #define GEN75_MI_SET_PREDICATE_header \
6606 .CommandType = 0, \
6607 .MICommandOpcode = 1, \
6608 .PREDICATEENABLE = 6
6609
6610 #define GEN75_MI_SET_PREDICATE_length 0x00000001
6611
6612 struct GEN75_MI_SET_PREDICATE {
6613 uint32_t CommandType;
6614 uint32_t MICommandOpcode;
6615 #define PredicateAlways 0
6616 #define PredicateonClear 1
6617 #define PredicateonSet 2
6618 #define PredicateDisable 3
6619 bool PREDICATEENABLE;
6620 };
6621
6622 static inline void
6623 GEN75_MI_SET_PREDICATE_pack(__gen_user_data *data, void * restrict dst,
6624 const struct GEN75_MI_SET_PREDICATE * restrict values)
6625 {
6626 uint32_t *dw = (uint32_t * restrict) dst;
6627
6628 dw[0] =
6629 __gen_field(values->CommandType, 29, 31) |
6630 __gen_field(values->MICommandOpcode, 23, 28) |
6631 __gen_field(values->PREDICATEENABLE, 0, 1) |
6632 0;
6633
6634 }
6635
6636 #define GEN75_MI_STORE_DATA_IMM_length_bias 0x00000002
6637 #define GEN75_MI_STORE_DATA_IMM_header \
6638 .CommandType = 0, \
6639 .MICommandOpcode = 32, \
6640 .DwordLength = 2
6641
6642 #define GEN75_MI_STORE_DATA_IMM_length 0x00000004
6643
6644 struct GEN75_MI_STORE_DATA_IMM {
6645 uint32_t CommandType;
6646 uint32_t MICommandOpcode;
6647 bool UseGlobalGTT;
6648 uint32_t DwordLength;
6649 uint32_t Address;
6650 uint32_t CoreModeEnable;
6651 uint32_t DataDWord0;
6652 uint32_t DataDWord1;
6653 };
6654
6655 static inline void
6656 GEN75_MI_STORE_DATA_IMM_pack(__gen_user_data *data, void * restrict dst,
6657 const struct GEN75_MI_STORE_DATA_IMM * restrict values)
6658 {
6659 uint32_t *dw = (uint32_t * restrict) dst;
6660
6661 dw[0] =
6662 __gen_field(values->CommandType, 29, 31) |
6663 __gen_field(values->MICommandOpcode, 23, 28) |
6664 __gen_field(values->UseGlobalGTT, 22, 22) |
6665 __gen_field(values->DwordLength, 0, 5) |
6666 0;
6667
6668 dw[1] =
6669 0;
6670
6671 dw[2] =
6672 __gen_field(values->Address, 2, 31) |
6673 __gen_field(values->CoreModeEnable, 0, 0) |
6674 0;
6675
6676 dw[3] =
6677 __gen_field(values->DataDWord0, 0, 31) |
6678 0;
6679
6680 dw[4] =
6681 __gen_field(values->DataDWord1, 0, 31) |
6682 0;
6683
6684 }
6685
6686 #define GEN75_MI_STORE_DATA_INDEX_length_bias 0x00000002
6687 #define GEN75_MI_STORE_DATA_INDEX_header \
6688 .CommandType = 0, \
6689 .MICommandOpcode = 33, \
6690 .DwordLength = 1
6691
6692 #define GEN75_MI_STORE_DATA_INDEX_length 0x00000003
6693
6694 struct GEN75_MI_STORE_DATA_INDEX {
6695 uint32_t CommandType;
6696 uint32_t MICommandOpcode;
6697 uint32_t DwordLength;
6698 uint32_t Offset;
6699 uint32_t DataDWord0;
6700 uint32_t DataDWord1;
6701 };
6702
6703 static inline void
6704 GEN75_MI_STORE_DATA_INDEX_pack(__gen_user_data *data, void * restrict dst,
6705 const struct GEN75_MI_STORE_DATA_INDEX * restrict values)
6706 {
6707 uint32_t *dw = (uint32_t * restrict) dst;
6708
6709 dw[0] =
6710 __gen_field(values->CommandType, 29, 31) |
6711 __gen_field(values->MICommandOpcode, 23, 28) |
6712 __gen_field(values->DwordLength, 0, 7) |
6713 0;
6714
6715 dw[1] =
6716 __gen_field(values->Offset, 2, 11) |
6717 0;
6718
6719 dw[2] =
6720 __gen_field(values->DataDWord0, 0, 31) |
6721 0;
6722
6723 dw[3] =
6724 __gen_field(values->DataDWord1, 0, 31) |
6725 0;
6726
6727 }
6728
6729 #define GEN75_MI_STORE_URB_MEM_length_bias 0x00000002
6730 #define GEN75_MI_STORE_URB_MEM_header \
6731 .CommandType = 0, \
6732 .MICommandOpcode = 45, \
6733 .DwordLength = 1
6734
6735 #define GEN75_MI_STORE_URB_MEM_length 0x00000003
6736
6737 struct GEN75_MI_STORE_URB_MEM {
6738 uint32_t CommandType;
6739 uint32_t MICommandOpcode;
6740 uint32_t DwordLength;
6741 uint32_t URBAddress;
6742 __gen_address_type MemoryAddress;
6743 };
6744
6745 static inline void
6746 GEN75_MI_STORE_URB_MEM_pack(__gen_user_data *data, void * restrict dst,
6747 const struct GEN75_MI_STORE_URB_MEM * restrict values)
6748 {
6749 uint32_t *dw = (uint32_t * restrict) dst;
6750
6751 dw[0] =
6752 __gen_field(values->CommandType, 29, 31) |
6753 __gen_field(values->MICommandOpcode, 23, 28) |
6754 __gen_field(values->DwordLength, 0, 7) |
6755 0;
6756
6757 dw[1] =
6758 __gen_field(values->URBAddress, 2, 14) |
6759 0;
6760
6761 uint32_t dw2 =
6762 0;
6763
6764 dw[2] =
6765 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
6766
6767 }
6768
6769 #define GEN75_MI_SUSPEND_FLUSH_length_bias 0x00000001
6770 #define GEN75_MI_SUSPEND_FLUSH_header \
6771 .CommandType = 0, \
6772 .MICommandOpcode = 11
6773
6774 #define GEN75_MI_SUSPEND_FLUSH_length 0x00000001
6775
6776 struct GEN75_MI_SUSPEND_FLUSH {
6777 uint32_t CommandType;
6778 uint32_t MICommandOpcode;
6779 bool SuspendFlush;
6780 };
6781
6782 static inline void
6783 GEN75_MI_SUSPEND_FLUSH_pack(__gen_user_data *data, void * restrict dst,
6784 const struct GEN75_MI_SUSPEND_FLUSH * restrict values)
6785 {
6786 uint32_t *dw = (uint32_t * restrict) dst;
6787
6788 dw[0] =
6789 __gen_field(values->CommandType, 29, 31) |
6790 __gen_field(values->MICommandOpcode, 23, 28) |
6791 __gen_field(values->SuspendFlush, 0, 0) |
6792 0;
6793
6794 }
6795
6796 #define GEN75_MI_TOPOLOGY_FILTER_length_bias 0x00000001
6797 #define GEN75_MI_TOPOLOGY_FILTER_header \
6798 .CommandType = 0, \
6799 .MICommandOpcode = 13
6800
6801 #define GEN75_MI_TOPOLOGY_FILTER_length 0x00000001
6802
6803 struct GEN75_MI_TOPOLOGY_FILTER {
6804 uint32_t CommandType;
6805 uint32_t MICommandOpcode;
6806 uint32_t TopologyFilterValue;
6807 };
6808
6809 static inline void
6810 GEN75_MI_TOPOLOGY_FILTER_pack(__gen_user_data *data, void * restrict dst,
6811 const struct GEN75_MI_TOPOLOGY_FILTER * restrict values)
6812 {
6813 uint32_t *dw = (uint32_t * restrict) dst;
6814
6815 dw[0] =
6816 __gen_field(values->CommandType, 29, 31) |
6817 __gen_field(values->MICommandOpcode, 23, 28) |
6818 __gen_field(values->TopologyFilterValue, 0, 5) |
6819 0;
6820
6821 }
6822
6823 #define GEN75_MI_UPDATE_GTT_length_bias 0x00000002
6824 #define GEN75_MI_UPDATE_GTT_header \
6825 .CommandType = 0, \
6826 .MICommandOpcode = 35
6827
6828 #define GEN75_MI_UPDATE_GTT_length 0x00000000
6829
6830 struct GEN75_MI_UPDATE_GTT {
6831 uint32_t CommandType;
6832 uint32_t MICommandOpcode;
6833 #define PerProcessGraphicsAddress 0
6834 #define GlobalGraphicsAddress 1
6835 uint32_t UseGlobalGTT;
6836 uint32_t DwordLength;
6837 __gen_address_type EntryAddress;
6838 /* variable length fields follow */
6839 };
6840
6841 static inline void
6842 GEN75_MI_UPDATE_GTT_pack(__gen_user_data *data, void * restrict dst,
6843 const struct GEN75_MI_UPDATE_GTT * restrict values)
6844 {
6845 uint32_t *dw = (uint32_t * restrict) dst;
6846
6847 dw[0] =
6848 __gen_field(values->CommandType, 29, 31) |
6849 __gen_field(values->MICommandOpcode, 23, 28) |
6850 __gen_field(values->UseGlobalGTT, 22, 22) |
6851 __gen_field(values->DwordLength, 0, 7) |
6852 0;
6853
6854 uint32_t dw1 =
6855 0;
6856
6857 dw[1] =
6858 __gen_combine_address(data, &dw[1], values->EntryAddress, dw1);
6859
6860 /* variable length fields follow */
6861 }
6862
6863 #define GEN75_MI_URB_ATOMIC_ALLOC_length_bias 0x00000001
6864 #define GEN75_MI_URB_ATOMIC_ALLOC_header \
6865 .CommandType = 0, \
6866 .MICommandOpcode = 9
6867
6868 #define GEN75_MI_URB_ATOMIC_ALLOC_length 0x00000001
6869
6870 struct GEN75_MI_URB_ATOMIC_ALLOC {
6871 uint32_t CommandType;
6872 uint32_t MICommandOpcode;
6873 uint32_t URBAtomicStorageOffset;
6874 uint32_t URBAtomicStorageSize;
6875 };
6876
6877 static inline void
6878 GEN75_MI_URB_ATOMIC_ALLOC_pack(__gen_user_data *data, void * restrict dst,
6879 const struct GEN75_MI_URB_ATOMIC_ALLOC * restrict values)
6880 {
6881 uint32_t *dw = (uint32_t * restrict) dst;
6882
6883 dw[0] =
6884 __gen_field(values->CommandType, 29, 31) |
6885 __gen_field(values->MICommandOpcode, 23, 28) |
6886 __gen_field(values->URBAtomicStorageOffset, 12, 19) |
6887 __gen_field(values->URBAtomicStorageSize, 0, 8) |
6888 0;
6889
6890 }
6891
6892 #define GEN75_MI_URB_CLEAR_length_bias 0x00000002
6893 #define GEN75_MI_URB_CLEAR_header \
6894 .CommandType = 0, \
6895 .MICommandOpcode = 25, \
6896 .DwordLength = 0
6897
6898 #define GEN75_MI_URB_CLEAR_length 0x00000002
6899
6900 struct GEN75_MI_URB_CLEAR {
6901 uint32_t CommandType;
6902 uint32_t MICommandOpcode;
6903 uint32_t DwordLength;
6904 uint32_t URBClearLength;
6905 uint32_t URBAddress;
6906 };
6907
6908 static inline void
6909 GEN75_MI_URB_CLEAR_pack(__gen_user_data *data, void * restrict dst,
6910 const struct GEN75_MI_URB_CLEAR * restrict values)
6911 {
6912 uint32_t *dw = (uint32_t * restrict) dst;
6913
6914 dw[0] =
6915 __gen_field(values->CommandType, 29, 31) |
6916 __gen_field(values->MICommandOpcode, 23, 28) |
6917 __gen_field(values->DwordLength, 0, 7) |
6918 0;
6919
6920 dw[1] =
6921 __gen_field(values->URBClearLength, 16, 29) |
6922 __gen_offset(values->URBAddress, 0, 14) |
6923 0;
6924
6925 }
6926
6927 #define GEN75_MI_USER_INTERRUPT_length_bias 0x00000001
6928 #define GEN75_MI_USER_INTERRUPT_header \
6929 .CommandType = 0, \
6930 .MICommandOpcode = 2
6931
6932 #define GEN75_MI_USER_INTERRUPT_length 0x00000001
6933
6934 struct GEN75_MI_USER_INTERRUPT {
6935 uint32_t CommandType;
6936 uint32_t MICommandOpcode;
6937 };
6938
6939 static inline void
6940 GEN75_MI_USER_INTERRUPT_pack(__gen_user_data *data, void * restrict dst,
6941 const struct GEN75_MI_USER_INTERRUPT * restrict values)
6942 {
6943 uint32_t *dw = (uint32_t * restrict) dst;
6944
6945 dw[0] =
6946 __gen_field(values->CommandType, 29, 31) |
6947 __gen_field(values->MICommandOpcode, 23, 28) |
6948 0;
6949
6950 }
6951
6952 #define GEN75_MI_WAIT_FOR_EVENT_length_bias 0x00000001
6953 #define GEN75_MI_WAIT_FOR_EVENT_header \
6954 .CommandType = 0, \
6955 .MICommandOpcode = 3
6956
6957 #define GEN75_MI_WAIT_FOR_EVENT_length 0x00000001
6958
6959 struct GEN75_MI_WAIT_FOR_EVENT {
6960 uint32_t CommandType;
6961 uint32_t MICommandOpcode;
6962 bool DisplayPipeCHorizontalBlankWaitEnable;
6963 bool DisplayPipeCVerticalBlankWaitEnable;
6964 bool DisplaySpriteCFlipPendingWaitEnable;
6965 #define Notenabled 0
6966 uint32_t ConditionCodeWaitSelect;
6967 bool DisplayPlaneCFlipPendingWaitEnable;
6968 bool DisplayPipeCScanLineWaitEnable;
6969 bool DisplayPipeBHorizontalBlankWaitEnable;
6970 bool DisplayPipeBVerticalBlankWaitEnable;
6971 bool DisplaySpriteBFlipPendingWaitEnable;
6972 bool DisplayPlaneBFlipPendingWaitEnable;
6973 bool DisplayPipeBScanLineWaitEnable;
6974 bool DisplayPipeAHorizontalBlankWaitEnable;
6975 bool DisplayPipeAVerticalBlankWaitEnable;
6976 bool DisplaySpriteAFlipPendingWaitEnable;
6977 bool DisplayPlaneAFlipPendingWaitEnable;
6978 bool DisplayPipeAScanLineWaitEnable;
6979 };
6980
6981 static inline void
6982 GEN75_MI_WAIT_FOR_EVENT_pack(__gen_user_data *data, void * restrict dst,
6983 const struct GEN75_MI_WAIT_FOR_EVENT * restrict values)
6984 {
6985 uint32_t *dw = (uint32_t * restrict) dst;
6986
6987 dw[0] =
6988 __gen_field(values->CommandType, 29, 31) |
6989 __gen_field(values->MICommandOpcode, 23, 28) |
6990 __gen_field(values->DisplayPipeCHorizontalBlankWaitEnable, 22, 22) |
6991 __gen_field(values->DisplayPipeCVerticalBlankWaitEnable, 21, 21) |
6992 __gen_field(values->DisplaySpriteCFlipPendingWaitEnable, 20, 20) |
6993 __gen_field(values->ConditionCodeWaitSelect, 16, 19) |
6994 __gen_field(values->DisplayPlaneCFlipPendingWaitEnable, 15, 15) |
6995 __gen_field(values->DisplayPipeCScanLineWaitEnable, 14, 14) |
6996 __gen_field(values->DisplayPipeBHorizontalBlankWaitEnable, 13, 13) |
6997 __gen_field(values->DisplayPipeBVerticalBlankWaitEnable, 11, 11) |
6998 __gen_field(values->DisplaySpriteBFlipPendingWaitEnable, 10, 10) |
6999 __gen_field(values->DisplayPlaneBFlipPendingWaitEnable, 9, 9) |
7000 __gen_field(values->DisplayPipeBScanLineWaitEnable, 8, 8) |
7001 __gen_field(values->DisplayPipeAHorizontalBlankWaitEnable, 5, 5) |
7002 __gen_field(values->DisplayPipeAVerticalBlankWaitEnable, 3, 3) |
7003 __gen_field(values->DisplaySpriteAFlipPendingWaitEnable, 2, 2) |
7004 __gen_field(values->DisplayPlaneAFlipPendingWaitEnable, 1, 1) |
7005 __gen_field(values->DisplayPipeAScanLineWaitEnable, 0, 0) |
7006 0;
7007
7008 }
7009
7010 #define GEN75_PIPE_CONTROL_length_bias 0x00000002
7011 #define GEN75_PIPE_CONTROL_header \
7012 .CommandType = 3, \
7013 .CommandSubType = 3, \
7014 ._3DCommandOpcode = 2, \
7015 ._3DCommandSubOpcode = 0, \
7016 .DwordLength = 3
7017
7018 #define GEN75_PIPE_CONTROL_length 0x00000005
7019
7020 struct GEN75_PIPE_CONTROL {
7021 uint32_t CommandType;
7022 uint32_t CommandSubType;
7023 uint32_t _3DCommandOpcode;
7024 uint32_t _3DCommandSubOpcode;
7025 uint32_t DwordLength;
7026 #define DAT_PPGTT 0
7027 #define DAT_GGTT 1
7028 uint32_t DestinationAddressType;
7029 #define NoLRIOperation 0
7030 #define MMIOWriteImmediateData 1
7031 uint32_t LRIPostSyncOperation;
7032 uint32_t StoreDataIndex;
7033 uint32_t CommandStreamerStallEnable;
7034 #define DontReset 0
7035 #define Reset 1
7036 uint32_t GlobalSnapshotCountReset;
7037 uint32_t TLBInvalidate;
7038 bool GenericMediaStateClear;
7039 #define NoWrite 0
7040 #define WriteImmediateData 1
7041 #define WritePSDepthCount 2
7042 #define WriteTimestamp 3
7043 uint32_t PostSyncOperation;
7044 bool DepthStallEnable;
7045 #define DisableFlush 0
7046 #define EnableFlush 1
7047 bool RenderTargetCacheFlushEnable;
7048 bool InstructionCacheInvalidateEnable;
7049 bool TextureCacheInvalidationEnable;
7050 bool IndirectStatePointersDisable;
7051 bool NotifyEnable;
7052 bool PipeControlFlushEnable;
7053 bool DCFlushEnable;
7054 bool VFCacheInvalidationEnable;
7055 bool ConstantCacheInvalidationEnable;
7056 bool StateCacheInvalidationEnable;
7057 bool StallAtPixelScoreboard;
7058 #define FlushDisabled 0
7059 #define FlushEnabled 1
7060 bool DepthCacheFlushEnable;
7061 __gen_address_type Address;
7062 uint32_t ImmediateData;
7063 uint32_t ImmediateData0;
7064 };
7065
7066 static inline void
7067 GEN75_PIPE_CONTROL_pack(__gen_user_data *data, void * restrict dst,
7068 const struct GEN75_PIPE_CONTROL * restrict values)
7069 {
7070 uint32_t *dw = (uint32_t * restrict) dst;
7071
7072 dw[0] =
7073 __gen_field(values->CommandType, 29, 31) |
7074 __gen_field(values->CommandSubType, 27, 28) |
7075 __gen_field(values->_3DCommandOpcode, 24, 26) |
7076 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
7077 __gen_field(values->DwordLength, 0, 7) |
7078 0;
7079
7080 dw[1] =
7081 __gen_field(values->DestinationAddressType, 24, 24) |
7082 __gen_field(values->LRIPostSyncOperation, 23, 23) |
7083 __gen_field(values->StoreDataIndex, 21, 21) |
7084 __gen_field(values->CommandStreamerStallEnable, 20, 20) |
7085 __gen_field(values->GlobalSnapshotCountReset, 19, 19) |
7086 __gen_field(values->TLBInvalidate, 18, 18) |
7087 __gen_field(values->GenericMediaStateClear, 16, 16) |
7088 __gen_field(values->PostSyncOperation, 14, 15) |
7089 __gen_field(values->DepthStallEnable, 13, 13) |
7090 __gen_field(values->RenderTargetCacheFlushEnable, 12, 12) |
7091 __gen_field(values->InstructionCacheInvalidateEnable, 11, 11) |
7092 __gen_field(values->TextureCacheInvalidationEnable, 10, 10) |
7093 __gen_field(values->IndirectStatePointersDisable, 9, 9) |
7094 __gen_field(values->NotifyEnable, 8, 8) |
7095 __gen_field(values->PipeControlFlushEnable, 7, 7) |
7096 __gen_field(values->DCFlushEnable, 5, 5) |
7097 __gen_field(values->VFCacheInvalidationEnable, 4, 4) |
7098 __gen_field(values->ConstantCacheInvalidationEnable, 3, 3) |
7099 __gen_field(values->StateCacheInvalidationEnable, 2, 2) |
7100 __gen_field(values->StallAtPixelScoreboard, 1, 1) |
7101 __gen_field(values->DepthCacheFlushEnable, 0, 0) |
7102 0;
7103
7104 uint32_t dw2 =
7105 0;
7106
7107 dw[2] =
7108 __gen_combine_address(data, &dw[2], values->Address, dw2);
7109
7110 dw[3] =
7111 __gen_field(values->ImmediateData, 0, 31) |
7112 0;
7113
7114 dw[4] =
7115 __gen_field(values->ImmediateData, 0, 31) |
7116 0;
7117
7118 }
7119
7120 #define GEN75_SCISSOR_RECT_length 0x00000002
7121
7122 struct GEN75_SCISSOR_RECT {
7123 uint32_t ScissorRectangleYMin;
7124 uint32_t ScissorRectangleXMin;
7125 uint32_t ScissorRectangleYMax;
7126 uint32_t ScissorRectangleXMax;
7127 };
7128
7129 static inline void
7130 GEN75_SCISSOR_RECT_pack(__gen_user_data *data, void * restrict dst,
7131 const struct GEN75_SCISSOR_RECT * restrict values)
7132 {
7133 uint32_t *dw = (uint32_t * restrict) dst;
7134
7135 dw[0] =
7136 __gen_field(values->ScissorRectangleYMin, 16, 31) |
7137 __gen_field(values->ScissorRectangleXMin, 0, 15) |
7138 0;
7139
7140 dw[1] =
7141 __gen_field(values->ScissorRectangleYMax, 16, 31) |
7142 __gen_field(values->ScissorRectangleXMax, 0, 15) |
7143 0;
7144
7145 }
7146
7147 #define GEN75_SF_CLIP_VIEWPORT_length 0x00000010
7148
7149 struct GEN75_SF_CLIP_VIEWPORT {
7150 float ViewportMatrixElementm00;
7151 float ViewportMatrixElementm11;
7152 float ViewportMatrixElementm22;
7153 float ViewportMatrixElementm30;
7154 float ViewportMatrixElementm31;
7155 float ViewportMatrixElementm32;
7156 float XMinClipGuardband;
7157 float XMaxClipGuardband;
7158 float YMinClipGuardband;
7159 float YMaxClipGuardband;
7160 };
7161
7162 static inline void
7163 GEN75_SF_CLIP_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
7164 const struct GEN75_SF_CLIP_VIEWPORT * restrict values)
7165 {
7166 uint32_t *dw = (uint32_t * restrict) dst;
7167
7168 dw[0] =
7169 __gen_float(values->ViewportMatrixElementm00) |
7170 0;
7171
7172 dw[1] =
7173 __gen_float(values->ViewportMatrixElementm11) |
7174 0;
7175
7176 dw[2] =
7177 __gen_float(values->ViewportMatrixElementm22) |
7178 0;
7179
7180 dw[3] =
7181 __gen_float(values->ViewportMatrixElementm30) |
7182 0;
7183
7184 dw[4] =
7185 __gen_float(values->ViewportMatrixElementm31) |
7186 0;
7187
7188 dw[5] =
7189 __gen_float(values->ViewportMatrixElementm32) |
7190 0;
7191
7192 dw[6] =
7193 0;
7194
7195 dw[7] =
7196 0;
7197
7198 dw[8] =
7199 __gen_float(values->XMinClipGuardband) |
7200 0;
7201
7202 dw[9] =
7203 __gen_float(values->XMaxClipGuardband) |
7204 0;
7205
7206 dw[10] =
7207 __gen_float(values->YMinClipGuardband) |
7208 0;
7209
7210 dw[11] =
7211 __gen_float(values->YMaxClipGuardband) |
7212 0;
7213
7214 for (uint32_t i = 0, j = 12; i < 4; i += 1, j++) {
7215 dw[j] =
7216 0;
7217 }
7218
7219 }
7220
7221 #define GEN75_BLEND_STATE_length 0x00000002
7222
7223 struct GEN75_BLEND_STATE {
7224 bool ColorBufferBlendEnable;
7225 bool IndependentAlphaBlendEnable;
7226 #define BLENDFUNCTION_ADD 0
7227 #define BLENDFUNCTION_SUBTRACT 1
7228 #define BLENDFUNCTION_REVERSE_SUBTRACT 2
7229 #define BLENDFUNCTION_MIN 3
7230 #define BLENDFUNCTION_MAX 4
7231 uint32_t AlphaBlendFunction;
7232 #define BLENDFACTOR_ONE 1
7233 #define BLENDFACTOR_SRC_COLOR 2
7234 #define BLENDFACTOR_SRC_ALPHA 3
7235 #define BLENDFACTOR_DST_ALPHA 4
7236 #define BLENDFACTOR_DST_COLOR 5
7237 #define BLENDFACTOR_SRC_ALPHA_SATURATE 6
7238 #define BLENDFACTOR_CONST_COLOR 7
7239 #define BLENDFACTOR_CONST_ALPHA 8
7240 #define BLENDFACTOR_SRC1_COLOR 9
7241 #define BLENDFACTOR_SRC1_ALPHA 10
7242 #define BLENDFACTOR_ZERO 17
7243 #define BLENDFACTOR_INV_SRC_COLOR 18
7244 #define BLENDFACTOR_INV_SRC_ALPHA 19
7245 #define BLENDFACTOR_INV_DST_ALPHA 20
7246 #define BLENDFACTOR_INV_DST_COLOR 21
7247 #define BLENDFACTOR_INV_CONST_COLOR 23
7248 #define BLENDFACTOR_INV_CONST_ALPHA 24
7249 #define BLENDFACTOR_INV_SRC1_COLOR 25
7250 #define BLENDFACTOR_INV_SRC1_ALPHA 26
7251 uint32_t SourceAlphaBlendFactor;
7252 uint32_t DestinationAlphaBlendFactor;
7253 #define BLENDFUNCTION_ADD 0
7254 #define BLENDFUNCTION_SUBTRACT 1
7255 #define BLENDFUNCTION_REVERSE_SUBTRACT 2
7256 #define BLENDFUNCTION_MIN 3
7257 #define BLENDFUNCTION_MAX 4
7258 uint32_t ColorBlendFunction;
7259 uint32_t SourceBlendFactor;
7260 uint32_t DestinationBlendFactor;
7261 bool AlphaToCoverageEnable;
7262 bool AlphaToOneEnable;
7263 bool AlphaToCoverageDitherEnable;
7264 bool WriteDisableAlpha;
7265 bool WriteDisableRed;
7266 bool WriteDisableGreen;
7267 bool WriteDisableBlue;
7268 bool LogicOpEnable;
7269 #define LOGICOP_CLEAR 0
7270 #define LOGICOP_NOR 1
7271 #define LOGICOP_AND_INVERTED 2
7272 #define LOGICOP_COPY_INVERTED 3
7273 #define LOGICOP_AND_REVERSE 4
7274 #define LOGICOP_INVERT 5
7275 #define LOGICOP_XOR 6
7276 #define LOGICOP_NAND 7
7277 #define LOGICOP_AND 8
7278 #define LOGICOP_EQUIV 9
7279 #define LOGICOP_NOOP 10
7280 #define LOGICOP_OR_INVERTED 11
7281 #define LOGICOP_COPY 12
7282 #define LOGICOP_OR_REVERSE 13
7283 #define LOGICOP_OR 14
7284 #define LOGICOP_SET 15
7285 uint32_t LogicOpFunction;
7286 bool AlphaTestEnable;
7287 #define COMPAREFUNCTION_ALWAYS 0
7288 #define COMPAREFUNCTION_NEVER 1
7289 #define COMPAREFUNCTION_LESS 2
7290 #define COMPAREFUNCTION_EQUAL 3
7291 #define COMPAREFUNCTION_LEQUAL 4
7292 #define COMPAREFUNCTION_GREATER 5
7293 #define COMPAREFUNCTION_NOTEQUAL 6
7294 #define COMPAREFUNCTION_GEQUAL 7
7295 uint32_t AlphaTestFunction;
7296 bool ColorDitherEnable;
7297 uint32_t XDitherOffset;
7298 uint32_t YDitherOffset;
7299 #define COLORCLAMP_UNORM 0
7300 #define COLORCLAMP_SNORM 1
7301 #define COLORCLAMP_RTFORMAT 2
7302 uint32_t ColorClampRange;
7303 bool PreBlendColorClampEnable;
7304 bool PostBlendColorClampEnable;
7305 };
7306
7307 static inline void
7308 GEN75_BLEND_STATE_pack(__gen_user_data *data, void * restrict dst,
7309 const struct GEN75_BLEND_STATE * restrict values)
7310 {
7311 uint32_t *dw = (uint32_t * restrict) dst;
7312
7313 dw[0] =
7314 __gen_field(values->ColorBufferBlendEnable, 31, 31) |
7315 __gen_field(values->IndependentAlphaBlendEnable, 30, 30) |
7316 __gen_field(values->AlphaBlendFunction, 26, 28) |
7317 __gen_field(values->SourceAlphaBlendFactor, 20, 24) |
7318 __gen_field(values->DestinationAlphaBlendFactor, 15, 19) |
7319 __gen_field(values->ColorBlendFunction, 11, 13) |
7320 __gen_field(values->SourceBlendFactor, 5, 9) |
7321 __gen_field(values->DestinationBlendFactor, 0, 4) |
7322 0;
7323
7324 dw[1] =
7325 __gen_field(values->AlphaToCoverageEnable, 31, 31) |
7326 __gen_field(values->AlphaToOneEnable, 30, 30) |
7327 __gen_field(values->AlphaToCoverageDitherEnable, 29, 29) |
7328 __gen_field(values->WriteDisableAlpha, 27, 27) |
7329 __gen_field(values->WriteDisableRed, 26, 26) |
7330 __gen_field(values->WriteDisableGreen, 25, 25) |
7331 __gen_field(values->WriteDisableBlue, 24, 24) |
7332 __gen_field(values->LogicOpEnable, 22, 22) |
7333 __gen_field(values->LogicOpFunction, 18, 21) |
7334 __gen_field(values->AlphaTestEnable, 16, 16) |
7335 __gen_field(values->AlphaTestFunction, 13, 15) |
7336 __gen_field(values->ColorDitherEnable, 12, 12) |
7337 __gen_field(values->XDitherOffset, 10, 11) |
7338 __gen_field(values->YDitherOffset, 8, 9) |
7339 __gen_field(values->ColorClampRange, 2, 3) |
7340 __gen_field(values->PreBlendColorClampEnable, 1, 1) |
7341 __gen_field(values->PostBlendColorClampEnable, 0, 0) |
7342 0;
7343
7344 }
7345
7346 #define GEN75_CC_VIEWPORT_length 0x00000002
7347
7348 struct GEN75_CC_VIEWPORT {
7349 float MinimumDepth;
7350 float MaximumDepth;
7351 };
7352
7353 static inline void
7354 GEN75_CC_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
7355 const struct GEN75_CC_VIEWPORT * restrict values)
7356 {
7357 uint32_t *dw = (uint32_t * restrict) dst;
7358
7359 dw[0] =
7360 __gen_float(values->MinimumDepth) |
7361 0;
7362
7363 dw[1] =
7364 __gen_float(values->MaximumDepth) |
7365 0;
7366
7367 }
7368
7369 #define GEN75_COLOR_CALC_STATE_length 0x00000006
7370
7371 struct GEN75_COLOR_CALC_STATE {
7372 uint32_t StencilReferenceValue;
7373 uint32_t BackFaceStencilReferenceValue;
7374 #define Cancelled 0
7375 #define NotCancelled 1
7376 uint32_t RoundDisableFunctionDisable;
7377 #define ALPHATEST_UNORM8 0
7378 #define ALPHATEST_FLOAT32 1
7379 uint32_t AlphaTestFormat;
7380 uint32_t AlphaReferenceValueAsUNORM8;
7381 float AlphaReferenceValueAsFLOAT32;
7382 float BlendConstantColorRed;
7383 float BlendConstantColorGreen;
7384 float BlendConstantColorBlue;
7385 float BlendConstantColorAlpha;
7386 };
7387
7388 static inline void
7389 GEN75_COLOR_CALC_STATE_pack(__gen_user_data *data, void * restrict dst,
7390 const struct GEN75_COLOR_CALC_STATE * restrict values)
7391 {
7392 uint32_t *dw = (uint32_t * restrict) dst;
7393
7394 dw[0] =
7395 __gen_field(values->StencilReferenceValue, 24, 31) |
7396 __gen_field(values->BackFaceStencilReferenceValue, 16, 23) |
7397 __gen_field(values->RoundDisableFunctionDisable, 15, 15) |
7398 __gen_field(values->AlphaTestFormat, 0, 0) |
7399 0;
7400
7401 dw[1] =
7402 __gen_field(values->AlphaReferenceValueAsUNORM8, 0, 31) |
7403 __gen_float(values->AlphaReferenceValueAsFLOAT32) |
7404 0;
7405
7406 dw[2] =
7407 __gen_float(values->BlendConstantColorRed) |
7408 0;
7409
7410 dw[3] =
7411 __gen_float(values->BlendConstantColorGreen) |
7412 0;
7413
7414 dw[4] =
7415 __gen_float(values->BlendConstantColorBlue) |
7416 0;
7417
7418 dw[5] =
7419 __gen_float(values->BlendConstantColorAlpha) |
7420 0;
7421
7422 }
7423
7424 #define GEN75_DEPTH_STENCIL_STATE_length 0x00000003
7425
7426 struct GEN75_DEPTH_STENCIL_STATE {
7427 bool StencilTestEnable;
7428 #define COMPAREFUNCTION_ALWAYS 0
7429 #define COMPAREFUNCTION_NEVER 1
7430 #define COMPAREFUNCTION_LESS 2
7431 #define COMPAREFUNCTION_EQUAL 3
7432 #define COMPAREFUNCTION_LEQUAL 4
7433 #define COMPAREFUNCTION_GREATER 5
7434 #define COMPAREFUNCTION_NOTEQUAL 6
7435 #define COMPAREFUNCTION_GEQUAL 7
7436 uint32_t StencilTestFunction;
7437 #define STENCILOP_KEEP 0
7438 #define STENCILOP_ZERO 1
7439 #define STENCILOP_REPLACE 2
7440 #define STENCILOP_INCRSAT 3
7441 #define STENCILOP_DECRSAT 4
7442 #define STENCILOP_INCR 5
7443 #define STENCILOP_DECR 6
7444 #define STENCILOP_INVERT 7
7445 uint32_t StencilFailOp;
7446 uint32_t StencilPassDepthFailOp;
7447 uint32_t StencilPassDepthPassOp;
7448 bool StencilBufferWriteEnable;
7449 bool DoubleSidedStencilEnable;
7450 #define COMPAREFUNCTION_ALWAYS 0
7451 #define COMPAREFUNCTION_NEVER 1
7452 #define COMPAREFUNCTION_LESS 2
7453 #define COMPAREFUNCTION_EQUAL 3
7454 #define COMPAREFUNCTION_LEQUAL 4
7455 #define COMPAREFUNCTION_GREATER 5
7456 #define COMPAREFUNCTION_NOTEQUAL 6
7457 #define COMPAREFUNCTION_GEQUAL 7
7458 uint32_t BackFaceStencilTestFunction;
7459 #define STENCILOP_KEEP 0
7460 #define STENCILOP_ZERO 1
7461 #define STENCILOP_REPLACE 2
7462 #define STENCILOP_INCRSAT 3
7463 #define STENCILOP_DECRSAT 4
7464 #define STENCILOP_INCR 5
7465 #define STENCILOP_DECR 6
7466 #define STENCILOP_INVERT 7
7467 uint32_t BackfaceStencilFailOp;
7468 uint32_t BackfaceStencilPassDepthFailOp;
7469 uint32_t BackfaceStencilPassDepthPassOp;
7470 uint32_t StencilTestMask;
7471 uint32_t StencilWriteMask;
7472 uint32_t BackfaceStencilTestMask;
7473 uint32_t BackfaceStencilWriteMask;
7474 bool DepthTestEnable;
7475 #define COMPAREFUNCTION_ALWAYS 0
7476 #define COMPAREFUNCTION_NEVER 1
7477 #define COMPAREFUNCTION_LESS 2
7478 #define COMPAREFUNCTION_EQUAL 3
7479 #define COMPAREFUNCTION_LEQUAL 4
7480 #define COMPAREFUNCTION_GREATER 5
7481 #define COMPAREFUNCTION_NOTEQUAL 6
7482 #define COMPAREFUNCTION_GEQUAL 7
7483 uint32_t DepthTestFunction;
7484 bool DepthBufferWriteEnable;
7485 };
7486
7487 static inline void
7488 GEN75_DEPTH_STENCIL_STATE_pack(__gen_user_data *data, void * restrict dst,
7489 const struct GEN75_DEPTH_STENCIL_STATE * restrict values)
7490 {
7491 uint32_t *dw = (uint32_t * restrict) dst;
7492
7493 dw[0] =
7494 __gen_field(values->StencilTestEnable, 31, 31) |
7495 __gen_field(values->StencilTestFunction, 28, 30) |
7496 __gen_field(values->StencilFailOp, 25, 27) |
7497 __gen_field(values->StencilPassDepthFailOp, 22, 24) |
7498 __gen_field(values->StencilPassDepthPassOp, 19, 21) |
7499 __gen_field(values->StencilBufferWriteEnable, 18, 18) |
7500 __gen_field(values->DoubleSidedStencilEnable, 15, 15) |
7501 __gen_field(values->BackFaceStencilTestFunction, 12, 14) |
7502 __gen_field(values->BackfaceStencilFailOp, 9, 11) |
7503 __gen_field(values->BackfaceStencilPassDepthFailOp, 6, 8) |
7504 __gen_field(values->BackfaceStencilPassDepthPassOp, 3, 5) |
7505 0;
7506
7507 dw[1] =
7508 __gen_field(values->StencilTestMask, 24, 31) |
7509 __gen_field(values->StencilWriteMask, 16, 23) |
7510 __gen_field(values->BackfaceStencilTestMask, 8, 15) |
7511 __gen_field(values->BackfaceStencilWriteMask, 0, 7) |
7512 0;
7513
7514 dw[2] =
7515 __gen_field(values->DepthTestEnable, 31, 31) |
7516 __gen_field(values->DepthTestFunction, 27, 29) |
7517 __gen_field(values->DepthBufferWriteEnable, 26, 26) |
7518 0;
7519
7520 }
7521
7522 #define GEN75_INTERFACE_DESCRIPTOR_DATA_length 0x00000008
7523
7524 struct GEN75_INTERFACE_DESCRIPTOR_DATA {
7525 uint32_t KernelStartPointer;
7526 #define Multiple 0
7527 #define Single 1
7528 uint32_t SingleProgramFlow;
7529 #define NormalPriority 0
7530 #define HighPriority 1
7531 uint32_t ThreadPriority;
7532 #define IEEE754 0
7533 #define Alternate 1
7534 uint32_t FloatingPointMode;
7535 bool IllegalOpcodeExceptionEnable;
7536 bool MaskStackExceptionEnable;
7537 bool SoftwareExceptionEnable;
7538 uint32_t SamplerStatePointer;
7539 #define Nosamplersused 0
7540 #define Between1and4samplersused 1
7541 #define Between5and8samplersused 2
7542 #define Between9and12samplersused 3
7543 #define Between13and16samplersused 4
7544 uint32_t SamplerCount;
7545 uint32_t BindingTablePointer;
7546 uint32_t BindingTableEntryCount;
7547 uint32_t ConstantURBEntryReadLength;
7548 #define RTNE 0
7549 #define RU 1
7550 #define RD 2
7551 #define RTZ 3
7552 uint32_t RoundingMode;
7553 bool BarrierEnable;
7554 uint32_t SharedLocalMemorySize;
7555 uint32_t NumberofThreadsinGPGPUThreadGroup;
7556 uint32_t CrossThreadConstantDataReadLength;
7557 };
7558
7559 static inline void
7560 GEN75_INTERFACE_DESCRIPTOR_DATA_pack(__gen_user_data *data, void * restrict dst,
7561 const struct GEN75_INTERFACE_DESCRIPTOR_DATA * restrict values)
7562 {
7563 uint32_t *dw = (uint32_t * restrict) dst;
7564
7565 dw[0] =
7566 __gen_offset(values->KernelStartPointer, 6, 31) |
7567 0;
7568
7569 dw[1] =
7570 __gen_field(values->SingleProgramFlow, 18, 18) |
7571 __gen_field(values->ThreadPriority, 17, 17) |
7572 __gen_field(values->FloatingPointMode, 16, 16) |
7573 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
7574 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
7575 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
7576 0;
7577
7578 dw[2] =
7579 __gen_offset(values->SamplerStatePointer, 5, 31) |
7580 __gen_field(values->SamplerCount, 2, 4) |
7581 0;
7582
7583 dw[3] =
7584 __gen_offset(values->BindingTablePointer, 5, 15) |
7585 __gen_field(values->BindingTableEntryCount, 0, 4) |
7586 0;
7587
7588 dw[4] =
7589 __gen_field(values->ConstantURBEntryReadLength, 16, 31) |
7590 0;
7591
7592 dw[5] =
7593 __gen_field(values->RoundingMode, 22, 23) |
7594 __gen_field(values->BarrierEnable, 21, 21) |
7595 __gen_field(values->SharedLocalMemorySize, 16, 20) |
7596 __gen_field(values->NumberofThreadsinGPGPUThreadGroup, 0, 7) |
7597 0;
7598
7599 dw[6] =
7600 __gen_field(values->CrossThreadConstantDataReadLength, 0, 7) |
7601 0;
7602
7603 dw[7] =
7604 0;
7605
7606 }
7607
7608 #define GEN75_BINDING_TABLE_STATE_length 0x00000001
7609
7610 struct GEN75_BINDING_TABLE_STATE {
7611 uint32_t SurfaceStatePointer;
7612 };
7613
7614 static inline void
7615 GEN75_BINDING_TABLE_STATE_pack(__gen_user_data *data, void * restrict dst,
7616 const struct GEN75_BINDING_TABLE_STATE * restrict values)
7617 {
7618 uint32_t *dw = (uint32_t * restrict) dst;
7619
7620 dw[0] =
7621 __gen_offset(values->SurfaceStatePointer, 5, 31) |
7622 0;
7623
7624 }
7625
7626 #define GEN75_RENDER_SURFACE_STATE_length 0x00000008
7627
7628 struct GEN75_RENDER_SURFACE_STATE {
7629 #define SURFTYPE_1D 0
7630 #define SURFTYPE_2D 1
7631 #define SURFTYPE_3D 2
7632 #define SURFTYPE_CUBE 3
7633 #define SURFTYPE_BUFFER 4
7634 #define SURFTYPE_STRBUF 5
7635 #define SURFTYPE_NULL 7
7636 uint32_t SurfaceType;
7637 bool SurfaceArray;
7638 uint32_t SurfaceFormat;
7639 #define VALIGN_2 0
7640 #define VALIGN_4 1
7641 uint32_t SurfaceVerticalAlignment;
7642 #define HALIGN_4 0
7643 #define HALIGN_8 1
7644 uint32_t SurfaceHorizontalAlignment;
7645 uint32_t TiledSurface;
7646 #define TILEWALK_XMAJOR 0
7647 #define TILEWALK_YMAJOR 1
7648 uint32_t TileWalk;
7649 uint32_t VerticalLineStride;
7650 uint32_t VerticalLineStrideOffset;
7651 #define ARYSPC_FULL 0
7652 #define ARYSPC_LOD0 1
7653 uint32_t SurfaceArraySpacing;
7654 uint32_t RenderCacheReadWriteMode;
7655 #define NORMAL_MODE 0
7656 #define PROGRESSIVE_FRAME 2
7657 #define INTERLACED_FRAME 3
7658 uint32_t MediaBoundaryPixelMode;
7659 uint32_t CubeFaceEnables;
7660 __gen_address_type SurfaceBaseAddress;
7661 uint32_t Height;
7662 uint32_t Width;
7663 uint32_t Depth;
7664 uint32_t IntegerSurfaceFormat;
7665 uint32_t SurfacePitch;
7666 #define RTROTATE_0DEG 0
7667 #define RTROTATE_90DEG 1
7668 #define RTROTATE_270DEG 3
7669 uint32_t RenderTargetRotation;
7670 uint32_t MinimumArrayElement;
7671 uint32_t RenderTargetViewExtent;
7672 #define MSFMT_MSS 0
7673 #define MSFMT_DEPTH_STENCIL 1
7674 uint32_t MultisampledSurfaceStorageFormat;
7675 #define MULTISAMPLECOUNT_1 0
7676 #define MULTISAMPLECOUNT_4 2
7677 #define MULTISAMPLECOUNT_8 3
7678 uint32_t NumberofMultisamples;
7679 uint32_t MultisamplePositionPaletteIndex;
7680 uint32_t MinimumArrayElement0;
7681 uint32_t XOffset;
7682 uint32_t YOffset;
7683 struct GEN75_MEMORY_OBJECT_CONTROL_STATE SurfaceObjectControlState;
7684 uint32_t SurfaceMinLOD;
7685 uint32_t MIPCountLOD;
7686 __gen_address_type MCSBaseAddress;
7687 uint32_t MCSSurfacePitch;
7688 __gen_address_type AppendCounterAddress;
7689 bool AppendCounterEnable;
7690 bool MCSEnable;
7691 uint32_t XOffsetforUVPlane;
7692 uint32_t YOffsetforUVPlane;
7693 #define SCS_ZERO 0
7694 #define SCS_ONE 1
7695 #define SCS_RED 4
7696 #define SCS_GREEN 5
7697 #define SCS_BLUE 6
7698 #define SCS_ALPHA 7
7699 uint32_t ShaderChannelSelectR;
7700 uint32_t ShaderChannelSelectG;
7701 uint32_t ShaderChannelSelectB;
7702 uint32_t ShaderChannelSelectA;
7703 float ResourceMinLOD;
7704 };
7705
7706 static inline void
7707 GEN75_RENDER_SURFACE_STATE_pack(__gen_user_data *data, void * restrict dst,
7708 const struct GEN75_RENDER_SURFACE_STATE * restrict values)
7709 {
7710 uint32_t *dw = (uint32_t * restrict) dst;
7711
7712 dw[0] =
7713 __gen_field(values->SurfaceType, 29, 31) |
7714 __gen_field(values->SurfaceArray, 28, 28) |
7715 __gen_field(values->SurfaceFormat, 18, 26) |
7716 __gen_field(values->SurfaceVerticalAlignment, 16, 17) |
7717 __gen_field(values->SurfaceHorizontalAlignment, 15, 15) |
7718 __gen_field(values->TiledSurface, 14, 14) |
7719 __gen_field(values->TileWalk, 13, 13) |
7720 __gen_field(values->VerticalLineStride, 12, 12) |
7721 __gen_field(values->VerticalLineStrideOffset, 11, 11) |
7722 __gen_field(values->SurfaceArraySpacing, 10, 10) |
7723 __gen_field(values->RenderCacheReadWriteMode, 8, 8) |
7724 __gen_field(values->MediaBoundaryPixelMode, 6, 7) |
7725 __gen_field(values->CubeFaceEnables, 0, 5) |
7726 0;
7727
7728 uint32_t dw1 =
7729 0;
7730
7731 dw[1] =
7732 __gen_combine_address(data, &dw[1], values->SurfaceBaseAddress, dw1);
7733
7734 dw[2] =
7735 __gen_field(values->Height, 16, 29) |
7736 __gen_field(values->Width, 0, 13) |
7737 0;
7738
7739 dw[3] =
7740 __gen_field(values->Depth, 21, 31) |
7741 __gen_field(values->IntegerSurfaceFormat, 18, 20) |
7742 __gen_field(values->SurfacePitch, 0, 17) |
7743 0;
7744
7745 dw[4] =
7746 __gen_field(values->RenderTargetRotation, 29, 30) |
7747 __gen_field(values->MinimumArrayElement, 18, 28) |
7748 __gen_field(values->RenderTargetViewExtent, 7, 17) |
7749 __gen_field(values->MultisampledSurfaceStorageFormat, 6, 6) |
7750 __gen_field(values->NumberofMultisamples, 3, 5) |
7751 __gen_field(values->MultisamplePositionPaletteIndex, 0, 2) |
7752 __gen_field(values->MinimumArrayElement, 0, 26) |
7753 0;
7754
7755 uint32_t dw_SurfaceObjectControlState;
7756 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceObjectControlState, &values->SurfaceObjectControlState);
7757 dw[5] =
7758 __gen_offset(values->XOffset, 25, 31) |
7759 __gen_offset(values->YOffset, 20, 23) |
7760 __gen_field(dw_SurfaceObjectControlState, 16, 19) |
7761 __gen_field(values->SurfaceMinLOD, 4, 7) |
7762 __gen_field(values->MIPCountLOD, 0, 3) |
7763 0;
7764
7765 uint32_t dw6 =
7766 __gen_field(values->MCSSurfacePitch, 3, 11) |
7767 __gen_field(values->AppendCounterEnable, 1, 1) |
7768 __gen_field(values->MCSEnable, 0, 0) |
7769 __gen_field(values->XOffsetforUVPlane, 16, 29) |
7770 __gen_field(values->YOffsetforUVPlane, 0, 13) |
7771 0;
7772
7773 dw[6] =
7774 __gen_combine_address(data, &dw[6], values->AppendCounterAddress, dw6);
7775
7776 dw[7] =
7777 __gen_field(values->ShaderChannelSelectR, 25, 27) |
7778 __gen_field(values->ShaderChannelSelectG, 22, 24) |
7779 __gen_field(values->ShaderChannelSelectB, 19, 21) |
7780 __gen_field(values->ShaderChannelSelectA, 16, 18) |
7781 __gen_field(values->ResourceMinLOD * (1 << 8), 0, 11) |
7782 0;
7783
7784 }
7785
7786 #define GEN75_SAMPLER_BORDER_COLOR_STATE_length 0x00000014
7787
7788 #define GEN75_BORDER_COLOR_UINT32_SINT32_length 0x00000004
7789
7790 struct GEN75_BORDER_COLOR_UINT32_SINT32 {
7791 uint32_t BorderColorRedui32integerunclamp;
7792 uint32_t BorderColorRedsi32integerunclamp;
7793 uint32_t BorderColorGreenui32integerunclamp;
7794 uint32_t BorderColorGreensi32integerunclamp;
7795 uint32_t BorderColorBlueui32integerunclamp;
7796 uint32_t BorderColorBluesi32integerunclamp;
7797 uint32_t BorderColorGreenui32integerunclamp0;
7798 uint32_t BorderColorGreensi32integerunclamp0;
7799 uint32_t BorderColorAlphaui32integerunclamp;
7800 uint32_t BorderColorAlphasi32integerunclamp;
7801 };
7802
7803 static inline void
7804 GEN75_BORDER_COLOR_UINT32_SINT32_pack(__gen_user_data *data, void * restrict dst,
7805 const struct GEN75_BORDER_COLOR_UINT32_SINT32 * restrict values)
7806 {
7807 uint32_t *dw = (uint32_t * restrict) dst;
7808
7809 dw[0] =
7810 __gen_field(values->BorderColorRedui32integerunclamp, 0, 31) |
7811 __gen_field(values->BorderColorRedsi32integerunclamp, 0, 31) |
7812 0;
7813
7814 dw[1] =
7815 __gen_field(values->BorderColorGreenui32integerunclamp, 0, 31) |
7816 __gen_field(values->BorderColorGreensi32integerunclamp, 0, 31) |
7817 0;
7818
7819 dw[2] =
7820 __gen_field(values->BorderColorBlueui32integerunclamp, 0, 31) |
7821 __gen_field(values->BorderColorBluesi32integerunclamp, 0, 31) |
7822 __gen_field(values->BorderColorGreenui32integerunclamp, 0, 31) |
7823 __gen_field(values->BorderColorGreensi32integerunclamp, 0, 31) |
7824 0;
7825
7826 dw[3] =
7827 __gen_field(values->BorderColorAlphaui32integerunclamp, 0, 31) |
7828 __gen_field(values->BorderColorAlphasi32integerunclamp, 0, 31) |
7829 0;
7830
7831 }
7832
7833 #define GEN75_BORDER_COLOR_UINT16_SINT16_length 0x00000004
7834
7835 struct GEN75_BORDER_COLOR_UINT16_SINT16 {
7836 uint32_t BorderColorGreenclamptouint16;
7837 uint32_t BorderColorGreenclamptosint16;
7838 uint32_t BorderColorRedclamptouint16;
7839 uint32_t BorderColorRedclamptosint16;
7840 uint32_t BorderColorAlphaclamptouint16;
7841 uint32_t BorderColorAlphaclamptosint16;
7842 uint32_t BorderColorBlueclamptouint16;
7843 uint32_t BorderColorBlueclamptosint16;
7844 };
7845
7846 static inline void
7847 GEN75_BORDER_COLOR_UINT16_SINT16_pack(__gen_user_data *data, void * restrict dst,
7848 const struct GEN75_BORDER_COLOR_UINT16_SINT16 * restrict values)
7849 {
7850 uint32_t *dw = (uint32_t * restrict) dst;
7851
7852 dw[0] =
7853 __gen_field(values->BorderColorGreenclamptouint16, 16, 31) |
7854 __gen_field(values->BorderColorGreenclamptosint16, 16, 31) |
7855 __gen_field(values->BorderColorRedclamptouint16, 0, 15) |
7856 __gen_field(values->BorderColorRedclamptosint16, 0, 15) |
7857 0;
7858
7859 dw[1] =
7860 0;
7861
7862 dw[2] =
7863 __gen_field(values->BorderColorAlphaclamptouint16, 16, 31) |
7864 __gen_field(values->BorderColorAlphaclamptosint16, 16, 31) |
7865 __gen_field(values->BorderColorBlueclamptouint16, 0, 15) |
7866 __gen_field(values->BorderColorBlueclamptosint16, 0, 15) |
7867 0;
7868
7869 dw[3] =
7870 0;
7871
7872 }
7873
7874 #define GEN75_BORDER_COLOR_UINT8_SINT8_length 0x00000004
7875
7876 struct GEN75_BORDER_COLOR_UINT8_SINT8 {
7877 uint32_t BorderColorAlphaclamptouint8;
7878 uint32_t BorderColorAlphaclamptosint8;
7879 uint32_t BorderColorBlueclamptouint8;
7880 uint32_t BorderColorBlueclamptosint8;
7881 uint32_t BorderColorGreenclamptouint8;
7882 uint32_t BorderColorGreenclamptosint8;
7883 uint32_t BorderRedAlphaclamptouint8;
7884 uint32_t BorderRedAlphaclamptosint8;
7885 };
7886
7887 static inline void
7888 GEN75_BORDER_COLOR_UINT8_SINT8_pack(__gen_user_data *data, void * restrict dst,
7889 const struct GEN75_BORDER_COLOR_UINT8_SINT8 * restrict values)
7890 {
7891 uint32_t *dw = (uint32_t * restrict) dst;
7892
7893 dw[0] =
7894 __gen_field(values->BorderColorAlphaclamptouint8, 24, 31) |
7895 __gen_field(values->BorderColorAlphaclamptosint8, 24, 31) |
7896 __gen_field(values->BorderColorBlueclamptouint8, 16, 23) |
7897 __gen_field(values->BorderColorBlueclamptosint8, 16, 23) |
7898 __gen_field(values->BorderColorGreenclamptouint8, 8, 15) |
7899 __gen_field(values->BorderColorGreenclamptosint8, 8, 15) |
7900 __gen_field(values->BorderRedAlphaclamptouint8, 0, 7) |
7901 __gen_field(values->BorderRedAlphaclamptosint8, 0, 7) |
7902 0;
7903
7904 dw[1] =
7905 0;
7906
7907 dw[2] =
7908 0;
7909
7910 dw[3] =
7911 0;
7912
7913 }
7914
7915 struct GEN75_SAMPLER_BORDER_COLOR_STATE {
7916 float BorderColorRedDX100GL;
7917 uint32_t BorderColorAlpha;
7918 uint32_t BorderColorBlue;
7919 uint32_t BorderColorGreen;
7920 uint32_t BorderColorRedDX9;
7921 float BorderColorGreen0;
7922 float BorderColorBlue0;
7923 float BorderColorAlpha0;
7924 struct GEN75_BORDER_COLOR_UINT32_SINT32 BorderColor;
7925 struct GEN75_BORDER_COLOR_UINT16_SINT16 BorderColor0;
7926 struct GEN75_BORDER_COLOR_UINT8_SINT8 BorderColor1;
7927 };
7928
7929 static inline void
7930 GEN75_SAMPLER_BORDER_COLOR_STATE_pack(__gen_user_data *data, void * restrict dst,
7931 const struct GEN75_SAMPLER_BORDER_COLOR_STATE * restrict values)
7932 {
7933 uint32_t *dw = (uint32_t * restrict) dst;
7934
7935 dw[0] =
7936 __gen_float(values->BorderColorRedDX100GL) |
7937 __gen_field(values->BorderColorAlpha, 24, 31) |
7938 __gen_field(values->BorderColorBlue, 16, 23) |
7939 __gen_field(values->BorderColorGreen, 8, 15) |
7940 __gen_field(values->BorderColorRedDX9, 0, 7) |
7941 0;
7942
7943 dw[1] =
7944 __gen_float(values->BorderColorGreen) |
7945 0;
7946
7947 dw[2] =
7948 __gen_float(values->BorderColorBlue) |
7949 0;
7950
7951 dw[3] =
7952 __gen_float(values->BorderColorAlpha) |
7953 0;
7954
7955 for (uint32_t i = 0, j = 4; i < 12; i += 1, j++) {
7956 dw[j] =
7957 0;
7958 }
7959
7960 GEN75_BORDER_COLOR_UINT32_SINT32_pack(data, &dw[16], &values->BorderColor);
7961 }
7962
7963 #define GEN75_SAMPLER_STATE_length 0x00000004
7964
7965 struct GEN75_SAMPLER_STATE {
7966 bool SamplerDisable;
7967 #define DX10OGL 0
7968 #define DX9 1
7969 uint32_t TextureBorderColorMode;
7970 #define OGL 1
7971 uint32_t LODPreClampEnable;
7972 float BaseMipLevel;
7973 #define MIPFILTER_NONE 0
7974 #define MIPFILTER_NEAREST 1
7975 #define MIPFILTER_LINEAR 3
7976 uint32_t MipModeFilter;
7977 #define MAPFILTER_NEAREST 0
7978 #define MAPFILTER_LINEAR 1
7979 #define MAPFILTER_ANISOTROPIC 2
7980 #define MAPFILTER_MONO 6
7981 uint32_t MagModeFilter;
7982 #define MAPFILTER_NEAREST 0
7983 #define MAPFILTER_LINEAR 1
7984 #define MAPFILTER_ANISOTROPIC 2
7985 #define MAPFILTER_MONO 6
7986 uint32_t MinModeFilter;
7987 uint32_t TextureLODBias;
7988 #define LEGACY 0
7989 #define EWAApproximation 1
7990 uint32_t AnisotropicAlgorithm;
7991 float MinLOD;
7992 float MaxLOD;
7993 #define PREFILTEROPALWAYS 0
7994 #define PREFILTEROPNEVER 1
7995 #define PREFILTEROPLESS 2
7996 #define PREFILTEROPEQUAL 3
7997 #define PREFILTEROPLEQUAL 4
7998 #define PREFILTEROPGREATER 5
7999 #define PREFILTEROPNOTEQUAL 6
8000 #define PREFILTEROPGEQUAL 7
8001 uint32_t ShadowFunction;
8002 #define PROGRAMMED 0
8003 #define OVERRIDE 1
8004 uint32_t CubeSurfaceControlMode;
8005 uint32_t BorderColorPointer;
8006 bool ChromaKeyEnable;
8007 uint32_t ChromaKeyIndex;
8008 #define KEYFILTER_KILL_ON_ANY_MATCH 0
8009 #define KEYFILTER_REPLACE_BLACK 1
8010 uint32_t ChromaKeyMode;
8011 #define RATIO21 0
8012 #define RATIO41 1
8013 #define RATIO61 2
8014 #define RATIO81 3
8015 #define RATIO101 4
8016 #define RATIO121 5
8017 #define RATIO141 6
8018 #define RATIO161 7
8019 uint32_t MaximumAnisotropy;
8020 bool RAddressMinFilterRoundingEnable;
8021 bool RAddressMagFilterRoundingEnable;
8022 bool VAddressMinFilterRoundingEnable;
8023 bool VAddressMagFilterRoundingEnable;
8024 bool UAddressMinFilterRoundingEnable;
8025 bool UAddressMagFilterRoundingEnable;
8026 #define FULL 0
8027 #define TRIQUAL_HIGHMAG_CLAMP_MIPFILTER 1
8028 #define MED 2
8029 #define LOW 3
8030 uint32_t TrilinearFilterQuality;
8031 bool NonnormalizedCoordinateEnable;
8032 uint32_t TCXAddressControlMode;
8033 uint32_t TCYAddressControlMode;
8034 uint32_t TCZAddressControlMode;
8035 };
8036
8037 static inline void
8038 GEN75_SAMPLER_STATE_pack(__gen_user_data *data, void * restrict dst,
8039 const struct GEN75_SAMPLER_STATE * restrict values)
8040 {
8041 uint32_t *dw = (uint32_t * restrict) dst;
8042
8043 dw[0] =
8044 __gen_field(values->SamplerDisable, 31, 31) |
8045 __gen_field(values->TextureBorderColorMode, 29, 29) |
8046 __gen_field(values->LODPreClampEnable, 28, 28) |
8047 __gen_field(values->BaseMipLevel * (1 << 1), 22, 26) |
8048 __gen_field(values->MipModeFilter, 20, 21) |
8049 __gen_field(values->MagModeFilter, 17, 19) |
8050 __gen_field(values->MinModeFilter, 14, 16) |
8051 __gen_field(values->TextureLODBias, 1, 13) |
8052 __gen_field(values->AnisotropicAlgorithm, 0, 0) |
8053 0;
8054
8055 dw[1] =
8056 __gen_field(values->MinLOD * (1 << 8), 20, 31) |
8057 __gen_field(values->MaxLOD * (1 << 8), 8, 19) |
8058 __gen_field(values->ShadowFunction, 1, 3) |
8059 __gen_field(values->CubeSurfaceControlMode, 0, 0) |
8060 0;
8061
8062 dw[2] =
8063 __gen_offset(values->BorderColorPointer, 5, 31) |
8064 0;
8065
8066 dw[3] =
8067 __gen_field(values->ChromaKeyEnable, 25, 25) |
8068 __gen_field(values->ChromaKeyIndex, 23, 24) |
8069 __gen_field(values->ChromaKeyMode, 22, 22) |
8070 __gen_field(values->MaximumAnisotropy, 19, 21) |
8071 __gen_field(values->RAddressMinFilterRoundingEnable, 13, 13) |
8072 __gen_field(values->RAddressMagFilterRoundingEnable, 14, 14) |
8073 __gen_field(values->VAddressMinFilterRoundingEnable, 15, 15) |
8074 __gen_field(values->VAddressMagFilterRoundingEnable, 16, 16) |
8075 __gen_field(values->UAddressMinFilterRoundingEnable, 17, 17) |
8076 __gen_field(values->UAddressMagFilterRoundingEnable, 18, 18) |
8077 __gen_field(values->TrilinearFilterQuality, 11, 12) |
8078 __gen_field(values->NonnormalizedCoordinateEnable, 10, 10) |
8079 __gen_field(values->TCXAddressControlMode, 6, 8) |
8080 __gen_field(values->TCYAddressControlMode, 3, 5) |
8081 __gen_field(values->TCZAddressControlMode, 0, 2) |
8082 0;
8083
8084 }
8085
8086 /* Enum 3D_Prim_Topo_Type */
8087 #define _3DPRIM_POINTLIST 1
8088 #define _3DPRIM_LINELIST 2
8089 #define _3DPRIM_LINESTRIP 3
8090 #define _3DPRIM_TRILIST 4
8091 #define _3DPRIM_TRISTRIP 5
8092 #define _3DPRIM_TRIFAN 6
8093 #define _3DPRIM_QUADLIST 7
8094 #define _3DPRIM_QUADSTRIP 8
8095 #define _3DPRIM_LINELIST_ADJ 9
8096 #define _3DPRIM_LINESTRIP_ADJ 10
8097 #define _3DPRIM_TRILIST_ADJ 11
8098 #define _3DPRIM_TRISTRIP_ADJ 12
8099 #define _3DPRIM_TRISTRIP_REVERSE 13
8100 #define _3DPRIM_POLYGON 14
8101 #define _3DPRIM_RECTLIST 15
8102 #define _3DPRIM_LINELOOP 16
8103 #define _3DPRIM_POINTLIST_BF 17
8104 #define _3DPRIM_LINESTRIP_CONT 18
8105 #define _3DPRIM_LINESTRIP_BF 19
8106 #define _3DPRIM_LINESTRIP_CONT_BF 20
8107 #define _3DPRIM_TRIFAN_NOSTIPPLE 22
8108 #define _3DPRIM_PATCHLIST_1 32
8109 #define _3DPRIM_PATCHLIST_2 33
8110 #define _3DPRIM_PATCHLIST_3 34
8111 #define _3DPRIM_PATCHLIST_4 35
8112 #define _3DPRIM_PATCHLIST_5 36
8113 #define _3DPRIM_PATCHLIST_6 37
8114 #define _3DPRIM_PATCHLIST_7 38
8115 #define _3DPRIM_PATCHLIST_8 39
8116 #define _3DPRIM_PATCHLIST_9 40
8117 #define _3DPRIM_PATCHLIST_10 41
8118 #define _3DPRIM_PATCHLIST_11 42
8119 #define _3DPRIM_PATCHLIST_12 43
8120 #define _3DPRIM_PATCHLIST_13 44
8121 #define _3DPRIM_PATCHLIST_14 45
8122 #define _3DPRIM_PATCHLIST_15 46
8123 #define _3DPRIM_PATCHLIST_16 47
8124 #define _3DPRIM_PATCHLIST_17 48
8125 #define _3DPRIM_PATCHLIST_18 49
8126 #define _3DPRIM_PATCHLIST_19 50
8127 #define _3DPRIM_PATCHLIST_20 51
8128 #define _3DPRIM_PATCHLIST_21 52
8129 #define _3DPRIM_PATCHLIST_22 53
8130 #define _3DPRIM_PATCHLIST_23 54
8131 #define _3DPRIM_PATCHLIST_24 55
8132 #define _3DPRIM_PATCHLIST_25 56
8133 #define _3DPRIM_PATCHLIST_26 57
8134 #define _3DPRIM_PATCHLIST_27 58
8135 #define _3DPRIM_PATCHLIST_28 59
8136 #define _3DPRIM_PATCHLIST_29 60
8137 #define _3DPRIM_PATCHLIST_30 61
8138 #define _3DPRIM_PATCHLIST_31 62
8139 #define _3DPRIM_PATCHLIST_32 63
8140
8141 /* Enum 3D_Vertex_Component_Control */
8142 #define VFCOMP_NOSTORE 0
8143 #define VFCOMP_STORE_SRC 1
8144 #define VFCOMP_STORE_0 2
8145 #define VFCOMP_STORE_1_FP 3
8146 #define VFCOMP_STORE_1_INT 4
8147 #define VFCOMP_STORE_VID 5
8148 #define VFCOMP_STORE_IID 6
8149 #define VFCOMP_STORE_PID 7
8150
8151 /* Enum 3D_Compare_Function */
8152 #define COMPAREFUNCTION_ALWAYS 0
8153 #define COMPAREFUNCTION_NEVER 1
8154 #define COMPAREFUNCTION_LESS 2
8155 #define COMPAREFUNCTION_EQUAL 3
8156 #define COMPAREFUNCTION_LEQUAL 4
8157 #define COMPAREFUNCTION_GREATER 5
8158 #define COMPAREFUNCTION_NOTEQUAL 6
8159 #define COMPAREFUNCTION_GEQUAL 7
8160
8161 /* Enum SURFACE_FORMAT */
8162 #define R32G32B32A32_FLOAT 0
8163 #define R32G32B32A32_SINT 1
8164 #define R32G32B32A32_UINT 2
8165 #define R32G32B32A32_UNORM 3
8166 #define R32G32B32A32_SNORM 4
8167 #define R64G64_FLOAT 5
8168 #define R32G32B32X32_FLOAT 6
8169 #define R32G32B32A32_SSCALED 7
8170 #define R32G32B32A32_USCALED 8
8171 #define R32G32B32A32_SFIXED 32
8172 #define R64G64_PASSTHRU 33
8173 #define R32G32B32_FLOAT 64
8174 #define R32G32B32_SINT 65
8175 #define R32G32B32_UINT 66
8176 #define R32G32B32_UNORM 67
8177 #define R32G32B32_SNORM 68
8178 #define R32G32B32_SSCALED 69
8179 #define R32G32B32_USCALED 70
8180 #define R32G32B32_SFIXED 80
8181 #define R16G16B16A16_UNORM 128
8182 #define R16G16B16A16_SNORM 129
8183 #define R16G16B16A16_SINT 130
8184 #define R16G16B16A16_UINT 131
8185 #define R16G16B16A16_FLOAT 132
8186 #define R32G32_FLOAT 133
8187 #define R32G32_SINT 134
8188 #define R32G32_UINT 135
8189 #define R32_FLOAT_X8X24_TYPELESS 136
8190 #define X32_TYPELESS_G8X24_UINT 137
8191 #define L32A32_FLOAT 138
8192 #define R32G32_UNORM 139
8193 #define R32G32_SNORM 140
8194 #define R64_FLOAT 141
8195 #define R16G16B16X16_UNORM 142
8196 #define R16G16B16X16_FLOAT 143
8197 #define A32X32_FLOAT 144
8198 #define L32X32_FLOAT 145
8199 #define I32X32_FLOAT 146
8200 #define R16G16B16A16_SSCALED 147
8201 #define R16G16B16A16_USCALED 148
8202 #define R32G32_SSCALED 149
8203 #define R32G32_USCALED 150
8204 #define R32G32_SFIXED 160
8205 #define R64_PASSTHRU 161
8206 #define B8G8R8A8_UNORM 192
8207 #define B8G8R8A8_UNORM_SRGB 193
8208 #define R10G10B10A2_UNORM 194
8209 #define R10G10B10A2_UNORM_SRGB 195
8210 #define R10G10B10A2_UINT 196
8211 #define R10G10B10_SNORM_A2_UNORM 197
8212 #define R8G8B8A8_UNORM 199
8213 #define R8G8B8A8_UNORM_SRGB 200
8214 #define R8G8B8A8_SNORM 201
8215 #define R8G8B8A8_SINT 202
8216 #define R8G8B8A8_UINT 203
8217 #define R16G16_UNORM 204
8218 #define R16G16_SNORM 205
8219 #define R16G16_SINT 206
8220 #define R16G16_UINT 207
8221 #define R16G16_FLOAT 208
8222 #define B10G10R10A2_UNORM 209
8223 #define B10G10R10A2_UNORM_SRGB 210
8224 #define R11G11B10_FLOAT 211
8225 #define R32_SINT 214
8226 #define R32_UINT 215
8227 #define R32_FLOAT 216
8228 #define R24_UNORM_X8_TYPELESS 217
8229 #define X24_TYPELESS_G8_UINT 218
8230 #define L32_UNORM 221
8231 #define A32_UNORM 222
8232 #define L16A16_UNORM 223
8233 #define I24X8_UNORM 224
8234 #define L24X8_UNORM 225
8235 #define A24X8_UNORM 226
8236 #define I32_FLOAT 227
8237 #define L32_FLOAT 228
8238 #define A32_FLOAT 229
8239 #define X8B8_UNORM_G8R8_SNORM 230
8240 #define A8X8_UNORM_G8R8_SNORM 231
8241 #define B8X8_UNORM_G8R8_SNORM 232
8242 #define B8G8R8X8_UNORM 233
8243 #define B8G8R8X8_UNORM_SRGB 234
8244 #define R8G8B8X8_UNORM 235
8245 #define R8G8B8X8_UNORM_SRGB 236
8246 #define R9G9B9E5_SHAREDEXP 237
8247 #define B10G10R10X2_UNORM 238
8248 #define L16A16_FLOAT 240
8249 #define R32_UNORM 241
8250 #define R32_SNORM 242
8251 #define R10G10B10X2_USCALED 243
8252 #define R8G8B8A8_SSCALED 244
8253 #define R8G8B8A8_USCALED 245
8254 #define R16G16_SSCALED 246
8255 #define R16G16_USCALED 247
8256 #define R32_SSCALED 248
8257 #define R32_USCALED 249
8258 #define B5G6R5_UNORM 256
8259 #define B5G6R5_UNORM_SRGB 257
8260 #define B5G5R5A1_UNORM 258
8261 #define B5G5R5A1_UNORM_SRGB 259
8262 #define B4G4R4A4_UNORM 260
8263 #define B4G4R4A4_UNORM_SRGB 261
8264 #define R8G8_UNORM 262
8265 #define R8G8_SNORM 263
8266 #define R8G8_SINT 264
8267 #define R8G8_UINT 265
8268 #define R16_UNORM 266
8269 #define R16_SNORM 267
8270 #define R16_SINT 268
8271 #define R16_UINT 269
8272 #define R16_FLOAT 270
8273 #define A8P8_UNORM_PALETTE0 271
8274 #define A8P8_UNORM_PALETTE1 272
8275 #define I16_UNORM 273
8276 #define L16_UNORM 274
8277 #define A16_UNORM 275
8278 #define L8A8_UNORM 276
8279 #define I16_FLOAT 277
8280 #define L16_FLOAT 278
8281 #define A16_FLOAT 279
8282 #define L8A8_UNORM_SRGB 280
8283 #define R5G5_SNORM_B6_UNORM 281
8284 #define B5G5R5X1_UNORM 282
8285 #define B5G5R5X1_UNORM_SRGB 283
8286 #define R8G8_SSCALED 284
8287 #define R8G8_USCALED 285
8288 #define R16_SSCALED 286
8289 #define R16_USCALED 287
8290 #define P8A8_UNORM_PALETTE0 290
8291 #define P8A8_UNORM_PALETTE1 291
8292 #define A1B5G5R5_UNORM 292
8293 #define A4B4G4R4_UNORM 293
8294 #define L8A8_UINT 294
8295 #define L8A8_SINT 295
8296 #define R8_UNORM 320
8297 #define R8_SNORM 321
8298 #define R8_SINT 322
8299 #define R8_UINT 323
8300 #define A8_UNORM 324
8301 #define I8_UNORM 325
8302 #define L8_UNORM 326
8303 #define P4A4_UNORM_PALETTE0 327
8304 #define A4P4_UNORM_PALETTE0 328
8305 #define R8_SSCALED 329
8306 #define R8_USCALED 330
8307 #define P8_UNORM_PALETTE0 331
8308 #define L8_UNORM_SRGB 332
8309 #define P8_UNORM_PALETTE1 333
8310 #define P4A4_UNORM_PALETTE1 334
8311 #define A4P4_UNORM_PALETTE1 335
8312 #define Y8_UNORM 336
8313 #define L8_UINT 338
8314 #define L8_SINT 339
8315 #define I8_UINT 340
8316 #define I8_SINT 341
8317 #define DXT1_RGB_SRGB 384
8318 #define R1_UNORM 385
8319 #define YCRCB_NORMAL 386
8320 #define YCRCB_SWAPUVY 387
8321 #define P2_UNORM_PALETTE0 388
8322 #define P2_UNORM_PALETTE1 389
8323 #define BC1_UNORM 390
8324 #define BC2_UNORM 391
8325 #define BC3_UNORM 392
8326 #define BC4_UNORM 393
8327 #define BC5_UNORM 394
8328 #define BC1_UNORM_SRGB 395
8329 #define BC2_UNORM_SRGB 396
8330 #define BC3_UNORM_SRGB 397
8331 #define MONO8 398
8332 #define YCRCB_SWAPUV 399
8333 #define YCRCB_SWAPY 400
8334 #define DXT1_RGB 401
8335 #define FXT1 402
8336 #define R8G8B8_UNORM 403
8337 #define R8G8B8_SNORM 404
8338 #define R8G8B8_SSCALED 405
8339 #define R8G8B8_USCALED 406
8340 #define R64G64B64A64_FLOAT 407
8341 #define R64G64B64_FLOAT 408
8342 #define BC4_SNORM 409
8343 #define BC5_SNORM 410
8344 #define R16G16B16_FLOAT 411
8345 #define R16G16B16_UNORM 412
8346 #define R16G16B16_SNORM 413
8347 #define R16G16B16_SSCALED 414
8348 #define R16G16B16_USCALED 415
8349 #define BC6H_SF16 417
8350 #define BC7_UNORM 418
8351 #define BC7_UNORM_SRGB 419
8352 #define BC6H_UF16 420
8353 #define PLANAR_420_8 421
8354 #define R8G8B8_UNORM_SRGB 424
8355 #define ETC1_RGB8 425
8356 #define ETC2_RGB8 426
8357 #define EAC_R11 427
8358 #define EAC_RG11 428
8359 #define EAC_SIGNED_R11 429
8360 #define EAC_SIGNED_RG11 430
8361 #define ETC2_SRGB8 431
8362 #define R16G16B16_UINT 432
8363 #define R16G16B16_SINT 433
8364 #define R32_SFIXED 434
8365 #define R10G10B10A2_SNORM 435
8366 #define R10G10B10A2_USCALED 436
8367 #define R10G10B10A2_SSCALED 437
8368 #define R10G10B10A2_SINT 438
8369 #define B10G10R10A2_SNORM 439
8370 #define B10G10R10A2_USCALED 440
8371 #define B10G10R10A2_SSCALED 441
8372 #define B10G10R10A2_UINT 442
8373 #define B10G10R10A2_SINT 443
8374 #define R64G64B64A64_PASSTHRU 444
8375 #define R64G64B64_PASSTHRU 445
8376 #define ETC2_RGB8_PTA 448
8377 #define ETC2_SRGB8_PTA 449
8378 #define ETC2_EAC_RGBA8 450
8379 #define ETC2_EAC_SRGB8_A8 451
8380 #define R8G8B8_UINT 456
8381 #define R8G8B8_SINT 457
8382 #define RAW 511
8383
8384 /* Enum Texture Coordinate Mode */
8385 #define TCM_WRAP 0
8386 #define TCM_MIRROR 1
8387 #define TCM_CLAMP 2
8388 #define TCM_CUBE 3
8389 #define TCM_CLAMP_BORDER 4
8390 #define TCM_MIRROR_ONCE 5
8391