2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 /* Instructions, enums and structures for HSW.
27 * This file has been generated, do not hand edit.
35 #ifndef __gen_validate_value
36 #define __gen_validate_value(x)
39 #ifndef __gen_field_functions
40 #define __gen_field_functions
47 static inline uint64_t
48 __gen_mbo(uint32_t start
, uint32_t end
)
50 return (~0ul >> (64 - (end
- start
+ 1))) << start
;
53 static inline uint64_t
54 __gen_field(uint64_t v
, uint32_t start
, uint32_t end
)
56 __gen_validate_value(v
);
58 if (end
- start
+ 1 < 64)
59 assert(v
< 1ul << (end
- start
+ 1));
65 static inline uint64_t
66 __gen_offset(uint64_t v
, uint32_t start
, uint32_t end
)
68 __gen_validate_value(v
);
70 uint64_t mask
= (~0ul >> (64 - (end
- start
+ 1))) << start
;
72 assert((v
& ~mask
) == 0);
78 static inline uint32_t
81 __gen_validate_value(v
);
82 return ((union __gen_value
) { .f
= (v
) }).dw
;
85 #ifndef __gen_address_type
86 #error #define __gen_address_type before including this file
89 #ifndef __gen_user_data
90 #error #define __gen_combine_address before including this file
95 #define GEN75_3DSTATE_URB_VS_length 0x00000002
96 #define GEN75_3DSTATE_URB_VS_length_bias 0x00000002
97 #define GEN75_3DSTATE_URB_VS_header \
99 .CommandSubType = 3, \
100 ._3DCommandOpcode = 0, \
101 ._3DCommandSubOpcode = 48, \
104 struct GEN75_3DSTATE_URB_VS
{
105 uint32_t CommandType
;
106 uint32_t CommandSubType
;
107 uint32_t _3DCommandOpcode
;
108 uint32_t _3DCommandSubOpcode
;
109 uint32_t DwordLength
;
110 uint32_t VSURBStartingAddress
;
111 uint32_t VSURBEntryAllocationSize
;
112 uint32_t VSNumberofURBEntries
;
116 GEN75_3DSTATE_URB_VS_pack(__gen_user_data
*data
, void * restrict dst
,
117 const struct GEN75_3DSTATE_URB_VS
* restrict values
)
119 uint32_t *dw
= (uint32_t * restrict
) dst
;
122 __gen_field(values
->CommandType
, 29, 31) |
123 __gen_field(values
->CommandSubType
, 27, 28) |
124 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
125 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
126 __gen_field(values
->DwordLength
, 0, 7) |
130 __gen_field(values
->VSURBStartingAddress
, 25, 30) |
131 __gen_field(values
->VSURBEntryAllocationSize
, 16, 24) |
132 __gen_field(values
->VSNumberofURBEntries
, 0, 15) |
137 #define GEN75_GPGPU_CSR_BASE_ADDRESS_length 0x00000002
138 #define GEN75_GPGPU_CSR_BASE_ADDRESS_length_bias 0x00000002
139 #define GEN75_GPGPU_CSR_BASE_ADDRESS_header \
141 .CommandSubType = 0, \
142 ._3DCommandOpcode = 1, \
143 ._3DCommandSubOpcode = 4, \
146 struct GEN75_GPGPU_CSR_BASE_ADDRESS
{
147 uint32_t CommandType
;
148 uint32_t CommandSubType
;
149 uint32_t _3DCommandOpcode
;
150 uint32_t _3DCommandSubOpcode
;
151 uint32_t DwordLength
;
152 __gen_address_type GPGPUCSRBaseAddress
;
156 GEN75_GPGPU_CSR_BASE_ADDRESS_pack(__gen_user_data
*data
, void * restrict dst
,
157 const struct GEN75_GPGPU_CSR_BASE_ADDRESS
* restrict values
)
159 uint32_t *dw
= (uint32_t * restrict
) dst
;
162 __gen_field(values
->CommandType
, 29, 31) |
163 __gen_field(values
->CommandSubType
, 27, 28) |
164 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
165 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
166 __gen_field(values
->DwordLength
, 0, 7) |
173 __gen_combine_address(data
, &dw
[1], values
->GPGPUCSRBaseAddress
, dw1
);
177 #define GEN75_MI_STORE_REGISTER_MEM_length 0x00000003
178 #define GEN75_MI_STORE_REGISTER_MEM_length_bias 0x00000002
179 #define GEN75_MI_STORE_REGISTER_MEM_header \
181 .MICommandOpcode = 36, \
184 struct GEN75_MI_STORE_REGISTER_MEM
{
185 uint32_t CommandType
;
186 uint32_t MICommandOpcode
;
187 uint32_t UseGlobalGTT
;
188 uint32_t PredicateEnable
;
189 uint32_t DwordLength
;
190 uint32_t RegisterAddress
;
191 __gen_address_type MemoryAddress
;
195 GEN75_MI_STORE_REGISTER_MEM_pack(__gen_user_data
*data
, void * restrict dst
,
196 const struct GEN75_MI_STORE_REGISTER_MEM
* restrict values
)
198 uint32_t *dw
= (uint32_t * restrict
) dst
;
201 __gen_field(values
->CommandType
, 29, 31) |
202 __gen_field(values
->MICommandOpcode
, 23, 28) |
203 __gen_field(values
->UseGlobalGTT
, 22, 22) |
204 __gen_field(values
->PredicateEnable
, 21, 21) |
205 __gen_field(values
->DwordLength
, 0, 7) |
209 __gen_offset(values
->RegisterAddress
, 2, 22) |
216 __gen_combine_address(data
, &dw
[2], values
->MemoryAddress
, dw2
);
220 #define GEN75_PIPELINE_SELECT_length 0x00000001
221 #define GEN75_PIPELINE_SELECT_length_bias 0x00000001
222 #define GEN75_PIPELINE_SELECT_header \
224 .CommandSubType = 1, \
225 ._3DCommandOpcode = 1, \
226 ._3DCommandSubOpcode = 4
228 struct GEN75_PIPELINE_SELECT
{
229 uint32_t CommandType
;
230 uint32_t CommandSubType
;
231 uint32_t _3DCommandOpcode
;
232 uint32_t _3DCommandSubOpcode
;
236 uint32_t PipelineSelection
;
240 GEN75_PIPELINE_SELECT_pack(__gen_user_data
*data
, void * restrict dst
,
241 const struct GEN75_PIPELINE_SELECT
* restrict values
)
243 uint32_t *dw
= (uint32_t * restrict
) dst
;
246 __gen_field(values
->CommandType
, 29, 31) |
247 __gen_field(values
->CommandSubType
, 27, 28) |
248 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
249 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
250 __gen_field(values
->PipelineSelection
, 0, 1) |
255 #define GEN75_STATE_BASE_ADDRESS_length 0x0000000a
256 #define GEN75_STATE_BASE_ADDRESS_length_bias 0x00000002
257 #define GEN75_STATE_BASE_ADDRESS_header \
259 .CommandSubType = 0, \
260 ._3DCommandOpcode = 1, \
261 ._3DCommandSubOpcode = 1, \
264 struct GEN75_MEMORY_OBJECT_CONTROL_STATE
{
265 uint32_t LLCeLLCCacheabilityControlLLCCC
;
266 uint32_t L3CacheabilityControlL3CC
;
270 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(__gen_user_data
*data
, void * restrict dst
,
271 const struct GEN75_MEMORY_OBJECT_CONTROL_STATE
* restrict values
)
273 uint32_t *dw
= (uint32_t * restrict
) dst
;
276 __gen_field(values
->LLCeLLCCacheabilityControlLLCCC
, 1, 2) |
277 __gen_field(values
->L3CacheabilityControlL3CC
, 0, 0) |
282 struct GEN75_STATE_BASE_ADDRESS
{
283 uint32_t CommandType
;
284 uint32_t CommandSubType
;
285 uint32_t _3DCommandOpcode
;
286 uint32_t _3DCommandSubOpcode
;
287 uint32_t DwordLength
;
288 __gen_address_type GeneralStateBaseAddress
;
289 struct GEN75_MEMORY_OBJECT_CONTROL_STATE GeneralStateMemoryObjectControlState
;
290 struct GEN75_MEMORY_OBJECT_CONTROL_STATE StatelessDataPortAccessMemoryObjectControlState
;
291 uint32_t GeneralStateBaseAddressModifyEnable
;
292 __gen_address_type SurfaceStateBaseAddress
;
293 struct GEN75_MEMORY_OBJECT_CONTROL_STATE SurfaceStateMemoryObjectControlState
;
294 uint32_t SurfaceStateBaseAddressModifyEnable
;
295 __gen_address_type DynamicStateBaseAddress
;
296 struct GEN75_MEMORY_OBJECT_CONTROL_STATE DynamicStateMemoryObjectControlState
;
297 uint32_t DynamicStateBaseAddressModifyEnable
;
298 __gen_address_type IndirectObjectBaseAddress
;
299 struct GEN75_MEMORY_OBJECT_CONTROL_STATE IndirectObjectMemoryObjectControlState
;
300 uint32_t IndirectObjectBaseAddressModifyEnable
;
301 __gen_address_type InstructionBaseAddress
;
302 struct GEN75_MEMORY_OBJECT_CONTROL_STATE InstructionMemoryObjectControlState
;
303 uint32_t InstructionBaseAddressModifyEnable
;
304 __gen_address_type GeneralStateAccessUpperBound
;
305 uint32_t GeneralStateAccessUpperBoundModifyEnable
;
306 __gen_address_type DynamicStateAccessUpperBound
;
307 uint32_t DynamicStateAccessUpperBoundModifyEnable
;
308 __gen_address_type IndirectObjectAccessUpperBound
;
309 uint32_t IndirectObjectAccessUpperBoundModifyEnable
;
310 __gen_address_type InstructionAccessUpperBound
;
311 uint32_t InstructionAccessUpperBoundModifyEnable
;
315 GEN75_STATE_BASE_ADDRESS_pack(__gen_user_data
*data
, void * restrict dst
,
316 const struct GEN75_STATE_BASE_ADDRESS
* restrict values
)
318 uint32_t *dw
= (uint32_t * restrict
) dst
;
321 __gen_field(values
->CommandType
, 29, 31) |
322 __gen_field(values
->CommandSubType
, 27, 28) |
323 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
324 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
325 __gen_field(values
->DwordLength
, 0, 7) |
328 uint32_t dw_GeneralStateMemoryObjectControlState
;
329 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data
, &dw_GeneralStateMemoryObjectControlState
, &values
->GeneralStateMemoryObjectControlState
);
330 uint32_t dw_StatelessDataPortAccessMemoryObjectControlState
;
331 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data
, &dw_StatelessDataPortAccessMemoryObjectControlState
, &values
->StatelessDataPortAccessMemoryObjectControlState
);
333 __gen_field(dw_GeneralStateMemoryObjectControlState
, 8, 11) |
334 __gen_field(dw_StatelessDataPortAccessMemoryObjectControlState
, 4, 7) |
335 __gen_field(values
->GeneralStateBaseAddressModifyEnable
, 0, 0) |
339 __gen_combine_address(data
, &dw
[1], values
->GeneralStateBaseAddress
, dw1
);
341 uint32_t dw_SurfaceStateMemoryObjectControlState
;
342 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data
, &dw_SurfaceStateMemoryObjectControlState
, &values
->SurfaceStateMemoryObjectControlState
);
344 __gen_field(dw_SurfaceStateMemoryObjectControlState
, 8, 11) |
345 __gen_field(values
->SurfaceStateBaseAddressModifyEnable
, 0, 0) |
349 __gen_combine_address(data
, &dw
[2], values
->SurfaceStateBaseAddress
, dw2
);
351 uint32_t dw_DynamicStateMemoryObjectControlState
;
352 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data
, &dw_DynamicStateMemoryObjectControlState
, &values
->DynamicStateMemoryObjectControlState
);
354 __gen_field(dw_DynamicStateMemoryObjectControlState
, 8, 11) |
355 __gen_field(values
->DynamicStateBaseAddressModifyEnable
, 0, 0) |
359 __gen_combine_address(data
, &dw
[3], values
->DynamicStateBaseAddress
, dw3
);
361 uint32_t dw_IndirectObjectMemoryObjectControlState
;
362 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data
, &dw_IndirectObjectMemoryObjectControlState
, &values
->IndirectObjectMemoryObjectControlState
);
364 __gen_field(dw_IndirectObjectMemoryObjectControlState
, 8, 11) |
365 __gen_field(values
->IndirectObjectBaseAddressModifyEnable
, 0, 0) |
369 __gen_combine_address(data
, &dw
[4], values
->IndirectObjectBaseAddress
, dw4
);
371 uint32_t dw_InstructionMemoryObjectControlState
;
372 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data
, &dw_InstructionMemoryObjectControlState
, &values
->InstructionMemoryObjectControlState
);
374 __gen_field(dw_InstructionMemoryObjectControlState
, 8, 11) |
375 __gen_field(values
->InstructionBaseAddressModifyEnable
, 0, 0) |
379 __gen_combine_address(data
, &dw
[5], values
->InstructionBaseAddress
, dw5
);
382 __gen_field(values
->GeneralStateAccessUpperBoundModifyEnable
, 0, 0) |
386 __gen_combine_address(data
, &dw
[6], values
->GeneralStateAccessUpperBound
, dw6
);
389 __gen_field(values
->DynamicStateAccessUpperBoundModifyEnable
, 0, 0) |
393 __gen_combine_address(data
, &dw
[7], values
->DynamicStateAccessUpperBound
, dw7
);
396 __gen_field(values
->IndirectObjectAccessUpperBoundModifyEnable
, 0, 0) |
400 __gen_combine_address(data
, &dw
[8], values
->IndirectObjectAccessUpperBound
, dw8
);
403 __gen_field(values
->InstructionAccessUpperBoundModifyEnable
, 0, 0) |
407 __gen_combine_address(data
, &dw
[9], values
->InstructionAccessUpperBound
, dw9
);
411 #define GEN75_STATE_PREFETCH_length 0x00000002
412 #define GEN75_STATE_PREFETCH_length_bias 0x00000002
413 #define GEN75_STATE_PREFETCH_header \
415 .CommandSubType = 0, \
416 ._3DCommandOpcode = 0, \
417 ._3DCommandSubOpcode = 3, \
420 struct GEN75_STATE_PREFETCH
{
421 uint32_t CommandType
;
422 uint32_t CommandSubType
;
423 uint32_t _3DCommandOpcode
;
424 uint32_t _3DCommandSubOpcode
;
425 uint32_t DwordLength
;
426 __gen_address_type PrefetchPointer
;
427 uint32_t PrefetchCount
;
431 GEN75_STATE_PREFETCH_pack(__gen_user_data
*data
, void * restrict dst
,
432 const struct GEN75_STATE_PREFETCH
* restrict values
)
434 uint32_t *dw
= (uint32_t * restrict
) dst
;
437 __gen_field(values
->CommandType
, 29, 31) |
438 __gen_field(values
->CommandSubType
, 27, 28) |
439 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
440 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
441 __gen_field(values
->DwordLength
, 0, 7) |
445 __gen_field(values
->PrefetchCount
, 0, 2) |
449 __gen_combine_address(data
, &dw
[1], values
->PrefetchPointer
, dw1
);
453 #define GEN75_STATE_SIP_length 0x00000002
454 #define GEN75_STATE_SIP_length_bias 0x00000002
455 #define GEN75_STATE_SIP_header \
457 .CommandSubType = 0, \
458 ._3DCommandOpcode = 1, \
459 ._3DCommandSubOpcode = 2, \
462 struct GEN75_STATE_SIP
{
463 uint32_t CommandType
;
464 uint32_t CommandSubType
;
465 uint32_t _3DCommandOpcode
;
466 uint32_t _3DCommandSubOpcode
;
467 uint32_t DwordLength
;
468 uint32_t SystemInstructionPointer
;
472 GEN75_STATE_SIP_pack(__gen_user_data
*data
, void * restrict dst
,
473 const struct GEN75_STATE_SIP
* restrict values
)
475 uint32_t *dw
= (uint32_t * restrict
) dst
;
478 __gen_field(values
->CommandType
, 29, 31) |
479 __gen_field(values
->CommandSubType
, 27, 28) |
480 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
481 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
482 __gen_field(values
->DwordLength
, 0, 7) |
486 __gen_offset(values
->SystemInstructionPointer
, 4, 31) |
491 #define GEN75_SWTESS_BASE_ADDRESS_length 0x00000002
492 #define GEN75_SWTESS_BASE_ADDRESS_length_bias 0x00000002
493 #define GEN75_SWTESS_BASE_ADDRESS_header \
495 .CommandSubType = 0, \
496 ._3DCommandOpcode = 1, \
497 ._3DCommandSubOpcode = 3, \
500 struct GEN75_SWTESS_BASE_ADDRESS
{
501 uint32_t CommandType
;
502 uint32_t CommandSubType
;
503 uint32_t _3DCommandOpcode
;
504 uint32_t _3DCommandSubOpcode
;
505 uint32_t DwordLength
;
506 __gen_address_type SWTessellationBaseAddress
;
507 struct GEN75_MEMORY_OBJECT_CONTROL_STATE SWTessellationMemoryObjectControlState
;
511 GEN75_SWTESS_BASE_ADDRESS_pack(__gen_user_data
*data
, void * restrict dst
,
512 const struct GEN75_SWTESS_BASE_ADDRESS
* restrict values
)
514 uint32_t *dw
= (uint32_t * restrict
) dst
;
517 __gen_field(values
->CommandType
, 29, 31) |
518 __gen_field(values
->CommandSubType
, 27, 28) |
519 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
520 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
521 __gen_field(values
->DwordLength
, 0, 7) |
524 uint32_t dw_SWTessellationMemoryObjectControlState
;
525 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data
, &dw_SWTessellationMemoryObjectControlState
, &values
->SWTessellationMemoryObjectControlState
);
527 __gen_field(dw_SWTessellationMemoryObjectControlState
, 8, 11) |
531 __gen_combine_address(data
, &dw
[1], values
->SWTessellationBaseAddress
, dw1
);
535 #define GEN75_3DPRIMITIVE_length 0x00000007
536 #define GEN75_3DPRIMITIVE_length_bias 0x00000002
537 #define GEN75_3DPRIMITIVE_header \
539 .CommandSubType = 3, \
540 ._3DCommandOpcode = 3, \
541 ._3DCommandSubOpcode = 0, \
544 struct GEN75_3DPRIMITIVE
{
545 uint32_t CommandType
;
546 uint32_t CommandSubType
;
547 uint32_t _3DCommandOpcode
;
548 uint32_t _3DCommandSubOpcode
;
549 uint32_t IndirectParameterEnable
;
550 uint32_t UAVCoherencyRequired
;
551 uint32_t PredicateEnable
;
552 uint32_t DwordLength
;
553 uint32_t EndOffsetEnable
;
556 uint32_t VertexAccessType
;
557 uint32_t PrimitiveTopologyType
;
558 uint32_t VertexCountPerInstance
;
559 uint32_t StartVertexLocation
;
560 uint32_t InstanceCount
;
561 uint32_t StartInstanceLocation
;
562 uint32_t BaseVertexLocation
;
566 GEN75_3DPRIMITIVE_pack(__gen_user_data
*data
, void * restrict dst
,
567 const struct GEN75_3DPRIMITIVE
* restrict values
)
569 uint32_t *dw
= (uint32_t * restrict
) dst
;
572 __gen_field(values
->CommandType
, 29, 31) |
573 __gen_field(values
->CommandSubType
, 27, 28) |
574 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
575 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
576 __gen_field(values
->IndirectParameterEnable
, 10, 10) |
577 __gen_field(values
->UAVCoherencyRequired
, 9, 9) |
578 __gen_field(values
->PredicateEnable
, 8, 8) |
579 __gen_field(values
->DwordLength
, 0, 7) |
583 __gen_field(values
->EndOffsetEnable
, 9, 9) |
584 __gen_field(values
->VertexAccessType
, 8, 8) |
585 __gen_field(values
->PrimitiveTopologyType
, 0, 5) |
589 __gen_field(values
->VertexCountPerInstance
, 0, 31) |
593 __gen_field(values
->StartVertexLocation
, 0, 31) |
597 __gen_field(values
->InstanceCount
, 0, 31) |
601 __gen_field(values
->StartInstanceLocation
, 0, 31) |
605 __gen_field(values
->BaseVertexLocation
, 0, 31) |
610 #define GEN75_3DSTATE_AA_LINE_PARAMETERS_length 0x00000003
611 #define GEN75_3DSTATE_AA_LINE_PARAMETERS_length_bias 0x00000002
612 #define GEN75_3DSTATE_AA_LINE_PARAMETERS_header \
614 .CommandSubType = 3, \
615 ._3DCommandOpcode = 1, \
616 ._3DCommandSubOpcode = 10, \
619 struct GEN75_3DSTATE_AA_LINE_PARAMETERS
{
620 uint32_t CommandType
;
621 uint32_t CommandSubType
;
622 uint32_t _3DCommandOpcode
;
623 uint32_t _3DCommandSubOpcode
;
624 uint32_t DwordLength
;
625 float AACoverageBias
;
626 float AACoverageSlope
;
627 float AACoverageEndCapBias
;
628 float AACoverageEndCapSlope
;
632 GEN75_3DSTATE_AA_LINE_PARAMETERS_pack(__gen_user_data
*data
, void * restrict dst
,
633 const struct GEN75_3DSTATE_AA_LINE_PARAMETERS
* restrict values
)
635 uint32_t *dw
= (uint32_t * restrict
) dst
;
638 __gen_field(values
->CommandType
, 29, 31) |
639 __gen_field(values
->CommandSubType
, 27, 28) |
640 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
641 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
642 __gen_field(values
->DwordLength
, 0, 7) |
646 __gen_field(values
->AACoverageBias
* (1 << 8), 16, 23) |
647 __gen_field(values
->AACoverageSlope
* (1 << 8), 0, 7) |
651 __gen_field(values
->AACoverageEndCapBias
* (1 << 8), 16, 23) |
652 __gen_field(values
->AACoverageEndCapSlope
* (1 << 8), 0, 7) |
657 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_length_bias 0x00000002
658 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_header\
660 .CommandSubType = 3, \
661 ._3DCommandOpcode = 0, \
662 ._3DCommandSubOpcode = 70
664 struct GEN75_BINDING_TABLE_EDIT_ENTRY
{
665 uint32_t BindingTableIndex
;
666 uint32_t SurfaceStatePointer
;
670 GEN75_BINDING_TABLE_EDIT_ENTRY_pack(__gen_user_data
*data
, void * restrict dst
,
671 const struct GEN75_BINDING_TABLE_EDIT_ENTRY
* restrict values
)
673 uint32_t *dw
= (uint32_t * restrict
) dst
;
676 __gen_field(values
->BindingTableIndex
, 16, 23) |
677 __gen_offset(values
->SurfaceStatePointer
, 0, 15) |
682 struct GEN75_3DSTATE_BINDING_TABLE_EDIT_DS
{
683 uint32_t CommandType
;
684 uint32_t CommandSubType
;
685 uint32_t _3DCommandOpcode
;
686 uint32_t _3DCommandSubOpcode
;
687 uint32_t DwordLength
;
688 uint32_t BindingTableBlockClear
;
692 uint32_t BindingTableEditTarget
;
693 /* variable length fields follow */
697 GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_pack(__gen_user_data
*data
, void * restrict dst
,
698 const struct GEN75_3DSTATE_BINDING_TABLE_EDIT_DS
* restrict values
)
700 uint32_t *dw
= (uint32_t * restrict
) dst
;
703 __gen_field(values
->CommandType
, 29, 31) |
704 __gen_field(values
->CommandSubType
, 27, 28) |
705 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
706 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
707 __gen_field(values
->DwordLength
, 0, 8) |
711 __gen_field(values
->BindingTableBlockClear
, 16, 31) |
712 __gen_field(values
->BindingTableEditTarget
, 0, 1) |
715 /* variable length fields follow */
718 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_length_bias 0x00000002
719 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_header\
721 .CommandSubType = 3, \
722 ._3DCommandOpcode = 0, \
723 ._3DCommandSubOpcode = 68
725 struct GEN75_3DSTATE_BINDING_TABLE_EDIT_GS
{
726 uint32_t CommandType
;
727 uint32_t CommandSubType
;
728 uint32_t _3DCommandOpcode
;
729 uint32_t _3DCommandSubOpcode
;
730 uint32_t DwordLength
;
731 uint32_t BindingTableBlockClear
;
735 uint32_t BindingTableEditTarget
;
736 /* variable length fields follow */
740 GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_pack(__gen_user_data
*data
, void * restrict dst
,
741 const struct GEN75_3DSTATE_BINDING_TABLE_EDIT_GS
* restrict values
)
743 uint32_t *dw
= (uint32_t * restrict
) dst
;
746 __gen_field(values
->CommandType
, 29, 31) |
747 __gen_field(values
->CommandSubType
, 27, 28) |
748 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
749 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
750 __gen_field(values
->DwordLength
, 0, 8) |
754 __gen_field(values
->BindingTableBlockClear
, 16, 31) |
755 __gen_field(values
->BindingTableEditTarget
, 0, 1) |
758 /* variable length fields follow */
761 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_length_bias 0x00000002
762 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_header\
764 .CommandSubType = 3, \
765 ._3DCommandOpcode = 0, \
766 ._3DCommandSubOpcode = 69
768 struct GEN75_3DSTATE_BINDING_TABLE_EDIT_HS
{
769 uint32_t CommandType
;
770 uint32_t CommandSubType
;
771 uint32_t _3DCommandOpcode
;
772 uint32_t _3DCommandSubOpcode
;
773 uint32_t DwordLength
;
774 uint32_t BindingTableBlockClear
;
778 uint32_t BindingTableEditTarget
;
779 /* variable length fields follow */
783 GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_pack(__gen_user_data
*data
, void * restrict dst
,
784 const struct GEN75_3DSTATE_BINDING_TABLE_EDIT_HS
* restrict values
)
786 uint32_t *dw
= (uint32_t * restrict
) dst
;
789 __gen_field(values
->CommandType
, 29, 31) |
790 __gen_field(values
->CommandSubType
, 27, 28) |
791 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
792 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
793 __gen_field(values
->DwordLength
, 0, 8) |
797 __gen_field(values
->BindingTableBlockClear
, 16, 31) |
798 __gen_field(values
->BindingTableEditTarget
, 0, 1) |
801 /* variable length fields follow */
804 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_length_bias 0x00000002
805 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_header\
807 .CommandSubType = 3, \
808 ._3DCommandOpcode = 0, \
809 ._3DCommandSubOpcode = 71
811 struct GEN75_3DSTATE_BINDING_TABLE_EDIT_PS
{
812 uint32_t CommandType
;
813 uint32_t CommandSubType
;
814 uint32_t _3DCommandOpcode
;
815 uint32_t _3DCommandSubOpcode
;
816 uint32_t DwordLength
;
817 uint32_t BindingTableBlockClear
;
821 uint32_t BindingTableEditTarget
;
822 /* variable length fields follow */
826 GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_pack(__gen_user_data
*data
, void * restrict dst
,
827 const struct GEN75_3DSTATE_BINDING_TABLE_EDIT_PS
* restrict values
)
829 uint32_t *dw
= (uint32_t * restrict
) dst
;
832 __gen_field(values
->CommandType
, 29, 31) |
833 __gen_field(values
->CommandSubType
, 27, 28) |
834 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
835 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
836 __gen_field(values
->DwordLength
, 0, 8) |
840 __gen_field(values
->BindingTableBlockClear
, 16, 31) |
841 __gen_field(values
->BindingTableEditTarget
, 0, 1) |
844 /* variable length fields follow */
847 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_length_bias 0x00000002
848 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_header\
850 .CommandSubType = 3, \
851 ._3DCommandOpcode = 0, \
852 ._3DCommandSubOpcode = 67
854 struct GEN75_3DSTATE_BINDING_TABLE_EDIT_VS
{
855 uint32_t CommandType
;
856 uint32_t CommandSubType
;
857 uint32_t _3DCommandOpcode
;
858 uint32_t _3DCommandSubOpcode
;
859 uint32_t DwordLength
;
860 uint32_t BindingTableBlockClear
;
864 uint32_t BindingTableEditTarget
;
865 /* variable length fields follow */
869 GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_pack(__gen_user_data
*data
, void * restrict dst
,
870 const struct GEN75_3DSTATE_BINDING_TABLE_EDIT_VS
* restrict values
)
872 uint32_t *dw
= (uint32_t * restrict
) dst
;
875 __gen_field(values
->CommandType
, 29, 31) |
876 __gen_field(values
->CommandSubType
, 27, 28) |
877 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
878 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
879 __gen_field(values
->DwordLength
, 0, 8) |
883 __gen_field(values
->BindingTableBlockClear
, 16, 31) |
884 __gen_field(values
->BindingTableEditTarget
, 0, 1) |
887 /* variable length fields follow */
890 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_length 0x00000002
891 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_length_bias 0x00000002
892 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_header\
894 .CommandSubType = 3, \
895 ._3DCommandOpcode = 0, \
896 ._3DCommandSubOpcode = 40, \
899 struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS
{
900 uint32_t CommandType
;
901 uint32_t CommandSubType
;
902 uint32_t _3DCommandOpcode
;
903 uint32_t _3DCommandSubOpcode
;
904 uint32_t DwordLength
;
905 uint32_t PointertoDSBindingTable
;
909 GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_pack(__gen_user_data
*data
, void * restrict dst
,
910 const struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS
* restrict values
)
912 uint32_t *dw
= (uint32_t * restrict
) dst
;
915 __gen_field(values
->CommandType
, 29, 31) |
916 __gen_field(values
->CommandSubType
, 27, 28) |
917 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
918 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
919 __gen_field(values
->DwordLength
, 0, 7) |
923 __gen_offset(values
->PointertoDSBindingTable
, 5, 15) |
928 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_length 0x00000002
929 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_length_bias 0x00000002
930 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_header\
932 .CommandSubType = 3, \
933 ._3DCommandOpcode = 0, \
934 ._3DCommandSubOpcode = 41, \
937 struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS
{
938 uint32_t CommandType
;
939 uint32_t CommandSubType
;
940 uint32_t _3DCommandOpcode
;
941 uint32_t _3DCommandSubOpcode
;
942 uint32_t DwordLength
;
943 uint32_t PointertoGSBindingTable
;
947 GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_pack(__gen_user_data
*data
, void * restrict dst
,
948 const struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS
* restrict values
)
950 uint32_t *dw
= (uint32_t * restrict
) dst
;
953 __gen_field(values
->CommandType
, 29, 31) |
954 __gen_field(values
->CommandSubType
, 27, 28) |
955 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
956 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
957 __gen_field(values
->DwordLength
, 0, 7) |
961 __gen_offset(values
->PointertoGSBindingTable
, 5, 15) |
966 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_length 0x00000002
967 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_length_bias 0x00000002
968 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_header\
970 .CommandSubType = 3, \
971 ._3DCommandOpcode = 0, \
972 ._3DCommandSubOpcode = 39, \
975 struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS
{
976 uint32_t CommandType
;
977 uint32_t CommandSubType
;
978 uint32_t _3DCommandOpcode
;
979 uint32_t _3DCommandSubOpcode
;
980 uint32_t DwordLength
;
981 uint32_t PointertoHSBindingTable
;
985 GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_pack(__gen_user_data
*data
, void * restrict dst
,
986 const struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS
* restrict values
)
988 uint32_t *dw
= (uint32_t * restrict
) dst
;
991 __gen_field(values
->CommandType
, 29, 31) |
992 __gen_field(values
->CommandSubType
, 27, 28) |
993 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
994 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
995 __gen_field(values
->DwordLength
, 0, 7) |
999 __gen_offset(values
->PointertoHSBindingTable
, 5, 15) |
1004 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_length 0x00000002
1005 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_length_bias 0x00000002
1006 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_header\
1008 .CommandSubType = 3, \
1009 ._3DCommandOpcode = 0, \
1010 ._3DCommandSubOpcode = 42, \
1013 struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS
{
1014 uint32_t CommandType
;
1015 uint32_t CommandSubType
;
1016 uint32_t _3DCommandOpcode
;
1017 uint32_t _3DCommandSubOpcode
;
1018 uint32_t DwordLength
;
1019 uint32_t PointertoPSBindingTable
;
1023 GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_pack(__gen_user_data
*data
, void * restrict dst
,
1024 const struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS
* restrict values
)
1026 uint32_t *dw
= (uint32_t * restrict
) dst
;
1029 __gen_field(values
->CommandType
, 29, 31) |
1030 __gen_field(values
->CommandSubType
, 27, 28) |
1031 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
1032 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
1033 __gen_field(values
->DwordLength
, 0, 7) |
1037 __gen_offset(values
->PointertoPSBindingTable
, 5, 15) |
1042 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_length 0x00000002
1043 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_length_bias 0x00000002
1044 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_header\
1046 .CommandSubType = 3, \
1047 ._3DCommandOpcode = 0, \
1048 ._3DCommandSubOpcode = 38, \
1051 struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS
{
1052 uint32_t CommandType
;
1053 uint32_t CommandSubType
;
1054 uint32_t _3DCommandOpcode
;
1055 uint32_t _3DCommandSubOpcode
;
1056 uint32_t DwordLength
;
1057 uint32_t PointertoVSBindingTable
;
1061 GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_pack(__gen_user_data
*data
, void * restrict dst
,
1062 const struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS
* restrict values
)
1064 uint32_t *dw
= (uint32_t * restrict
) dst
;
1067 __gen_field(values
->CommandType
, 29, 31) |
1068 __gen_field(values
->CommandSubType
, 27, 28) |
1069 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
1070 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
1071 __gen_field(values
->DwordLength
, 0, 7) |
1075 __gen_offset(values
->PointertoVSBindingTable
, 5, 15) |
1080 #define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_length 0x00000003
1081 #define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_length_bias 0x00000002
1082 #define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_header\
1084 .CommandSubType = 3, \
1085 ._3DCommandOpcode = 1, \
1086 ._3DCommandSubOpcode = 25, \
1089 struct GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC
{
1090 uint32_t CommandType
;
1091 uint32_t CommandSubType
;
1092 uint32_t _3DCommandOpcode
;
1093 uint32_t _3DCommandSubOpcode
;
1094 uint32_t DwordLength
;
1095 __gen_address_type BindingTablePoolBaseAddress
;
1096 uint32_t BindingTablePoolEnable
;
1097 struct GEN75_MEMORY_OBJECT_CONTROL_STATE SurfaceObjectControlState
;
1098 __gen_address_type BindingTablePoolUpperBound
;
1102 GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_pack(__gen_user_data
*data
, void * restrict dst
,
1103 const struct GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC
* restrict values
)
1105 uint32_t *dw
= (uint32_t * restrict
) dst
;
1108 __gen_field(values
->CommandType
, 29, 31) |
1109 __gen_field(values
->CommandSubType
, 27, 28) |
1110 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
1111 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
1112 __gen_field(values
->DwordLength
, 0, 7) |
1115 uint32_t dw_SurfaceObjectControlState
;
1116 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data
, &dw_SurfaceObjectControlState
, &values
->SurfaceObjectControlState
);
1118 __gen_field(values
->BindingTablePoolEnable
, 11, 11) |
1119 __gen_field(dw_SurfaceObjectControlState
, 7, 10) |
1123 __gen_combine_address(data
, &dw
[1], values
->BindingTablePoolBaseAddress
, dw1
);
1129 __gen_combine_address(data
, &dw
[2], values
->BindingTablePoolUpperBound
, dw2
);
1133 #define GEN75_3DSTATE_BLEND_STATE_POINTERS_length 0x00000002
1134 #define GEN75_3DSTATE_BLEND_STATE_POINTERS_length_bias 0x00000002
1135 #define GEN75_3DSTATE_BLEND_STATE_POINTERS_header\
1137 .CommandSubType = 3, \
1138 ._3DCommandOpcode = 0, \
1139 ._3DCommandSubOpcode = 36, \
1142 struct GEN75_3DSTATE_BLEND_STATE_POINTERS
{
1143 uint32_t CommandType
;
1144 uint32_t CommandSubType
;
1145 uint32_t _3DCommandOpcode
;
1146 uint32_t _3DCommandSubOpcode
;
1147 uint32_t DwordLength
;
1148 uint32_t BlendStatePointer
;
1152 GEN75_3DSTATE_BLEND_STATE_POINTERS_pack(__gen_user_data
*data
, void * restrict dst
,
1153 const struct GEN75_3DSTATE_BLEND_STATE_POINTERS
* restrict values
)
1155 uint32_t *dw
= (uint32_t * restrict
) dst
;
1158 __gen_field(values
->CommandType
, 29, 31) |
1159 __gen_field(values
->CommandSubType
, 27, 28) |
1160 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
1161 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
1162 __gen_field(values
->DwordLength
, 0, 7) |
1166 __gen_offset(values
->BlendStatePointer
, 6, 31) |
1172 #define GEN75_3DSTATE_CC_STATE_POINTERS_length 0x00000002
1173 #define GEN75_3DSTATE_CC_STATE_POINTERS_length_bias 0x00000002
1174 #define GEN75_3DSTATE_CC_STATE_POINTERS_header \
1176 .CommandSubType = 3, \
1177 ._3DCommandOpcode = 0, \
1178 ._3DCommandSubOpcode = 14, \
1181 struct GEN75_3DSTATE_CC_STATE_POINTERS
{
1182 uint32_t CommandType
;
1183 uint32_t CommandSubType
;
1184 uint32_t _3DCommandOpcode
;
1185 uint32_t _3DCommandSubOpcode
;
1186 uint32_t DwordLength
;
1187 uint32_t ColorCalcStatePointer
;
1191 GEN75_3DSTATE_CC_STATE_POINTERS_pack(__gen_user_data
*data
, void * restrict dst
,
1192 const struct GEN75_3DSTATE_CC_STATE_POINTERS
* restrict values
)
1194 uint32_t *dw
= (uint32_t * restrict
) dst
;
1197 __gen_field(values
->CommandType
, 29, 31) |
1198 __gen_field(values
->CommandSubType
, 27, 28) |
1199 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
1200 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
1201 __gen_field(values
->DwordLength
, 0, 7) |
1205 __gen_offset(values
->ColorCalcStatePointer
, 6, 31) |
1211 #define GEN75_3DSTATE_CHROMA_KEY_length 0x00000004
1212 #define GEN75_3DSTATE_CHROMA_KEY_length_bias 0x00000002
1213 #define GEN75_3DSTATE_CHROMA_KEY_header \
1215 .CommandSubType = 3, \
1216 ._3DCommandOpcode = 1, \
1217 ._3DCommandSubOpcode = 4, \
1220 struct GEN75_3DSTATE_CHROMA_KEY
{
1221 uint32_t CommandType
;
1222 uint32_t CommandSubType
;
1223 uint32_t _3DCommandOpcode
;
1224 uint32_t _3DCommandSubOpcode
;
1225 uint32_t DwordLength
;
1226 uint32_t ChromaKeyTableIndex
;
1227 uint32_t ChromaKeyLowValue
;
1228 uint32_t ChromaKeyHighValue
;
1232 GEN75_3DSTATE_CHROMA_KEY_pack(__gen_user_data
*data
, void * restrict dst
,
1233 const struct GEN75_3DSTATE_CHROMA_KEY
* restrict values
)
1235 uint32_t *dw
= (uint32_t * restrict
) dst
;
1238 __gen_field(values
->CommandType
, 29, 31) |
1239 __gen_field(values
->CommandSubType
, 27, 28) |
1240 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
1241 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
1242 __gen_field(values
->DwordLength
, 0, 7) |
1246 __gen_field(values
->ChromaKeyTableIndex
, 30, 31) |
1250 __gen_field(values
->ChromaKeyLowValue
, 0, 31) |
1254 __gen_field(values
->ChromaKeyHighValue
, 0, 31) |
1259 #define GEN75_3DSTATE_CLEAR_PARAMS_length 0x00000003
1260 #define GEN75_3DSTATE_CLEAR_PARAMS_length_bias 0x00000002
1261 #define GEN75_3DSTATE_CLEAR_PARAMS_header \
1263 .CommandSubType = 3, \
1264 ._3DCommandOpcode = 0, \
1265 ._3DCommandSubOpcode = 4, \
1268 struct GEN75_3DSTATE_CLEAR_PARAMS
{
1269 uint32_t CommandType
;
1270 uint32_t CommandSubType
;
1271 uint32_t _3DCommandOpcode
;
1272 uint32_t _3DCommandSubOpcode
;
1273 uint32_t DwordLength
;
1274 uint32_t DepthClearValue
;
1275 uint32_t DepthClearValueValid
;
1279 GEN75_3DSTATE_CLEAR_PARAMS_pack(__gen_user_data
*data
, void * restrict dst
,
1280 const struct GEN75_3DSTATE_CLEAR_PARAMS
* restrict values
)
1282 uint32_t *dw
= (uint32_t * restrict
) dst
;
1285 __gen_field(values
->CommandType
, 29, 31) |
1286 __gen_field(values
->CommandSubType
, 27, 28) |
1287 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
1288 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
1289 __gen_field(values
->DwordLength
, 0, 7) |
1293 __gen_field(values
->DepthClearValue
, 0, 31) |
1297 __gen_field(values
->DepthClearValueValid
, 0, 0) |
1302 #define GEN75_3DSTATE_CLIP_length 0x00000004
1303 #define GEN75_3DSTATE_CLIP_length_bias 0x00000002
1304 #define GEN75_3DSTATE_CLIP_header \
1306 .CommandSubType = 3, \
1307 ._3DCommandOpcode = 0, \
1308 ._3DCommandSubOpcode = 18, \
1311 struct GEN75_3DSTATE_CLIP
{
1312 uint32_t CommandType
;
1313 uint32_t CommandSubType
;
1314 uint32_t _3DCommandOpcode
;
1315 uint32_t _3DCommandSubOpcode
;
1316 uint32_t DwordLength
;
1317 uint32_t FrontWinding
;
1318 uint32_t VertexSubPixelPrecisionSelect
;
1319 uint32_t EarlyCullEnable
;
1320 #define CULLMODE_BOTH 0
1321 #define CULLMODE_NONE 1
1322 #define CULLMODE_FRONT 2
1323 #define CULLMODE_BACK 3
1325 uint32_t ClipperStatisticsEnable
;
1326 uint32_t UserClipDistanceCullTestEnableBitmask
;
1327 uint32_t ClipEnable
;
1328 #define APIMODE_OGL 0
1330 uint32_t ViewportXYClipTestEnable
;
1331 uint32_t ViewportZClipTestEnable
;
1332 uint32_t GuardbandClipTestEnable
;
1333 uint32_t UserClipDistanceClipTestEnableBitmask
;
1334 #define CLIPMODE_NORMAL 0
1335 #define CLIPMODE_REJECT_ALL 3
1336 #define CLIPMODE_ACCEPT_ALL 4
1338 uint32_t PerspectiveDivideDisable
;
1339 uint32_t NonPerspectiveBarycentricEnable
;
1343 uint32_t TriangleStripListProvokingVertexSelect
;
1346 uint32_t LineStripListProvokingVertexSelect
;
1350 uint32_t TriangleFanProvokingVertexSelect
;
1351 float MinimumPointWidth
;
1352 float MaximumPointWidth
;
1353 uint32_t ForceZeroRTAIndexEnable
;
1354 uint32_t MaximumVPIndex
;
1358 GEN75_3DSTATE_CLIP_pack(__gen_user_data
*data
, void * restrict dst
,
1359 const struct GEN75_3DSTATE_CLIP
* restrict values
)
1361 uint32_t *dw
= (uint32_t * restrict
) dst
;
1364 __gen_field(values
->CommandType
, 29, 31) |
1365 __gen_field(values
->CommandSubType
, 27, 28) |
1366 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
1367 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
1368 __gen_field(values
->DwordLength
, 0, 7) |
1372 __gen_field(values
->FrontWinding
, 20, 20) |
1373 __gen_field(values
->VertexSubPixelPrecisionSelect
, 19, 19) |
1374 __gen_field(values
->EarlyCullEnable
, 18, 18) |
1375 __gen_field(values
->CullMode
, 16, 17) |
1376 __gen_field(values
->ClipperStatisticsEnable
, 10, 10) |
1377 __gen_field(values
->UserClipDistanceCullTestEnableBitmask
, 0, 7) |
1381 __gen_field(values
->ClipEnable
, 31, 31) |
1382 __gen_field(values
->APIMode
, 30, 30) |
1383 __gen_field(values
->ViewportXYClipTestEnable
, 28, 28) |
1384 __gen_field(values
->ViewportZClipTestEnable
, 27, 27) |
1385 __gen_field(values
->GuardbandClipTestEnable
, 26, 26) |
1386 __gen_field(values
->UserClipDistanceClipTestEnableBitmask
, 16, 23) |
1387 __gen_field(values
->ClipMode
, 13, 15) |
1388 __gen_field(values
->PerspectiveDivideDisable
, 9, 9) |
1389 __gen_field(values
->NonPerspectiveBarycentricEnable
, 8, 8) |
1390 __gen_field(values
->TriangleStripListProvokingVertexSelect
, 4, 5) |
1391 __gen_field(values
->LineStripListProvokingVertexSelect
, 2, 3) |
1392 __gen_field(values
->TriangleFanProvokingVertexSelect
, 0, 1) |
1396 __gen_field(values
->MinimumPointWidth
* (1 << 3), 17, 27) |
1397 __gen_field(values
->MaximumPointWidth
* (1 << 3), 6, 16) |
1398 __gen_field(values
->ForceZeroRTAIndexEnable
, 5, 5) |
1399 __gen_field(values
->MaximumVPIndex
, 0, 3) |
1404 #define GEN75_3DSTATE_CONSTANT_DS_length 0x00000007
1405 #define GEN75_3DSTATE_CONSTANT_DS_length_bias 0x00000002
1406 #define GEN75_3DSTATE_CONSTANT_DS_header \
1408 .CommandSubType = 3, \
1409 ._3DCommandOpcode = 0, \
1410 ._3DCommandSubOpcode = 26, \
1413 struct GEN75_3DSTATE_CONSTANT_BODY
{
1414 uint32_t ConstantBuffer1ReadLength
;
1415 uint32_t ConstantBuffer0ReadLength
;
1416 uint32_t ConstantBuffer3ReadLength
;
1417 uint32_t ConstantBuffer2ReadLength
;
1418 __gen_address_type PointerToConstantBuffer0
;
1419 struct GEN75_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState
;
1420 __gen_address_type PointerToConstantBuffer1
;
1421 __gen_address_type PointerToConstantBuffer2
;
1422 __gen_address_type PointerToConstantBuffer3
;
1426 GEN75_3DSTATE_CONSTANT_BODY_pack(__gen_user_data
*data
, void * restrict dst
,
1427 const struct GEN75_3DSTATE_CONSTANT_BODY
* restrict values
)
1429 uint32_t *dw
= (uint32_t * restrict
) dst
;
1432 __gen_field(values
->ConstantBuffer1ReadLength
, 16, 31) |
1433 __gen_field(values
->ConstantBuffer0ReadLength
, 0, 15) |
1437 __gen_field(values
->ConstantBuffer3ReadLength
, 16, 31) |
1438 __gen_field(values
->ConstantBuffer2ReadLength
, 0, 15) |
1441 uint32_t dw_ConstantBufferObjectControlState
;
1442 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data
, &dw_ConstantBufferObjectControlState
, &values
->ConstantBufferObjectControlState
);
1444 __gen_field(dw_ConstantBufferObjectControlState
, 0, 4) |
1448 __gen_combine_address(data
, &dw
[2], values
->PointerToConstantBuffer0
, dw2
);
1454 __gen_combine_address(data
, &dw
[3], values
->PointerToConstantBuffer1
, dw3
);
1460 __gen_combine_address(data
, &dw
[4], values
->PointerToConstantBuffer2
, dw4
);
1466 __gen_combine_address(data
, &dw
[5], values
->PointerToConstantBuffer3
, dw5
);
1470 struct GEN75_3DSTATE_CONSTANT_DS
{
1471 uint32_t CommandType
;
1472 uint32_t CommandSubType
;
1473 uint32_t _3DCommandOpcode
;
1474 uint32_t _3DCommandSubOpcode
;
1475 uint32_t DwordLength
;
1476 struct GEN75_3DSTATE_CONSTANT_BODY ConstantBody
;
1480 GEN75_3DSTATE_CONSTANT_DS_pack(__gen_user_data
*data
, void * restrict dst
,
1481 const struct GEN75_3DSTATE_CONSTANT_DS
* restrict values
)
1483 uint32_t *dw
= (uint32_t * restrict
) dst
;
1486 __gen_field(values
->CommandType
, 29, 31) |
1487 __gen_field(values
->CommandSubType
, 27, 28) |
1488 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
1489 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
1490 __gen_field(values
->DwordLength
, 0, 7) |
1493 GEN75_3DSTATE_CONSTANT_BODY_pack(data
, &dw
[1], &values
->ConstantBody
);
1496 #define GEN75_3DSTATE_CONSTANT_GS_length 0x00000007
1497 #define GEN75_3DSTATE_CONSTANT_GS_length_bias 0x00000002
1498 #define GEN75_3DSTATE_CONSTANT_GS_header \
1500 .CommandSubType = 3, \
1501 ._3DCommandOpcode = 0, \
1502 ._3DCommandSubOpcode = 22, \
1505 struct GEN75_3DSTATE_CONSTANT_GS
{
1506 uint32_t CommandType
;
1507 uint32_t CommandSubType
;
1508 uint32_t _3DCommandOpcode
;
1509 uint32_t _3DCommandSubOpcode
;
1510 uint32_t DwordLength
;
1511 struct GEN75_3DSTATE_CONSTANT_BODY ConstantBody
;
1515 GEN75_3DSTATE_CONSTANT_GS_pack(__gen_user_data
*data
, void * restrict dst
,
1516 const struct GEN75_3DSTATE_CONSTANT_GS
* restrict values
)
1518 uint32_t *dw
= (uint32_t * restrict
) dst
;
1521 __gen_field(values
->CommandType
, 29, 31) |
1522 __gen_field(values
->CommandSubType
, 27, 28) |
1523 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
1524 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
1525 __gen_field(values
->DwordLength
, 0, 7) |
1528 GEN75_3DSTATE_CONSTANT_BODY_pack(data
, &dw
[1], &values
->ConstantBody
);
1531 #define GEN75_3DSTATE_CONSTANT_HS_length 0x00000007
1532 #define GEN75_3DSTATE_CONSTANT_HS_length_bias 0x00000002
1533 #define GEN75_3DSTATE_CONSTANT_HS_header \
1535 .CommandSubType = 3, \
1536 ._3DCommandOpcode = 0, \
1537 ._3DCommandSubOpcode = 25, \
1540 struct GEN75_3DSTATE_CONSTANT_HS
{
1541 uint32_t CommandType
;
1542 uint32_t CommandSubType
;
1543 uint32_t _3DCommandOpcode
;
1544 uint32_t _3DCommandSubOpcode
;
1545 uint32_t DwordLength
;
1546 struct GEN75_3DSTATE_CONSTANT_BODY ConstantBody
;
1550 GEN75_3DSTATE_CONSTANT_HS_pack(__gen_user_data
*data
, void * restrict dst
,
1551 const struct GEN75_3DSTATE_CONSTANT_HS
* restrict values
)
1553 uint32_t *dw
= (uint32_t * restrict
) dst
;
1556 __gen_field(values
->CommandType
, 29, 31) |
1557 __gen_field(values
->CommandSubType
, 27, 28) |
1558 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
1559 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
1560 __gen_field(values
->DwordLength
, 0, 7) |
1563 GEN75_3DSTATE_CONSTANT_BODY_pack(data
, &dw
[1], &values
->ConstantBody
);
1566 #define GEN75_3DSTATE_CONSTANT_PS_length 0x00000007
1567 #define GEN75_3DSTATE_CONSTANT_PS_length_bias 0x00000002
1568 #define GEN75_3DSTATE_CONSTANT_PS_header \
1570 .CommandSubType = 3, \
1571 ._3DCommandOpcode = 0, \
1572 ._3DCommandSubOpcode = 23, \
1575 struct GEN75_3DSTATE_CONSTANT_PS
{
1576 uint32_t CommandType
;
1577 uint32_t CommandSubType
;
1578 uint32_t _3DCommandOpcode
;
1579 uint32_t _3DCommandSubOpcode
;
1580 uint32_t DwordLength
;
1581 struct GEN75_3DSTATE_CONSTANT_BODY ConstantBody
;
1585 GEN75_3DSTATE_CONSTANT_PS_pack(__gen_user_data
*data
, void * restrict dst
,
1586 const struct GEN75_3DSTATE_CONSTANT_PS
* restrict values
)
1588 uint32_t *dw
= (uint32_t * restrict
) dst
;
1591 __gen_field(values
->CommandType
, 29, 31) |
1592 __gen_field(values
->CommandSubType
, 27, 28) |
1593 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
1594 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
1595 __gen_field(values
->DwordLength
, 0, 7) |
1598 GEN75_3DSTATE_CONSTANT_BODY_pack(data
, &dw
[1], &values
->ConstantBody
);
1601 #define GEN75_3DSTATE_CONSTANT_VS_length 0x00000007
1602 #define GEN75_3DSTATE_CONSTANT_VS_length_bias 0x00000002
1603 #define GEN75_3DSTATE_CONSTANT_VS_header \
1605 .CommandSubType = 3, \
1606 ._3DCommandOpcode = 0, \
1607 ._3DCommandSubOpcode = 21, \
1610 struct GEN75_3DSTATE_CONSTANT_VS
{
1611 uint32_t CommandType
;
1612 uint32_t CommandSubType
;
1613 uint32_t _3DCommandOpcode
;
1614 uint32_t _3DCommandSubOpcode
;
1615 uint32_t DwordLength
;
1616 struct GEN75_3DSTATE_CONSTANT_BODY ConstantBody
;
1620 GEN75_3DSTATE_CONSTANT_VS_pack(__gen_user_data
*data
, void * restrict dst
,
1621 const struct GEN75_3DSTATE_CONSTANT_VS
* restrict values
)
1623 uint32_t *dw
= (uint32_t * restrict
) dst
;
1626 __gen_field(values
->CommandType
, 29, 31) |
1627 __gen_field(values
->CommandSubType
, 27, 28) |
1628 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
1629 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
1630 __gen_field(values
->DwordLength
, 0, 7) |
1633 GEN75_3DSTATE_CONSTANT_BODY_pack(data
, &dw
[1], &values
->ConstantBody
);
1636 #define GEN75_3DSTATE_DEPTH_BUFFER_length 0x00000007
1637 #define GEN75_3DSTATE_DEPTH_BUFFER_length_bias 0x00000002
1638 #define GEN75_3DSTATE_DEPTH_BUFFER_header \
1640 .CommandSubType = 3, \
1641 ._3DCommandOpcode = 0, \
1642 ._3DCommandSubOpcode = 5, \
1645 struct GEN75_3DSTATE_DEPTH_BUFFER
{
1646 uint32_t CommandType
;
1647 uint32_t CommandSubType
;
1648 uint32_t _3DCommandOpcode
;
1649 uint32_t _3DCommandSubOpcode
;
1650 uint32_t DwordLength
;
1651 #define SURFTYPE_1D 0
1652 #define SURFTYPE_2D 1
1653 #define SURFTYPE_3D 2
1654 #define SURFTYPE_CUBE 3
1655 #define SURFTYPE_NULL 7
1656 uint32_t SurfaceType
;
1657 uint32_t DepthWriteEnable
;
1658 uint32_t StencilWriteEnable
;
1659 uint32_t HierarchicalDepthBufferEnable
;
1661 #define D24_UNORM_X8_UINT 3
1663 uint32_t SurfaceFormat
;
1664 uint32_t SurfacePitch
;
1665 __gen_address_type SurfaceBaseAddress
;
1669 #define SURFTYPE_CUBEmustbezero 0
1671 uint32_t MinimumArrayElement
;
1672 struct GEN75_MEMORY_OBJECT_CONTROL_STATE DepthBufferObjectControlState
;
1673 uint32_t DepthCoordinateOffsetY
;
1674 uint32_t DepthCoordinateOffsetX
;
1675 uint32_t RenderTargetViewExtent
;
1679 GEN75_3DSTATE_DEPTH_BUFFER_pack(__gen_user_data
*data
, void * restrict dst
,
1680 const struct GEN75_3DSTATE_DEPTH_BUFFER
* restrict values
)
1682 uint32_t *dw
= (uint32_t * restrict
) dst
;
1685 __gen_field(values
->CommandType
, 29, 31) |
1686 __gen_field(values
->CommandSubType
, 27, 28) |
1687 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
1688 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
1689 __gen_field(values
->DwordLength
, 0, 7) |
1693 __gen_field(values
->SurfaceType
, 29, 31) |
1694 __gen_field(values
->DepthWriteEnable
, 28, 28) |
1695 __gen_field(values
->StencilWriteEnable
, 27, 27) |
1696 __gen_field(values
->HierarchicalDepthBufferEnable
, 22, 22) |
1697 __gen_field(values
->SurfaceFormat
, 18, 20) |
1698 __gen_field(values
->SurfacePitch
, 0, 17) |
1705 __gen_combine_address(data
, &dw
[2], values
->SurfaceBaseAddress
, dw2
);
1708 __gen_field(values
->Height
, 18, 31) |
1709 __gen_field(values
->Width
, 4, 17) |
1710 __gen_field(values
->LOD
, 0, 3) |
1713 uint32_t dw_DepthBufferObjectControlState
;
1714 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data
, &dw_DepthBufferObjectControlState
, &values
->DepthBufferObjectControlState
);
1716 __gen_field(values
->Depth
, 21, 31) |
1717 __gen_field(values
->MinimumArrayElement
, 10, 20) |
1718 __gen_field(dw_DepthBufferObjectControlState
, 0, 3) |
1722 __gen_field(values
->DepthCoordinateOffsetY
, 16, 31) |
1723 __gen_field(values
->DepthCoordinateOffsetX
, 0, 15) |
1727 __gen_field(values
->RenderTargetViewExtent
, 21, 31) |
1732 #define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_length 0x00000002
1733 #define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_length_bias 0x00000002
1734 #define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_header\
1736 .CommandSubType = 3, \
1737 ._3DCommandOpcode = 0, \
1738 ._3DCommandSubOpcode = 37, \
1741 struct GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS
{
1742 uint32_t CommandType
;
1743 uint32_t CommandSubType
;
1744 uint32_t _3DCommandOpcode
;
1745 uint32_t _3DCommandSubOpcode
;
1746 uint32_t DwordLength
;
1747 uint32_t PointertoDEPTH_STENCIL_STATE
;
1751 GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_pack(__gen_user_data
*data
, void * restrict dst
,
1752 const struct GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS
* restrict values
)
1754 uint32_t *dw
= (uint32_t * restrict
) dst
;
1757 __gen_field(values
->CommandType
, 29, 31) |
1758 __gen_field(values
->CommandSubType
, 27, 28) |
1759 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
1760 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
1761 __gen_field(values
->DwordLength
, 0, 7) |
1765 __gen_offset(values
->PointertoDEPTH_STENCIL_STATE
, 6, 31) |
1771 #define GEN75_3DSTATE_DRAWING_RECTANGLE_length 0x00000004
1772 #define GEN75_3DSTATE_DRAWING_RECTANGLE_length_bias 0x00000002
1773 #define GEN75_3DSTATE_DRAWING_RECTANGLE_header \
1775 .CommandSubType = 3, \
1776 ._3DCommandOpcode = 1, \
1777 ._3DCommandSubOpcode = 0, \
1780 struct GEN75_3DSTATE_DRAWING_RECTANGLE
{
1781 uint32_t CommandType
;
1782 uint32_t CommandSubType
;
1783 uint32_t _3DCommandOpcode
;
1784 uint32_t _3DCommandSubOpcode
;
1786 #define Core0Enabled 1
1787 #define Core1Enabled 2
1788 uint32_t CoreModeSelect
;
1789 uint32_t DwordLength
;
1790 uint32_t ClippedDrawingRectangleYMin
;
1791 uint32_t ClippedDrawingRectangleXMin
;
1792 uint32_t ClippedDrawingRectangleYMax
;
1793 uint32_t ClippedDrawingRectangleXMax
;
1794 uint32_t DrawingRectangleOriginY
;
1795 uint32_t DrawingRectangleOriginX
;
1799 GEN75_3DSTATE_DRAWING_RECTANGLE_pack(__gen_user_data
*data
, void * restrict dst
,
1800 const struct GEN75_3DSTATE_DRAWING_RECTANGLE
* restrict values
)
1802 uint32_t *dw
= (uint32_t * restrict
) dst
;
1805 __gen_field(values
->CommandType
, 29, 31) |
1806 __gen_field(values
->CommandSubType
, 27, 28) |
1807 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
1808 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
1809 __gen_field(values
->CoreModeSelect
, 14, 15) |
1810 __gen_field(values
->DwordLength
, 0, 7) |
1814 __gen_field(values
->ClippedDrawingRectangleYMin
, 16, 31) |
1815 __gen_field(values
->ClippedDrawingRectangleXMin
, 0, 15) |
1819 __gen_field(values
->ClippedDrawingRectangleYMax
, 16, 31) |
1820 __gen_field(values
->ClippedDrawingRectangleXMax
, 0, 15) |
1824 __gen_field(values
->DrawingRectangleOriginY
, 16, 31) |
1825 __gen_field(values
->DrawingRectangleOriginX
, 0, 15) |
1830 #define GEN75_3DSTATE_DS_length 0x00000006
1831 #define GEN75_3DSTATE_DS_length_bias 0x00000002
1832 #define GEN75_3DSTATE_DS_header \
1834 .CommandSubType = 3, \
1835 ._3DCommandOpcode = 0, \
1836 ._3DCommandSubOpcode = 29, \
1839 struct GEN75_3DSTATE_DS
{
1840 uint32_t CommandType
;
1841 uint32_t CommandSubType
;
1842 uint32_t _3DCommandOpcode
;
1843 uint32_t _3DCommandSubOpcode
;
1844 uint32_t DwordLength
;
1845 uint32_t KernelStartPointer
;
1848 uint32_t SingleDomainPointDispatch
;
1851 uint32_t VectorMaskEnable
;
1852 #define NoSamplers 0
1853 #define _14Samplers 1
1854 #define _58Samplers 2
1855 #define _912Samplers 3
1856 #define _1316Samplers 4
1857 uint32_t SamplerCount
;
1858 uint32_t BindingTableEntryCount
;
1861 uint32_t ThreadDispatchPriority
;
1864 uint32_t FloatingPointMode
;
1865 uint32_t AccessesUAV
;
1866 uint32_t IllegalOpcodeExceptionEnable
;
1867 uint32_t SoftwareExceptionEnable
;
1868 uint32_t ScratchSpaceBasePointer
;
1869 uint32_t PerThreadScratchSpace
;
1870 uint32_t DispatchGRFStartRegisterForURBData
;
1871 uint32_t PatchURBEntryReadLength
;
1872 uint32_t PatchURBEntryReadOffset
;
1873 uint32_t MaximumNumberofThreads
;
1874 uint32_t StatisticsEnable
;
1875 uint32_t ComputeWCoordinateEnable
;
1876 uint32_t DSCacheDisable
;
1877 uint32_t DSFunctionEnable
;
1881 GEN75_3DSTATE_DS_pack(__gen_user_data
*data
, void * restrict dst
,
1882 const struct GEN75_3DSTATE_DS
* restrict values
)
1884 uint32_t *dw
= (uint32_t * restrict
) dst
;
1887 __gen_field(values
->CommandType
, 29, 31) |
1888 __gen_field(values
->CommandSubType
, 27, 28) |
1889 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
1890 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
1891 __gen_field(values
->DwordLength
, 0, 7) |
1895 __gen_offset(values
->KernelStartPointer
, 6, 31) |
1899 __gen_field(values
->SingleDomainPointDispatch
, 31, 31) |
1900 __gen_field(values
->VectorMaskEnable
, 30, 30) |
1901 __gen_field(values
->SamplerCount
, 27, 29) |
1902 __gen_field(values
->BindingTableEntryCount
, 18, 25) |
1903 __gen_field(values
->ThreadDispatchPriority
, 17, 17) |
1904 __gen_field(values
->FloatingPointMode
, 16, 16) |
1905 __gen_field(values
->AccessesUAV
, 14, 14) |
1906 __gen_field(values
->IllegalOpcodeExceptionEnable
, 13, 13) |
1907 __gen_field(values
->SoftwareExceptionEnable
, 7, 7) |
1911 __gen_offset(values
->ScratchSpaceBasePointer
, 10, 31) |
1912 __gen_field(values
->PerThreadScratchSpace
, 0, 3) |
1916 __gen_field(values
->DispatchGRFStartRegisterForURBData
, 20, 24) |
1917 __gen_field(values
->PatchURBEntryReadLength
, 11, 17) |
1918 __gen_field(values
->PatchURBEntryReadOffset
, 4, 9) |
1922 __gen_field(values
->MaximumNumberofThreads
, 21, 29) |
1923 __gen_field(values
->StatisticsEnable
, 10, 10) |
1924 __gen_field(values
->ComputeWCoordinateEnable
, 2, 2) |
1925 __gen_field(values
->DSCacheDisable
, 1, 1) |
1926 __gen_field(values
->DSFunctionEnable
, 0, 0) |
1931 #define GEN75_3DSTATE_GATHER_CONSTANT_DS_length_bias 0x00000002
1932 #define GEN75_3DSTATE_GATHER_CONSTANT_DS_header \
1934 .CommandSubType = 3, \
1935 ._3DCommandOpcode = 0, \
1936 ._3DCommandSubOpcode = 55
1938 struct GEN75_GATHER_CONSTANT_ENTRY
{
1939 uint32_t ConstantBufferOffset
;
1940 uint32_t ChannelMask
;
1941 uint32_t BindingTableIndexOffset
;
1945 GEN75_GATHER_CONSTANT_ENTRY_pack(__gen_user_data
*data
, void * restrict dst
,
1946 const struct GEN75_GATHER_CONSTANT_ENTRY
* restrict values
)
1948 uint32_t *dw
= (uint32_t * restrict
) dst
;
1951 __gen_offset(values
->ConstantBufferOffset
, 8, 15) |
1952 __gen_field(values
->ChannelMask
, 4, 7) |
1953 __gen_field(values
->BindingTableIndexOffset
, 0, 3) |
1958 struct GEN75_3DSTATE_GATHER_CONSTANT_DS
{
1959 uint32_t CommandType
;
1960 uint32_t CommandSubType
;
1961 uint32_t _3DCommandOpcode
;
1962 uint32_t _3DCommandSubOpcode
;
1963 uint32_t DwordLength
;
1964 uint32_t ConstantBufferValid
;
1965 uint32_t ConstantBufferBindingTableBlock
;
1966 uint32_t GatherBufferOffset
;
1967 /* variable length fields follow */
1971 GEN75_3DSTATE_GATHER_CONSTANT_DS_pack(__gen_user_data
*data
, void * restrict dst
,
1972 const struct GEN75_3DSTATE_GATHER_CONSTANT_DS
* restrict values
)
1974 uint32_t *dw
= (uint32_t * restrict
) dst
;
1977 __gen_field(values
->CommandType
, 29, 31) |
1978 __gen_field(values
->CommandSubType
, 27, 28) |
1979 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
1980 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
1981 __gen_field(values
->DwordLength
, 0, 7) |
1985 __gen_field(values
->ConstantBufferValid
, 16, 31) |
1986 __gen_field(values
->ConstantBufferBindingTableBlock
, 12, 15) |
1990 __gen_offset(values
->GatherBufferOffset
, 6, 22) |
1993 /* variable length fields follow */
1996 #define GEN75_3DSTATE_GATHER_CONSTANT_GS_length_bias 0x00000002
1997 #define GEN75_3DSTATE_GATHER_CONSTANT_GS_header \
1999 .CommandSubType = 3, \
2000 ._3DCommandOpcode = 0, \
2001 ._3DCommandSubOpcode = 53
2003 struct GEN75_3DSTATE_GATHER_CONSTANT_GS
{
2004 uint32_t CommandType
;
2005 uint32_t CommandSubType
;
2006 uint32_t _3DCommandOpcode
;
2007 uint32_t _3DCommandSubOpcode
;
2008 uint32_t DwordLength
;
2009 uint32_t ConstantBufferValid
;
2010 uint32_t ConstantBufferBindingTableBlock
;
2011 uint32_t GatherBufferOffset
;
2012 /* variable length fields follow */
2016 GEN75_3DSTATE_GATHER_CONSTANT_GS_pack(__gen_user_data
*data
, void * restrict dst
,
2017 const struct GEN75_3DSTATE_GATHER_CONSTANT_GS
* restrict values
)
2019 uint32_t *dw
= (uint32_t * restrict
) dst
;
2022 __gen_field(values
->CommandType
, 29, 31) |
2023 __gen_field(values
->CommandSubType
, 27, 28) |
2024 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
2025 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
2026 __gen_field(values
->DwordLength
, 0, 7) |
2030 __gen_field(values
->ConstantBufferValid
, 16, 31) |
2031 __gen_field(values
->ConstantBufferBindingTableBlock
, 12, 15) |
2035 __gen_offset(values
->GatherBufferOffset
, 6, 22) |
2038 /* variable length fields follow */
2041 #define GEN75_3DSTATE_GATHER_CONSTANT_HS_length_bias 0x00000002
2042 #define GEN75_3DSTATE_GATHER_CONSTANT_HS_header \
2044 .CommandSubType = 3, \
2045 ._3DCommandOpcode = 0, \
2046 ._3DCommandSubOpcode = 54
2048 struct GEN75_3DSTATE_GATHER_CONSTANT_HS
{
2049 uint32_t CommandType
;
2050 uint32_t CommandSubType
;
2051 uint32_t _3DCommandOpcode
;
2052 uint32_t _3DCommandSubOpcode
;
2053 uint32_t DwordLength
;
2054 uint32_t ConstantBufferValid
;
2055 uint32_t ConstantBufferBindingTableBlock
;
2056 uint32_t GatherBufferOffset
;
2057 /* variable length fields follow */
2061 GEN75_3DSTATE_GATHER_CONSTANT_HS_pack(__gen_user_data
*data
, void * restrict dst
,
2062 const struct GEN75_3DSTATE_GATHER_CONSTANT_HS
* restrict values
)
2064 uint32_t *dw
= (uint32_t * restrict
) dst
;
2067 __gen_field(values
->CommandType
, 29, 31) |
2068 __gen_field(values
->CommandSubType
, 27, 28) |
2069 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
2070 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
2071 __gen_field(values
->DwordLength
, 0, 7) |
2075 __gen_field(values
->ConstantBufferValid
, 16, 31) |
2076 __gen_field(values
->ConstantBufferBindingTableBlock
, 12, 15) |
2080 __gen_offset(values
->GatherBufferOffset
, 6, 22) |
2083 /* variable length fields follow */
2086 #define GEN75_3DSTATE_GATHER_CONSTANT_PS_length_bias 0x00000002
2087 #define GEN75_3DSTATE_GATHER_CONSTANT_PS_header \
2089 .CommandSubType = 3, \
2090 ._3DCommandOpcode = 0, \
2091 ._3DCommandSubOpcode = 56
2093 struct GEN75_3DSTATE_GATHER_CONSTANT_PS
{
2094 uint32_t CommandType
;
2095 uint32_t CommandSubType
;
2096 uint32_t _3DCommandOpcode
;
2097 uint32_t _3DCommandSubOpcode
;
2098 uint32_t DwordLength
;
2099 uint32_t ConstantBufferValid
;
2100 uint32_t ConstantBufferBindingTableBlock
;
2101 uint32_t GatherBufferOffset
;
2102 uint32_t ConstantBufferDx9Enable
;
2103 /* variable length fields follow */
2107 GEN75_3DSTATE_GATHER_CONSTANT_PS_pack(__gen_user_data
*data
, void * restrict dst
,
2108 const struct GEN75_3DSTATE_GATHER_CONSTANT_PS
* restrict values
)
2110 uint32_t *dw
= (uint32_t * restrict
) dst
;
2113 __gen_field(values
->CommandType
, 29, 31) |
2114 __gen_field(values
->CommandSubType
, 27, 28) |
2115 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
2116 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
2117 __gen_field(values
->DwordLength
, 0, 7) |
2121 __gen_field(values
->ConstantBufferValid
, 16, 31) |
2122 __gen_field(values
->ConstantBufferBindingTableBlock
, 12, 15) |
2126 __gen_offset(values
->GatherBufferOffset
, 6, 22) |
2127 __gen_field(values
->ConstantBufferDx9Enable
, 4, 4) |
2130 /* variable length fields follow */
2133 #define GEN75_3DSTATE_GATHER_CONSTANT_VS_length_bias 0x00000002
2134 #define GEN75_3DSTATE_GATHER_CONSTANT_VS_header \
2136 .CommandSubType = 3, \
2137 ._3DCommandOpcode = 0, \
2138 ._3DCommandSubOpcode = 52
2140 struct GEN75_3DSTATE_GATHER_CONSTANT_VS
{
2141 uint32_t CommandType
;
2142 uint32_t CommandSubType
;
2143 uint32_t _3DCommandOpcode
;
2144 uint32_t _3DCommandSubOpcode
;
2145 uint32_t DwordLength
;
2146 uint32_t ConstantBufferValid
;
2147 uint32_t ConstantBufferBindingTableBlock
;
2148 uint32_t GatherBufferOffset
;
2149 uint32_t ConstantBufferDx9Enable
;
2150 /* variable length fields follow */
2154 GEN75_3DSTATE_GATHER_CONSTANT_VS_pack(__gen_user_data
*data
, void * restrict dst
,
2155 const struct GEN75_3DSTATE_GATHER_CONSTANT_VS
* restrict values
)
2157 uint32_t *dw
= (uint32_t * restrict
) dst
;
2160 __gen_field(values
->CommandType
, 29, 31) |
2161 __gen_field(values
->CommandSubType
, 27, 28) |
2162 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
2163 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
2164 __gen_field(values
->DwordLength
, 0, 7) |
2168 __gen_field(values
->ConstantBufferValid
, 16, 31) |
2169 __gen_field(values
->ConstantBufferBindingTableBlock
, 12, 15) |
2173 __gen_offset(values
->GatherBufferOffset
, 6, 22) |
2174 __gen_field(values
->ConstantBufferDx9Enable
, 4, 4) |
2177 /* variable length fields follow */
2180 #define GEN75_3DSTATE_GATHER_POOL_ALLOC_length 0x00000003
2181 #define GEN75_3DSTATE_GATHER_POOL_ALLOC_length_bias 0x00000002
2182 #define GEN75_3DSTATE_GATHER_POOL_ALLOC_header \
2184 .CommandSubType = 3, \
2185 ._3DCommandOpcode = 1, \
2186 ._3DCommandSubOpcode = 26, \
2189 struct GEN75_3DSTATE_GATHER_POOL_ALLOC
{
2190 uint32_t CommandType
;
2191 uint32_t CommandSubType
;
2192 uint32_t _3DCommandOpcode
;
2193 uint32_t _3DCommandSubOpcode
;
2194 uint32_t DwordLength
;
2195 __gen_address_type GatherPoolBaseAddress
;
2196 uint32_t GatherPoolEnable
;
2197 struct GEN75_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState
;
2198 __gen_address_type GatherPoolUpperBound
;
2202 GEN75_3DSTATE_GATHER_POOL_ALLOC_pack(__gen_user_data
*data
, void * restrict dst
,
2203 const struct GEN75_3DSTATE_GATHER_POOL_ALLOC
* restrict values
)
2205 uint32_t *dw
= (uint32_t * restrict
) dst
;
2208 __gen_field(values
->CommandType
, 29, 31) |
2209 __gen_field(values
->CommandSubType
, 27, 28) |
2210 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
2211 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
2212 __gen_field(values
->DwordLength
, 0, 7) |
2215 uint32_t dw_MemoryObjectControlState
;
2216 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data
, &dw_MemoryObjectControlState
, &values
->MemoryObjectControlState
);
2218 __gen_field(values
->GatherPoolEnable
, 11, 11) |
2220 __gen_field(dw_MemoryObjectControlState
, 0, 3) |
2224 __gen_combine_address(data
, &dw
[1], values
->GatherPoolBaseAddress
, dw1
);
2230 __gen_combine_address(data
, &dw
[2], values
->GatherPoolUpperBound
, dw2
);
2234 #define GEN75_3DSTATE_GS_length 0x00000007
2235 #define GEN75_3DSTATE_GS_length_bias 0x00000002
2236 #define GEN75_3DSTATE_GS_header \
2238 .CommandSubType = 3, \
2239 ._3DCommandOpcode = 0, \
2240 ._3DCommandSubOpcode = 17, \
2243 struct GEN75_3DSTATE_GS
{
2244 uint32_t CommandType
;
2245 uint32_t CommandSubType
;
2246 uint32_t _3DCommandOpcode
;
2247 uint32_t _3DCommandSubOpcode
;
2248 uint32_t DwordLength
;
2249 uint32_t KernelStartPointer
;
2250 uint32_t SingleProgramFlowSPF
;
2253 uint32_t VectorMaskEnableVME
;
2254 #define NoSamplers 0
2255 #define _14Samplers 1
2256 #define _58Samplers 2
2257 #define _912Samplers 3
2258 #define _1316Samplers 4
2259 uint32_t SamplerCount
;
2260 uint32_t BindingTableEntryCount
;
2261 #define NormalPriority 0
2262 #define HighPriority 1
2263 uint32_t ThreadPriority
;
2266 uint32_t FloatingPointMode
;
2267 uint32_t IllegalOpcodeExceptionEnable
;
2268 uint32_t GSaccessesUAV
;
2269 uint32_t MaskStackExceptionEnable
;
2270 uint32_t SoftwareExceptionEnable
;
2271 uint32_t ScratchSpaceBasePointer
;
2272 uint32_t PerThreadScratchSpace
;
2273 uint32_t OutputVertexSize
;
2274 uint32_t OutputTopology
;
2275 uint32_t VertexURBEntryReadLength
;
2276 uint32_t IncludeVertexHandles
;
2277 uint32_t VertexURBEntryReadOffset
;
2278 uint32_t DispatchGRFStartRegisterforURBData
;
2279 uint32_t MaximumNumberofThreads
;
2280 uint32_t ControlDataHeaderSize
;
2281 uint32_t InstanceControl
;
2282 uint32_t DefaultStreamID
;
2284 #define DUAL_INSTANCE 1
2285 #define DUAL_OBJECT 2
2286 uint32_t DispatchMode
;
2287 uint32_t GSStatisticsEnable
;
2288 uint32_t GSInvocationsIncrementValue
;
2289 uint32_t IncludePrimitiveID
;
2291 #define REORDER_LEADING 0
2292 #define REORDER_TRAILING 1
2293 uint32_t ReorderMode
;
2294 uint32_t DiscardAdjacency
;
2298 uint32_t ControlDataFormat
;
2299 uint32_t SemaphoreHandle
;
2303 GEN75_3DSTATE_GS_pack(__gen_user_data
*data
, void * restrict dst
,
2304 const struct GEN75_3DSTATE_GS
* restrict values
)
2306 uint32_t *dw
= (uint32_t * restrict
) dst
;
2309 __gen_field(values
->CommandType
, 29, 31) |
2310 __gen_field(values
->CommandSubType
, 27, 28) |
2311 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
2312 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
2313 __gen_field(values
->DwordLength
, 0, 7) |
2317 __gen_offset(values
->KernelStartPointer
, 6, 31) |
2321 __gen_field(values
->SingleProgramFlowSPF
, 31, 31) |
2322 __gen_field(values
->VectorMaskEnableVME
, 30, 30) |
2323 __gen_field(values
->SamplerCount
, 27, 29) |
2324 __gen_field(values
->BindingTableEntryCount
, 18, 25) |
2325 __gen_field(values
->ThreadPriority
, 17, 17) |
2326 __gen_field(values
->FloatingPointMode
, 16, 16) |
2327 __gen_field(values
->IllegalOpcodeExceptionEnable
, 13, 13) |
2328 __gen_field(values
->GSaccessesUAV
, 12, 12) |
2329 __gen_field(values
->MaskStackExceptionEnable
, 11, 11) |
2330 __gen_field(values
->SoftwareExceptionEnable
, 7, 7) |
2334 __gen_offset(values
->ScratchSpaceBasePointer
, 10, 31) |
2335 __gen_field(values
->PerThreadScratchSpace
, 0, 3) |
2339 __gen_field(values
->OutputVertexSize
, 23, 28) |
2340 __gen_field(values
->OutputTopology
, 17, 22) |
2341 __gen_field(values
->VertexURBEntryReadLength
, 11, 16) |
2342 __gen_field(values
->IncludeVertexHandles
, 10, 10) |
2343 __gen_field(values
->VertexURBEntryReadOffset
, 4, 9) |
2344 __gen_field(values
->DispatchGRFStartRegisterforURBData
, 0, 3) |
2348 __gen_field(values
->MaximumNumberofThreads
, 24, 31) |
2349 __gen_field(values
->ControlDataHeaderSize
, 20, 23) |
2350 __gen_field(values
->InstanceControl
, 15, 19) |
2351 __gen_field(values
->DefaultStreamID
, 13, 14) |
2352 __gen_field(values
->DispatchMode
, 11, 12) |
2353 __gen_field(values
->GSStatisticsEnable
, 10, 10) |
2354 __gen_field(values
->GSInvocationsIncrementValue
, 5, 9) |
2355 __gen_field(values
->IncludePrimitiveID
, 4, 4) |
2356 __gen_field(values
->Hint
, 3, 3) |
2357 __gen_field(values
->ReorderMode
, 2, 2) |
2358 __gen_field(values
->DiscardAdjacency
, 1, 1) |
2359 __gen_field(values
->GSEnable
, 0, 0) |
2363 __gen_field(values
->ControlDataFormat
, 31, 31) |
2364 __gen_offset(values
->SemaphoreHandle
, 0, 12) |
2369 #define GEN75_3DSTATE_HIER_DEPTH_BUFFER_length 0x00000003
2370 #define GEN75_3DSTATE_HIER_DEPTH_BUFFER_length_bias 0x00000002
2371 #define GEN75_3DSTATE_HIER_DEPTH_BUFFER_header \
2373 .CommandSubType = 3, \
2374 ._3DCommandOpcode = 0, \
2375 ._3DCommandSubOpcode = 7, \
2378 struct GEN75_3DSTATE_HIER_DEPTH_BUFFER
{
2379 uint32_t CommandType
;
2380 uint32_t CommandSubType
;
2381 uint32_t _3DCommandOpcode
;
2382 uint32_t _3DCommandSubOpcode
;
2383 uint32_t DwordLength
;
2384 struct GEN75_MEMORY_OBJECT_CONTROL_STATE HierarchicalDepthBufferObjectControlState
;
2385 uint32_t SurfacePitch
;
2386 __gen_address_type SurfaceBaseAddress
;
2390 GEN75_3DSTATE_HIER_DEPTH_BUFFER_pack(__gen_user_data
*data
, void * restrict dst
,
2391 const struct GEN75_3DSTATE_HIER_DEPTH_BUFFER
* restrict values
)
2393 uint32_t *dw
= (uint32_t * restrict
) dst
;
2396 __gen_field(values
->CommandType
, 29, 31) |
2397 __gen_field(values
->CommandSubType
, 27, 28) |
2398 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
2399 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
2400 __gen_field(values
->DwordLength
, 0, 7) |
2403 uint32_t dw_HierarchicalDepthBufferObjectControlState
;
2404 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data
, &dw_HierarchicalDepthBufferObjectControlState
, &values
->HierarchicalDepthBufferObjectControlState
);
2406 __gen_field(dw_HierarchicalDepthBufferObjectControlState
, 25, 28) |
2407 __gen_field(values
->SurfacePitch
, 0, 16) |
2414 __gen_combine_address(data
, &dw
[2], values
->SurfaceBaseAddress
, dw2
);
2418 #define GEN75_3DSTATE_HS_length 0x00000007
2419 #define GEN75_3DSTATE_HS_length_bias 0x00000002
2420 #define GEN75_3DSTATE_HS_header \
2422 .CommandSubType = 3, \
2423 ._3DCommandOpcode = 0, \
2424 ._3DCommandSubOpcode = 27, \
2427 struct GEN75_3DSTATE_HS
{
2428 uint32_t CommandType
;
2429 uint32_t CommandSubType
;
2430 uint32_t _3DCommandOpcode
;
2431 uint32_t _3DCommandSubOpcode
;
2432 uint32_t DwordLength
;
2433 #define NoSamplers 0
2434 #define _14Samplers 1
2435 #define _58Samplers 2
2436 #define _912Samplers 3
2437 #define _1316Samplers 4
2438 uint32_t SamplerCount
;
2439 uint32_t BindingTableEntryCount
;
2442 uint32_t ThreadDispatchPriority
;
2445 uint32_t FloatingPointMode
;
2446 uint32_t IllegalOpcodeExceptionEnable
;
2447 uint32_t SoftwareExceptionEnable
;
2448 uint32_t MaximumNumberofThreads
;
2450 uint32_t StatisticsEnable
;
2451 uint32_t InstanceCount
;
2452 uint32_t KernelStartPointer
;
2453 uint32_t ScratchSpaceBasePointer
;
2454 uint32_t PerThreadScratchSpace
;
2455 uint32_t SingleProgramFlow
;
2458 uint32_t VectorMaskEnable
;
2459 uint32_t HSaccessesUAV
;
2460 uint32_t IncludeVertexHandles
;
2461 uint32_t DispatchGRFStartRegisterForURBData
;
2462 uint32_t VertexURBEntryReadLength
;
2463 uint32_t VertexURBEntryReadOffset
;
2464 uint32_t SemaphoreHandle
;
2468 GEN75_3DSTATE_HS_pack(__gen_user_data
*data
, void * restrict dst
,
2469 const struct GEN75_3DSTATE_HS
* restrict values
)
2471 uint32_t *dw
= (uint32_t * restrict
) dst
;
2474 __gen_field(values
->CommandType
, 29, 31) |
2475 __gen_field(values
->CommandSubType
, 27, 28) |
2476 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
2477 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
2478 __gen_field(values
->DwordLength
, 0, 7) |
2482 __gen_field(values
->SamplerCount
, 27, 29) |
2483 __gen_field(values
->BindingTableEntryCount
, 18, 25) |
2484 __gen_field(values
->ThreadDispatchPriority
, 17, 17) |
2485 __gen_field(values
->FloatingPointMode
, 16, 16) |
2486 __gen_field(values
->IllegalOpcodeExceptionEnable
, 13, 13) |
2487 __gen_field(values
->SoftwareExceptionEnable
, 12, 12) |
2488 __gen_field(values
->MaximumNumberofThreads
, 0, 7) |
2492 __gen_field(values
->Enable
, 31, 31) |
2493 __gen_field(values
->StatisticsEnable
, 29, 29) |
2494 __gen_field(values
->InstanceCount
, 0, 3) |
2498 __gen_offset(values
->KernelStartPointer
, 6, 31) |
2502 __gen_offset(values
->ScratchSpaceBasePointer
, 10, 31) |
2503 __gen_field(values
->PerThreadScratchSpace
, 0, 3) |
2507 __gen_field(values
->SingleProgramFlow
, 27, 27) |
2508 __gen_field(values
->VectorMaskEnable
, 26, 26) |
2509 __gen_field(values
->HSaccessesUAV
, 25, 25) |
2510 __gen_field(values
->IncludeVertexHandles
, 24, 24) |
2511 __gen_field(values
->DispatchGRFStartRegisterForURBData
, 19, 23) |
2512 __gen_field(values
->VertexURBEntryReadLength
, 11, 16) |
2513 __gen_field(values
->VertexURBEntryReadOffset
, 4, 9) |
2517 __gen_offset(values
->SemaphoreHandle
, 0, 12) |
2522 #define GEN75_3DSTATE_INDEX_BUFFER_length 0x00000003
2523 #define GEN75_3DSTATE_INDEX_BUFFER_length_bias 0x00000002
2524 #define GEN75_3DSTATE_INDEX_BUFFER_header \
2526 .CommandSubType = 3, \
2527 ._3DCommandOpcode = 0, \
2528 ._3DCommandSubOpcode = 10, \
2531 struct GEN75_3DSTATE_INDEX_BUFFER
{
2532 uint32_t CommandType
;
2533 uint32_t CommandSubType
;
2534 uint32_t _3DCommandOpcode
;
2535 uint32_t _3DCommandSubOpcode
;
2536 struct GEN75_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState
;
2537 #define INDEX_BYTE 0
2538 #define INDEX_WORD 1
2539 #define INDEX_DWORD 2
2540 uint32_t IndexFormat
;
2541 uint32_t DwordLength
;
2542 __gen_address_type BufferStartingAddress
;
2543 __gen_address_type BufferEndingAddress
;
2547 GEN75_3DSTATE_INDEX_BUFFER_pack(__gen_user_data
*data
, void * restrict dst
,
2548 const struct GEN75_3DSTATE_INDEX_BUFFER
* restrict values
)
2550 uint32_t *dw
= (uint32_t * restrict
) dst
;
2552 uint32_t dw_MemoryObjectControlState
;
2553 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data
, &dw_MemoryObjectControlState
, &values
->MemoryObjectControlState
);
2555 __gen_field(values
->CommandType
, 29, 31) |
2556 __gen_field(values
->CommandSubType
, 27, 28) |
2557 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
2558 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
2559 __gen_field(dw_MemoryObjectControlState
, 12, 15) |
2560 __gen_field(values
->IndexFormat
, 8, 9) |
2561 __gen_field(values
->DwordLength
, 0, 7) |
2568 __gen_combine_address(data
, &dw
[1], values
->BufferStartingAddress
, dw1
);
2574 __gen_combine_address(data
, &dw
[2], values
->BufferEndingAddress
, dw2
);
2578 #define GEN75_3DSTATE_LINE_STIPPLE_length 0x00000003
2579 #define GEN75_3DSTATE_LINE_STIPPLE_length_bias 0x00000002
2580 #define GEN75_3DSTATE_LINE_STIPPLE_header \
2582 .CommandSubType = 3, \
2583 ._3DCommandOpcode = 1, \
2584 ._3DCommandSubOpcode = 8, \
2587 struct GEN75_3DSTATE_LINE_STIPPLE
{
2588 uint32_t CommandType
;
2589 uint32_t CommandSubType
;
2590 uint32_t _3DCommandOpcode
;
2591 uint32_t _3DCommandSubOpcode
;
2592 uint32_t DwordLength
;
2593 uint32_t ModifyEnableCurrentRepeatCounterCurrentStippleIndex
;
2594 uint32_t CurrentRepeatCounter
;
2595 uint32_t CurrentStippleIndex
;
2596 uint32_t LineStipplePattern
;
2597 float LineStippleInverseRepeatCount
;
2598 uint32_t LineStippleRepeatCount
;
2602 GEN75_3DSTATE_LINE_STIPPLE_pack(__gen_user_data
*data
, void * restrict dst
,
2603 const struct GEN75_3DSTATE_LINE_STIPPLE
* restrict values
)
2605 uint32_t *dw
= (uint32_t * restrict
) dst
;
2608 __gen_field(values
->CommandType
, 29, 31) |
2609 __gen_field(values
->CommandSubType
, 27, 28) |
2610 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
2611 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
2612 __gen_field(values
->DwordLength
, 0, 7) |
2616 __gen_field(values
->ModifyEnableCurrentRepeatCounterCurrentStippleIndex
, 31, 31) |
2617 __gen_field(values
->CurrentRepeatCounter
, 21, 29) |
2618 __gen_field(values
->CurrentStippleIndex
, 16, 19) |
2619 __gen_field(values
->LineStipplePattern
, 0, 15) |
2623 __gen_field(values
->LineStippleInverseRepeatCount
* (1 << 16), 15, 31) |
2624 __gen_field(values
->LineStippleRepeatCount
, 0, 8) |
2629 #define GEN75_3DSTATE_MONOFILTER_SIZE_length 0x00000002
2630 #define GEN75_3DSTATE_MONOFILTER_SIZE_length_bias 0x00000002
2631 #define GEN75_3DSTATE_MONOFILTER_SIZE_header \
2633 .CommandSubType = 3, \
2634 ._3DCommandOpcode = 1, \
2635 ._3DCommandSubOpcode = 17, \
2638 struct GEN75_3DSTATE_MONOFILTER_SIZE
{
2639 uint32_t CommandType
;
2640 uint32_t CommandSubType
;
2641 uint32_t _3DCommandOpcode
;
2642 uint32_t _3DCommandSubOpcode
;
2643 uint32_t DwordLength
;
2644 uint32_t MonochromeFilterWidth
;
2645 uint32_t MonochromeFilterHeight
;
2649 GEN75_3DSTATE_MONOFILTER_SIZE_pack(__gen_user_data
*data
, void * restrict dst
,
2650 const struct GEN75_3DSTATE_MONOFILTER_SIZE
* restrict values
)
2652 uint32_t *dw
= (uint32_t * restrict
) dst
;
2655 __gen_field(values
->CommandType
, 29, 31) |
2656 __gen_field(values
->CommandSubType
, 27, 28) |
2657 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
2658 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
2659 __gen_field(values
->DwordLength
, 0, 7) |
2663 __gen_field(values
->MonochromeFilterWidth
, 3, 5) |
2664 __gen_field(values
->MonochromeFilterHeight
, 0, 2) |
2669 #define GEN75_3DSTATE_MULTISAMPLE_length 0x00000004
2670 #define GEN75_3DSTATE_MULTISAMPLE_length_bias 0x00000002
2671 #define GEN75_3DSTATE_MULTISAMPLE_header \
2673 .CommandSubType = 3, \
2674 ._3DCommandOpcode = 1, \
2675 ._3DCommandSubOpcode = 13, \
2678 struct GEN75_3DSTATE_MULTISAMPLE
{
2679 uint32_t CommandType
;
2680 uint32_t CommandSubType
;
2681 uint32_t _3DCommandOpcode
;
2682 uint32_t _3DCommandSubOpcode
;
2683 uint32_t DwordLength
;
2684 uint32_t MultiSampleEnable
;
2685 #define PIXLOC_CENTER 0
2686 #define PIXLOC_UL_CORNER 1
2687 uint32_t PixelLocation
;
2688 #define NUMSAMPLES_1 0
2689 #define NUMSAMPLES_4 2
2690 #define NUMSAMPLES_8 3
2691 uint32_t NumberofMultisamples
;
2692 float Sample3XOffset
;
2693 float Sample3YOffset
;
2694 float Sample2XOffset
;
2695 float Sample2YOffset
;
2696 float Sample1XOffset
;
2697 float Sample1YOffset
;
2698 float Sample0XOffset
;
2699 float Sample0YOffset
;
2700 float Sample7XOffset
;
2701 float Sample7YOffset
;
2702 float Sample6XOffset
;
2703 float Sample6YOffset
;
2704 float Sample5XOffset
;
2705 float Sample5YOffset
;
2706 float Sample4XOffset
;
2707 float Sample4YOffset
;
2711 GEN75_3DSTATE_MULTISAMPLE_pack(__gen_user_data
*data
, void * restrict dst
,
2712 const struct GEN75_3DSTATE_MULTISAMPLE
* restrict values
)
2714 uint32_t *dw
= (uint32_t * restrict
) dst
;
2717 __gen_field(values
->CommandType
, 29, 31) |
2718 __gen_field(values
->CommandSubType
, 27, 28) |
2719 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
2720 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
2721 __gen_field(values
->DwordLength
, 0, 7) |
2725 __gen_field(values
->MultiSampleEnable
, 5, 5) |
2726 __gen_field(values
->PixelLocation
, 4, 4) |
2727 __gen_field(values
->NumberofMultisamples
, 1, 3) |
2731 __gen_field(values
->Sample3XOffset
* (1 << 4), 28, 31) |
2732 __gen_field(values
->Sample3YOffset
* (1 << 4), 24, 27) |
2733 __gen_field(values
->Sample2XOffset
* (1 << 4), 20, 23) |
2734 __gen_field(values
->Sample2YOffset
* (1 << 4), 16, 19) |
2735 __gen_field(values
->Sample1XOffset
* (1 << 4), 12, 15) |
2736 __gen_field(values
->Sample1YOffset
* (1 << 4), 8, 11) |
2737 __gen_field(values
->Sample0XOffset
* (1 << 4), 4, 7) |
2738 __gen_field(values
->Sample0YOffset
* (1 << 4), 0, 3) |
2742 __gen_field(values
->Sample7XOffset
* (1 << 4), 28, 31) |
2743 __gen_field(values
->Sample7YOffset
* (1 << 4), 24, 27) |
2744 __gen_field(values
->Sample6XOffset
* (1 << 4), 20, 23) |
2745 __gen_field(values
->Sample6YOffset
* (1 << 4), 16, 19) |
2746 __gen_field(values
->Sample5XOffset
* (1 << 4), 12, 15) |
2747 __gen_field(values
->Sample5YOffset
* (1 << 4), 8, 11) |
2748 __gen_field(values
->Sample4XOffset
* (1 << 4), 4, 7) |
2749 __gen_field(values
->Sample4YOffset
* (1 << 4), 0, 3) |
2754 #define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_length 0x00000002
2755 #define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_length_bias 0x00000002
2756 #define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_header\
2758 .CommandSubType = 3, \
2759 ._3DCommandOpcode = 1, \
2760 ._3DCommandSubOpcode = 6, \
2763 struct GEN75_3DSTATE_POLY_STIPPLE_OFFSET
{
2764 uint32_t CommandType
;
2765 uint32_t CommandSubType
;
2766 uint32_t _3DCommandOpcode
;
2767 uint32_t _3DCommandSubOpcode
;
2768 uint32_t DwordLength
;
2769 uint32_t PolygonStippleXOffset
;
2770 uint32_t PolygonStippleYOffset
;
2774 GEN75_3DSTATE_POLY_STIPPLE_OFFSET_pack(__gen_user_data
*data
, void * restrict dst
,
2775 const struct GEN75_3DSTATE_POLY_STIPPLE_OFFSET
* restrict values
)
2777 uint32_t *dw
= (uint32_t * restrict
) dst
;
2780 __gen_field(values
->CommandType
, 29, 31) |
2781 __gen_field(values
->CommandSubType
, 27, 28) |
2782 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
2783 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
2784 __gen_field(values
->DwordLength
, 0, 7) |
2788 __gen_field(values
->PolygonStippleXOffset
, 8, 12) |
2789 __gen_field(values
->PolygonStippleYOffset
, 0, 4) |
2794 #define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_length 0x00000021
2795 #define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_length_bias 0x00000002
2796 #define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_header\
2798 .CommandSubType = 3, \
2799 ._3DCommandOpcode = 1, \
2800 ._3DCommandSubOpcode = 7, \
2803 struct GEN75_3DSTATE_POLY_STIPPLE_PATTERN
{
2804 uint32_t CommandType
;
2805 uint32_t CommandSubType
;
2806 uint32_t _3DCommandOpcode
;
2807 uint32_t _3DCommandSubOpcode
;
2808 uint32_t DwordLength
;
2809 uint32_t PatternRow
;
2813 GEN75_3DSTATE_POLY_STIPPLE_PATTERN_pack(__gen_user_data
*data
, void * restrict dst
,
2814 const struct GEN75_3DSTATE_POLY_STIPPLE_PATTERN
* restrict values
)
2816 uint32_t *dw
= (uint32_t * restrict
) dst
;
2819 __gen_field(values
->CommandType
, 29, 31) |
2820 __gen_field(values
->CommandSubType
, 27, 28) |
2821 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
2822 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
2823 __gen_field(values
->DwordLength
, 0, 7) |
2827 __gen_field(values
->PatternRow
, 0, 31) |
2832 #define GEN75_3DSTATE_PS_length 0x00000008
2833 #define GEN75_3DSTATE_PS_length_bias 0x00000002
2834 #define GEN75_3DSTATE_PS_header \
2836 .CommandSubType = 3, \
2837 ._3DCommandOpcode = 0, \
2838 ._3DCommandSubOpcode = 32, \
2841 struct GEN75_3DSTATE_PS
{
2842 uint32_t CommandType
;
2843 uint32_t CommandSubType
;
2844 uint32_t _3DCommandOpcode
;
2845 uint32_t _3DCommandSubOpcode
;
2846 uint32_t DwordLength
;
2847 uint32_t KernelStartPointer0
;
2850 uint32_t SingleProgramFlowSPF
;
2853 uint32_t VectorMaskEnableVME
;
2854 uint32_t SamplerCount
;
2857 uint32_t DenormalMode
;
2858 uint32_t BindingTableEntryCount
;
2861 uint32_t ThreadPriority
;
2864 uint32_t FloatingPointMode
;
2869 uint32_t RoundingMode
;
2870 uint32_t IllegalOpcodeExceptionEnable
;
2871 uint32_t MaskStackExceptionEnable
;
2872 uint32_t SoftwareExceptionEnable
;
2873 uint32_t ScratchSpaceBasePointer
;
2874 uint32_t PerThreadScratchSpace
;
2875 uint32_t MaximumNumberofThreads
;
2876 uint32_t SampleMask
;
2877 uint32_t PushConstantEnable
;
2878 uint32_t AttributeEnable
;
2879 uint32_t oMaskPresenttoRenderTarget
;
2880 uint32_t RenderTargetFastClearEnable
;
2881 uint32_t DualSourceBlendEnable
;
2882 uint32_t RenderTargetResolveEnable
;
2883 uint32_t PSAccessesUAV
;
2884 #define POSOFFSET_NONE 0
2885 #define POSOFFSET_CENTROID 2
2886 #define POSOFFSET_SAMPLE 3
2887 uint32_t PositionXYOffsetSelect
;
2888 uint32_t _32PixelDispatchEnable
;
2889 uint32_t _16PixelDispatchEnable
;
2890 uint32_t _8PixelDispatchEnable
;
2891 uint32_t DispatchGRFStartRegisterforConstantSetupData0
;
2892 uint32_t DispatchGRFStartRegisterforConstantSetupData1
;
2893 uint32_t DispatchGRFStartRegisterforConstantSetupData2
;
2894 uint32_t KernelStartPointer1
;
2895 uint32_t KernelStartPointer2
;
2899 GEN75_3DSTATE_PS_pack(__gen_user_data
*data
, void * restrict dst
,
2900 const struct GEN75_3DSTATE_PS
* restrict values
)
2902 uint32_t *dw
= (uint32_t * restrict
) dst
;
2905 __gen_field(values
->CommandType
, 29, 31) |
2906 __gen_field(values
->CommandSubType
, 27, 28) |
2907 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
2908 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
2909 __gen_field(values
->DwordLength
, 0, 7) |
2913 __gen_offset(values
->KernelStartPointer0
, 6, 31) |
2917 __gen_field(values
->SingleProgramFlowSPF
, 31, 31) |
2918 __gen_field(values
->VectorMaskEnableVME
, 30, 30) |
2919 __gen_field(values
->SamplerCount
, 27, 29) |
2920 __gen_field(values
->DenormalMode
, 26, 26) |
2921 __gen_field(values
->BindingTableEntryCount
, 18, 25) |
2922 __gen_field(values
->ThreadPriority
, 17, 17) |
2923 __gen_field(values
->FloatingPointMode
, 16, 16) |
2924 __gen_field(values
->RoundingMode
, 14, 15) |
2925 __gen_field(values
->IllegalOpcodeExceptionEnable
, 13, 13) |
2926 __gen_field(values
->MaskStackExceptionEnable
, 11, 11) |
2927 __gen_field(values
->SoftwareExceptionEnable
, 7, 7) |
2931 __gen_offset(values
->ScratchSpaceBasePointer
, 10, 31) |
2932 __gen_field(values
->PerThreadScratchSpace
, 0, 3) |
2936 __gen_field(values
->MaximumNumberofThreads
, 23, 31) |
2937 __gen_field(values
->SampleMask
, 12, 19) |
2938 __gen_field(values
->PushConstantEnable
, 11, 11) |
2939 __gen_field(values
->AttributeEnable
, 10, 10) |
2940 __gen_field(values
->oMaskPresenttoRenderTarget
, 9, 9) |
2941 __gen_field(values
->RenderTargetFastClearEnable
, 8, 8) |
2942 __gen_field(values
->DualSourceBlendEnable
, 7, 7) |
2943 __gen_field(values
->RenderTargetResolveEnable
, 6, 6) |
2944 __gen_field(values
->PSAccessesUAV
, 5, 5) |
2945 __gen_field(values
->PositionXYOffsetSelect
, 3, 4) |
2946 __gen_field(values
->_32PixelDispatchEnable
, 2, 2) |
2947 __gen_field(values
->_16PixelDispatchEnable
, 1, 1) |
2948 __gen_field(values
->_8PixelDispatchEnable
, 0, 0) |
2952 __gen_field(values
->DispatchGRFStartRegisterforConstantSetupData0
, 16, 22) |
2953 __gen_field(values
->DispatchGRFStartRegisterforConstantSetupData1
, 8, 14) |
2954 __gen_field(values
->DispatchGRFStartRegisterforConstantSetupData2
, 0, 6) |
2958 __gen_offset(values
->KernelStartPointer1
, 6, 31) |
2962 __gen_offset(values
->KernelStartPointer2
, 6, 31) |
2967 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length 0x00000002
2968 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length_bias 0x00000002
2969 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_header\
2971 .CommandSubType = 3, \
2972 ._3DCommandOpcode = 1, \
2973 ._3DCommandSubOpcode = 20, \
2976 struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS
{
2977 uint32_t CommandType
;
2978 uint32_t CommandSubType
;
2979 uint32_t _3DCommandOpcode
;
2980 uint32_t _3DCommandSubOpcode
;
2981 uint32_t DwordLength
;
2982 uint32_t ConstantBufferOffset
;
2983 uint32_t ConstantBufferSize
;
2987 GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_pack(__gen_user_data
*data
, void * restrict dst
,
2988 const struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS
* restrict values
)
2990 uint32_t *dw
= (uint32_t * restrict
) dst
;
2993 __gen_field(values
->CommandType
, 29, 31) |
2994 __gen_field(values
->CommandSubType
, 27, 28) |
2995 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
2996 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
2997 __gen_field(values
->DwordLength
, 0, 7) |
3001 __gen_field(values
->ConstantBufferOffset
, 16, 20) |
3002 __gen_field(values
->ConstantBufferSize
, 0, 5) |
3007 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length 0x00000002
3008 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length_bias 0x00000002
3009 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_header\
3011 .CommandSubType = 3, \
3012 ._3DCommandOpcode = 1, \
3013 ._3DCommandSubOpcode = 21, \
3016 struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS
{
3017 uint32_t CommandType
;
3018 uint32_t CommandSubType
;
3019 uint32_t _3DCommandOpcode
;
3020 uint32_t _3DCommandSubOpcode
;
3021 uint32_t DwordLength
;
3022 uint32_t ConstantBufferOffset
;
3023 uint32_t ConstantBufferSize
;
3027 GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_pack(__gen_user_data
*data
, void * restrict dst
,
3028 const struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS
* restrict values
)
3030 uint32_t *dw
= (uint32_t * restrict
) dst
;
3033 __gen_field(values
->CommandType
, 29, 31) |
3034 __gen_field(values
->CommandSubType
, 27, 28) |
3035 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
3036 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
3037 __gen_field(values
->DwordLength
, 0, 7) |
3041 __gen_field(values
->ConstantBufferOffset
, 16, 20) |
3042 __gen_field(values
->ConstantBufferSize
, 0, 5) |
3047 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length 0x00000002
3048 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length_bias 0x00000002
3049 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_header\
3051 .CommandSubType = 3, \
3052 ._3DCommandOpcode = 1, \
3053 ._3DCommandSubOpcode = 19, \
3056 struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS
{
3057 uint32_t CommandType
;
3058 uint32_t CommandSubType
;
3059 uint32_t _3DCommandOpcode
;
3060 uint32_t _3DCommandSubOpcode
;
3061 uint32_t DwordLength
;
3062 uint32_t ConstantBufferOffset
;
3063 uint32_t ConstantBufferSize
;
3067 GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_pack(__gen_user_data
*data
, void * restrict dst
,
3068 const struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS
* restrict values
)
3070 uint32_t *dw
= (uint32_t * restrict
) dst
;
3073 __gen_field(values
->CommandType
, 29, 31) |
3074 __gen_field(values
->CommandSubType
, 27, 28) |
3075 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
3076 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
3077 __gen_field(values
->DwordLength
, 0, 7) |
3081 __gen_field(values
->ConstantBufferOffset
, 16, 20) |
3082 __gen_field(values
->ConstantBufferSize
, 0, 5) |
3087 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length 0x00000002
3088 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length_bias 0x00000002
3089 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_header\
3091 .CommandSubType = 3, \
3092 ._3DCommandOpcode = 1, \
3093 ._3DCommandSubOpcode = 22, \
3096 struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS
{
3097 uint32_t CommandType
;
3098 uint32_t CommandSubType
;
3099 uint32_t _3DCommandOpcode
;
3100 uint32_t _3DCommandSubOpcode
;
3101 uint32_t DwordLength
;
3102 uint32_t ConstantBufferOffset
;
3103 uint32_t ConstantBufferSize
;
3107 GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_pack(__gen_user_data
*data
, void * restrict dst
,
3108 const struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS
* restrict values
)
3110 uint32_t *dw
= (uint32_t * restrict
) dst
;
3113 __gen_field(values
->CommandType
, 29, 31) |
3114 __gen_field(values
->CommandSubType
, 27, 28) |
3115 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
3116 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
3117 __gen_field(values
->DwordLength
, 0, 7) |
3121 __gen_field(values
->ConstantBufferOffset
, 16, 20) |
3122 __gen_field(values
->ConstantBufferSize
, 0, 5) |
3127 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length 0x00000002
3128 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length_bias 0x00000002
3129 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_header\
3131 .CommandSubType = 3, \
3132 ._3DCommandOpcode = 1, \
3133 ._3DCommandSubOpcode = 18, \
3136 struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS
{
3137 uint32_t CommandType
;
3138 uint32_t CommandSubType
;
3139 uint32_t _3DCommandOpcode
;
3140 uint32_t _3DCommandSubOpcode
;
3141 uint32_t DwordLength
;
3142 uint32_t ConstantBufferOffset
;
3143 uint32_t ConstantBufferSize
;
3147 GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_pack(__gen_user_data
*data
, void * restrict dst
,
3148 const struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS
* restrict values
)
3150 uint32_t *dw
= (uint32_t * restrict
) dst
;
3153 __gen_field(values
->CommandType
, 29, 31) |
3154 __gen_field(values
->CommandSubType
, 27, 28) |
3155 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
3156 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
3157 __gen_field(values
->DwordLength
, 0, 7) |
3161 __gen_field(values
->ConstantBufferOffset
, 16, 20) |
3162 __gen_field(values
->ConstantBufferSize
, 0, 5) |
3167 #define GEN75_3DSTATE_RAST_MULTISAMPLE_length 0x00000006
3168 #define GEN75_3DSTATE_RAST_MULTISAMPLE_length_bias 0x00000002
3169 #define GEN75_3DSTATE_RAST_MULTISAMPLE_header \
3171 .CommandSubType = 3, \
3172 ._3DCommandOpcode = 1, \
3173 ._3DCommandSubOpcode = 14, \
3176 struct GEN75_3DSTATE_RAST_MULTISAMPLE
{
3177 uint32_t CommandType
;
3178 uint32_t CommandSubType
;
3179 uint32_t _3DCommandOpcode
;
3180 uint32_t _3DCommandSubOpcode
;
3181 uint32_t DwordLength
;
3182 #define NRM_NUMRASTSAMPLES_1 0
3183 #define NRM_NUMRASTSAMPLES_2 1
3184 #define NRM_NUMRASTSAMPLES_4 2
3185 #define NRM_NUMRASTSAMPLES_8 3
3186 #define NRM_NUMRASTSAMPLES_16 4
3187 uint32_t NumberofRasterizationMultisamples
;
3188 float Sample3XOffset
;
3189 float Sample3YOffset
;
3190 float Sample2XOffset
;
3191 float Sample2YOffset
;
3192 float Sample1XOffset
;
3193 float Sample1YOffset
;
3194 float Sample0XOffset
;
3195 float Sample0YOffset
;
3196 float Sample7XOffset
;
3197 float Sample7YOffset
;
3198 float Sample6XOffset
;
3199 float Sample6YOffset
;
3200 float Sample5XOffset
;
3201 float Sample5YOffset
;
3202 float Sample4XOffset
;
3203 float Sample4YOffset
;
3204 float Sample11XOffset
;
3205 float Sample11YOffset
;
3206 float Sample10XOffset
;
3207 float Sample10YOffset
;
3208 float Sample9XOffset
;
3209 float Sample9YOffset
;
3210 float Sample8XOffset
;
3211 float Sample8YOffset
;
3212 float Sample15XOffset
;
3213 float Sample15YOffset
;
3214 float Sample14XOffset
;
3215 float Sample14YOffset
;
3216 float Sample13XOffset
;
3217 float Sample13YOffset
;
3218 float Sample12XOffset
;
3219 float Sample12YOffset
;
3223 GEN75_3DSTATE_RAST_MULTISAMPLE_pack(__gen_user_data
*data
, void * restrict dst
,
3224 const struct GEN75_3DSTATE_RAST_MULTISAMPLE
* restrict values
)
3226 uint32_t *dw
= (uint32_t * restrict
) dst
;
3229 __gen_field(values
->CommandType
, 29, 31) |
3230 __gen_field(values
->CommandSubType
, 27, 28) |
3231 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
3232 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
3233 __gen_field(values
->DwordLength
, 0, 7) |
3237 __gen_field(values
->NumberofRasterizationMultisamples
, 1, 3) |
3241 __gen_field(values
->Sample3XOffset
* (1 << 4), 28, 31) |
3242 __gen_field(values
->Sample3YOffset
* (1 << 4), 24, 27) |
3243 __gen_field(values
->Sample2XOffset
* (1 << 4), 20, 23) |
3244 __gen_field(values
->Sample2YOffset
* (1 << 4), 16, 19) |
3245 __gen_field(values
->Sample1XOffset
* (1 << 4), 12, 15) |
3246 __gen_field(values
->Sample1YOffset
* (1 << 4), 8, 11) |
3247 __gen_field(values
->Sample0XOffset
* (1 << 4), 4, 7) |
3248 __gen_field(values
->Sample0YOffset
* (1 << 4), 0, 3) |
3252 __gen_field(values
->Sample7XOffset
* (1 << 4), 28, 31) |
3253 __gen_field(values
->Sample7YOffset
* (1 << 4), 24, 27) |
3254 __gen_field(values
->Sample6XOffset
* (1 << 4), 20, 23) |
3255 __gen_field(values
->Sample6YOffset
* (1 << 4), 16, 19) |
3256 __gen_field(values
->Sample5XOffset
* (1 << 4), 12, 15) |
3257 __gen_field(values
->Sample5YOffset
* (1 << 4), 8, 11) |
3258 __gen_field(values
->Sample4XOffset
* (1 << 4), 4, 7) |
3259 __gen_field(values
->Sample4YOffset
* (1 << 4), 0, 3) |
3263 __gen_field(values
->Sample11XOffset
* (1 << 4), 28, 31) |
3264 __gen_field(values
->Sample11YOffset
* (1 << 4), 24, 27) |
3265 __gen_field(values
->Sample10XOffset
* (1 << 4), 20, 23) |
3266 __gen_field(values
->Sample10YOffset
* (1 << 4), 16, 19) |
3267 __gen_field(values
->Sample9XOffset
* (1 << 4), 12, 15) |
3268 __gen_field(values
->Sample9YOffset
* (1 << 4), 8, 11) |
3269 __gen_field(values
->Sample8XOffset
* (1 << 4), 4, 7) |
3270 __gen_field(values
->Sample8YOffset
* (1 << 4), 0, 3) |
3274 __gen_field(values
->Sample15XOffset
* (1 << 4), 28, 31) |
3275 __gen_field(values
->Sample15YOffset
* (1 << 4), 24, 27) |
3276 __gen_field(values
->Sample14XOffset
* (1 << 4), 20, 23) |
3277 __gen_field(values
->Sample14YOffset
* (1 << 4), 16, 19) |
3278 __gen_field(values
->Sample13XOffset
* (1 << 4), 12, 15) |
3279 __gen_field(values
->Sample13YOffset
* (1 << 4), 8, 11) |
3280 __gen_field(values
->Sample12XOffset
* (1 << 4), 4, 7) |
3281 __gen_field(values
->Sample12YOffset
* (1 << 4), 0, 3) |
3286 #define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_length_bias 0x00000002
3287 #define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_header\
3289 .CommandSubType = 3, \
3290 ._3DCommandOpcode = 1, \
3291 ._3DCommandSubOpcode = 2
3293 struct GEN75_PALETTE_ENTRY
{
3301 GEN75_PALETTE_ENTRY_pack(__gen_user_data
*data
, void * restrict dst
,
3302 const struct GEN75_PALETTE_ENTRY
* restrict values
)
3304 uint32_t *dw
= (uint32_t * restrict
) dst
;
3307 __gen_field(values
->Alpha
, 24, 31) |
3308 __gen_field(values
->Red
, 16, 23) |
3309 __gen_field(values
->Green
, 8, 15) |
3310 __gen_field(values
->Blue
, 0, 7) |
3315 struct GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0
{
3316 uint32_t CommandType
;
3317 uint32_t CommandSubType
;
3318 uint32_t _3DCommandOpcode
;
3319 uint32_t _3DCommandSubOpcode
;
3320 uint32_t DwordLength
;
3321 /* variable length fields follow */
3325 GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_pack(__gen_user_data
*data
, void * restrict dst
,
3326 const struct GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0
* restrict values
)
3328 uint32_t *dw
= (uint32_t * restrict
) dst
;
3331 __gen_field(values
->CommandType
, 29, 31) |
3332 __gen_field(values
->CommandSubType
, 27, 28) |
3333 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
3334 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
3335 __gen_field(values
->DwordLength
, 0, 7) |
3338 /* variable length fields follow */
3341 #define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_length_bias 0x00000002
3342 #define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_header\
3344 .CommandSubType = 3, \
3345 ._3DCommandOpcode = 1, \
3346 ._3DCommandSubOpcode = 12
3348 struct GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1
{
3349 uint32_t CommandType
;
3350 uint32_t CommandSubType
;
3351 uint32_t _3DCommandOpcode
;
3352 uint32_t _3DCommandSubOpcode
;
3353 uint32_t DwordLength
;
3354 /* variable length fields follow */
3358 GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_pack(__gen_user_data
*data
, void * restrict dst
,
3359 const struct GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1
* restrict values
)
3361 uint32_t *dw
= (uint32_t * restrict
) dst
;
3364 __gen_field(values
->CommandType
, 29, 31) |
3365 __gen_field(values
->CommandSubType
, 27, 28) |
3366 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
3367 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
3368 __gen_field(values
->DwordLength
, 0, 7) |
3371 /* variable length fields follow */
3374 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_length 0x00000002
3375 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_length_bias 0x00000002
3376 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_header\
3378 .CommandSubType = 3, \
3379 ._3DCommandOpcode = 0, \
3380 ._3DCommandSubOpcode = 45, \
3383 struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS
{
3384 uint32_t CommandType
;
3385 uint32_t CommandSubType
;
3386 uint32_t _3DCommandOpcode
;
3387 uint32_t _3DCommandSubOpcode
;
3388 uint32_t DwordLength
;
3389 uint32_t PointertoDSSamplerState
;
3393 GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_pack(__gen_user_data
*data
, void * restrict dst
,
3394 const struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS
* restrict values
)
3396 uint32_t *dw
= (uint32_t * restrict
) dst
;
3399 __gen_field(values
->CommandType
, 29, 31) |
3400 __gen_field(values
->CommandSubType
, 27, 28) |
3401 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
3402 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
3403 __gen_field(values
->DwordLength
, 0, 7) |
3407 __gen_offset(values
->PointertoDSSamplerState
, 5, 31) |
3412 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_length 0x00000002
3413 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_length_bias 0x00000002
3414 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_header\
3416 .CommandSubType = 3, \
3417 ._3DCommandOpcode = 0, \
3418 ._3DCommandSubOpcode = 46, \
3421 struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS
{
3422 uint32_t CommandType
;
3423 uint32_t CommandSubType
;
3424 uint32_t _3DCommandOpcode
;
3425 uint32_t _3DCommandSubOpcode
;
3426 uint32_t DwordLength
;
3427 uint32_t PointertoGSSamplerState
;
3431 GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_pack(__gen_user_data
*data
, void * restrict dst
,
3432 const struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS
* restrict values
)
3434 uint32_t *dw
= (uint32_t * restrict
) dst
;
3437 __gen_field(values
->CommandType
, 29, 31) |
3438 __gen_field(values
->CommandSubType
, 27, 28) |
3439 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
3440 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
3441 __gen_field(values
->DwordLength
, 0, 7) |
3445 __gen_offset(values
->PointertoGSSamplerState
, 5, 31) |
3450 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_length 0x00000002
3451 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_length_bias 0x00000002
3452 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_header\
3454 .CommandSubType = 3, \
3455 ._3DCommandOpcode = 0, \
3456 ._3DCommandSubOpcode = 44, \
3459 struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS
{
3460 uint32_t CommandType
;
3461 uint32_t CommandSubType
;
3462 uint32_t _3DCommandOpcode
;
3463 uint32_t _3DCommandSubOpcode
;
3464 uint32_t DwordLength
;
3465 uint32_t PointertoHSSamplerState
;
3469 GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_pack(__gen_user_data
*data
, void * restrict dst
,
3470 const struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS
* restrict values
)
3472 uint32_t *dw
= (uint32_t * restrict
) dst
;
3475 __gen_field(values
->CommandType
, 29, 31) |
3476 __gen_field(values
->CommandSubType
, 27, 28) |
3477 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
3478 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
3479 __gen_field(values
->DwordLength
, 0, 7) |
3483 __gen_offset(values
->PointertoHSSamplerState
, 5, 31) |
3488 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_length 0x00000002
3489 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_length_bias 0x00000002
3490 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_header\
3492 .CommandSubType = 3, \
3493 ._3DCommandOpcode = 0, \
3494 ._3DCommandSubOpcode = 47, \
3497 struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS
{
3498 uint32_t CommandType
;
3499 uint32_t CommandSubType
;
3500 uint32_t _3DCommandOpcode
;
3501 uint32_t _3DCommandSubOpcode
;
3502 uint32_t DwordLength
;
3503 uint32_t PointertoPSSamplerState
;
3507 GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_pack(__gen_user_data
*data
, void * restrict dst
,
3508 const struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS
* restrict values
)
3510 uint32_t *dw
= (uint32_t * restrict
) dst
;
3513 __gen_field(values
->CommandType
, 29, 31) |
3514 __gen_field(values
->CommandSubType
, 27, 28) |
3515 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
3516 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
3517 __gen_field(values
->DwordLength
, 0, 7) |
3521 __gen_offset(values
->PointertoPSSamplerState
, 5, 31) |
3526 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_length 0x00000002
3527 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_length_bias 0x00000002
3528 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_header\
3530 .CommandSubType = 3, \
3531 ._3DCommandOpcode = 0, \
3532 ._3DCommandSubOpcode = 43, \
3535 struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS
{
3536 uint32_t CommandType
;
3537 uint32_t CommandSubType
;
3538 uint32_t _3DCommandOpcode
;
3539 uint32_t _3DCommandSubOpcode
;
3540 uint32_t DwordLength
;
3541 uint32_t PointertoVSSamplerState
;
3545 GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_pack(__gen_user_data
*data
, void * restrict dst
,
3546 const struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS
* restrict values
)
3548 uint32_t *dw
= (uint32_t * restrict
) dst
;
3551 __gen_field(values
->CommandType
, 29, 31) |
3552 __gen_field(values
->CommandSubType
, 27, 28) |
3553 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
3554 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
3555 __gen_field(values
->DwordLength
, 0, 7) |
3559 __gen_offset(values
->PointertoVSSamplerState
, 5, 31) |
3564 #define GEN75_3DSTATE_SAMPLE_MASK_length 0x00000002
3565 #define GEN75_3DSTATE_SAMPLE_MASK_length_bias 0x00000002
3566 #define GEN75_3DSTATE_SAMPLE_MASK_header \
3568 .CommandSubType = 3, \
3569 ._3DCommandOpcode = 0, \
3570 ._3DCommandSubOpcode = 24, \
3573 struct GEN75_3DSTATE_SAMPLE_MASK
{
3574 uint32_t CommandType
;
3575 uint32_t CommandSubType
;
3576 uint32_t _3DCommandOpcode
;
3577 uint32_t _3DCommandSubOpcode
;
3578 uint32_t DwordLength
;
3579 uint32_t SampleMask
;
3583 GEN75_3DSTATE_SAMPLE_MASK_pack(__gen_user_data
*data
, void * restrict dst
,
3584 const struct GEN75_3DSTATE_SAMPLE_MASK
* restrict values
)
3586 uint32_t *dw
= (uint32_t * restrict
) dst
;
3589 __gen_field(values
->CommandType
, 29, 31) |
3590 __gen_field(values
->CommandSubType
, 27, 28) |
3591 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
3592 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
3593 __gen_field(values
->DwordLength
, 0, 7) |
3597 __gen_field(values
->SampleMask
, 0, 7) |
3602 #define GEN75_3DSTATE_SBE_length 0x0000000e
3603 #define GEN75_3DSTATE_SBE_length_bias 0x00000002
3604 #define GEN75_3DSTATE_SBE_header \
3606 .CommandSubType = 3, \
3607 ._3DCommandOpcode = 0, \
3608 ._3DCommandSubOpcode = 31, \
3611 struct GEN75_3DSTATE_SBE
{
3612 uint32_t CommandType
;
3613 uint32_t CommandSubType
;
3614 uint32_t _3DCommandOpcode
;
3615 uint32_t _3DCommandSubOpcode
;
3616 uint32_t DwordLength
;
3617 uint32_t AttributeSwizzleControlMode
;
3618 uint32_t NumberofSFOutputAttributes
;
3619 uint32_t AttributeSwizzleEnable
;
3622 uint32_t PointSpriteTextureCoordinateOrigin
;
3623 uint32_t VertexURBEntryReadLength
;
3624 uint32_t VertexURBEntryReadOffset
;
3625 uint32_t Attribute2n1ComponentOverrideW
;
3626 uint32_t Attribute2n1ComponentOverrideZ
;
3627 uint32_t Attribute2n1ComponentOverrideY
;
3628 uint32_t Attribute2n1ComponentOverrideX
;
3629 #define CONST_0000 0
3630 #define CONST_0001_FLOAT 1
3631 #define CONST_1111_FLOAT 2
3633 uint32_t Attribute2n1ConstantSource
;
3635 #define INPUTATTR_FACING 1
3636 #define INPUTATTR_W 2
3637 #define INPUTATTR_FACING_W 3
3638 uint32_t Attribute2n1SwizzleSelect
;
3639 uint32_t Attribute2n1SourceAttribute
;
3640 uint32_t Attribute2nComponentOverrideW
;
3641 uint32_t Attribute2nComponentOverrideZ
;
3642 uint32_t Attribute2nComponentOverrideY
;
3643 uint32_t Attribute2nComponentOverrideX
;
3644 #define CONST_0000 0
3645 #define CONST_0001_FLOAT 1
3646 #define CONST_1111_FLOAT 2
3648 uint32_t Attribute2nConstantSource
;
3650 #define INPUTATTR_FACING 1
3651 #define INPUTATTR_W 2
3652 #define INPUTATTR_FACING_W 3
3653 uint32_t Attribute2nSwizzleSelect
;
3654 uint32_t Attribute2nSourceAttribute
;
3655 uint32_t PointSpriteTextureCoordinateEnable
;
3656 uint32_t ConstantInterpolationEnable310
;
3657 uint32_t Attribute7WrapShortestEnables
;
3658 uint32_t Attribute6WrapShortestEnables
;
3659 uint32_t Attribute5WrapShortestEnables
;
3660 uint32_t Attribute4WrapShortestEnables
;
3661 uint32_t Attribute3WrapShortestEnables
;
3662 uint32_t Attribute2WrapShortestEnables
;
3663 uint32_t Attribute1WrapShortestEnables
;
3664 uint32_t Attribute0WrapShortestEnables
;
3665 uint32_t Attribute15WrapShortestEnables
;
3666 uint32_t Attribute14WrapShortestEnables
;
3667 uint32_t Attribute13WrapShortestEnables
;
3668 uint32_t Attribute12WrapShortestEnables
;
3669 uint32_t Attribute11WrapShortestEnables
;
3670 uint32_t Attribute10WrapShortestEnables
;
3671 uint32_t Attribute9WrapShortestEnables
;
3672 uint32_t Attribute8WrapShortestEnables
;
3676 GEN75_3DSTATE_SBE_pack(__gen_user_data
*data
, void * restrict dst
,
3677 const struct GEN75_3DSTATE_SBE
* restrict values
)
3679 uint32_t *dw
= (uint32_t * restrict
) dst
;
3682 __gen_field(values
->CommandType
, 29, 31) |
3683 __gen_field(values
->CommandSubType
, 27, 28) |
3684 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
3685 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
3686 __gen_field(values
->DwordLength
, 0, 7) |
3690 __gen_field(values
->AttributeSwizzleControlMode
, 28, 28) |
3691 __gen_field(values
->NumberofSFOutputAttributes
, 22, 27) |
3692 __gen_field(values
->AttributeSwizzleEnable
, 21, 21) |
3693 __gen_field(values
->PointSpriteTextureCoordinateOrigin
, 20, 20) |
3694 __gen_field(values
->VertexURBEntryReadLength
, 11, 15) |
3695 __gen_field(values
->VertexURBEntryReadOffset
, 4, 9) |
3699 __gen_field(values
->Attribute2n1ComponentOverrideW
, 31, 31) |
3700 __gen_field(values
->Attribute2n1ComponentOverrideZ
, 30, 30) |
3701 __gen_field(values
->Attribute2n1ComponentOverrideY
, 29, 29) |
3702 __gen_field(values
->Attribute2n1ComponentOverrideX
, 28, 28) |
3703 __gen_field(values
->Attribute2n1ConstantSource
, 25, 26) |
3704 __gen_field(values
->Attribute2n1SwizzleSelect
, 22, 23) |
3705 __gen_field(values
->Attribute2n1SourceAttribute
, 16, 20) |
3706 __gen_field(values
->Attribute2nComponentOverrideW
, 15, 15) |
3707 __gen_field(values
->Attribute2nComponentOverrideZ
, 14, 14) |
3708 __gen_field(values
->Attribute2nComponentOverrideY
, 13, 13) |
3709 __gen_field(values
->Attribute2nComponentOverrideX
, 12, 12) |
3710 __gen_field(values
->Attribute2nConstantSource
, 9, 10) |
3711 __gen_field(values
->Attribute2nSwizzleSelect
, 6, 7) |
3712 __gen_field(values
->Attribute2nSourceAttribute
, 0, 4) |
3716 __gen_field(values
->PointSpriteTextureCoordinateEnable
, 0, 31) |
3720 __gen_field(values
->ConstantInterpolationEnable310
, 0, 31) |
3724 __gen_field(values
->Attribute7WrapShortestEnables
, 28, 31) |
3725 __gen_field(values
->Attribute6WrapShortestEnables
, 24, 27) |
3726 __gen_field(values
->Attribute5WrapShortestEnables
, 20, 23) |
3727 __gen_field(values
->Attribute4WrapShortestEnables
, 16, 19) |
3728 __gen_field(values
->Attribute3WrapShortestEnables
, 12, 15) |
3729 __gen_field(values
->Attribute2WrapShortestEnables
, 8, 11) |
3730 __gen_field(values
->Attribute1WrapShortestEnables
, 4, 7) |
3731 __gen_field(values
->Attribute0WrapShortestEnables
, 0, 3) |
3735 __gen_field(values
->Attribute15WrapShortestEnables
, 28, 31) |
3736 __gen_field(values
->Attribute14WrapShortestEnables
, 24, 27) |
3737 __gen_field(values
->Attribute13WrapShortestEnables
, 20, 23) |
3738 __gen_field(values
->Attribute12WrapShortestEnables
, 16, 19) |
3739 __gen_field(values
->Attribute11WrapShortestEnables
, 12, 15) |
3740 __gen_field(values
->Attribute10WrapShortestEnables
, 8, 11) |
3741 __gen_field(values
->Attribute9WrapShortestEnables
, 4, 7) |
3742 __gen_field(values
->Attribute8WrapShortestEnables
, 0, 3) |
3747 #define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_length 0x00000002
3748 #define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_length_bias 0x00000002
3749 #define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_header\
3751 .CommandSubType = 3, \
3752 ._3DCommandOpcode = 0, \
3753 ._3DCommandSubOpcode = 15, \
3756 struct GEN75_3DSTATE_SCISSOR_STATE_POINTERS
{
3757 uint32_t CommandType
;
3758 uint32_t CommandSubType
;
3759 uint32_t _3DCommandOpcode
;
3760 uint32_t _3DCommandSubOpcode
;
3761 uint32_t DwordLength
;
3762 uint32_t ScissorRectPointer
;
3766 GEN75_3DSTATE_SCISSOR_STATE_POINTERS_pack(__gen_user_data
*data
, void * restrict dst
,
3767 const struct GEN75_3DSTATE_SCISSOR_STATE_POINTERS
* restrict values
)
3769 uint32_t *dw
= (uint32_t * restrict
) dst
;
3772 __gen_field(values
->CommandType
, 29, 31) |
3773 __gen_field(values
->CommandSubType
, 27, 28) |
3774 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
3775 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
3776 __gen_field(values
->DwordLength
, 0, 7) |
3780 __gen_offset(values
->ScissorRectPointer
, 5, 31) |
3785 #define GEN75_3DSTATE_SF_length 0x00000007
3786 #define GEN75_3DSTATE_SF_length_bias 0x00000002
3787 #define GEN75_3DSTATE_SF_header \
3789 .CommandSubType = 3, \
3790 ._3DCommandOpcode = 0, \
3791 ._3DCommandSubOpcode = 19, \
3794 struct GEN75_3DSTATE_SF
{
3795 uint32_t CommandType
;
3796 uint32_t CommandSubType
;
3797 uint32_t _3DCommandOpcode
;
3798 uint32_t _3DCommandSubOpcode
;
3799 uint32_t DwordLength
;
3800 #define D32_FLOAT_S8X24_UINT 0
3802 #define D24_UNORM_S8_UINT 2
3803 #define D24_UNORM_X8_UINT 3
3805 uint32_t DepthBufferSurfaceFormat
;
3806 uint32_t LegacyGlobalDepthBiasEnable
;
3807 uint32_t StatisticsEnable
;
3808 uint32_t GlobalDepthOffsetEnableSolid
;
3809 uint32_t GlobalDepthOffsetEnableWireframe
;
3810 uint32_t GlobalDepthOffsetEnablePoint
;
3811 #define RASTER_SOLID 0
3812 #define RASTER_WIREFRAME 1
3813 #define RASTER_POINT 2
3814 uint32_t FrontFaceFillMode
;
3815 #define RASTER_SOLID 0
3816 #define RASTER_WIREFRAME 1
3817 #define RASTER_POINT 2
3818 uint32_t BackFaceFillMode
;
3819 uint32_t ViewTransformEnable
;
3820 uint32_t FrontWinding
;
3821 uint32_t AntiAliasingEnable
;
3822 #define CULLMODE_BOTH 0
3823 #define CULLMODE_NONE 1
3824 #define CULLMODE_FRONT 2
3825 #define CULLMODE_BACK 3
3828 uint32_t LineEndCapAntialiasingRegionWidth
;
3829 uint32_t LineStippleEnable
;
3830 uint32_t ScissorRectangleEnable
;
3831 uint32_t RTIndependentRasterizationEnable
;
3832 uint32_t MultisampleRasterizationMode
;
3833 uint32_t LastPixelEnable
;
3837 uint32_t TriangleStripListProvokingVertexSelect
;
3838 uint32_t LineStripListProvokingVertexSelect
;
3842 uint32_t TriangleFanProvokingVertexSelect
;
3843 #define AALINEDISTANCE_TRUE 1
3844 uint32_t AALineDistanceMode
;
3845 uint32_t VertexSubPixelPrecisionSelect
;
3846 uint32_t UsePointWidthState
;
3848 uint32_t GlobalDepthOffsetConstant
;
3849 uint32_t GlobalDepthOffsetScale
;
3850 uint32_t GlobalDepthOffsetClamp
;
3854 GEN75_3DSTATE_SF_pack(__gen_user_data
*data
, void * restrict dst
,
3855 const struct GEN75_3DSTATE_SF
* restrict values
)
3857 uint32_t *dw
= (uint32_t * restrict
) dst
;
3860 __gen_field(values
->CommandType
, 29, 31) |
3861 __gen_field(values
->CommandSubType
, 27, 28) |
3862 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
3863 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
3864 __gen_field(values
->DwordLength
, 0, 7) |
3868 __gen_field(values
->DepthBufferSurfaceFormat
, 12, 14) |
3869 __gen_field(values
->LegacyGlobalDepthBiasEnable
, 11, 11) |
3870 __gen_field(values
->StatisticsEnable
, 10, 10) |
3871 __gen_field(values
->GlobalDepthOffsetEnableSolid
, 9, 9) |
3872 __gen_field(values
->GlobalDepthOffsetEnableWireframe
, 8, 8) |
3873 __gen_field(values
->GlobalDepthOffsetEnablePoint
, 7, 7) |
3874 __gen_field(values
->FrontFaceFillMode
, 5, 6) |
3875 __gen_field(values
->BackFaceFillMode
, 3, 4) |
3876 __gen_field(values
->ViewTransformEnable
, 1, 1) |
3877 __gen_field(values
->FrontWinding
, 0, 0) |
3881 __gen_field(values
->AntiAliasingEnable
, 31, 31) |
3882 __gen_field(values
->CullMode
, 29, 30) |
3883 __gen_field(values
->LineWidth
* (1 << 7), 18, 27) |
3884 __gen_field(values
->LineEndCapAntialiasingRegionWidth
, 16, 17) |
3885 __gen_field(values
->LineStippleEnable
, 14, 14) |
3886 __gen_field(values
->ScissorRectangleEnable
, 11, 11) |
3887 __gen_field(values
->RTIndependentRasterizationEnable
, 10, 10) |
3888 __gen_field(values
->MultisampleRasterizationMode
, 8, 9) |
3892 __gen_field(values
->LastPixelEnable
, 31, 31) |
3893 __gen_field(values
->TriangleStripListProvokingVertexSelect
, 29, 30) |
3894 __gen_field(values
->LineStripListProvokingVertexSelect
, 27, 28) |
3895 __gen_field(values
->TriangleFanProvokingVertexSelect
, 25, 26) |
3896 __gen_field(values
->AALineDistanceMode
, 14, 14) |
3897 __gen_field(values
->VertexSubPixelPrecisionSelect
, 12, 12) |
3898 __gen_field(values
->UsePointWidthState
, 11, 11) |
3899 __gen_field(values
->PointWidth
* (1 << 3), 0, 10) |
3903 __gen_field(values
->GlobalDepthOffsetConstant
, 0, 31) |
3907 __gen_field(values
->GlobalDepthOffsetScale
, 0, 31) |
3911 __gen_field(values
->GlobalDepthOffsetClamp
, 0, 31) |
3916 #define GEN75_3DSTATE_SO_BUFFER_length 0x00000004
3917 #define GEN75_3DSTATE_SO_BUFFER_length_bias 0x00000002
3918 #define GEN75_3DSTATE_SO_BUFFER_header \
3920 .CommandSubType = 3, \
3921 ._3DCommandOpcode = 1, \
3922 ._3DCommandSubOpcode = 24, \
3925 struct GEN75_3DSTATE_SO_BUFFER
{
3926 uint32_t CommandType
;
3927 uint32_t CommandSubType
;
3928 uint32_t _3DCommandOpcode
;
3929 uint32_t _3DCommandSubOpcode
;
3930 uint32_t DwordLength
;
3931 uint32_t SOBufferIndex
;
3932 struct GEN75_MEMORY_OBJECT_CONTROL_STATE SOBufferObjectControlState
;
3933 uint32_t SurfacePitch
;
3934 __gen_address_type SurfaceBaseAddress
;
3935 __gen_address_type SurfaceEndAddress
;
3939 GEN75_3DSTATE_SO_BUFFER_pack(__gen_user_data
*data
, void * restrict dst
,
3940 const struct GEN75_3DSTATE_SO_BUFFER
* restrict values
)
3942 uint32_t *dw
= (uint32_t * restrict
) dst
;
3945 __gen_field(values
->CommandType
, 29, 31) |
3946 __gen_field(values
->CommandSubType
, 27, 28) |
3947 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
3948 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
3949 __gen_field(values
->DwordLength
, 0, 7) |
3952 uint32_t dw_SOBufferObjectControlState
;
3953 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data
, &dw_SOBufferObjectControlState
, &values
->SOBufferObjectControlState
);
3955 __gen_field(values
->SOBufferIndex
, 29, 30) |
3956 __gen_field(dw_SOBufferObjectControlState
, 25, 28) |
3957 __gen_field(values
->SurfacePitch
, 0, 11) |
3964 __gen_combine_address(data
, &dw
[2], values
->SurfaceBaseAddress
, dw2
);
3970 __gen_combine_address(data
, &dw
[3], values
->SurfaceEndAddress
, dw3
);
3974 #define GEN75_3DSTATE_SO_DECL_LIST_length_bias 0x00000002
3975 #define GEN75_3DSTATE_SO_DECL_LIST_header \
3977 .CommandSubType = 3, \
3978 ._3DCommandOpcode = 1, \
3979 ._3DCommandSubOpcode = 23
3981 struct GEN75_SO_DECL
{
3982 uint32_t OutputBufferSlot
;
3984 uint32_t RegisterIndex
;
3985 uint32_t ComponentMask
;
3989 GEN75_SO_DECL_pack(__gen_user_data
*data
, void * restrict dst
,
3990 const struct GEN75_SO_DECL
* restrict values
)
3992 uint32_t *dw
= (uint32_t * restrict
) dst
;
3995 __gen_field(values
->OutputBufferSlot
, 12, 13) |
3996 __gen_field(values
->HoleFlag
, 11, 11) |
3997 __gen_field(values
->RegisterIndex
, 4, 9) |
3998 __gen_field(values
->ComponentMask
, 0, 3) |
4003 struct GEN75_SO_DECL_ENTRY
{
4004 struct GEN75_SO_DECL Stream3Decl
;
4005 struct GEN75_SO_DECL Stream2Decl
;
4006 struct GEN75_SO_DECL Stream1Decl
;
4007 struct GEN75_SO_DECL Stream0Decl
;
4011 GEN75_SO_DECL_ENTRY_pack(__gen_user_data
*data
, void * restrict dst
,
4012 const struct GEN75_SO_DECL_ENTRY
* restrict values
)
4014 uint32_t *dw
= (uint32_t * restrict
) dst
;
4016 uint32_t dw_Stream3Decl
;
4017 GEN75_SO_DECL_pack(data
, &dw_Stream3Decl
, &values
->Stream3Decl
);
4018 uint32_t dw_Stream2Decl
;
4019 GEN75_SO_DECL_pack(data
, &dw_Stream2Decl
, &values
->Stream2Decl
);
4020 uint32_t dw_Stream1Decl
;
4021 GEN75_SO_DECL_pack(data
, &dw_Stream1Decl
, &values
->Stream1Decl
);
4022 uint32_t dw_Stream0Decl
;
4023 GEN75_SO_DECL_pack(data
, &dw_Stream0Decl
, &values
->Stream0Decl
);
4025 __gen_field(dw_Stream3Decl
, 48, 63) |
4026 __gen_field(dw_Stream2Decl
, 32, 47) |
4027 __gen_field(dw_Stream1Decl
, 16, 31) |
4028 __gen_field(dw_Stream0Decl
, 0, 15) |
4036 struct GEN75_3DSTATE_SO_DECL_LIST
{
4037 uint32_t CommandType
;
4038 uint32_t CommandSubType
;
4039 uint32_t _3DCommandOpcode
;
4040 uint32_t _3DCommandSubOpcode
;
4041 uint32_t DwordLength
;
4042 uint32_t StreamtoBufferSelects3
;
4043 uint32_t StreamtoBufferSelects2
;
4044 uint32_t StreamtoBufferSelects1
;
4045 uint32_t StreamtoBufferSelects0
;
4046 uint32_t NumEntries3
;
4047 uint32_t NumEntries2
;
4048 uint32_t NumEntries1
;
4049 uint32_t NumEntries0
;
4050 /* variable length fields follow */
4054 GEN75_3DSTATE_SO_DECL_LIST_pack(__gen_user_data
*data
, void * restrict dst
,
4055 const struct GEN75_3DSTATE_SO_DECL_LIST
* restrict values
)
4057 uint32_t *dw
= (uint32_t * restrict
) dst
;
4060 __gen_field(values
->CommandType
, 29, 31) |
4061 __gen_field(values
->CommandSubType
, 27, 28) |
4062 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
4063 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
4064 __gen_field(values
->DwordLength
, 0, 8) |
4068 __gen_field(values
->StreamtoBufferSelects3
, 12, 15) |
4069 __gen_field(values
->StreamtoBufferSelects2
, 8, 11) |
4070 __gen_field(values
->StreamtoBufferSelects1
, 4, 7) |
4071 __gen_field(values
->StreamtoBufferSelects0
, 0, 3) |
4075 __gen_field(values
->NumEntries3
, 24, 31) |
4076 __gen_field(values
->NumEntries2
, 16, 23) |
4077 __gen_field(values
->NumEntries1
, 8, 15) |
4078 __gen_field(values
->NumEntries0
, 0, 7) |
4081 /* variable length fields follow */
4084 #define GEN75_3DSTATE_STENCIL_BUFFER_length 0x00000003
4085 #define GEN75_3DSTATE_STENCIL_BUFFER_length_bias 0x00000002
4086 #define GEN75_3DSTATE_STENCIL_BUFFER_header \
4088 .CommandSubType = 3, \
4089 ._3DCommandOpcode = 0, \
4090 ._3DCommandSubOpcode = 6, \
4093 struct GEN75_3DSTATE_STENCIL_BUFFER
{
4094 uint32_t CommandType
;
4095 uint32_t CommandSubType
;
4096 uint32_t _3DCommandOpcode
;
4097 uint32_t _3DCommandSubOpcode
;
4098 uint32_t DwordLength
;
4099 uint32_t StencilBufferEnable
;
4100 struct GEN75_MEMORY_OBJECT_CONTROL_STATE StencilBufferObjectControlState
;
4101 uint32_t SurfacePitch
;
4102 __gen_address_type SurfaceBaseAddress
;
4106 GEN75_3DSTATE_STENCIL_BUFFER_pack(__gen_user_data
*data
, void * restrict dst
,
4107 const struct GEN75_3DSTATE_STENCIL_BUFFER
* restrict values
)
4109 uint32_t *dw
= (uint32_t * restrict
) dst
;
4112 __gen_field(values
->CommandType
, 29, 31) |
4113 __gen_field(values
->CommandSubType
, 27, 28) |
4114 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
4115 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
4116 __gen_field(values
->DwordLength
, 0, 7) |
4119 uint32_t dw_StencilBufferObjectControlState
;
4120 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data
, &dw_StencilBufferObjectControlState
, &values
->StencilBufferObjectControlState
);
4122 __gen_field(values
->StencilBufferEnable
, 31, 31) |
4123 __gen_field(dw_StencilBufferObjectControlState
, 25, 28) |
4124 __gen_field(values
->SurfacePitch
, 0, 16) |
4131 __gen_combine_address(data
, &dw
[2], values
->SurfaceBaseAddress
, dw2
);
4135 #define GEN75_3DSTATE_STREAMOUT_length 0x00000003
4136 #define GEN75_3DSTATE_STREAMOUT_length_bias 0x00000002
4137 #define GEN75_3DSTATE_STREAMOUT_header \
4139 .CommandSubType = 3, \
4140 ._3DCommandOpcode = 0, \
4141 ._3DCommandSubOpcode = 30, \
4144 struct GEN75_3DSTATE_STREAMOUT
{
4145 uint32_t CommandType
;
4146 uint32_t CommandSubType
;
4147 uint32_t _3DCommandOpcode
;
4148 uint32_t _3DCommandSubOpcode
;
4149 uint32_t DwordLength
;
4150 uint32_t SOFunctionEnable
;
4151 uint32_t RenderingDisable
;
4152 uint32_t RenderStreamSelect
;
4155 uint32_t ReorderMode
;
4156 uint32_t SOStatisticsEnable
;
4157 uint32_t SOBufferEnable3
;
4158 uint32_t SOBufferEnable2
;
4159 uint32_t SOBufferEnable1
;
4160 uint32_t SOBufferEnable0
;
4161 uint32_t Stream3VertexReadOffset
;
4162 uint32_t Stream3VertexReadLength
;
4163 uint32_t Stream2VertexReadOffset
;
4164 uint32_t Stream2VertexReadLength
;
4165 uint32_t Stream1VertexReadOffset
;
4166 uint32_t Stream1VertexReadLength
;
4167 uint32_t Stream0VertexReadOffset
;
4168 uint32_t Stream0VertexReadLength
;
4172 GEN75_3DSTATE_STREAMOUT_pack(__gen_user_data
*data
, void * restrict dst
,
4173 const struct GEN75_3DSTATE_STREAMOUT
* restrict values
)
4175 uint32_t *dw
= (uint32_t * restrict
) dst
;
4178 __gen_field(values
->CommandType
, 29, 31) |
4179 __gen_field(values
->CommandSubType
, 27, 28) |
4180 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
4181 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
4182 __gen_field(values
->DwordLength
, 0, 7) |
4186 __gen_field(values
->SOFunctionEnable
, 31, 31) |
4187 __gen_field(values
->RenderingDisable
, 30, 30) |
4188 __gen_field(values
->RenderStreamSelect
, 27, 28) |
4189 __gen_field(values
->ReorderMode
, 26, 26) |
4190 __gen_field(values
->SOStatisticsEnable
, 25, 25) |
4191 __gen_field(values
->SOBufferEnable3
, 11, 11) |
4192 __gen_field(values
->SOBufferEnable2
, 10, 10) |
4193 __gen_field(values
->SOBufferEnable1
, 9, 9) |
4194 __gen_field(values
->SOBufferEnable0
, 8, 8) |
4198 __gen_field(values
->Stream3VertexReadOffset
, 29, 29) |
4199 __gen_field(values
->Stream3VertexReadLength
, 24, 28) |
4200 __gen_field(values
->Stream2VertexReadOffset
, 21, 21) |
4201 __gen_field(values
->Stream2VertexReadLength
, 16, 20) |
4202 __gen_field(values
->Stream1VertexReadOffset
, 13, 13) |
4203 __gen_field(values
->Stream1VertexReadLength
, 8, 12) |
4204 __gen_field(values
->Stream0VertexReadOffset
, 5, 5) |
4205 __gen_field(values
->Stream0VertexReadLength
, 0, 4) |
4210 #define GEN75_3DSTATE_TE_length 0x00000004
4211 #define GEN75_3DSTATE_TE_length_bias 0x00000002
4212 #define GEN75_3DSTATE_TE_header \
4214 .CommandSubType = 3, \
4215 ._3DCommandOpcode = 0, \
4216 ._3DCommandSubOpcode = 28, \
4219 struct GEN75_3DSTATE_TE
{
4220 uint32_t CommandType
;
4221 uint32_t CommandSubType
;
4222 uint32_t _3DCommandOpcode
;
4223 uint32_t _3DCommandSubOpcode
;
4224 uint32_t DwordLength
;
4226 #define ODD_FRACTIONAL 1
4227 #define EVEN_FRACTIONAL 2
4228 uint32_t Partitioning
;
4233 uint32_t OutputTopology
;
4242 float MaximumTessellationFactorOdd
;
4243 float MaximumTessellationFactorNotOdd
;
4247 GEN75_3DSTATE_TE_pack(__gen_user_data
*data
, void * restrict dst
,
4248 const struct GEN75_3DSTATE_TE
* restrict values
)
4250 uint32_t *dw
= (uint32_t * restrict
) dst
;
4253 __gen_field(values
->CommandType
, 29, 31) |
4254 __gen_field(values
->CommandSubType
, 27, 28) |
4255 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
4256 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
4257 __gen_field(values
->DwordLength
, 0, 7) |
4261 __gen_field(values
->Partitioning
, 12, 13) |
4262 __gen_field(values
->OutputTopology
, 8, 9) |
4263 __gen_field(values
->TEDomain
, 4, 5) |
4264 __gen_field(values
->TEMode
, 1, 2) |
4265 __gen_field(values
->TEEnable
, 0, 0) |
4269 __gen_float(values
->MaximumTessellationFactorOdd
) |
4273 __gen_float(values
->MaximumTessellationFactorNotOdd
) |
4278 #define GEN75_3DSTATE_URB_DS_length 0x00000002
4279 #define GEN75_3DSTATE_URB_DS_length_bias 0x00000002
4280 #define GEN75_3DSTATE_URB_DS_header \
4282 .CommandSubType = 3, \
4283 ._3DCommandOpcode = 0, \
4284 ._3DCommandSubOpcode = 50, \
4287 struct GEN75_3DSTATE_URB_DS
{
4288 uint32_t CommandType
;
4289 uint32_t CommandSubType
;
4290 uint32_t _3DCommandOpcode
;
4291 uint32_t _3DCommandSubOpcode
;
4292 uint32_t DwordLength
;
4293 uint32_t DSURBStartingAddress
;
4294 uint32_t DSURBEntryAllocationSize
;
4295 uint32_t DSNumberofURBEntries
;
4299 GEN75_3DSTATE_URB_DS_pack(__gen_user_data
*data
, void * restrict dst
,
4300 const struct GEN75_3DSTATE_URB_DS
* restrict values
)
4302 uint32_t *dw
= (uint32_t * restrict
) dst
;
4305 __gen_field(values
->CommandType
, 29, 31) |
4306 __gen_field(values
->CommandSubType
, 27, 28) |
4307 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
4308 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
4309 __gen_field(values
->DwordLength
, 0, 7) |
4313 __gen_field(values
->DSURBStartingAddress
, 25, 30) |
4314 __gen_field(values
->DSURBEntryAllocationSize
, 16, 24) |
4315 __gen_field(values
->DSNumberofURBEntries
, 0, 15) |
4320 #define GEN75_3DSTATE_URB_GS_length 0x00000002
4321 #define GEN75_3DSTATE_URB_GS_length_bias 0x00000002
4322 #define GEN75_3DSTATE_URB_GS_header \
4324 .CommandSubType = 3, \
4325 ._3DCommandOpcode = 0, \
4326 ._3DCommandSubOpcode = 51, \
4329 struct GEN75_3DSTATE_URB_GS
{
4330 uint32_t CommandType
;
4331 uint32_t CommandSubType
;
4332 uint32_t _3DCommandOpcode
;
4333 uint32_t _3DCommandSubOpcode
;
4334 uint32_t DwordLength
;
4335 uint32_t GSURBStartingAddress
;
4336 uint32_t GSURBEntryAllocationSize
;
4337 uint32_t GSNumberofURBEntries
;
4341 GEN75_3DSTATE_URB_GS_pack(__gen_user_data
*data
, void * restrict dst
,
4342 const struct GEN75_3DSTATE_URB_GS
* restrict values
)
4344 uint32_t *dw
= (uint32_t * restrict
) dst
;
4347 __gen_field(values
->CommandType
, 29, 31) |
4348 __gen_field(values
->CommandSubType
, 27, 28) |
4349 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
4350 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
4351 __gen_field(values
->DwordLength
, 0, 7) |
4355 __gen_field(values
->GSURBStartingAddress
, 25, 30) |
4356 __gen_field(values
->GSURBEntryAllocationSize
, 16, 24) |
4357 __gen_field(values
->GSNumberofURBEntries
, 0, 15) |
4362 #define GEN75_3DSTATE_URB_HS_length 0x00000002
4363 #define GEN75_3DSTATE_URB_HS_length_bias 0x00000002
4364 #define GEN75_3DSTATE_URB_HS_header \
4366 .CommandSubType = 3, \
4367 ._3DCommandOpcode = 0, \
4368 ._3DCommandSubOpcode = 49, \
4371 struct GEN75_3DSTATE_URB_HS
{
4372 uint32_t CommandType
;
4373 uint32_t CommandSubType
;
4374 uint32_t _3DCommandOpcode
;
4375 uint32_t _3DCommandSubOpcode
;
4376 uint32_t DwordLength
;
4377 uint32_t HSURBStartingAddress
;
4378 uint32_t HSURBEntryAllocationSize
;
4379 uint32_t HSNumberofURBEntries
;
4383 GEN75_3DSTATE_URB_HS_pack(__gen_user_data
*data
, void * restrict dst
,
4384 const struct GEN75_3DSTATE_URB_HS
* restrict values
)
4386 uint32_t *dw
= (uint32_t * restrict
) dst
;
4389 __gen_field(values
->CommandType
, 29, 31) |
4390 __gen_field(values
->CommandSubType
, 27, 28) |
4391 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
4392 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
4393 __gen_field(values
->DwordLength
, 0, 7) |
4397 __gen_field(values
->HSURBStartingAddress
, 25, 30) |
4398 __gen_field(values
->HSURBEntryAllocationSize
, 16, 24) |
4399 __gen_field(values
->HSNumberofURBEntries
, 0, 15) |
4404 #define GEN75_3DSTATE_VERTEX_BUFFERS_length_bias 0x00000002
4405 #define GEN75_3DSTATE_VERTEX_BUFFERS_header \
4407 .CommandSubType = 3, \
4408 ._3DCommandOpcode = 0, \
4409 ._3DCommandSubOpcode = 8
4411 struct GEN75_VERTEX_BUFFER_STATE
{
4412 uint32_t VertexBufferIndex
;
4413 #define VERTEXDATA 0
4414 #define INSTANCEDATA 1
4415 uint32_t BufferAccessType
;
4416 struct GEN75_MEMORY_OBJECT_CONTROL_STATE VertexBufferMemoryObjectControlState
;
4417 uint32_t AddressModifyEnable
;
4418 uint32_t NullVertexBuffer
;
4419 uint32_t VertexFetchInvalidate
;
4420 uint32_t BufferPitch
;
4421 __gen_address_type BufferStartingAddress
;
4422 __gen_address_type EndAddress
;
4423 uint32_t InstanceDataStepRate
;
4427 GEN75_VERTEX_BUFFER_STATE_pack(__gen_user_data
*data
, void * restrict dst
,
4428 const struct GEN75_VERTEX_BUFFER_STATE
* restrict values
)
4430 uint32_t *dw
= (uint32_t * restrict
) dst
;
4432 uint32_t dw_VertexBufferMemoryObjectControlState
;
4433 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data
, &dw_VertexBufferMemoryObjectControlState
, &values
->VertexBufferMemoryObjectControlState
);
4435 __gen_field(values
->VertexBufferIndex
, 26, 31) |
4436 __gen_field(values
->BufferAccessType
, 20, 20) |
4437 __gen_field(dw_VertexBufferMemoryObjectControlState
, 16, 19) |
4438 __gen_field(values
->AddressModifyEnable
, 14, 14) |
4439 __gen_field(values
->NullVertexBuffer
, 13, 13) |
4440 __gen_field(values
->VertexFetchInvalidate
, 12, 12) |
4441 __gen_field(values
->BufferPitch
, 0, 11) |
4448 __gen_combine_address(data
, &dw
[1], values
->BufferStartingAddress
, dw1
);
4454 __gen_combine_address(data
, &dw
[2], values
->EndAddress
, dw2
);
4457 __gen_field(values
->InstanceDataStepRate
, 0, 31) |
4462 struct GEN75_3DSTATE_VERTEX_BUFFERS
{
4463 uint32_t CommandType
;
4464 uint32_t CommandSubType
;
4465 uint32_t _3DCommandOpcode
;
4466 uint32_t _3DCommandSubOpcode
;
4467 uint32_t DwordLength
;
4468 /* variable length fields follow */
4472 GEN75_3DSTATE_VERTEX_BUFFERS_pack(__gen_user_data
*data
, void * restrict dst
,
4473 const struct GEN75_3DSTATE_VERTEX_BUFFERS
* restrict values
)
4475 uint32_t *dw
= (uint32_t * restrict
) dst
;
4478 __gen_field(values
->CommandType
, 29, 31) |
4479 __gen_field(values
->CommandSubType
, 27, 28) |
4480 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
4481 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
4482 __gen_field(values
->DwordLength
, 0, 7) |
4485 /* variable length fields follow */
4488 #define GEN75_3DSTATE_VERTEX_ELEMENTS_length_bias 0x00000002
4489 #define GEN75_3DSTATE_VERTEX_ELEMENTS_header \
4491 .CommandSubType = 3, \
4492 ._3DCommandOpcode = 0, \
4493 ._3DCommandSubOpcode = 9
4495 struct GEN75_VERTEX_ELEMENT_STATE
{
4496 uint32_t VertexBufferIndex
;
4498 uint32_t SourceElementFormat
;
4499 uint32_t EdgeFlagEnable
;
4500 uint32_t SourceElementOffset
;
4501 uint32_t Component0Control
;
4502 uint32_t Component1Control
;
4503 uint32_t Component2Control
;
4504 uint32_t Component3Control
;
4508 GEN75_VERTEX_ELEMENT_STATE_pack(__gen_user_data
*data
, void * restrict dst
,
4509 const struct GEN75_VERTEX_ELEMENT_STATE
* restrict values
)
4511 uint32_t *dw
= (uint32_t * restrict
) dst
;
4514 __gen_field(values
->VertexBufferIndex
, 26, 31) |
4515 __gen_field(values
->Valid
, 25, 25) |
4516 __gen_field(values
->SourceElementFormat
, 16, 24) |
4517 __gen_field(values
->EdgeFlagEnable
, 15, 15) |
4518 __gen_field(values
->SourceElementOffset
, 0, 11) |
4522 __gen_field(values
->Component0Control
, 28, 30) |
4523 __gen_field(values
->Component1Control
, 24, 26) |
4524 __gen_field(values
->Component2Control
, 20, 22) |
4525 __gen_field(values
->Component3Control
, 16, 18) |
4530 struct GEN75_3DSTATE_VERTEX_ELEMENTS
{
4531 uint32_t CommandType
;
4532 uint32_t CommandSubType
;
4533 uint32_t _3DCommandOpcode
;
4534 uint32_t _3DCommandSubOpcode
;
4535 uint32_t DwordLength
;
4536 /* variable length fields follow */
4540 GEN75_3DSTATE_VERTEX_ELEMENTS_pack(__gen_user_data
*data
, void * restrict dst
,
4541 const struct GEN75_3DSTATE_VERTEX_ELEMENTS
* restrict values
)
4543 uint32_t *dw
= (uint32_t * restrict
) dst
;
4546 __gen_field(values
->CommandType
, 29, 31) |
4547 __gen_field(values
->CommandSubType
, 27, 28) |
4548 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
4549 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
4550 __gen_field(values
->DwordLength
, 0, 7) |
4553 /* variable length fields follow */
4556 #define GEN75_3DSTATE_VF_length 0x00000002
4557 #define GEN75_3DSTATE_VF_length_bias 0x00000002
4558 #define GEN75_3DSTATE_VF_header \
4560 .CommandSubType = 3, \
4561 ._3DCommandOpcode = 0, \
4562 ._3DCommandSubOpcode = 12, \
4565 struct GEN75_3DSTATE_VF
{
4566 uint32_t CommandType
;
4567 uint32_t CommandSubType
;
4568 uint32_t _3DCommandOpcode
;
4569 uint32_t _3DCommandSubOpcode
;
4570 uint32_t IndexedDrawCutIndexEnable
;
4571 uint32_t DwordLength
;
4576 GEN75_3DSTATE_VF_pack(__gen_user_data
*data
, void * restrict dst
,
4577 const struct GEN75_3DSTATE_VF
* restrict values
)
4579 uint32_t *dw
= (uint32_t * restrict
) dst
;
4582 __gen_field(values
->CommandType
, 29, 31) |
4583 __gen_field(values
->CommandSubType
, 27, 28) |
4584 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
4585 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
4586 __gen_field(values
->IndexedDrawCutIndexEnable
, 8, 8) |
4587 __gen_field(values
->DwordLength
, 0, 7) |
4591 __gen_field(values
->CutIndex
, 0, 31) |
4596 #define GEN75_3DSTATE_VF_STATISTICS_length 0x00000001
4597 #define GEN75_3DSTATE_VF_STATISTICS_length_bias 0x00000001
4598 #define GEN75_3DSTATE_VF_STATISTICS_header \
4600 .CommandSubType = 1, \
4601 ._3DCommandOpcode = 0, \
4602 ._3DCommandSubOpcode = 11
4604 struct GEN75_3DSTATE_VF_STATISTICS
{
4605 uint32_t CommandType
;
4606 uint32_t CommandSubType
;
4607 uint32_t _3DCommandOpcode
;
4608 uint32_t _3DCommandSubOpcode
;
4609 uint32_t StatisticsEnable
;
4613 GEN75_3DSTATE_VF_STATISTICS_pack(__gen_user_data
*data
, void * restrict dst
,
4614 const struct GEN75_3DSTATE_VF_STATISTICS
* restrict values
)
4616 uint32_t *dw
= (uint32_t * restrict
) dst
;
4619 __gen_field(values
->CommandType
, 29, 31) |
4620 __gen_field(values
->CommandSubType
, 27, 28) |
4621 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
4622 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
4623 __gen_field(values
->StatisticsEnable
, 0, 0) |
4628 #define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length 0x00000002
4629 #define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length_bias 0x00000002
4630 #define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_header\
4632 .CommandSubType = 3, \
4633 ._3DCommandOpcode = 0, \
4634 ._3DCommandSubOpcode = 35, \
4637 struct GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC
{
4638 uint32_t CommandType
;
4639 uint32_t CommandSubType
;
4640 uint32_t _3DCommandOpcode
;
4641 uint32_t _3DCommandSubOpcode
;
4642 uint32_t DwordLength
;
4643 uint32_t CCViewportPointer
;
4647 GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_pack(__gen_user_data
*data
, void * restrict dst
,
4648 const struct GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC
* restrict values
)
4650 uint32_t *dw
= (uint32_t * restrict
) dst
;
4653 __gen_field(values
->CommandType
, 29, 31) |
4654 __gen_field(values
->CommandSubType
, 27, 28) |
4655 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
4656 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
4657 __gen_field(values
->DwordLength
, 0, 7) |
4661 __gen_offset(values
->CCViewportPointer
, 5, 31) |
4666 #define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length 0x00000002
4667 #define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length_bias 0x00000002
4668 #define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_header\
4670 .CommandSubType = 3, \
4671 ._3DCommandOpcode = 0, \
4672 ._3DCommandSubOpcode = 33, \
4675 struct GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP
{
4676 uint32_t CommandType
;
4677 uint32_t CommandSubType
;
4678 uint32_t _3DCommandOpcode
;
4679 uint32_t _3DCommandSubOpcode
;
4680 uint32_t DwordLength
;
4681 uint32_t SFClipViewportPointer
;
4685 GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_pack(__gen_user_data
*data
, void * restrict dst
,
4686 const struct GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP
* restrict values
)
4688 uint32_t *dw
= (uint32_t * restrict
) dst
;
4691 __gen_field(values
->CommandType
, 29, 31) |
4692 __gen_field(values
->CommandSubType
, 27, 28) |
4693 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
4694 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
4695 __gen_field(values
->DwordLength
, 0, 7) |
4699 __gen_offset(values
->SFClipViewportPointer
, 6, 31) |
4704 #define GEN75_3DSTATE_VS_length 0x00000006
4705 #define GEN75_3DSTATE_VS_length_bias 0x00000002
4706 #define GEN75_3DSTATE_VS_header \
4708 .CommandSubType = 3, \
4709 ._3DCommandOpcode = 0, \
4710 ._3DCommandSubOpcode = 16, \
4713 struct GEN75_3DSTATE_VS
{
4714 uint32_t CommandType
;
4715 uint32_t CommandSubType
;
4716 uint32_t _3DCommandOpcode
;
4717 uint32_t _3DCommandSubOpcode
;
4718 uint32_t DwordLength
;
4719 uint32_t KernelStartPointer
;
4722 uint32_t SingleVertexDispatch
;
4725 uint32_t VectorMaskEnableVME
;
4726 #define NoSamplers 0
4727 #define _14Samplers 1
4728 #define _58Samplers 2
4729 #define _912Samplers 3
4730 #define _1316Samplers 4
4731 uint32_t SamplerCount
;
4732 uint32_t BindingTableEntryCount
;
4733 #define NormalPriority 0
4734 #define HighPriority 1
4735 uint32_t ThreadPriority
;
4738 uint32_t FloatingPointMode
;
4739 uint32_t IllegalOpcodeExceptionEnable
;
4740 uint32_t VSaccessesUAV
;
4741 uint32_t SoftwareExceptionEnable
;
4742 uint32_t ScratchSpaceBaseOffset
;
4743 uint32_t PerThreadScratchSpace
;
4744 uint32_t DispatchGRFStartRegisterforURBData
;
4745 uint32_t VertexURBEntryReadLength
;
4746 uint32_t VertexURBEntryReadOffset
;
4747 uint32_t MaximumNumberofThreads
;
4748 uint32_t StatisticsEnable
;
4749 uint32_t VertexCacheDisable
;
4750 uint32_t VSFunctionEnable
;
4754 GEN75_3DSTATE_VS_pack(__gen_user_data
*data
, void * restrict dst
,
4755 const struct GEN75_3DSTATE_VS
* restrict values
)
4757 uint32_t *dw
= (uint32_t * restrict
) dst
;
4760 __gen_field(values
->CommandType
, 29, 31) |
4761 __gen_field(values
->CommandSubType
, 27, 28) |
4762 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
4763 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
4764 __gen_field(values
->DwordLength
, 0, 7) |
4768 __gen_offset(values
->KernelStartPointer
, 6, 31) |
4772 __gen_field(values
->SingleVertexDispatch
, 31, 31) |
4773 __gen_field(values
->VectorMaskEnableVME
, 30, 30) |
4774 __gen_field(values
->SamplerCount
, 27, 29) |
4775 __gen_field(values
->BindingTableEntryCount
, 18, 25) |
4776 __gen_field(values
->ThreadPriority
, 17, 17) |
4777 __gen_field(values
->FloatingPointMode
, 16, 16) |
4778 __gen_field(values
->IllegalOpcodeExceptionEnable
, 13, 13) |
4779 __gen_field(values
->VSaccessesUAV
, 12, 12) |
4780 __gen_field(values
->SoftwareExceptionEnable
, 7, 7) |
4784 __gen_offset(values
->ScratchSpaceBaseOffset
, 10, 31) |
4785 __gen_field(values
->PerThreadScratchSpace
, 0, 3) |
4789 __gen_field(values
->DispatchGRFStartRegisterforURBData
, 20, 24) |
4790 __gen_field(values
->VertexURBEntryReadLength
, 11, 16) |
4791 __gen_field(values
->VertexURBEntryReadOffset
, 4, 9) |
4795 __gen_field(values
->MaximumNumberofThreads
, 23, 31) |
4796 __gen_field(values
->StatisticsEnable
, 10, 10) |
4797 __gen_field(values
->VertexCacheDisable
, 1, 1) |
4798 __gen_field(values
->VSFunctionEnable
, 0, 0) |
4803 #define GEN75_3DSTATE_WM_length 0x00000003
4804 #define GEN75_3DSTATE_WM_length_bias 0x00000002
4805 #define GEN75_3DSTATE_WM_header \
4807 .CommandSubType = 3, \
4808 ._3DCommandOpcode = 0, \
4809 ._3DCommandSubOpcode = 20, \
4812 struct GEN75_3DSTATE_WM
{
4813 uint32_t CommandType
;
4814 uint32_t CommandSubType
;
4815 uint32_t _3DCommandOpcode
;
4816 uint32_t _3DCommandSubOpcode
;
4817 uint32_t DwordLength
;
4818 uint32_t StatisticsEnable
;
4819 uint32_t DepthBufferClear
;
4820 uint32_t ThreadDispatchEnable
;
4821 uint32_t DepthBufferResolveEnable
;
4822 uint32_t HierarchicalDepthBufferResolveEnable
;
4823 uint32_t LegacyDiamondLineRasterization
;
4824 uint32_t PixelShaderKillPixel
;
4825 #define PSCDEPTH_OFF 0
4826 #define PSCDEPTH_ON 1
4827 #define PSCDEPTH_ON_GE 2
4828 #define PSCDEPTH_ON_LE 3
4829 uint32_t PixelShaderComputedDepthMode
;
4830 #define EDSC_NORMAL 0
4831 #define EDSC_PSEXEC 1
4832 #define EDSC_PREPS 2
4833 uint32_t EarlyDepthStencilControl
;
4834 uint32_t PixelShaderUsesSourceDepth
;
4835 uint32_t PixelShaderUsesSourceW
;
4836 #define INTERP_PIXEL 0
4837 #define INTERP_CENTROID 2
4838 #define INTERP_SAMPLE 3
4839 uint32_t PositionZWInterpolationMode
;
4840 uint32_t BarycentricInterpolationMode
;
4841 uint32_t PixelShaderUsesInputCoverageMask
;
4842 uint32_t LineEndCapAntialiasingRegionWidth
;
4843 uint32_t LineAntialiasingRegionWidth
;
4844 uint32_t RTIndependentRasterizationEnable
;
4845 uint32_t PolygonStippleEnable
;
4846 uint32_t LineStippleEnable
;
4847 #define RASTRULE_UPPER_LEFT 0
4848 #define RASTRULE_UPPER_RIGHT 1
4849 uint32_t PointRasterizationRule
;
4850 #define MSRASTMODE_OFF_PIXEL 0
4851 #define MSRASTMODE_OFF_PATTERN 1
4852 #define MSRASTMODE_ON_PIXEL 2
4853 #define MSRASTMODE_ON_PATTERN 3
4854 uint32_t MultisampleRasterizationMode
;
4855 #define MSDISPMODE_PERSAMPLE 0
4856 #define MSDISPMODE_PERPIXEL 1
4857 uint32_t MultisampleDispatchMode
;
4864 GEN75_3DSTATE_WM_pack(__gen_user_data
*data
, void * restrict dst
,
4865 const struct GEN75_3DSTATE_WM
* restrict values
)
4867 uint32_t *dw
= (uint32_t * restrict
) dst
;
4870 __gen_field(values
->CommandType
, 29, 31) |
4871 __gen_field(values
->CommandSubType
, 27, 28) |
4872 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
4873 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
4874 __gen_field(values
->DwordLength
, 0, 7) |
4878 __gen_field(values
->StatisticsEnable
, 31, 31) |
4879 __gen_field(values
->DepthBufferClear
, 30, 30) |
4880 __gen_field(values
->ThreadDispatchEnable
, 29, 29) |
4881 __gen_field(values
->DepthBufferResolveEnable
, 28, 28) |
4882 __gen_field(values
->HierarchicalDepthBufferResolveEnable
, 27, 27) |
4883 __gen_field(values
->LegacyDiamondLineRasterization
, 26, 26) |
4884 __gen_field(values
->PixelShaderKillPixel
, 25, 25) |
4885 __gen_field(values
->PixelShaderComputedDepthMode
, 23, 24) |
4886 __gen_field(values
->EarlyDepthStencilControl
, 21, 22) |
4887 __gen_field(values
->PixelShaderUsesSourceDepth
, 20, 20) |
4888 __gen_field(values
->PixelShaderUsesSourceW
, 19, 19) |
4889 __gen_field(values
->PositionZWInterpolationMode
, 17, 18) |
4890 __gen_field(values
->BarycentricInterpolationMode
, 11, 16) |
4891 __gen_field(values
->PixelShaderUsesInputCoverageMask
, 10, 10) |
4892 __gen_field(values
->LineEndCapAntialiasingRegionWidth
, 8, 9) |
4893 __gen_field(values
->LineAntialiasingRegionWidth
, 6, 7) |
4894 __gen_field(values
->RTIndependentRasterizationEnable
, 5, 5) |
4895 __gen_field(values
->PolygonStippleEnable
, 4, 4) |
4896 __gen_field(values
->LineStippleEnable
, 3, 3) |
4897 __gen_field(values
->PointRasterizationRule
, 2, 2) |
4898 __gen_field(values
->MultisampleRasterizationMode
, 0, 1) |
4902 __gen_field(values
->MultisampleDispatchMode
, 31, 31) |
4903 __gen_field(values
->PSUAVonly
, 30, 30) |
4908 #define GEN75_GPGPU_OBJECT_length 0x00000008
4909 #define GEN75_GPGPU_OBJECT_length_bias 0x00000002
4910 #define GEN75_GPGPU_OBJECT_header \
4913 .MediaCommandOpcode = 1, \
4917 struct GEN75_GPGPU_OBJECT
{
4918 uint32_t CommandType
;
4920 uint32_t MediaCommandOpcode
;
4922 uint32_t PredicateEnable
;
4923 uint32_t DwordLength
;
4924 uint32_t SharedLocalMemoryFixedOffset
;
4925 uint32_t InterfaceDescriptorOffset
;
4926 uint32_t SharedLocalMemoryOffset
;
4927 uint32_t EndofThreadGroup
;
4930 uint32_t SliceDestinationSelect
;
4931 #define HalfSlice1 2
4932 #define HalfSlice0 1
4933 #define EitherHalfSlice 0
4934 uint32_t HalfSliceDestinationSelect
;
4935 uint32_t IndirectDataLength
;
4936 uint32_t IndirectDataStartAddress
;
4937 uint32_t ThreadGroupIDX
;
4938 uint32_t ThreadGroupIDY
;
4939 uint32_t ThreadGroupIDZ
;
4940 uint32_t ExecutionMask
;
4944 GEN75_GPGPU_OBJECT_pack(__gen_user_data
*data
, void * restrict dst
,
4945 const struct GEN75_GPGPU_OBJECT
* restrict values
)
4947 uint32_t *dw
= (uint32_t * restrict
) dst
;
4950 __gen_field(values
->CommandType
, 29, 31) |
4951 __gen_field(values
->Pipeline
, 27, 28) |
4952 __gen_field(values
->MediaCommandOpcode
, 24, 26) |
4953 __gen_field(values
->SubOpcode
, 16, 23) |
4954 __gen_field(values
->PredicateEnable
, 8, 8) |
4955 __gen_field(values
->DwordLength
, 0, 7) |
4959 __gen_field(values
->SharedLocalMemoryFixedOffset
, 7, 7) |
4960 __gen_field(values
->InterfaceDescriptorOffset
, 0, 5) |
4964 __gen_field(values
->SharedLocalMemoryOffset
, 28, 31) |
4965 __gen_field(values
->EndofThreadGroup
, 24, 24) |
4966 __gen_field(values
->SliceDestinationSelect
, 19, 19) |
4967 __gen_field(values
->HalfSliceDestinationSelect
, 17, 18) |
4968 __gen_field(values
->IndirectDataLength
, 0, 16) |
4972 __gen_offset(values
->IndirectDataStartAddress
, 0, 31) |
4976 __gen_field(values
->ThreadGroupIDX
, 0, 31) |
4980 __gen_field(values
->ThreadGroupIDY
, 0, 31) |
4984 __gen_field(values
->ThreadGroupIDZ
, 0, 31) |
4988 __gen_field(values
->ExecutionMask
, 0, 31) |
4993 #define GEN75_GPGPU_WALKER_length 0x0000000b
4994 #define GEN75_GPGPU_WALKER_length_bias 0x00000002
4995 #define GEN75_GPGPU_WALKER_header \
4998 .MediaCommandOpcode = 1, \
5002 struct GEN75_GPGPU_WALKER
{
5003 uint32_t CommandType
;
5005 uint32_t MediaCommandOpcode
;
5006 uint32_t SubOpcodeA
;
5007 uint32_t IndirectParameterEnable
;
5008 uint32_t PredicateEnable
;
5009 uint32_t DwordLength
;
5010 uint32_t InterfaceDescriptorOffset
;
5015 uint32_t ThreadDepthCounterMaximum
;
5016 uint32_t ThreadHeightCounterMaximum
;
5017 uint32_t ThreadWidthCounterMaximum
;
5018 uint32_t ThreadGroupIDStartingX
;
5019 uint32_t ThreadGroupIDXDimension
;
5020 uint32_t ThreadGroupIDStartingY
;
5021 uint32_t ThreadGroupIDYDimension
;
5022 uint32_t ThreadGroupIDStartingZ
;
5023 uint32_t ThreadGroupIDZDimension
;
5024 uint32_t RightExecutionMask
;
5025 uint32_t BottomExecutionMask
;
5029 GEN75_GPGPU_WALKER_pack(__gen_user_data
*data
, void * restrict dst
,
5030 const struct GEN75_GPGPU_WALKER
* restrict values
)
5032 uint32_t *dw
= (uint32_t * restrict
) dst
;
5035 __gen_field(values
->CommandType
, 29, 31) |
5036 __gen_field(values
->Pipeline
, 27, 28) |
5037 __gen_field(values
->MediaCommandOpcode
, 24, 26) |
5038 __gen_field(values
->SubOpcodeA
, 16, 23) |
5039 __gen_field(values
->IndirectParameterEnable
, 10, 10) |
5040 __gen_field(values
->PredicateEnable
, 8, 8) |
5041 __gen_field(values
->DwordLength
, 0, 7) |
5045 __gen_field(values
->InterfaceDescriptorOffset
, 0, 5) |
5049 __gen_field(values
->SIMDSize
, 30, 31) |
5050 __gen_field(values
->ThreadDepthCounterMaximum
, 16, 21) |
5051 __gen_field(values
->ThreadHeightCounterMaximum
, 8, 13) |
5052 __gen_field(values
->ThreadWidthCounterMaximum
, 0, 5) |
5056 __gen_field(values
->ThreadGroupIDStartingX
, 0, 31) |
5060 __gen_field(values
->ThreadGroupIDXDimension
, 0, 31) |
5064 __gen_field(values
->ThreadGroupIDStartingY
, 0, 31) |
5068 __gen_field(values
->ThreadGroupIDYDimension
, 0, 31) |
5072 __gen_field(values
->ThreadGroupIDStartingZ
, 0, 31) |
5076 __gen_field(values
->ThreadGroupIDZDimension
, 0, 31) |
5080 __gen_field(values
->RightExecutionMask
, 0, 31) |
5084 __gen_field(values
->BottomExecutionMask
, 0, 31) |
5089 #define GEN75_MEDIA_CURBE_LOAD_length 0x00000004
5090 #define GEN75_MEDIA_CURBE_LOAD_length_bias 0x00000002
5091 #define GEN75_MEDIA_CURBE_LOAD_header \
5094 .MediaCommandOpcode = 0, \
5098 struct GEN75_MEDIA_CURBE_LOAD
{
5099 uint32_t CommandType
;
5101 uint32_t MediaCommandOpcode
;
5103 uint32_t DwordLength
;
5104 uint32_t CURBETotalDataLength
;
5105 uint32_t CURBEDataStartAddress
;
5109 GEN75_MEDIA_CURBE_LOAD_pack(__gen_user_data
*data
, void * restrict dst
,
5110 const struct GEN75_MEDIA_CURBE_LOAD
* restrict values
)
5112 uint32_t *dw
= (uint32_t * restrict
) dst
;
5115 __gen_field(values
->CommandType
, 29, 31) |
5116 __gen_field(values
->Pipeline
, 27, 28) |
5117 __gen_field(values
->MediaCommandOpcode
, 24, 26) |
5118 __gen_field(values
->SubOpcode
, 16, 23) |
5119 __gen_field(values
->DwordLength
, 0, 15) |
5126 __gen_field(values
->CURBETotalDataLength
, 0, 16) |
5130 __gen_field(values
->CURBEDataStartAddress
, 0, 31) |
5135 #define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 0x00000004
5136 #define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length_bias 0x00000002
5137 #define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_header\
5140 .MediaCommandOpcode = 0, \
5144 struct GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD
{
5145 uint32_t CommandType
;
5147 uint32_t MediaCommandOpcode
;
5149 uint32_t DwordLength
;
5150 uint32_t InterfaceDescriptorTotalLength
;
5151 uint32_t InterfaceDescriptorDataStartAddress
;
5155 GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_pack(__gen_user_data
*data
, void * restrict dst
,
5156 const struct GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD
* restrict values
)
5158 uint32_t *dw
= (uint32_t * restrict
) dst
;
5161 __gen_field(values
->CommandType
, 29, 31) |
5162 __gen_field(values
->Pipeline
, 27, 28) |
5163 __gen_field(values
->MediaCommandOpcode
, 24, 26) |
5164 __gen_field(values
->SubOpcode
, 16, 23) |
5165 __gen_field(values
->DwordLength
, 0, 15) |
5172 __gen_field(values
->InterfaceDescriptorTotalLength
, 0, 16) |
5176 __gen_offset(values
->InterfaceDescriptorDataStartAddress
, 0, 31) |
5181 #define GEN75_MEDIA_OBJECT_length_bias 0x00000002
5182 #define GEN75_MEDIA_OBJECT_header \
5184 .MediaCommandPipeline = 2, \
5185 .MediaCommandOpcode = 1, \
5186 .MediaCommandSubOpcode = 0
5188 struct GEN75_MEDIA_OBJECT
{
5189 uint32_t CommandType
;
5190 uint32_t MediaCommandPipeline
;
5191 uint32_t MediaCommandOpcode
;
5192 uint32_t MediaCommandSubOpcode
;
5193 uint32_t DwordLength
;
5194 uint32_t InterfaceDescriptorOffset
;
5195 uint32_t ChildrenPresent
;
5196 #define Nothreadsynchronization 0
5197 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
5198 uint32_t ThreadSynchronization
;
5199 #define Notusingscoreboard 0
5200 #define Usingscoreboard 1
5201 uint32_t UseScoreboard
;
5204 #define EitherSlice 0
5205 uint32_t SliceDestinationSelect
;
5206 #define HalfSlice1 2
5207 #define HalfSlice0 1
5208 #define Eitherhalfslice 0
5209 uint32_t HalfSliceDestinationSelect
;
5210 uint32_t IndirectDataLength
;
5211 __gen_address_type IndirectDataStartAddress
;
5212 uint32_t ScoredboardY
;
5213 uint32_t ScoreboardX
;
5214 uint32_t ScoreboardColor
;
5215 uint32_t ScoreboardMask
;
5216 /* variable length fields follow */
5220 GEN75_MEDIA_OBJECT_pack(__gen_user_data
*data
, void * restrict dst
,
5221 const struct GEN75_MEDIA_OBJECT
* restrict values
)
5223 uint32_t *dw
= (uint32_t * restrict
) dst
;
5226 __gen_field(values
->CommandType
, 29, 31) |
5227 __gen_field(values
->MediaCommandPipeline
, 27, 28) |
5228 __gen_field(values
->MediaCommandOpcode
, 24, 26) |
5229 __gen_field(values
->MediaCommandSubOpcode
, 16, 23) |
5230 __gen_field(values
->DwordLength
, 0, 15) |
5234 __gen_field(values
->InterfaceDescriptorOffset
, 0, 5) |
5238 __gen_field(values
->ChildrenPresent
, 31, 31) |
5239 __gen_field(values
->ThreadSynchronization
, 24, 24) |
5240 __gen_field(values
->UseScoreboard
, 21, 21) |
5241 __gen_field(values
->SliceDestinationSelect
, 19, 19) |
5242 __gen_field(values
->HalfSliceDestinationSelect
, 17, 18) |
5243 __gen_field(values
->IndirectDataLength
, 0, 16) |
5250 __gen_combine_address(data
, &dw
[3], values
->IndirectDataStartAddress
, dw3
);
5253 __gen_field(values
->ScoredboardY
, 16, 24) |
5254 __gen_field(values
->ScoreboardX
, 0, 8) |
5258 __gen_field(values
->ScoreboardColor
, 16, 19) |
5259 __gen_field(values
->ScoreboardMask
, 0, 7) |
5262 /* variable length fields follow */
5265 #define GEN75_MEDIA_OBJECT_PRT_length 0x00000010
5266 #define GEN75_MEDIA_OBJECT_PRT_length_bias 0x00000002
5267 #define GEN75_MEDIA_OBJECT_PRT_header \
5270 .MediaCommandOpcode = 1, \
5274 struct GEN75_MEDIA_OBJECT_PRT
{
5275 uint32_t CommandType
;
5277 uint32_t MediaCommandOpcode
;
5279 uint32_t DwordLength
;
5280 uint32_t InterfaceDescriptorOffset
;
5281 uint32_t ChildrenPresent
;
5282 uint32_t PRT_FenceNeeded
;
5283 #define Rootthreadqueue 0
5284 #define VFEstateflush 1
5285 uint32_t PRT_FenceType
;
5286 uint32_t InlineData
;
5290 GEN75_MEDIA_OBJECT_PRT_pack(__gen_user_data
*data
, void * restrict dst
,
5291 const struct GEN75_MEDIA_OBJECT_PRT
* restrict values
)
5293 uint32_t *dw
= (uint32_t * restrict
) dst
;
5296 __gen_field(values
->CommandType
, 29, 31) |
5297 __gen_field(values
->Pipeline
, 27, 28) |
5298 __gen_field(values
->MediaCommandOpcode
, 24, 26) |
5299 __gen_field(values
->SubOpcode
, 16, 23) |
5300 __gen_field(values
->DwordLength
, 0, 15) |
5304 __gen_field(values
->InterfaceDescriptorOffset
, 0, 5) |
5308 __gen_field(values
->ChildrenPresent
, 31, 31) |
5309 __gen_field(values
->PRT_FenceNeeded
, 23, 23) |
5310 __gen_field(values
->PRT_FenceType
, 22, 22) |
5317 __gen_field(values
->InlineData
, 0, 31) |
5322 #define GEN75_MEDIA_OBJECT_WALKER_length_bias 0x00000002
5323 #define GEN75_MEDIA_OBJECT_WALKER_header \
5326 .MediaCommandOpcode = 1, \
5329 struct GEN75_MEDIA_OBJECT_WALKER
{
5330 uint32_t CommandType
;
5332 uint32_t MediaCommandOpcode
;
5334 uint32_t DwordLength
;
5335 uint32_t InterfaceDescriptorOffset
;
5336 uint32_t ChildrenPresent
;
5337 #define Nothreadsynchronization 0
5338 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
5339 uint32_t ThreadSynchronization
;
5340 #define Notusingscoreboard 0
5341 #define Usingscoreboard 1
5342 uint32_t UseScoreboard
;
5343 uint32_t IndirectDataLength
;
5344 uint32_t IndirectDataStartAddress
;
5345 uint32_t ScoreboardMask
;
5349 uint32_t ColorCountMinusOne
;
5350 uint32_t MiddleLoopExtraSteps
;
5351 uint32_t LocalMidLoopUnitY
;
5352 uint32_t MidLoopUnitX
;
5353 uint32_t GlobalLoopExecCount
;
5354 uint32_t LocalLoopExecCount
;
5355 uint32_t BlockResolutionY
;
5356 uint32_t BlockResolutionX
;
5357 uint32_t LocalStartY
;
5358 uint32_t LocalStartX
;
5359 uint32_t LocalOuterLoopStrideY
;
5360 uint32_t LocalOuterLoopStrideX
;
5361 uint32_t LocalInnerLoopUnitY
;
5362 uint32_t LocalInnerLoopUnitX
;
5363 uint32_t GlobalResolutionY
;
5364 uint32_t GlobalResolutionX
;
5365 uint32_t GlobalStartY
;
5366 uint32_t GlobalStartX
;
5367 uint32_t GlobalOuterLoopStrideY
;
5368 uint32_t GlobalOuterLoopStrideX
;
5369 uint32_t GlobalInnerLoopUnitY
;
5370 uint32_t GlobalInnerLoopUnitX
;
5371 /* variable length fields follow */
5375 GEN75_MEDIA_OBJECT_WALKER_pack(__gen_user_data
*data
, void * restrict dst
,
5376 const struct GEN75_MEDIA_OBJECT_WALKER
* restrict values
)
5378 uint32_t *dw
= (uint32_t * restrict
) dst
;
5381 __gen_field(values
->CommandType
, 29, 31) |
5382 __gen_field(values
->Pipeline
, 27, 28) |
5383 __gen_field(values
->MediaCommandOpcode
, 24, 26) |
5384 __gen_field(values
->SubOpcode
, 16, 23) |
5385 __gen_field(values
->DwordLength
, 0, 15) |
5389 __gen_field(values
->InterfaceDescriptorOffset
, 0, 5) |
5393 __gen_field(values
->ChildrenPresent
, 31, 31) |
5394 __gen_field(values
->ThreadSynchronization
, 24, 24) |
5395 __gen_field(values
->UseScoreboard
, 21, 21) |
5396 __gen_field(values
->IndirectDataLength
, 0, 16) |
5400 __gen_offset(values
->IndirectDataStartAddress
, 0, 31) |
5407 __gen_field(values
->ScoreboardMask
, 0, 7) |
5411 __gen_field(values
->DualMode
, 31, 31) |
5412 __gen_field(values
->Repel
, 30, 30) |
5413 __gen_field(values
->QuadMode
, 29, 29) |
5414 __gen_field(values
->ColorCountMinusOne
, 24, 27) |
5415 __gen_field(values
->MiddleLoopExtraSteps
, 16, 20) |
5416 __gen_field(values
->LocalMidLoopUnitY
, 12, 13) |
5417 __gen_field(values
->MidLoopUnitX
, 8, 9) |
5421 __gen_field(values
->GlobalLoopExecCount
, 16, 25) |
5422 __gen_field(values
->LocalLoopExecCount
, 0, 9) |
5426 __gen_field(values
->BlockResolutionY
, 16, 24) |
5427 __gen_field(values
->BlockResolutionX
, 0, 8) |
5431 __gen_field(values
->LocalStartY
, 16, 24) |
5432 __gen_field(values
->LocalStartX
, 0, 8) |
5439 __gen_field(values
->LocalOuterLoopStrideY
, 16, 25) |
5440 __gen_field(values
->LocalOuterLoopStrideX
, 0, 9) |
5444 __gen_field(values
->LocalInnerLoopUnitY
, 16, 25) |
5445 __gen_field(values
->LocalInnerLoopUnitX
, 0, 9) |
5449 __gen_field(values
->GlobalResolutionY
, 16, 24) |
5450 __gen_field(values
->GlobalResolutionX
, 0, 8) |
5454 __gen_field(values
->GlobalStartY
, 16, 25) |
5455 __gen_field(values
->GlobalStartX
, 0, 9) |
5459 __gen_field(values
->GlobalOuterLoopStrideY
, 16, 25) |
5460 __gen_field(values
->GlobalOuterLoopStrideX
, 0, 9) |
5464 __gen_field(values
->GlobalInnerLoopUnitY
, 16, 25) |
5465 __gen_field(values
->GlobalInnerLoopUnitX
, 0, 9) |
5468 /* variable length fields follow */
5471 #define GEN75_MEDIA_STATE_FLUSH_length 0x00000002
5472 #define GEN75_MEDIA_STATE_FLUSH_length_bias 0x00000002
5473 #define GEN75_MEDIA_STATE_FLUSH_header \
5476 .MediaCommandOpcode = 0, \
5480 struct GEN75_MEDIA_STATE_FLUSH
{
5481 uint32_t CommandType
;
5483 uint32_t MediaCommandOpcode
;
5485 uint32_t DwordLength
;
5486 uint32_t DisablePreemption
;
5488 uint32_t WatermarkRequired
;
5489 uint32_t InterfaceDescriptorOffset
;
5493 GEN75_MEDIA_STATE_FLUSH_pack(__gen_user_data
*data
, void * restrict dst
,
5494 const struct GEN75_MEDIA_STATE_FLUSH
* restrict values
)
5496 uint32_t *dw
= (uint32_t * restrict
) dst
;
5499 __gen_field(values
->CommandType
, 29, 31) |
5500 __gen_field(values
->Pipeline
, 27, 28) |
5501 __gen_field(values
->MediaCommandOpcode
, 24, 26) |
5502 __gen_field(values
->SubOpcode
, 16, 23) |
5503 __gen_field(values
->DwordLength
, 0, 15) |
5507 __gen_field(values
->DisablePreemption
, 8, 8) |
5508 __gen_field(values
->FlushtoGO
, 7, 7) |
5509 __gen_field(values
->WatermarkRequired
, 6, 6) |
5510 __gen_field(values
->InterfaceDescriptorOffset
, 0, 5) |
5515 #define GEN75_MEDIA_VFE_STATE_length 0x00000008
5516 #define GEN75_MEDIA_VFE_STATE_length_bias 0x00000002
5517 #define GEN75_MEDIA_VFE_STATE_header \
5520 .MediaCommandOpcode = 0, \
5524 struct GEN75_MEDIA_VFE_STATE
{
5525 uint32_t CommandType
;
5527 uint32_t MediaCommandOpcode
;
5529 uint32_t DwordLength
;
5530 uint32_t ScratchSpaceBasePointer
;
5532 uint32_t PerThreadScratchSpace
;
5533 uint32_t MaximumNumberofThreads
;
5534 uint32_t NumberofURBEntries
;
5535 #define Maintainingtheexistingtimestampstate 0
5536 #define Resettingrelativetimerandlatchingtheglobaltimestamp 1
5537 uint32_t ResetGatewayTimer
;
5538 #define MaintainingOpenGatewayForwardMsgCloseGatewayprotocollegacymode 0
5539 #define BypassingOpenGatewayCloseGatewayprotocol 1
5540 uint32_t BypassGatewayControl
;
5542 uint32_t HalfSliceDisable
;
5543 uint32_t URBEntryAllocationSize
;
5544 uint32_t CURBEAllocationSize
;
5545 #define Scoreboarddisabled 0
5546 #define Scoreboardenabled 1
5547 uint32_t ScoreboardEnable
;
5548 #define StallingScoreboard 0
5549 #define NonStallingScoreboard 1
5550 uint32_t ScoreboardType
;
5551 uint32_t ScoreboardMask
;
5552 uint32_t Scoreboard3DeltaY
;
5553 uint32_t Scoreboard3DeltaX
;
5554 uint32_t Scoreboard2DeltaY
;
5555 uint32_t Scoreboard2DeltaX
;
5556 uint32_t Scoreboard1DeltaY
;
5557 uint32_t Scoreboard1DeltaX
;
5558 uint32_t Scoreboard0DeltaY
;
5559 uint32_t Scoreboard0DeltaX
;
5560 uint32_t Scoreboard7DeltaY
;
5561 uint32_t Scoreboard7DeltaX
;
5562 uint32_t Scoreboard6DeltaY
;
5563 uint32_t Scoreboard6DeltaX
;
5564 uint32_t Scoreboard5DeltaY
;
5565 uint32_t Scoreboard5DeltaX
;
5566 uint32_t Scoreboard4DeltaY
;
5567 uint32_t Scoreboard4DeltaX
;
5571 GEN75_MEDIA_VFE_STATE_pack(__gen_user_data
*data
, void * restrict dst
,
5572 const struct GEN75_MEDIA_VFE_STATE
* restrict values
)
5574 uint32_t *dw
= (uint32_t * restrict
) dst
;
5577 __gen_field(values
->CommandType
, 29, 31) |
5578 __gen_field(values
->Pipeline
, 27, 28) |
5579 __gen_field(values
->MediaCommandOpcode
, 24, 26) |
5580 __gen_field(values
->SubOpcode
, 16, 23) |
5581 __gen_field(values
->DwordLength
, 0, 15) |
5585 __gen_offset(values
->ScratchSpaceBasePointer
, 10, 31) |
5586 __gen_field(values
->StackSize
, 4, 7) |
5587 __gen_field(values
->PerThreadScratchSpace
, 0, 3) |
5591 __gen_field(values
->MaximumNumberofThreads
, 16, 31) |
5592 __gen_field(values
->NumberofURBEntries
, 8, 15) |
5593 __gen_field(values
->ResetGatewayTimer
, 7, 7) |
5594 __gen_field(values
->BypassGatewayControl
, 6, 6) |
5595 __gen_field(values
->GPGPUMode
, 2, 2) |
5599 __gen_field(values
->HalfSliceDisable
, 0, 1) |
5603 __gen_field(values
->URBEntryAllocationSize
, 16, 31) |
5604 __gen_field(values
->CURBEAllocationSize
, 0, 15) |
5608 __gen_field(values
->ScoreboardEnable
, 31, 31) |
5609 __gen_field(values
->ScoreboardType
, 30, 30) |
5610 __gen_field(values
->ScoreboardMask
, 0, 7) |
5614 __gen_field(values
->Scoreboard3DeltaY
, 28, 31) |
5615 __gen_field(values
->Scoreboard3DeltaX
, 24, 27) |
5616 __gen_field(values
->Scoreboard2DeltaY
, 20, 23) |
5617 __gen_field(values
->Scoreboard2DeltaX
, 16, 19) |
5618 __gen_field(values
->Scoreboard1DeltaY
, 12, 15) |
5619 __gen_field(values
->Scoreboard1DeltaX
, 8, 11) |
5620 __gen_field(values
->Scoreboard0DeltaY
, 4, 7) |
5621 __gen_field(values
->Scoreboard0DeltaX
, 0, 3) |
5625 __gen_field(values
->Scoreboard7DeltaY
, 28, 31) |
5626 __gen_field(values
->Scoreboard7DeltaX
, 24, 27) |
5627 __gen_field(values
->Scoreboard6DeltaY
, 20, 23) |
5628 __gen_field(values
->Scoreboard6DeltaX
, 16, 19) |
5629 __gen_field(values
->Scoreboard5DeltaY
, 12, 15) |
5630 __gen_field(values
->Scoreboard5DeltaX
, 8, 11) |
5631 __gen_field(values
->Scoreboard4DeltaY
, 4, 7) |
5632 __gen_field(values
->Scoreboard4DeltaX
, 0, 3) |
5637 #define GEN75_MI_ARB_CHECK_length 0x00000001
5638 #define GEN75_MI_ARB_CHECK_length_bias 0x00000001
5639 #define GEN75_MI_ARB_CHECK_header \
5641 .MICommandOpcode = 5
5643 struct GEN75_MI_ARB_CHECK
{
5644 uint32_t CommandType
;
5645 uint32_t MICommandOpcode
;
5649 GEN75_MI_ARB_CHECK_pack(__gen_user_data
*data
, void * restrict dst
,
5650 const struct GEN75_MI_ARB_CHECK
* restrict values
)
5652 uint32_t *dw
= (uint32_t * restrict
) dst
;
5655 __gen_field(values
->CommandType
, 29, 31) |
5656 __gen_field(values
->MICommandOpcode
, 23, 28) |
5661 #define GEN75_MI_ARB_ON_OFF_length 0x00000001
5662 #define GEN75_MI_ARB_ON_OFF_length_bias 0x00000001
5663 #define GEN75_MI_ARB_ON_OFF_header \
5665 .MICommandOpcode = 8
5667 struct GEN75_MI_ARB_ON_OFF
{
5668 uint32_t CommandType
;
5669 uint32_t MICommandOpcode
;
5670 uint32_t ArbitrationEnable
;
5674 GEN75_MI_ARB_ON_OFF_pack(__gen_user_data
*data
, void * restrict dst
,
5675 const struct GEN75_MI_ARB_ON_OFF
* restrict values
)
5677 uint32_t *dw
= (uint32_t * restrict
) dst
;
5680 __gen_field(values
->CommandType
, 29, 31) |
5681 __gen_field(values
->MICommandOpcode
, 23, 28) |
5682 __gen_field(values
->ArbitrationEnable
, 0, 0) |
5687 #define GEN75_MI_BATCH_BUFFER_END_length 0x00000001
5688 #define GEN75_MI_BATCH_BUFFER_END_length_bias 0x00000001
5689 #define GEN75_MI_BATCH_BUFFER_END_header \
5691 .MICommandOpcode = 10
5693 struct GEN75_MI_BATCH_BUFFER_END
{
5694 uint32_t CommandType
;
5695 uint32_t MICommandOpcode
;
5699 GEN75_MI_BATCH_BUFFER_END_pack(__gen_user_data
*data
, void * restrict dst
,
5700 const struct GEN75_MI_BATCH_BUFFER_END
* restrict values
)
5702 uint32_t *dw
= (uint32_t * restrict
) dst
;
5705 __gen_field(values
->CommandType
, 29, 31) |
5706 __gen_field(values
->MICommandOpcode
, 23, 28) |
5711 #define GEN75_MI_BATCH_BUFFER_START_length 0x00000002
5712 #define GEN75_MI_BATCH_BUFFER_START_length_bias 0x00000002
5713 #define GEN75_MI_BATCH_BUFFER_START_header \
5715 .MICommandOpcode = 49, \
5718 struct GEN75_MI_BATCH_BUFFER_START
{
5719 uint32_t CommandType
;
5720 uint32_t MICommandOpcode
;
5721 #define _1stlevelbatch 0
5722 #define _2ndlevelbatch 1
5723 uint32_t _2ndLevelBatchBuffer
;
5724 uint32_t AddOffsetEnable
;
5725 uint32_t PredicationEnable
;
5726 uint32_t NonPrivileged
;
5727 uint32_t ClearCommandBufferEnable
;
5728 uint32_t ResourceStreamerEnable
;
5731 uint32_t AddressSpaceIndicator
;
5732 uint32_t DwordLength
;
5733 __gen_address_type BatchBufferStartAddress
;
5737 GEN75_MI_BATCH_BUFFER_START_pack(__gen_user_data
*data
, void * restrict dst
,
5738 const struct GEN75_MI_BATCH_BUFFER_START
* restrict values
)
5740 uint32_t *dw
= (uint32_t * restrict
) dst
;
5743 __gen_field(values
->CommandType
, 29, 31) |
5744 __gen_field(values
->MICommandOpcode
, 23, 28) |
5745 __gen_field(values
->_2ndLevelBatchBuffer
, 22, 22) |
5746 __gen_field(values
->AddOffsetEnable
, 16, 16) |
5747 __gen_field(values
->PredicationEnable
, 15, 15) |
5748 __gen_field(values
->NonPrivileged
, 13, 13) |
5749 __gen_field(values
->ClearCommandBufferEnable
, 11, 11) |
5750 __gen_field(values
->ResourceStreamerEnable
, 10, 10) |
5751 __gen_field(values
->AddressSpaceIndicator
, 8, 8) |
5752 __gen_field(values
->DwordLength
, 0, 7) |
5759 __gen_combine_address(data
, &dw
[1], values
->BatchBufferStartAddress
, dw1
);
5763 #define GEN75_MI_CLFLUSH_length_bias 0x00000002
5764 #define GEN75_MI_CLFLUSH_header \
5766 .MICommandOpcode = 39
5768 struct GEN75_MI_CLFLUSH
{
5769 uint32_t CommandType
;
5770 uint32_t MICommandOpcode
;
5771 #define PerProcessGraphicsAddress 0
5772 #define GlobalGraphicsAddress 1
5773 uint32_t UseGlobalGTT
;
5774 uint32_t DwordLength
;
5775 __gen_address_type PageBaseAddress
;
5776 uint32_t StartingCachelineOffset
;
5777 __gen_address_type PageBaseAddressHigh
;
5778 /* variable length fields follow */
5782 GEN75_MI_CLFLUSH_pack(__gen_user_data
*data
, void * restrict dst
,
5783 const struct GEN75_MI_CLFLUSH
* restrict values
)
5785 uint32_t *dw
= (uint32_t * restrict
) dst
;
5788 __gen_field(values
->CommandType
, 29, 31) |
5789 __gen_field(values
->MICommandOpcode
, 23, 28) |
5790 __gen_field(values
->UseGlobalGTT
, 22, 22) |
5791 __gen_field(values
->DwordLength
, 0, 9) |
5795 __gen_field(values
->StartingCachelineOffset
, 6, 11) |
5799 __gen_combine_address(data
, &dw
[1], values
->PageBaseAddress
, dw1
);
5805 __gen_combine_address(data
, &dw
[2], values
->PageBaseAddressHigh
, dw2
);
5807 /* variable length fields follow */
5810 #define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_length 0x00000002
5811 #define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_length_bias 0x00000002
5812 #define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_header\
5814 .MICommandOpcode = 54, \
5815 .UseGlobalGTT = 0, \
5816 .CompareSemaphore = 0, \
5819 struct GEN75_MI_CONDITIONAL_BATCH_BUFFER_END
{
5820 uint32_t CommandType
;
5821 uint32_t MICommandOpcode
;
5822 uint32_t UseGlobalGTT
;
5823 uint32_t CompareSemaphore
;
5824 uint32_t DwordLength
;
5825 uint32_t CompareDataDword
;
5826 __gen_address_type CompareAddress
;
5830 GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_pack(__gen_user_data
*data
, void * restrict dst
,
5831 const struct GEN75_MI_CONDITIONAL_BATCH_BUFFER_END
* restrict values
)
5833 uint32_t *dw
= (uint32_t * restrict
) dst
;
5836 __gen_field(values
->CommandType
, 29, 31) |
5837 __gen_field(values
->MICommandOpcode
, 23, 28) |
5838 __gen_field(values
->UseGlobalGTT
, 22, 22) |
5839 __gen_field(values
->CompareSemaphore
, 21, 21) |
5840 __gen_field(values
->DwordLength
, 0, 7) |
5844 __gen_field(values
->CompareDataDword
, 0, 31) |
5851 __gen_combine_address(data
, &dw
[2], values
->CompareAddress
, dw2
);
5855 #define GEN75_MI_FLUSH_length 0x00000001
5856 #define GEN75_MI_FLUSH_length_bias 0x00000001
5857 #define GEN75_MI_FLUSH_header \
5859 .MICommandOpcode = 4
5861 struct GEN75_MI_FLUSH
{
5862 uint32_t CommandType
;
5863 uint32_t MICommandOpcode
;
5864 uint32_t IndirectStatePointersDisable
;
5865 uint32_t GenericMediaStateClear
;
5868 uint32_t GlobalSnapshotCountReset
;
5871 uint32_t RenderCacheFlushInhibit
;
5872 #define DontInvalidate 0
5873 #define Invalidate 1
5874 uint32_t StateInstructionCacheInvalidate
;
5878 GEN75_MI_FLUSH_pack(__gen_user_data
*data
, void * restrict dst
,
5879 const struct GEN75_MI_FLUSH
* restrict values
)
5881 uint32_t *dw
= (uint32_t * restrict
) dst
;
5884 __gen_field(values
->CommandType
, 29, 31) |
5885 __gen_field(values
->MICommandOpcode
, 23, 28) |
5886 __gen_field(values
->IndirectStatePointersDisable
, 5, 5) |
5887 __gen_field(values
->GenericMediaStateClear
, 4, 4) |
5888 __gen_field(values
->GlobalSnapshotCountReset
, 3, 3) |
5889 __gen_field(values
->RenderCacheFlushInhibit
, 2, 2) |
5890 __gen_field(values
->StateInstructionCacheInvalidate
, 1, 1) |
5895 #define GEN75_MI_LOAD_REGISTER_IMM_length 0x00000003
5896 #define GEN75_MI_LOAD_REGISTER_IMM_length_bias 0x00000002
5897 #define GEN75_MI_LOAD_REGISTER_IMM_header \
5899 .MICommandOpcode = 34, \
5902 struct GEN75_MI_LOAD_REGISTER_IMM
{
5903 uint32_t CommandType
;
5904 uint32_t MICommandOpcode
;
5905 uint32_t ByteWriteDisables
;
5906 uint32_t DwordLength
;
5907 uint32_t RegisterOffset
;
5912 GEN75_MI_LOAD_REGISTER_IMM_pack(__gen_user_data
*data
, void * restrict dst
,
5913 const struct GEN75_MI_LOAD_REGISTER_IMM
* restrict values
)
5915 uint32_t *dw
= (uint32_t * restrict
) dst
;
5918 __gen_field(values
->CommandType
, 29, 31) |
5919 __gen_field(values
->MICommandOpcode
, 23, 28) |
5920 __gen_field(values
->ByteWriteDisables
, 8, 11) |
5921 __gen_field(values
->DwordLength
, 0, 7) |
5925 __gen_offset(values
->RegisterOffset
, 2, 22) |
5929 __gen_field(values
->DataDWord
, 0, 31) |
5934 #define GEN75_MI_LOAD_REGISTER_MEM_length 0x00000003
5935 #define GEN75_MI_LOAD_REGISTER_MEM_length_bias 0x00000002
5936 #define GEN75_MI_LOAD_REGISTER_MEM_header \
5938 .MICommandOpcode = 41, \
5941 struct GEN75_MI_LOAD_REGISTER_MEM
{
5942 uint32_t CommandType
;
5943 uint32_t MICommandOpcode
;
5944 uint32_t UseGlobalGTT
;
5945 uint32_t AsyncModeEnable
;
5946 uint32_t DwordLength
;
5947 uint32_t RegisterAddress
;
5948 __gen_address_type MemoryAddress
;
5952 GEN75_MI_LOAD_REGISTER_MEM_pack(__gen_user_data
*data
, void * restrict dst
,
5953 const struct GEN75_MI_LOAD_REGISTER_MEM
* restrict values
)
5955 uint32_t *dw
= (uint32_t * restrict
) dst
;
5958 __gen_field(values
->CommandType
, 29, 31) |
5959 __gen_field(values
->MICommandOpcode
, 23, 28) |
5960 __gen_field(values
->UseGlobalGTT
, 22, 22) |
5961 __gen_field(values
->AsyncModeEnable
, 21, 21) |
5962 __gen_field(values
->DwordLength
, 0, 7) |
5966 __gen_offset(values
->RegisterAddress
, 2, 22) |
5973 __gen_combine_address(data
, &dw
[2], values
->MemoryAddress
, dw2
);
5977 #define GEN75_MI_LOAD_REGISTER_REG_length 0x00000003
5978 #define GEN75_MI_LOAD_REGISTER_REG_length_bias 0x00000002
5979 #define GEN75_MI_LOAD_REGISTER_REG_header \
5981 .MICommandOpcode = 42, \
5984 struct GEN75_MI_LOAD_REGISTER_REG
{
5985 uint32_t CommandType
;
5986 uint32_t MICommandOpcode
;
5987 uint32_t DwordLength
;
5988 uint32_t SourceRegisterAddress
;
5989 uint32_t DestinationRegisterAddress
;
5993 GEN75_MI_LOAD_REGISTER_REG_pack(__gen_user_data
*data
, void * restrict dst
,
5994 const struct GEN75_MI_LOAD_REGISTER_REG
* restrict values
)
5996 uint32_t *dw
= (uint32_t * restrict
) dst
;
5999 __gen_field(values
->CommandType
, 29, 31) |
6000 __gen_field(values
->MICommandOpcode
, 23, 28) |
6001 __gen_field(values
->DwordLength
, 0, 7) |
6005 __gen_offset(values
->SourceRegisterAddress
, 2, 22) |
6009 __gen_offset(values
->DestinationRegisterAddress
, 2, 22) |
6014 #define GEN75_MI_LOAD_SCAN_LINES_EXCL_length 0x00000002
6015 #define GEN75_MI_LOAD_SCAN_LINES_EXCL_length_bias 0x00000002
6016 #define GEN75_MI_LOAD_SCAN_LINES_EXCL_header \
6018 .MICommandOpcode = 19, \
6021 struct GEN75_MI_LOAD_SCAN_LINES_EXCL
{
6022 uint32_t CommandType
;
6023 uint32_t MICommandOpcode
;
6024 #define DisplayPlaneA 0
6025 #define DisplayPlaneB 1
6026 #define DisplayPlaneC 4
6027 uint32_t DisplayPlaneSelect
;
6028 uint32_t DwordLength
;
6029 uint32_t StartScanLineNumber
;
6030 uint32_t EndScanLineNumber
;
6034 GEN75_MI_LOAD_SCAN_LINES_EXCL_pack(__gen_user_data
*data
, void * restrict dst
,
6035 const struct GEN75_MI_LOAD_SCAN_LINES_EXCL
* restrict values
)
6037 uint32_t *dw
= (uint32_t * restrict
) dst
;
6040 __gen_field(values
->CommandType
, 29, 31) |
6041 __gen_field(values
->MICommandOpcode
, 23, 28) |
6042 __gen_field(values
->DisplayPlaneSelect
, 19, 21) |
6043 __gen_field(values
->DwordLength
, 0, 5) |
6047 __gen_field(values
->StartScanLineNumber
, 16, 28) |
6048 __gen_field(values
->EndScanLineNumber
, 0, 12) |
6053 #define GEN75_MI_LOAD_SCAN_LINES_INCL_length 0x00000002
6054 #define GEN75_MI_LOAD_SCAN_LINES_INCL_length_bias 0x00000002
6055 #define GEN75_MI_LOAD_SCAN_LINES_INCL_header \
6057 .MICommandOpcode = 18, \
6060 struct GEN75_MI_LOAD_SCAN_LINES_INCL
{
6061 uint32_t CommandType
;
6062 uint32_t MICommandOpcode
;
6063 #define DisplayPlaneA 0
6064 #define DisplayPlaneB 1
6065 #define DisplayPlaneC 4
6066 uint32_t DisplayPlaneSelect
;
6067 uint32_t DwordLength
;
6068 uint32_t StartScanLineNumber
;
6069 uint32_t EndScanLineNumber
;
6073 GEN75_MI_LOAD_SCAN_LINES_INCL_pack(__gen_user_data
*data
, void * restrict dst
,
6074 const struct GEN75_MI_LOAD_SCAN_LINES_INCL
* restrict values
)
6076 uint32_t *dw
= (uint32_t * restrict
) dst
;
6079 __gen_field(values
->CommandType
, 29, 31) |
6080 __gen_field(values
->MICommandOpcode
, 23, 28) |
6081 __gen_field(values
->DisplayPlaneSelect
, 19, 21) |
6082 __gen_field(values
->DwordLength
, 0, 5) |
6086 __gen_field(values
->StartScanLineNumber
, 16, 28) |
6087 __gen_field(values
->EndScanLineNumber
, 0, 12) |
6092 #define GEN75_MI_LOAD_URB_MEM_length 0x00000003
6093 #define GEN75_MI_LOAD_URB_MEM_length_bias 0x00000002
6094 #define GEN75_MI_LOAD_URB_MEM_header \
6096 .MICommandOpcode = 44, \
6099 struct GEN75_MI_LOAD_URB_MEM
{
6100 uint32_t CommandType
;
6101 uint32_t MICommandOpcode
;
6102 uint32_t DwordLength
;
6103 uint32_t URBAddress
;
6104 __gen_address_type MemoryAddress
;
6108 GEN75_MI_LOAD_URB_MEM_pack(__gen_user_data
*data
, void * restrict dst
,
6109 const struct GEN75_MI_LOAD_URB_MEM
* restrict values
)
6111 uint32_t *dw
= (uint32_t * restrict
) dst
;
6114 __gen_field(values
->CommandType
, 29, 31) |
6115 __gen_field(values
->MICommandOpcode
, 23, 28) |
6116 __gen_field(values
->DwordLength
, 0, 7) |
6120 __gen_field(values
->URBAddress
, 2, 14) |
6127 __gen_combine_address(data
, &dw
[2], values
->MemoryAddress
, dw2
);
6131 #define GEN75_MI_MATH_length_bias 0x00000002
6132 #define GEN75_MI_MATH_header \
6134 .MICommandOpcode = 26
6136 struct GEN75_MI_MATH
{
6137 uint32_t CommandType
;
6138 uint32_t MICommandOpcode
;
6139 uint32_t DwordLength
;
6140 uint32_t ALUINSTRUCTION1
;
6141 uint32_t ALUINSTRUCTION2
;
6142 /* variable length fields follow */
6146 GEN75_MI_MATH_pack(__gen_user_data
*data
, void * restrict dst
,
6147 const struct GEN75_MI_MATH
* restrict values
)
6149 uint32_t *dw
= (uint32_t * restrict
) dst
;
6152 __gen_field(values
->CommandType
, 29, 31) |
6153 __gen_field(values
->MICommandOpcode
, 23, 28) |
6154 __gen_field(values
->DwordLength
, 0, 5) |
6158 __gen_field(values
->ALUINSTRUCTION1
, 0, 31) |
6162 __gen_field(values
->ALUINSTRUCTION2
, 0, 31) |
6165 /* variable length fields follow */
6168 #define GEN75_MI_NOOP_length 0x00000001
6169 #define GEN75_MI_NOOP_length_bias 0x00000001
6170 #define GEN75_MI_NOOP_header \
6172 .MICommandOpcode = 0
6174 struct GEN75_MI_NOOP
{
6175 uint32_t CommandType
;
6176 uint32_t MICommandOpcode
;
6177 uint32_t IdentificationNumberRegisterWriteEnable
;
6178 uint32_t IdentificationNumber
;
6182 GEN75_MI_NOOP_pack(__gen_user_data
*data
, void * restrict dst
,
6183 const struct GEN75_MI_NOOP
* restrict values
)
6185 uint32_t *dw
= (uint32_t * restrict
) dst
;
6188 __gen_field(values
->CommandType
, 29, 31) |
6189 __gen_field(values
->MICommandOpcode
, 23, 28) |
6190 __gen_field(values
->IdentificationNumberRegisterWriteEnable
, 22, 22) |
6191 __gen_field(values
->IdentificationNumber
, 0, 21) |
6196 #define GEN75_MI_PREDICATE_length 0x00000001
6197 #define GEN75_MI_PREDICATE_length_bias 0x00000001
6198 #define GEN75_MI_PREDICATE_header \
6200 .MICommandOpcode = 12
6202 struct GEN75_MI_PREDICATE
{
6203 uint32_t CommandType
;
6204 uint32_t MICommandOpcode
;
6208 uint32_t LoadOperation
;
6209 #define COMBINE_SET 0
6210 #define COMBINE_AND 1
6211 #define COMBINE_OR 2
6212 #define COMBINE_XOR 3
6213 uint32_t CombineOperation
;
6214 #define COMPARE_SRCS_EQUAL 2
6215 #define COMPARE_DELTAS_EQUAL 3
6216 uint32_t CompareOperation
;
6220 GEN75_MI_PREDICATE_pack(__gen_user_data
*data
, void * restrict dst
,
6221 const struct GEN75_MI_PREDICATE
* restrict values
)
6223 uint32_t *dw
= (uint32_t * restrict
) dst
;
6226 __gen_field(values
->CommandType
, 29, 31) |
6227 __gen_field(values
->MICommandOpcode
, 23, 28) |
6228 __gen_field(values
->LoadOperation
, 6, 7) |
6229 __gen_field(values
->CombineOperation
, 3, 4) |
6230 __gen_field(values
->CompareOperation
, 0, 1) |
6235 #define GEN75_MI_REPORT_HEAD_length 0x00000001
6236 #define GEN75_MI_REPORT_HEAD_length_bias 0x00000001
6237 #define GEN75_MI_REPORT_HEAD_header \
6239 .MICommandOpcode = 7
6241 struct GEN75_MI_REPORT_HEAD
{
6242 uint32_t CommandType
;
6243 uint32_t MICommandOpcode
;
6247 GEN75_MI_REPORT_HEAD_pack(__gen_user_data
*data
, void * restrict dst
,
6248 const struct GEN75_MI_REPORT_HEAD
* restrict values
)
6250 uint32_t *dw
= (uint32_t * restrict
) dst
;
6253 __gen_field(values
->CommandType
, 29, 31) |
6254 __gen_field(values
->MICommandOpcode
, 23, 28) |
6259 #define GEN75_MI_RS_CONTEXT_length 0x00000001
6260 #define GEN75_MI_RS_CONTEXT_length_bias 0x00000001
6261 #define GEN75_MI_RS_CONTEXT_header \
6263 .MICommandOpcode = 15
6265 struct GEN75_MI_RS_CONTEXT
{
6266 uint32_t CommandType
;
6267 uint32_t MICommandOpcode
;
6270 uint32_t ResourceStreamerSave
;
6274 GEN75_MI_RS_CONTEXT_pack(__gen_user_data
*data
, void * restrict dst
,
6275 const struct GEN75_MI_RS_CONTEXT
* restrict values
)
6277 uint32_t *dw
= (uint32_t * restrict
) dst
;
6280 __gen_field(values
->CommandType
, 29, 31) |
6281 __gen_field(values
->MICommandOpcode
, 23, 28) |
6282 __gen_field(values
->ResourceStreamerSave
, 0, 0) |
6287 #define GEN75_MI_RS_CONTROL_length 0x00000001
6288 #define GEN75_MI_RS_CONTROL_length_bias 0x00000001
6289 #define GEN75_MI_RS_CONTROL_header \
6291 .MICommandOpcode = 6
6293 struct GEN75_MI_RS_CONTROL
{
6294 uint32_t CommandType
;
6295 uint32_t MICommandOpcode
;
6298 uint32_t ResourceStreamerControl
;
6302 GEN75_MI_RS_CONTROL_pack(__gen_user_data
*data
, void * restrict dst
,
6303 const struct GEN75_MI_RS_CONTROL
* restrict values
)
6305 uint32_t *dw
= (uint32_t * restrict
) dst
;
6308 __gen_field(values
->CommandType
, 29, 31) |
6309 __gen_field(values
->MICommandOpcode
, 23, 28) |
6310 __gen_field(values
->ResourceStreamerControl
, 0, 0) |
6315 #define GEN75_MI_RS_STORE_DATA_IMM_length 0x00000004
6316 #define GEN75_MI_RS_STORE_DATA_IMM_length_bias 0x00000002
6317 #define GEN75_MI_RS_STORE_DATA_IMM_header \
6319 .MICommandOpcode = 43, \
6322 struct GEN75_MI_RS_STORE_DATA_IMM
{
6323 uint32_t CommandType
;
6324 uint32_t MICommandOpcode
;
6325 uint32_t DwordLength
;
6326 __gen_address_type DestinationAddress
;
6327 uint32_t CoreModeEnable
;
6328 uint32_t DataDWord0
;
6332 GEN75_MI_RS_STORE_DATA_IMM_pack(__gen_user_data
*data
, void * restrict dst
,
6333 const struct GEN75_MI_RS_STORE_DATA_IMM
* restrict values
)
6335 uint32_t *dw
= (uint32_t * restrict
) dst
;
6338 __gen_field(values
->CommandType
, 29, 31) |
6339 __gen_field(values
->MICommandOpcode
, 23, 28) |
6340 __gen_field(values
->DwordLength
, 0, 7) |
6347 __gen_field(values
->CoreModeEnable
, 0, 0) |
6351 __gen_combine_address(data
, &dw
[2], values
->DestinationAddress
, dw2
);
6354 __gen_field(values
->DataDWord0
, 0, 31) |
6359 #define GEN75_MI_SEMAPHORE_MBOX_length 0x00000003
6360 #define GEN75_MI_SEMAPHORE_MBOX_length_bias 0x00000002
6361 #define GEN75_MI_SEMAPHORE_MBOX_header \
6363 .MICommandOpcode = 22, \
6366 struct GEN75_MI_SEMAPHORE_MBOX
{
6367 uint32_t CommandType
;
6368 uint32_t MICommandOpcode
;
6372 #define UseGeneralRegisterSelect 3
6373 uint32_t RegisterSelect
;
6374 uint32_t GeneralRegisterSelect
;
6375 uint32_t DwordLength
;
6376 uint32_t SemaphoreDataDword
;
6380 GEN75_MI_SEMAPHORE_MBOX_pack(__gen_user_data
*data
, void * restrict dst
,
6381 const struct GEN75_MI_SEMAPHORE_MBOX
* restrict values
)
6383 uint32_t *dw
= (uint32_t * restrict
) dst
;
6386 __gen_field(values
->CommandType
, 29, 31) |
6387 __gen_field(values
->MICommandOpcode
, 23, 28) |
6388 __gen_field(values
->RegisterSelect
, 16, 17) |
6389 __gen_field(values
->GeneralRegisterSelect
, 8, 13) |
6390 __gen_field(values
->DwordLength
, 0, 7) |
6394 __gen_field(values
->SemaphoreDataDword
, 0, 31) |
6402 #define GEN75_MI_SET_CONTEXT_length 0x00000002
6403 #define GEN75_MI_SET_CONTEXT_length_bias 0x00000002
6404 #define GEN75_MI_SET_CONTEXT_header \
6406 .MICommandOpcode = 24, \
6409 struct GEN75_MI_SET_CONTEXT
{
6410 uint32_t CommandType
;
6411 uint32_t MICommandOpcode
;
6412 uint32_t DwordLength
;
6413 __gen_address_type LogicalContextAddress
;
6414 uint32_t ReservedMustbe1
;
6415 uint32_t CoreModeEnable
;
6416 uint32_t ResourceStreamerStateSaveEnable
;
6417 uint32_t ResourceStreamerStateRestoreEnable
;
6418 uint32_t ForceRestore
;
6419 uint32_t RestoreInhibit
;
6423 GEN75_MI_SET_CONTEXT_pack(__gen_user_data
*data
, void * restrict dst
,
6424 const struct GEN75_MI_SET_CONTEXT
* restrict values
)
6426 uint32_t *dw
= (uint32_t * restrict
) dst
;
6429 __gen_field(values
->CommandType
, 29, 31) |
6430 __gen_field(values
->MICommandOpcode
, 23, 28) |
6431 __gen_field(values
->DwordLength
, 0, 7) |
6435 __gen_field(values
->ReservedMustbe1
, 8, 8) |
6436 __gen_field(values
->CoreModeEnable
, 4, 4) |
6437 __gen_field(values
->ResourceStreamerStateSaveEnable
, 3, 3) |
6438 __gen_field(values
->ResourceStreamerStateRestoreEnable
, 2, 2) |
6439 __gen_field(values
->ForceRestore
, 1, 1) |
6440 __gen_field(values
->RestoreInhibit
, 0, 0) |
6444 __gen_combine_address(data
, &dw
[1], values
->LogicalContextAddress
, dw1
);
6448 #define GEN75_MI_SET_PREDICATE_length 0x00000001
6449 #define GEN75_MI_SET_PREDICATE_length_bias 0x00000001
6450 #define GEN75_MI_SET_PREDICATE_header \
6452 .MICommandOpcode = 1, \
6453 .PREDICATEENABLE = 6
6455 struct GEN75_MI_SET_PREDICATE
{
6456 uint32_t CommandType
;
6457 uint32_t MICommandOpcode
;
6458 #define PredicateAlways 0
6459 #define PredicateonClear 1
6460 #define PredicateonSet 2
6461 #define PredicateDisable 3
6462 uint32_t PREDICATEENABLE
;
6466 GEN75_MI_SET_PREDICATE_pack(__gen_user_data
*data
, void * restrict dst
,
6467 const struct GEN75_MI_SET_PREDICATE
* restrict values
)
6469 uint32_t *dw
= (uint32_t * restrict
) dst
;
6472 __gen_field(values
->CommandType
, 29, 31) |
6473 __gen_field(values
->MICommandOpcode
, 23, 28) |
6474 __gen_field(values
->PREDICATEENABLE
, 0, 1) |
6479 #define GEN75_MI_STORE_DATA_IMM_length 0x00000004
6480 #define GEN75_MI_STORE_DATA_IMM_length_bias 0x00000002
6481 #define GEN75_MI_STORE_DATA_IMM_header \
6483 .MICommandOpcode = 32, \
6486 struct GEN75_MI_STORE_DATA_IMM
{
6487 uint32_t CommandType
;
6488 uint32_t MICommandOpcode
;
6489 uint32_t UseGlobalGTT
;
6490 uint32_t DwordLength
;
6492 uint32_t CoreModeEnable
;
6493 uint32_t DataDWord0
;
6494 uint32_t DataDWord1
;
6498 GEN75_MI_STORE_DATA_IMM_pack(__gen_user_data
*data
, void * restrict dst
,
6499 const struct GEN75_MI_STORE_DATA_IMM
* restrict values
)
6501 uint32_t *dw
= (uint32_t * restrict
) dst
;
6504 __gen_field(values
->CommandType
, 29, 31) |
6505 __gen_field(values
->MICommandOpcode
, 23, 28) |
6506 __gen_field(values
->UseGlobalGTT
, 22, 22) |
6507 __gen_field(values
->DwordLength
, 0, 5) |
6514 __gen_field(values
->Address
, 2, 31) |
6515 __gen_field(values
->CoreModeEnable
, 0, 0) |
6519 __gen_field(values
->DataDWord0
, 0, 31) |
6523 __gen_field(values
->DataDWord1
, 0, 31) |
6528 #define GEN75_MI_STORE_DATA_INDEX_length 0x00000003
6529 #define GEN75_MI_STORE_DATA_INDEX_length_bias 0x00000002
6530 #define GEN75_MI_STORE_DATA_INDEX_header \
6532 .MICommandOpcode = 33, \
6535 struct GEN75_MI_STORE_DATA_INDEX
{
6536 uint32_t CommandType
;
6537 uint32_t MICommandOpcode
;
6538 uint32_t DwordLength
;
6540 uint32_t DataDWord0
;
6541 uint32_t DataDWord1
;
6545 GEN75_MI_STORE_DATA_INDEX_pack(__gen_user_data
*data
, void * restrict dst
,
6546 const struct GEN75_MI_STORE_DATA_INDEX
* restrict values
)
6548 uint32_t *dw
= (uint32_t * restrict
) dst
;
6551 __gen_field(values
->CommandType
, 29, 31) |
6552 __gen_field(values
->MICommandOpcode
, 23, 28) |
6553 __gen_field(values
->DwordLength
, 0, 7) |
6557 __gen_field(values
->Offset
, 2, 11) |
6561 __gen_field(values
->DataDWord0
, 0, 31) |
6565 __gen_field(values
->DataDWord1
, 0, 31) |
6570 #define GEN75_MI_STORE_URB_MEM_length 0x00000003
6571 #define GEN75_MI_STORE_URB_MEM_length_bias 0x00000002
6572 #define GEN75_MI_STORE_URB_MEM_header \
6574 .MICommandOpcode = 45, \
6577 struct GEN75_MI_STORE_URB_MEM
{
6578 uint32_t CommandType
;
6579 uint32_t MICommandOpcode
;
6580 uint32_t DwordLength
;
6581 uint32_t URBAddress
;
6582 __gen_address_type MemoryAddress
;
6586 GEN75_MI_STORE_URB_MEM_pack(__gen_user_data
*data
, void * restrict dst
,
6587 const struct GEN75_MI_STORE_URB_MEM
* restrict values
)
6589 uint32_t *dw
= (uint32_t * restrict
) dst
;
6592 __gen_field(values
->CommandType
, 29, 31) |
6593 __gen_field(values
->MICommandOpcode
, 23, 28) |
6594 __gen_field(values
->DwordLength
, 0, 7) |
6598 __gen_field(values
->URBAddress
, 2, 14) |
6605 __gen_combine_address(data
, &dw
[2], values
->MemoryAddress
, dw2
);
6609 #define GEN75_MI_SUSPEND_FLUSH_length 0x00000001
6610 #define GEN75_MI_SUSPEND_FLUSH_length_bias 0x00000001
6611 #define GEN75_MI_SUSPEND_FLUSH_header \
6613 .MICommandOpcode = 11
6615 struct GEN75_MI_SUSPEND_FLUSH
{
6616 uint32_t CommandType
;
6617 uint32_t MICommandOpcode
;
6618 uint32_t SuspendFlush
;
6622 GEN75_MI_SUSPEND_FLUSH_pack(__gen_user_data
*data
, void * restrict dst
,
6623 const struct GEN75_MI_SUSPEND_FLUSH
* restrict values
)
6625 uint32_t *dw
= (uint32_t * restrict
) dst
;
6628 __gen_field(values
->CommandType
, 29, 31) |
6629 __gen_field(values
->MICommandOpcode
, 23, 28) |
6630 __gen_field(values
->SuspendFlush
, 0, 0) |
6635 #define GEN75_MI_TOPOLOGY_FILTER_length 0x00000001
6636 #define GEN75_MI_TOPOLOGY_FILTER_length_bias 0x00000001
6637 #define GEN75_MI_TOPOLOGY_FILTER_header \
6639 .MICommandOpcode = 13
6641 struct GEN75_MI_TOPOLOGY_FILTER
{
6642 uint32_t CommandType
;
6643 uint32_t MICommandOpcode
;
6644 uint32_t TopologyFilterValue
;
6648 GEN75_MI_TOPOLOGY_FILTER_pack(__gen_user_data
*data
, void * restrict dst
,
6649 const struct GEN75_MI_TOPOLOGY_FILTER
* restrict values
)
6651 uint32_t *dw
= (uint32_t * restrict
) dst
;
6654 __gen_field(values
->CommandType
, 29, 31) |
6655 __gen_field(values
->MICommandOpcode
, 23, 28) |
6656 __gen_field(values
->TopologyFilterValue
, 0, 5) |
6661 #define GEN75_MI_UPDATE_GTT_length_bias 0x00000002
6662 #define GEN75_MI_UPDATE_GTT_header \
6664 .MICommandOpcode = 35
6666 struct GEN75_MI_UPDATE_GTT
{
6667 uint32_t CommandType
;
6668 uint32_t MICommandOpcode
;
6669 #define PerProcessGraphicsAddress 0
6670 #define GlobalGraphicsAddress 1
6671 uint32_t UseGlobalGTT
;
6672 uint32_t DwordLength
;
6673 __gen_address_type EntryAddress
;
6674 /* variable length fields follow */
6678 GEN75_MI_UPDATE_GTT_pack(__gen_user_data
*data
, void * restrict dst
,
6679 const struct GEN75_MI_UPDATE_GTT
* restrict values
)
6681 uint32_t *dw
= (uint32_t * restrict
) dst
;
6684 __gen_field(values
->CommandType
, 29, 31) |
6685 __gen_field(values
->MICommandOpcode
, 23, 28) |
6686 __gen_field(values
->UseGlobalGTT
, 22, 22) |
6687 __gen_field(values
->DwordLength
, 0, 7) |
6694 __gen_combine_address(data
, &dw
[1], values
->EntryAddress
, dw1
);
6696 /* variable length fields follow */
6699 #define GEN75_MI_URB_ATOMIC_ALLOC_length 0x00000001
6700 #define GEN75_MI_URB_ATOMIC_ALLOC_length_bias 0x00000001
6701 #define GEN75_MI_URB_ATOMIC_ALLOC_header \
6703 .MICommandOpcode = 9
6705 struct GEN75_MI_URB_ATOMIC_ALLOC
{
6706 uint32_t CommandType
;
6707 uint32_t MICommandOpcode
;
6708 uint32_t URBAtomicStorageOffset
;
6709 uint32_t URBAtomicStorageSize
;
6713 GEN75_MI_URB_ATOMIC_ALLOC_pack(__gen_user_data
*data
, void * restrict dst
,
6714 const struct GEN75_MI_URB_ATOMIC_ALLOC
* restrict values
)
6716 uint32_t *dw
= (uint32_t * restrict
) dst
;
6719 __gen_field(values
->CommandType
, 29, 31) |
6720 __gen_field(values
->MICommandOpcode
, 23, 28) |
6721 __gen_field(values
->URBAtomicStorageOffset
, 12, 19) |
6722 __gen_field(values
->URBAtomicStorageSize
, 0, 8) |
6727 #define GEN75_MI_URB_CLEAR_length 0x00000002
6728 #define GEN75_MI_URB_CLEAR_length_bias 0x00000002
6729 #define GEN75_MI_URB_CLEAR_header \
6731 .MICommandOpcode = 25, \
6734 struct GEN75_MI_URB_CLEAR
{
6735 uint32_t CommandType
;
6736 uint32_t MICommandOpcode
;
6737 uint32_t DwordLength
;
6738 uint32_t URBClearLength
;
6739 uint32_t URBAddress
;
6743 GEN75_MI_URB_CLEAR_pack(__gen_user_data
*data
, void * restrict dst
,
6744 const struct GEN75_MI_URB_CLEAR
* restrict values
)
6746 uint32_t *dw
= (uint32_t * restrict
) dst
;
6749 __gen_field(values
->CommandType
, 29, 31) |
6750 __gen_field(values
->MICommandOpcode
, 23, 28) |
6751 __gen_field(values
->DwordLength
, 0, 7) |
6755 __gen_field(values
->URBClearLength
, 16, 29) |
6756 __gen_offset(values
->URBAddress
, 0, 14) |
6761 #define GEN75_MI_USER_INTERRUPT_length 0x00000001
6762 #define GEN75_MI_USER_INTERRUPT_length_bias 0x00000001
6763 #define GEN75_MI_USER_INTERRUPT_header \
6765 .MICommandOpcode = 2
6767 struct GEN75_MI_USER_INTERRUPT
{
6768 uint32_t CommandType
;
6769 uint32_t MICommandOpcode
;
6773 GEN75_MI_USER_INTERRUPT_pack(__gen_user_data
*data
, void * restrict dst
,
6774 const struct GEN75_MI_USER_INTERRUPT
* restrict values
)
6776 uint32_t *dw
= (uint32_t * restrict
) dst
;
6779 __gen_field(values
->CommandType
, 29, 31) |
6780 __gen_field(values
->MICommandOpcode
, 23, 28) |
6785 #define GEN75_MI_WAIT_FOR_EVENT_length 0x00000001
6786 #define GEN75_MI_WAIT_FOR_EVENT_length_bias 0x00000001
6787 #define GEN75_MI_WAIT_FOR_EVENT_header \
6789 .MICommandOpcode = 3
6791 struct GEN75_MI_WAIT_FOR_EVENT
{
6792 uint32_t CommandType
;
6793 uint32_t MICommandOpcode
;
6794 uint32_t DisplayPipeCHorizontalBlankWaitEnable
;
6795 uint32_t DisplayPipeCVerticalBlankWaitEnable
;
6796 uint32_t DisplaySpriteCFlipPendingWaitEnable
;
6797 #define Notenabled 0
6798 uint32_t ConditionCodeWaitSelect
;
6799 uint32_t DisplayPlaneCFlipPendingWaitEnable
;
6800 uint32_t DisplayPipeCScanLineWaitEnable
;
6801 uint32_t DisplayPipeBHorizontalBlankWaitEnable
;
6802 uint32_t DisplayPipeBVerticalBlankWaitEnable
;
6803 uint32_t DisplaySpriteBFlipPendingWaitEnable
;
6804 uint32_t DisplayPlaneBFlipPendingWaitEnable
;
6805 uint32_t DisplayPipeBScanLineWaitEnable
;
6806 uint32_t DisplayPipeAHorizontalBlankWaitEnable
;
6807 uint32_t DisplayPipeAVerticalBlankWaitEnable
;
6808 uint32_t DisplaySpriteAFlipPendingWaitEnable
;
6809 uint32_t DisplayPlaneAFlipPendingWaitEnable
;
6810 uint32_t DisplayPipeAScanLineWaitEnable
;
6814 GEN75_MI_WAIT_FOR_EVENT_pack(__gen_user_data
*data
, void * restrict dst
,
6815 const struct GEN75_MI_WAIT_FOR_EVENT
* restrict values
)
6817 uint32_t *dw
= (uint32_t * restrict
) dst
;
6820 __gen_field(values
->CommandType
, 29, 31) |
6821 __gen_field(values
->MICommandOpcode
, 23, 28) |
6822 __gen_field(values
->DisplayPipeCHorizontalBlankWaitEnable
, 22, 22) |
6823 __gen_field(values
->DisplayPipeCVerticalBlankWaitEnable
, 21, 21) |
6824 __gen_field(values
->DisplaySpriteCFlipPendingWaitEnable
, 20, 20) |
6825 __gen_field(values
->ConditionCodeWaitSelect
, 16, 19) |
6826 __gen_field(values
->DisplayPlaneCFlipPendingWaitEnable
, 15, 15) |
6827 __gen_field(values
->DisplayPipeCScanLineWaitEnable
, 14, 14) |
6828 __gen_field(values
->DisplayPipeBHorizontalBlankWaitEnable
, 13, 13) |
6829 __gen_field(values
->DisplayPipeBVerticalBlankWaitEnable
, 11, 11) |
6830 __gen_field(values
->DisplaySpriteBFlipPendingWaitEnable
, 10, 10) |
6831 __gen_field(values
->DisplayPlaneBFlipPendingWaitEnable
, 9, 9) |
6832 __gen_field(values
->DisplayPipeBScanLineWaitEnable
, 8, 8) |
6833 __gen_field(values
->DisplayPipeAHorizontalBlankWaitEnable
, 5, 5) |
6834 __gen_field(values
->DisplayPipeAVerticalBlankWaitEnable
, 3, 3) |
6835 __gen_field(values
->DisplaySpriteAFlipPendingWaitEnable
, 2, 2) |
6836 __gen_field(values
->DisplayPlaneAFlipPendingWaitEnable
, 1, 1) |
6837 __gen_field(values
->DisplayPipeAScanLineWaitEnable
, 0, 0) |
6842 #define GEN75_PIPE_CONTROL_length 0x00000005
6843 #define GEN75_PIPE_CONTROL_length_bias 0x00000002
6844 #define GEN75_PIPE_CONTROL_header \
6846 .CommandSubType = 3, \
6847 ._3DCommandOpcode = 2, \
6848 ._3DCommandSubOpcode = 0, \
6851 struct GEN75_PIPE_CONTROL
{
6852 uint32_t CommandType
;
6853 uint32_t CommandSubType
;
6854 uint32_t _3DCommandOpcode
;
6855 uint32_t _3DCommandSubOpcode
;
6856 uint32_t DwordLength
;
6859 uint32_t DestinationAddressType
;
6860 #define NoLRIOperation 0
6861 #define MMIOWriteImmediateData 1
6862 uint32_t LRIPostSyncOperation
;
6863 uint32_t StoreDataIndex
;
6864 uint32_t CommandStreamerStallEnable
;
6867 uint32_t GlobalSnapshotCountReset
;
6868 uint32_t TLBInvalidate
;
6869 uint32_t GenericMediaStateClear
;
6871 #define WriteImmediateData 1
6872 #define WritePSDepthCount 2
6873 #define WriteTimestamp 3
6874 uint32_t PostSyncOperation
;
6875 uint32_t DepthStallEnable
;
6876 #define DisableFlush 0
6877 #define EnableFlush 1
6878 uint32_t RenderTargetCacheFlushEnable
;
6879 uint32_t InstructionCacheInvalidateEnable
;
6880 uint32_t TextureCacheInvalidationEnable
;
6881 uint32_t IndirectStatePointersDisable
;
6882 uint32_t NotifyEnable
;
6883 uint32_t PipeControlFlushEnable
;
6884 uint32_t DCFlushEnable
;
6885 uint32_t VFCacheInvalidationEnable
;
6886 uint32_t ConstantCacheInvalidationEnable
;
6887 uint32_t StateCacheInvalidationEnable
;
6888 uint32_t StallAtPixelScoreboard
;
6889 #define FlushDisabled 0
6890 #define FlushEnabled 1
6891 uint32_t DepthCacheFlushEnable
;
6892 __gen_address_type Address
;
6893 uint32_t ImmediateData
;
6894 uint32_t ImmediateData0
;
6898 GEN75_PIPE_CONTROL_pack(__gen_user_data
*data
, void * restrict dst
,
6899 const struct GEN75_PIPE_CONTROL
* restrict values
)
6901 uint32_t *dw
= (uint32_t * restrict
) dst
;
6904 __gen_field(values
->CommandType
, 29, 31) |
6905 __gen_field(values
->CommandSubType
, 27, 28) |
6906 __gen_field(values
->_3DCommandOpcode
, 24, 26) |
6907 __gen_field(values
->_3DCommandSubOpcode
, 16, 23) |
6908 __gen_field(values
->DwordLength
, 0, 7) |
6912 __gen_field(values
->DestinationAddressType
, 24, 24) |
6913 __gen_field(values
->LRIPostSyncOperation
, 23, 23) |
6914 __gen_field(values
->StoreDataIndex
, 21, 21) |
6915 __gen_field(values
->CommandStreamerStallEnable
, 20, 20) |
6916 __gen_field(values
->GlobalSnapshotCountReset
, 19, 19) |
6917 __gen_field(values
->TLBInvalidate
, 18, 18) |
6918 __gen_field(values
->GenericMediaStateClear
, 16, 16) |
6919 __gen_field(values
->PostSyncOperation
, 14, 15) |
6920 __gen_field(values
->DepthStallEnable
, 13, 13) |
6921 __gen_field(values
->RenderTargetCacheFlushEnable
, 12, 12) |
6922 __gen_field(values
->InstructionCacheInvalidateEnable
, 11, 11) |
6923 __gen_field(values
->TextureCacheInvalidationEnable
, 10, 10) |
6924 __gen_field(values
->IndirectStatePointersDisable
, 9, 9) |
6925 __gen_field(values
->NotifyEnable
, 8, 8) |
6926 __gen_field(values
->PipeControlFlushEnable
, 7, 7) |
6927 __gen_field(values
->DCFlushEnable
, 5, 5) |
6928 __gen_field(values
->VFCacheInvalidationEnable
, 4, 4) |
6929 __gen_field(values
->ConstantCacheInvalidationEnable
, 3, 3) |
6930 __gen_field(values
->StateCacheInvalidationEnable
, 2, 2) |
6931 __gen_field(values
->StallAtPixelScoreboard
, 1, 1) |
6932 __gen_field(values
->DepthCacheFlushEnable
, 0, 0) |
6939 __gen_combine_address(data
, &dw
[2], values
->Address
, dw2
);
6942 __gen_field(values
->ImmediateData
, 0, 31) |
6946 __gen_field(values
->ImmediateData
, 0, 31) |
6951 #define GEN75_3DSTATE_CONSTANT_BODY_length 0x00000006
6953 #define GEN75_BINDING_TABLE_EDIT_ENTRY_length 0x00000001
6955 #define GEN75_GATHER_CONSTANT_ENTRY_length 0x00000001
6957 #define GEN75_VERTEX_BUFFER_STATE_length 0x00000004
6959 #define GEN75_VERTEX_ELEMENT_STATE_length 0x00000002
6961 #define GEN75_SO_DECL_ENTRY_length 0x00000002
6963 #define GEN75_SO_DECL_length 0x00000001
6965 #define GEN75_SCISSOR_RECT_length 0x00000002
6967 struct GEN75_SCISSOR_RECT
{
6968 uint32_t ScissorRectangleYMin
;
6969 uint32_t ScissorRectangleXMin
;
6970 uint32_t ScissorRectangleYMax
;
6971 uint32_t ScissorRectangleXMax
;
6975 GEN75_SCISSOR_RECT_pack(__gen_user_data
*data
, void * restrict dst
,
6976 const struct GEN75_SCISSOR_RECT
* restrict values
)
6978 uint32_t *dw
= (uint32_t * restrict
) dst
;
6981 __gen_field(values
->ScissorRectangleYMin
, 16, 31) |
6982 __gen_field(values
->ScissorRectangleXMin
, 0, 15) |
6986 __gen_field(values
->ScissorRectangleYMax
, 16, 31) |
6987 __gen_field(values
->ScissorRectangleXMax
, 0, 15) |
6992 #define GEN75_SF_CLIP_VIEWPORT_length 0x00000010
6994 struct GEN75_SF_CLIP_VIEWPORT
{
6995 float ViewportMatrixElementm00
;
6996 float ViewportMatrixElementm11
;
6997 float ViewportMatrixElementm22
;
6998 float ViewportMatrixElementm30
;
6999 float ViewportMatrixElementm31
;
7000 float ViewportMatrixElementm32
;
7001 float XMinClipGuardband
;
7002 float XMaxClipGuardband
;
7003 float YMinClipGuardband
;
7004 float YMaxClipGuardband
;
7008 GEN75_SF_CLIP_VIEWPORT_pack(__gen_user_data
*data
, void * restrict dst
,
7009 const struct GEN75_SF_CLIP_VIEWPORT
* restrict values
)
7011 uint32_t *dw
= (uint32_t * restrict
) dst
;
7014 __gen_float(values
->ViewportMatrixElementm00
) |
7018 __gen_float(values
->ViewportMatrixElementm11
) |
7022 __gen_float(values
->ViewportMatrixElementm22
) |
7026 __gen_float(values
->ViewportMatrixElementm30
) |
7030 __gen_float(values
->ViewportMatrixElementm31
) |
7034 __gen_float(values
->ViewportMatrixElementm32
) |
7044 __gen_float(values
->XMinClipGuardband
) |
7048 __gen_float(values
->XMaxClipGuardband
) |
7052 __gen_float(values
->YMinClipGuardband
) |
7056 __gen_float(values
->YMaxClipGuardband
) |
7064 #define GEN75_BLEND_STATE_length 0x00000002
7066 struct GEN75_BLEND_STATE
{
7067 uint32_t ColorBufferBlendEnable
;
7068 uint32_t IndependentAlphaBlendEnable
;
7069 #define BLENDFUNCTION_ADD 0
7070 #define BLENDFUNCTION_SUBTRACT 1
7071 #define BLENDFUNCTION_REVERSE_SUBTRACT 2
7072 #define BLENDFUNCTION_MIN 3
7073 #define BLENDFUNCTION_MAX 4
7074 uint32_t AlphaBlendFunction
;
7075 #define BLENDFACTOR_ONE 1
7076 #define BLENDFACTOR_SRC_COLOR 2
7077 #define BLENDFACTOR_SRC_ALPHA 3
7078 #define BLENDFACTOR_DST_ALPHA 4
7079 #define BLENDFACTOR_DST_COLOR 5
7080 #define BLENDFACTOR_SRC_ALPHA_SATURATE 6
7081 #define BLENDFACTOR_CONST_COLOR 7
7082 #define BLENDFACTOR_CONST_ALPHA 8
7083 #define BLENDFACTOR_SRC1_COLOR 9
7084 #define BLENDFACTOR_SRC1_ALPHA 10
7085 #define BLENDFACTOR_ZERO 17
7086 #define BLENDFACTOR_INV_SRC_COLOR 18
7087 #define BLENDFACTOR_INV_SRC_ALPHA 19
7088 #define BLENDFACTOR_INV_DST_ALPHA 20
7089 #define BLENDFACTOR_INV_DST_COLOR 21
7090 #define BLENDFACTOR_INV_CONST_COLOR 23
7091 #define BLENDFACTOR_INV_CONST_ALPHA 24
7092 #define BLENDFACTOR_INV_SRC1_COLOR 25
7093 #define BLENDFACTOR_INV_SRC1_ALPHA 26
7094 uint32_t SourceAlphaBlendFactor
;
7095 uint32_t DestinationAlphaBlendFactor
;
7096 #define BLENDFUNCTION_ADD 0
7097 #define BLENDFUNCTION_SUBTRACT 1
7098 #define BLENDFUNCTION_REVERSE_SUBTRACT 2
7099 #define BLENDFUNCTION_MIN 3
7100 #define BLENDFUNCTION_MAX 4
7101 uint32_t ColorBlendFunction
;
7102 uint32_t SourceBlendFactor
;
7103 uint32_t DestinationBlendFactor
;
7104 uint32_t AlphaToCoverageEnable
;
7105 uint32_t AlphaToOneEnable
;
7106 uint32_t AlphaToCoverageDitherEnable
;
7107 uint32_t WriteDisableAlpha
;
7108 uint32_t WriteDisableRed
;
7109 uint32_t WriteDisableGreen
;
7110 uint32_t WriteDisableBlue
;
7111 uint32_t LogicOpEnable
;
7112 #define LOGICOP_CLEAR 0
7113 #define LOGICOP_NOR 1
7114 #define LOGICOP_AND_INVERTED 2
7115 #define LOGICOP_COPY_INVERTED 3
7116 #define LOGICOP_AND_REVERSE 4
7117 #define LOGICOP_INVERT 5
7118 #define LOGICOP_XOR 6
7119 #define LOGICOP_NAND 7
7120 #define LOGICOP_AND 8
7121 #define LOGICOP_EQUIV 9
7122 #define LOGICOP_NOOP 10
7123 #define LOGICOP_OR_INVERTED 11
7124 #define LOGICOP_COPY 12
7125 #define LOGICOP_OR_REVERSE 13
7126 #define LOGICOP_OR 14
7127 #define LOGICOP_SET 15
7128 uint32_t LogicOpFunction
;
7129 uint32_t AlphaTestEnable
;
7130 #define COMPAREFUNCTION_ALWAYS 0
7131 #define COMPAREFUNCTION_NEVER 1
7132 #define COMPAREFUNCTION_LESS 2
7133 #define COMPAREFUNCTION_EQUAL 3
7134 #define COMPAREFUNCTION_LEQUAL 4
7135 #define COMPAREFUNCTION_GREATER 5
7136 #define COMPAREFUNCTION_NOTEQUAL 6
7137 #define COMPAREFUNCTION_GEQUAL 7
7138 uint32_t AlphaTestFunction
;
7139 uint32_t ColorDitherEnable
;
7140 uint32_t XDitherOffset
;
7141 uint32_t YDitherOffset
;
7142 #define COLORCLAMP_UNORM 0
7143 #define COLORCLAMP_SNORM 1
7144 #define COLORCLAMP_RTFORMAT 2
7145 uint32_t ColorClampRange
;
7146 uint32_t PreBlendColorClampEnable
;
7147 uint32_t PostBlendColorClampEnable
;
7151 GEN75_BLEND_STATE_pack(__gen_user_data
*data
, void * restrict dst
,
7152 const struct GEN75_BLEND_STATE
* restrict values
)
7154 uint32_t *dw
= (uint32_t * restrict
) dst
;
7157 __gen_field(values
->ColorBufferBlendEnable
, 31, 31) |
7158 __gen_field(values
->IndependentAlphaBlendEnable
, 30, 30) |
7159 __gen_field(values
->AlphaBlendFunction
, 26, 28) |
7160 __gen_field(values
->SourceAlphaBlendFactor
, 20, 24) |
7161 __gen_field(values
->DestinationAlphaBlendFactor
, 15, 19) |
7162 __gen_field(values
->ColorBlendFunction
, 11, 13) |
7163 __gen_field(values
->SourceBlendFactor
, 5, 9) |
7164 __gen_field(values
->DestinationBlendFactor
, 0, 4) |
7168 __gen_field(values
->AlphaToCoverageEnable
, 31, 31) |
7169 __gen_field(values
->AlphaToOneEnable
, 30, 30) |
7170 __gen_field(values
->AlphaToCoverageDitherEnable
, 29, 29) |
7171 __gen_field(values
->WriteDisableAlpha
, 27, 27) |
7172 __gen_field(values
->WriteDisableRed
, 26, 26) |
7173 __gen_field(values
->WriteDisableGreen
, 25, 25) |
7174 __gen_field(values
->WriteDisableBlue
, 24, 24) |
7175 __gen_field(values
->LogicOpEnable
, 22, 22) |
7176 __gen_field(values
->LogicOpFunction
, 18, 21) |
7177 __gen_field(values
->AlphaTestEnable
, 16, 16) |
7178 __gen_field(values
->AlphaTestFunction
, 13, 15) |
7179 __gen_field(values
->ColorDitherEnable
, 12, 12) |
7180 __gen_field(values
->XDitherOffset
, 10, 11) |
7181 __gen_field(values
->YDitherOffset
, 8, 9) |
7182 __gen_field(values
->ColorClampRange
, 2, 3) |
7183 __gen_field(values
->PreBlendColorClampEnable
, 1, 1) |
7184 __gen_field(values
->PostBlendColorClampEnable
, 0, 0) |
7189 #define GEN75_CC_VIEWPORT_length 0x00000002
7191 struct GEN75_CC_VIEWPORT
{
7197 GEN75_CC_VIEWPORT_pack(__gen_user_data
*data
, void * restrict dst
,
7198 const struct GEN75_CC_VIEWPORT
* restrict values
)
7200 uint32_t *dw
= (uint32_t * restrict
) dst
;
7203 __gen_float(values
->MinimumDepth
) |
7207 __gen_float(values
->MaximumDepth
) |
7212 #define GEN75_COLOR_CALC_STATE_length 0x00000006
7214 struct GEN75_COLOR_CALC_STATE
{
7215 uint32_t StencilReferenceValue
;
7216 uint32_t BackFaceStencilReferenceValue
;
7218 #define NotCancelled 1
7219 uint32_t RoundDisableFunctionDisable
;
7220 #define ALPHATEST_UNORM8 0
7221 #define ALPHATEST_FLOAT32 1
7222 uint32_t AlphaTestFormat
;
7223 uint32_t AlphaReferenceValueAsUNORM8
;
7224 float AlphaReferenceValueAsFLOAT32
;
7225 float BlendConstantColorRed
;
7226 float BlendConstantColorGreen
;
7227 float BlendConstantColorBlue
;
7228 float BlendConstantColorAlpha
;
7232 GEN75_COLOR_CALC_STATE_pack(__gen_user_data
*data
, void * restrict dst
,
7233 const struct GEN75_COLOR_CALC_STATE
* restrict values
)
7235 uint32_t *dw
= (uint32_t * restrict
) dst
;
7238 __gen_field(values
->StencilReferenceValue
, 24, 31) |
7239 __gen_field(values
->BackFaceStencilReferenceValue
, 16, 23) |
7240 __gen_field(values
->RoundDisableFunctionDisable
, 15, 15) |
7241 __gen_field(values
->AlphaTestFormat
, 0, 0) |
7245 __gen_field(values
->AlphaReferenceValueAsUNORM8
, 0, 31) |
7246 __gen_float(values
->AlphaReferenceValueAsFLOAT32
) |
7250 __gen_float(values
->BlendConstantColorRed
) |
7254 __gen_float(values
->BlendConstantColorGreen
) |
7258 __gen_float(values
->BlendConstantColorBlue
) |
7262 __gen_float(values
->BlendConstantColorAlpha
) |
7267 #define GEN75_DEPTH_STENCIL_STATE_length 0x00000003
7269 struct GEN75_DEPTH_STENCIL_STATE
{
7270 uint32_t StencilTestEnable
;
7271 #define COMPAREFUNCTION_ALWAYS 0
7272 #define COMPAREFUNCTION_NEVER 1
7273 #define COMPAREFUNCTION_LESS 2
7274 #define COMPAREFUNCTION_EQUAL 3
7275 #define COMPAREFUNCTION_LEQUAL 4
7276 #define COMPAREFUNCTION_GREATER 5
7277 #define COMPAREFUNCTION_NOTEQUAL 6
7278 #define COMPAREFUNCTION_GEQUAL 7
7279 uint32_t StencilTestFunction
;
7280 #define STENCILOP_KEEP 0
7281 #define STENCILOP_ZERO 1
7282 #define STENCILOP_REPLACE 2
7283 #define STENCILOP_INCRSAT 3
7284 #define STENCILOP_DECRSAT 4
7285 #define STENCILOP_INCR 5
7286 #define STENCILOP_DECR 6
7287 #define STENCILOP_INVERT 7
7288 uint32_t StencilFailOp
;
7289 uint32_t StencilPassDepthFailOp
;
7290 uint32_t StencilPassDepthPassOp
;
7291 uint32_t StencilBufferWriteEnable
;
7292 uint32_t DoubleSidedStencilEnable
;
7293 #define COMPAREFUNCTION_ALWAYS 0
7294 #define COMPAREFUNCTION_NEVER 1
7295 #define COMPAREFUNCTION_LESS 2
7296 #define COMPAREFUNCTION_EQUAL 3
7297 #define COMPAREFUNCTION_LEQUAL 4
7298 #define COMPAREFUNCTION_GREATER 5
7299 #define COMPAREFUNCTION_NOTEQUAL 6
7300 #define COMPAREFUNCTION_GEQUAL 7
7301 uint32_t BackFaceStencilTestFunction
;
7302 #define STENCILOP_KEEP 0
7303 #define STENCILOP_ZERO 1
7304 #define STENCILOP_REPLACE 2
7305 #define STENCILOP_INCRSAT 3
7306 #define STENCILOP_DECRSAT 4
7307 #define STENCILOP_INCR 5
7308 #define STENCILOP_DECR 6
7309 #define STENCILOP_INVERT 7
7310 uint32_t BackfaceStencilFailOp
;
7311 uint32_t BackfaceStencilPassDepthFailOp
;
7312 uint32_t BackfaceStencilPassDepthPassOp
;
7313 uint32_t StencilTestMask
;
7314 uint32_t StencilWriteMask
;
7315 uint32_t BackfaceStencilTestMask
;
7316 uint32_t BackfaceStencilWriteMask
;
7317 uint32_t DepthTestEnable
;
7318 #define COMPAREFUNCTION_ALWAYS 0
7319 #define COMPAREFUNCTION_NEVER 1
7320 #define COMPAREFUNCTION_LESS 2
7321 #define COMPAREFUNCTION_EQUAL 3
7322 #define COMPAREFUNCTION_LEQUAL 4
7323 #define COMPAREFUNCTION_GREATER 5
7324 #define COMPAREFUNCTION_NOTEQUAL 6
7325 #define COMPAREFUNCTION_GEQUAL 7
7326 uint32_t DepthTestFunction
;
7327 uint32_t DepthBufferWriteEnable
;
7331 GEN75_DEPTH_STENCIL_STATE_pack(__gen_user_data
*data
, void * restrict dst
,
7332 const struct GEN75_DEPTH_STENCIL_STATE
* restrict values
)
7334 uint32_t *dw
= (uint32_t * restrict
) dst
;
7337 __gen_field(values
->StencilTestEnable
, 31, 31) |
7338 __gen_field(values
->StencilTestFunction
, 28, 30) |
7339 __gen_field(values
->StencilFailOp
, 25, 27) |
7340 __gen_field(values
->StencilPassDepthFailOp
, 22, 24) |
7341 __gen_field(values
->StencilPassDepthPassOp
, 19, 21) |
7342 __gen_field(values
->StencilBufferWriteEnable
, 18, 18) |
7343 __gen_field(values
->DoubleSidedStencilEnable
, 15, 15) |
7344 __gen_field(values
->BackFaceStencilTestFunction
, 12, 14) |
7345 __gen_field(values
->BackfaceStencilFailOp
, 9, 11) |
7346 __gen_field(values
->BackfaceStencilPassDepthFailOp
, 6, 8) |
7347 __gen_field(values
->BackfaceStencilPassDepthPassOp
, 3, 5) |
7351 __gen_field(values
->StencilTestMask
, 24, 31) |
7352 __gen_field(values
->StencilWriteMask
, 16, 23) |
7353 __gen_field(values
->BackfaceStencilTestMask
, 8, 15) |
7354 __gen_field(values
->BackfaceStencilWriteMask
, 0, 7) |
7358 __gen_field(values
->DepthTestEnable
, 31, 31) |
7359 __gen_field(values
->DepthTestFunction
, 27, 29) |
7360 __gen_field(values
->DepthBufferWriteEnable
, 26, 26) |
7365 #define GEN75_MEMORY_OBJECT_CONTROL_STATE_length 0x00000001
7367 #define GEN75_VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_length 0x00000001
7369 struct GEN75_VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS
{
7370 #define Highestpriority 0
7371 #define Secondhighestpriority 1
7372 #define Thirdhighestpriority 2
7373 #define Lowestpriority 3
7374 uint32_t ArbitrationPriorityControl
;
7377 #define LLCeLLCWBcacheable 2
7378 #define eLLCWBcacheable 3
7379 uint32_t LLCeLLCCacheabilityControlLLCCC
;
7380 uint32_t L3CacheabilityControlL3CC
;
7384 GEN75_VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_pack(__gen_user_data
*data
, void * restrict dst
,
7385 const struct GEN75_VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS
* restrict values
)
7387 uint32_t *dw
= (uint32_t * restrict
) dst
;
7390 __gen_field(values
->ArbitrationPriorityControl
, 4, 5) |
7391 __gen_field(values
->LLCeLLCCacheabilityControlLLCCC
, 1, 2) |
7392 __gen_field(values
->L3CacheabilityControlL3CC
, 0, 0) |
7397 #define GEN75_INTERFACE_DESCRIPTOR_DATA_length 0x00000008
7399 struct GEN75_INTERFACE_DESCRIPTOR_DATA
{
7400 uint32_t KernelStartPointer
;
7403 uint32_t SingleProgramFlow
;
7404 #define NormalPriority 0
7405 #define HighPriority 1
7406 uint32_t ThreadPriority
;
7409 uint32_t FloatingPointMode
;
7410 uint32_t IllegalOpcodeExceptionEnable
;
7411 uint32_t MaskStackExceptionEnable
;
7412 uint32_t SoftwareExceptionEnable
;
7413 uint32_t SamplerStatePointer
;
7414 #define Nosamplersused 0
7415 #define Between1and4samplersused 1
7416 #define Between5and8samplersused 2
7417 #define Between9and12samplersused 3
7418 #define Between13and16samplersused 4
7419 uint32_t SamplerCount
;
7420 uint32_t BindingTablePointer
;
7421 uint32_t BindingTableEntryCount
;
7422 uint32_t ConstantURBEntryReadLength
;
7427 uint32_t RoundingMode
;
7428 uint32_t BarrierEnable
;
7429 uint32_t SharedLocalMemorySize
;
7430 uint32_t NumberofThreadsinGPGPUThreadGroup
;
7431 uint32_t CrossThreadConstantDataReadLength
;
7435 GEN75_INTERFACE_DESCRIPTOR_DATA_pack(__gen_user_data
*data
, void * restrict dst
,
7436 const struct GEN75_INTERFACE_DESCRIPTOR_DATA
* restrict values
)
7438 uint32_t *dw
= (uint32_t * restrict
) dst
;
7441 __gen_offset(values
->KernelStartPointer
, 6, 31) |
7445 __gen_field(values
->SingleProgramFlow
, 18, 18) |
7446 __gen_field(values
->ThreadPriority
, 17, 17) |
7447 __gen_field(values
->FloatingPointMode
, 16, 16) |
7448 __gen_field(values
->IllegalOpcodeExceptionEnable
, 13, 13) |
7449 __gen_field(values
->MaskStackExceptionEnable
, 11, 11) |
7450 __gen_field(values
->SoftwareExceptionEnable
, 7, 7) |
7454 __gen_offset(values
->SamplerStatePointer
, 5, 31) |
7455 __gen_field(values
->SamplerCount
, 2, 4) |
7459 __gen_offset(values
->BindingTablePointer
, 5, 15) |
7460 __gen_field(values
->BindingTableEntryCount
, 0, 4) |
7464 __gen_field(values
->ConstantURBEntryReadLength
, 16, 31) |
7468 __gen_field(values
->RoundingMode
, 22, 23) |
7469 __gen_field(values
->BarrierEnable
, 21, 21) |
7470 __gen_field(values
->SharedLocalMemorySize
, 16, 20) |
7471 __gen_field(values
->NumberofThreadsinGPGPUThreadGroup
, 0, 7) |
7475 __gen_field(values
->CrossThreadConstantDataReadLength
, 0, 7) |
7483 #define GEN75_PALETTE_ENTRY_length 0x00000001
7485 #define GEN75_BINDING_TABLE_STATE_length 0x00000001
7487 struct GEN75_BINDING_TABLE_STATE
{
7488 uint32_t SurfaceStatePointer
;
7492 GEN75_BINDING_TABLE_STATE_pack(__gen_user_data
*data
, void * restrict dst
,
7493 const struct GEN75_BINDING_TABLE_STATE
* restrict values
)
7495 uint32_t *dw
= (uint32_t * restrict
) dst
;
7498 __gen_offset(values
->SurfaceStatePointer
, 5, 31) |
7503 #define GEN75_RENDER_SURFACE_STATE_length 0x00000008
7505 struct GEN75_RENDER_SURFACE_STATE
{
7506 #define SURFTYPE_1D 0
7507 #define SURFTYPE_2D 1
7508 #define SURFTYPE_3D 2
7509 #define SURFTYPE_CUBE 3
7510 #define SURFTYPE_BUFFER 4
7511 #define SURFTYPE_STRBUF 5
7512 #define SURFTYPE_NULL 7
7513 uint32_t SurfaceType
;
7514 uint32_t SurfaceArray
;
7515 uint32_t SurfaceFormat
;
7516 uint32_t SurfaceVerticalAlignment
;
7519 uint32_t SurfaceHorizontalAlignment
;
7520 uint32_t TiledSurface
;
7521 #define TILEWALK_XMAJOR 0
7522 #define TILEWALK_YMAJOR 1
7524 uint32_t VerticalLineStride
;
7525 uint32_t VerticalLineStrideOffset
;
7526 #define ARYSPC_FULL 0
7527 #define ARYSPC_LOD0 1
7528 uint32_t SurfaceArraySpacing
;
7529 uint32_t RenderCacheReadWriteMode
;
7530 #define NORMAL_MODE 0
7531 #define PROGRESSIVE_FRAME 2
7532 #define INTERLACED_FRAME 3
7533 uint32_t MediaBoundaryPixelMode
;
7534 uint32_t CubeFaceEnables
;
7535 __gen_address_type SurfaceBaseAddress
;
7539 uint32_t IntegerSurfaceFormat
;
7540 uint32_t SurfacePitch
;
7541 #define RTROTATE_0DEG 0
7542 #define RTROTATE_90DEG 1
7543 #define RTROTATE_270DEG 3
7544 uint32_t RenderTargetRotation
;
7545 uint32_t MinimumArrayElement
;
7546 uint32_t RenderTargetViewExtent
;
7548 #define MSFMT_DEPTH_STENCIL 1
7549 uint32_t MultisampledSurfaceStorageFormat
;
7550 #define MULTISAMPLECOUNT_1 0
7551 #define MULTISAMPLECOUNT_4 2
7552 #define MULTISAMPLECOUNT_8 3
7553 uint32_t NumberofMultisamples
;
7554 uint32_t MultisamplePositionPaletteIndex
;
7555 uint32_t MinimumArrayElement0
;
7558 struct GEN75_MEMORY_OBJECT_CONTROL_STATE SurfaceObjectControlState
;
7559 uint32_t SurfaceMinLOD
;
7560 uint32_t MIPCountLOD
;
7561 __gen_address_type MCSBaseAddress
;
7562 uint32_t MCSSurfacePitch
;
7563 __gen_address_type AppendCounterAddress
;
7564 uint32_t AppendCounterEnable
;
7566 uint32_t ReservedMBZ
;
7567 uint32_t XOffsetforUVPlane
;
7568 uint32_t YOffsetforUVPlane
;
7575 uint32_t ShaderChannelSelectR
;
7576 uint32_t ShaderChannelSelectG
;
7577 uint32_t ShaderChannelSelectB
;
7578 uint32_t ShaderChannelSelectA
;
7579 float ResourceMinLOD
;
7583 GEN75_RENDER_SURFACE_STATE_pack(__gen_user_data
*data
, void * restrict dst
,
7584 const struct GEN75_RENDER_SURFACE_STATE
* restrict values
)
7586 uint32_t *dw
= (uint32_t * restrict
) dst
;
7589 __gen_field(values
->SurfaceType
, 29, 31) |
7590 __gen_field(values
->SurfaceArray
, 28, 28) |
7591 __gen_field(values
->SurfaceFormat
, 18, 26) |
7592 __gen_field(values
->SurfaceVerticalAlignment
, 16, 17) |
7593 __gen_field(values
->SurfaceHorizontalAlignment
, 15, 15) |
7594 __gen_field(values
->TiledSurface
, 14, 14) |
7595 __gen_field(values
->TileWalk
, 13, 13) |
7596 __gen_field(values
->VerticalLineStride
, 12, 12) |
7597 __gen_field(values
->VerticalLineStrideOffset
, 11, 11) |
7598 __gen_field(values
->SurfaceArraySpacing
, 10, 10) |
7599 __gen_field(values
->RenderCacheReadWriteMode
, 8, 8) |
7600 __gen_field(values
->MediaBoundaryPixelMode
, 6, 7) |
7601 __gen_field(values
->CubeFaceEnables
, 0, 5) |
7608 __gen_combine_address(data
, &dw
[1], values
->SurfaceBaseAddress
, dw1
);
7611 __gen_field(values
->Height
, 16, 29) |
7612 __gen_field(values
->Width
, 0, 13) |
7616 __gen_field(values
->Depth
, 21, 31) |
7617 __gen_field(values
->IntegerSurfaceFormat
, 18, 20) |
7618 __gen_field(values
->SurfacePitch
, 0, 17) |
7622 __gen_field(values
->RenderTargetRotation
, 29, 30) |
7623 __gen_field(values
->MinimumArrayElement
, 18, 28) |
7624 __gen_field(values
->RenderTargetViewExtent
, 7, 17) |
7625 __gen_field(values
->MultisampledSurfaceStorageFormat
, 6, 6) |
7626 __gen_field(values
->NumberofMultisamples
, 3, 5) |
7627 __gen_field(values
->MultisamplePositionPaletteIndex
, 0, 2) |
7628 __gen_field(values
->MinimumArrayElement
, 0, 26) |
7631 uint32_t dw_SurfaceObjectControlState
;
7632 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data
, &dw_SurfaceObjectControlState
, &values
->SurfaceObjectControlState
);
7634 __gen_offset(values
->XOffset
, 25, 31) |
7635 __gen_offset(values
->YOffset
, 20, 23) |
7636 __gen_field(dw_SurfaceObjectControlState
, 16, 19) |
7637 __gen_field(values
->SurfaceMinLOD
, 4, 7) |
7638 __gen_field(values
->MIPCountLOD
, 0, 3) |
7642 __gen_field(values
->MCSSurfacePitch
, 3, 11) |
7643 __gen_field(values
->AppendCounterEnable
, 1, 1) |
7644 __gen_field(values
->MCSEnable
, 0, 0) |
7645 __gen_field(values
->ReservedMBZ
, 30, 31) |
7646 __gen_field(values
->XOffsetforUVPlane
, 16, 29) |
7647 __gen_field(values
->YOffsetforUVPlane
, 0, 13) |
7651 __gen_combine_address(data
, &dw
[6], values
->AppendCounterAddress
, dw6
);
7654 __gen_field(values
->ShaderChannelSelectR
, 25, 27) |
7655 __gen_field(values
->ShaderChannelSelectG
, 22, 24) |
7656 __gen_field(values
->ShaderChannelSelectB
, 19, 21) |
7657 __gen_field(values
->ShaderChannelSelectA
, 16, 18) |
7658 __gen_field(values
->ResourceMinLOD
* (1 << 8), 0, 11) |
7663 #define GEN75_SAMPLER_BORDER_COLOR_STATE_length 0x00000014
7665 struct GEN75_SAMPLER_BORDER_COLOR_STATE
{
7666 uint32_t BorderColorRedDX100GL
;
7667 uint32_t BorderColorAlpha
;
7668 uint32_t BorderColorBlue
;
7669 uint32_t BorderColorGreen
;
7670 uint32_t BorderColorRedDX9
;
7671 uint32_t BorderColorGreen0
;
7672 uint32_t BorderColorBlue0
;
7673 uint32_t BorderColorAlpha0
;
7674 uint64_t BorderColor
;
7675 uint64_t BorderColor0
;
7676 uint64_t BorderColor1
;
7680 GEN75_SAMPLER_BORDER_COLOR_STATE_pack(__gen_user_data
*data
, void * restrict dst
,
7681 const struct GEN75_SAMPLER_BORDER_COLOR_STATE
* restrict values
)
7683 uint32_t *dw
= (uint32_t * restrict
) dst
;
7686 __gen_field(values
->BorderColorRedDX100GL
, 0, 31) |
7687 __gen_field(values
->BorderColorAlpha
, 24, 31) |
7688 __gen_field(values
->BorderColorBlue
, 16, 23) |
7689 __gen_field(values
->BorderColorGreen
, 8, 15) |
7690 __gen_field(values
->BorderColorRedDX9
, 0, 7) |
7694 __gen_field(values
->BorderColorGreen
, 0, 31) |
7698 __gen_field(values
->BorderColorBlue
, 0, 31) |
7702 __gen_field(values
->BorderColorAlpha
, 0, 31) |
7709 __gen_field(values
->BorderColor
, 0, 127) |
7710 __gen_field(values
->BorderColor
, 0, 127) |
7711 __gen_field(values
->BorderColor
, 0, 127) |
7716 #define GEN75_SAMPLER_STATE_length 0x00000004
7718 struct GEN75_SAMPLER_STATE
{
7719 uint32_t SamplerDisable
;
7722 uint32_t TextureBorderColorMode
;
7724 uint32_t LODPreClampEnable
;
7726 #define MIPFILTER_NONE 0
7727 #define MIPFILTER_NEAREST 1
7728 #define MIPFILTER_LINEAR 3
7729 uint32_t MipModeFilter
;
7730 #define MAPFILTER_NEAREST 0
7731 #define MAPFILTER_LINEAR 1
7732 #define MAPFILTER_ANISOTROPIC 2
7733 #define MAPFILTER_MONO 6
7734 uint32_t MagModeFilter
;
7735 #define MAPFILTER_NEAREST 0
7736 #define MAPFILTER_LINEAR 1
7737 #define MAPFILTER_ANISOTROPIC 2
7738 #define MAPFILTER_MONO 6
7739 uint32_t MinModeFilter
;
7740 uint32_t TextureLODBias
;
7742 #define EWAApproximation 1
7743 uint32_t AnisotropicAlgorithm
;
7746 #define PREFILTEROPALWAYS 0
7747 #define PREFILTEROPNEVER 1
7748 #define PREFILTEROPLESS 2
7749 #define PREFILTEROPEQUAL 3
7750 #define PREFILTEROPLEQUAL 4
7751 #define PREFILTEROPGREATER 5
7752 #define PREFILTEROPNOTEQUAL 6
7753 #define PREFILTEROPGEQUAL 7
7754 uint32_t ShadowFunction
;
7755 #define PROGRAMMED 0
7757 uint32_t CubeSurfaceControlMode
;
7758 uint32_t BorderColorPointer
;
7759 uint32_t ChromaKeyEnable
;
7760 uint32_t ChromaKeyIndex
;
7761 #define KEYFILTER_KILL_ON_ANY_MATCH 0
7762 #define KEYFILTER_REPLACE_BLACK 1
7763 uint32_t ChromaKeyMode
;
7772 uint32_t MaximumAnisotropy
;
7773 uint32_t RAddressMinFilterRoundingEnable
;
7774 uint32_t RAddressMagFilterRoundingEnable
;
7775 uint32_t VAddressMinFilterRoundingEnable
;
7776 uint32_t VAddressMagFilterRoundingEnable
;
7777 uint32_t UAddressMinFilterRoundingEnable
;
7778 uint32_t UAddressMagFilterRoundingEnable
;
7780 #define TRIQUAL_HIGHMAG_CLAMP_MIPFILTER 1
7783 uint32_t TrilinearFilterQuality
;
7784 uint32_t NonnormalizedCoordinateEnable
;
7785 uint32_t TCXAddressControlMode
;
7786 uint32_t TCYAddressControlMode
;
7787 uint32_t TCZAddressControlMode
;
7791 GEN75_SAMPLER_STATE_pack(__gen_user_data
*data
, void * restrict dst
,
7792 const struct GEN75_SAMPLER_STATE
* restrict values
)
7794 uint32_t *dw
= (uint32_t * restrict
) dst
;
7797 __gen_field(values
->SamplerDisable
, 31, 31) |
7798 __gen_field(values
->TextureBorderColorMode
, 29, 29) |
7799 __gen_field(values
->LODPreClampEnable
, 28, 28) |
7800 __gen_field(values
->BaseMipLevel
* (1 << 1), 22, 26) |
7801 __gen_field(values
->MipModeFilter
, 20, 21) |
7802 __gen_field(values
->MagModeFilter
, 17, 19) |
7803 __gen_field(values
->MinModeFilter
, 14, 16) |
7804 __gen_field(values
->TextureLODBias
, 1, 13) |
7805 __gen_field(values
->AnisotropicAlgorithm
, 0, 0) |
7809 __gen_field(values
->MinLOD
* (1 << 8), 20, 31) |
7810 __gen_field(values
->MaxLOD
* (1 << 8), 8, 19) |
7811 __gen_field(values
->ShadowFunction
, 1, 3) |
7812 __gen_field(values
->CubeSurfaceControlMode
, 0, 0) |
7816 __gen_offset(values
->BorderColorPointer
, 5, 31) |
7820 __gen_field(values
->ChromaKeyEnable
, 25, 25) |
7821 __gen_field(values
->ChromaKeyIndex
, 23, 24) |
7822 __gen_field(values
->ChromaKeyMode
, 22, 22) |
7823 __gen_field(values
->MaximumAnisotropy
, 19, 21) |
7824 __gen_field(values
->RAddressMinFilterRoundingEnable
, 13, 13) |
7825 __gen_field(values
->RAddressMagFilterRoundingEnable
, 14, 14) |
7826 __gen_field(values
->VAddressMinFilterRoundingEnable
, 15, 15) |
7827 __gen_field(values
->VAddressMagFilterRoundingEnable
, 16, 16) |
7828 __gen_field(values
->UAddressMinFilterRoundingEnable
, 17, 17) |
7829 __gen_field(values
->UAddressMagFilterRoundingEnable
, 18, 18) |
7830 __gen_field(values
->TrilinearFilterQuality
, 11, 12) |
7831 __gen_field(values
->NonnormalizedCoordinateEnable
, 10, 10) |
7832 __gen_field(values
->TCXAddressControlMode
, 6, 8) |
7833 __gen_field(values
->TCYAddressControlMode
, 3, 5) |
7834 __gen_field(values
->TCZAddressControlMode
, 0, 2) |
7839 /* Enum 3D_Prim_Topo_Type */
7840 #define _3DPRIM_POINTLIST 1
7841 #define _3DPRIM_LINELIST 2
7842 #define _3DPRIM_LINESTRIP 3
7843 #define _3DPRIM_TRILIST 4
7844 #define _3DPRIM_TRISTRIP 5
7845 #define _3DPRIM_TRIFAN 6
7846 #define _3DPRIM_QUADLIST 7
7847 #define _3DPRIM_QUADSTRIP 8
7848 #define _3DPRIM_LINELIST_ADJ 9
7849 #define _3DPRIM_LISTSTRIP_ADJ 10
7850 #define _3DPRIM_TRILIST_ADJ 11
7851 #define _3DPRIM_TRISTRIP_ADJ 12
7852 #define _3DPRIM_TRISTRIP_REVERSE 13
7853 #define _3DPRIM_POLYGON 14
7854 #define _3DPRIM_RECTLIST 15
7855 #define _3DPRIM_LINELOOP 16
7856 #define _3DPRIM_POINTLIST_BF 17
7857 #define _3DPRIM_LINESTRIP_CONT 18
7858 #define _3DPRIM_LINESTRIP_BF 19
7859 #define _3DPRIM_LINESTRIP_CONT_BF 20
7860 #define _3DPRIM_TRIFAN_NOSTIPPLE 22
7861 #define _3DPRIM_PATCHLIST_1 32
7862 #define _3DPRIM_PATCHLIST_2 33
7863 #define _3DPRIM_PATCHLIST_3 34
7864 #define _3DPRIM_PATCHLIST_4 35
7865 #define _3DPRIM_PATCHLIST_5 36
7866 #define _3DPRIM_PATCHLIST_6 37
7867 #define _3DPRIM_PATCHLIST_7 38
7868 #define _3DPRIM_PATCHLIST_8 39
7869 #define _3DPRIM_PATCHLIST_9 40
7870 #define _3DPRIM_PATCHLIST_10 41
7871 #define _3DPRIM_PATCHLIST_11 42
7872 #define _3DPRIM_PATCHLIST_12 43
7873 #define _3DPRIM_PATCHLIST_13 44
7874 #define _3DPRIM_PATCHLIST_14 45
7875 #define _3DPRIM_PATCHLIST_15 46
7876 #define _3DPRIM_PATCHLIST_16 47
7877 #define _3DPRIM_PATCHLIST_17 48
7878 #define _3DPRIM_PATCHLIST_18 49
7879 #define _3DPRIM_PATCHLIST_19 50
7880 #define _3DPRIM_PATCHLIST_20 51
7881 #define _3DPRIM_PATCHLIST_21 52
7882 #define _3DPRIM_PATCHLIST_22 53
7883 #define _3DPRIM_PATCHLIST_23 54
7884 #define _3DPRIM_PATCHLIST_24 55
7885 #define _3DPRIM_PATCHLIST_25 56
7886 #define _3DPRIM_PATCHLIST_26 57
7887 #define _3DPRIM_PATCHLIST_27 58
7888 #define _3DPRIM_PATCHLIST_28 59
7889 #define _3DPRIM_PATCHLIST_29 60
7890 #define _3DPRIM_PATCHLIST_30 61
7891 #define _3DPRIM_PATCHLIST_31 62
7892 #define _3DPRIM_PATCHLIST_32 63
7894 /* Enum 3D_Vertex_Component_Control */
7895 #define VFCOMP_NOSTORE 0
7896 #define VFCOMP_STORE_SRC 1
7897 #define VFCOMP_STORE_0 2
7898 #define VFCOMP_STORE_1_FP 3
7899 #define VFCOMP_STORE_1_INT 4
7900 #define VFCOMP_STORE_VID 5
7901 #define VFCOMP_STORE_IID 6
7902 #define VFCOMP_STORE_PID 7
7904 /* Enum 3D_Compare_Function */
7905 #define COMPAREFUNCTION_ALWAYS 0
7906 #define COMPAREFUNCTION_NEVER 1
7907 #define COMPAREFUNCTION_LESS 2
7908 #define COMPAREFUNCTION_EQUAL 3
7909 #define COMPAREFUNCTION_LEQUAL 4
7910 #define COMPAREFUNCTION_GREATER 5
7911 #define COMPAREFUNCTION_NOTEQUAL 6
7912 #define COMPAREFUNCTION_GEQUAL 7
7914 /* Enum SURFACE_FORMAT */
7915 #define R32G32B32A32_FLOAT 0
7916 #define R32G32B32A32_SINT 1
7917 #define R32G32B32A32_UINT 2
7918 #define R32G32B32A32_UNORM 3
7919 #define R32G32B32A32_SNORM 4
7920 #define R64G64_FLOAT 5
7921 #define R32G32B32X32_FLOAT 6
7922 #define R32G32B32A32_SSCALED 7
7923 #define R32G32B32A32_USCALED 8
7924 #define R32G32B32A32_SFIXED 32
7925 #define R64G64_PASSTHRU 33
7926 #define R32G32B32_FLOAT 64
7927 #define R32G32B32_SINT 65
7928 #define R32G32B32_UINT 66
7929 #define R32G32B32_UNORM 67
7930 #define R32G32B32_SNORM 68
7931 #define R32G32B32_SSCALED 69
7932 #define R32G32B32_USCALED 70
7933 #define R32G32B32_SFIXED 80
7934 #define R16G16B16A16_UNORM 128
7935 #define R16G16B16A16_SNORM 129
7936 #define R16G16B16A16_SINT 130
7937 #define R16G16B16A16_UINT 131
7938 #define R16G16B16A16_FLOAT 132
7939 #define R32G32_FLOAT 133
7940 #define R32G32_SINT 134
7941 #define R32G32_UINT 135
7942 #define R32_FLOAT_X8X24_TYPELESS 136
7943 #define X32_TYPELESS_G8X24_UINT 137
7944 #define L32A32_FLOAT 138
7945 #define R32G32_UNORM 139
7946 #define R32G32_SNORM 140
7947 #define R64_FLOAT 141
7948 #define R16G16B16X16_UNORM 142
7949 #define R16G16B16X16_FLOAT 143
7950 #define A32X32_FLOAT 144
7951 #define L32X32_FLOAT 145
7952 #define I32X32_FLOAT 146
7953 #define R16G16B16A16_SSCALED 147
7954 #define R16G16B16A16_USCALED 148
7955 #define R32G32_SSCALED 149
7956 #define R32G32_USCALED 150
7957 #define R32G32_SFIXED 160
7958 #define R64_PASSTHRU 161
7959 #define B8G8R8A8_UNORM 192
7960 #define B8G8R8A8_UNORM_SRGB 193
7961 #define R10G10B10A2_UNORM 194
7962 #define R10G10B10A2_UNORM_SRGB 195
7963 #define R10G10B10A2_UINT 196
7964 #define R10G10B10_SNORM_A2_UNORM 197
7965 #define R8G8B8A8_UNORM 199
7966 #define R8G8B8A8_UNORM_SRGB 200
7967 #define R8G8B8A8_SNORM 201
7968 #define R8G8B8A8_SINT 202
7969 #define R8G8B8A8_UINT 203
7970 #define R16G16_UNORM 204
7971 #define R16G16_SNORM 205
7972 #define R16G16_SINT 206
7973 #define R16G16_UINT 207
7974 #define R16G16_FLOAT 208
7975 #define B10G10R10A2_UNORM 209
7976 #define B10G10R10A2_UNORM_SRGB 210
7977 #define R11G11B10_FLOAT 211
7978 #define R32_SINT 214
7979 #define R32_UINT 215
7980 #define R32_FLOAT 216
7981 #define R24_UNORM_X8_TYPELESS 217
7982 #define X24_TYPELESS_G8_UINT 218
7983 #define L32_UNORM 221
7984 #define A32_UNORM 222
7985 #define L16A16_UNORM 223
7986 #define I24X8_UNORM 224
7987 #define L24X8_UNORM 225
7988 #define A24X8_UNORM 226
7989 #define I32_FLOAT 227
7990 #define L32_FLOAT 228
7991 #define A32_FLOAT 229
7992 #define X8B8_UNORM_G8R8_SNORM 230
7993 #define A8X8_UNORM_G8R8_SNORM 231
7994 #define B8X8_UNORM_G8R8_SNORM 232
7995 #define B8G8R8X8_UNORM 233
7996 #define B8G8R8X8_UNORM_SRGB 234
7997 #define R8G8B8X8_UNORM 235
7998 #define R8G8B8X8_UNORM_SRGB 236
7999 #define R9G9B9E5_SHAREDEXP 237
8000 #define B10G10R10X2_UNORM 238
8001 #define L16A16_FLOAT 240
8002 #define R32_UNORM 241
8003 #define R32_SNORM 242
8004 #define R10G10B10X2_USCALED 243
8005 #define R8G8B8A8_SSCALED 244
8006 #define R8G8B8A8_USCALED 245
8007 #define R16G16_SSCALED 246
8008 #define R16G16_USCALED 247
8009 #define R32_SSCALED 248
8010 #define R32_USCALED 249
8011 #define B5G6R5_UNORM 256
8012 #define B5G6R5_UNORM_SRGB 257
8013 #define B5G5R5A1_UNORM 258
8014 #define B5G5R5A1_UNORM_SRGB 259
8015 #define B4G4R4A4_UNORM 260
8016 #define B4G4R4A4_UNORM_SRGB 261
8017 #define R8G8_UNORM 262
8018 #define R8G8_SNORM 263
8019 #define R8G8_SINT 264
8020 #define R8G8_UINT 265
8021 #define R16_UNORM 266
8022 #define R16_SNORM 267
8023 #define R16_SINT 268
8024 #define R16_UINT 269
8025 #define R16_FLOAT 270
8026 #define A8P8_UNORM_PALETTE0 271
8027 #define A8P8_UNORM_PALETTE1 272
8028 #define I16_UNORM 273
8029 #define L16_UNORM 274
8030 #define A16_UNORM 275
8031 #define L8A8_UNORM 276
8032 #define I16_FLOAT 277
8033 #define L16_FLOAT 278
8034 #define A16_FLOAT 279
8035 #define L8A8_UNORM_SRGB 280
8036 #define R5G5_SNORM_B6_UNORM 281
8037 #define B5G5R5X1_UNORM 282
8038 #define B5G5R5X1_UNORM_SRGB 283
8039 #define R8G8_SSCALED 284
8040 #define R8G8_USCALED 285
8041 #define R16_SSCALED 286
8042 #define R16_USCALED 287
8043 #define P8A8_UNORM_PALETTE0 290
8044 #define P8A8_UNORM_PALETTE1 291
8045 #define A1B5G5R5_UNORM 292
8046 #define A4B4G4R4_UNORM 293
8047 #define L8A8_UINT 294
8048 #define L8A8_SINT 295
8049 #define R8_UNORM 320
8050 #define R8_SNORM 321
8053 #define A8_UNORM 324
8054 #define I8_UNORM 325
8055 #define L8_UNORM 326
8056 #define P4A4_UNORM_PALETTE0 327
8057 #define A4P4_UNORM_PALETTE0 328
8058 #define R8_SSCALED 329
8059 #define R8_USCALED 330
8060 #define P8_UNORM_PALETTE0 331
8061 #define L8_UNORM_SRGB 332
8062 #define P8_UNORM_PALETTE1 333
8063 #define P4A4_UNORM_PALETTE1 334
8064 #define A4P4_UNORM_PALETTE1 335
8065 #define Y8_UNORM 336
8070 #define DXT1_RGB_SRGB 384
8071 #define R1_UNORM 385
8072 #define YCRCB_NORMAL 386
8073 #define YCRCB_SWAPUVY 387
8074 #define P2_UNORM_PALETTE0 388
8075 #define P2_UNORM_PALETTE1 389
8076 #define BC1_UNORM 390
8077 #define BC2_UNORM 391
8078 #define BC3_UNORM 392
8079 #define BC4_UNORM 393
8080 #define BC5_UNORM 394
8081 #define BC1_UNORM_SRGB 395
8082 #define BC2_UNORM_SRGB 396
8083 #define BC3_UNORM_SRGB 397
8085 #define YCRCB_SWAPUV 399
8086 #define YCRCB_SWAPY 400
8087 #define DXT1_RGB 401
8089 #define R8G8B8_UNORM 403
8090 #define R8G8B8_SNORM 404
8091 #define R8G8B8_SSCALED 405
8092 #define R8G8B8_USCALED 406
8093 #define R64G64B64A64_FLOAT 407
8094 #define R64G64B64_FLOAT 408
8095 #define BC4_SNORM 409
8096 #define BC5_SNORM 410
8097 #define R16G16B16_FLOAT 411
8098 #define R16G16B16_UNORM 412
8099 #define R16G16B16_SNORM 413
8100 #define R16G16B16_SSCALED 414
8101 #define R16G16B16_USCALED 415
8102 #define BC6H_SF16 417
8103 #define BC7_UNORM 418
8104 #define BC7_UNORM_SRGB 419
8105 #define BC6H_UF16 420
8106 #define PLANAR_420_8 421
8107 #define R8G8B8_UNORM_SRGB 424
8108 #define ETC1_RGB8 425
8109 #define ETC2_RGB8 426
8111 #define EAC_RG11 428
8112 #define EAC_SIGNED_R11 429
8113 #define EAC_SIGNED_RG11 430
8114 #define ETC2_SRGB8 431
8115 #define R16G16B16_UINT 432
8116 #define R16G16B16_SINT 433
8117 #define R32_SFIXED 434
8118 #define R10G10B10A2_SNORM 435
8119 #define R10G10B10A2_USCALED 436
8120 #define R10G10B10A2_SSCALED 437
8121 #define R10G10B10A2_SINT 438
8122 #define B10G10R10A2_SNORM 439
8123 #define B10G10R10A2_USCALED 440
8124 #define B10G10R10A2_SSCALED 441
8125 #define B10G10R10A2_UINT 442
8126 #define B10G10R10A2_SINT 443
8127 #define R64G64B64A64_PASSTHRU 444
8128 #define R64G64B64_PASSTHRU 445
8129 #define ETC2_RGB8_PTA 448
8130 #define ETC2_SRGB8_PTA 449
8131 #define ETC2_EAC_RGBA8 450
8132 #define ETC2_EAC_SRGB8_A8 451
8133 #define R8G8B8_UINT 456
8134 #define R8G8B8_SINT 457
8137 /* Enum Texture Coordinate Mode */
8139 #define TCM_MIRROR 1
8142 #define TCM_CLAMP_BORDER 4
8143 #define TCM_MIRROR_ONCE 5