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vk/query.c: Use the casting functions
[mesa.git] / src / vulkan / gen75_pack.h
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24
25 /* Instructions, enums and structures for HSW.
26 *
27 * This file has been generated, do not hand edit.
28 */
29
30 #pragma once
31
32 #include <stdio.h>
33 #include <assert.h>
34
35 #ifndef __gen_validate_value
36 #define __gen_validate_value(x)
37 #endif
38
39 #ifndef __gen_field_functions
40 #define __gen_field_functions
41
42 union __gen_value {
43 float f;
44 uint32_t dw;
45 };
46
47 static inline uint64_t
48 __gen_mbo(uint32_t start, uint32_t end)
49 {
50 return (~0ul >> (64 - (end - start + 1))) << start;
51 }
52
53 static inline uint64_t
54 __gen_field(uint64_t v, uint32_t start, uint32_t end)
55 {
56 __gen_validate_value(v);
57 #if DEBUG
58 if (end - start + 1 < 64)
59 assert(v < 1ul << (end - start + 1));
60 #endif
61
62 return v << start;
63 }
64
65 static inline uint64_t
66 __gen_offset(uint64_t v, uint32_t start, uint32_t end)
67 {
68 __gen_validate_value(v);
69 #if DEBUG
70 uint64_t mask = (~0ul >> (64 - (end - start + 1))) << start;
71
72 assert((v & ~mask) == 0);
73 #endif
74
75 return v;
76 }
77
78 static inline uint32_t
79 __gen_float(float v)
80 {
81 __gen_validate_value(v);
82 return ((union __gen_value) { .f = (v) }).dw;
83 }
84
85 #ifndef __gen_address_type
86 #error #define __gen_address_type before including this file
87 #endif
88
89 #ifndef __gen_user_data
90 #error #define __gen_combine_address before including this file
91 #endif
92
93 #endif
94
95 #define GEN75_3DSTATE_URB_VS_length 0x00000002
96 #define GEN75_3DSTATE_URB_VS_length_bias 0x00000002
97 #define GEN75_3DSTATE_URB_VS_header \
98 .CommandType = 3, \
99 .CommandSubType = 3, \
100 ._3DCommandOpcode = 0, \
101 ._3DCommandSubOpcode = 48, \
102 .DwordLength = 0
103
104 struct GEN75_3DSTATE_URB_VS {
105 uint32_t CommandType;
106 uint32_t CommandSubType;
107 uint32_t _3DCommandOpcode;
108 uint32_t _3DCommandSubOpcode;
109 uint32_t DwordLength;
110 uint32_t VSURBStartingAddress;
111 uint32_t VSURBEntryAllocationSize;
112 uint32_t VSNumberofURBEntries;
113 };
114
115 static inline void
116 GEN75_3DSTATE_URB_VS_pack(__gen_user_data *data, void * restrict dst,
117 const struct GEN75_3DSTATE_URB_VS * restrict values)
118 {
119 uint32_t *dw = (uint32_t * restrict) dst;
120
121 dw[0] =
122 __gen_field(values->CommandType, 29, 31) |
123 __gen_field(values->CommandSubType, 27, 28) |
124 __gen_field(values->_3DCommandOpcode, 24, 26) |
125 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
126 __gen_field(values->DwordLength, 0, 7) |
127 0;
128
129 dw[1] =
130 __gen_field(values->VSURBStartingAddress, 25, 30) |
131 __gen_field(values->VSURBEntryAllocationSize, 16, 24) |
132 __gen_field(values->VSNumberofURBEntries, 0, 15) |
133 0;
134
135 }
136
137 #define GEN75_GPGPU_CSR_BASE_ADDRESS_length 0x00000002
138 #define GEN75_GPGPU_CSR_BASE_ADDRESS_length_bias 0x00000002
139 #define GEN75_GPGPU_CSR_BASE_ADDRESS_header \
140 .CommandType = 3, \
141 .CommandSubType = 0, \
142 ._3DCommandOpcode = 1, \
143 ._3DCommandSubOpcode = 4, \
144 .DwordLength = 0
145
146 struct GEN75_GPGPU_CSR_BASE_ADDRESS {
147 uint32_t CommandType;
148 uint32_t CommandSubType;
149 uint32_t _3DCommandOpcode;
150 uint32_t _3DCommandSubOpcode;
151 uint32_t DwordLength;
152 __gen_address_type GPGPUCSRBaseAddress;
153 };
154
155 static inline void
156 GEN75_GPGPU_CSR_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
157 const struct GEN75_GPGPU_CSR_BASE_ADDRESS * restrict values)
158 {
159 uint32_t *dw = (uint32_t * restrict) dst;
160
161 dw[0] =
162 __gen_field(values->CommandType, 29, 31) |
163 __gen_field(values->CommandSubType, 27, 28) |
164 __gen_field(values->_3DCommandOpcode, 24, 26) |
165 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
166 __gen_field(values->DwordLength, 0, 7) |
167 0;
168
169 uint32_t dw1 =
170 0;
171
172 dw[1] =
173 __gen_combine_address(data, &dw[1], values->GPGPUCSRBaseAddress, dw1);
174
175 }
176
177 #define GEN75_MI_STORE_REGISTER_MEM_length 0x00000003
178 #define GEN75_MI_STORE_REGISTER_MEM_length_bias 0x00000002
179 #define GEN75_MI_STORE_REGISTER_MEM_header \
180 .CommandType = 0, \
181 .MICommandOpcode = 36, \
182 .DwordLength = 1
183
184 struct GEN75_MI_STORE_REGISTER_MEM {
185 uint32_t CommandType;
186 uint32_t MICommandOpcode;
187 bool UseGlobalGTT;
188 uint32_t PredicateEnable;
189 uint32_t DwordLength;
190 uint32_t RegisterAddress;
191 __gen_address_type MemoryAddress;
192 };
193
194 static inline void
195 GEN75_MI_STORE_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
196 const struct GEN75_MI_STORE_REGISTER_MEM * restrict values)
197 {
198 uint32_t *dw = (uint32_t * restrict) dst;
199
200 dw[0] =
201 __gen_field(values->CommandType, 29, 31) |
202 __gen_field(values->MICommandOpcode, 23, 28) |
203 __gen_field(values->UseGlobalGTT, 22, 22) |
204 __gen_field(values->PredicateEnable, 21, 21) |
205 __gen_field(values->DwordLength, 0, 7) |
206 0;
207
208 dw[1] =
209 __gen_offset(values->RegisterAddress, 2, 22) |
210 0;
211
212 uint32_t dw2 =
213 0;
214
215 dw[2] =
216 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
217
218 }
219
220 #define GEN75_PIPELINE_SELECT_length 0x00000001
221 #define GEN75_PIPELINE_SELECT_length_bias 0x00000001
222 #define GEN75_PIPELINE_SELECT_header \
223 .CommandType = 3, \
224 .CommandSubType = 1, \
225 ._3DCommandOpcode = 1, \
226 ._3DCommandSubOpcode = 4
227
228 struct GEN75_PIPELINE_SELECT {
229 uint32_t CommandType;
230 uint32_t CommandSubType;
231 uint32_t _3DCommandOpcode;
232 uint32_t _3DCommandSubOpcode;
233 #define _3D 0
234 #define Media 1
235 #define GPGPU 2
236 uint32_t PipelineSelection;
237 };
238
239 static inline void
240 GEN75_PIPELINE_SELECT_pack(__gen_user_data *data, void * restrict dst,
241 const struct GEN75_PIPELINE_SELECT * restrict values)
242 {
243 uint32_t *dw = (uint32_t * restrict) dst;
244
245 dw[0] =
246 __gen_field(values->CommandType, 29, 31) |
247 __gen_field(values->CommandSubType, 27, 28) |
248 __gen_field(values->_3DCommandOpcode, 24, 26) |
249 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
250 __gen_field(values->PipelineSelection, 0, 1) |
251 0;
252
253 }
254
255 #define GEN75_STATE_BASE_ADDRESS_length 0x0000000a
256 #define GEN75_STATE_BASE_ADDRESS_length_bias 0x00000002
257 #define GEN75_STATE_BASE_ADDRESS_header \
258 .CommandType = 3, \
259 .CommandSubType = 0, \
260 ._3DCommandOpcode = 1, \
261 ._3DCommandSubOpcode = 1, \
262 .DwordLength = 8
263
264 struct GEN75_MEMORY_OBJECT_CONTROL_STATE {
265 uint32_t LLCeLLCCacheabilityControlLLCCC;
266 uint32_t L3CacheabilityControlL3CC;
267 };
268
269 static inline void
270 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(__gen_user_data *data, void * restrict dst,
271 const struct GEN75_MEMORY_OBJECT_CONTROL_STATE * restrict values)
272 {
273 uint32_t *dw = (uint32_t * restrict) dst;
274
275 dw[0] =
276 __gen_field(values->LLCeLLCCacheabilityControlLLCCC, 1, 2) |
277 __gen_field(values->L3CacheabilityControlL3CC, 0, 0) |
278 0;
279
280 }
281
282 struct GEN75_STATE_BASE_ADDRESS {
283 uint32_t CommandType;
284 uint32_t CommandSubType;
285 uint32_t _3DCommandOpcode;
286 uint32_t _3DCommandSubOpcode;
287 uint32_t DwordLength;
288 __gen_address_type GeneralStateBaseAddress;
289 struct GEN75_MEMORY_OBJECT_CONTROL_STATE GeneralStateMemoryObjectControlState;
290 struct GEN75_MEMORY_OBJECT_CONTROL_STATE StatelessDataPortAccessMemoryObjectControlState;
291 bool GeneralStateBaseAddressModifyEnable;
292 __gen_address_type SurfaceStateBaseAddress;
293 struct GEN75_MEMORY_OBJECT_CONTROL_STATE SurfaceStateMemoryObjectControlState;
294 bool SurfaceStateBaseAddressModifyEnable;
295 __gen_address_type DynamicStateBaseAddress;
296 struct GEN75_MEMORY_OBJECT_CONTROL_STATE DynamicStateMemoryObjectControlState;
297 bool DynamicStateBaseAddressModifyEnable;
298 __gen_address_type IndirectObjectBaseAddress;
299 struct GEN75_MEMORY_OBJECT_CONTROL_STATE IndirectObjectMemoryObjectControlState;
300 bool IndirectObjectBaseAddressModifyEnable;
301 __gen_address_type InstructionBaseAddress;
302 struct GEN75_MEMORY_OBJECT_CONTROL_STATE InstructionMemoryObjectControlState;
303 bool InstructionBaseAddressModifyEnable;
304 __gen_address_type GeneralStateAccessUpperBound;
305 bool GeneralStateAccessUpperBoundModifyEnable;
306 __gen_address_type DynamicStateAccessUpperBound;
307 bool DynamicStateAccessUpperBoundModifyEnable;
308 __gen_address_type IndirectObjectAccessUpperBound;
309 bool IndirectObjectAccessUpperBoundModifyEnable;
310 __gen_address_type InstructionAccessUpperBound;
311 bool InstructionAccessUpperBoundModifyEnable;
312 };
313
314 static inline void
315 GEN75_STATE_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
316 const struct GEN75_STATE_BASE_ADDRESS * restrict values)
317 {
318 uint32_t *dw = (uint32_t * restrict) dst;
319
320 dw[0] =
321 __gen_field(values->CommandType, 29, 31) |
322 __gen_field(values->CommandSubType, 27, 28) |
323 __gen_field(values->_3DCommandOpcode, 24, 26) |
324 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
325 __gen_field(values->DwordLength, 0, 7) |
326 0;
327
328 uint32_t dw_GeneralStateMemoryObjectControlState;
329 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_GeneralStateMemoryObjectControlState, &values->GeneralStateMemoryObjectControlState);
330 uint32_t dw_StatelessDataPortAccessMemoryObjectControlState;
331 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StatelessDataPortAccessMemoryObjectControlState, &values->StatelessDataPortAccessMemoryObjectControlState);
332 uint32_t dw1 =
333 __gen_field(dw_GeneralStateMemoryObjectControlState, 8, 11) |
334 __gen_field(dw_StatelessDataPortAccessMemoryObjectControlState, 4, 7) |
335 __gen_field(values->GeneralStateBaseAddressModifyEnable, 0, 0) |
336 0;
337
338 dw[1] =
339 __gen_combine_address(data, &dw[1], values->GeneralStateBaseAddress, dw1);
340
341 uint32_t dw_SurfaceStateMemoryObjectControlState;
342 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceStateMemoryObjectControlState, &values->SurfaceStateMemoryObjectControlState);
343 uint32_t dw2 =
344 __gen_field(dw_SurfaceStateMemoryObjectControlState, 8, 11) |
345 __gen_field(values->SurfaceStateBaseAddressModifyEnable, 0, 0) |
346 0;
347
348 dw[2] =
349 __gen_combine_address(data, &dw[2], values->SurfaceStateBaseAddress, dw2);
350
351 uint32_t dw_DynamicStateMemoryObjectControlState;
352 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DynamicStateMemoryObjectControlState, &values->DynamicStateMemoryObjectControlState);
353 uint32_t dw3 =
354 __gen_field(dw_DynamicStateMemoryObjectControlState, 8, 11) |
355 __gen_field(values->DynamicStateBaseAddressModifyEnable, 0, 0) |
356 0;
357
358 dw[3] =
359 __gen_combine_address(data, &dw[3], values->DynamicStateBaseAddress, dw3);
360
361 uint32_t dw_IndirectObjectMemoryObjectControlState;
362 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_IndirectObjectMemoryObjectControlState, &values->IndirectObjectMemoryObjectControlState);
363 uint32_t dw4 =
364 __gen_field(dw_IndirectObjectMemoryObjectControlState, 8, 11) |
365 __gen_field(values->IndirectObjectBaseAddressModifyEnable, 0, 0) |
366 0;
367
368 dw[4] =
369 __gen_combine_address(data, &dw[4], values->IndirectObjectBaseAddress, dw4);
370
371 uint32_t dw_InstructionMemoryObjectControlState;
372 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_InstructionMemoryObjectControlState, &values->InstructionMemoryObjectControlState);
373 uint32_t dw5 =
374 __gen_field(dw_InstructionMemoryObjectControlState, 8, 11) |
375 __gen_field(values->InstructionBaseAddressModifyEnable, 0, 0) |
376 0;
377
378 dw[5] =
379 __gen_combine_address(data, &dw[5], values->InstructionBaseAddress, dw5);
380
381 uint32_t dw6 =
382 __gen_field(values->GeneralStateAccessUpperBoundModifyEnable, 0, 0) |
383 0;
384
385 dw[6] =
386 __gen_combine_address(data, &dw[6], values->GeneralStateAccessUpperBound, dw6);
387
388 uint32_t dw7 =
389 __gen_field(values->DynamicStateAccessUpperBoundModifyEnable, 0, 0) |
390 0;
391
392 dw[7] =
393 __gen_combine_address(data, &dw[7], values->DynamicStateAccessUpperBound, dw7);
394
395 uint32_t dw8 =
396 __gen_field(values->IndirectObjectAccessUpperBoundModifyEnable, 0, 0) |
397 0;
398
399 dw[8] =
400 __gen_combine_address(data, &dw[8], values->IndirectObjectAccessUpperBound, dw8);
401
402 uint32_t dw9 =
403 __gen_field(values->InstructionAccessUpperBoundModifyEnable, 0, 0) |
404 0;
405
406 dw[9] =
407 __gen_combine_address(data, &dw[9], values->InstructionAccessUpperBound, dw9);
408
409 }
410
411 #define GEN75_STATE_PREFETCH_length 0x00000002
412 #define GEN75_STATE_PREFETCH_length_bias 0x00000002
413 #define GEN75_STATE_PREFETCH_header \
414 .CommandType = 3, \
415 .CommandSubType = 0, \
416 ._3DCommandOpcode = 0, \
417 ._3DCommandSubOpcode = 3, \
418 .DwordLength = 0
419
420 struct GEN75_STATE_PREFETCH {
421 uint32_t CommandType;
422 uint32_t CommandSubType;
423 uint32_t _3DCommandOpcode;
424 uint32_t _3DCommandSubOpcode;
425 uint32_t DwordLength;
426 __gen_address_type PrefetchPointer;
427 uint32_t PrefetchCount;
428 };
429
430 static inline void
431 GEN75_STATE_PREFETCH_pack(__gen_user_data *data, void * restrict dst,
432 const struct GEN75_STATE_PREFETCH * restrict values)
433 {
434 uint32_t *dw = (uint32_t * restrict) dst;
435
436 dw[0] =
437 __gen_field(values->CommandType, 29, 31) |
438 __gen_field(values->CommandSubType, 27, 28) |
439 __gen_field(values->_3DCommandOpcode, 24, 26) |
440 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
441 __gen_field(values->DwordLength, 0, 7) |
442 0;
443
444 uint32_t dw1 =
445 __gen_field(values->PrefetchCount, 0, 2) |
446 0;
447
448 dw[1] =
449 __gen_combine_address(data, &dw[1], values->PrefetchPointer, dw1);
450
451 }
452
453 #define GEN75_STATE_SIP_length 0x00000002
454 #define GEN75_STATE_SIP_length_bias 0x00000002
455 #define GEN75_STATE_SIP_header \
456 .CommandType = 3, \
457 .CommandSubType = 0, \
458 ._3DCommandOpcode = 1, \
459 ._3DCommandSubOpcode = 2, \
460 .DwordLength = 0
461
462 struct GEN75_STATE_SIP {
463 uint32_t CommandType;
464 uint32_t CommandSubType;
465 uint32_t _3DCommandOpcode;
466 uint32_t _3DCommandSubOpcode;
467 uint32_t DwordLength;
468 uint32_t SystemInstructionPointer;
469 };
470
471 static inline void
472 GEN75_STATE_SIP_pack(__gen_user_data *data, void * restrict dst,
473 const struct GEN75_STATE_SIP * restrict values)
474 {
475 uint32_t *dw = (uint32_t * restrict) dst;
476
477 dw[0] =
478 __gen_field(values->CommandType, 29, 31) |
479 __gen_field(values->CommandSubType, 27, 28) |
480 __gen_field(values->_3DCommandOpcode, 24, 26) |
481 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
482 __gen_field(values->DwordLength, 0, 7) |
483 0;
484
485 dw[1] =
486 __gen_offset(values->SystemInstructionPointer, 4, 31) |
487 0;
488
489 }
490
491 #define GEN75_SWTESS_BASE_ADDRESS_length 0x00000002
492 #define GEN75_SWTESS_BASE_ADDRESS_length_bias 0x00000002
493 #define GEN75_SWTESS_BASE_ADDRESS_header \
494 .CommandType = 3, \
495 .CommandSubType = 0, \
496 ._3DCommandOpcode = 1, \
497 ._3DCommandSubOpcode = 3, \
498 .DwordLength = 0
499
500 struct GEN75_SWTESS_BASE_ADDRESS {
501 uint32_t CommandType;
502 uint32_t CommandSubType;
503 uint32_t _3DCommandOpcode;
504 uint32_t _3DCommandSubOpcode;
505 uint32_t DwordLength;
506 __gen_address_type SWTessellationBaseAddress;
507 struct GEN75_MEMORY_OBJECT_CONTROL_STATE SWTessellationMemoryObjectControlState;
508 };
509
510 static inline void
511 GEN75_SWTESS_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
512 const struct GEN75_SWTESS_BASE_ADDRESS * restrict values)
513 {
514 uint32_t *dw = (uint32_t * restrict) dst;
515
516 dw[0] =
517 __gen_field(values->CommandType, 29, 31) |
518 __gen_field(values->CommandSubType, 27, 28) |
519 __gen_field(values->_3DCommandOpcode, 24, 26) |
520 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
521 __gen_field(values->DwordLength, 0, 7) |
522 0;
523
524 uint32_t dw_SWTessellationMemoryObjectControlState;
525 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SWTessellationMemoryObjectControlState, &values->SWTessellationMemoryObjectControlState);
526 uint32_t dw1 =
527 __gen_field(dw_SWTessellationMemoryObjectControlState, 8, 11) |
528 0;
529
530 dw[1] =
531 __gen_combine_address(data, &dw[1], values->SWTessellationBaseAddress, dw1);
532
533 }
534
535 #define GEN75_3DPRIMITIVE_length 0x00000007
536 #define GEN75_3DPRIMITIVE_length_bias 0x00000002
537 #define GEN75_3DPRIMITIVE_header \
538 .CommandType = 3, \
539 .CommandSubType = 3, \
540 ._3DCommandOpcode = 3, \
541 ._3DCommandSubOpcode = 0, \
542 .DwordLength = 5
543
544 struct GEN75_3DPRIMITIVE {
545 uint32_t CommandType;
546 uint32_t CommandSubType;
547 uint32_t _3DCommandOpcode;
548 uint32_t _3DCommandSubOpcode;
549 bool IndirectParameterEnable;
550 uint32_t UAVCoherencyRequired;
551 bool PredicateEnable;
552 uint32_t DwordLength;
553 bool EndOffsetEnable;
554 #define SEQUENTIAL 0
555 #define RANDOM 1
556 uint32_t VertexAccessType;
557 uint32_t PrimitiveTopologyType;
558 uint32_t VertexCountPerInstance;
559 uint32_t StartVertexLocation;
560 uint32_t InstanceCount;
561 uint32_t StartInstanceLocation;
562 uint32_t BaseVertexLocation;
563 };
564
565 static inline void
566 GEN75_3DPRIMITIVE_pack(__gen_user_data *data, void * restrict dst,
567 const struct GEN75_3DPRIMITIVE * restrict values)
568 {
569 uint32_t *dw = (uint32_t * restrict) dst;
570
571 dw[0] =
572 __gen_field(values->CommandType, 29, 31) |
573 __gen_field(values->CommandSubType, 27, 28) |
574 __gen_field(values->_3DCommandOpcode, 24, 26) |
575 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
576 __gen_field(values->IndirectParameterEnable, 10, 10) |
577 __gen_field(values->UAVCoherencyRequired, 9, 9) |
578 __gen_field(values->PredicateEnable, 8, 8) |
579 __gen_field(values->DwordLength, 0, 7) |
580 0;
581
582 dw[1] =
583 __gen_field(values->EndOffsetEnable, 9, 9) |
584 __gen_field(values->VertexAccessType, 8, 8) |
585 __gen_field(values->PrimitiveTopologyType, 0, 5) |
586 0;
587
588 dw[2] =
589 __gen_field(values->VertexCountPerInstance, 0, 31) |
590 0;
591
592 dw[3] =
593 __gen_field(values->StartVertexLocation, 0, 31) |
594 0;
595
596 dw[4] =
597 __gen_field(values->InstanceCount, 0, 31) |
598 0;
599
600 dw[5] =
601 __gen_field(values->StartInstanceLocation, 0, 31) |
602 0;
603
604 dw[6] =
605 __gen_field(values->BaseVertexLocation, 0, 31) |
606 0;
607
608 }
609
610 #define GEN75_3DSTATE_AA_LINE_PARAMETERS_length 0x00000003
611 #define GEN75_3DSTATE_AA_LINE_PARAMETERS_length_bias 0x00000002
612 #define GEN75_3DSTATE_AA_LINE_PARAMETERS_header \
613 .CommandType = 3, \
614 .CommandSubType = 3, \
615 ._3DCommandOpcode = 1, \
616 ._3DCommandSubOpcode = 10, \
617 .DwordLength = 1
618
619 struct GEN75_3DSTATE_AA_LINE_PARAMETERS {
620 uint32_t CommandType;
621 uint32_t CommandSubType;
622 uint32_t _3DCommandOpcode;
623 uint32_t _3DCommandSubOpcode;
624 uint32_t DwordLength;
625 float AACoverageBias;
626 float AACoverageSlope;
627 float AACoverageEndCapBias;
628 float AACoverageEndCapSlope;
629 };
630
631 static inline void
632 GEN75_3DSTATE_AA_LINE_PARAMETERS_pack(__gen_user_data *data, void * restrict dst,
633 const struct GEN75_3DSTATE_AA_LINE_PARAMETERS * restrict values)
634 {
635 uint32_t *dw = (uint32_t * restrict) dst;
636
637 dw[0] =
638 __gen_field(values->CommandType, 29, 31) |
639 __gen_field(values->CommandSubType, 27, 28) |
640 __gen_field(values->_3DCommandOpcode, 24, 26) |
641 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
642 __gen_field(values->DwordLength, 0, 7) |
643 0;
644
645 dw[1] =
646 __gen_field(values->AACoverageBias * (1 << 8), 16, 23) |
647 __gen_field(values->AACoverageSlope * (1 << 8), 0, 7) |
648 0;
649
650 dw[2] =
651 __gen_field(values->AACoverageEndCapBias * (1 << 8), 16, 23) |
652 __gen_field(values->AACoverageEndCapSlope * (1 << 8), 0, 7) |
653 0;
654
655 }
656
657 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_length_bias 0x00000002
658 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_header\
659 .CommandType = 3, \
660 .CommandSubType = 3, \
661 ._3DCommandOpcode = 0, \
662 ._3DCommandSubOpcode = 70
663
664 struct GEN75_BINDING_TABLE_EDIT_ENTRY {
665 uint32_t BindingTableIndex;
666 uint32_t SurfaceStatePointer;
667 };
668
669 static inline void
670 GEN75_BINDING_TABLE_EDIT_ENTRY_pack(__gen_user_data *data, void * restrict dst,
671 const struct GEN75_BINDING_TABLE_EDIT_ENTRY * restrict values)
672 {
673 uint32_t *dw = (uint32_t * restrict) dst;
674
675 dw[0] =
676 __gen_field(values->BindingTableIndex, 16, 23) |
677 __gen_offset(values->SurfaceStatePointer, 0, 15) |
678 0;
679
680 }
681
682 struct GEN75_3DSTATE_BINDING_TABLE_EDIT_DS {
683 uint32_t CommandType;
684 uint32_t CommandSubType;
685 uint32_t _3DCommandOpcode;
686 uint32_t _3DCommandSubOpcode;
687 uint32_t DwordLength;
688 uint32_t BindingTableBlockClear;
689 #define AllCores 3
690 #define Core1 2
691 #define Core0 1
692 uint32_t BindingTableEditTarget;
693 /* variable length fields follow */
694 };
695
696 static inline void
697 GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_pack(__gen_user_data *data, void * restrict dst,
698 const struct GEN75_3DSTATE_BINDING_TABLE_EDIT_DS * restrict values)
699 {
700 uint32_t *dw = (uint32_t * restrict) dst;
701
702 dw[0] =
703 __gen_field(values->CommandType, 29, 31) |
704 __gen_field(values->CommandSubType, 27, 28) |
705 __gen_field(values->_3DCommandOpcode, 24, 26) |
706 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
707 __gen_field(values->DwordLength, 0, 8) |
708 0;
709
710 dw[1] =
711 __gen_field(values->BindingTableBlockClear, 16, 31) |
712 __gen_field(values->BindingTableEditTarget, 0, 1) |
713 0;
714
715 /* variable length fields follow */
716 }
717
718 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_length_bias 0x00000002
719 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_header\
720 .CommandType = 3, \
721 .CommandSubType = 3, \
722 ._3DCommandOpcode = 0, \
723 ._3DCommandSubOpcode = 68
724
725 struct GEN75_3DSTATE_BINDING_TABLE_EDIT_GS {
726 uint32_t CommandType;
727 uint32_t CommandSubType;
728 uint32_t _3DCommandOpcode;
729 uint32_t _3DCommandSubOpcode;
730 uint32_t DwordLength;
731 uint32_t BindingTableBlockClear;
732 #define AllCores 3
733 #define Core1 2
734 #define Core0 1
735 uint32_t BindingTableEditTarget;
736 /* variable length fields follow */
737 };
738
739 static inline void
740 GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_pack(__gen_user_data *data, void * restrict dst,
741 const struct GEN75_3DSTATE_BINDING_TABLE_EDIT_GS * restrict values)
742 {
743 uint32_t *dw = (uint32_t * restrict) dst;
744
745 dw[0] =
746 __gen_field(values->CommandType, 29, 31) |
747 __gen_field(values->CommandSubType, 27, 28) |
748 __gen_field(values->_3DCommandOpcode, 24, 26) |
749 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
750 __gen_field(values->DwordLength, 0, 8) |
751 0;
752
753 dw[1] =
754 __gen_field(values->BindingTableBlockClear, 16, 31) |
755 __gen_field(values->BindingTableEditTarget, 0, 1) |
756 0;
757
758 /* variable length fields follow */
759 }
760
761 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_length_bias 0x00000002
762 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_header\
763 .CommandType = 3, \
764 .CommandSubType = 3, \
765 ._3DCommandOpcode = 0, \
766 ._3DCommandSubOpcode = 69
767
768 struct GEN75_3DSTATE_BINDING_TABLE_EDIT_HS {
769 uint32_t CommandType;
770 uint32_t CommandSubType;
771 uint32_t _3DCommandOpcode;
772 uint32_t _3DCommandSubOpcode;
773 uint32_t DwordLength;
774 uint32_t BindingTableBlockClear;
775 #define AllCores 3
776 #define Core1 2
777 #define Core0 1
778 uint32_t BindingTableEditTarget;
779 /* variable length fields follow */
780 };
781
782 static inline void
783 GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_pack(__gen_user_data *data, void * restrict dst,
784 const struct GEN75_3DSTATE_BINDING_TABLE_EDIT_HS * restrict values)
785 {
786 uint32_t *dw = (uint32_t * restrict) dst;
787
788 dw[0] =
789 __gen_field(values->CommandType, 29, 31) |
790 __gen_field(values->CommandSubType, 27, 28) |
791 __gen_field(values->_3DCommandOpcode, 24, 26) |
792 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
793 __gen_field(values->DwordLength, 0, 8) |
794 0;
795
796 dw[1] =
797 __gen_field(values->BindingTableBlockClear, 16, 31) |
798 __gen_field(values->BindingTableEditTarget, 0, 1) |
799 0;
800
801 /* variable length fields follow */
802 }
803
804 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_length_bias 0x00000002
805 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_header\
806 .CommandType = 3, \
807 .CommandSubType = 3, \
808 ._3DCommandOpcode = 0, \
809 ._3DCommandSubOpcode = 71
810
811 struct GEN75_3DSTATE_BINDING_TABLE_EDIT_PS {
812 uint32_t CommandType;
813 uint32_t CommandSubType;
814 uint32_t _3DCommandOpcode;
815 uint32_t _3DCommandSubOpcode;
816 uint32_t DwordLength;
817 uint32_t BindingTableBlockClear;
818 #define AllCores 3
819 #define Core1 2
820 #define Core0 1
821 uint32_t BindingTableEditTarget;
822 /* variable length fields follow */
823 };
824
825 static inline void
826 GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_pack(__gen_user_data *data, void * restrict dst,
827 const struct GEN75_3DSTATE_BINDING_TABLE_EDIT_PS * restrict values)
828 {
829 uint32_t *dw = (uint32_t * restrict) dst;
830
831 dw[0] =
832 __gen_field(values->CommandType, 29, 31) |
833 __gen_field(values->CommandSubType, 27, 28) |
834 __gen_field(values->_3DCommandOpcode, 24, 26) |
835 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
836 __gen_field(values->DwordLength, 0, 8) |
837 0;
838
839 dw[1] =
840 __gen_field(values->BindingTableBlockClear, 16, 31) |
841 __gen_field(values->BindingTableEditTarget, 0, 1) |
842 0;
843
844 /* variable length fields follow */
845 }
846
847 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_length_bias 0x00000002
848 #define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_header\
849 .CommandType = 3, \
850 .CommandSubType = 3, \
851 ._3DCommandOpcode = 0, \
852 ._3DCommandSubOpcode = 67
853
854 struct GEN75_3DSTATE_BINDING_TABLE_EDIT_VS {
855 uint32_t CommandType;
856 uint32_t CommandSubType;
857 uint32_t _3DCommandOpcode;
858 uint32_t _3DCommandSubOpcode;
859 uint32_t DwordLength;
860 uint32_t BindingTableBlockClear;
861 #define AllCores 3
862 #define Core1 2
863 #define Core0 1
864 uint32_t BindingTableEditTarget;
865 /* variable length fields follow */
866 };
867
868 static inline void
869 GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_pack(__gen_user_data *data, void * restrict dst,
870 const struct GEN75_3DSTATE_BINDING_TABLE_EDIT_VS * restrict values)
871 {
872 uint32_t *dw = (uint32_t * restrict) dst;
873
874 dw[0] =
875 __gen_field(values->CommandType, 29, 31) |
876 __gen_field(values->CommandSubType, 27, 28) |
877 __gen_field(values->_3DCommandOpcode, 24, 26) |
878 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
879 __gen_field(values->DwordLength, 0, 8) |
880 0;
881
882 dw[1] =
883 __gen_field(values->BindingTableBlockClear, 16, 31) |
884 __gen_field(values->BindingTableEditTarget, 0, 1) |
885 0;
886
887 /* variable length fields follow */
888 }
889
890 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_length 0x00000002
891 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_length_bias 0x00000002
892 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_header\
893 .CommandType = 3, \
894 .CommandSubType = 3, \
895 ._3DCommandOpcode = 0, \
896 ._3DCommandSubOpcode = 40, \
897 .DwordLength = 0
898
899 struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS {
900 uint32_t CommandType;
901 uint32_t CommandSubType;
902 uint32_t _3DCommandOpcode;
903 uint32_t _3DCommandSubOpcode;
904 uint32_t DwordLength;
905 uint32_t PointertoDSBindingTable;
906 };
907
908 static inline void
909 GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
910 const struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS * restrict values)
911 {
912 uint32_t *dw = (uint32_t * restrict) dst;
913
914 dw[0] =
915 __gen_field(values->CommandType, 29, 31) |
916 __gen_field(values->CommandSubType, 27, 28) |
917 __gen_field(values->_3DCommandOpcode, 24, 26) |
918 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
919 __gen_field(values->DwordLength, 0, 7) |
920 0;
921
922 dw[1] =
923 __gen_offset(values->PointertoDSBindingTable, 5, 15) |
924 0;
925
926 }
927
928 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_length 0x00000002
929 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_length_bias 0x00000002
930 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_header\
931 .CommandType = 3, \
932 .CommandSubType = 3, \
933 ._3DCommandOpcode = 0, \
934 ._3DCommandSubOpcode = 41, \
935 .DwordLength = 0
936
937 struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS {
938 uint32_t CommandType;
939 uint32_t CommandSubType;
940 uint32_t _3DCommandOpcode;
941 uint32_t _3DCommandSubOpcode;
942 uint32_t DwordLength;
943 uint32_t PointertoGSBindingTable;
944 };
945
946 static inline void
947 GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
948 const struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS * restrict values)
949 {
950 uint32_t *dw = (uint32_t * restrict) dst;
951
952 dw[0] =
953 __gen_field(values->CommandType, 29, 31) |
954 __gen_field(values->CommandSubType, 27, 28) |
955 __gen_field(values->_3DCommandOpcode, 24, 26) |
956 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
957 __gen_field(values->DwordLength, 0, 7) |
958 0;
959
960 dw[1] =
961 __gen_offset(values->PointertoGSBindingTable, 5, 15) |
962 0;
963
964 }
965
966 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_length 0x00000002
967 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_length_bias 0x00000002
968 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_header\
969 .CommandType = 3, \
970 .CommandSubType = 3, \
971 ._3DCommandOpcode = 0, \
972 ._3DCommandSubOpcode = 39, \
973 .DwordLength = 0
974
975 struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS {
976 uint32_t CommandType;
977 uint32_t CommandSubType;
978 uint32_t _3DCommandOpcode;
979 uint32_t _3DCommandSubOpcode;
980 uint32_t DwordLength;
981 uint32_t PointertoHSBindingTable;
982 };
983
984 static inline void
985 GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
986 const struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS * restrict values)
987 {
988 uint32_t *dw = (uint32_t * restrict) dst;
989
990 dw[0] =
991 __gen_field(values->CommandType, 29, 31) |
992 __gen_field(values->CommandSubType, 27, 28) |
993 __gen_field(values->_3DCommandOpcode, 24, 26) |
994 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
995 __gen_field(values->DwordLength, 0, 7) |
996 0;
997
998 dw[1] =
999 __gen_offset(values->PointertoHSBindingTable, 5, 15) |
1000 0;
1001
1002 }
1003
1004 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_length 0x00000002
1005 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_length_bias 0x00000002
1006 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_header\
1007 .CommandType = 3, \
1008 .CommandSubType = 3, \
1009 ._3DCommandOpcode = 0, \
1010 ._3DCommandSubOpcode = 42, \
1011 .DwordLength = 0
1012
1013 struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS {
1014 uint32_t CommandType;
1015 uint32_t CommandSubType;
1016 uint32_t _3DCommandOpcode;
1017 uint32_t _3DCommandSubOpcode;
1018 uint32_t DwordLength;
1019 uint32_t PointertoPSBindingTable;
1020 };
1021
1022 static inline void
1023 GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
1024 const struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS * restrict values)
1025 {
1026 uint32_t *dw = (uint32_t * restrict) dst;
1027
1028 dw[0] =
1029 __gen_field(values->CommandType, 29, 31) |
1030 __gen_field(values->CommandSubType, 27, 28) |
1031 __gen_field(values->_3DCommandOpcode, 24, 26) |
1032 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1033 __gen_field(values->DwordLength, 0, 7) |
1034 0;
1035
1036 dw[1] =
1037 __gen_offset(values->PointertoPSBindingTable, 5, 15) |
1038 0;
1039
1040 }
1041
1042 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_length 0x00000002
1043 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_length_bias 0x00000002
1044 #define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_header\
1045 .CommandType = 3, \
1046 .CommandSubType = 3, \
1047 ._3DCommandOpcode = 0, \
1048 ._3DCommandSubOpcode = 38, \
1049 .DwordLength = 0
1050
1051 struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS {
1052 uint32_t CommandType;
1053 uint32_t CommandSubType;
1054 uint32_t _3DCommandOpcode;
1055 uint32_t _3DCommandSubOpcode;
1056 uint32_t DwordLength;
1057 uint32_t PointertoVSBindingTable;
1058 };
1059
1060 static inline void
1061 GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
1062 const struct GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS * restrict values)
1063 {
1064 uint32_t *dw = (uint32_t * restrict) dst;
1065
1066 dw[0] =
1067 __gen_field(values->CommandType, 29, 31) |
1068 __gen_field(values->CommandSubType, 27, 28) |
1069 __gen_field(values->_3DCommandOpcode, 24, 26) |
1070 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1071 __gen_field(values->DwordLength, 0, 7) |
1072 0;
1073
1074 dw[1] =
1075 __gen_offset(values->PointertoVSBindingTable, 5, 15) |
1076 0;
1077
1078 }
1079
1080 #define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_length 0x00000003
1081 #define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_length_bias 0x00000002
1082 #define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_header\
1083 .CommandType = 3, \
1084 .CommandSubType = 3, \
1085 ._3DCommandOpcode = 1, \
1086 ._3DCommandSubOpcode = 25, \
1087 .DwordLength = 1
1088
1089 struct GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC {
1090 uint32_t CommandType;
1091 uint32_t CommandSubType;
1092 uint32_t _3DCommandOpcode;
1093 uint32_t _3DCommandSubOpcode;
1094 uint32_t DwordLength;
1095 __gen_address_type BindingTablePoolBaseAddress;
1096 uint32_t BindingTablePoolEnable;
1097 struct GEN75_MEMORY_OBJECT_CONTROL_STATE SurfaceObjectControlState;
1098 __gen_address_type BindingTablePoolUpperBound;
1099 };
1100
1101 static inline void
1102 GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_pack(__gen_user_data *data, void * restrict dst,
1103 const struct GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC * restrict values)
1104 {
1105 uint32_t *dw = (uint32_t * restrict) dst;
1106
1107 dw[0] =
1108 __gen_field(values->CommandType, 29, 31) |
1109 __gen_field(values->CommandSubType, 27, 28) |
1110 __gen_field(values->_3DCommandOpcode, 24, 26) |
1111 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1112 __gen_field(values->DwordLength, 0, 7) |
1113 0;
1114
1115 uint32_t dw_SurfaceObjectControlState;
1116 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceObjectControlState, &values->SurfaceObjectControlState);
1117 uint32_t dw1 =
1118 __gen_field(values->BindingTablePoolEnable, 11, 11) |
1119 __gen_field(dw_SurfaceObjectControlState, 7, 10) |
1120 0;
1121
1122 dw[1] =
1123 __gen_combine_address(data, &dw[1], values->BindingTablePoolBaseAddress, dw1);
1124
1125 uint32_t dw2 =
1126 0;
1127
1128 dw[2] =
1129 __gen_combine_address(data, &dw[2], values->BindingTablePoolUpperBound, dw2);
1130
1131 }
1132
1133 #define GEN75_3DSTATE_BLEND_STATE_POINTERS_length 0x00000002
1134 #define GEN75_3DSTATE_BLEND_STATE_POINTERS_length_bias 0x00000002
1135 #define GEN75_3DSTATE_BLEND_STATE_POINTERS_header\
1136 .CommandType = 3, \
1137 .CommandSubType = 3, \
1138 ._3DCommandOpcode = 0, \
1139 ._3DCommandSubOpcode = 36, \
1140 .DwordLength = 0
1141
1142 struct GEN75_3DSTATE_BLEND_STATE_POINTERS {
1143 uint32_t CommandType;
1144 uint32_t CommandSubType;
1145 uint32_t _3DCommandOpcode;
1146 uint32_t _3DCommandSubOpcode;
1147 uint32_t DwordLength;
1148 uint32_t BlendStatePointer;
1149 };
1150
1151 static inline void
1152 GEN75_3DSTATE_BLEND_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
1153 const struct GEN75_3DSTATE_BLEND_STATE_POINTERS * restrict values)
1154 {
1155 uint32_t *dw = (uint32_t * restrict) dst;
1156
1157 dw[0] =
1158 __gen_field(values->CommandType, 29, 31) |
1159 __gen_field(values->CommandSubType, 27, 28) |
1160 __gen_field(values->_3DCommandOpcode, 24, 26) |
1161 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1162 __gen_field(values->DwordLength, 0, 7) |
1163 0;
1164
1165 dw[1] =
1166 __gen_offset(values->BlendStatePointer, 6, 31) |
1167 __gen_mbo(0, 0) |
1168 0;
1169
1170 }
1171
1172 #define GEN75_3DSTATE_CC_STATE_POINTERS_length 0x00000002
1173 #define GEN75_3DSTATE_CC_STATE_POINTERS_length_bias 0x00000002
1174 #define GEN75_3DSTATE_CC_STATE_POINTERS_header \
1175 .CommandType = 3, \
1176 .CommandSubType = 3, \
1177 ._3DCommandOpcode = 0, \
1178 ._3DCommandSubOpcode = 14, \
1179 .DwordLength = 0
1180
1181 struct GEN75_3DSTATE_CC_STATE_POINTERS {
1182 uint32_t CommandType;
1183 uint32_t CommandSubType;
1184 uint32_t _3DCommandOpcode;
1185 uint32_t _3DCommandSubOpcode;
1186 uint32_t DwordLength;
1187 uint32_t ColorCalcStatePointer;
1188 };
1189
1190 static inline void
1191 GEN75_3DSTATE_CC_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
1192 const struct GEN75_3DSTATE_CC_STATE_POINTERS * restrict values)
1193 {
1194 uint32_t *dw = (uint32_t * restrict) dst;
1195
1196 dw[0] =
1197 __gen_field(values->CommandType, 29, 31) |
1198 __gen_field(values->CommandSubType, 27, 28) |
1199 __gen_field(values->_3DCommandOpcode, 24, 26) |
1200 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1201 __gen_field(values->DwordLength, 0, 7) |
1202 0;
1203
1204 dw[1] =
1205 __gen_offset(values->ColorCalcStatePointer, 6, 31) |
1206 __gen_mbo(0, 0) |
1207 0;
1208
1209 }
1210
1211 #define GEN75_3DSTATE_CHROMA_KEY_length 0x00000004
1212 #define GEN75_3DSTATE_CHROMA_KEY_length_bias 0x00000002
1213 #define GEN75_3DSTATE_CHROMA_KEY_header \
1214 .CommandType = 3, \
1215 .CommandSubType = 3, \
1216 ._3DCommandOpcode = 1, \
1217 ._3DCommandSubOpcode = 4, \
1218 .DwordLength = 2
1219
1220 struct GEN75_3DSTATE_CHROMA_KEY {
1221 uint32_t CommandType;
1222 uint32_t CommandSubType;
1223 uint32_t _3DCommandOpcode;
1224 uint32_t _3DCommandSubOpcode;
1225 uint32_t DwordLength;
1226 uint32_t ChromaKeyTableIndex;
1227 uint32_t ChromaKeyLowValue;
1228 uint32_t ChromaKeyHighValue;
1229 };
1230
1231 static inline void
1232 GEN75_3DSTATE_CHROMA_KEY_pack(__gen_user_data *data, void * restrict dst,
1233 const struct GEN75_3DSTATE_CHROMA_KEY * restrict values)
1234 {
1235 uint32_t *dw = (uint32_t * restrict) dst;
1236
1237 dw[0] =
1238 __gen_field(values->CommandType, 29, 31) |
1239 __gen_field(values->CommandSubType, 27, 28) |
1240 __gen_field(values->_3DCommandOpcode, 24, 26) |
1241 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1242 __gen_field(values->DwordLength, 0, 7) |
1243 0;
1244
1245 dw[1] =
1246 __gen_field(values->ChromaKeyTableIndex, 30, 31) |
1247 0;
1248
1249 dw[2] =
1250 __gen_field(values->ChromaKeyLowValue, 0, 31) |
1251 0;
1252
1253 dw[3] =
1254 __gen_field(values->ChromaKeyHighValue, 0, 31) |
1255 0;
1256
1257 }
1258
1259 #define GEN75_3DSTATE_CLEAR_PARAMS_length 0x00000003
1260 #define GEN75_3DSTATE_CLEAR_PARAMS_length_bias 0x00000002
1261 #define GEN75_3DSTATE_CLEAR_PARAMS_header \
1262 .CommandType = 3, \
1263 .CommandSubType = 3, \
1264 ._3DCommandOpcode = 0, \
1265 ._3DCommandSubOpcode = 4, \
1266 .DwordLength = 1
1267
1268 struct GEN75_3DSTATE_CLEAR_PARAMS {
1269 uint32_t CommandType;
1270 uint32_t CommandSubType;
1271 uint32_t _3DCommandOpcode;
1272 uint32_t _3DCommandSubOpcode;
1273 uint32_t DwordLength;
1274 uint32_t DepthClearValue;
1275 bool DepthClearValueValid;
1276 };
1277
1278 static inline void
1279 GEN75_3DSTATE_CLEAR_PARAMS_pack(__gen_user_data *data, void * restrict dst,
1280 const struct GEN75_3DSTATE_CLEAR_PARAMS * restrict values)
1281 {
1282 uint32_t *dw = (uint32_t * restrict) dst;
1283
1284 dw[0] =
1285 __gen_field(values->CommandType, 29, 31) |
1286 __gen_field(values->CommandSubType, 27, 28) |
1287 __gen_field(values->_3DCommandOpcode, 24, 26) |
1288 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1289 __gen_field(values->DwordLength, 0, 7) |
1290 0;
1291
1292 dw[1] =
1293 __gen_field(values->DepthClearValue, 0, 31) |
1294 0;
1295
1296 dw[2] =
1297 __gen_field(values->DepthClearValueValid, 0, 0) |
1298 0;
1299
1300 }
1301
1302 #define GEN75_3DSTATE_CLIP_length 0x00000004
1303 #define GEN75_3DSTATE_CLIP_length_bias 0x00000002
1304 #define GEN75_3DSTATE_CLIP_header \
1305 .CommandType = 3, \
1306 .CommandSubType = 3, \
1307 ._3DCommandOpcode = 0, \
1308 ._3DCommandSubOpcode = 18, \
1309 .DwordLength = 2
1310
1311 struct GEN75_3DSTATE_CLIP {
1312 uint32_t CommandType;
1313 uint32_t CommandSubType;
1314 uint32_t _3DCommandOpcode;
1315 uint32_t _3DCommandSubOpcode;
1316 uint32_t DwordLength;
1317 uint32_t FrontWinding;
1318 uint32_t VertexSubPixelPrecisionSelect;
1319 bool EarlyCullEnable;
1320 #define CULLMODE_BOTH 0
1321 #define CULLMODE_NONE 1
1322 #define CULLMODE_FRONT 2
1323 #define CULLMODE_BACK 3
1324 uint32_t CullMode;
1325 bool ClipperStatisticsEnable;
1326 uint32_t UserClipDistanceCullTestEnableBitmask;
1327 bool ClipEnable;
1328 #define APIMODE_OGL 0
1329 uint32_t APIMode;
1330 bool ViewportXYClipTestEnable;
1331 bool ViewportZClipTestEnable;
1332 bool GuardbandClipTestEnable;
1333 uint32_t UserClipDistanceClipTestEnableBitmask;
1334 #define CLIPMODE_NORMAL 0
1335 #define CLIPMODE_REJECT_ALL 3
1336 #define CLIPMODE_ACCEPT_ALL 4
1337 uint32_t ClipMode;
1338 bool PerspectiveDivideDisable;
1339 bool NonPerspectiveBarycentricEnable;
1340 #define Vertex0 0
1341 #define Vertex1 1
1342 #define Vertex2 2
1343 uint32_t TriangleStripListProvokingVertexSelect;
1344 #define Vertex0 0
1345 #define Vertex1 1
1346 uint32_t LineStripListProvokingVertexSelect;
1347 #define Vertex0 0
1348 #define Vertex1 1
1349 #define Vertex2 2
1350 uint32_t TriangleFanProvokingVertexSelect;
1351 float MinimumPointWidth;
1352 float MaximumPointWidth;
1353 bool ForceZeroRTAIndexEnable;
1354 uint32_t MaximumVPIndex;
1355 };
1356
1357 static inline void
1358 GEN75_3DSTATE_CLIP_pack(__gen_user_data *data, void * restrict dst,
1359 const struct GEN75_3DSTATE_CLIP * restrict values)
1360 {
1361 uint32_t *dw = (uint32_t * restrict) dst;
1362
1363 dw[0] =
1364 __gen_field(values->CommandType, 29, 31) |
1365 __gen_field(values->CommandSubType, 27, 28) |
1366 __gen_field(values->_3DCommandOpcode, 24, 26) |
1367 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1368 __gen_field(values->DwordLength, 0, 7) |
1369 0;
1370
1371 dw[1] =
1372 __gen_field(values->FrontWinding, 20, 20) |
1373 __gen_field(values->VertexSubPixelPrecisionSelect, 19, 19) |
1374 __gen_field(values->EarlyCullEnable, 18, 18) |
1375 __gen_field(values->CullMode, 16, 17) |
1376 __gen_field(values->ClipperStatisticsEnable, 10, 10) |
1377 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
1378 0;
1379
1380 dw[2] =
1381 __gen_field(values->ClipEnable, 31, 31) |
1382 __gen_field(values->APIMode, 30, 30) |
1383 __gen_field(values->ViewportXYClipTestEnable, 28, 28) |
1384 __gen_field(values->ViewportZClipTestEnable, 27, 27) |
1385 __gen_field(values->GuardbandClipTestEnable, 26, 26) |
1386 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 16, 23) |
1387 __gen_field(values->ClipMode, 13, 15) |
1388 __gen_field(values->PerspectiveDivideDisable, 9, 9) |
1389 __gen_field(values->NonPerspectiveBarycentricEnable, 8, 8) |
1390 __gen_field(values->TriangleStripListProvokingVertexSelect, 4, 5) |
1391 __gen_field(values->LineStripListProvokingVertexSelect, 2, 3) |
1392 __gen_field(values->TriangleFanProvokingVertexSelect, 0, 1) |
1393 0;
1394
1395 dw[3] =
1396 __gen_field(values->MinimumPointWidth * (1 << 3), 17, 27) |
1397 __gen_field(values->MaximumPointWidth * (1 << 3), 6, 16) |
1398 __gen_field(values->ForceZeroRTAIndexEnable, 5, 5) |
1399 __gen_field(values->MaximumVPIndex, 0, 3) |
1400 0;
1401
1402 }
1403
1404 #define GEN75_3DSTATE_CONSTANT_DS_length 0x00000007
1405 #define GEN75_3DSTATE_CONSTANT_DS_length_bias 0x00000002
1406 #define GEN75_3DSTATE_CONSTANT_DS_header \
1407 .CommandType = 3, \
1408 .CommandSubType = 3, \
1409 ._3DCommandOpcode = 0, \
1410 ._3DCommandSubOpcode = 26, \
1411 .DwordLength = 5
1412
1413 struct GEN75_3DSTATE_CONSTANT_BODY {
1414 uint32_t ConstantBuffer1ReadLength;
1415 uint32_t ConstantBuffer0ReadLength;
1416 uint32_t ConstantBuffer3ReadLength;
1417 uint32_t ConstantBuffer2ReadLength;
1418 __gen_address_type PointerToConstantBuffer0;
1419 struct GEN75_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
1420 __gen_address_type PointerToConstantBuffer1;
1421 __gen_address_type PointerToConstantBuffer2;
1422 __gen_address_type PointerToConstantBuffer3;
1423 };
1424
1425 static inline void
1426 GEN75_3DSTATE_CONSTANT_BODY_pack(__gen_user_data *data, void * restrict dst,
1427 const struct GEN75_3DSTATE_CONSTANT_BODY * restrict values)
1428 {
1429 uint32_t *dw = (uint32_t * restrict) dst;
1430
1431 dw[0] =
1432 __gen_field(values->ConstantBuffer1ReadLength, 16, 31) |
1433 __gen_field(values->ConstantBuffer0ReadLength, 0, 15) |
1434 0;
1435
1436 dw[1] =
1437 __gen_field(values->ConstantBuffer3ReadLength, 16, 31) |
1438 __gen_field(values->ConstantBuffer2ReadLength, 0, 15) |
1439 0;
1440
1441 uint32_t dw_ConstantBufferObjectControlState;
1442 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
1443 uint32_t dw2 =
1444 __gen_field(dw_ConstantBufferObjectControlState, 0, 4) |
1445 0;
1446
1447 dw[2] =
1448 __gen_combine_address(data, &dw[2], values->PointerToConstantBuffer0, dw2);
1449
1450 uint32_t dw3 =
1451 0;
1452
1453 dw[3] =
1454 __gen_combine_address(data, &dw[3], values->PointerToConstantBuffer1, dw3);
1455
1456 uint32_t dw4 =
1457 0;
1458
1459 dw[4] =
1460 __gen_combine_address(data, &dw[4], values->PointerToConstantBuffer2, dw4);
1461
1462 uint32_t dw5 =
1463 0;
1464
1465 dw[5] =
1466 __gen_combine_address(data, &dw[5], values->PointerToConstantBuffer3, dw5);
1467
1468 }
1469
1470 struct GEN75_3DSTATE_CONSTANT_DS {
1471 uint32_t CommandType;
1472 uint32_t CommandSubType;
1473 uint32_t _3DCommandOpcode;
1474 uint32_t _3DCommandSubOpcode;
1475 uint32_t DwordLength;
1476 struct GEN75_3DSTATE_CONSTANT_BODY ConstantBody;
1477 };
1478
1479 static inline void
1480 GEN75_3DSTATE_CONSTANT_DS_pack(__gen_user_data *data, void * restrict dst,
1481 const struct GEN75_3DSTATE_CONSTANT_DS * restrict values)
1482 {
1483 uint32_t *dw = (uint32_t * restrict) dst;
1484
1485 dw[0] =
1486 __gen_field(values->CommandType, 29, 31) |
1487 __gen_field(values->CommandSubType, 27, 28) |
1488 __gen_field(values->_3DCommandOpcode, 24, 26) |
1489 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1490 __gen_field(values->DwordLength, 0, 7) |
1491 0;
1492
1493 GEN75_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1494 }
1495
1496 #define GEN75_3DSTATE_CONSTANT_GS_length 0x00000007
1497 #define GEN75_3DSTATE_CONSTANT_GS_length_bias 0x00000002
1498 #define GEN75_3DSTATE_CONSTANT_GS_header \
1499 .CommandType = 3, \
1500 .CommandSubType = 3, \
1501 ._3DCommandOpcode = 0, \
1502 ._3DCommandSubOpcode = 22, \
1503 .DwordLength = 5
1504
1505 struct GEN75_3DSTATE_CONSTANT_GS {
1506 uint32_t CommandType;
1507 uint32_t CommandSubType;
1508 uint32_t _3DCommandOpcode;
1509 uint32_t _3DCommandSubOpcode;
1510 uint32_t DwordLength;
1511 struct GEN75_3DSTATE_CONSTANT_BODY ConstantBody;
1512 };
1513
1514 static inline void
1515 GEN75_3DSTATE_CONSTANT_GS_pack(__gen_user_data *data, void * restrict dst,
1516 const struct GEN75_3DSTATE_CONSTANT_GS * restrict values)
1517 {
1518 uint32_t *dw = (uint32_t * restrict) dst;
1519
1520 dw[0] =
1521 __gen_field(values->CommandType, 29, 31) |
1522 __gen_field(values->CommandSubType, 27, 28) |
1523 __gen_field(values->_3DCommandOpcode, 24, 26) |
1524 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1525 __gen_field(values->DwordLength, 0, 7) |
1526 0;
1527
1528 GEN75_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1529 }
1530
1531 #define GEN75_3DSTATE_CONSTANT_HS_length 0x00000007
1532 #define GEN75_3DSTATE_CONSTANT_HS_length_bias 0x00000002
1533 #define GEN75_3DSTATE_CONSTANT_HS_header \
1534 .CommandType = 3, \
1535 .CommandSubType = 3, \
1536 ._3DCommandOpcode = 0, \
1537 ._3DCommandSubOpcode = 25, \
1538 .DwordLength = 5
1539
1540 struct GEN75_3DSTATE_CONSTANT_HS {
1541 uint32_t CommandType;
1542 uint32_t CommandSubType;
1543 uint32_t _3DCommandOpcode;
1544 uint32_t _3DCommandSubOpcode;
1545 uint32_t DwordLength;
1546 struct GEN75_3DSTATE_CONSTANT_BODY ConstantBody;
1547 };
1548
1549 static inline void
1550 GEN75_3DSTATE_CONSTANT_HS_pack(__gen_user_data *data, void * restrict dst,
1551 const struct GEN75_3DSTATE_CONSTANT_HS * restrict values)
1552 {
1553 uint32_t *dw = (uint32_t * restrict) dst;
1554
1555 dw[0] =
1556 __gen_field(values->CommandType, 29, 31) |
1557 __gen_field(values->CommandSubType, 27, 28) |
1558 __gen_field(values->_3DCommandOpcode, 24, 26) |
1559 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1560 __gen_field(values->DwordLength, 0, 7) |
1561 0;
1562
1563 GEN75_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1564 }
1565
1566 #define GEN75_3DSTATE_CONSTANT_PS_length 0x00000007
1567 #define GEN75_3DSTATE_CONSTANT_PS_length_bias 0x00000002
1568 #define GEN75_3DSTATE_CONSTANT_PS_header \
1569 .CommandType = 3, \
1570 .CommandSubType = 3, \
1571 ._3DCommandOpcode = 0, \
1572 ._3DCommandSubOpcode = 23, \
1573 .DwordLength = 5
1574
1575 struct GEN75_3DSTATE_CONSTANT_PS {
1576 uint32_t CommandType;
1577 uint32_t CommandSubType;
1578 uint32_t _3DCommandOpcode;
1579 uint32_t _3DCommandSubOpcode;
1580 uint32_t DwordLength;
1581 struct GEN75_3DSTATE_CONSTANT_BODY ConstantBody;
1582 };
1583
1584 static inline void
1585 GEN75_3DSTATE_CONSTANT_PS_pack(__gen_user_data *data, void * restrict dst,
1586 const struct GEN75_3DSTATE_CONSTANT_PS * restrict values)
1587 {
1588 uint32_t *dw = (uint32_t * restrict) dst;
1589
1590 dw[0] =
1591 __gen_field(values->CommandType, 29, 31) |
1592 __gen_field(values->CommandSubType, 27, 28) |
1593 __gen_field(values->_3DCommandOpcode, 24, 26) |
1594 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1595 __gen_field(values->DwordLength, 0, 7) |
1596 0;
1597
1598 GEN75_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1599 }
1600
1601 #define GEN75_3DSTATE_CONSTANT_VS_length 0x00000007
1602 #define GEN75_3DSTATE_CONSTANT_VS_length_bias 0x00000002
1603 #define GEN75_3DSTATE_CONSTANT_VS_header \
1604 .CommandType = 3, \
1605 .CommandSubType = 3, \
1606 ._3DCommandOpcode = 0, \
1607 ._3DCommandSubOpcode = 21, \
1608 .DwordLength = 5
1609
1610 struct GEN75_3DSTATE_CONSTANT_VS {
1611 uint32_t CommandType;
1612 uint32_t CommandSubType;
1613 uint32_t _3DCommandOpcode;
1614 uint32_t _3DCommandSubOpcode;
1615 uint32_t DwordLength;
1616 struct GEN75_3DSTATE_CONSTANT_BODY ConstantBody;
1617 };
1618
1619 static inline void
1620 GEN75_3DSTATE_CONSTANT_VS_pack(__gen_user_data *data, void * restrict dst,
1621 const struct GEN75_3DSTATE_CONSTANT_VS * restrict values)
1622 {
1623 uint32_t *dw = (uint32_t * restrict) dst;
1624
1625 dw[0] =
1626 __gen_field(values->CommandType, 29, 31) |
1627 __gen_field(values->CommandSubType, 27, 28) |
1628 __gen_field(values->_3DCommandOpcode, 24, 26) |
1629 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1630 __gen_field(values->DwordLength, 0, 7) |
1631 0;
1632
1633 GEN75_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1634 }
1635
1636 #define GEN75_3DSTATE_DEPTH_BUFFER_length 0x00000007
1637 #define GEN75_3DSTATE_DEPTH_BUFFER_length_bias 0x00000002
1638 #define GEN75_3DSTATE_DEPTH_BUFFER_header \
1639 .CommandType = 3, \
1640 .CommandSubType = 3, \
1641 ._3DCommandOpcode = 0, \
1642 ._3DCommandSubOpcode = 5, \
1643 .DwordLength = 5
1644
1645 struct GEN75_3DSTATE_DEPTH_BUFFER {
1646 uint32_t CommandType;
1647 uint32_t CommandSubType;
1648 uint32_t _3DCommandOpcode;
1649 uint32_t _3DCommandSubOpcode;
1650 uint32_t DwordLength;
1651 #define SURFTYPE_1D 0
1652 #define SURFTYPE_2D 1
1653 #define SURFTYPE_3D 2
1654 #define SURFTYPE_CUBE 3
1655 #define SURFTYPE_NULL 7
1656 uint32_t SurfaceType;
1657 bool DepthWriteEnable;
1658 bool StencilWriteEnable;
1659 bool HierarchicalDepthBufferEnable;
1660 #define D32_FLOAT 1
1661 #define D24_UNORM_X8_UINT 3
1662 #define D16_UNORM 5
1663 uint32_t SurfaceFormat;
1664 uint32_t SurfacePitch;
1665 __gen_address_type SurfaceBaseAddress;
1666 uint32_t Height;
1667 uint32_t Width;
1668 uint32_t LOD;
1669 #define SURFTYPE_CUBEmustbezero 0
1670 uint32_t Depth;
1671 uint32_t MinimumArrayElement;
1672 struct GEN75_MEMORY_OBJECT_CONTROL_STATE DepthBufferObjectControlState;
1673 uint32_t DepthCoordinateOffsetY;
1674 uint32_t DepthCoordinateOffsetX;
1675 uint32_t RenderTargetViewExtent;
1676 };
1677
1678 static inline void
1679 GEN75_3DSTATE_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
1680 const struct GEN75_3DSTATE_DEPTH_BUFFER * restrict values)
1681 {
1682 uint32_t *dw = (uint32_t * restrict) dst;
1683
1684 dw[0] =
1685 __gen_field(values->CommandType, 29, 31) |
1686 __gen_field(values->CommandSubType, 27, 28) |
1687 __gen_field(values->_3DCommandOpcode, 24, 26) |
1688 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1689 __gen_field(values->DwordLength, 0, 7) |
1690 0;
1691
1692 dw[1] =
1693 __gen_field(values->SurfaceType, 29, 31) |
1694 __gen_field(values->DepthWriteEnable, 28, 28) |
1695 __gen_field(values->StencilWriteEnable, 27, 27) |
1696 __gen_field(values->HierarchicalDepthBufferEnable, 22, 22) |
1697 __gen_field(values->SurfaceFormat, 18, 20) |
1698 __gen_field(values->SurfacePitch, 0, 17) |
1699 0;
1700
1701 uint32_t dw2 =
1702 0;
1703
1704 dw[2] =
1705 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
1706
1707 dw[3] =
1708 __gen_field(values->Height, 18, 31) |
1709 __gen_field(values->Width, 4, 17) |
1710 __gen_field(values->LOD, 0, 3) |
1711 0;
1712
1713 uint32_t dw_DepthBufferObjectControlState;
1714 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DepthBufferObjectControlState, &values->DepthBufferObjectControlState);
1715 dw[4] =
1716 __gen_field(values->Depth, 21, 31) |
1717 __gen_field(values->MinimumArrayElement, 10, 20) |
1718 __gen_field(dw_DepthBufferObjectControlState, 0, 3) |
1719 0;
1720
1721 dw[5] =
1722 __gen_field(values->DepthCoordinateOffsetY, 16, 31) |
1723 __gen_field(values->DepthCoordinateOffsetX, 0, 15) |
1724 0;
1725
1726 dw[6] =
1727 __gen_field(values->RenderTargetViewExtent, 21, 31) |
1728 0;
1729
1730 }
1731
1732 #define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_length 0x00000002
1733 #define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_length_bias 0x00000002
1734 #define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_header\
1735 .CommandType = 3, \
1736 .CommandSubType = 3, \
1737 ._3DCommandOpcode = 0, \
1738 ._3DCommandSubOpcode = 37, \
1739 .DwordLength = 0
1740
1741 struct GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS {
1742 uint32_t CommandType;
1743 uint32_t CommandSubType;
1744 uint32_t _3DCommandOpcode;
1745 uint32_t _3DCommandSubOpcode;
1746 uint32_t DwordLength;
1747 uint32_t PointertoDEPTH_STENCIL_STATE;
1748 };
1749
1750 static inline void
1751 GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
1752 const struct GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS * restrict values)
1753 {
1754 uint32_t *dw = (uint32_t * restrict) dst;
1755
1756 dw[0] =
1757 __gen_field(values->CommandType, 29, 31) |
1758 __gen_field(values->CommandSubType, 27, 28) |
1759 __gen_field(values->_3DCommandOpcode, 24, 26) |
1760 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1761 __gen_field(values->DwordLength, 0, 7) |
1762 0;
1763
1764 dw[1] =
1765 __gen_offset(values->PointertoDEPTH_STENCIL_STATE, 6, 31) |
1766 __gen_mbo(0, 0) |
1767 0;
1768
1769 }
1770
1771 #define GEN75_3DSTATE_DRAWING_RECTANGLE_length 0x00000004
1772 #define GEN75_3DSTATE_DRAWING_RECTANGLE_length_bias 0x00000002
1773 #define GEN75_3DSTATE_DRAWING_RECTANGLE_header \
1774 .CommandType = 3, \
1775 .CommandSubType = 3, \
1776 ._3DCommandOpcode = 1, \
1777 ._3DCommandSubOpcode = 0, \
1778 .DwordLength = 2
1779
1780 struct GEN75_3DSTATE_DRAWING_RECTANGLE {
1781 uint32_t CommandType;
1782 uint32_t CommandSubType;
1783 uint32_t _3DCommandOpcode;
1784 uint32_t _3DCommandSubOpcode;
1785 #define Legacy 0
1786 #define Core0Enabled 1
1787 #define Core1Enabled 2
1788 uint32_t CoreModeSelect;
1789 uint32_t DwordLength;
1790 uint32_t ClippedDrawingRectangleYMin;
1791 uint32_t ClippedDrawingRectangleXMin;
1792 uint32_t ClippedDrawingRectangleYMax;
1793 uint32_t ClippedDrawingRectangleXMax;
1794 uint32_t DrawingRectangleOriginY;
1795 uint32_t DrawingRectangleOriginX;
1796 };
1797
1798 static inline void
1799 GEN75_3DSTATE_DRAWING_RECTANGLE_pack(__gen_user_data *data, void * restrict dst,
1800 const struct GEN75_3DSTATE_DRAWING_RECTANGLE * restrict values)
1801 {
1802 uint32_t *dw = (uint32_t * restrict) dst;
1803
1804 dw[0] =
1805 __gen_field(values->CommandType, 29, 31) |
1806 __gen_field(values->CommandSubType, 27, 28) |
1807 __gen_field(values->_3DCommandOpcode, 24, 26) |
1808 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1809 __gen_field(values->CoreModeSelect, 14, 15) |
1810 __gen_field(values->DwordLength, 0, 7) |
1811 0;
1812
1813 dw[1] =
1814 __gen_field(values->ClippedDrawingRectangleYMin, 16, 31) |
1815 __gen_field(values->ClippedDrawingRectangleXMin, 0, 15) |
1816 0;
1817
1818 dw[2] =
1819 __gen_field(values->ClippedDrawingRectangleYMax, 16, 31) |
1820 __gen_field(values->ClippedDrawingRectangleXMax, 0, 15) |
1821 0;
1822
1823 dw[3] =
1824 __gen_field(values->DrawingRectangleOriginY, 16, 31) |
1825 __gen_field(values->DrawingRectangleOriginX, 0, 15) |
1826 0;
1827
1828 }
1829
1830 #define GEN75_3DSTATE_DS_length 0x00000006
1831 #define GEN75_3DSTATE_DS_length_bias 0x00000002
1832 #define GEN75_3DSTATE_DS_header \
1833 .CommandType = 3, \
1834 .CommandSubType = 3, \
1835 ._3DCommandOpcode = 0, \
1836 ._3DCommandSubOpcode = 29, \
1837 .DwordLength = 4
1838
1839 struct GEN75_3DSTATE_DS {
1840 uint32_t CommandType;
1841 uint32_t CommandSubType;
1842 uint32_t _3DCommandOpcode;
1843 uint32_t _3DCommandSubOpcode;
1844 uint32_t DwordLength;
1845 uint32_t KernelStartPointer;
1846 #define Multiple 0
1847 #define Single 1
1848 uint32_t SingleDomainPointDispatch;
1849 #define Dmask 0
1850 #define Vmask 1
1851 uint32_t VectorMaskEnable;
1852 #define NoSamplers 0
1853 #define _14Samplers 1
1854 #define _58Samplers 2
1855 #define _912Samplers 3
1856 #define _1316Samplers 4
1857 uint32_t SamplerCount;
1858 uint32_t BindingTableEntryCount;
1859 #define Normal 0
1860 #define High 1
1861 uint32_t ThreadDispatchPriority;
1862 #define IEEE754 0
1863 #define Alternate 1
1864 uint32_t FloatingPointMode;
1865 bool AccessesUAV;
1866 bool IllegalOpcodeExceptionEnable;
1867 bool SoftwareExceptionEnable;
1868 uint32_t ScratchSpaceBasePointer;
1869 uint32_t PerThreadScratchSpace;
1870 uint32_t DispatchGRFStartRegisterForURBData;
1871 uint32_t PatchURBEntryReadLength;
1872 uint32_t PatchURBEntryReadOffset;
1873 uint32_t MaximumNumberofThreads;
1874 bool StatisticsEnable;
1875 bool ComputeWCoordinateEnable;
1876 bool DSCacheDisable;
1877 bool DSFunctionEnable;
1878 };
1879
1880 static inline void
1881 GEN75_3DSTATE_DS_pack(__gen_user_data *data, void * restrict dst,
1882 const struct GEN75_3DSTATE_DS * restrict values)
1883 {
1884 uint32_t *dw = (uint32_t * restrict) dst;
1885
1886 dw[0] =
1887 __gen_field(values->CommandType, 29, 31) |
1888 __gen_field(values->CommandSubType, 27, 28) |
1889 __gen_field(values->_3DCommandOpcode, 24, 26) |
1890 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1891 __gen_field(values->DwordLength, 0, 7) |
1892 0;
1893
1894 dw[1] =
1895 __gen_offset(values->KernelStartPointer, 6, 31) |
1896 0;
1897
1898 dw[2] =
1899 __gen_field(values->SingleDomainPointDispatch, 31, 31) |
1900 __gen_field(values->VectorMaskEnable, 30, 30) |
1901 __gen_field(values->SamplerCount, 27, 29) |
1902 __gen_field(values->BindingTableEntryCount, 18, 25) |
1903 __gen_field(values->ThreadDispatchPriority, 17, 17) |
1904 __gen_field(values->FloatingPointMode, 16, 16) |
1905 __gen_field(values->AccessesUAV, 14, 14) |
1906 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
1907 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
1908 0;
1909
1910 dw[3] =
1911 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
1912 __gen_field(values->PerThreadScratchSpace, 0, 3) |
1913 0;
1914
1915 dw[4] =
1916 __gen_field(values->DispatchGRFStartRegisterForURBData, 20, 24) |
1917 __gen_field(values->PatchURBEntryReadLength, 11, 17) |
1918 __gen_field(values->PatchURBEntryReadOffset, 4, 9) |
1919 0;
1920
1921 dw[5] =
1922 __gen_field(values->MaximumNumberofThreads, 21, 29) |
1923 __gen_field(values->StatisticsEnable, 10, 10) |
1924 __gen_field(values->ComputeWCoordinateEnable, 2, 2) |
1925 __gen_field(values->DSCacheDisable, 1, 1) |
1926 __gen_field(values->DSFunctionEnable, 0, 0) |
1927 0;
1928
1929 }
1930
1931 #define GEN75_3DSTATE_GATHER_CONSTANT_DS_length_bias 0x00000002
1932 #define GEN75_3DSTATE_GATHER_CONSTANT_DS_header \
1933 .CommandType = 3, \
1934 .CommandSubType = 3, \
1935 ._3DCommandOpcode = 0, \
1936 ._3DCommandSubOpcode = 55
1937
1938 struct GEN75_GATHER_CONSTANT_ENTRY {
1939 uint32_t ConstantBufferOffset;
1940 uint32_t ChannelMask;
1941 uint32_t BindingTableIndexOffset;
1942 };
1943
1944 static inline void
1945 GEN75_GATHER_CONSTANT_ENTRY_pack(__gen_user_data *data, void * restrict dst,
1946 const struct GEN75_GATHER_CONSTANT_ENTRY * restrict values)
1947 {
1948 uint32_t *dw = (uint32_t * restrict) dst;
1949
1950 dw[0] =
1951 __gen_offset(values->ConstantBufferOffset, 8, 15) |
1952 __gen_field(values->ChannelMask, 4, 7) |
1953 __gen_field(values->BindingTableIndexOffset, 0, 3) |
1954 0;
1955
1956 }
1957
1958 struct GEN75_3DSTATE_GATHER_CONSTANT_DS {
1959 uint32_t CommandType;
1960 uint32_t CommandSubType;
1961 uint32_t _3DCommandOpcode;
1962 uint32_t _3DCommandSubOpcode;
1963 uint32_t DwordLength;
1964 uint32_t ConstantBufferValid;
1965 uint32_t ConstantBufferBindingTableBlock;
1966 uint32_t GatherBufferOffset;
1967 /* variable length fields follow */
1968 };
1969
1970 static inline void
1971 GEN75_3DSTATE_GATHER_CONSTANT_DS_pack(__gen_user_data *data, void * restrict dst,
1972 const struct GEN75_3DSTATE_GATHER_CONSTANT_DS * restrict values)
1973 {
1974 uint32_t *dw = (uint32_t * restrict) dst;
1975
1976 dw[0] =
1977 __gen_field(values->CommandType, 29, 31) |
1978 __gen_field(values->CommandSubType, 27, 28) |
1979 __gen_field(values->_3DCommandOpcode, 24, 26) |
1980 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1981 __gen_field(values->DwordLength, 0, 7) |
1982 0;
1983
1984 dw[1] =
1985 __gen_field(values->ConstantBufferValid, 16, 31) |
1986 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
1987 0;
1988
1989 dw[2] =
1990 __gen_offset(values->GatherBufferOffset, 6, 22) |
1991 0;
1992
1993 /* variable length fields follow */
1994 }
1995
1996 #define GEN75_3DSTATE_GATHER_CONSTANT_GS_length_bias 0x00000002
1997 #define GEN75_3DSTATE_GATHER_CONSTANT_GS_header \
1998 .CommandType = 3, \
1999 .CommandSubType = 3, \
2000 ._3DCommandOpcode = 0, \
2001 ._3DCommandSubOpcode = 53
2002
2003 struct GEN75_3DSTATE_GATHER_CONSTANT_GS {
2004 uint32_t CommandType;
2005 uint32_t CommandSubType;
2006 uint32_t _3DCommandOpcode;
2007 uint32_t _3DCommandSubOpcode;
2008 uint32_t DwordLength;
2009 uint32_t ConstantBufferValid;
2010 uint32_t ConstantBufferBindingTableBlock;
2011 uint32_t GatherBufferOffset;
2012 /* variable length fields follow */
2013 };
2014
2015 static inline void
2016 GEN75_3DSTATE_GATHER_CONSTANT_GS_pack(__gen_user_data *data, void * restrict dst,
2017 const struct GEN75_3DSTATE_GATHER_CONSTANT_GS * restrict values)
2018 {
2019 uint32_t *dw = (uint32_t * restrict) dst;
2020
2021 dw[0] =
2022 __gen_field(values->CommandType, 29, 31) |
2023 __gen_field(values->CommandSubType, 27, 28) |
2024 __gen_field(values->_3DCommandOpcode, 24, 26) |
2025 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2026 __gen_field(values->DwordLength, 0, 7) |
2027 0;
2028
2029 dw[1] =
2030 __gen_field(values->ConstantBufferValid, 16, 31) |
2031 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2032 0;
2033
2034 dw[2] =
2035 __gen_offset(values->GatherBufferOffset, 6, 22) |
2036 0;
2037
2038 /* variable length fields follow */
2039 }
2040
2041 #define GEN75_3DSTATE_GATHER_CONSTANT_HS_length_bias 0x00000002
2042 #define GEN75_3DSTATE_GATHER_CONSTANT_HS_header \
2043 .CommandType = 3, \
2044 .CommandSubType = 3, \
2045 ._3DCommandOpcode = 0, \
2046 ._3DCommandSubOpcode = 54
2047
2048 struct GEN75_3DSTATE_GATHER_CONSTANT_HS {
2049 uint32_t CommandType;
2050 uint32_t CommandSubType;
2051 uint32_t _3DCommandOpcode;
2052 uint32_t _3DCommandSubOpcode;
2053 uint32_t DwordLength;
2054 uint32_t ConstantBufferValid;
2055 uint32_t ConstantBufferBindingTableBlock;
2056 uint32_t GatherBufferOffset;
2057 /* variable length fields follow */
2058 };
2059
2060 static inline void
2061 GEN75_3DSTATE_GATHER_CONSTANT_HS_pack(__gen_user_data *data, void * restrict dst,
2062 const struct GEN75_3DSTATE_GATHER_CONSTANT_HS * restrict values)
2063 {
2064 uint32_t *dw = (uint32_t * restrict) dst;
2065
2066 dw[0] =
2067 __gen_field(values->CommandType, 29, 31) |
2068 __gen_field(values->CommandSubType, 27, 28) |
2069 __gen_field(values->_3DCommandOpcode, 24, 26) |
2070 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2071 __gen_field(values->DwordLength, 0, 7) |
2072 0;
2073
2074 dw[1] =
2075 __gen_field(values->ConstantBufferValid, 16, 31) |
2076 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2077 0;
2078
2079 dw[2] =
2080 __gen_offset(values->GatherBufferOffset, 6, 22) |
2081 0;
2082
2083 /* variable length fields follow */
2084 }
2085
2086 #define GEN75_3DSTATE_GATHER_CONSTANT_PS_length_bias 0x00000002
2087 #define GEN75_3DSTATE_GATHER_CONSTANT_PS_header \
2088 .CommandType = 3, \
2089 .CommandSubType = 3, \
2090 ._3DCommandOpcode = 0, \
2091 ._3DCommandSubOpcode = 56
2092
2093 struct GEN75_3DSTATE_GATHER_CONSTANT_PS {
2094 uint32_t CommandType;
2095 uint32_t CommandSubType;
2096 uint32_t _3DCommandOpcode;
2097 uint32_t _3DCommandSubOpcode;
2098 uint32_t DwordLength;
2099 uint32_t ConstantBufferValid;
2100 uint32_t ConstantBufferBindingTableBlock;
2101 uint32_t GatherBufferOffset;
2102 bool ConstantBufferDx9Enable;
2103 /* variable length fields follow */
2104 };
2105
2106 static inline void
2107 GEN75_3DSTATE_GATHER_CONSTANT_PS_pack(__gen_user_data *data, void * restrict dst,
2108 const struct GEN75_3DSTATE_GATHER_CONSTANT_PS * restrict values)
2109 {
2110 uint32_t *dw = (uint32_t * restrict) dst;
2111
2112 dw[0] =
2113 __gen_field(values->CommandType, 29, 31) |
2114 __gen_field(values->CommandSubType, 27, 28) |
2115 __gen_field(values->_3DCommandOpcode, 24, 26) |
2116 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2117 __gen_field(values->DwordLength, 0, 7) |
2118 0;
2119
2120 dw[1] =
2121 __gen_field(values->ConstantBufferValid, 16, 31) |
2122 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2123 0;
2124
2125 dw[2] =
2126 __gen_offset(values->GatherBufferOffset, 6, 22) |
2127 __gen_field(values->ConstantBufferDx9Enable, 4, 4) |
2128 0;
2129
2130 /* variable length fields follow */
2131 }
2132
2133 #define GEN75_3DSTATE_GATHER_CONSTANT_VS_length_bias 0x00000002
2134 #define GEN75_3DSTATE_GATHER_CONSTANT_VS_header \
2135 .CommandType = 3, \
2136 .CommandSubType = 3, \
2137 ._3DCommandOpcode = 0, \
2138 ._3DCommandSubOpcode = 52
2139
2140 struct GEN75_3DSTATE_GATHER_CONSTANT_VS {
2141 uint32_t CommandType;
2142 uint32_t CommandSubType;
2143 uint32_t _3DCommandOpcode;
2144 uint32_t _3DCommandSubOpcode;
2145 uint32_t DwordLength;
2146 uint32_t ConstantBufferValid;
2147 uint32_t ConstantBufferBindingTableBlock;
2148 uint32_t GatherBufferOffset;
2149 bool ConstantBufferDx9Enable;
2150 /* variable length fields follow */
2151 };
2152
2153 static inline void
2154 GEN75_3DSTATE_GATHER_CONSTANT_VS_pack(__gen_user_data *data, void * restrict dst,
2155 const struct GEN75_3DSTATE_GATHER_CONSTANT_VS * restrict values)
2156 {
2157 uint32_t *dw = (uint32_t * restrict) dst;
2158
2159 dw[0] =
2160 __gen_field(values->CommandType, 29, 31) |
2161 __gen_field(values->CommandSubType, 27, 28) |
2162 __gen_field(values->_3DCommandOpcode, 24, 26) |
2163 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2164 __gen_field(values->DwordLength, 0, 7) |
2165 0;
2166
2167 dw[1] =
2168 __gen_field(values->ConstantBufferValid, 16, 31) |
2169 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2170 0;
2171
2172 dw[2] =
2173 __gen_offset(values->GatherBufferOffset, 6, 22) |
2174 __gen_field(values->ConstantBufferDx9Enable, 4, 4) |
2175 0;
2176
2177 /* variable length fields follow */
2178 }
2179
2180 #define GEN75_3DSTATE_GATHER_POOL_ALLOC_length 0x00000003
2181 #define GEN75_3DSTATE_GATHER_POOL_ALLOC_length_bias 0x00000002
2182 #define GEN75_3DSTATE_GATHER_POOL_ALLOC_header \
2183 .CommandType = 3, \
2184 .CommandSubType = 3, \
2185 ._3DCommandOpcode = 1, \
2186 ._3DCommandSubOpcode = 26, \
2187 .DwordLength = 1
2188
2189 struct GEN75_3DSTATE_GATHER_POOL_ALLOC {
2190 uint32_t CommandType;
2191 uint32_t CommandSubType;
2192 uint32_t _3DCommandOpcode;
2193 uint32_t _3DCommandSubOpcode;
2194 uint32_t DwordLength;
2195 __gen_address_type GatherPoolBaseAddress;
2196 bool GatherPoolEnable;
2197 struct GEN75_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
2198 __gen_address_type GatherPoolUpperBound;
2199 };
2200
2201 static inline void
2202 GEN75_3DSTATE_GATHER_POOL_ALLOC_pack(__gen_user_data *data, void * restrict dst,
2203 const struct GEN75_3DSTATE_GATHER_POOL_ALLOC * restrict values)
2204 {
2205 uint32_t *dw = (uint32_t * restrict) dst;
2206
2207 dw[0] =
2208 __gen_field(values->CommandType, 29, 31) |
2209 __gen_field(values->CommandSubType, 27, 28) |
2210 __gen_field(values->_3DCommandOpcode, 24, 26) |
2211 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2212 __gen_field(values->DwordLength, 0, 7) |
2213 0;
2214
2215 uint32_t dw_MemoryObjectControlState;
2216 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
2217 uint32_t dw1 =
2218 __gen_field(values->GatherPoolEnable, 11, 11) |
2219 __gen_mbo(4, 5) |
2220 __gen_field(dw_MemoryObjectControlState, 0, 3) |
2221 0;
2222
2223 dw[1] =
2224 __gen_combine_address(data, &dw[1], values->GatherPoolBaseAddress, dw1);
2225
2226 uint32_t dw2 =
2227 0;
2228
2229 dw[2] =
2230 __gen_combine_address(data, &dw[2], values->GatherPoolUpperBound, dw2);
2231
2232 }
2233
2234 #define GEN75_3DSTATE_GS_length 0x00000007
2235 #define GEN75_3DSTATE_GS_length_bias 0x00000002
2236 #define GEN75_3DSTATE_GS_header \
2237 .CommandType = 3, \
2238 .CommandSubType = 3, \
2239 ._3DCommandOpcode = 0, \
2240 ._3DCommandSubOpcode = 17, \
2241 .DwordLength = 5
2242
2243 struct GEN75_3DSTATE_GS {
2244 uint32_t CommandType;
2245 uint32_t CommandSubType;
2246 uint32_t _3DCommandOpcode;
2247 uint32_t _3DCommandSubOpcode;
2248 uint32_t DwordLength;
2249 uint32_t KernelStartPointer;
2250 uint32_t SingleProgramFlowSPF;
2251 #define Dmask 0
2252 #define Vmask 1
2253 uint32_t VectorMaskEnableVME;
2254 #define NoSamplers 0
2255 #define _14Samplers 1
2256 #define _58Samplers 2
2257 #define _912Samplers 3
2258 #define _1316Samplers 4
2259 uint32_t SamplerCount;
2260 uint32_t BindingTableEntryCount;
2261 #define NormalPriority 0
2262 #define HighPriority 1
2263 uint32_t ThreadPriority;
2264 #define IEEE754 0
2265 #define alternate 1
2266 uint32_t FloatingPointMode;
2267 bool IllegalOpcodeExceptionEnable;
2268 uint32_t GSaccessesUAV;
2269 bool MaskStackExceptionEnable;
2270 bool SoftwareExceptionEnable;
2271 uint32_t ScratchSpaceBasePointer;
2272 uint32_t PerThreadScratchSpace;
2273 uint32_t OutputVertexSize;
2274 uint32_t OutputTopology;
2275 uint32_t VertexURBEntryReadLength;
2276 bool IncludeVertexHandles;
2277 uint32_t VertexURBEntryReadOffset;
2278 uint32_t DispatchGRFStartRegisterforURBData;
2279 uint32_t MaximumNumberofThreads;
2280 uint32_t ControlDataHeaderSize;
2281 uint32_t InstanceControl;
2282 uint32_t DefaultStreamID;
2283 #define SINGLE 0
2284 #define DUAL_INSTANCE 1
2285 #define DUAL_OBJECT 2
2286 uint32_t DispatchMode;
2287 uint32_t GSStatisticsEnable;
2288 uint32_t GSInvocationsIncrementValue;
2289 bool IncludePrimitiveID;
2290 uint32_t Hint;
2291 #define REORDER_LEADING 0
2292 #define REORDER_TRAILING 1
2293 uint32_t ReorderMode;
2294 bool DiscardAdjacency;
2295 bool GSEnable;
2296 #define GSCTL_CUT 0
2297 #define GSCTL_SID 1
2298 uint32_t ControlDataFormat;
2299 uint32_t SemaphoreHandle;
2300 };
2301
2302 static inline void
2303 GEN75_3DSTATE_GS_pack(__gen_user_data *data, void * restrict dst,
2304 const struct GEN75_3DSTATE_GS * restrict values)
2305 {
2306 uint32_t *dw = (uint32_t * restrict) dst;
2307
2308 dw[0] =
2309 __gen_field(values->CommandType, 29, 31) |
2310 __gen_field(values->CommandSubType, 27, 28) |
2311 __gen_field(values->_3DCommandOpcode, 24, 26) |
2312 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2313 __gen_field(values->DwordLength, 0, 7) |
2314 0;
2315
2316 dw[1] =
2317 __gen_offset(values->KernelStartPointer, 6, 31) |
2318 0;
2319
2320 dw[2] =
2321 __gen_field(values->SingleProgramFlowSPF, 31, 31) |
2322 __gen_field(values->VectorMaskEnableVME, 30, 30) |
2323 __gen_field(values->SamplerCount, 27, 29) |
2324 __gen_field(values->BindingTableEntryCount, 18, 25) |
2325 __gen_field(values->ThreadPriority, 17, 17) |
2326 __gen_field(values->FloatingPointMode, 16, 16) |
2327 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2328 __gen_field(values->GSaccessesUAV, 12, 12) |
2329 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
2330 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
2331 0;
2332
2333 dw[3] =
2334 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
2335 __gen_field(values->PerThreadScratchSpace, 0, 3) |
2336 0;
2337
2338 dw[4] =
2339 __gen_field(values->OutputVertexSize, 23, 28) |
2340 __gen_field(values->OutputTopology, 17, 22) |
2341 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
2342 __gen_field(values->IncludeVertexHandles, 10, 10) |
2343 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
2344 __gen_field(values->DispatchGRFStartRegisterforURBData, 0, 3) |
2345 0;
2346
2347 dw[5] =
2348 __gen_field(values->MaximumNumberofThreads, 24, 31) |
2349 __gen_field(values->ControlDataHeaderSize, 20, 23) |
2350 __gen_field(values->InstanceControl, 15, 19) |
2351 __gen_field(values->DefaultStreamID, 13, 14) |
2352 __gen_field(values->DispatchMode, 11, 12) |
2353 __gen_field(values->GSStatisticsEnable, 10, 10) |
2354 __gen_field(values->GSInvocationsIncrementValue, 5, 9) |
2355 __gen_field(values->IncludePrimitiveID, 4, 4) |
2356 __gen_field(values->Hint, 3, 3) |
2357 __gen_field(values->ReorderMode, 2, 2) |
2358 __gen_field(values->DiscardAdjacency, 1, 1) |
2359 __gen_field(values->GSEnable, 0, 0) |
2360 0;
2361
2362 dw[6] =
2363 __gen_field(values->ControlDataFormat, 31, 31) |
2364 __gen_offset(values->SemaphoreHandle, 0, 12) |
2365 0;
2366
2367 }
2368
2369 #define GEN75_3DSTATE_HIER_DEPTH_BUFFER_length 0x00000003
2370 #define GEN75_3DSTATE_HIER_DEPTH_BUFFER_length_bias 0x00000002
2371 #define GEN75_3DSTATE_HIER_DEPTH_BUFFER_header \
2372 .CommandType = 3, \
2373 .CommandSubType = 3, \
2374 ._3DCommandOpcode = 0, \
2375 ._3DCommandSubOpcode = 7, \
2376 .DwordLength = 1
2377
2378 struct GEN75_3DSTATE_HIER_DEPTH_BUFFER {
2379 uint32_t CommandType;
2380 uint32_t CommandSubType;
2381 uint32_t _3DCommandOpcode;
2382 uint32_t _3DCommandSubOpcode;
2383 uint32_t DwordLength;
2384 struct GEN75_MEMORY_OBJECT_CONTROL_STATE HierarchicalDepthBufferObjectControlState;
2385 uint32_t SurfacePitch;
2386 __gen_address_type SurfaceBaseAddress;
2387 };
2388
2389 static inline void
2390 GEN75_3DSTATE_HIER_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
2391 const struct GEN75_3DSTATE_HIER_DEPTH_BUFFER * restrict values)
2392 {
2393 uint32_t *dw = (uint32_t * restrict) dst;
2394
2395 dw[0] =
2396 __gen_field(values->CommandType, 29, 31) |
2397 __gen_field(values->CommandSubType, 27, 28) |
2398 __gen_field(values->_3DCommandOpcode, 24, 26) |
2399 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2400 __gen_field(values->DwordLength, 0, 7) |
2401 0;
2402
2403 uint32_t dw_HierarchicalDepthBufferObjectControlState;
2404 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_HierarchicalDepthBufferObjectControlState, &values->HierarchicalDepthBufferObjectControlState);
2405 dw[1] =
2406 __gen_field(dw_HierarchicalDepthBufferObjectControlState, 25, 28) |
2407 __gen_field(values->SurfacePitch, 0, 16) |
2408 0;
2409
2410 uint32_t dw2 =
2411 0;
2412
2413 dw[2] =
2414 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
2415
2416 }
2417
2418 #define GEN75_3DSTATE_HS_length 0x00000007
2419 #define GEN75_3DSTATE_HS_length_bias 0x00000002
2420 #define GEN75_3DSTATE_HS_header \
2421 .CommandType = 3, \
2422 .CommandSubType = 3, \
2423 ._3DCommandOpcode = 0, \
2424 ._3DCommandSubOpcode = 27, \
2425 .DwordLength = 5
2426
2427 struct GEN75_3DSTATE_HS {
2428 uint32_t CommandType;
2429 uint32_t CommandSubType;
2430 uint32_t _3DCommandOpcode;
2431 uint32_t _3DCommandSubOpcode;
2432 uint32_t DwordLength;
2433 #define NoSamplers 0
2434 #define _14Samplers 1
2435 #define _58Samplers 2
2436 #define _912Samplers 3
2437 #define _1316Samplers 4
2438 uint32_t SamplerCount;
2439 uint32_t BindingTableEntryCount;
2440 #define Normal 0
2441 #define High 1
2442 uint32_t ThreadDispatchPriority;
2443 #define IEEE754 0
2444 #define alternate 1
2445 uint32_t FloatingPointMode;
2446 bool IllegalOpcodeExceptionEnable;
2447 bool SoftwareExceptionEnable;
2448 uint32_t MaximumNumberofThreads;
2449 bool Enable;
2450 bool StatisticsEnable;
2451 uint32_t InstanceCount;
2452 uint32_t KernelStartPointer;
2453 uint32_t ScratchSpaceBasePointer;
2454 uint32_t PerThreadScratchSpace;
2455 uint32_t SingleProgramFlow;
2456 #define Dmask 0
2457 #define Vmask 1
2458 uint32_t VectorMaskEnable;
2459 bool HSaccessesUAV;
2460 bool IncludeVertexHandles;
2461 uint32_t DispatchGRFStartRegisterForURBData;
2462 uint32_t VertexURBEntryReadLength;
2463 uint32_t VertexURBEntryReadOffset;
2464 uint32_t SemaphoreHandle;
2465 };
2466
2467 static inline void
2468 GEN75_3DSTATE_HS_pack(__gen_user_data *data, void * restrict dst,
2469 const struct GEN75_3DSTATE_HS * restrict values)
2470 {
2471 uint32_t *dw = (uint32_t * restrict) dst;
2472
2473 dw[0] =
2474 __gen_field(values->CommandType, 29, 31) |
2475 __gen_field(values->CommandSubType, 27, 28) |
2476 __gen_field(values->_3DCommandOpcode, 24, 26) |
2477 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2478 __gen_field(values->DwordLength, 0, 7) |
2479 0;
2480
2481 dw[1] =
2482 __gen_field(values->SamplerCount, 27, 29) |
2483 __gen_field(values->BindingTableEntryCount, 18, 25) |
2484 __gen_field(values->ThreadDispatchPriority, 17, 17) |
2485 __gen_field(values->FloatingPointMode, 16, 16) |
2486 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2487 __gen_field(values->SoftwareExceptionEnable, 12, 12) |
2488 __gen_field(values->MaximumNumberofThreads, 0, 7) |
2489 0;
2490
2491 dw[2] =
2492 __gen_field(values->Enable, 31, 31) |
2493 __gen_field(values->StatisticsEnable, 29, 29) |
2494 __gen_field(values->InstanceCount, 0, 3) |
2495 0;
2496
2497 dw[3] =
2498 __gen_offset(values->KernelStartPointer, 6, 31) |
2499 0;
2500
2501 dw[4] =
2502 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
2503 __gen_field(values->PerThreadScratchSpace, 0, 3) |
2504 0;
2505
2506 dw[5] =
2507 __gen_field(values->SingleProgramFlow, 27, 27) |
2508 __gen_field(values->VectorMaskEnable, 26, 26) |
2509 __gen_field(values->HSaccessesUAV, 25, 25) |
2510 __gen_field(values->IncludeVertexHandles, 24, 24) |
2511 __gen_field(values->DispatchGRFStartRegisterForURBData, 19, 23) |
2512 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
2513 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
2514 0;
2515
2516 dw[6] =
2517 __gen_offset(values->SemaphoreHandle, 0, 12) |
2518 0;
2519
2520 }
2521
2522 #define GEN75_3DSTATE_INDEX_BUFFER_length 0x00000003
2523 #define GEN75_3DSTATE_INDEX_BUFFER_length_bias 0x00000002
2524 #define GEN75_3DSTATE_INDEX_BUFFER_header \
2525 .CommandType = 3, \
2526 .CommandSubType = 3, \
2527 ._3DCommandOpcode = 0, \
2528 ._3DCommandSubOpcode = 10, \
2529 .DwordLength = 1
2530
2531 struct GEN75_3DSTATE_INDEX_BUFFER {
2532 uint32_t CommandType;
2533 uint32_t CommandSubType;
2534 uint32_t _3DCommandOpcode;
2535 uint32_t _3DCommandSubOpcode;
2536 struct GEN75_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
2537 #define INDEX_BYTE 0
2538 #define INDEX_WORD 1
2539 #define INDEX_DWORD 2
2540 uint32_t IndexFormat;
2541 uint32_t DwordLength;
2542 __gen_address_type BufferStartingAddress;
2543 __gen_address_type BufferEndingAddress;
2544 };
2545
2546 static inline void
2547 GEN75_3DSTATE_INDEX_BUFFER_pack(__gen_user_data *data, void * restrict dst,
2548 const struct GEN75_3DSTATE_INDEX_BUFFER * restrict values)
2549 {
2550 uint32_t *dw = (uint32_t * restrict) dst;
2551
2552 uint32_t dw_MemoryObjectControlState;
2553 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
2554 dw[0] =
2555 __gen_field(values->CommandType, 29, 31) |
2556 __gen_field(values->CommandSubType, 27, 28) |
2557 __gen_field(values->_3DCommandOpcode, 24, 26) |
2558 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2559 __gen_field(dw_MemoryObjectControlState, 12, 15) |
2560 __gen_field(values->IndexFormat, 8, 9) |
2561 __gen_field(values->DwordLength, 0, 7) |
2562 0;
2563
2564 uint32_t dw1 =
2565 0;
2566
2567 dw[1] =
2568 __gen_combine_address(data, &dw[1], values->BufferStartingAddress, dw1);
2569
2570 uint32_t dw2 =
2571 0;
2572
2573 dw[2] =
2574 __gen_combine_address(data, &dw[2], values->BufferEndingAddress, dw2);
2575
2576 }
2577
2578 #define GEN75_3DSTATE_LINE_STIPPLE_length 0x00000003
2579 #define GEN75_3DSTATE_LINE_STIPPLE_length_bias 0x00000002
2580 #define GEN75_3DSTATE_LINE_STIPPLE_header \
2581 .CommandType = 3, \
2582 .CommandSubType = 3, \
2583 ._3DCommandOpcode = 1, \
2584 ._3DCommandSubOpcode = 8, \
2585 .DwordLength = 1
2586
2587 struct GEN75_3DSTATE_LINE_STIPPLE {
2588 uint32_t CommandType;
2589 uint32_t CommandSubType;
2590 uint32_t _3DCommandOpcode;
2591 uint32_t _3DCommandSubOpcode;
2592 uint32_t DwordLength;
2593 bool ModifyEnableCurrentRepeatCounterCurrentStippleIndex;
2594 uint32_t CurrentRepeatCounter;
2595 uint32_t CurrentStippleIndex;
2596 uint32_t LineStipplePattern;
2597 float LineStippleInverseRepeatCount;
2598 uint32_t LineStippleRepeatCount;
2599 };
2600
2601 static inline void
2602 GEN75_3DSTATE_LINE_STIPPLE_pack(__gen_user_data *data, void * restrict dst,
2603 const struct GEN75_3DSTATE_LINE_STIPPLE * restrict values)
2604 {
2605 uint32_t *dw = (uint32_t * restrict) dst;
2606
2607 dw[0] =
2608 __gen_field(values->CommandType, 29, 31) |
2609 __gen_field(values->CommandSubType, 27, 28) |
2610 __gen_field(values->_3DCommandOpcode, 24, 26) |
2611 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2612 __gen_field(values->DwordLength, 0, 7) |
2613 0;
2614
2615 dw[1] =
2616 __gen_field(values->ModifyEnableCurrentRepeatCounterCurrentStippleIndex, 31, 31) |
2617 __gen_field(values->CurrentRepeatCounter, 21, 29) |
2618 __gen_field(values->CurrentStippleIndex, 16, 19) |
2619 __gen_field(values->LineStipplePattern, 0, 15) |
2620 0;
2621
2622 dw[2] =
2623 __gen_field(values->LineStippleInverseRepeatCount * (1 << 16), 15, 31) |
2624 __gen_field(values->LineStippleRepeatCount, 0, 8) |
2625 0;
2626
2627 }
2628
2629 #define GEN75_3DSTATE_MONOFILTER_SIZE_length 0x00000002
2630 #define GEN75_3DSTATE_MONOFILTER_SIZE_length_bias 0x00000002
2631 #define GEN75_3DSTATE_MONOFILTER_SIZE_header \
2632 .CommandType = 3, \
2633 .CommandSubType = 3, \
2634 ._3DCommandOpcode = 1, \
2635 ._3DCommandSubOpcode = 17, \
2636 .DwordLength = 0
2637
2638 struct GEN75_3DSTATE_MONOFILTER_SIZE {
2639 uint32_t CommandType;
2640 uint32_t CommandSubType;
2641 uint32_t _3DCommandOpcode;
2642 uint32_t _3DCommandSubOpcode;
2643 uint32_t DwordLength;
2644 uint32_t MonochromeFilterWidth;
2645 uint32_t MonochromeFilterHeight;
2646 };
2647
2648 static inline void
2649 GEN75_3DSTATE_MONOFILTER_SIZE_pack(__gen_user_data *data, void * restrict dst,
2650 const struct GEN75_3DSTATE_MONOFILTER_SIZE * restrict values)
2651 {
2652 uint32_t *dw = (uint32_t * restrict) dst;
2653
2654 dw[0] =
2655 __gen_field(values->CommandType, 29, 31) |
2656 __gen_field(values->CommandSubType, 27, 28) |
2657 __gen_field(values->_3DCommandOpcode, 24, 26) |
2658 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2659 __gen_field(values->DwordLength, 0, 7) |
2660 0;
2661
2662 dw[1] =
2663 __gen_field(values->MonochromeFilterWidth, 3, 5) |
2664 __gen_field(values->MonochromeFilterHeight, 0, 2) |
2665 0;
2666
2667 }
2668
2669 #define GEN75_3DSTATE_MULTISAMPLE_length 0x00000004
2670 #define GEN75_3DSTATE_MULTISAMPLE_length_bias 0x00000002
2671 #define GEN75_3DSTATE_MULTISAMPLE_header \
2672 .CommandType = 3, \
2673 .CommandSubType = 3, \
2674 ._3DCommandOpcode = 1, \
2675 ._3DCommandSubOpcode = 13, \
2676 .DwordLength = 2
2677
2678 struct GEN75_3DSTATE_MULTISAMPLE {
2679 uint32_t CommandType;
2680 uint32_t CommandSubType;
2681 uint32_t _3DCommandOpcode;
2682 uint32_t _3DCommandSubOpcode;
2683 uint32_t DwordLength;
2684 bool MultiSampleEnable;
2685 #define PIXLOC_CENTER 0
2686 #define PIXLOC_UL_CORNER 1
2687 uint32_t PixelLocation;
2688 #define NUMSAMPLES_1 0
2689 #define NUMSAMPLES_4 2
2690 #define NUMSAMPLES_8 3
2691 uint32_t NumberofMultisamples;
2692 float Sample3XOffset;
2693 float Sample3YOffset;
2694 float Sample2XOffset;
2695 float Sample2YOffset;
2696 float Sample1XOffset;
2697 float Sample1YOffset;
2698 float Sample0XOffset;
2699 float Sample0YOffset;
2700 float Sample7XOffset;
2701 float Sample7YOffset;
2702 float Sample6XOffset;
2703 float Sample6YOffset;
2704 float Sample5XOffset;
2705 float Sample5YOffset;
2706 float Sample4XOffset;
2707 float Sample4YOffset;
2708 };
2709
2710 static inline void
2711 GEN75_3DSTATE_MULTISAMPLE_pack(__gen_user_data *data, void * restrict dst,
2712 const struct GEN75_3DSTATE_MULTISAMPLE * restrict values)
2713 {
2714 uint32_t *dw = (uint32_t * restrict) dst;
2715
2716 dw[0] =
2717 __gen_field(values->CommandType, 29, 31) |
2718 __gen_field(values->CommandSubType, 27, 28) |
2719 __gen_field(values->_3DCommandOpcode, 24, 26) |
2720 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2721 __gen_field(values->DwordLength, 0, 7) |
2722 0;
2723
2724 dw[1] =
2725 __gen_field(values->MultiSampleEnable, 5, 5) |
2726 __gen_field(values->PixelLocation, 4, 4) |
2727 __gen_field(values->NumberofMultisamples, 1, 3) |
2728 0;
2729
2730 dw[2] =
2731 __gen_field(values->Sample3XOffset * (1 << 4), 28, 31) |
2732 __gen_field(values->Sample3YOffset * (1 << 4), 24, 27) |
2733 __gen_field(values->Sample2XOffset * (1 << 4), 20, 23) |
2734 __gen_field(values->Sample2YOffset * (1 << 4), 16, 19) |
2735 __gen_field(values->Sample1XOffset * (1 << 4), 12, 15) |
2736 __gen_field(values->Sample1YOffset * (1 << 4), 8, 11) |
2737 __gen_field(values->Sample0XOffset * (1 << 4), 4, 7) |
2738 __gen_field(values->Sample0YOffset * (1 << 4), 0, 3) |
2739 0;
2740
2741 dw[3] =
2742 __gen_field(values->Sample7XOffset * (1 << 4), 28, 31) |
2743 __gen_field(values->Sample7YOffset * (1 << 4), 24, 27) |
2744 __gen_field(values->Sample6XOffset * (1 << 4), 20, 23) |
2745 __gen_field(values->Sample6YOffset * (1 << 4), 16, 19) |
2746 __gen_field(values->Sample5XOffset * (1 << 4), 12, 15) |
2747 __gen_field(values->Sample5YOffset * (1 << 4), 8, 11) |
2748 __gen_field(values->Sample4XOffset * (1 << 4), 4, 7) |
2749 __gen_field(values->Sample4YOffset * (1 << 4), 0, 3) |
2750 0;
2751
2752 }
2753
2754 #define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_length 0x00000002
2755 #define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_length_bias 0x00000002
2756 #define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_header\
2757 .CommandType = 3, \
2758 .CommandSubType = 3, \
2759 ._3DCommandOpcode = 1, \
2760 ._3DCommandSubOpcode = 6, \
2761 .DwordLength = 0
2762
2763 struct GEN75_3DSTATE_POLY_STIPPLE_OFFSET {
2764 uint32_t CommandType;
2765 uint32_t CommandSubType;
2766 uint32_t _3DCommandOpcode;
2767 uint32_t _3DCommandSubOpcode;
2768 uint32_t DwordLength;
2769 uint32_t PolygonStippleXOffset;
2770 uint32_t PolygonStippleYOffset;
2771 };
2772
2773 static inline void
2774 GEN75_3DSTATE_POLY_STIPPLE_OFFSET_pack(__gen_user_data *data, void * restrict dst,
2775 const struct GEN75_3DSTATE_POLY_STIPPLE_OFFSET * restrict values)
2776 {
2777 uint32_t *dw = (uint32_t * restrict) dst;
2778
2779 dw[0] =
2780 __gen_field(values->CommandType, 29, 31) |
2781 __gen_field(values->CommandSubType, 27, 28) |
2782 __gen_field(values->_3DCommandOpcode, 24, 26) |
2783 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2784 __gen_field(values->DwordLength, 0, 7) |
2785 0;
2786
2787 dw[1] =
2788 __gen_field(values->PolygonStippleXOffset, 8, 12) |
2789 __gen_field(values->PolygonStippleYOffset, 0, 4) |
2790 0;
2791
2792 }
2793
2794 #define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_length 0x00000021
2795 #define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_length_bias 0x00000002
2796 #define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_header\
2797 .CommandType = 3, \
2798 .CommandSubType = 3, \
2799 ._3DCommandOpcode = 1, \
2800 ._3DCommandSubOpcode = 7, \
2801 .DwordLength = 31
2802
2803 struct GEN75_3DSTATE_POLY_STIPPLE_PATTERN {
2804 uint32_t CommandType;
2805 uint32_t CommandSubType;
2806 uint32_t _3DCommandOpcode;
2807 uint32_t _3DCommandSubOpcode;
2808 uint32_t DwordLength;
2809 uint32_t PatternRow;
2810 };
2811
2812 static inline void
2813 GEN75_3DSTATE_POLY_STIPPLE_PATTERN_pack(__gen_user_data *data, void * restrict dst,
2814 const struct GEN75_3DSTATE_POLY_STIPPLE_PATTERN * restrict values)
2815 {
2816 uint32_t *dw = (uint32_t * restrict) dst;
2817
2818 dw[0] =
2819 __gen_field(values->CommandType, 29, 31) |
2820 __gen_field(values->CommandSubType, 27, 28) |
2821 __gen_field(values->_3DCommandOpcode, 24, 26) |
2822 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2823 __gen_field(values->DwordLength, 0, 7) |
2824 0;
2825
2826 dw[1] =
2827 __gen_field(values->PatternRow, 0, 31) |
2828 0;
2829
2830 }
2831
2832 #define GEN75_3DSTATE_PS_length 0x00000008
2833 #define GEN75_3DSTATE_PS_length_bias 0x00000002
2834 #define GEN75_3DSTATE_PS_header \
2835 .CommandType = 3, \
2836 .CommandSubType = 3, \
2837 ._3DCommandOpcode = 0, \
2838 ._3DCommandSubOpcode = 32, \
2839 .DwordLength = 6
2840
2841 struct GEN75_3DSTATE_PS {
2842 uint32_t CommandType;
2843 uint32_t CommandSubType;
2844 uint32_t _3DCommandOpcode;
2845 uint32_t _3DCommandSubOpcode;
2846 uint32_t DwordLength;
2847 uint32_t KernelStartPointer0;
2848 #define Multiple 0
2849 #define Single 1
2850 uint32_t SingleProgramFlowSPF;
2851 #define Dmask 0
2852 #define Vmask 1
2853 uint32_t VectorMaskEnableVME;
2854 uint32_t SamplerCount;
2855 #define FTZ 0
2856 #define RET 1
2857 uint32_t DenormalMode;
2858 uint32_t BindingTableEntryCount;
2859 #define Normal 0
2860 #define High 1
2861 uint32_t ThreadPriority;
2862 #define IEEE745 0
2863 #define Alt 1
2864 uint32_t FloatingPointMode;
2865 #define RTNE 0
2866 #define RU 1
2867 #define RD 2
2868 #define RTZ 3
2869 uint32_t RoundingMode;
2870 bool IllegalOpcodeExceptionEnable;
2871 bool MaskStackExceptionEnable;
2872 bool SoftwareExceptionEnable;
2873 uint32_t ScratchSpaceBasePointer;
2874 uint32_t PerThreadScratchSpace;
2875 uint32_t MaximumNumberofThreads;
2876 uint32_t SampleMask;
2877 bool PushConstantEnable;
2878 bool AttributeEnable;
2879 bool oMaskPresenttoRenderTarget;
2880 bool RenderTargetFastClearEnable;
2881 bool DualSourceBlendEnable;
2882 bool RenderTargetResolveEnable;
2883 bool PSAccessesUAV;
2884 #define POSOFFSET_NONE 0
2885 #define POSOFFSET_CENTROID 2
2886 #define POSOFFSET_SAMPLE 3
2887 uint32_t PositionXYOffsetSelect;
2888 bool _32PixelDispatchEnable;
2889 bool _16PixelDispatchEnable;
2890 bool _8PixelDispatchEnable;
2891 uint32_t DispatchGRFStartRegisterforConstantSetupData0;
2892 uint32_t DispatchGRFStartRegisterforConstantSetupData1;
2893 uint32_t DispatchGRFStartRegisterforConstantSetupData2;
2894 uint32_t KernelStartPointer1;
2895 uint32_t KernelStartPointer2;
2896 };
2897
2898 static inline void
2899 GEN75_3DSTATE_PS_pack(__gen_user_data *data, void * restrict dst,
2900 const struct GEN75_3DSTATE_PS * restrict values)
2901 {
2902 uint32_t *dw = (uint32_t * restrict) dst;
2903
2904 dw[0] =
2905 __gen_field(values->CommandType, 29, 31) |
2906 __gen_field(values->CommandSubType, 27, 28) |
2907 __gen_field(values->_3DCommandOpcode, 24, 26) |
2908 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2909 __gen_field(values->DwordLength, 0, 7) |
2910 0;
2911
2912 dw[1] =
2913 __gen_offset(values->KernelStartPointer0, 6, 31) |
2914 0;
2915
2916 dw[2] =
2917 __gen_field(values->SingleProgramFlowSPF, 31, 31) |
2918 __gen_field(values->VectorMaskEnableVME, 30, 30) |
2919 __gen_field(values->SamplerCount, 27, 29) |
2920 __gen_field(values->DenormalMode, 26, 26) |
2921 __gen_field(values->BindingTableEntryCount, 18, 25) |
2922 __gen_field(values->ThreadPriority, 17, 17) |
2923 __gen_field(values->FloatingPointMode, 16, 16) |
2924 __gen_field(values->RoundingMode, 14, 15) |
2925 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2926 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
2927 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
2928 0;
2929
2930 dw[3] =
2931 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
2932 __gen_field(values->PerThreadScratchSpace, 0, 3) |
2933 0;
2934
2935 dw[4] =
2936 __gen_field(values->MaximumNumberofThreads, 23, 31) |
2937 __gen_field(values->SampleMask, 12, 19) |
2938 __gen_field(values->PushConstantEnable, 11, 11) |
2939 __gen_field(values->AttributeEnable, 10, 10) |
2940 __gen_field(values->oMaskPresenttoRenderTarget, 9, 9) |
2941 __gen_field(values->RenderTargetFastClearEnable, 8, 8) |
2942 __gen_field(values->DualSourceBlendEnable, 7, 7) |
2943 __gen_field(values->RenderTargetResolveEnable, 6, 6) |
2944 __gen_field(values->PSAccessesUAV, 5, 5) |
2945 __gen_field(values->PositionXYOffsetSelect, 3, 4) |
2946 __gen_field(values->_32PixelDispatchEnable, 2, 2) |
2947 __gen_field(values->_16PixelDispatchEnable, 1, 1) |
2948 __gen_field(values->_8PixelDispatchEnable, 0, 0) |
2949 0;
2950
2951 dw[5] =
2952 __gen_field(values->DispatchGRFStartRegisterforConstantSetupData0, 16, 22) |
2953 __gen_field(values->DispatchGRFStartRegisterforConstantSetupData1, 8, 14) |
2954 __gen_field(values->DispatchGRFStartRegisterforConstantSetupData2, 0, 6) |
2955 0;
2956
2957 dw[6] =
2958 __gen_offset(values->KernelStartPointer1, 6, 31) |
2959 0;
2960
2961 dw[7] =
2962 __gen_offset(values->KernelStartPointer2, 6, 31) |
2963 0;
2964
2965 }
2966
2967 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length 0x00000002
2968 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length_bias 0x00000002
2969 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_header\
2970 .CommandType = 3, \
2971 .CommandSubType = 3, \
2972 ._3DCommandOpcode = 1, \
2973 ._3DCommandSubOpcode = 20, \
2974 .DwordLength = 0
2975
2976 struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS {
2977 uint32_t CommandType;
2978 uint32_t CommandSubType;
2979 uint32_t _3DCommandOpcode;
2980 uint32_t _3DCommandSubOpcode;
2981 uint32_t DwordLength;
2982 uint32_t ConstantBufferOffset;
2983 uint32_t ConstantBufferSize;
2984 };
2985
2986 static inline void
2987 GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_pack(__gen_user_data *data, void * restrict dst,
2988 const struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS * restrict values)
2989 {
2990 uint32_t *dw = (uint32_t * restrict) dst;
2991
2992 dw[0] =
2993 __gen_field(values->CommandType, 29, 31) |
2994 __gen_field(values->CommandSubType, 27, 28) |
2995 __gen_field(values->_3DCommandOpcode, 24, 26) |
2996 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2997 __gen_field(values->DwordLength, 0, 7) |
2998 0;
2999
3000 dw[1] =
3001 __gen_field(values->ConstantBufferOffset, 16, 20) |
3002 __gen_field(values->ConstantBufferSize, 0, 5) |
3003 0;
3004
3005 }
3006
3007 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length 0x00000002
3008 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length_bias 0x00000002
3009 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_header\
3010 .CommandType = 3, \
3011 .CommandSubType = 3, \
3012 ._3DCommandOpcode = 1, \
3013 ._3DCommandSubOpcode = 21, \
3014 .DwordLength = 0
3015
3016 struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS {
3017 uint32_t CommandType;
3018 uint32_t CommandSubType;
3019 uint32_t _3DCommandOpcode;
3020 uint32_t _3DCommandSubOpcode;
3021 uint32_t DwordLength;
3022 uint32_t ConstantBufferOffset;
3023 uint32_t ConstantBufferSize;
3024 };
3025
3026 static inline void
3027 GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_pack(__gen_user_data *data, void * restrict dst,
3028 const struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS * restrict values)
3029 {
3030 uint32_t *dw = (uint32_t * restrict) dst;
3031
3032 dw[0] =
3033 __gen_field(values->CommandType, 29, 31) |
3034 __gen_field(values->CommandSubType, 27, 28) |
3035 __gen_field(values->_3DCommandOpcode, 24, 26) |
3036 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3037 __gen_field(values->DwordLength, 0, 7) |
3038 0;
3039
3040 dw[1] =
3041 __gen_field(values->ConstantBufferOffset, 16, 20) |
3042 __gen_field(values->ConstantBufferSize, 0, 5) |
3043 0;
3044
3045 }
3046
3047 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length 0x00000002
3048 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length_bias 0x00000002
3049 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_header\
3050 .CommandType = 3, \
3051 .CommandSubType = 3, \
3052 ._3DCommandOpcode = 1, \
3053 ._3DCommandSubOpcode = 19, \
3054 .DwordLength = 0
3055
3056 struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS {
3057 uint32_t CommandType;
3058 uint32_t CommandSubType;
3059 uint32_t _3DCommandOpcode;
3060 uint32_t _3DCommandSubOpcode;
3061 uint32_t DwordLength;
3062 uint32_t ConstantBufferOffset;
3063 uint32_t ConstantBufferSize;
3064 };
3065
3066 static inline void
3067 GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_pack(__gen_user_data *data, void * restrict dst,
3068 const struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS * restrict values)
3069 {
3070 uint32_t *dw = (uint32_t * restrict) dst;
3071
3072 dw[0] =
3073 __gen_field(values->CommandType, 29, 31) |
3074 __gen_field(values->CommandSubType, 27, 28) |
3075 __gen_field(values->_3DCommandOpcode, 24, 26) |
3076 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3077 __gen_field(values->DwordLength, 0, 7) |
3078 0;
3079
3080 dw[1] =
3081 __gen_field(values->ConstantBufferOffset, 16, 20) |
3082 __gen_field(values->ConstantBufferSize, 0, 5) |
3083 0;
3084
3085 }
3086
3087 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length 0x00000002
3088 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length_bias 0x00000002
3089 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_header\
3090 .CommandType = 3, \
3091 .CommandSubType = 3, \
3092 ._3DCommandOpcode = 1, \
3093 ._3DCommandSubOpcode = 22, \
3094 .DwordLength = 0
3095
3096 struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS {
3097 uint32_t CommandType;
3098 uint32_t CommandSubType;
3099 uint32_t _3DCommandOpcode;
3100 uint32_t _3DCommandSubOpcode;
3101 uint32_t DwordLength;
3102 uint32_t ConstantBufferOffset;
3103 uint32_t ConstantBufferSize;
3104 };
3105
3106 static inline void
3107 GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_pack(__gen_user_data *data, void * restrict dst,
3108 const struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS * restrict values)
3109 {
3110 uint32_t *dw = (uint32_t * restrict) dst;
3111
3112 dw[0] =
3113 __gen_field(values->CommandType, 29, 31) |
3114 __gen_field(values->CommandSubType, 27, 28) |
3115 __gen_field(values->_3DCommandOpcode, 24, 26) |
3116 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3117 __gen_field(values->DwordLength, 0, 7) |
3118 0;
3119
3120 dw[1] =
3121 __gen_field(values->ConstantBufferOffset, 16, 20) |
3122 __gen_field(values->ConstantBufferSize, 0, 5) |
3123 0;
3124
3125 }
3126
3127 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length 0x00000002
3128 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length_bias 0x00000002
3129 #define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_header\
3130 .CommandType = 3, \
3131 .CommandSubType = 3, \
3132 ._3DCommandOpcode = 1, \
3133 ._3DCommandSubOpcode = 18, \
3134 .DwordLength = 0
3135
3136 struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS {
3137 uint32_t CommandType;
3138 uint32_t CommandSubType;
3139 uint32_t _3DCommandOpcode;
3140 uint32_t _3DCommandSubOpcode;
3141 uint32_t DwordLength;
3142 uint32_t ConstantBufferOffset;
3143 uint32_t ConstantBufferSize;
3144 };
3145
3146 static inline void
3147 GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_pack(__gen_user_data *data, void * restrict dst,
3148 const struct GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS * restrict values)
3149 {
3150 uint32_t *dw = (uint32_t * restrict) dst;
3151
3152 dw[0] =
3153 __gen_field(values->CommandType, 29, 31) |
3154 __gen_field(values->CommandSubType, 27, 28) |
3155 __gen_field(values->_3DCommandOpcode, 24, 26) |
3156 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3157 __gen_field(values->DwordLength, 0, 7) |
3158 0;
3159
3160 dw[1] =
3161 __gen_field(values->ConstantBufferOffset, 16, 20) |
3162 __gen_field(values->ConstantBufferSize, 0, 5) |
3163 0;
3164
3165 }
3166
3167 #define GEN75_3DSTATE_RAST_MULTISAMPLE_length 0x00000006
3168 #define GEN75_3DSTATE_RAST_MULTISAMPLE_length_bias 0x00000002
3169 #define GEN75_3DSTATE_RAST_MULTISAMPLE_header \
3170 .CommandType = 3, \
3171 .CommandSubType = 3, \
3172 ._3DCommandOpcode = 1, \
3173 ._3DCommandSubOpcode = 14, \
3174 .DwordLength = 4
3175
3176 struct GEN75_3DSTATE_RAST_MULTISAMPLE {
3177 uint32_t CommandType;
3178 uint32_t CommandSubType;
3179 uint32_t _3DCommandOpcode;
3180 uint32_t _3DCommandSubOpcode;
3181 uint32_t DwordLength;
3182 #define NRM_NUMRASTSAMPLES_1 0
3183 #define NRM_NUMRASTSAMPLES_2 1
3184 #define NRM_NUMRASTSAMPLES_4 2
3185 #define NRM_NUMRASTSAMPLES_8 3
3186 #define NRM_NUMRASTSAMPLES_16 4
3187 uint32_t NumberofRasterizationMultisamples;
3188 float Sample3XOffset;
3189 float Sample3YOffset;
3190 float Sample2XOffset;
3191 float Sample2YOffset;
3192 float Sample1XOffset;
3193 float Sample1YOffset;
3194 float Sample0XOffset;
3195 float Sample0YOffset;
3196 float Sample7XOffset;
3197 float Sample7YOffset;
3198 float Sample6XOffset;
3199 float Sample6YOffset;
3200 float Sample5XOffset;
3201 float Sample5YOffset;
3202 float Sample4XOffset;
3203 float Sample4YOffset;
3204 float Sample11XOffset;
3205 float Sample11YOffset;
3206 float Sample10XOffset;
3207 float Sample10YOffset;
3208 float Sample9XOffset;
3209 float Sample9YOffset;
3210 float Sample8XOffset;
3211 float Sample8YOffset;
3212 float Sample15XOffset;
3213 float Sample15YOffset;
3214 float Sample14XOffset;
3215 float Sample14YOffset;
3216 float Sample13XOffset;
3217 float Sample13YOffset;
3218 float Sample12XOffset;
3219 float Sample12YOffset;
3220 };
3221
3222 static inline void
3223 GEN75_3DSTATE_RAST_MULTISAMPLE_pack(__gen_user_data *data, void * restrict dst,
3224 const struct GEN75_3DSTATE_RAST_MULTISAMPLE * restrict values)
3225 {
3226 uint32_t *dw = (uint32_t * restrict) dst;
3227
3228 dw[0] =
3229 __gen_field(values->CommandType, 29, 31) |
3230 __gen_field(values->CommandSubType, 27, 28) |
3231 __gen_field(values->_3DCommandOpcode, 24, 26) |
3232 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3233 __gen_field(values->DwordLength, 0, 7) |
3234 0;
3235
3236 dw[1] =
3237 __gen_field(values->NumberofRasterizationMultisamples, 1, 3) |
3238 0;
3239
3240 dw[2] =
3241 __gen_field(values->Sample3XOffset * (1 << 4), 28, 31) |
3242 __gen_field(values->Sample3YOffset * (1 << 4), 24, 27) |
3243 __gen_field(values->Sample2XOffset * (1 << 4), 20, 23) |
3244 __gen_field(values->Sample2YOffset * (1 << 4), 16, 19) |
3245 __gen_field(values->Sample1XOffset * (1 << 4), 12, 15) |
3246 __gen_field(values->Sample1YOffset * (1 << 4), 8, 11) |
3247 __gen_field(values->Sample0XOffset * (1 << 4), 4, 7) |
3248 __gen_field(values->Sample0YOffset * (1 << 4), 0, 3) |
3249 0;
3250
3251 dw[3] =
3252 __gen_field(values->Sample7XOffset * (1 << 4), 28, 31) |
3253 __gen_field(values->Sample7YOffset * (1 << 4), 24, 27) |
3254 __gen_field(values->Sample6XOffset * (1 << 4), 20, 23) |
3255 __gen_field(values->Sample6YOffset * (1 << 4), 16, 19) |
3256 __gen_field(values->Sample5XOffset * (1 << 4), 12, 15) |
3257 __gen_field(values->Sample5YOffset * (1 << 4), 8, 11) |
3258 __gen_field(values->Sample4XOffset * (1 << 4), 4, 7) |
3259 __gen_field(values->Sample4YOffset * (1 << 4), 0, 3) |
3260 0;
3261
3262 dw[4] =
3263 __gen_field(values->Sample11XOffset * (1 << 4), 28, 31) |
3264 __gen_field(values->Sample11YOffset * (1 << 4), 24, 27) |
3265 __gen_field(values->Sample10XOffset * (1 << 4), 20, 23) |
3266 __gen_field(values->Sample10YOffset * (1 << 4), 16, 19) |
3267 __gen_field(values->Sample9XOffset * (1 << 4), 12, 15) |
3268 __gen_field(values->Sample9YOffset * (1 << 4), 8, 11) |
3269 __gen_field(values->Sample8XOffset * (1 << 4), 4, 7) |
3270 __gen_field(values->Sample8YOffset * (1 << 4), 0, 3) |
3271 0;
3272
3273 dw[5] =
3274 __gen_field(values->Sample15XOffset * (1 << 4), 28, 31) |
3275 __gen_field(values->Sample15YOffset * (1 << 4), 24, 27) |
3276 __gen_field(values->Sample14XOffset * (1 << 4), 20, 23) |
3277 __gen_field(values->Sample14YOffset * (1 << 4), 16, 19) |
3278 __gen_field(values->Sample13XOffset * (1 << 4), 12, 15) |
3279 __gen_field(values->Sample13YOffset * (1 << 4), 8, 11) |
3280 __gen_field(values->Sample12XOffset * (1 << 4), 4, 7) |
3281 __gen_field(values->Sample12YOffset * (1 << 4), 0, 3) |
3282 0;
3283
3284 }
3285
3286 #define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_length_bias 0x00000002
3287 #define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_header\
3288 .CommandType = 3, \
3289 .CommandSubType = 3, \
3290 ._3DCommandOpcode = 1, \
3291 ._3DCommandSubOpcode = 2
3292
3293 struct GEN75_PALETTE_ENTRY {
3294 uint32_t Alpha;
3295 uint32_t Red;
3296 uint32_t Green;
3297 uint32_t Blue;
3298 };
3299
3300 static inline void
3301 GEN75_PALETTE_ENTRY_pack(__gen_user_data *data, void * restrict dst,
3302 const struct GEN75_PALETTE_ENTRY * restrict values)
3303 {
3304 uint32_t *dw = (uint32_t * restrict) dst;
3305
3306 dw[0] =
3307 __gen_field(values->Alpha, 24, 31) |
3308 __gen_field(values->Red, 16, 23) |
3309 __gen_field(values->Green, 8, 15) |
3310 __gen_field(values->Blue, 0, 7) |
3311 0;
3312
3313 }
3314
3315 struct GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0 {
3316 uint32_t CommandType;
3317 uint32_t CommandSubType;
3318 uint32_t _3DCommandOpcode;
3319 uint32_t _3DCommandSubOpcode;
3320 uint32_t DwordLength;
3321 /* variable length fields follow */
3322 };
3323
3324 static inline void
3325 GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_pack(__gen_user_data *data, void * restrict dst,
3326 const struct GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0 * restrict values)
3327 {
3328 uint32_t *dw = (uint32_t * restrict) dst;
3329
3330 dw[0] =
3331 __gen_field(values->CommandType, 29, 31) |
3332 __gen_field(values->CommandSubType, 27, 28) |
3333 __gen_field(values->_3DCommandOpcode, 24, 26) |
3334 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3335 __gen_field(values->DwordLength, 0, 7) |
3336 0;
3337
3338 /* variable length fields follow */
3339 }
3340
3341 #define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_length_bias 0x00000002
3342 #define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_header\
3343 .CommandType = 3, \
3344 .CommandSubType = 3, \
3345 ._3DCommandOpcode = 1, \
3346 ._3DCommandSubOpcode = 12
3347
3348 struct GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1 {
3349 uint32_t CommandType;
3350 uint32_t CommandSubType;
3351 uint32_t _3DCommandOpcode;
3352 uint32_t _3DCommandSubOpcode;
3353 uint32_t DwordLength;
3354 /* variable length fields follow */
3355 };
3356
3357 static inline void
3358 GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_pack(__gen_user_data *data, void * restrict dst,
3359 const struct GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1 * restrict values)
3360 {
3361 uint32_t *dw = (uint32_t * restrict) dst;
3362
3363 dw[0] =
3364 __gen_field(values->CommandType, 29, 31) |
3365 __gen_field(values->CommandSubType, 27, 28) |
3366 __gen_field(values->_3DCommandOpcode, 24, 26) |
3367 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3368 __gen_field(values->DwordLength, 0, 7) |
3369 0;
3370
3371 /* variable length fields follow */
3372 }
3373
3374 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_length 0x00000002
3375 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_length_bias 0x00000002
3376 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_header\
3377 .CommandType = 3, \
3378 .CommandSubType = 3, \
3379 ._3DCommandOpcode = 0, \
3380 ._3DCommandSubOpcode = 45, \
3381 .DwordLength = 0
3382
3383 struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS {
3384 uint32_t CommandType;
3385 uint32_t CommandSubType;
3386 uint32_t _3DCommandOpcode;
3387 uint32_t _3DCommandSubOpcode;
3388 uint32_t DwordLength;
3389 uint32_t PointertoDSSamplerState;
3390 };
3391
3392 static inline void
3393 GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
3394 const struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS * restrict values)
3395 {
3396 uint32_t *dw = (uint32_t * restrict) dst;
3397
3398 dw[0] =
3399 __gen_field(values->CommandType, 29, 31) |
3400 __gen_field(values->CommandSubType, 27, 28) |
3401 __gen_field(values->_3DCommandOpcode, 24, 26) |
3402 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3403 __gen_field(values->DwordLength, 0, 7) |
3404 0;
3405
3406 dw[1] =
3407 __gen_offset(values->PointertoDSSamplerState, 5, 31) |
3408 0;
3409
3410 }
3411
3412 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_length 0x00000002
3413 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_length_bias 0x00000002
3414 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_header\
3415 .CommandType = 3, \
3416 .CommandSubType = 3, \
3417 ._3DCommandOpcode = 0, \
3418 ._3DCommandSubOpcode = 46, \
3419 .DwordLength = 0
3420
3421 struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS {
3422 uint32_t CommandType;
3423 uint32_t CommandSubType;
3424 uint32_t _3DCommandOpcode;
3425 uint32_t _3DCommandSubOpcode;
3426 uint32_t DwordLength;
3427 uint32_t PointertoGSSamplerState;
3428 };
3429
3430 static inline void
3431 GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
3432 const struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS * restrict values)
3433 {
3434 uint32_t *dw = (uint32_t * restrict) dst;
3435
3436 dw[0] =
3437 __gen_field(values->CommandType, 29, 31) |
3438 __gen_field(values->CommandSubType, 27, 28) |
3439 __gen_field(values->_3DCommandOpcode, 24, 26) |
3440 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3441 __gen_field(values->DwordLength, 0, 7) |
3442 0;
3443
3444 dw[1] =
3445 __gen_offset(values->PointertoGSSamplerState, 5, 31) |
3446 0;
3447
3448 }
3449
3450 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_length 0x00000002
3451 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_length_bias 0x00000002
3452 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_header\
3453 .CommandType = 3, \
3454 .CommandSubType = 3, \
3455 ._3DCommandOpcode = 0, \
3456 ._3DCommandSubOpcode = 44, \
3457 .DwordLength = 0
3458
3459 struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS {
3460 uint32_t CommandType;
3461 uint32_t CommandSubType;
3462 uint32_t _3DCommandOpcode;
3463 uint32_t _3DCommandSubOpcode;
3464 uint32_t DwordLength;
3465 uint32_t PointertoHSSamplerState;
3466 };
3467
3468 static inline void
3469 GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
3470 const struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS * restrict values)
3471 {
3472 uint32_t *dw = (uint32_t * restrict) dst;
3473
3474 dw[0] =
3475 __gen_field(values->CommandType, 29, 31) |
3476 __gen_field(values->CommandSubType, 27, 28) |
3477 __gen_field(values->_3DCommandOpcode, 24, 26) |
3478 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3479 __gen_field(values->DwordLength, 0, 7) |
3480 0;
3481
3482 dw[1] =
3483 __gen_offset(values->PointertoHSSamplerState, 5, 31) |
3484 0;
3485
3486 }
3487
3488 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_length 0x00000002
3489 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_length_bias 0x00000002
3490 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_header\
3491 .CommandType = 3, \
3492 .CommandSubType = 3, \
3493 ._3DCommandOpcode = 0, \
3494 ._3DCommandSubOpcode = 47, \
3495 .DwordLength = 0
3496
3497 struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS {
3498 uint32_t CommandType;
3499 uint32_t CommandSubType;
3500 uint32_t _3DCommandOpcode;
3501 uint32_t _3DCommandSubOpcode;
3502 uint32_t DwordLength;
3503 uint32_t PointertoPSSamplerState;
3504 };
3505
3506 static inline void
3507 GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
3508 const struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS * restrict values)
3509 {
3510 uint32_t *dw = (uint32_t * restrict) dst;
3511
3512 dw[0] =
3513 __gen_field(values->CommandType, 29, 31) |
3514 __gen_field(values->CommandSubType, 27, 28) |
3515 __gen_field(values->_3DCommandOpcode, 24, 26) |
3516 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3517 __gen_field(values->DwordLength, 0, 7) |
3518 0;
3519
3520 dw[1] =
3521 __gen_offset(values->PointertoPSSamplerState, 5, 31) |
3522 0;
3523
3524 }
3525
3526 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_length 0x00000002
3527 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_length_bias 0x00000002
3528 #define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_header\
3529 .CommandType = 3, \
3530 .CommandSubType = 3, \
3531 ._3DCommandOpcode = 0, \
3532 ._3DCommandSubOpcode = 43, \
3533 .DwordLength = 0
3534
3535 struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS {
3536 uint32_t CommandType;
3537 uint32_t CommandSubType;
3538 uint32_t _3DCommandOpcode;
3539 uint32_t _3DCommandSubOpcode;
3540 uint32_t DwordLength;
3541 uint32_t PointertoVSSamplerState;
3542 };
3543
3544 static inline void
3545 GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
3546 const struct GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS * restrict values)
3547 {
3548 uint32_t *dw = (uint32_t * restrict) dst;
3549
3550 dw[0] =
3551 __gen_field(values->CommandType, 29, 31) |
3552 __gen_field(values->CommandSubType, 27, 28) |
3553 __gen_field(values->_3DCommandOpcode, 24, 26) |
3554 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3555 __gen_field(values->DwordLength, 0, 7) |
3556 0;
3557
3558 dw[1] =
3559 __gen_offset(values->PointertoVSSamplerState, 5, 31) |
3560 0;
3561
3562 }
3563
3564 #define GEN75_3DSTATE_SAMPLE_MASK_length 0x00000002
3565 #define GEN75_3DSTATE_SAMPLE_MASK_length_bias 0x00000002
3566 #define GEN75_3DSTATE_SAMPLE_MASK_header \
3567 .CommandType = 3, \
3568 .CommandSubType = 3, \
3569 ._3DCommandOpcode = 0, \
3570 ._3DCommandSubOpcode = 24, \
3571 .DwordLength = 0
3572
3573 struct GEN75_3DSTATE_SAMPLE_MASK {
3574 uint32_t CommandType;
3575 uint32_t CommandSubType;
3576 uint32_t _3DCommandOpcode;
3577 uint32_t _3DCommandSubOpcode;
3578 uint32_t DwordLength;
3579 uint32_t SampleMask;
3580 };
3581
3582 static inline void
3583 GEN75_3DSTATE_SAMPLE_MASK_pack(__gen_user_data *data, void * restrict dst,
3584 const struct GEN75_3DSTATE_SAMPLE_MASK * restrict values)
3585 {
3586 uint32_t *dw = (uint32_t * restrict) dst;
3587
3588 dw[0] =
3589 __gen_field(values->CommandType, 29, 31) |
3590 __gen_field(values->CommandSubType, 27, 28) |
3591 __gen_field(values->_3DCommandOpcode, 24, 26) |
3592 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3593 __gen_field(values->DwordLength, 0, 7) |
3594 0;
3595
3596 dw[1] =
3597 __gen_field(values->SampleMask, 0, 7) |
3598 0;
3599
3600 }
3601
3602 #define GEN75_3DSTATE_SBE_length 0x0000000e
3603 #define GEN75_3DSTATE_SBE_length_bias 0x00000002
3604 #define GEN75_3DSTATE_SBE_header \
3605 .CommandType = 3, \
3606 .CommandSubType = 3, \
3607 ._3DCommandOpcode = 0, \
3608 ._3DCommandSubOpcode = 31, \
3609 .DwordLength = 12
3610
3611 struct GEN75_3DSTATE_SBE {
3612 uint32_t CommandType;
3613 uint32_t CommandSubType;
3614 uint32_t _3DCommandOpcode;
3615 uint32_t _3DCommandSubOpcode;
3616 uint32_t DwordLength;
3617 uint32_t AttributeSwizzleControlMode;
3618 uint32_t NumberofSFOutputAttributes;
3619 bool AttributeSwizzleEnable;
3620 #define UPPERLEFT 0
3621 #define LOWERLEFT 1
3622 uint32_t PointSpriteTextureCoordinateOrigin;
3623 uint32_t VertexURBEntryReadLength;
3624 uint32_t VertexURBEntryReadOffset;
3625 bool Attribute2n1ComponentOverrideW;
3626 bool Attribute2n1ComponentOverrideZ;
3627 bool Attribute2n1ComponentOverrideY;
3628 bool Attribute2n1ComponentOverrideX;
3629 #define CONST_0000 0
3630 #define CONST_0001_FLOAT 1
3631 #define CONST_1111_FLOAT 2
3632 #define PRIM_ID 3
3633 uint32_t Attribute2n1ConstantSource;
3634 #define INPUTATTR 0
3635 #define INPUTATTR_FACING 1
3636 #define INPUTATTR_W 2
3637 #define INPUTATTR_FACING_W 3
3638 uint32_t Attribute2n1SwizzleSelect;
3639 uint32_t Attribute2n1SourceAttribute;
3640 bool Attribute2nComponentOverrideW;
3641 bool Attribute2nComponentOverrideZ;
3642 bool Attribute2nComponentOverrideY;
3643 bool Attribute2nComponentOverrideX;
3644 #define CONST_0000 0
3645 #define CONST_0001_FLOAT 1
3646 #define CONST_1111_FLOAT 2
3647 #define PRIM_ID 3
3648 uint32_t Attribute2nConstantSource;
3649 #define INPUTATTR 0
3650 #define INPUTATTR_FACING 1
3651 #define INPUTATTR_W 2
3652 #define INPUTATTR_FACING_W 3
3653 uint32_t Attribute2nSwizzleSelect;
3654 uint32_t Attribute2nSourceAttribute;
3655 uint32_t PointSpriteTextureCoordinateEnable;
3656 uint32_t ConstantInterpolationEnable310;
3657 uint32_t Attribute7WrapShortestEnables;
3658 uint32_t Attribute6WrapShortestEnables;
3659 uint32_t Attribute5WrapShortestEnables;
3660 uint32_t Attribute4WrapShortestEnables;
3661 uint32_t Attribute3WrapShortestEnables;
3662 uint32_t Attribute2WrapShortestEnables;
3663 uint32_t Attribute1WrapShortestEnables;
3664 uint32_t Attribute0WrapShortestEnables;
3665 uint32_t Attribute15WrapShortestEnables;
3666 uint32_t Attribute14WrapShortestEnables;
3667 uint32_t Attribute13WrapShortestEnables;
3668 uint32_t Attribute12WrapShortestEnables;
3669 uint32_t Attribute11WrapShortestEnables;
3670 uint32_t Attribute10WrapShortestEnables;
3671 uint32_t Attribute9WrapShortestEnables;
3672 uint32_t Attribute8WrapShortestEnables;
3673 };
3674
3675 static inline void
3676 GEN75_3DSTATE_SBE_pack(__gen_user_data *data, void * restrict dst,
3677 const struct GEN75_3DSTATE_SBE * restrict values)
3678 {
3679 uint32_t *dw = (uint32_t * restrict) dst;
3680
3681 dw[0] =
3682 __gen_field(values->CommandType, 29, 31) |
3683 __gen_field(values->CommandSubType, 27, 28) |
3684 __gen_field(values->_3DCommandOpcode, 24, 26) |
3685 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3686 __gen_field(values->DwordLength, 0, 7) |
3687 0;
3688
3689 dw[1] =
3690 __gen_field(values->AttributeSwizzleControlMode, 28, 28) |
3691 __gen_field(values->NumberofSFOutputAttributes, 22, 27) |
3692 __gen_field(values->AttributeSwizzleEnable, 21, 21) |
3693 __gen_field(values->PointSpriteTextureCoordinateOrigin, 20, 20) |
3694 __gen_field(values->VertexURBEntryReadLength, 11, 15) |
3695 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
3696 0;
3697
3698 dw[2] =
3699 __gen_field(values->Attribute2n1ComponentOverrideW, 31, 31) |
3700 __gen_field(values->Attribute2n1ComponentOverrideZ, 30, 30) |
3701 __gen_field(values->Attribute2n1ComponentOverrideY, 29, 29) |
3702 __gen_field(values->Attribute2n1ComponentOverrideX, 28, 28) |
3703 __gen_field(values->Attribute2n1ConstantSource, 25, 26) |
3704 __gen_field(values->Attribute2n1SwizzleSelect, 22, 23) |
3705 __gen_field(values->Attribute2n1SourceAttribute, 16, 20) |
3706 __gen_field(values->Attribute2nComponentOverrideW, 15, 15) |
3707 __gen_field(values->Attribute2nComponentOverrideZ, 14, 14) |
3708 __gen_field(values->Attribute2nComponentOverrideY, 13, 13) |
3709 __gen_field(values->Attribute2nComponentOverrideX, 12, 12) |
3710 __gen_field(values->Attribute2nConstantSource, 9, 10) |
3711 __gen_field(values->Attribute2nSwizzleSelect, 6, 7) |
3712 __gen_field(values->Attribute2nSourceAttribute, 0, 4) |
3713 0;
3714
3715 dw[10] =
3716 __gen_field(values->PointSpriteTextureCoordinateEnable, 0, 31) |
3717 0;
3718
3719 dw[11] =
3720 __gen_field(values->ConstantInterpolationEnable310, 0, 31) |
3721 0;
3722
3723 dw[12] =
3724 __gen_field(values->Attribute7WrapShortestEnables, 28, 31) |
3725 __gen_field(values->Attribute6WrapShortestEnables, 24, 27) |
3726 __gen_field(values->Attribute5WrapShortestEnables, 20, 23) |
3727 __gen_field(values->Attribute4WrapShortestEnables, 16, 19) |
3728 __gen_field(values->Attribute3WrapShortestEnables, 12, 15) |
3729 __gen_field(values->Attribute2WrapShortestEnables, 8, 11) |
3730 __gen_field(values->Attribute1WrapShortestEnables, 4, 7) |
3731 __gen_field(values->Attribute0WrapShortestEnables, 0, 3) |
3732 0;
3733
3734 dw[13] =
3735 __gen_field(values->Attribute15WrapShortestEnables, 28, 31) |
3736 __gen_field(values->Attribute14WrapShortestEnables, 24, 27) |
3737 __gen_field(values->Attribute13WrapShortestEnables, 20, 23) |
3738 __gen_field(values->Attribute12WrapShortestEnables, 16, 19) |
3739 __gen_field(values->Attribute11WrapShortestEnables, 12, 15) |
3740 __gen_field(values->Attribute10WrapShortestEnables, 8, 11) |
3741 __gen_field(values->Attribute9WrapShortestEnables, 4, 7) |
3742 __gen_field(values->Attribute8WrapShortestEnables, 0, 3) |
3743 0;
3744
3745 }
3746
3747 #define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_length 0x00000002
3748 #define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_length_bias 0x00000002
3749 #define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_header\
3750 .CommandType = 3, \
3751 .CommandSubType = 3, \
3752 ._3DCommandOpcode = 0, \
3753 ._3DCommandSubOpcode = 15, \
3754 .DwordLength = 0
3755
3756 struct GEN75_3DSTATE_SCISSOR_STATE_POINTERS {
3757 uint32_t CommandType;
3758 uint32_t CommandSubType;
3759 uint32_t _3DCommandOpcode;
3760 uint32_t _3DCommandSubOpcode;
3761 uint32_t DwordLength;
3762 uint32_t ScissorRectPointer;
3763 };
3764
3765 static inline void
3766 GEN75_3DSTATE_SCISSOR_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
3767 const struct GEN75_3DSTATE_SCISSOR_STATE_POINTERS * restrict values)
3768 {
3769 uint32_t *dw = (uint32_t * restrict) dst;
3770
3771 dw[0] =
3772 __gen_field(values->CommandType, 29, 31) |
3773 __gen_field(values->CommandSubType, 27, 28) |
3774 __gen_field(values->_3DCommandOpcode, 24, 26) |
3775 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3776 __gen_field(values->DwordLength, 0, 7) |
3777 0;
3778
3779 dw[1] =
3780 __gen_offset(values->ScissorRectPointer, 5, 31) |
3781 0;
3782
3783 }
3784
3785 #define GEN75_3DSTATE_SF_length 0x00000007
3786 #define GEN75_3DSTATE_SF_length_bias 0x00000002
3787 #define GEN75_3DSTATE_SF_header \
3788 .CommandType = 3, \
3789 .CommandSubType = 3, \
3790 ._3DCommandOpcode = 0, \
3791 ._3DCommandSubOpcode = 19, \
3792 .DwordLength = 5
3793
3794 struct GEN75_3DSTATE_SF {
3795 uint32_t CommandType;
3796 uint32_t CommandSubType;
3797 uint32_t _3DCommandOpcode;
3798 uint32_t _3DCommandSubOpcode;
3799 uint32_t DwordLength;
3800 #define D32_FLOAT_S8X24_UINT 0
3801 #define D32_FLOAT 1
3802 #define D24_UNORM_S8_UINT 2
3803 #define D24_UNORM_X8_UINT 3
3804 #define D16_UNORM 5
3805 uint32_t DepthBufferSurfaceFormat;
3806 bool LegacyGlobalDepthBiasEnable;
3807 bool StatisticsEnable;
3808 bool GlobalDepthOffsetEnableSolid;
3809 bool GlobalDepthOffsetEnableWireframe;
3810 bool GlobalDepthOffsetEnablePoint;
3811 #define RASTER_SOLID 0
3812 #define RASTER_WIREFRAME 1
3813 #define RASTER_POINT 2
3814 uint32_t FrontFaceFillMode;
3815 #define RASTER_SOLID 0
3816 #define RASTER_WIREFRAME 1
3817 #define RASTER_POINT 2
3818 uint32_t BackFaceFillMode;
3819 bool ViewTransformEnable;
3820 uint32_t FrontWinding;
3821 bool AntiAliasingEnable;
3822 #define CULLMODE_BOTH 0
3823 #define CULLMODE_NONE 1
3824 #define CULLMODE_FRONT 2
3825 #define CULLMODE_BACK 3
3826 uint32_t CullMode;
3827 float LineWidth;
3828 uint32_t LineEndCapAntialiasingRegionWidth;
3829 bool LineStippleEnable;
3830 bool ScissorRectangleEnable;
3831 bool RTIndependentRasterizationEnable;
3832 uint32_t MultisampleRasterizationMode;
3833 bool LastPixelEnable;
3834 #define Vertex0 0
3835 #define Vertex1 1
3836 #define Vertex2 2
3837 uint32_t TriangleStripListProvokingVertexSelect;
3838 uint32_t LineStripListProvokingVertexSelect;
3839 #define Vertex0 0
3840 #define Vertex1 1
3841 #define Vertex2 2
3842 uint32_t TriangleFanProvokingVertexSelect;
3843 #define AALINEDISTANCE_TRUE 1
3844 uint32_t AALineDistanceMode;
3845 uint32_t VertexSubPixelPrecisionSelect;
3846 uint32_t UsePointWidthState;
3847 float PointWidth;
3848 uint32_t GlobalDepthOffsetConstant;
3849 uint32_t GlobalDepthOffsetScale;
3850 uint32_t GlobalDepthOffsetClamp;
3851 };
3852
3853 static inline void
3854 GEN75_3DSTATE_SF_pack(__gen_user_data *data, void * restrict dst,
3855 const struct GEN75_3DSTATE_SF * restrict values)
3856 {
3857 uint32_t *dw = (uint32_t * restrict) dst;
3858
3859 dw[0] =
3860 __gen_field(values->CommandType, 29, 31) |
3861 __gen_field(values->CommandSubType, 27, 28) |
3862 __gen_field(values->_3DCommandOpcode, 24, 26) |
3863 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3864 __gen_field(values->DwordLength, 0, 7) |
3865 0;
3866
3867 dw[1] =
3868 __gen_field(values->DepthBufferSurfaceFormat, 12, 14) |
3869 __gen_field(values->LegacyGlobalDepthBiasEnable, 11, 11) |
3870 __gen_field(values->StatisticsEnable, 10, 10) |
3871 __gen_field(values->GlobalDepthOffsetEnableSolid, 9, 9) |
3872 __gen_field(values->GlobalDepthOffsetEnableWireframe, 8, 8) |
3873 __gen_field(values->GlobalDepthOffsetEnablePoint, 7, 7) |
3874 __gen_field(values->FrontFaceFillMode, 5, 6) |
3875 __gen_field(values->BackFaceFillMode, 3, 4) |
3876 __gen_field(values->ViewTransformEnable, 1, 1) |
3877 __gen_field(values->FrontWinding, 0, 0) |
3878 0;
3879
3880 dw[2] =
3881 __gen_field(values->AntiAliasingEnable, 31, 31) |
3882 __gen_field(values->CullMode, 29, 30) |
3883 __gen_field(values->LineWidth * (1 << 7), 18, 27) |
3884 __gen_field(values->LineEndCapAntialiasingRegionWidth, 16, 17) |
3885 __gen_field(values->LineStippleEnable, 14, 14) |
3886 __gen_field(values->ScissorRectangleEnable, 11, 11) |
3887 __gen_field(values->RTIndependentRasterizationEnable, 10, 10) |
3888 __gen_field(values->MultisampleRasterizationMode, 8, 9) |
3889 0;
3890
3891 dw[3] =
3892 __gen_field(values->LastPixelEnable, 31, 31) |
3893 __gen_field(values->TriangleStripListProvokingVertexSelect, 29, 30) |
3894 __gen_field(values->LineStripListProvokingVertexSelect, 27, 28) |
3895 __gen_field(values->TriangleFanProvokingVertexSelect, 25, 26) |
3896 __gen_field(values->AALineDistanceMode, 14, 14) |
3897 __gen_field(values->VertexSubPixelPrecisionSelect, 12, 12) |
3898 __gen_field(values->UsePointWidthState, 11, 11) |
3899 __gen_field(values->PointWidth * (1 << 3), 0, 10) |
3900 0;
3901
3902 dw[4] =
3903 __gen_field(values->GlobalDepthOffsetConstant, 0, 31) |
3904 0;
3905
3906 dw[5] =
3907 __gen_field(values->GlobalDepthOffsetScale, 0, 31) |
3908 0;
3909
3910 dw[6] =
3911 __gen_field(values->GlobalDepthOffsetClamp, 0, 31) |
3912 0;
3913
3914 }
3915
3916 #define GEN75_3DSTATE_SO_BUFFER_length 0x00000004
3917 #define GEN75_3DSTATE_SO_BUFFER_length_bias 0x00000002
3918 #define GEN75_3DSTATE_SO_BUFFER_header \
3919 .CommandType = 3, \
3920 .CommandSubType = 3, \
3921 ._3DCommandOpcode = 1, \
3922 ._3DCommandSubOpcode = 24, \
3923 .DwordLength = 2
3924
3925 struct GEN75_3DSTATE_SO_BUFFER {
3926 uint32_t CommandType;
3927 uint32_t CommandSubType;
3928 uint32_t _3DCommandOpcode;
3929 uint32_t _3DCommandSubOpcode;
3930 uint32_t DwordLength;
3931 uint32_t SOBufferIndex;
3932 struct GEN75_MEMORY_OBJECT_CONTROL_STATE SOBufferObjectControlState;
3933 uint32_t SurfacePitch;
3934 __gen_address_type SurfaceBaseAddress;
3935 __gen_address_type SurfaceEndAddress;
3936 };
3937
3938 static inline void
3939 GEN75_3DSTATE_SO_BUFFER_pack(__gen_user_data *data, void * restrict dst,
3940 const struct GEN75_3DSTATE_SO_BUFFER * restrict values)
3941 {
3942 uint32_t *dw = (uint32_t * restrict) dst;
3943
3944 dw[0] =
3945 __gen_field(values->CommandType, 29, 31) |
3946 __gen_field(values->CommandSubType, 27, 28) |
3947 __gen_field(values->_3DCommandOpcode, 24, 26) |
3948 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3949 __gen_field(values->DwordLength, 0, 7) |
3950 0;
3951
3952 uint32_t dw_SOBufferObjectControlState;
3953 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SOBufferObjectControlState, &values->SOBufferObjectControlState);
3954 dw[1] =
3955 __gen_field(values->SOBufferIndex, 29, 30) |
3956 __gen_field(dw_SOBufferObjectControlState, 25, 28) |
3957 __gen_field(values->SurfacePitch, 0, 11) |
3958 0;
3959
3960 uint32_t dw2 =
3961 0;
3962
3963 dw[2] =
3964 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
3965
3966 uint32_t dw3 =
3967 0;
3968
3969 dw[3] =
3970 __gen_combine_address(data, &dw[3], values->SurfaceEndAddress, dw3);
3971
3972 }
3973
3974 #define GEN75_3DSTATE_SO_DECL_LIST_length_bias 0x00000002
3975 #define GEN75_3DSTATE_SO_DECL_LIST_header \
3976 .CommandType = 3, \
3977 .CommandSubType = 3, \
3978 ._3DCommandOpcode = 1, \
3979 ._3DCommandSubOpcode = 23
3980
3981 struct GEN75_SO_DECL {
3982 uint32_t OutputBufferSlot;
3983 uint32_t HoleFlag;
3984 uint32_t RegisterIndex;
3985 uint32_t ComponentMask;
3986 };
3987
3988 static inline void
3989 GEN75_SO_DECL_pack(__gen_user_data *data, void * restrict dst,
3990 const struct GEN75_SO_DECL * restrict values)
3991 {
3992 uint32_t *dw = (uint32_t * restrict) dst;
3993
3994 dw[0] =
3995 __gen_field(values->OutputBufferSlot, 12, 13) |
3996 __gen_field(values->HoleFlag, 11, 11) |
3997 __gen_field(values->RegisterIndex, 4, 9) |
3998 __gen_field(values->ComponentMask, 0, 3) |
3999 0;
4000
4001 }
4002
4003 struct GEN75_SO_DECL_ENTRY {
4004 struct GEN75_SO_DECL Stream3Decl;
4005 struct GEN75_SO_DECL Stream2Decl;
4006 struct GEN75_SO_DECL Stream1Decl;
4007 struct GEN75_SO_DECL Stream0Decl;
4008 };
4009
4010 static inline void
4011 GEN75_SO_DECL_ENTRY_pack(__gen_user_data *data, void * restrict dst,
4012 const struct GEN75_SO_DECL_ENTRY * restrict values)
4013 {
4014 uint32_t *dw = (uint32_t * restrict) dst;
4015
4016 uint32_t dw_Stream3Decl;
4017 GEN75_SO_DECL_pack(data, &dw_Stream3Decl, &values->Stream3Decl);
4018 uint32_t dw_Stream2Decl;
4019 GEN75_SO_DECL_pack(data, &dw_Stream2Decl, &values->Stream2Decl);
4020 uint32_t dw_Stream1Decl;
4021 GEN75_SO_DECL_pack(data, &dw_Stream1Decl, &values->Stream1Decl);
4022 uint32_t dw_Stream0Decl;
4023 GEN75_SO_DECL_pack(data, &dw_Stream0Decl, &values->Stream0Decl);
4024 uint64_t qw0 =
4025 __gen_field(dw_Stream3Decl, 48, 63) |
4026 __gen_field(dw_Stream2Decl, 32, 47) |
4027 __gen_field(dw_Stream1Decl, 16, 31) |
4028 __gen_field(dw_Stream0Decl, 0, 15) |
4029 0;
4030
4031 dw[0] = qw0;
4032 dw[1] = qw0 >> 32;
4033
4034 }
4035
4036 struct GEN75_3DSTATE_SO_DECL_LIST {
4037 uint32_t CommandType;
4038 uint32_t CommandSubType;
4039 uint32_t _3DCommandOpcode;
4040 uint32_t _3DCommandSubOpcode;
4041 uint32_t DwordLength;
4042 uint32_t StreamtoBufferSelects3;
4043 uint32_t StreamtoBufferSelects2;
4044 uint32_t StreamtoBufferSelects1;
4045 uint32_t StreamtoBufferSelects0;
4046 uint32_t NumEntries3;
4047 uint32_t NumEntries2;
4048 uint32_t NumEntries1;
4049 uint32_t NumEntries0;
4050 /* variable length fields follow */
4051 };
4052
4053 static inline void
4054 GEN75_3DSTATE_SO_DECL_LIST_pack(__gen_user_data *data, void * restrict dst,
4055 const struct GEN75_3DSTATE_SO_DECL_LIST * restrict values)
4056 {
4057 uint32_t *dw = (uint32_t * restrict) dst;
4058
4059 dw[0] =
4060 __gen_field(values->CommandType, 29, 31) |
4061 __gen_field(values->CommandSubType, 27, 28) |
4062 __gen_field(values->_3DCommandOpcode, 24, 26) |
4063 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4064 __gen_field(values->DwordLength, 0, 8) |
4065 0;
4066
4067 dw[1] =
4068 __gen_field(values->StreamtoBufferSelects3, 12, 15) |
4069 __gen_field(values->StreamtoBufferSelects2, 8, 11) |
4070 __gen_field(values->StreamtoBufferSelects1, 4, 7) |
4071 __gen_field(values->StreamtoBufferSelects0, 0, 3) |
4072 0;
4073
4074 dw[2] =
4075 __gen_field(values->NumEntries3, 24, 31) |
4076 __gen_field(values->NumEntries2, 16, 23) |
4077 __gen_field(values->NumEntries1, 8, 15) |
4078 __gen_field(values->NumEntries0, 0, 7) |
4079 0;
4080
4081 /* variable length fields follow */
4082 }
4083
4084 #define GEN75_3DSTATE_STENCIL_BUFFER_length 0x00000003
4085 #define GEN75_3DSTATE_STENCIL_BUFFER_length_bias 0x00000002
4086 #define GEN75_3DSTATE_STENCIL_BUFFER_header \
4087 .CommandType = 3, \
4088 .CommandSubType = 3, \
4089 ._3DCommandOpcode = 0, \
4090 ._3DCommandSubOpcode = 6, \
4091 .DwordLength = 1
4092
4093 struct GEN75_3DSTATE_STENCIL_BUFFER {
4094 uint32_t CommandType;
4095 uint32_t CommandSubType;
4096 uint32_t _3DCommandOpcode;
4097 uint32_t _3DCommandSubOpcode;
4098 uint32_t DwordLength;
4099 uint32_t StencilBufferEnable;
4100 struct GEN75_MEMORY_OBJECT_CONTROL_STATE StencilBufferObjectControlState;
4101 uint32_t SurfacePitch;
4102 __gen_address_type SurfaceBaseAddress;
4103 };
4104
4105 static inline void
4106 GEN75_3DSTATE_STENCIL_BUFFER_pack(__gen_user_data *data, void * restrict dst,
4107 const struct GEN75_3DSTATE_STENCIL_BUFFER * restrict values)
4108 {
4109 uint32_t *dw = (uint32_t * restrict) dst;
4110
4111 dw[0] =
4112 __gen_field(values->CommandType, 29, 31) |
4113 __gen_field(values->CommandSubType, 27, 28) |
4114 __gen_field(values->_3DCommandOpcode, 24, 26) |
4115 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4116 __gen_field(values->DwordLength, 0, 7) |
4117 0;
4118
4119 uint32_t dw_StencilBufferObjectControlState;
4120 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StencilBufferObjectControlState, &values->StencilBufferObjectControlState);
4121 dw[1] =
4122 __gen_field(values->StencilBufferEnable, 31, 31) |
4123 __gen_field(dw_StencilBufferObjectControlState, 25, 28) |
4124 __gen_field(values->SurfacePitch, 0, 16) |
4125 0;
4126
4127 uint32_t dw2 =
4128 0;
4129
4130 dw[2] =
4131 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
4132
4133 }
4134
4135 #define GEN75_3DSTATE_STREAMOUT_length 0x00000003
4136 #define GEN75_3DSTATE_STREAMOUT_length_bias 0x00000002
4137 #define GEN75_3DSTATE_STREAMOUT_header \
4138 .CommandType = 3, \
4139 .CommandSubType = 3, \
4140 ._3DCommandOpcode = 0, \
4141 ._3DCommandSubOpcode = 30, \
4142 .DwordLength = 1
4143
4144 struct GEN75_3DSTATE_STREAMOUT {
4145 uint32_t CommandType;
4146 uint32_t CommandSubType;
4147 uint32_t _3DCommandOpcode;
4148 uint32_t _3DCommandSubOpcode;
4149 uint32_t DwordLength;
4150 uint32_t SOFunctionEnable;
4151 uint32_t RenderingDisable;
4152 uint32_t RenderStreamSelect;
4153 #define LEADING 0
4154 #define TRAILING 1
4155 uint32_t ReorderMode;
4156 bool SOStatisticsEnable;
4157 uint32_t SOBufferEnable3;
4158 uint32_t SOBufferEnable2;
4159 uint32_t SOBufferEnable1;
4160 uint32_t SOBufferEnable0;
4161 uint32_t Stream3VertexReadOffset;
4162 uint32_t Stream3VertexReadLength;
4163 uint32_t Stream2VertexReadOffset;
4164 uint32_t Stream2VertexReadLength;
4165 uint32_t Stream1VertexReadOffset;
4166 uint32_t Stream1VertexReadLength;
4167 uint32_t Stream0VertexReadOffset;
4168 uint32_t Stream0VertexReadLength;
4169 };
4170
4171 static inline void
4172 GEN75_3DSTATE_STREAMOUT_pack(__gen_user_data *data, void * restrict dst,
4173 const struct GEN75_3DSTATE_STREAMOUT * restrict values)
4174 {
4175 uint32_t *dw = (uint32_t * restrict) dst;
4176
4177 dw[0] =
4178 __gen_field(values->CommandType, 29, 31) |
4179 __gen_field(values->CommandSubType, 27, 28) |
4180 __gen_field(values->_3DCommandOpcode, 24, 26) |
4181 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4182 __gen_field(values->DwordLength, 0, 7) |
4183 0;
4184
4185 dw[1] =
4186 __gen_field(values->SOFunctionEnable, 31, 31) |
4187 __gen_field(values->RenderingDisable, 30, 30) |
4188 __gen_field(values->RenderStreamSelect, 27, 28) |
4189 __gen_field(values->ReorderMode, 26, 26) |
4190 __gen_field(values->SOStatisticsEnable, 25, 25) |
4191 __gen_field(values->SOBufferEnable3, 11, 11) |
4192 __gen_field(values->SOBufferEnable2, 10, 10) |
4193 __gen_field(values->SOBufferEnable1, 9, 9) |
4194 __gen_field(values->SOBufferEnable0, 8, 8) |
4195 0;
4196
4197 dw[2] =
4198 __gen_field(values->Stream3VertexReadOffset, 29, 29) |
4199 __gen_field(values->Stream3VertexReadLength, 24, 28) |
4200 __gen_field(values->Stream2VertexReadOffset, 21, 21) |
4201 __gen_field(values->Stream2VertexReadLength, 16, 20) |
4202 __gen_field(values->Stream1VertexReadOffset, 13, 13) |
4203 __gen_field(values->Stream1VertexReadLength, 8, 12) |
4204 __gen_field(values->Stream0VertexReadOffset, 5, 5) |
4205 __gen_field(values->Stream0VertexReadLength, 0, 4) |
4206 0;
4207
4208 }
4209
4210 #define GEN75_3DSTATE_TE_length 0x00000004
4211 #define GEN75_3DSTATE_TE_length_bias 0x00000002
4212 #define GEN75_3DSTATE_TE_header \
4213 .CommandType = 3, \
4214 .CommandSubType = 3, \
4215 ._3DCommandOpcode = 0, \
4216 ._3DCommandSubOpcode = 28, \
4217 .DwordLength = 2
4218
4219 struct GEN75_3DSTATE_TE {
4220 uint32_t CommandType;
4221 uint32_t CommandSubType;
4222 uint32_t _3DCommandOpcode;
4223 uint32_t _3DCommandSubOpcode;
4224 uint32_t DwordLength;
4225 #define INTEGER 0
4226 #define ODD_FRACTIONAL 1
4227 #define EVEN_FRACTIONAL 2
4228 uint32_t Partitioning;
4229 #define POINT 0
4230 #define OUTPUT_LINE 1
4231 #define OUTPUT_TRI_CW 2
4232 #define OUTPUT_TRI_CCW 3
4233 uint32_t OutputTopology;
4234 #define QUAD 0
4235 #define TRI 1
4236 #define ISOLINE 2
4237 uint32_t TEDomain;
4238 #define HW_TESS 0
4239 #define SW_TESS 1
4240 uint32_t TEMode;
4241 bool TEEnable;
4242 float MaximumTessellationFactorOdd;
4243 float MaximumTessellationFactorNotOdd;
4244 };
4245
4246 static inline void
4247 GEN75_3DSTATE_TE_pack(__gen_user_data *data, void * restrict dst,
4248 const struct GEN75_3DSTATE_TE * restrict values)
4249 {
4250 uint32_t *dw = (uint32_t * restrict) dst;
4251
4252 dw[0] =
4253 __gen_field(values->CommandType, 29, 31) |
4254 __gen_field(values->CommandSubType, 27, 28) |
4255 __gen_field(values->_3DCommandOpcode, 24, 26) |
4256 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4257 __gen_field(values->DwordLength, 0, 7) |
4258 0;
4259
4260 dw[1] =
4261 __gen_field(values->Partitioning, 12, 13) |
4262 __gen_field(values->OutputTopology, 8, 9) |
4263 __gen_field(values->TEDomain, 4, 5) |
4264 __gen_field(values->TEMode, 1, 2) |
4265 __gen_field(values->TEEnable, 0, 0) |
4266 0;
4267
4268 dw[2] =
4269 __gen_float(values->MaximumTessellationFactorOdd) |
4270 0;
4271
4272 dw[3] =
4273 __gen_float(values->MaximumTessellationFactorNotOdd) |
4274 0;
4275
4276 }
4277
4278 #define GEN75_3DSTATE_URB_DS_length 0x00000002
4279 #define GEN75_3DSTATE_URB_DS_length_bias 0x00000002
4280 #define GEN75_3DSTATE_URB_DS_header \
4281 .CommandType = 3, \
4282 .CommandSubType = 3, \
4283 ._3DCommandOpcode = 0, \
4284 ._3DCommandSubOpcode = 50, \
4285 .DwordLength = 0
4286
4287 struct GEN75_3DSTATE_URB_DS {
4288 uint32_t CommandType;
4289 uint32_t CommandSubType;
4290 uint32_t _3DCommandOpcode;
4291 uint32_t _3DCommandSubOpcode;
4292 uint32_t DwordLength;
4293 uint32_t DSURBStartingAddress;
4294 uint32_t DSURBEntryAllocationSize;
4295 uint32_t DSNumberofURBEntries;
4296 };
4297
4298 static inline void
4299 GEN75_3DSTATE_URB_DS_pack(__gen_user_data *data, void * restrict dst,
4300 const struct GEN75_3DSTATE_URB_DS * restrict values)
4301 {
4302 uint32_t *dw = (uint32_t * restrict) dst;
4303
4304 dw[0] =
4305 __gen_field(values->CommandType, 29, 31) |
4306 __gen_field(values->CommandSubType, 27, 28) |
4307 __gen_field(values->_3DCommandOpcode, 24, 26) |
4308 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4309 __gen_field(values->DwordLength, 0, 7) |
4310 0;
4311
4312 dw[1] =
4313 __gen_field(values->DSURBStartingAddress, 25, 30) |
4314 __gen_field(values->DSURBEntryAllocationSize, 16, 24) |
4315 __gen_field(values->DSNumberofURBEntries, 0, 15) |
4316 0;
4317
4318 }
4319
4320 #define GEN75_3DSTATE_URB_GS_length 0x00000002
4321 #define GEN75_3DSTATE_URB_GS_length_bias 0x00000002
4322 #define GEN75_3DSTATE_URB_GS_header \
4323 .CommandType = 3, \
4324 .CommandSubType = 3, \
4325 ._3DCommandOpcode = 0, \
4326 ._3DCommandSubOpcode = 51, \
4327 .DwordLength = 0
4328
4329 struct GEN75_3DSTATE_URB_GS {
4330 uint32_t CommandType;
4331 uint32_t CommandSubType;
4332 uint32_t _3DCommandOpcode;
4333 uint32_t _3DCommandSubOpcode;
4334 uint32_t DwordLength;
4335 uint32_t GSURBStartingAddress;
4336 uint32_t GSURBEntryAllocationSize;
4337 uint32_t GSNumberofURBEntries;
4338 };
4339
4340 static inline void
4341 GEN75_3DSTATE_URB_GS_pack(__gen_user_data *data, void * restrict dst,
4342 const struct GEN75_3DSTATE_URB_GS * restrict values)
4343 {
4344 uint32_t *dw = (uint32_t * restrict) dst;
4345
4346 dw[0] =
4347 __gen_field(values->CommandType, 29, 31) |
4348 __gen_field(values->CommandSubType, 27, 28) |
4349 __gen_field(values->_3DCommandOpcode, 24, 26) |
4350 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4351 __gen_field(values->DwordLength, 0, 7) |
4352 0;
4353
4354 dw[1] =
4355 __gen_field(values->GSURBStartingAddress, 25, 30) |
4356 __gen_field(values->GSURBEntryAllocationSize, 16, 24) |
4357 __gen_field(values->GSNumberofURBEntries, 0, 15) |
4358 0;
4359
4360 }
4361
4362 #define GEN75_3DSTATE_URB_HS_length 0x00000002
4363 #define GEN75_3DSTATE_URB_HS_length_bias 0x00000002
4364 #define GEN75_3DSTATE_URB_HS_header \
4365 .CommandType = 3, \
4366 .CommandSubType = 3, \
4367 ._3DCommandOpcode = 0, \
4368 ._3DCommandSubOpcode = 49, \
4369 .DwordLength = 0
4370
4371 struct GEN75_3DSTATE_URB_HS {
4372 uint32_t CommandType;
4373 uint32_t CommandSubType;
4374 uint32_t _3DCommandOpcode;
4375 uint32_t _3DCommandSubOpcode;
4376 uint32_t DwordLength;
4377 uint32_t HSURBStartingAddress;
4378 uint32_t HSURBEntryAllocationSize;
4379 uint32_t HSNumberofURBEntries;
4380 };
4381
4382 static inline void
4383 GEN75_3DSTATE_URB_HS_pack(__gen_user_data *data, void * restrict dst,
4384 const struct GEN75_3DSTATE_URB_HS * restrict values)
4385 {
4386 uint32_t *dw = (uint32_t * restrict) dst;
4387
4388 dw[0] =
4389 __gen_field(values->CommandType, 29, 31) |
4390 __gen_field(values->CommandSubType, 27, 28) |
4391 __gen_field(values->_3DCommandOpcode, 24, 26) |
4392 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4393 __gen_field(values->DwordLength, 0, 7) |
4394 0;
4395
4396 dw[1] =
4397 __gen_field(values->HSURBStartingAddress, 25, 30) |
4398 __gen_field(values->HSURBEntryAllocationSize, 16, 24) |
4399 __gen_field(values->HSNumberofURBEntries, 0, 15) |
4400 0;
4401
4402 }
4403
4404 #define GEN75_3DSTATE_VERTEX_BUFFERS_length_bias 0x00000002
4405 #define GEN75_3DSTATE_VERTEX_BUFFERS_header \
4406 .CommandType = 3, \
4407 .CommandSubType = 3, \
4408 ._3DCommandOpcode = 0, \
4409 ._3DCommandSubOpcode = 8
4410
4411 struct GEN75_VERTEX_BUFFER_STATE {
4412 uint32_t VertexBufferIndex;
4413 #define VERTEXDATA 0
4414 #define INSTANCEDATA 1
4415 uint32_t BufferAccessType;
4416 struct GEN75_MEMORY_OBJECT_CONTROL_STATE VertexBufferMemoryObjectControlState;
4417 uint32_t AddressModifyEnable;
4418 bool NullVertexBuffer;
4419 uint32_t VertexFetchInvalidate;
4420 uint32_t BufferPitch;
4421 __gen_address_type BufferStartingAddress;
4422 __gen_address_type EndAddress;
4423 uint32_t InstanceDataStepRate;
4424 };
4425
4426 static inline void
4427 GEN75_VERTEX_BUFFER_STATE_pack(__gen_user_data *data, void * restrict dst,
4428 const struct GEN75_VERTEX_BUFFER_STATE * restrict values)
4429 {
4430 uint32_t *dw = (uint32_t * restrict) dst;
4431
4432 uint32_t dw_VertexBufferMemoryObjectControlState;
4433 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_VertexBufferMemoryObjectControlState, &values->VertexBufferMemoryObjectControlState);
4434 dw[0] =
4435 __gen_field(values->VertexBufferIndex, 26, 31) |
4436 __gen_field(values->BufferAccessType, 20, 20) |
4437 __gen_field(dw_VertexBufferMemoryObjectControlState, 16, 19) |
4438 __gen_field(values->AddressModifyEnable, 14, 14) |
4439 __gen_field(values->NullVertexBuffer, 13, 13) |
4440 __gen_field(values->VertexFetchInvalidate, 12, 12) |
4441 __gen_field(values->BufferPitch, 0, 11) |
4442 0;
4443
4444 uint32_t dw1 =
4445 0;
4446
4447 dw[1] =
4448 __gen_combine_address(data, &dw[1], values->BufferStartingAddress, dw1);
4449
4450 uint32_t dw2 =
4451 0;
4452
4453 dw[2] =
4454 __gen_combine_address(data, &dw[2], values->EndAddress, dw2);
4455
4456 dw[3] =
4457 __gen_field(values->InstanceDataStepRate, 0, 31) |
4458 0;
4459
4460 }
4461
4462 struct GEN75_3DSTATE_VERTEX_BUFFERS {
4463 uint32_t CommandType;
4464 uint32_t CommandSubType;
4465 uint32_t _3DCommandOpcode;
4466 uint32_t _3DCommandSubOpcode;
4467 uint32_t DwordLength;
4468 /* variable length fields follow */
4469 };
4470
4471 static inline void
4472 GEN75_3DSTATE_VERTEX_BUFFERS_pack(__gen_user_data *data, void * restrict dst,
4473 const struct GEN75_3DSTATE_VERTEX_BUFFERS * restrict values)
4474 {
4475 uint32_t *dw = (uint32_t * restrict) dst;
4476
4477 dw[0] =
4478 __gen_field(values->CommandType, 29, 31) |
4479 __gen_field(values->CommandSubType, 27, 28) |
4480 __gen_field(values->_3DCommandOpcode, 24, 26) |
4481 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4482 __gen_field(values->DwordLength, 0, 7) |
4483 0;
4484
4485 /* variable length fields follow */
4486 }
4487
4488 #define GEN75_3DSTATE_VERTEX_ELEMENTS_length_bias 0x00000002
4489 #define GEN75_3DSTATE_VERTEX_ELEMENTS_header \
4490 .CommandType = 3, \
4491 .CommandSubType = 3, \
4492 ._3DCommandOpcode = 0, \
4493 ._3DCommandSubOpcode = 9
4494
4495 struct GEN75_VERTEX_ELEMENT_STATE {
4496 uint32_t VertexBufferIndex;
4497 bool Valid;
4498 uint32_t SourceElementFormat;
4499 bool EdgeFlagEnable;
4500 uint32_t SourceElementOffset;
4501 uint32_t Component0Control;
4502 uint32_t Component1Control;
4503 uint32_t Component2Control;
4504 uint32_t Component3Control;
4505 };
4506
4507 static inline void
4508 GEN75_VERTEX_ELEMENT_STATE_pack(__gen_user_data *data, void * restrict dst,
4509 const struct GEN75_VERTEX_ELEMENT_STATE * restrict values)
4510 {
4511 uint32_t *dw = (uint32_t * restrict) dst;
4512
4513 dw[0] =
4514 __gen_field(values->VertexBufferIndex, 26, 31) |
4515 __gen_field(values->Valid, 25, 25) |
4516 __gen_field(values->SourceElementFormat, 16, 24) |
4517 __gen_field(values->EdgeFlagEnable, 15, 15) |
4518 __gen_field(values->SourceElementOffset, 0, 11) |
4519 0;
4520
4521 dw[1] =
4522 __gen_field(values->Component0Control, 28, 30) |
4523 __gen_field(values->Component1Control, 24, 26) |
4524 __gen_field(values->Component2Control, 20, 22) |
4525 __gen_field(values->Component3Control, 16, 18) |
4526 0;
4527
4528 }
4529
4530 struct GEN75_3DSTATE_VERTEX_ELEMENTS {
4531 uint32_t CommandType;
4532 uint32_t CommandSubType;
4533 uint32_t _3DCommandOpcode;
4534 uint32_t _3DCommandSubOpcode;
4535 uint32_t DwordLength;
4536 /* variable length fields follow */
4537 };
4538
4539 static inline void
4540 GEN75_3DSTATE_VERTEX_ELEMENTS_pack(__gen_user_data *data, void * restrict dst,
4541 const struct GEN75_3DSTATE_VERTEX_ELEMENTS * restrict values)
4542 {
4543 uint32_t *dw = (uint32_t * restrict) dst;
4544
4545 dw[0] =
4546 __gen_field(values->CommandType, 29, 31) |
4547 __gen_field(values->CommandSubType, 27, 28) |
4548 __gen_field(values->_3DCommandOpcode, 24, 26) |
4549 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4550 __gen_field(values->DwordLength, 0, 7) |
4551 0;
4552
4553 /* variable length fields follow */
4554 }
4555
4556 #define GEN75_3DSTATE_VF_length 0x00000002
4557 #define GEN75_3DSTATE_VF_length_bias 0x00000002
4558 #define GEN75_3DSTATE_VF_header \
4559 .CommandType = 3, \
4560 .CommandSubType = 3, \
4561 ._3DCommandOpcode = 0, \
4562 ._3DCommandSubOpcode = 12, \
4563 .DwordLength = 0
4564
4565 struct GEN75_3DSTATE_VF {
4566 uint32_t CommandType;
4567 uint32_t CommandSubType;
4568 uint32_t _3DCommandOpcode;
4569 uint32_t _3DCommandSubOpcode;
4570 bool IndexedDrawCutIndexEnable;
4571 uint32_t DwordLength;
4572 uint32_t CutIndex;
4573 };
4574
4575 static inline void
4576 GEN75_3DSTATE_VF_pack(__gen_user_data *data, void * restrict dst,
4577 const struct GEN75_3DSTATE_VF * restrict values)
4578 {
4579 uint32_t *dw = (uint32_t * restrict) dst;
4580
4581 dw[0] =
4582 __gen_field(values->CommandType, 29, 31) |
4583 __gen_field(values->CommandSubType, 27, 28) |
4584 __gen_field(values->_3DCommandOpcode, 24, 26) |
4585 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4586 __gen_field(values->IndexedDrawCutIndexEnable, 8, 8) |
4587 __gen_field(values->DwordLength, 0, 7) |
4588 0;
4589
4590 dw[1] =
4591 __gen_field(values->CutIndex, 0, 31) |
4592 0;
4593
4594 }
4595
4596 #define GEN75_3DSTATE_VF_STATISTICS_length 0x00000001
4597 #define GEN75_3DSTATE_VF_STATISTICS_length_bias 0x00000001
4598 #define GEN75_3DSTATE_VF_STATISTICS_header \
4599 .CommandType = 3, \
4600 .CommandSubType = 1, \
4601 ._3DCommandOpcode = 0, \
4602 ._3DCommandSubOpcode = 11
4603
4604 struct GEN75_3DSTATE_VF_STATISTICS {
4605 uint32_t CommandType;
4606 uint32_t CommandSubType;
4607 uint32_t _3DCommandOpcode;
4608 uint32_t _3DCommandSubOpcode;
4609 bool StatisticsEnable;
4610 };
4611
4612 static inline void
4613 GEN75_3DSTATE_VF_STATISTICS_pack(__gen_user_data *data, void * restrict dst,
4614 const struct GEN75_3DSTATE_VF_STATISTICS * restrict values)
4615 {
4616 uint32_t *dw = (uint32_t * restrict) dst;
4617
4618 dw[0] =
4619 __gen_field(values->CommandType, 29, 31) |
4620 __gen_field(values->CommandSubType, 27, 28) |
4621 __gen_field(values->_3DCommandOpcode, 24, 26) |
4622 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4623 __gen_field(values->StatisticsEnable, 0, 0) |
4624 0;
4625
4626 }
4627
4628 #define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length 0x00000002
4629 #define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length_bias 0x00000002
4630 #define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_header\
4631 .CommandType = 3, \
4632 .CommandSubType = 3, \
4633 ._3DCommandOpcode = 0, \
4634 ._3DCommandSubOpcode = 35, \
4635 .DwordLength = 0
4636
4637 struct GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC {
4638 uint32_t CommandType;
4639 uint32_t CommandSubType;
4640 uint32_t _3DCommandOpcode;
4641 uint32_t _3DCommandSubOpcode;
4642 uint32_t DwordLength;
4643 uint32_t CCViewportPointer;
4644 };
4645
4646 static inline void
4647 GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_pack(__gen_user_data *data, void * restrict dst,
4648 const struct GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC * restrict values)
4649 {
4650 uint32_t *dw = (uint32_t * restrict) dst;
4651
4652 dw[0] =
4653 __gen_field(values->CommandType, 29, 31) |
4654 __gen_field(values->CommandSubType, 27, 28) |
4655 __gen_field(values->_3DCommandOpcode, 24, 26) |
4656 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4657 __gen_field(values->DwordLength, 0, 7) |
4658 0;
4659
4660 dw[1] =
4661 __gen_offset(values->CCViewportPointer, 5, 31) |
4662 0;
4663
4664 }
4665
4666 #define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length 0x00000002
4667 #define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length_bias 0x00000002
4668 #define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_header\
4669 .CommandType = 3, \
4670 .CommandSubType = 3, \
4671 ._3DCommandOpcode = 0, \
4672 ._3DCommandSubOpcode = 33, \
4673 .DwordLength = 0
4674
4675 struct GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP {
4676 uint32_t CommandType;
4677 uint32_t CommandSubType;
4678 uint32_t _3DCommandOpcode;
4679 uint32_t _3DCommandSubOpcode;
4680 uint32_t DwordLength;
4681 uint32_t SFClipViewportPointer;
4682 };
4683
4684 static inline void
4685 GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_pack(__gen_user_data *data, void * restrict dst,
4686 const struct GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP * restrict values)
4687 {
4688 uint32_t *dw = (uint32_t * restrict) dst;
4689
4690 dw[0] =
4691 __gen_field(values->CommandType, 29, 31) |
4692 __gen_field(values->CommandSubType, 27, 28) |
4693 __gen_field(values->_3DCommandOpcode, 24, 26) |
4694 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4695 __gen_field(values->DwordLength, 0, 7) |
4696 0;
4697
4698 dw[1] =
4699 __gen_offset(values->SFClipViewportPointer, 6, 31) |
4700 0;
4701
4702 }
4703
4704 #define GEN75_3DSTATE_VS_length 0x00000006
4705 #define GEN75_3DSTATE_VS_length_bias 0x00000002
4706 #define GEN75_3DSTATE_VS_header \
4707 .CommandType = 3, \
4708 .CommandSubType = 3, \
4709 ._3DCommandOpcode = 0, \
4710 ._3DCommandSubOpcode = 16, \
4711 .DwordLength = 4
4712
4713 struct GEN75_3DSTATE_VS {
4714 uint32_t CommandType;
4715 uint32_t CommandSubType;
4716 uint32_t _3DCommandOpcode;
4717 uint32_t _3DCommandSubOpcode;
4718 uint32_t DwordLength;
4719 uint32_t KernelStartPointer;
4720 #define Multiple 0
4721 #define Single 1
4722 uint32_t SingleVertexDispatch;
4723 #define Dmask 0
4724 #define Vmask 1
4725 uint32_t VectorMaskEnableVME;
4726 #define NoSamplers 0
4727 #define _14Samplers 1
4728 #define _58Samplers 2
4729 #define _912Samplers 3
4730 #define _1316Samplers 4
4731 uint32_t SamplerCount;
4732 uint32_t BindingTableEntryCount;
4733 #define NormalPriority 0
4734 #define HighPriority 1
4735 uint32_t ThreadPriority;
4736 #define IEEE754 0
4737 #define Alternate 1
4738 uint32_t FloatingPointMode;
4739 bool IllegalOpcodeExceptionEnable;
4740 bool VSaccessesUAV;
4741 bool SoftwareExceptionEnable;
4742 uint32_t ScratchSpaceBaseOffset;
4743 uint32_t PerThreadScratchSpace;
4744 uint32_t DispatchGRFStartRegisterforURBData;
4745 uint32_t VertexURBEntryReadLength;
4746 uint32_t VertexURBEntryReadOffset;
4747 uint32_t MaximumNumberofThreads;
4748 bool StatisticsEnable;
4749 bool VertexCacheDisable;
4750 bool VSFunctionEnable;
4751 };
4752
4753 static inline void
4754 GEN75_3DSTATE_VS_pack(__gen_user_data *data, void * restrict dst,
4755 const struct GEN75_3DSTATE_VS * restrict values)
4756 {
4757 uint32_t *dw = (uint32_t * restrict) dst;
4758
4759 dw[0] =
4760 __gen_field(values->CommandType, 29, 31) |
4761 __gen_field(values->CommandSubType, 27, 28) |
4762 __gen_field(values->_3DCommandOpcode, 24, 26) |
4763 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4764 __gen_field(values->DwordLength, 0, 7) |
4765 0;
4766
4767 dw[1] =
4768 __gen_offset(values->KernelStartPointer, 6, 31) |
4769 0;
4770
4771 dw[2] =
4772 __gen_field(values->SingleVertexDispatch, 31, 31) |
4773 __gen_field(values->VectorMaskEnableVME, 30, 30) |
4774 __gen_field(values->SamplerCount, 27, 29) |
4775 __gen_field(values->BindingTableEntryCount, 18, 25) |
4776 __gen_field(values->ThreadPriority, 17, 17) |
4777 __gen_field(values->FloatingPointMode, 16, 16) |
4778 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
4779 __gen_field(values->VSaccessesUAV, 12, 12) |
4780 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
4781 0;
4782
4783 dw[3] =
4784 __gen_offset(values->ScratchSpaceBaseOffset, 10, 31) |
4785 __gen_field(values->PerThreadScratchSpace, 0, 3) |
4786 0;
4787
4788 dw[4] =
4789 __gen_field(values->DispatchGRFStartRegisterforURBData, 20, 24) |
4790 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
4791 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
4792 0;
4793
4794 dw[5] =
4795 __gen_field(values->MaximumNumberofThreads, 23, 31) |
4796 __gen_field(values->StatisticsEnable, 10, 10) |
4797 __gen_field(values->VertexCacheDisable, 1, 1) |
4798 __gen_field(values->VSFunctionEnable, 0, 0) |
4799 0;
4800
4801 }
4802
4803 #define GEN75_3DSTATE_WM_length 0x00000003
4804 #define GEN75_3DSTATE_WM_length_bias 0x00000002
4805 #define GEN75_3DSTATE_WM_header \
4806 .CommandType = 3, \
4807 .CommandSubType = 3, \
4808 ._3DCommandOpcode = 0, \
4809 ._3DCommandSubOpcode = 20, \
4810 .DwordLength = 1
4811
4812 struct GEN75_3DSTATE_WM {
4813 uint32_t CommandType;
4814 uint32_t CommandSubType;
4815 uint32_t _3DCommandOpcode;
4816 uint32_t _3DCommandSubOpcode;
4817 uint32_t DwordLength;
4818 bool StatisticsEnable;
4819 bool DepthBufferClear;
4820 bool ThreadDispatchEnable;
4821 bool DepthBufferResolveEnable;
4822 bool HierarchicalDepthBufferResolveEnable;
4823 bool LegacyDiamondLineRasterization;
4824 bool PixelShaderKillPixel;
4825 #define PSCDEPTH_OFF 0
4826 #define PSCDEPTH_ON 1
4827 #define PSCDEPTH_ON_GE 2
4828 #define PSCDEPTH_ON_LE 3
4829 uint32_t PixelShaderComputedDepthMode;
4830 #define EDSC_NORMAL 0
4831 #define EDSC_PSEXEC 1
4832 #define EDSC_PREPS 2
4833 uint32_t EarlyDepthStencilControl;
4834 bool PixelShaderUsesSourceDepth;
4835 bool PixelShaderUsesSourceW;
4836 #define INTERP_PIXEL 0
4837 #define INTERP_CENTROID 2
4838 #define INTERP_SAMPLE 3
4839 uint32_t PositionZWInterpolationMode;
4840 uint32_t BarycentricInterpolationMode;
4841 bool PixelShaderUsesInputCoverageMask;
4842 uint32_t LineEndCapAntialiasingRegionWidth;
4843 uint32_t LineAntialiasingRegionWidth;
4844 bool RTIndependentRasterizationEnable;
4845 bool PolygonStippleEnable;
4846 bool LineStippleEnable;
4847 #define RASTRULE_UPPER_LEFT 0
4848 #define RASTRULE_UPPER_RIGHT 1
4849 uint32_t PointRasterizationRule;
4850 #define MSRASTMODE_OFF_PIXEL 0
4851 #define MSRASTMODE_OFF_PATTERN 1
4852 #define MSRASTMODE_ON_PIXEL 2
4853 #define MSRASTMODE_ON_PATTERN 3
4854 uint32_t MultisampleRasterizationMode;
4855 #define MSDISPMODE_PERSAMPLE 0
4856 #define MSDISPMODE_PERPIXEL 1
4857 uint32_t MultisampleDispatchMode;
4858 #define OFF 0
4859 #define ON 1
4860 uint32_t PSUAVonly;
4861 };
4862
4863 static inline void
4864 GEN75_3DSTATE_WM_pack(__gen_user_data *data, void * restrict dst,
4865 const struct GEN75_3DSTATE_WM * restrict values)
4866 {
4867 uint32_t *dw = (uint32_t * restrict) dst;
4868
4869 dw[0] =
4870 __gen_field(values->CommandType, 29, 31) |
4871 __gen_field(values->CommandSubType, 27, 28) |
4872 __gen_field(values->_3DCommandOpcode, 24, 26) |
4873 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4874 __gen_field(values->DwordLength, 0, 7) |
4875 0;
4876
4877 dw[1] =
4878 __gen_field(values->StatisticsEnable, 31, 31) |
4879 __gen_field(values->DepthBufferClear, 30, 30) |
4880 __gen_field(values->ThreadDispatchEnable, 29, 29) |
4881 __gen_field(values->DepthBufferResolveEnable, 28, 28) |
4882 __gen_field(values->HierarchicalDepthBufferResolveEnable, 27, 27) |
4883 __gen_field(values->LegacyDiamondLineRasterization, 26, 26) |
4884 __gen_field(values->PixelShaderKillPixel, 25, 25) |
4885 __gen_field(values->PixelShaderComputedDepthMode, 23, 24) |
4886 __gen_field(values->EarlyDepthStencilControl, 21, 22) |
4887 __gen_field(values->PixelShaderUsesSourceDepth, 20, 20) |
4888 __gen_field(values->PixelShaderUsesSourceW, 19, 19) |
4889 __gen_field(values->PositionZWInterpolationMode, 17, 18) |
4890 __gen_field(values->BarycentricInterpolationMode, 11, 16) |
4891 __gen_field(values->PixelShaderUsesInputCoverageMask, 10, 10) |
4892 __gen_field(values->LineEndCapAntialiasingRegionWidth, 8, 9) |
4893 __gen_field(values->LineAntialiasingRegionWidth, 6, 7) |
4894 __gen_field(values->RTIndependentRasterizationEnable, 5, 5) |
4895 __gen_field(values->PolygonStippleEnable, 4, 4) |
4896 __gen_field(values->LineStippleEnable, 3, 3) |
4897 __gen_field(values->PointRasterizationRule, 2, 2) |
4898 __gen_field(values->MultisampleRasterizationMode, 0, 1) |
4899 0;
4900
4901 dw[2] =
4902 __gen_field(values->MultisampleDispatchMode, 31, 31) |
4903 __gen_field(values->PSUAVonly, 30, 30) |
4904 0;
4905
4906 }
4907
4908 #define GEN75_GPGPU_OBJECT_length 0x00000008
4909 #define GEN75_GPGPU_OBJECT_length_bias 0x00000002
4910 #define GEN75_GPGPU_OBJECT_header \
4911 .CommandType = 3, \
4912 .Pipeline = 2, \
4913 .MediaCommandOpcode = 1, \
4914 .SubOpcode = 4, \
4915 .DwordLength = 6
4916
4917 struct GEN75_GPGPU_OBJECT {
4918 uint32_t CommandType;
4919 uint32_t Pipeline;
4920 uint32_t MediaCommandOpcode;
4921 uint32_t SubOpcode;
4922 bool PredicateEnable;
4923 uint32_t DwordLength;
4924 uint32_t SharedLocalMemoryFixedOffset;
4925 uint32_t InterfaceDescriptorOffset;
4926 uint32_t SharedLocalMemoryOffset;
4927 uint32_t EndofThreadGroup;
4928 #define Slice0 0
4929 #define Slice1 1
4930 uint32_t SliceDestinationSelect;
4931 #define HalfSlice1 2
4932 #define HalfSlice0 1
4933 #define EitherHalfSlice 0
4934 uint32_t HalfSliceDestinationSelect;
4935 uint32_t IndirectDataLength;
4936 uint32_t IndirectDataStartAddress;
4937 uint32_t ThreadGroupIDX;
4938 uint32_t ThreadGroupIDY;
4939 uint32_t ThreadGroupIDZ;
4940 uint32_t ExecutionMask;
4941 };
4942
4943 static inline void
4944 GEN75_GPGPU_OBJECT_pack(__gen_user_data *data, void * restrict dst,
4945 const struct GEN75_GPGPU_OBJECT * restrict values)
4946 {
4947 uint32_t *dw = (uint32_t * restrict) dst;
4948
4949 dw[0] =
4950 __gen_field(values->CommandType, 29, 31) |
4951 __gen_field(values->Pipeline, 27, 28) |
4952 __gen_field(values->MediaCommandOpcode, 24, 26) |
4953 __gen_field(values->SubOpcode, 16, 23) |
4954 __gen_field(values->PredicateEnable, 8, 8) |
4955 __gen_field(values->DwordLength, 0, 7) |
4956 0;
4957
4958 dw[1] =
4959 __gen_field(values->SharedLocalMemoryFixedOffset, 7, 7) |
4960 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
4961 0;
4962
4963 dw[2] =
4964 __gen_field(values->SharedLocalMemoryOffset, 28, 31) |
4965 __gen_field(values->EndofThreadGroup, 24, 24) |
4966 __gen_field(values->SliceDestinationSelect, 19, 19) |
4967 __gen_field(values->HalfSliceDestinationSelect, 17, 18) |
4968 __gen_field(values->IndirectDataLength, 0, 16) |
4969 0;
4970
4971 dw[3] =
4972 __gen_offset(values->IndirectDataStartAddress, 0, 31) |
4973 0;
4974
4975 dw[4] =
4976 __gen_field(values->ThreadGroupIDX, 0, 31) |
4977 0;
4978
4979 dw[5] =
4980 __gen_field(values->ThreadGroupIDY, 0, 31) |
4981 0;
4982
4983 dw[6] =
4984 __gen_field(values->ThreadGroupIDZ, 0, 31) |
4985 0;
4986
4987 dw[7] =
4988 __gen_field(values->ExecutionMask, 0, 31) |
4989 0;
4990
4991 }
4992
4993 #define GEN75_GPGPU_WALKER_length 0x0000000b
4994 #define GEN75_GPGPU_WALKER_length_bias 0x00000002
4995 #define GEN75_GPGPU_WALKER_header \
4996 .CommandType = 3, \
4997 .Pipeline = 2, \
4998 .MediaCommandOpcode = 1, \
4999 .SubOpcodeA = 5, \
5000 .DwordLength = 9
5001
5002 struct GEN75_GPGPU_WALKER {
5003 uint32_t CommandType;
5004 uint32_t Pipeline;
5005 uint32_t MediaCommandOpcode;
5006 uint32_t SubOpcodeA;
5007 bool IndirectParameterEnable;
5008 bool PredicateEnable;
5009 uint32_t DwordLength;
5010 uint32_t InterfaceDescriptorOffset;
5011 #define SIMD8 0
5012 #define SIMD16 1
5013 #define SIMD32 2
5014 uint32_t SIMDSize;
5015 uint32_t ThreadDepthCounterMaximum;
5016 uint32_t ThreadHeightCounterMaximum;
5017 uint32_t ThreadWidthCounterMaximum;
5018 uint32_t ThreadGroupIDStartingX;
5019 uint32_t ThreadGroupIDXDimension;
5020 uint32_t ThreadGroupIDStartingY;
5021 uint32_t ThreadGroupIDYDimension;
5022 uint32_t ThreadGroupIDStartingZ;
5023 uint32_t ThreadGroupIDZDimension;
5024 uint32_t RightExecutionMask;
5025 uint32_t BottomExecutionMask;
5026 };
5027
5028 static inline void
5029 GEN75_GPGPU_WALKER_pack(__gen_user_data *data, void * restrict dst,
5030 const struct GEN75_GPGPU_WALKER * restrict values)
5031 {
5032 uint32_t *dw = (uint32_t * restrict) dst;
5033
5034 dw[0] =
5035 __gen_field(values->CommandType, 29, 31) |
5036 __gen_field(values->Pipeline, 27, 28) |
5037 __gen_field(values->MediaCommandOpcode, 24, 26) |
5038 __gen_field(values->SubOpcodeA, 16, 23) |
5039 __gen_field(values->IndirectParameterEnable, 10, 10) |
5040 __gen_field(values->PredicateEnable, 8, 8) |
5041 __gen_field(values->DwordLength, 0, 7) |
5042 0;
5043
5044 dw[1] =
5045 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
5046 0;
5047
5048 dw[2] =
5049 __gen_field(values->SIMDSize, 30, 31) |
5050 __gen_field(values->ThreadDepthCounterMaximum, 16, 21) |
5051 __gen_field(values->ThreadHeightCounterMaximum, 8, 13) |
5052 __gen_field(values->ThreadWidthCounterMaximum, 0, 5) |
5053 0;
5054
5055 dw[3] =
5056 __gen_field(values->ThreadGroupIDStartingX, 0, 31) |
5057 0;
5058
5059 dw[4] =
5060 __gen_field(values->ThreadGroupIDXDimension, 0, 31) |
5061 0;
5062
5063 dw[5] =
5064 __gen_field(values->ThreadGroupIDStartingY, 0, 31) |
5065 0;
5066
5067 dw[6] =
5068 __gen_field(values->ThreadGroupIDYDimension, 0, 31) |
5069 0;
5070
5071 dw[7] =
5072 __gen_field(values->ThreadGroupIDStartingZ, 0, 31) |
5073 0;
5074
5075 dw[8] =
5076 __gen_field(values->ThreadGroupIDZDimension, 0, 31) |
5077 0;
5078
5079 dw[9] =
5080 __gen_field(values->RightExecutionMask, 0, 31) |
5081 0;
5082
5083 dw[10] =
5084 __gen_field(values->BottomExecutionMask, 0, 31) |
5085 0;
5086
5087 }
5088
5089 #define GEN75_MEDIA_CURBE_LOAD_length 0x00000004
5090 #define GEN75_MEDIA_CURBE_LOAD_length_bias 0x00000002
5091 #define GEN75_MEDIA_CURBE_LOAD_header \
5092 .CommandType = 3, \
5093 .Pipeline = 2, \
5094 .MediaCommandOpcode = 0, \
5095 .SubOpcode = 1, \
5096 .DwordLength = 2
5097
5098 struct GEN75_MEDIA_CURBE_LOAD {
5099 uint32_t CommandType;
5100 uint32_t Pipeline;
5101 uint32_t MediaCommandOpcode;
5102 uint32_t SubOpcode;
5103 uint32_t DwordLength;
5104 uint32_t CURBETotalDataLength;
5105 uint32_t CURBEDataStartAddress;
5106 };
5107
5108 static inline void
5109 GEN75_MEDIA_CURBE_LOAD_pack(__gen_user_data *data, void * restrict dst,
5110 const struct GEN75_MEDIA_CURBE_LOAD * restrict values)
5111 {
5112 uint32_t *dw = (uint32_t * restrict) dst;
5113
5114 dw[0] =
5115 __gen_field(values->CommandType, 29, 31) |
5116 __gen_field(values->Pipeline, 27, 28) |
5117 __gen_field(values->MediaCommandOpcode, 24, 26) |
5118 __gen_field(values->SubOpcode, 16, 23) |
5119 __gen_field(values->DwordLength, 0, 15) |
5120 0;
5121
5122 dw[1] =
5123 0;
5124
5125 dw[2] =
5126 __gen_field(values->CURBETotalDataLength, 0, 16) |
5127 0;
5128
5129 dw[3] =
5130 __gen_field(values->CURBEDataStartAddress, 0, 31) |
5131 0;
5132
5133 }
5134
5135 #define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 0x00000004
5136 #define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length_bias 0x00000002
5137 #define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_header\
5138 .CommandType = 3, \
5139 .Pipeline = 2, \
5140 .MediaCommandOpcode = 0, \
5141 .SubOpcode = 2, \
5142 .DwordLength = 2
5143
5144 struct GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD {
5145 uint32_t CommandType;
5146 uint32_t Pipeline;
5147 uint32_t MediaCommandOpcode;
5148 uint32_t SubOpcode;
5149 uint32_t DwordLength;
5150 uint32_t InterfaceDescriptorTotalLength;
5151 uint32_t InterfaceDescriptorDataStartAddress;
5152 };
5153
5154 static inline void
5155 GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_pack(__gen_user_data *data, void * restrict dst,
5156 const struct GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD * restrict values)
5157 {
5158 uint32_t *dw = (uint32_t * restrict) dst;
5159
5160 dw[0] =
5161 __gen_field(values->CommandType, 29, 31) |
5162 __gen_field(values->Pipeline, 27, 28) |
5163 __gen_field(values->MediaCommandOpcode, 24, 26) |
5164 __gen_field(values->SubOpcode, 16, 23) |
5165 __gen_field(values->DwordLength, 0, 15) |
5166 0;
5167
5168 dw[1] =
5169 0;
5170
5171 dw[2] =
5172 __gen_field(values->InterfaceDescriptorTotalLength, 0, 16) |
5173 0;
5174
5175 dw[3] =
5176 __gen_offset(values->InterfaceDescriptorDataStartAddress, 0, 31) |
5177 0;
5178
5179 }
5180
5181 #define GEN75_MEDIA_OBJECT_length_bias 0x00000002
5182 #define GEN75_MEDIA_OBJECT_header \
5183 .CommandType = 3, \
5184 .MediaCommandPipeline = 2, \
5185 .MediaCommandOpcode = 1, \
5186 .MediaCommandSubOpcode = 0
5187
5188 struct GEN75_MEDIA_OBJECT {
5189 uint32_t CommandType;
5190 uint32_t MediaCommandPipeline;
5191 uint32_t MediaCommandOpcode;
5192 uint32_t MediaCommandSubOpcode;
5193 uint32_t DwordLength;
5194 uint32_t InterfaceDescriptorOffset;
5195 bool ChildrenPresent;
5196 #define Nothreadsynchronization 0
5197 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
5198 uint32_t ThreadSynchronization;
5199 #define Notusingscoreboard 0
5200 #define Usingscoreboard 1
5201 uint32_t UseScoreboard;
5202 #define Slice0 0
5203 #define Slice1 1
5204 #define EitherSlice 0
5205 uint32_t SliceDestinationSelect;
5206 #define HalfSlice1 2
5207 #define HalfSlice0 1
5208 #define Eitherhalfslice 0
5209 uint32_t HalfSliceDestinationSelect;
5210 uint32_t IndirectDataLength;
5211 __gen_address_type IndirectDataStartAddress;
5212 uint32_t ScoredboardY;
5213 uint32_t ScoreboardX;
5214 uint32_t ScoreboardColor;
5215 bool ScoreboardMask;
5216 /* variable length fields follow */
5217 };
5218
5219 static inline void
5220 GEN75_MEDIA_OBJECT_pack(__gen_user_data *data, void * restrict dst,
5221 const struct GEN75_MEDIA_OBJECT * restrict values)
5222 {
5223 uint32_t *dw = (uint32_t * restrict) dst;
5224
5225 dw[0] =
5226 __gen_field(values->CommandType, 29, 31) |
5227 __gen_field(values->MediaCommandPipeline, 27, 28) |
5228 __gen_field(values->MediaCommandOpcode, 24, 26) |
5229 __gen_field(values->MediaCommandSubOpcode, 16, 23) |
5230 __gen_field(values->DwordLength, 0, 15) |
5231 0;
5232
5233 dw[1] =
5234 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
5235 0;
5236
5237 dw[2] =
5238 __gen_field(values->ChildrenPresent, 31, 31) |
5239 __gen_field(values->ThreadSynchronization, 24, 24) |
5240 __gen_field(values->UseScoreboard, 21, 21) |
5241 __gen_field(values->SliceDestinationSelect, 19, 19) |
5242 __gen_field(values->HalfSliceDestinationSelect, 17, 18) |
5243 __gen_field(values->IndirectDataLength, 0, 16) |
5244 0;
5245
5246 uint32_t dw3 =
5247 0;
5248
5249 dw[3] =
5250 __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, dw3);
5251
5252 dw[4] =
5253 __gen_field(values->ScoredboardY, 16, 24) |
5254 __gen_field(values->ScoreboardX, 0, 8) |
5255 0;
5256
5257 dw[5] =
5258 __gen_field(values->ScoreboardColor, 16, 19) |
5259 __gen_field(values->ScoreboardMask, 0, 7) |
5260 0;
5261
5262 /* variable length fields follow */
5263 }
5264
5265 #define GEN75_MEDIA_OBJECT_PRT_length 0x00000010
5266 #define GEN75_MEDIA_OBJECT_PRT_length_bias 0x00000002
5267 #define GEN75_MEDIA_OBJECT_PRT_header \
5268 .CommandType = 3, \
5269 .Pipeline = 2, \
5270 .MediaCommandOpcode = 1, \
5271 .SubOpcode = 2, \
5272 .DwordLength = 14
5273
5274 struct GEN75_MEDIA_OBJECT_PRT {
5275 uint32_t CommandType;
5276 uint32_t Pipeline;
5277 uint32_t MediaCommandOpcode;
5278 uint32_t SubOpcode;
5279 uint32_t DwordLength;
5280 uint32_t InterfaceDescriptorOffset;
5281 bool ChildrenPresent;
5282 bool PRT_FenceNeeded;
5283 #define Rootthreadqueue 0
5284 #define VFEstateflush 1
5285 uint32_t PRT_FenceType;
5286 uint32_t InlineData;
5287 };
5288
5289 static inline void
5290 GEN75_MEDIA_OBJECT_PRT_pack(__gen_user_data *data, void * restrict dst,
5291 const struct GEN75_MEDIA_OBJECT_PRT * restrict values)
5292 {
5293 uint32_t *dw = (uint32_t * restrict) dst;
5294
5295 dw[0] =
5296 __gen_field(values->CommandType, 29, 31) |
5297 __gen_field(values->Pipeline, 27, 28) |
5298 __gen_field(values->MediaCommandOpcode, 24, 26) |
5299 __gen_field(values->SubOpcode, 16, 23) |
5300 __gen_field(values->DwordLength, 0, 15) |
5301 0;
5302
5303 dw[1] =
5304 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
5305 0;
5306
5307 dw[2] =
5308 __gen_field(values->ChildrenPresent, 31, 31) |
5309 __gen_field(values->PRT_FenceNeeded, 23, 23) |
5310 __gen_field(values->PRT_FenceType, 22, 22) |
5311 0;
5312
5313 dw[3] =
5314 0;
5315
5316 dw[4] =
5317 __gen_field(values->InlineData, 0, 31) |
5318 0;
5319
5320 }
5321
5322 #define GEN75_MEDIA_OBJECT_WALKER_length_bias 0x00000002
5323 #define GEN75_MEDIA_OBJECT_WALKER_header \
5324 .CommandType = 3, \
5325 .Pipeline = 2, \
5326 .MediaCommandOpcode = 1, \
5327 .SubOpcode = 3
5328
5329 struct GEN75_MEDIA_OBJECT_WALKER {
5330 uint32_t CommandType;
5331 uint32_t Pipeline;
5332 uint32_t MediaCommandOpcode;
5333 uint32_t SubOpcode;
5334 uint32_t DwordLength;
5335 uint32_t InterfaceDescriptorOffset;
5336 bool ChildrenPresent;
5337 #define Nothreadsynchronization 0
5338 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
5339 uint32_t ThreadSynchronization;
5340 #define Notusingscoreboard 0
5341 #define Usingscoreboard 1
5342 uint32_t UseScoreboard;
5343 uint32_t IndirectDataLength;
5344 uint32_t IndirectDataStartAddress;
5345 bool ScoreboardMask;
5346 bool DualMode;
5347 bool Repel;
5348 bool QuadMode;
5349 uint32_t ColorCountMinusOne;
5350 uint32_t MiddleLoopExtraSteps;
5351 uint32_t LocalMidLoopUnitY;
5352 uint32_t MidLoopUnitX;
5353 uint32_t GlobalLoopExecCount;
5354 uint32_t LocalLoopExecCount;
5355 uint32_t BlockResolutionY;
5356 uint32_t BlockResolutionX;
5357 uint32_t LocalStartY;
5358 uint32_t LocalStartX;
5359 uint32_t LocalOuterLoopStrideY;
5360 uint32_t LocalOuterLoopStrideX;
5361 uint32_t LocalInnerLoopUnitY;
5362 uint32_t LocalInnerLoopUnitX;
5363 uint32_t GlobalResolutionY;
5364 uint32_t GlobalResolutionX;
5365 uint32_t GlobalStartY;
5366 uint32_t GlobalStartX;
5367 uint32_t GlobalOuterLoopStrideY;
5368 uint32_t GlobalOuterLoopStrideX;
5369 uint32_t GlobalInnerLoopUnitY;
5370 uint32_t GlobalInnerLoopUnitX;
5371 /* variable length fields follow */
5372 };
5373
5374 static inline void
5375 GEN75_MEDIA_OBJECT_WALKER_pack(__gen_user_data *data, void * restrict dst,
5376 const struct GEN75_MEDIA_OBJECT_WALKER * restrict values)
5377 {
5378 uint32_t *dw = (uint32_t * restrict) dst;
5379
5380 dw[0] =
5381 __gen_field(values->CommandType, 29, 31) |
5382 __gen_field(values->Pipeline, 27, 28) |
5383 __gen_field(values->MediaCommandOpcode, 24, 26) |
5384 __gen_field(values->SubOpcode, 16, 23) |
5385 __gen_field(values->DwordLength, 0, 15) |
5386 0;
5387
5388 dw[1] =
5389 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
5390 0;
5391
5392 dw[2] =
5393 __gen_field(values->ChildrenPresent, 31, 31) |
5394 __gen_field(values->ThreadSynchronization, 24, 24) |
5395 __gen_field(values->UseScoreboard, 21, 21) |
5396 __gen_field(values->IndirectDataLength, 0, 16) |
5397 0;
5398
5399 dw[3] =
5400 __gen_offset(values->IndirectDataStartAddress, 0, 31) |
5401 0;
5402
5403 dw[4] =
5404 0;
5405
5406 dw[5] =
5407 __gen_field(values->ScoreboardMask, 0, 7) |
5408 0;
5409
5410 dw[6] =
5411 __gen_field(values->DualMode, 31, 31) |
5412 __gen_field(values->Repel, 30, 30) |
5413 __gen_field(values->QuadMode, 29, 29) |
5414 __gen_field(values->ColorCountMinusOne, 24, 27) |
5415 __gen_field(values->MiddleLoopExtraSteps, 16, 20) |
5416 __gen_field(values->LocalMidLoopUnitY, 12, 13) |
5417 __gen_field(values->MidLoopUnitX, 8, 9) |
5418 0;
5419
5420 dw[7] =
5421 __gen_field(values->GlobalLoopExecCount, 16, 25) |
5422 __gen_field(values->LocalLoopExecCount, 0, 9) |
5423 0;
5424
5425 dw[8] =
5426 __gen_field(values->BlockResolutionY, 16, 24) |
5427 __gen_field(values->BlockResolutionX, 0, 8) |
5428 0;
5429
5430 dw[9] =
5431 __gen_field(values->LocalStartY, 16, 24) |
5432 __gen_field(values->LocalStartX, 0, 8) |
5433 0;
5434
5435 dw[10] =
5436 0;
5437
5438 dw[11] =
5439 __gen_field(values->LocalOuterLoopStrideY, 16, 25) |
5440 __gen_field(values->LocalOuterLoopStrideX, 0, 9) |
5441 0;
5442
5443 dw[12] =
5444 __gen_field(values->LocalInnerLoopUnitY, 16, 25) |
5445 __gen_field(values->LocalInnerLoopUnitX, 0, 9) |
5446 0;
5447
5448 dw[13] =
5449 __gen_field(values->GlobalResolutionY, 16, 24) |
5450 __gen_field(values->GlobalResolutionX, 0, 8) |
5451 0;
5452
5453 dw[14] =
5454 __gen_field(values->GlobalStartY, 16, 25) |
5455 __gen_field(values->GlobalStartX, 0, 9) |
5456 0;
5457
5458 dw[15] =
5459 __gen_field(values->GlobalOuterLoopStrideY, 16, 25) |
5460 __gen_field(values->GlobalOuterLoopStrideX, 0, 9) |
5461 0;
5462
5463 dw[16] =
5464 __gen_field(values->GlobalInnerLoopUnitY, 16, 25) |
5465 __gen_field(values->GlobalInnerLoopUnitX, 0, 9) |
5466 0;
5467
5468 /* variable length fields follow */
5469 }
5470
5471 #define GEN75_MEDIA_STATE_FLUSH_length 0x00000002
5472 #define GEN75_MEDIA_STATE_FLUSH_length_bias 0x00000002
5473 #define GEN75_MEDIA_STATE_FLUSH_header \
5474 .CommandType = 3, \
5475 .Pipeline = 2, \
5476 .MediaCommandOpcode = 0, \
5477 .SubOpcode = 4, \
5478 .DwordLength = 0
5479
5480 struct GEN75_MEDIA_STATE_FLUSH {
5481 uint32_t CommandType;
5482 uint32_t Pipeline;
5483 uint32_t MediaCommandOpcode;
5484 uint32_t SubOpcode;
5485 uint32_t DwordLength;
5486 bool DisablePreemption;
5487 bool FlushtoGO;
5488 uint32_t WatermarkRequired;
5489 uint32_t InterfaceDescriptorOffset;
5490 };
5491
5492 static inline void
5493 GEN75_MEDIA_STATE_FLUSH_pack(__gen_user_data *data, void * restrict dst,
5494 const struct GEN75_MEDIA_STATE_FLUSH * restrict values)
5495 {
5496 uint32_t *dw = (uint32_t * restrict) dst;
5497
5498 dw[0] =
5499 __gen_field(values->CommandType, 29, 31) |
5500 __gen_field(values->Pipeline, 27, 28) |
5501 __gen_field(values->MediaCommandOpcode, 24, 26) |
5502 __gen_field(values->SubOpcode, 16, 23) |
5503 __gen_field(values->DwordLength, 0, 15) |
5504 0;
5505
5506 dw[1] =
5507 __gen_field(values->DisablePreemption, 8, 8) |
5508 __gen_field(values->FlushtoGO, 7, 7) |
5509 __gen_field(values->WatermarkRequired, 6, 6) |
5510 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
5511 0;
5512
5513 }
5514
5515 #define GEN75_MEDIA_VFE_STATE_length 0x00000008
5516 #define GEN75_MEDIA_VFE_STATE_length_bias 0x00000002
5517 #define GEN75_MEDIA_VFE_STATE_header \
5518 .CommandType = 3, \
5519 .Pipeline = 2, \
5520 .MediaCommandOpcode = 0, \
5521 .SubOpcode = 0, \
5522 .DwordLength = 6
5523
5524 struct GEN75_MEDIA_VFE_STATE {
5525 uint32_t CommandType;
5526 uint32_t Pipeline;
5527 uint32_t MediaCommandOpcode;
5528 uint32_t SubOpcode;
5529 uint32_t DwordLength;
5530 uint32_t ScratchSpaceBasePointer;
5531 uint32_t StackSize;
5532 uint32_t PerThreadScratchSpace;
5533 uint32_t MaximumNumberofThreads;
5534 uint32_t NumberofURBEntries;
5535 #define Maintainingtheexistingtimestampstate 0
5536 #define Resettingrelativetimerandlatchingtheglobaltimestamp 1
5537 uint32_t ResetGatewayTimer;
5538 #define MaintainingOpenGatewayForwardMsgCloseGatewayprotocollegacymode 0
5539 #define BypassingOpenGatewayCloseGatewayprotocol 1
5540 uint32_t BypassGatewayControl;
5541 uint32_t GPGPUMode;
5542 uint32_t HalfSliceDisable;
5543 uint32_t URBEntryAllocationSize;
5544 uint32_t CURBEAllocationSize;
5545 #define Scoreboarddisabled 0
5546 #define Scoreboardenabled 1
5547 uint32_t ScoreboardEnable;
5548 #define StallingScoreboard 0
5549 #define NonStallingScoreboard 1
5550 uint32_t ScoreboardType;
5551 uint32_t ScoreboardMask;
5552 uint32_t Scoreboard3DeltaY;
5553 uint32_t Scoreboard3DeltaX;
5554 uint32_t Scoreboard2DeltaY;
5555 uint32_t Scoreboard2DeltaX;
5556 uint32_t Scoreboard1DeltaY;
5557 uint32_t Scoreboard1DeltaX;
5558 uint32_t Scoreboard0DeltaY;
5559 uint32_t Scoreboard0DeltaX;
5560 uint32_t Scoreboard7DeltaY;
5561 uint32_t Scoreboard7DeltaX;
5562 uint32_t Scoreboard6DeltaY;
5563 uint32_t Scoreboard6DeltaX;
5564 uint32_t Scoreboard5DeltaY;
5565 uint32_t Scoreboard5DeltaX;
5566 uint32_t Scoreboard4DeltaY;
5567 uint32_t Scoreboard4DeltaX;
5568 };
5569
5570 static inline void
5571 GEN75_MEDIA_VFE_STATE_pack(__gen_user_data *data, void * restrict dst,
5572 const struct GEN75_MEDIA_VFE_STATE * restrict values)
5573 {
5574 uint32_t *dw = (uint32_t * restrict) dst;
5575
5576 dw[0] =
5577 __gen_field(values->CommandType, 29, 31) |
5578 __gen_field(values->Pipeline, 27, 28) |
5579 __gen_field(values->MediaCommandOpcode, 24, 26) |
5580 __gen_field(values->SubOpcode, 16, 23) |
5581 __gen_field(values->DwordLength, 0, 15) |
5582 0;
5583
5584 dw[1] =
5585 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
5586 __gen_field(values->StackSize, 4, 7) |
5587 __gen_field(values->PerThreadScratchSpace, 0, 3) |
5588 0;
5589
5590 dw[2] =
5591 __gen_field(values->MaximumNumberofThreads, 16, 31) |
5592 __gen_field(values->NumberofURBEntries, 8, 15) |
5593 __gen_field(values->ResetGatewayTimer, 7, 7) |
5594 __gen_field(values->BypassGatewayControl, 6, 6) |
5595 __gen_field(values->GPGPUMode, 2, 2) |
5596 0;
5597
5598 dw[3] =
5599 __gen_field(values->HalfSliceDisable, 0, 1) |
5600 0;
5601
5602 dw[4] =
5603 __gen_field(values->URBEntryAllocationSize, 16, 31) |
5604 __gen_field(values->CURBEAllocationSize, 0, 15) |
5605 0;
5606
5607 dw[5] =
5608 __gen_field(values->ScoreboardEnable, 31, 31) |
5609 __gen_field(values->ScoreboardType, 30, 30) |
5610 __gen_field(values->ScoreboardMask, 0, 7) |
5611 0;
5612
5613 dw[6] =
5614 __gen_field(values->Scoreboard3DeltaY, 28, 31) |
5615 __gen_field(values->Scoreboard3DeltaX, 24, 27) |
5616 __gen_field(values->Scoreboard2DeltaY, 20, 23) |
5617 __gen_field(values->Scoreboard2DeltaX, 16, 19) |
5618 __gen_field(values->Scoreboard1DeltaY, 12, 15) |
5619 __gen_field(values->Scoreboard1DeltaX, 8, 11) |
5620 __gen_field(values->Scoreboard0DeltaY, 4, 7) |
5621 __gen_field(values->Scoreboard0DeltaX, 0, 3) |
5622 0;
5623
5624 dw[7] =
5625 __gen_field(values->Scoreboard7DeltaY, 28, 31) |
5626 __gen_field(values->Scoreboard7DeltaX, 24, 27) |
5627 __gen_field(values->Scoreboard6DeltaY, 20, 23) |
5628 __gen_field(values->Scoreboard6DeltaX, 16, 19) |
5629 __gen_field(values->Scoreboard5DeltaY, 12, 15) |
5630 __gen_field(values->Scoreboard5DeltaX, 8, 11) |
5631 __gen_field(values->Scoreboard4DeltaY, 4, 7) |
5632 __gen_field(values->Scoreboard4DeltaX, 0, 3) |
5633 0;
5634
5635 }
5636
5637 #define GEN75_MI_ARB_CHECK_length 0x00000001
5638 #define GEN75_MI_ARB_CHECK_length_bias 0x00000001
5639 #define GEN75_MI_ARB_CHECK_header \
5640 .CommandType = 0, \
5641 .MICommandOpcode = 5
5642
5643 struct GEN75_MI_ARB_CHECK {
5644 uint32_t CommandType;
5645 uint32_t MICommandOpcode;
5646 };
5647
5648 static inline void
5649 GEN75_MI_ARB_CHECK_pack(__gen_user_data *data, void * restrict dst,
5650 const struct GEN75_MI_ARB_CHECK * restrict values)
5651 {
5652 uint32_t *dw = (uint32_t * restrict) dst;
5653
5654 dw[0] =
5655 __gen_field(values->CommandType, 29, 31) |
5656 __gen_field(values->MICommandOpcode, 23, 28) |
5657 0;
5658
5659 }
5660
5661 #define GEN75_MI_ARB_ON_OFF_length 0x00000001
5662 #define GEN75_MI_ARB_ON_OFF_length_bias 0x00000001
5663 #define GEN75_MI_ARB_ON_OFF_header \
5664 .CommandType = 0, \
5665 .MICommandOpcode = 8
5666
5667 struct GEN75_MI_ARB_ON_OFF {
5668 uint32_t CommandType;
5669 uint32_t MICommandOpcode;
5670 bool ArbitrationEnable;
5671 };
5672
5673 static inline void
5674 GEN75_MI_ARB_ON_OFF_pack(__gen_user_data *data, void * restrict dst,
5675 const struct GEN75_MI_ARB_ON_OFF * restrict values)
5676 {
5677 uint32_t *dw = (uint32_t * restrict) dst;
5678
5679 dw[0] =
5680 __gen_field(values->CommandType, 29, 31) |
5681 __gen_field(values->MICommandOpcode, 23, 28) |
5682 __gen_field(values->ArbitrationEnable, 0, 0) |
5683 0;
5684
5685 }
5686
5687 #define GEN75_MI_BATCH_BUFFER_END_length 0x00000001
5688 #define GEN75_MI_BATCH_BUFFER_END_length_bias 0x00000001
5689 #define GEN75_MI_BATCH_BUFFER_END_header \
5690 .CommandType = 0, \
5691 .MICommandOpcode = 10
5692
5693 struct GEN75_MI_BATCH_BUFFER_END {
5694 uint32_t CommandType;
5695 uint32_t MICommandOpcode;
5696 };
5697
5698 static inline void
5699 GEN75_MI_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
5700 const struct GEN75_MI_BATCH_BUFFER_END * restrict values)
5701 {
5702 uint32_t *dw = (uint32_t * restrict) dst;
5703
5704 dw[0] =
5705 __gen_field(values->CommandType, 29, 31) |
5706 __gen_field(values->MICommandOpcode, 23, 28) |
5707 0;
5708
5709 }
5710
5711 #define GEN75_MI_BATCH_BUFFER_START_length 0x00000002
5712 #define GEN75_MI_BATCH_BUFFER_START_length_bias 0x00000002
5713 #define GEN75_MI_BATCH_BUFFER_START_header \
5714 .CommandType = 0, \
5715 .MICommandOpcode = 49, \
5716 .DwordLength = 0
5717
5718 struct GEN75_MI_BATCH_BUFFER_START {
5719 uint32_t CommandType;
5720 uint32_t MICommandOpcode;
5721 #define _1stlevelbatch 0
5722 #define _2ndlevelbatch 1
5723 uint32_t _2ndLevelBatchBuffer;
5724 bool AddOffsetEnable;
5725 bool PredicationEnable;
5726 uint32_t NonPrivileged;
5727 bool ClearCommandBufferEnable;
5728 bool ResourceStreamerEnable;
5729 #define ASI_GGTT 0
5730 #define ASI_PPGTT 1
5731 uint32_t AddressSpaceIndicator;
5732 uint32_t DwordLength;
5733 __gen_address_type BatchBufferStartAddress;
5734 };
5735
5736 static inline void
5737 GEN75_MI_BATCH_BUFFER_START_pack(__gen_user_data *data, void * restrict dst,
5738 const struct GEN75_MI_BATCH_BUFFER_START * restrict values)
5739 {
5740 uint32_t *dw = (uint32_t * restrict) dst;
5741
5742 dw[0] =
5743 __gen_field(values->CommandType, 29, 31) |
5744 __gen_field(values->MICommandOpcode, 23, 28) |
5745 __gen_field(values->_2ndLevelBatchBuffer, 22, 22) |
5746 __gen_field(values->AddOffsetEnable, 16, 16) |
5747 __gen_field(values->PredicationEnable, 15, 15) |
5748 __gen_field(values->NonPrivileged, 13, 13) |
5749 __gen_field(values->ClearCommandBufferEnable, 11, 11) |
5750 __gen_field(values->ResourceStreamerEnable, 10, 10) |
5751 __gen_field(values->AddressSpaceIndicator, 8, 8) |
5752 __gen_field(values->DwordLength, 0, 7) |
5753 0;
5754
5755 uint32_t dw1 =
5756 0;
5757
5758 dw[1] =
5759 __gen_combine_address(data, &dw[1], values->BatchBufferStartAddress, dw1);
5760
5761 }
5762
5763 #define GEN75_MI_CLFLUSH_length_bias 0x00000002
5764 #define GEN75_MI_CLFLUSH_header \
5765 .CommandType = 0, \
5766 .MICommandOpcode = 39
5767
5768 struct GEN75_MI_CLFLUSH {
5769 uint32_t CommandType;
5770 uint32_t MICommandOpcode;
5771 #define PerProcessGraphicsAddress 0
5772 #define GlobalGraphicsAddress 1
5773 uint32_t UseGlobalGTT;
5774 uint32_t DwordLength;
5775 __gen_address_type PageBaseAddress;
5776 uint32_t StartingCachelineOffset;
5777 __gen_address_type PageBaseAddressHigh;
5778 /* variable length fields follow */
5779 };
5780
5781 static inline void
5782 GEN75_MI_CLFLUSH_pack(__gen_user_data *data, void * restrict dst,
5783 const struct GEN75_MI_CLFLUSH * restrict values)
5784 {
5785 uint32_t *dw = (uint32_t * restrict) dst;
5786
5787 dw[0] =
5788 __gen_field(values->CommandType, 29, 31) |
5789 __gen_field(values->MICommandOpcode, 23, 28) |
5790 __gen_field(values->UseGlobalGTT, 22, 22) |
5791 __gen_field(values->DwordLength, 0, 9) |
5792 0;
5793
5794 uint32_t dw1 =
5795 __gen_field(values->StartingCachelineOffset, 6, 11) |
5796 0;
5797
5798 dw[1] =
5799 __gen_combine_address(data, &dw[1], values->PageBaseAddress, dw1);
5800
5801 uint32_t dw2 =
5802 0;
5803
5804 dw[2] =
5805 __gen_combine_address(data, &dw[2], values->PageBaseAddressHigh, dw2);
5806
5807 /* variable length fields follow */
5808 }
5809
5810 #define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_length 0x00000002
5811 #define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_length_bias 0x00000002
5812 #define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_header\
5813 .CommandType = 0, \
5814 .MICommandOpcode = 54, \
5815 .UseGlobalGTT = 0, \
5816 .CompareSemaphore = 0, \
5817 .DwordLength = 0
5818
5819 struct GEN75_MI_CONDITIONAL_BATCH_BUFFER_END {
5820 uint32_t CommandType;
5821 uint32_t MICommandOpcode;
5822 uint32_t UseGlobalGTT;
5823 uint32_t CompareSemaphore;
5824 uint32_t DwordLength;
5825 uint32_t CompareDataDword;
5826 __gen_address_type CompareAddress;
5827 };
5828
5829 static inline void
5830 GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
5831 const struct GEN75_MI_CONDITIONAL_BATCH_BUFFER_END * restrict values)
5832 {
5833 uint32_t *dw = (uint32_t * restrict) dst;
5834
5835 dw[0] =
5836 __gen_field(values->CommandType, 29, 31) |
5837 __gen_field(values->MICommandOpcode, 23, 28) |
5838 __gen_field(values->UseGlobalGTT, 22, 22) |
5839 __gen_field(values->CompareSemaphore, 21, 21) |
5840 __gen_field(values->DwordLength, 0, 7) |
5841 0;
5842
5843 dw[1] =
5844 __gen_field(values->CompareDataDword, 0, 31) |
5845 0;
5846
5847 uint32_t dw2 =
5848 0;
5849
5850 dw[2] =
5851 __gen_combine_address(data, &dw[2], values->CompareAddress, dw2);
5852
5853 }
5854
5855 #define GEN75_MI_FLUSH_length 0x00000001
5856 #define GEN75_MI_FLUSH_length_bias 0x00000001
5857 #define GEN75_MI_FLUSH_header \
5858 .CommandType = 0, \
5859 .MICommandOpcode = 4
5860
5861 struct GEN75_MI_FLUSH {
5862 uint32_t CommandType;
5863 uint32_t MICommandOpcode;
5864 bool IndirectStatePointersDisable;
5865 bool GenericMediaStateClear;
5866 #define DontReset 0
5867 #define Reset 1
5868 bool GlobalSnapshotCountReset;
5869 #define Flush 0
5870 #define DontFlush 1
5871 bool RenderCacheFlushInhibit;
5872 #define DontInvalidate 0
5873 #define Invalidate 1
5874 bool StateInstructionCacheInvalidate;
5875 };
5876
5877 static inline void
5878 GEN75_MI_FLUSH_pack(__gen_user_data *data, void * restrict dst,
5879 const struct GEN75_MI_FLUSH * restrict values)
5880 {
5881 uint32_t *dw = (uint32_t * restrict) dst;
5882
5883 dw[0] =
5884 __gen_field(values->CommandType, 29, 31) |
5885 __gen_field(values->MICommandOpcode, 23, 28) |
5886 __gen_field(values->IndirectStatePointersDisable, 5, 5) |
5887 __gen_field(values->GenericMediaStateClear, 4, 4) |
5888 __gen_field(values->GlobalSnapshotCountReset, 3, 3) |
5889 __gen_field(values->RenderCacheFlushInhibit, 2, 2) |
5890 __gen_field(values->StateInstructionCacheInvalidate, 1, 1) |
5891 0;
5892
5893 }
5894
5895 #define GEN75_MI_LOAD_REGISTER_IMM_length 0x00000003
5896 #define GEN75_MI_LOAD_REGISTER_IMM_length_bias 0x00000002
5897 #define GEN75_MI_LOAD_REGISTER_IMM_header \
5898 .CommandType = 0, \
5899 .MICommandOpcode = 34, \
5900 .DwordLength = 1
5901
5902 struct GEN75_MI_LOAD_REGISTER_IMM {
5903 uint32_t CommandType;
5904 uint32_t MICommandOpcode;
5905 uint32_t ByteWriteDisables;
5906 uint32_t DwordLength;
5907 uint32_t RegisterOffset;
5908 uint32_t DataDWord;
5909 };
5910
5911 static inline void
5912 GEN75_MI_LOAD_REGISTER_IMM_pack(__gen_user_data *data, void * restrict dst,
5913 const struct GEN75_MI_LOAD_REGISTER_IMM * restrict values)
5914 {
5915 uint32_t *dw = (uint32_t * restrict) dst;
5916
5917 dw[0] =
5918 __gen_field(values->CommandType, 29, 31) |
5919 __gen_field(values->MICommandOpcode, 23, 28) |
5920 __gen_field(values->ByteWriteDisables, 8, 11) |
5921 __gen_field(values->DwordLength, 0, 7) |
5922 0;
5923
5924 dw[1] =
5925 __gen_offset(values->RegisterOffset, 2, 22) |
5926 0;
5927
5928 dw[2] =
5929 __gen_field(values->DataDWord, 0, 31) |
5930 0;
5931
5932 }
5933
5934 #define GEN75_MI_LOAD_REGISTER_MEM_length 0x00000003
5935 #define GEN75_MI_LOAD_REGISTER_MEM_length_bias 0x00000002
5936 #define GEN75_MI_LOAD_REGISTER_MEM_header \
5937 .CommandType = 0, \
5938 .MICommandOpcode = 41, \
5939 .DwordLength = 1
5940
5941 struct GEN75_MI_LOAD_REGISTER_MEM {
5942 uint32_t CommandType;
5943 uint32_t MICommandOpcode;
5944 bool UseGlobalGTT;
5945 uint32_t AsyncModeEnable;
5946 uint32_t DwordLength;
5947 uint32_t RegisterAddress;
5948 __gen_address_type MemoryAddress;
5949 };
5950
5951 static inline void
5952 GEN75_MI_LOAD_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
5953 const struct GEN75_MI_LOAD_REGISTER_MEM * restrict values)
5954 {
5955 uint32_t *dw = (uint32_t * restrict) dst;
5956
5957 dw[0] =
5958 __gen_field(values->CommandType, 29, 31) |
5959 __gen_field(values->MICommandOpcode, 23, 28) |
5960 __gen_field(values->UseGlobalGTT, 22, 22) |
5961 __gen_field(values->AsyncModeEnable, 21, 21) |
5962 __gen_field(values->DwordLength, 0, 7) |
5963 0;
5964
5965 dw[1] =
5966 __gen_offset(values->RegisterAddress, 2, 22) |
5967 0;
5968
5969 uint32_t dw2 =
5970 0;
5971
5972 dw[2] =
5973 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
5974
5975 }
5976
5977 #define GEN75_MI_LOAD_REGISTER_REG_length 0x00000003
5978 #define GEN75_MI_LOAD_REGISTER_REG_length_bias 0x00000002
5979 #define GEN75_MI_LOAD_REGISTER_REG_header \
5980 .CommandType = 0, \
5981 .MICommandOpcode = 42, \
5982 .DwordLength = 1
5983
5984 struct GEN75_MI_LOAD_REGISTER_REG {
5985 uint32_t CommandType;
5986 uint32_t MICommandOpcode;
5987 uint32_t DwordLength;
5988 uint32_t SourceRegisterAddress;
5989 uint32_t DestinationRegisterAddress;
5990 };
5991
5992 static inline void
5993 GEN75_MI_LOAD_REGISTER_REG_pack(__gen_user_data *data, void * restrict dst,
5994 const struct GEN75_MI_LOAD_REGISTER_REG * restrict values)
5995 {
5996 uint32_t *dw = (uint32_t * restrict) dst;
5997
5998 dw[0] =
5999 __gen_field(values->CommandType, 29, 31) |
6000 __gen_field(values->MICommandOpcode, 23, 28) |
6001 __gen_field(values->DwordLength, 0, 7) |
6002 0;
6003
6004 dw[1] =
6005 __gen_offset(values->SourceRegisterAddress, 2, 22) |
6006 0;
6007
6008 dw[2] =
6009 __gen_offset(values->DestinationRegisterAddress, 2, 22) |
6010 0;
6011
6012 }
6013
6014 #define GEN75_MI_LOAD_SCAN_LINES_EXCL_length 0x00000002
6015 #define GEN75_MI_LOAD_SCAN_LINES_EXCL_length_bias 0x00000002
6016 #define GEN75_MI_LOAD_SCAN_LINES_EXCL_header \
6017 .CommandType = 0, \
6018 .MICommandOpcode = 19, \
6019 .DwordLength = 0
6020
6021 struct GEN75_MI_LOAD_SCAN_LINES_EXCL {
6022 uint32_t CommandType;
6023 uint32_t MICommandOpcode;
6024 #define DisplayPlaneA 0
6025 #define DisplayPlaneB 1
6026 #define DisplayPlaneC 4
6027 uint32_t DisplayPlaneSelect;
6028 uint32_t DwordLength;
6029 uint32_t StartScanLineNumber;
6030 uint32_t EndScanLineNumber;
6031 };
6032
6033 static inline void
6034 GEN75_MI_LOAD_SCAN_LINES_EXCL_pack(__gen_user_data *data, void * restrict dst,
6035 const struct GEN75_MI_LOAD_SCAN_LINES_EXCL * restrict values)
6036 {
6037 uint32_t *dw = (uint32_t * restrict) dst;
6038
6039 dw[0] =
6040 __gen_field(values->CommandType, 29, 31) |
6041 __gen_field(values->MICommandOpcode, 23, 28) |
6042 __gen_field(values->DisplayPlaneSelect, 19, 21) |
6043 __gen_field(values->DwordLength, 0, 5) |
6044 0;
6045
6046 dw[1] =
6047 __gen_field(values->StartScanLineNumber, 16, 28) |
6048 __gen_field(values->EndScanLineNumber, 0, 12) |
6049 0;
6050
6051 }
6052
6053 #define GEN75_MI_LOAD_SCAN_LINES_INCL_length 0x00000002
6054 #define GEN75_MI_LOAD_SCAN_LINES_INCL_length_bias 0x00000002
6055 #define GEN75_MI_LOAD_SCAN_LINES_INCL_header \
6056 .CommandType = 0, \
6057 .MICommandOpcode = 18, \
6058 .DwordLength = 0
6059
6060 struct GEN75_MI_LOAD_SCAN_LINES_INCL {
6061 uint32_t CommandType;
6062 uint32_t MICommandOpcode;
6063 #define DisplayPlaneA 0
6064 #define DisplayPlaneB 1
6065 #define DisplayPlaneC 4
6066 uint32_t DisplayPlaneSelect;
6067 uint32_t DwordLength;
6068 uint32_t StartScanLineNumber;
6069 uint32_t EndScanLineNumber;
6070 };
6071
6072 static inline void
6073 GEN75_MI_LOAD_SCAN_LINES_INCL_pack(__gen_user_data *data, void * restrict dst,
6074 const struct GEN75_MI_LOAD_SCAN_LINES_INCL * restrict values)
6075 {
6076 uint32_t *dw = (uint32_t * restrict) dst;
6077
6078 dw[0] =
6079 __gen_field(values->CommandType, 29, 31) |
6080 __gen_field(values->MICommandOpcode, 23, 28) |
6081 __gen_field(values->DisplayPlaneSelect, 19, 21) |
6082 __gen_field(values->DwordLength, 0, 5) |
6083 0;
6084
6085 dw[1] =
6086 __gen_field(values->StartScanLineNumber, 16, 28) |
6087 __gen_field(values->EndScanLineNumber, 0, 12) |
6088 0;
6089
6090 }
6091
6092 #define GEN75_MI_LOAD_URB_MEM_length 0x00000003
6093 #define GEN75_MI_LOAD_URB_MEM_length_bias 0x00000002
6094 #define GEN75_MI_LOAD_URB_MEM_header \
6095 .CommandType = 0, \
6096 .MICommandOpcode = 44, \
6097 .DwordLength = 1
6098
6099 struct GEN75_MI_LOAD_URB_MEM {
6100 uint32_t CommandType;
6101 uint32_t MICommandOpcode;
6102 uint32_t DwordLength;
6103 uint32_t URBAddress;
6104 __gen_address_type MemoryAddress;
6105 };
6106
6107 static inline void
6108 GEN75_MI_LOAD_URB_MEM_pack(__gen_user_data *data, void * restrict dst,
6109 const struct GEN75_MI_LOAD_URB_MEM * restrict values)
6110 {
6111 uint32_t *dw = (uint32_t * restrict) dst;
6112
6113 dw[0] =
6114 __gen_field(values->CommandType, 29, 31) |
6115 __gen_field(values->MICommandOpcode, 23, 28) |
6116 __gen_field(values->DwordLength, 0, 7) |
6117 0;
6118
6119 dw[1] =
6120 __gen_field(values->URBAddress, 2, 14) |
6121 0;
6122
6123 uint32_t dw2 =
6124 0;
6125
6126 dw[2] =
6127 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
6128
6129 }
6130
6131 #define GEN75_MI_MATH_length_bias 0x00000002
6132 #define GEN75_MI_MATH_header \
6133 .CommandType = 0, \
6134 .MICommandOpcode = 26
6135
6136 struct GEN75_MI_MATH {
6137 uint32_t CommandType;
6138 uint32_t MICommandOpcode;
6139 uint32_t DwordLength;
6140 uint32_t ALUINSTRUCTION1;
6141 uint32_t ALUINSTRUCTION2;
6142 /* variable length fields follow */
6143 };
6144
6145 static inline void
6146 GEN75_MI_MATH_pack(__gen_user_data *data, void * restrict dst,
6147 const struct GEN75_MI_MATH * restrict values)
6148 {
6149 uint32_t *dw = (uint32_t * restrict) dst;
6150
6151 dw[0] =
6152 __gen_field(values->CommandType, 29, 31) |
6153 __gen_field(values->MICommandOpcode, 23, 28) |
6154 __gen_field(values->DwordLength, 0, 5) |
6155 0;
6156
6157 dw[1] =
6158 __gen_field(values->ALUINSTRUCTION1, 0, 31) |
6159 0;
6160
6161 dw[2] =
6162 __gen_field(values->ALUINSTRUCTION2, 0, 31) |
6163 0;
6164
6165 /* variable length fields follow */
6166 }
6167
6168 #define GEN75_MI_NOOP_length 0x00000001
6169 #define GEN75_MI_NOOP_length_bias 0x00000001
6170 #define GEN75_MI_NOOP_header \
6171 .CommandType = 0, \
6172 .MICommandOpcode = 0
6173
6174 struct GEN75_MI_NOOP {
6175 uint32_t CommandType;
6176 uint32_t MICommandOpcode;
6177 bool IdentificationNumberRegisterWriteEnable;
6178 uint32_t IdentificationNumber;
6179 };
6180
6181 static inline void
6182 GEN75_MI_NOOP_pack(__gen_user_data *data, void * restrict dst,
6183 const struct GEN75_MI_NOOP * restrict values)
6184 {
6185 uint32_t *dw = (uint32_t * restrict) dst;
6186
6187 dw[0] =
6188 __gen_field(values->CommandType, 29, 31) |
6189 __gen_field(values->MICommandOpcode, 23, 28) |
6190 __gen_field(values->IdentificationNumberRegisterWriteEnable, 22, 22) |
6191 __gen_field(values->IdentificationNumber, 0, 21) |
6192 0;
6193
6194 }
6195
6196 #define GEN75_MI_PREDICATE_length 0x00000001
6197 #define GEN75_MI_PREDICATE_length_bias 0x00000001
6198 #define GEN75_MI_PREDICATE_header \
6199 .CommandType = 0, \
6200 .MICommandOpcode = 12
6201
6202 struct GEN75_MI_PREDICATE {
6203 uint32_t CommandType;
6204 uint32_t MICommandOpcode;
6205 #define LOAD_KEEP 0
6206 #define LOAD_LOAD 2
6207 #define LOAD_LOADINV 3
6208 uint32_t LoadOperation;
6209 #define COMBINE_SET 0
6210 #define COMBINE_AND 1
6211 #define COMBINE_OR 2
6212 #define COMBINE_XOR 3
6213 uint32_t CombineOperation;
6214 #define COMPARE_SRCS_EQUAL 2
6215 #define COMPARE_DELTAS_EQUAL 3
6216 uint32_t CompareOperation;
6217 };
6218
6219 static inline void
6220 GEN75_MI_PREDICATE_pack(__gen_user_data *data, void * restrict dst,
6221 const struct GEN75_MI_PREDICATE * restrict values)
6222 {
6223 uint32_t *dw = (uint32_t * restrict) dst;
6224
6225 dw[0] =
6226 __gen_field(values->CommandType, 29, 31) |
6227 __gen_field(values->MICommandOpcode, 23, 28) |
6228 __gen_field(values->LoadOperation, 6, 7) |
6229 __gen_field(values->CombineOperation, 3, 4) |
6230 __gen_field(values->CompareOperation, 0, 1) |
6231 0;
6232
6233 }
6234
6235 #define GEN75_MI_REPORT_HEAD_length 0x00000001
6236 #define GEN75_MI_REPORT_HEAD_length_bias 0x00000001
6237 #define GEN75_MI_REPORT_HEAD_header \
6238 .CommandType = 0, \
6239 .MICommandOpcode = 7
6240
6241 struct GEN75_MI_REPORT_HEAD {
6242 uint32_t CommandType;
6243 uint32_t MICommandOpcode;
6244 };
6245
6246 static inline void
6247 GEN75_MI_REPORT_HEAD_pack(__gen_user_data *data, void * restrict dst,
6248 const struct GEN75_MI_REPORT_HEAD * restrict values)
6249 {
6250 uint32_t *dw = (uint32_t * restrict) dst;
6251
6252 dw[0] =
6253 __gen_field(values->CommandType, 29, 31) |
6254 __gen_field(values->MICommandOpcode, 23, 28) |
6255 0;
6256
6257 }
6258
6259 #define GEN75_MI_RS_CONTEXT_length 0x00000001
6260 #define GEN75_MI_RS_CONTEXT_length_bias 0x00000001
6261 #define GEN75_MI_RS_CONTEXT_header \
6262 .CommandType = 0, \
6263 .MICommandOpcode = 15
6264
6265 struct GEN75_MI_RS_CONTEXT {
6266 uint32_t CommandType;
6267 uint32_t MICommandOpcode;
6268 #define RS_RESTORE 0
6269 #define RS_SAVE 1
6270 uint32_t ResourceStreamerSave;
6271 };
6272
6273 static inline void
6274 GEN75_MI_RS_CONTEXT_pack(__gen_user_data *data, void * restrict dst,
6275 const struct GEN75_MI_RS_CONTEXT * restrict values)
6276 {
6277 uint32_t *dw = (uint32_t * restrict) dst;
6278
6279 dw[0] =
6280 __gen_field(values->CommandType, 29, 31) |
6281 __gen_field(values->MICommandOpcode, 23, 28) |
6282 __gen_field(values->ResourceStreamerSave, 0, 0) |
6283 0;
6284
6285 }
6286
6287 #define GEN75_MI_RS_CONTROL_length 0x00000001
6288 #define GEN75_MI_RS_CONTROL_length_bias 0x00000001
6289 #define GEN75_MI_RS_CONTROL_header \
6290 .CommandType = 0, \
6291 .MICommandOpcode = 6
6292
6293 struct GEN75_MI_RS_CONTROL {
6294 uint32_t CommandType;
6295 uint32_t MICommandOpcode;
6296 #define RS_STOP 0
6297 #define RS_START 1
6298 uint32_t ResourceStreamerControl;
6299 };
6300
6301 static inline void
6302 GEN75_MI_RS_CONTROL_pack(__gen_user_data *data, void * restrict dst,
6303 const struct GEN75_MI_RS_CONTROL * restrict values)
6304 {
6305 uint32_t *dw = (uint32_t * restrict) dst;
6306
6307 dw[0] =
6308 __gen_field(values->CommandType, 29, 31) |
6309 __gen_field(values->MICommandOpcode, 23, 28) |
6310 __gen_field(values->ResourceStreamerControl, 0, 0) |
6311 0;
6312
6313 }
6314
6315 #define GEN75_MI_RS_STORE_DATA_IMM_length 0x00000004
6316 #define GEN75_MI_RS_STORE_DATA_IMM_length_bias 0x00000002
6317 #define GEN75_MI_RS_STORE_DATA_IMM_header \
6318 .CommandType = 0, \
6319 .MICommandOpcode = 43, \
6320 .DwordLength = 2
6321
6322 struct GEN75_MI_RS_STORE_DATA_IMM {
6323 uint32_t CommandType;
6324 uint32_t MICommandOpcode;
6325 uint32_t DwordLength;
6326 __gen_address_type DestinationAddress;
6327 uint32_t CoreModeEnable;
6328 uint32_t DataDWord0;
6329 };
6330
6331 static inline void
6332 GEN75_MI_RS_STORE_DATA_IMM_pack(__gen_user_data *data, void * restrict dst,
6333 const struct GEN75_MI_RS_STORE_DATA_IMM * restrict values)
6334 {
6335 uint32_t *dw = (uint32_t * restrict) dst;
6336
6337 dw[0] =
6338 __gen_field(values->CommandType, 29, 31) |
6339 __gen_field(values->MICommandOpcode, 23, 28) |
6340 __gen_field(values->DwordLength, 0, 7) |
6341 0;
6342
6343 dw[1] =
6344 0;
6345
6346 uint32_t dw2 =
6347 __gen_field(values->CoreModeEnable, 0, 0) |
6348 0;
6349
6350 dw[2] =
6351 __gen_combine_address(data, &dw[2], values->DestinationAddress, dw2);
6352
6353 dw[3] =
6354 __gen_field(values->DataDWord0, 0, 31) |
6355 0;
6356
6357 }
6358
6359 #define GEN75_MI_SEMAPHORE_MBOX_length 0x00000003
6360 #define GEN75_MI_SEMAPHORE_MBOX_length_bias 0x00000002
6361 #define GEN75_MI_SEMAPHORE_MBOX_header \
6362 .CommandType = 0, \
6363 .MICommandOpcode = 22, \
6364 .DwordLength = 1
6365
6366 struct GEN75_MI_SEMAPHORE_MBOX {
6367 uint32_t CommandType;
6368 uint32_t MICommandOpcode;
6369 #define RVSYNC 0
6370 #define RVESYNC 1
6371 #define RBSYNC 2
6372 #define UseGeneralRegisterSelect 3
6373 uint32_t RegisterSelect;
6374 uint32_t GeneralRegisterSelect;
6375 uint32_t DwordLength;
6376 uint32_t SemaphoreDataDword;
6377 };
6378
6379 static inline void
6380 GEN75_MI_SEMAPHORE_MBOX_pack(__gen_user_data *data, void * restrict dst,
6381 const struct GEN75_MI_SEMAPHORE_MBOX * restrict values)
6382 {
6383 uint32_t *dw = (uint32_t * restrict) dst;
6384
6385 dw[0] =
6386 __gen_field(values->CommandType, 29, 31) |
6387 __gen_field(values->MICommandOpcode, 23, 28) |
6388 __gen_field(values->RegisterSelect, 16, 17) |
6389 __gen_field(values->GeneralRegisterSelect, 8, 13) |
6390 __gen_field(values->DwordLength, 0, 7) |
6391 0;
6392
6393 dw[1] =
6394 __gen_field(values->SemaphoreDataDword, 0, 31) |
6395 0;
6396
6397 dw[2] =
6398 0;
6399
6400 }
6401
6402 #define GEN75_MI_SET_CONTEXT_length 0x00000002
6403 #define GEN75_MI_SET_CONTEXT_length_bias 0x00000002
6404 #define GEN75_MI_SET_CONTEXT_header \
6405 .CommandType = 0, \
6406 .MICommandOpcode = 24, \
6407 .DwordLength = 0
6408
6409 struct GEN75_MI_SET_CONTEXT {
6410 uint32_t CommandType;
6411 uint32_t MICommandOpcode;
6412 uint32_t DwordLength;
6413 __gen_address_type LogicalContextAddress;
6414 uint32_t ReservedMustbe1;
6415 bool CoreModeEnable;
6416 bool ResourceStreamerStateSaveEnable;
6417 bool ResourceStreamerStateRestoreEnable;
6418 uint32_t ForceRestore;
6419 uint32_t RestoreInhibit;
6420 };
6421
6422 static inline void
6423 GEN75_MI_SET_CONTEXT_pack(__gen_user_data *data, void * restrict dst,
6424 const struct GEN75_MI_SET_CONTEXT * restrict values)
6425 {
6426 uint32_t *dw = (uint32_t * restrict) dst;
6427
6428 dw[0] =
6429 __gen_field(values->CommandType, 29, 31) |
6430 __gen_field(values->MICommandOpcode, 23, 28) |
6431 __gen_field(values->DwordLength, 0, 7) |
6432 0;
6433
6434 uint32_t dw1 =
6435 __gen_field(values->ReservedMustbe1, 8, 8) |
6436 __gen_field(values->CoreModeEnable, 4, 4) |
6437 __gen_field(values->ResourceStreamerStateSaveEnable, 3, 3) |
6438 __gen_field(values->ResourceStreamerStateRestoreEnable, 2, 2) |
6439 __gen_field(values->ForceRestore, 1, 1) |
6440 __gen_field(values->RestoreInhibit, 0, 0) |
6441 0;
6442
6443 dw[1] =
6444 __gen_combine_address(data, &dw[1], values->LogicalContextAddress, dw1);
6445
6446 }
6447
6448 #define GEN75_MI_SET_PREDICATE_length 0x00000001
6449 #define GEN75_MI_SET_PREDICATE_length_bias 0x00000001
6450 #define GEN75_MI_SET_PREDICATE_header \
6451 .CommandType = 0, \
6452 .MICommandOpcode = 1, \
6453 .PREDICATEENABLE = 6
6454
6455 struct GEN75_MI_SET_PREDICATE {
6456 uint32_t CommandType;
6457 uint32_t MICommandOpcode;
6458 #define PredicateAlways 0
6459 #define PredicateonClear 1
6460 #define PredicateonSet 2
6461 #define PredicateDisable 3
6462 bool PREDICATEENABLE;
6463 };
6464
6465 static inline void
6466 GEN75_MI_SET_PREDICATE_pack(__gen_user_data *data, void * restrict dst,
6467 const struct GEN75_MI_SET_PREDICATE * restrict values)
6468 {
6469 uint32_t *dw = (uint32_t * restrict) dst;
6470
6471 dw[0] =
6472 __gen_field(values->CommandType, 29, 31) |
6473 __gen_field(values->MICommandOpcode, 23, 28) |
6474 __gen_field(values->PREDICATEENABLE, 0, 1) |
6475 0;
6476
6477 }
6478
6479 #define GEN75_MI_STORE_DATA_IMM_length 0x00000004
6480 #define GEN75_MI_STORE_DATA_IMM_length_bias 0x00000002
6481 #define GEN75_MI_STORE_DATA_IMM_header \
6482 .CommandType = 0, \
6483 .MICommandOpcode = 32, \
6484 .DwordLength = 2
6485
6486 struct GEN75_MI_STORE_DATA_IMM {
6487 uint32_t CommandType;
6488 uint32_t MICommandOpcode;
6489 bool UseGlobalGTT;
6490 uint32_t DwordLength;
6491 uint32_t Address;
6492 uint32_t CoreModeEnable;
6493 uint32_t DataDWord0;
6494 uint32_t DataDWord1;
6495 };
6496
6497 static inline void
6498 GEN75_MI_STORE_DATA_IMM_pack(__gen_user_data *data, void * restrict dst,
6499 const struct GEN75_MI_STORE_DATA_IMM * restrict values)
6500 {
6501 uint32_t *dw = (uint32_t * restrict) dst;
6502
6503 dw[0] =
6504 __gen_field(values->CommandType, 29, 31) |
6505 __gen_field(values->MICommandOpcode, 23, 28) |
6506 __gen_field(values->UseGlobalGTT, 22, 22) |
6507 __gen_field(values->DwordLength, 0, 5) |
6508 0;
6509
6510 dw[1] =
6511 0;
6512
6513 dw[2] =
6514 __gen_field(values->Address, 2, 31) |
6515 __gen_field(values->CoreModeEnable, 0, 0) |
6516 0;
6517
6518 dw[3] =
6519 __gen_field(values->DataDWord0, 0, 31) |
6520 0;
6521
6522 dw[4] =
6523 __gen_field(values->DataDWord1, 0, 31) |
6524 0;
6525
6526 }
6527
6528 #define GEN75_MI_STORE_DATA_INDEX_length 0x00000003
6529 #define GEN75_MI_STORE_DATA_INDEX_length_bias 0x00000002
6530 #define GEN75_MI_STORE_DATA_INDEX_header \
6531 .CommandType = 0, \
6532 .MICommandOpcode = 33, \
6533 .DwordLength = 1
6534
6535 struct GEN75_MI_STORE_DATA_INDEX {
6536 uint32_t CommandType;
6537 uint32_t MICommandOpcode;
6538 uint32_t DwordLength;
6539 uint32_t Offset;
6540 uint32_t DataDWord0;
6541 uint32_t DataDWord1;
6542 };
6543
6544 static inline void
6545 GEN75_MI_STORE_DATA_INDEX_pack(__gen_user_data *data, void * restrict dst,
6546 const struct GEN75_MI_STORE_DATA_INDEX * restrict values)
6547 {
6548 uint32_t *dw = (uint32_t * restrict) dst;
6549
6550 dw[0] =
6551 __gen_field(values->CommandType, 29, 31) |
6552 __gen_field(values->MICommandOpcode, 23, 28) |
6553 __gen_field(values->DwordLength, 0, 7) |
6554 0;
6555
6556 dw[1] =
6557 __gen_field(values->Offset, 2, 11) |
6558 0;
6559
6560 dw[2] =
6561 __gen_field(values->DataDWord0, 0, 31) |
6562 0;
6563
6564 dw[3] =
6565 __gen_field(values->DataDWord1, 0, 31) |
6566 0;
6567
6568 }
6569
6570 #define GEN75_MI_STORE_URB_MEM_length 0x00000003
6571 #define GEN75_MI_STORE_URB_MEM_length_bias 0x00000002
6572 #define GEN75_MI_STORE_URB_MEM_header \
6573 .CommandType = 0, \
6574 .MICommandOpcode = 45, \
6575 .DwordLength = 1
6576
6577 struct GEN75_MI_STORE_URB_MEM {
6578 uint32_t CommandType;
6579 uint32_t MICommandOpcode;
6580 uint32_t DwordLength;
6581 uint32_t URBAddress;
6582 __gen_address_type MemoryAddress;
6583 };
6584
6585 static inline void
6586 GEN75_MI_STORE_URB_MEM_pack(__gen_user_data *data, void * restrict dst,
6587 const struct GEN75_MI_STORE_URB_MEM * restrict values)
6588 {
6589 uint32_t *dw = (uint32_t * restrict) dst;
6590
6591 dw[0] =
6592 __gen_field(values->CommandType, 29, 31) |
6593 __gen_field(values->MICommandOpcode, 23, 28) |
6594 __gen_field(values->DwordLength, 0, 7) |
6595 0;
6596
6597 dw[1] =
6598 __gen_field(values->URBAddress, 2, 14) |
6599 0;
6600
6601 uint32_t dw2 =
6602 0;
6603
6604 dw[2] =
6605 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
6606
6607 }
6608
6609 #define GEN75_MI_SUSPEND_FLUSH_length 0x00000001
6610 #define GEN75_MI_SUSPEND_FLUSH_length_bias 0x00000001
6611 #define GEN75_MI_SUSPEND_FLUSH_header \
6612 .CommandType = 0, \
6613 .MICommandOpcode = 11
6614
6615 struct GEN75_MI_SUSPEND_FLUSH {
6616 uint32_t CommandType;
6617 uint32_t MICommandOpcode;
6618 bool SuspendFlush;
6619 };
6620
6621 static inline void
6622 GEN75_MI_SUSPEND_FLUSH_pack(__gen_user_data *data, void * restrict dst,
6623 const struct GEN75_MI_SUSPEND_FLUSH * restrict values)
6624 {
6625 uint32_t *dw = (uint32_t * restrict) dst;
6626
6627 dw[0] =
6628 __gen_field(values->CommandType, 29, 31) |
6629 __gen_field(values->MICommandOpcode, 23, 28) |
6630 __gen_field(values->SuspendFlush, 0, 0) |
6631 0;
6632
6633 }
6634
6635 #define GEN75_MI_TOPOLOGY_FILTER_length 0x00000001
6636 #define GEN75_MI_TOPOLOGY_FILTER_length_bias 0x00000001
6637 #define GEN75_MI_TOPOLOGY_FILTER_header \
6638 .CommandType = 0, \
6639 .MICommandOpcode = 13
6640
6641 struct GEN75_MI_TOPOLOGY_FILTER {
6642 uint32_t CommandType;
6643 uint32_t MICommandOpcode;
6644 uint32_t TopologyFilterValue;
6645 };
6646
6647 static inline void
6648 GEN75_MI_TOPOLOGY_FILTER_pack(__gen_user_data *data, void * restrict dst,
6649 const struct GEN75_MI_TOPOLOGY_FILTER * restrict values)
6650 {
6651 uint32_t *dw = (uint32_t * restrict) dst;
6652
6653 dw[0] =
6654 __gen_field(values->CommandType, 29, 31) |
6655 __gen_field(values->MICommandOpcode, 23, 28) |
6656 __gen_field(values->TopologyFilterValue, 0, 5) |
6657 0;
6658
6659 }
6660
6661 #define GEN75_MI_UPDATE_GTT_length_bias 0x00000002
6662 #define GEN75_MI_UPDATE_GTT_header \
6663 .CommandType = 0, \
6664 .MICommandOpcode = 35
6665
6666 struct GEN75_MI_UPDATE_GTT {
6667 uint32_t CommandType;
6668 uint32_t MICommandOpcode;
6669 #define PerProcessGraphicsAddress 0
6670 #define GlobalGraphicsAddress 1
6671 uint32_t UseGlobalGTT;
6672 uint32_t DwordLength;
6673 __gen_address_type EntryAddress;
6674 /* variable length fields follow */
6675 };
6676
6677 static inline void
6678 GEN75_MI_UPDATE_GTT_pack(__gen_user_data *data, void * restrict dst,
6679 const struct GEN75_MI_UPDATE_GTT * restrict values)
6680 {
6681 uint32_t *dw = (uint32_t * restrict) dst;
6682
6683 dw[0] =
6684 __gen_field(values->CommandType, 29, 31) |
6685 __gen_field(values->MICommandOpcode, 23, 28) |
6686 __gen_field(values->UseGlobalGTT, 22, 22) |
6687 __gen_field(values->DwordLength, 0, 7) |
6688 0;
6689
6690 uint32_t dw1 =
6691 0;
6692
6693 dw[1] =
6694 __gen_combine_address(data, &dw[1], values->EntryAddress, dw1);
6695
6696 /* variable length fields follow */
6697 }
6698
6699 #define GEN75_MI_URB_ATOMIC_ALLOC_length 0x00000001
6700 #define GEN75_MI_URB_ATOMIC_ALLOC_length_bias 0x00000001
6701 #define GEN75_MI_URB_ATOMIC_ALLOC_header \
6702 .CommandType = 0, \
6703 .MICommandOpcode = 9
6704
6705 struct GEN75_MI_URB_ATOMIC_ALLOC {
6706 uint32_t CommandType;
6707 uint32_t MICommandOpcode;
6708 uint32_t URBAtomicStorageOffset;
6709 uint32_t URBAtomicStorageSize;
6710 };
6711
6712 static inline void
6713 GEN75_MI_URB_ATOMIC_ALLOC_pack(__gen_user_data *data, void * restrict dst,
6714 const struct GEN75_MI_URB_ATOMIC_ALLOC * restrict values)
6715 {
6716 uint32_t *dw = (uint32_t * restrict) dst;
6717
6718 dw[0] =
6719 __gen_field(values->CommandType, 29, 31) |
6720 __gen_field(values->MICommandOpcode, 23, 28) |
6721 __gen_field(values->URBAtomicStorageOffset, 12, 19) |
6722 __gen_field(values->URBAtomicStorageSize, 0, 8) |
6723 0;
6724
6725 }
6726
6727 #define GEN75_MI_URB_CLEAR_length 0x00000002
6728 #define GEN75_MI_URB_CLEAR_length_bias 0x00000002
6729 #define GEN75_MI_URB_CLEAR_header \
6730 .CommandType = 0, \
6731 .MICommandOpcode = 25, \
6732 .DwordLength = 0
6733
6734 struct GEN75_MI_URB_CLEAR {
6735 uint32_t CommandType;
6736 uint32_t MICommandOpcode;
6737 uint32_t DwordLength;
6738 uint32_t URBClearLength;
6739 uint32_t URBAddress;
6740 };
6741
6742 static inline void
6743 GEN75_MI_URB_CLEAR_pack(__gen_user_data *data, void * restrict dst,
6744 const struct GEN75_MI_URB_CLEAR * restrict values)
6745 {
6746 uint32_t *dw = (uint32_t * restrict) dst;
6747
6748 dw[0] =
6749 __gen_field(values->CommandType, 29, 31) |
6750 __gen_field(values->MICommandOpcode, 23, 28) |
6751 __gen_field(values->DwordLength, 0, 7) |
6752 0;
6753
6754 dw[1] =
6755 __gen_field(values->URBClearLength, 16, 29) |
6756 __gen_offset(values->URBAddress, 0, 14) |
6757 0;
6758
6759 }
6760
6761 #define GEN75_MI_USER_INTERRUPT_length 0x00000001
6762 #define GEN75_MI_USER_INTERRUPT_length_bias 0x00000001
6763 #define GEN75_MI_USER_INTERRUPT_header \
6764 .CommandType = 0, \
6765 .MICommandOpcode = 2
6766
6767 struct GEN75_MI_USER_INTERRUPT {
6768 uint32_t CommandType;
6769 uint32_t MICommandOpcode;
6770 };
6771
6772 static inline void
6773 GEN75_MI_USER_INTERRUPT_pack(__gen_user_data *data, void * restrict dst,
6774 const struct GEN75_MI_USER_INTERRUPT * restrict values)
6775 {
6776 uint32_t *dw = (uint32_t * restrict) dst;
6777
6778 dw[0] =
6779 __gen_field(values->CommandType, 29, 31) |
6780 __gen_field(values->MICommandOpcode, 23, 28) |
6781 0;
6782
6783 }
6784
6785 #define GEN75_MI_WAIT_FOR_EVENT_length 0x00000001
6786 #define GEN75_MI_WAIT_FOR_EVENT_length_bias 0x00000001
6787 #define GEN75_MI_WAIT_FOR_EVENT_header \
6788 .CommandType = 0, \
6789 .MICommandOpcode = 3
6790
6791 struct GEN75_MI_WAIT_FOR_EVENT {
6792 uint32_t CommandType;
6793 uint32_t MICommandOpcode;
6794 bool DisplayPipeCHorizontalBlankWaitEnable;
6795 bool DisplayPipeCVerticalBlankWaitEnable;
6796 bool DisplaySpriteCFlipPendingWaitEnable;
6797 #define Notenabled 0
6798 uint32_t ConditionCodeWaitSelect;
6799 bool DisplayPlaneCFlipPendingWaitEnable;
6800 bool DisplayPipeCScanLineWaitEnable;
6801 bool DisplayPipeBHorizontalBlankWaitEnable;
6802 bool DisplayPipeBVerticalBlankWaitEnable;
6803 bool DisplaySpriteBFlipPendingWaitEnable;
6804 bool DisplayPlaneBFlipPendingWaitEnable;
6805 bool DisplayPipeBScanLineWaitEnable;
6806 bool DisplayPipeAHorizontalBlankWaitEnable;
6807 bool DisplayPipeAVerticalBlankWaitEnable;
6808 bool DisplaySpriteAFlipPendingWaitEnable;
6809 bool DisplayPlaneAFlipPendingWaitEnable;
6810 bool DisplayPipeAScanLineWaitEnable;
6811 };
6812
6813 static inline void
6814 GEN75_MI_WAIT_FOR_EVENT_pack(__gen_user_data *data, void * restrict dst,
6815 const struct GEN75_MI_WAIT_FOR_EVENT * restrict values)
6816 {
6817 uint32_t *dw = (uint32_t * restrict) dst;
6818
6819 dw[0] =
6820 __gen_field(values->CommandType, 29, 31) |
6821 __gen_field(values->MICommandOpcode, 23, 28) |
6822 __gen_field(values->DisplayPipeCHorizontalBlankWaitEnable, 22, 22) |
6823 __gen_field(values->DisplayPipeCVerticalBlankWaitEnable, 21, 21) |
6824 __gen_field(values->DisplaySpriteCFlipPendingWaitEnable, 20, 20) |
6825 __gen_field(values->ConditionCodeWaitSelect, 16, 19) |
6826 __gen_field(values->DisplayPlaneCFlipPendingWaitEnable, 15, 15) |
6827 __gen_field(values->DisplayPipeCScanLineWaitEnable, 14, 14) |
6828 __gen_field(values->DisplayPipeBHorizontalBlankWaitEnable, 13, 13) |
6829 __gen_field(values->DisplayPipeBVerticalBlankWaitEnable, 11, 11) |
6830 __gen_field(values->DisplaySpriteBFlipPendingWaitEnable, 10, 10) |
6831 __gen_field(values->DisplayPlaneBFlipPendingWaitEnable, 9, 9) |
6832 __gen_field(values->DisplayPipeBScanLineWaitEnable, 8, 8) |
6833 __gen_field(values->DisplayPipeAHorizontalBlankWaitEnable, 5, 5) |
6834 __gen_field(values->DisplayPipeAVerticalBlankWaitEnable, 3, 3) |
6835 __gen_field(values->DisplaySpriteAFlipPendingWaitEnable, 2, 2) |
6836 __gen_field(values->DisplayPlaneAFlipPendingWaitEnable, 1, 1) |
6837 __gen_field(values->DisplayPipeAScanLineWaitEnable, 0, 0) |
6838 0;
6839
6840 }
6841
6842 #define GEN75_PIPE_CONTROL_length 0x00000005
6843 #define GEN75_PIPE_CONTROL_length_bias 0x00000002
6844 #define GEN75_PIPE_CONTROL_header \
6845 .CommandType = 3, \
6846 .CommandSubType = 3, \
6847 ._3DCommandOpcode = 2, \
6848 ._3DCommandSubOpcode = 0, \
6849 .DwordLength = 3
6850
6851 struct GEN75_PIPE_CONTROL {
6852 uint32_t CommandType;
6853 uint32_t CommandSubType;
6854 uint32_t _3DCommandOpcode;
6855 uint32_t _3DCommandSubOpcode;
6856 uint32_t DwordLength;
6857 #define DAT_PPGTT 0
6858 #define DAT_GGTT 1
6859 uint32_t DestinationAddressType;
6860 #define NoLRIOperation 0
6861 #define MMIOWriteImmediateData 1
6862 uint32_t LRIPostSyncOperation;
6863 uint32_t StoreDataIndex;
6864 uint32_t CommandStreamerStallEnable;
6865 #define DontReset 0
6866 #define Reset 1
6867 uint32_t GlobalSnapshotCountReset;
6868 uint32_t TLBInvalidate;
6869 bool GenericMediaStateClear;
6870 #define NoWrite 0
6871 #define WriteImmediateData 1
6872 #define WritePSDepthCount 2
6873 #define WriteTimestamp 3
6874 uint32_t PostSyncOperation;
6875 bool DepthStallEnable;
6876 #define DisableFlush 0
6877 #define EnableFlush 1
6878 bool RenderTargetCacheFlushEnable;
6879 bool InstructionCacheInvalidateEnable;
6880 bool TextureCacheInvalidationEnable;
6881 bool IndirectStatePointersDisable;
6882 bool NotifyEnable;
6883 bool PipeControlFlushEnable;
6884 bool DCFlushEnable;
6885 bool VFCacheInvalidationEnable;
6886 bool ConstantCacheInvalidationEnable;
6887 bool StateCacheInvalidationEnable;
6888 bool StallAtPixelScoreboard;
6889 #define FlushDisabled 0
6890 #define FlushEnabled 1
6891 bool DepthCacheFlushEnable;
6892 __gen_address_type Address;
6893 uint32_t ImmediateData;
6894 uint32_t ImmediateData0;
6895 };
6896
6897 static inline void
6898 GEN75_PIPE_CONTROL_pack(__gen_user_data *data, void * restrict dst,
6899 const struct GEN75_PIPE_CONTROL * restrict values)
6900 {
6901 uint32_t *dw = (uint32_t * restrict) dst;
6902
6903 dw[0] =
6904 __gen_field(values->CommandType, 29, 31) |
6905 __gen_field(values->CommandSubType, 27, 28) |
6906 __gen_field(values->_3DCommandOpcode, 24, 26) |
6907 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
6908 __gen_field(values->DwordLength, 0, 7) |
6909 0;
6910
6911 dw[1] =
6912 __gen_field(values->DestinationAddressType, 24, 24) |
6913 __gen_field(values->LRIPostSyncOperation, 23, 23) |
6914 __gen_field(values->StoreDataIndex, 21, 21) |
6915 __gen_field(values->CommandStreamerStallEnable, 20, 20) |
6916 __gen_field(values->GlobalSnapshotCountReset, 19, 19) |
6917 __gen_field(values->TLBInvalidate, 18, 18) |
6918 __gen_field(values->GenericMediaStateClear, 16, 16) |
6919 __gen_field(values->PostSyncOperation, 14, 15) |
6920 __gen_field(values->DepthStallEnable, 13, 13) |
6921 __gen_field(values->RenderTargetCacheFlushEnable, 12, 12) |
6922 __gen_field(values->InstructionCacheInvalidateEnable, 11, 11) |
6923 __gen_field(values->TextureCacheInvalidationEnable, 10, 10) |
6924 __gen_field(values->IndirectStatePointersDisable, 9, 9) |
6925 __gen_field(values->NotifyEnable, 8, 8) |
6926 __gen_field(values->PipeControlFlushEnable, 7, 7) |
6927 __gen_field(values->DCFlushEnable, 5, 5) |
6928 __gen_field(values->VFCacheInvalidationEnable, 4, 4) |
6929 __gen_field(values->ConstantCacheInvalidationEnable, 3, 3) |
6930 __gen_field(values->StateCacheInvalidationEnable, 2, 2) |
6931 __gen_field(values->StallAtPixelScoreboard, 1, 1) |
6932 __gen_field(values->DepthCacheFlushEnable, 0, 0) |
6933 0;
6934
6935 uint32_t dw2 =
6936 0;
6937
6938 dw[2] =
6939 __gen_combine_address(data, &dw[2], values->Address, dw2);
6940
6941 dw[3] =
6942 __gen_field(values->ImmediateData, 0, 31) |
6943 0;
6944
6945 dw[4] =
6946 __gen_field(values->ImmediateData, 0, 31) |
6947 0;
6948
6949 }
6950
6951 #define GEN75_3DSTATE_CONSTANT_BODY_length 0x00000006
6952
6953 #define GEN75_BINDING_TABLE_EDIT_ENTRY_length 0x00000001
6954
6955 #define GEN75_GATHER_CONSTANT_ENTRY_length 0x00000001
6956
6957 #define GEN75_VERTEX_BUFFER_STATE_length 0x00000004
6958
6959 #define GEN75_VERTEX_ELEMENT_STATE_length 0x00000002
6960
6961 #define GEN75_SO_DECL_ENTRY_length 0x00000002
6962
6963 #define GEN75_SO_DECL_length 0x00000001
6964
6965 #define GEN75_SCISSOR_RECT_length 0x00000002
6966
6967 struct GEN75_SCISSOR_RECT {
6968 uint32_t ScissorRectangleYMin;
6969 uint32_t ScissorRectangleXMin;
6970 uint32_t ScissorRectangleYMax;
6971 uint32_t ScissorRectangleXMax;
6972 };
6973
6974 static inline void
6975 GEN75_SCISSOR_RECT_pack(__gen_user_data *data, void * restrict dst,
6976 const struct GEN75_SCISSOR_RECT * restrict values)
6977 {
6978 uint32_t *dw = (uint32_t * restrict) dst;
6979
6980 dw[0] =
6981 __gen_field(values->ScissorRectangleYMin, 16, 31) |
6982 __gen_field(values->ScissorRectangleXMin, 0, 15) |
6983 0;
6984
6985 dw[1] =
6986 __gen_field(values->ScissorRectangleYMax, 16, 31) |
6987 __gen_field(values->ScissorRectangleXMax, 0, 15) |
6988 0;
6989
6990 }
6991
6992 #define GEN75_SF_CLIP_VIEWPORT_length 0x00000010
6993
6994 struct GEN75_SF_CLIP_VIEWPORT {
6995 float ViewportMatrixElementm00;
6996 float ViewportMatrixElementm11;
6997 float ViewportMatrixElementm22;
6998 float ViewportMatrixElementm30;
6999 float ViewportMatrixElementm31;
7000 float ViewportMatrixElementm32;
7001 float XMinClipGuardband;
7002 float XMaxClipGuardband;
7003 float YMinClipGuardband;
7004 float YMaxClipGuardband;
7005 };
7006
7007 static inline void
7008 GEN75_SF_CLIP_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
7009 const struct GEN75_SF_CLIP_VIEWPORT * restrict values)
7010 {
7011 uint32_t *dw = (uint32_t * restrict) dst;
7012
7013 dw[0] =
7014 __gen_float(values->ViewportMatrixElementm00) |
7015 0;
7016
7017 dw[1] =
7018 __gen_float(values->ViewportMatrixElementm11) |
7019 0;
7020
7021 dw[2] =
7022 __gen_float(values->ViewportMatrixElementm22) |
7023 0;
7024
7025 dw[3] =
7026 __gen_float(values->ViewportMatrixElementm30) |
7027 0;
7028
7029 dw[4] =
7030 __gen_float(values->ViewportMatrixElementm31) |
7031 0;
7032
7033 dw[5] =
7034 __gen_float(values->ViewportMatrixElementm32) |
7035 0;
7036
7037 dw[6] =
7038 0;
7039
7040 dw[7] =
7041 0;
7042
7043 dw[8] =
7044 __gen_float(values->XMinClipGuardband) |
7045 0;
7046
7047 dw[9] =
7048 __gen_float(values->XMaxClipGuardband) |
7049 0;
7050
7051 dw[10] =
7052 __gen_float(values->YMinClipGuardband) |
7053 0;
7054
7055 dw[11] =
7056 __gen_float(values->YMaxClipGuardband) |
7057 0;
7058
7059 dw[12] =
7060 0;
7061
7062 }
7063
7064 #define GEN75_BLEND_STATE_length 0x00000002
7065
7066 struct GEN75_BLEND_STATE {
7067 bool ColorBufferBlendEnable;
7068 bool IndependentAlphaBlendEnable;
7069 #define BLENDFUNCTION_ADD 0
7070 #define BLENDFUNCTION_SUBTRACT 1
7071 #define BLENDFUNCTION_REVERSE_SUBTRACT 2
7072 #define BLENDFUNCTION_MIN 3
7073 #define BLENDFUNCTION_MAX 4
7074 uint32_t AlphaBlendFunction;
7075 #define BLENDFACTOR_ONE 1
7076 #define BLENDFACTOR_SRC_COLOR 2
7077 #define BLENDFACTOR_SRC_ALPHA 3
7078 #define BLENDFACTOR_DST_ALPHA 4
7079 #define BLENDFACTOR_DST_COLOR 5
7080 #define BLENDFACTOR_SRC_ALPHA_SATURATE 6
7081 #define BLENDFACTOR_CONST_COLOR 7
7082 #define BLENDFACTOR_CONST_ALPHA 8
7083 #define BLENDFACTOR_SRC1_COLOR 9
7084 #define BLENDFACTOR_SRC1_ALPHA 10
7085 #define BLENDFACTOR_ZERO 17
7086 #define BLENDFACTOR_INV_SRC_COLOR 18
7087 #define BLENDFACTOR_INV_SRC_ALPHA 19
7088 #define BLENDFACTOR_INV_DST_ALPHA 20
7089 #define BLENDFACTOR_INV_DST_COLOR 21
7090 #define BLENDFACTOR_INV_CONST_COLOR 23
7091 #define BLENDFACTOR_INV_CONST_ALPHA 24
7092 #define BLENDFACTOR_INV_SRC1_COLOR 25
7093 #define BLENDFACTOR_INV_SRC1_ALPHA 26
7094 uint32_t SourceAlphaBlendFactor;
7095 uint32_t DestinationAlphaBlendFactor;
7096 #define BLENDFUNCTION_ADD 0
7097 #define BLENDFUNCTION_SUBTRACT 1
7098 #define BLENDFUNCTION_REVERSE_SUBTRACT 2
7099 #define BLENDFUNCTION_MIN 3
7100 #define BLENDFUNCTION_MAX 4
7101 uint32_t ColorBlendFunction;
7102 uint32_t SourceBlendFactor;
7103 uint32_t DestinationBlendFactor;
7104 bool AlphaToCoverageEnable;
7105 bool AlphaToOneEnable;
7106 bool AlphaToCoverageDitherEnable;
7107 bool WriteDisableAlpha;
7108 bool WriteDisableRed;
7109 bool WriteDisableGreen;
7110 bool WriteDisableBlue;
7111 bool LogicOpEnable;
7112 #define LOGICOP_CLEAR 0
7113 #define LOGICOP_NOR 1
7114 #define LOGICOP_AND_INVERTED 2
7115 #define LOGICOP_COPY_INVERTED 3
7116 #define LOGICOP_AND_REVERSE 4
7117 #define LOGICOP_INVERT 5
7118 #define LOGICOP_XOR 6
7119 #define LOGICOP_NAND 7
7120 #define LOGICOP_AND 8
7121 #define LOGICOP_EQUIV 9
7122 #define LOGICOP_NOOP 10
7123 #define LOGICOP_OR_INVERTED 11
7124 #define LOGICOP_COPY 12
7125 #define LOGICOP_OR_REVERSE 13
7126 #define LOGICOP_OR 14
7127 #define LOGICOP_SET 15
7128 uint32_t LogicOpFunction;
7129 bool AlphaTestEnable;
7130 #define COMPAREFUNCTION_ALWAYS 0
7131 #define COMPAREFUNCTION_NEVER 1
7132 #define COMPAREFUNCTION_LESS 2
7133 #define COMPAREFUNCTION_EQUAL 3
7134 #define COMPAREFUNCTION_LEQUAL 4
7135 #define COMPAREFUNCTION_GREATER 5
7136 #define COMPAREFUNCTION_NOTEQUAL 6
7137 #define COMPAREFUNCTION_GEQUAL 7
7138 uint32_t AlphaTestFunction;
7139 bool ColorDitherEnable;
7140 uint32_t XDitherOffset;
7141 uint32_t YDitherOffset;
7142 #define COLORCLAMP_UNORM 0
7143 #define COLORCLAMP_SNORM 1
7144 #define COLORCLAMP_RTFORMAT 2
7145 uint32_t ColorClampRange;
7146 bool PreBlendColorClampEnable;
7147 bool PostBlendColorClampEnable;
7148 };
7149
7150 static inline void
7151 GEN75_BLEND_STATE_pack(__gen_user_data *data, void * restrict dst,
7152 const struct GEN75_BLEND_STATE * restrict values)
7153 {
7154 uint32_t *dw = (uint32_t * restrict) dst;
7155
7156 dw[0] =
7157 __gen_field(values->ColorBufferBlendEnable, 31, 31) |
7158 __gen_field(values->IndependentAlphaBlendEnable, 30, 30) |
7159 __gen_field(values->AlphaBlendFunction, 26, 28) |
7160 __gen_field(values->SourceAlphaBlendFactor, 20, 24) |
7161 __gen_field(values->DestinationAlphaBlendFactor, 15, 19) |
7162 __gen_field(values->ColorBlendFunction, 11, 13) |
7163 __gen_field(values->SourceBlendFactor, 5, 9) |
7164 __gen_field(values->DestinationBlendFactor, 0, 4) |
7165 0;
7166
7167 dw[1] =
7168 __gen_field(values->AlphaToCoverageEnable, 31, 31) |
7169 __gen_field(values->AlphaToOneEnable, 30, 30) |
7170 __gen_field(values->AlphaToCoverageDitherEnable, 29, 29) |
7171 __gen_field(values->WriteDisableAlpha, 27, 27) |
7172 __gen_field(values->WriteDisableRed, 26, 26) |
7173 __gen_field(values->WriteDisableGreen, 25, 25) |
7174 __gen_field(values->WriteDisableBlue, 24, 24) |
7175 __gen_field(values->LogicOpEnable, 22, 22) |
7176 __gen_field(values->LogicOpFunction, 18, 21) |
7177 __gen_field(values->AlphaTestEnable, 16, 16) |
7178 __gen_field(values->AlphaTestFunction, 13, 15) |
7179 __gen_field(values->ColorDitherEnable, 12, 12) |
7180 __gen_field(values->XDitherOffset, 10, 11) |
7181 __gen_field(values->YDitherOffset, 8, 9) |
7182 __gen_field(values->ColorClampRange, 2, 3) |
7183 __gen_field(values->PreBlendColorClampEnable, 1, 1) |
7184 __gen_field(values->PostBlendColorClampEnable, 0, 0) |
7185 0;
7186
7187 }
7188
7189 #define GEN75_CC_VIEWPORT_length 0x00000002
7190
7191 struct GEN75_CC_VIEWPORT {
7192 float MinimumDepth;
7193 float MaximumDepth;
7194 };
7195
7196 static inline void
7197 GEN75_CC_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
7198 const struct GEN75_CC_VIEWPORT * restrict values)
7199 {
7200 uint32_t *dw = (uint32_t * restrict) dst;
7201
7202 dw[0] =
7203 __gen_float(values->MinimumDepth) |
7204 0;
7205
7206 dw[1] =
7207 __gen_float(values->MaximumDepth) |
7208 0;
7209
7210 }
7211
7212 #define GEN75_COLOR_CALC_STATE_length 0x00000006
7213
7214 struct GEN75_COLOR_CALC_STATE {
7215 uint32_t StencilReferenceValue;
7216 uint32_t BackFaceStencilReferenceValue;
7217 #define Cancelled 0
7218 #define NotCancelled 1
7219 uint32_t RoundDisableFunctionDisable;
7220 #define ALPHATEST_UNORM8 0
7221 #define ALPHATEST_FLOAT32 1
7222 uint32_t AlphaTestFormat;
7223 uint32_t AlphaReferenceValueAsUNORM8;
7224 float AlphaReferenceValueAsFLOAT32;
7225 float BlendConstantColorRed;
7226 float BlendConstantColorGreen;
7227 float BlendConstantColorBlue;
7228 float BlendConstantColorAlpha;
7229 };
7230
7231 static inline void
7232 GEN75_COLOR_CALC_STATE_pack(__gen_user_data *data, void * restrict dst,
7233 const struct GEN75_COLOR_CALC_STATE * restrict values)
7234 {
7235 uint32_t *dw = (uint32_t * restrict) dst;
7236
7237 dw[0] =
7238 __gen_field(values->StencilReferenceValue, 24, 31) |
7239 __gen_field(values->BackFaceStencilReferenceValue, 16, 23) |
7240 __gen_field(values->RoundDisableFunctionDisable, 15, 15) |
7241 __gen_field(values->AlphaTestFormat, 0, 0) |
7242 0;
7243
7244 dw[1] =
7245 __gen_field(values->AlphaReferenceValueAsUNORM8, 0, 31) |
7246 __gen_float(values->AlphaReferenceValueAsFLOAT32) |
7247 0;
7248
7249 dw[2] =
7250 __gen_float(values->BlendConstantColorRed) |
7251 0;
7252
7253 dw[3] =
7254 __gen_float(values->BlendConstantColorGreen) |
7255 0;
7256
7257 dw[4] =
7258 __gen_float(values->BlendConstantColorBlue) |
7259 0;
7260
7261 dw[5] =
7262 __gen_float(values->BlendConstantColorAlpha) |
7263 0;
7264
7265 }
7266
7267 #define GEN75_DEPTH_STENCIL_STATE_length 0x00000003
7268
7269 struct GEN75_DEPTH_STENCIL_STATE {
7270 bool StencilTestEnable;
7271 #define COMPAREFUNCTION_ALWAYS 0
7272 #define COMPAREFUNCTION_NEVER 1
7273 #define COMPAREFUNCTION_LESS 2
7274 #define COMPAREFUNCTION_EQUAL 3
7275 #define COMPAREFUNCTION_LEQUAL 4
7276 #define COMPAREFUNCTION_GREATER 5
7277 #define COMPAREFUNCTION_NOTEQUAL 6
7278 #define COMPAREFUNCTION_GEQUAL 7
7279 uint32_t StencilTestFunction;
7280 #define STENCILOP_KEEP 0
7281 #define STENCILOP_ZERO 1
7282 #define STENCILOP_REPLACE 2
7283 #define STENCILOP_INCRSAT 3
7284 #define STENCILOP_DECRSAT 4
7285 #define STENCILOP_INCR 5
7286 #define STENCILOP_DECR 6
7287 #define STENCILOP_INVERT 7
7288 uint32_t StencilFailOp;
7289 uint32_t StencilPassDepthFailOp;
7290 uint32_t StencilPassDepthPassOp;
7291 bool StencilBufferWriteEnable;
7292 bool DoubleSidedStencilEnable;
7293 #define COMPAREFUNCTION_ALWAYS 0
7294 #define COMPAREFUNCTION_NEVER 1
7295 #define COMPAREFUNCTION_LESS 2
7296 #define COMPAREFUNCTION_EQUAL 3
7297 #define COMPAREFUNCTION_LEQUAL 4
7298 #define COMPAREFUNCTION_GREATER 5
7299 #define COMPAREFUNCTION_NOTEQUAL 6
7300 #define COMPAREFUNCTION_GEQUAL 7
7301 uint32_t BackFaceStencilTestFunction;
7302 #define STENCILOP_KEEP 0
7303 #define STENCILOP_ZERO 1
7304 #define STENCILOP_REPLACE 2
7305 #define STENCILOP_INCRSAT 3
7306 #define STENCILOP_DECRSAT 4
7307 #define STENCILOP_INCR 5
7308 #define STENCILOP_DECR 6
7309 #define STENCILOP_INVERT 7
7310 uint32_t BackfaceStencilFailOp;
7311 uint32_t BackfaceStencilPassDepthFailOp;
7312 uint32_t BackfaceStencilPassDepthPassOp;
7313 uint32_t StencilTestMask;
7314 uint32_t StencilWriteMask;
7315 uint32_t BackfaceStencilTestMask;
7316 uint32_t BackfaceStencilWriteMask;
7317 bool DepthTestEnable;
7318 #define COMPAREFUNCTION_ALWAYS 0
7319 #define COMPAREFUNCTION_NEVER 1
7320 #define COMPAREFUNCTION_LESS 2
7321 #define COMPAREFUNCTION_EQUAL 3
7322 #define COMPAREFUNCTION_LEQUAL 4
7323 #define COMPAREFUNCTION_GREATER 5
7324 #define COMPAREFUNCTION_NOTEQUAL 6
7325 #define COMPAREFUNCTION_GEQUAL 7
7326 uint32_t DepthTestFunction;
7327 bool DepthBufferWriteEnable;
7328 };
7329
7330 static inline void
7331 GEN75_DEPTH_STENCIL_STATE_pack(__gen_user_data *data, void * restrict dst,
7332 const struct GEN75_DEPTH_STENCIL_STATE * restrict values)
7333 {
7334 uint32_t *dw = (uint32_t * restrict) dst;
7335
7336 dw[0] =
7337 __gen_field(values->StencilTestEnable, 31, 31) |
7338 __gen_field(values->StencilTestFunction, 28, 30) |
7339 __gen_field(values->StencilFailOp, 25, 27) |
7340 __gen_field(values->StencilPassDepthFailOp, 22, 24) |
7341 __gen_field(values->StencilPassDepthPassOp, 19, 21) |
7342 __gen_field(values->StencilBufferWriteEnable, 18, 18) |
7343 __gen_field(values->DoubleSidedStencilEnable, 15, 15) |
7344 __gen_field(values->BackFaceStencilTestFunction, 12, 14) |
7345 __gen_field(values->BackfaceStencilFailOp, 9, 11) |
7346 __gen_field(values->BackfaceStencilPassDepthFailOp, 6, 8) |
7347 __gen_field(values->BackfaceStencilPassDepthPassOp, 3, 5) |
7348 0;
7349
7350 dw[1] =
7351 __gen_field(values->StencilTestMask, 24, 31) |
7352 __gen_field(values->StencilWriteMask, 16, 23) |
7353 __gen_field(values->BackfaceStencilTestMask, 8, 15) |
7354 __gen_field(values->BackfaceStencilWriteMask, 0, 7) |
7355 0;
7356
7357 dw[2] =
7358 __gen_field(values->DepthTestEnable, 31, 31) |
7359 __gen_field(values->DepthTestFunction, 27, 29) |
7360 __gen_field(values->DepthBufferWriteEnable, 26, 26) |
7361 0;
7362
7363 }
7364
7365 #define GEN75_MEMORY_OBJECT_CONTROL_STATE_length 0x00000001
7366
7367 #define GEN75_VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_length 0x00000001
7368
7369 struct GEN75_VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS {
7370 #define Highestpriority 0
7371 #define Secondhighestpriority 1
7372 #define Thirdhighestpriority 2
7373 #define Lowestpriority 3
7374 uint32_t ArbitrationPriorityControl;
7375 #define PTE 0
7376 #define UC 1
7377 #define LLCeLLCWBcacheable 2
7378 #define eLLCWBcacheable 3
7379 uint32_t LLCeLLCCacheabilityControlLLCCC;
7380 uint32_t L3CacheabilityControlL3CC;
7381 };
7382
7383 static inline void
7384 GEN75_VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_pack(__gen_user_data *data, void * restrict dst,
7385 const struct GEN75_VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS * restrict values)
7386 {
7387 uint32_t *dw = (uint32_t * restrict) dst;
7388
7389 dw[0] =
7390 __gen_field(values->ArbitrationPriorityControl, 4, 5) |
7391 __gen_field(values->LLCeLLCCacheabilityControlLLCCC, 1, 2) |
7392 __gen_field(values->L3CacheabilityControlL3CC, 0, 0) |
7393 0;
7394
7395 }
7396
7397 #define GEN75_INTERFACE_DESCRIPTOR_DATA_length 0x00000008
7398
7399 struct GEN75_INTERFACE_DESCRIPTOR_DATA {
7400 uint32_t KernelStartPointer;
7401 #define Multiple 0
7402 #define Single 1
7403 uint32_t SingleProgramFlow;
7404 #define NormalPriority 0
7405 #define HighPriority 1
7406 uint32_t ThreadPriority;
7407 #define IEEE754 0
7408 #define Alternate 1
7409 uint32_t FloatingPointMode;
7410 bool IllegalOpcodeExceptionEnable;
7411 bool MaskStackExceptionEnable;
7412 bool SoftwareExceptionEnable;
7413 uint32_t SamplerStatePointer;
7414 #define Nosamplersused 0
7415 #define Between1and4samplersused 1
7416 #define Between5and8samplersused 2
7417 #define Between9and12samplersused 3
7418 #define Between13and16samplersused 4
7419 uint32_t SamplerCount;
7420 uint32_t BindingTablePointer;
7421 uint32_t BindingTableEntryCount;
7422 uint32_t ConstantURBEntryReadLength;
7423 #define RTNE 0
7424 #define RU 1
7425 #define RD 2
7426 #define RTZ 3
7427 uint32_t RoundingMode;
7428 bool BarrierEnable;
7429 uint32_t SharedLocalMemorySize;
7430 uint32_t NumberofThreadsinGPGPUThreadGroup;
7431 uint32_t CrossThreadConstantDataReadLength;
7432 };
7433
7434 static inline void
7435 GEN75_INTERFACE_DESCRIPTOR_DATA_pack(__gen_user_data *data, void * restrict dst,
7436 const struct GEN75_INTERFACE_DESCRIPTOR_DATA * restrict values)
7437 {
7438 uint32_t *dw = (uint32_t * restrict) dst;
7439
7440 dw[0] =
7441 __gen_offset(values->KernelStartPointer, 6, 31) |
7442 0;
7443
7444 dw[1] =
7445 __gen_field(values->SingleProgramFlow, 18, 18) |
7446 __gen_field(values->ThreadPriority, 17, 17) |
7447 __gen_field(values->FloatingPointMode, 16, 16) |
7448 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
7449 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
7450 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
7451 0;
7452
7453 dw[2] =
7454 __gen_offset(values->SamplerStatePointer, 5, 31) |
7455 __gen_field(values->SamplerCount, 2, 4) |
7456 0;
7457
7458 dw[3] =
7459 __gen_offset(values->BindingTablePointer, 5, 15) |
7460 __gen_field(values->BindingTableEntryCount, 0, 4) |
7461 0;
7462
7463 dw[4] =
7464 __gen_field(values->ConstantURBEntryReadLength, 16, 31) |
7465 0;
7466
7467 dw[5] =
7468 __gen_field(values->RoundingMode, 22, 23) |
7469 __gen_field(values->BarrierEnable, 21, 21) |
7470 __gen_field(values->SharedLocalMemorySize, 16, 20) |
7471 __gen_field(values->NumberofThreadsinGPGPUThreadGroup, 0, 7) |
7472 0;
7473
7474 dw[6] =
7475 __gen_field(values->CrossThreadConstantDataReadLength, 0, 7) |
7476 0;
7477
7478 dw[7] =
7479 0;
7480
7481 }
7482
7483 #define GEN75_PALETTE_ENTRY_length 0x00000001
7484
7485 #define GEN75_BINDING_TABLE_STATE_length 0x00000001
7486
7487 struct GEN75_BINDING_TABLE_STATE {
7488 uint32_t SurfaceStatePointer;
7489 };
7490
7491 static inline void
7492 GEN75_BINDING_TABLE_STATE_pack(__gen_user_data *data, void * restrict dst,
7493 const struct GEN75_BINDING_TABLE_STATE * restrict values)
7494 {
7495 uint32_t *dw = (uint32_t * restrict) dst;
7496
7497 dw[0] =
7498 __gen_offset(values->SurfaceStatePointer, 5, 31) |
7499 0;
7500
7501 }
7502
7503 #define GEN75_RENDER_SURFACE_STATE_length 0x00000008
7504
7505 struct GEN75_RENDER_SURFACE_STATE {
7506 #define SURFTYPE_1D 0
7507 #define SURFTYPE_2D 1
7508 #define SURFTYPE_3D 2
7509 #define SURFTYPE_CUBE 3
7510 #define SURFTYPE_BUFFER 4
7511 #define SURFTYPE_STRBUF 5
7512 #define SURFTYPE_NULL 7
7513 uint32_t SurfaceType;
7514 bool SurfaceArray;
7515 uint32_t SurfaceFormat;
7516 uint32_t SurfaceVerticalAlignment;
7517 #define HALIGN_4 0
7518 #define HALIGN_8 1
7519 uint32_t SurfaceHorizontalAlignment;
7520 uint32_t TiledSurface;
7521 #define TILEWALK_XMAJOR 0
7522 #define TILEWALK_YMAJOR 1
7523 uint32_t TileWalk;
7524 uint32_t VerticalLineStride;
7525 uint32_t VerticalLineStrideOffset;
7526 #define ARYSPC_FULL 0
7527 #define ARYSPC_LOD0 1
7528 uint32_t SurfaceArraySpacing;
7529 uint32_t RenderCacheReadWriteMode;
7530 #define NORMAL_MODE 0
7531 #define PROGRESSIVE_FRAME 2
7532 #define INTERLACED_FRAME 3
7533 uint32_t MediaBoundaryPixelMode;
7534 uint32_t CubeFaceEnables;
7535 __gen_address_type SurfaceBaseAddress;
7536 uint32_t Height;
7537 uint32_t Width;
7538 uint32_t Depth;
7539 uint32_t IntegerSurfaceFormat;
7540 uint32_t SurfacePitch;
7541 #define RTROTATE_0DEG 0
7542 #define RTROTATE_90DEG 1
7543 #define RTROTATE_270DEG 3
7544 uint32_t RenderTargetRotation;
7545 uint32_t MinimumArrayElement;
7546 uint32_t RenderTargetViewExtent;
7547 #define MSFMT_MSS 0
7548 #define MSFMT_DEPTH_STENCIL 1
7549 uint32_t MultisampledSurfaceStorageFormat;
7550 #define MULTISAMPLECOUNT_1 0
7551 #define MULTISAMPLECOUNT_4 2
7552 #define MULTISAMPLECOUNT_8 3
7553 uint32_t NumberofMultisamples;
7554 uint32_t MultisamplePositionPaletteIndex;
7555 uint32_t MinimumArrayElement0;
7556 uint32_t XOffset;
7557 uint32_t YOffset;
7558 struct GEN75_MEMORY_OBJECT_CONTROL_STATE SurfaceObjectControlState;
7559 uint32_t SurfaceMinLOD;
7560 uint32_t MIPCountLOD;
7561 __gen_address_type MCSBaseAddress;
7562 uint32_t MCSSurfacePitch;
7563 __gen_address_type AppendCounterAddress;
7564 bool AppendCounterEnable;
7565 bool MCSEnable;
7566 uint32_t ReservedMBZ;
7567 uint32_t XOffsetforUVPlane;
7568 uint32_t YOffsetforUVPlane;
7569 #define SCS_ZERO 0
7570 #define SCS_ONE 1
7571 #define SCS_RED 4
7572 #define SCS_GREEN 5
7573 #define SCS_BLUE 6
7574 #define SCS_ALPHA 7
7575 uint32_t ShaderChannelSelectR;
7576 uint32_t ShaderChannelSelectG;
7577 uint32_t ShaderChannelSelectB;
7578 uint32_t ShaderChannelSelectA;
7579 float ResourceMinLOD;
7580 };
7581
7582 static inline void
7583 GEN75_RENDER_SURFACE_STATE_pack(__gen_user_data *data, void * restrict dst,
7584 const struct GEN75_RENDER_SURFACE_STATE * restrict values)
7585 {
7586 uint32_t *dw = (uint32_t * restrict) dst;
7587
7588 dw[0] =
7589 __gen_field(values->SurfaceType, 29, 31) |
7590 __gen_field(values->SurfaceArray, 28, 28) |
7591 __gen_field(values->SurfaceFormat, 18, 26) |
7592 __gen_field(values->SurfaceVerticalAlignment, 16, 17) |
7593 __gen_field(values->SurfaceHorizontalAlignment, 15, 15) |
7594 __gen_field(values->TiledSurface, 14, 14) |
7595 __gen_field(values->TileWalk, 13, 13) |
7596 __gen_field(values->VerticalLineStride, 12, 12) |
7597 __gen_field(values->VerticalLineStrideOffset, 11, 11) |
7598 __gen_field(values->SurfaceArraySpacing, 10, 10) |
7599 __gen_field(values->RenderCacheReadWriteMode, 8, 8) |
7600 __gen_field(values->MediaBoundaryPixelMode, 6, 7) |
7601 __gen_field(values->CubeFaceEnables, 0, 5) |
7602 0;
7603
7604 uint32_t dw1 =
7605 0;
7606
7607 dw[1] =
7608 __gen_combine_address(data, &dw[1], values->SurfaceBaseAddress, dw1);
7609
7610 dw[2] =
7611 __gen_field(values->Height, 16, 29) |
7612 __gen_field(values->Width, 0, 13) |
7613 0;
7614
7615 dw[3] =
7616 __gen_field(values->Depth, 21, 31) |
7617 __gen_field(values->IntegerSurfaceFormat, 18, 20) |
7618 __gen_field(values->SurfacePitch, 0, 17) |
7619 0;
7620
7621 dw[4] =
7622 __gen_field(values->RenderTargetRotation, 29, 30) |
7623 __gen_field(values->MinimumArrayElement, 18, 28) |
7624 __gen_field(values->RenderTargetViewExtent, 7, 17) |
7625 __gen_field(values->MultisampledSurfaceStorageFormat, 6, 6) |
7626 __gen_field(values->NumberofMultisamples, 3, 5) |
7627 __gen_field(values->MultisamplePositionPaletteIndex, 0, 2) |
7628 __gen_field(values->MinimumArrayElement, 0, 26) |
7629 0;
7630
7631 uint32_t dw_SurfaceObjectControlState;
7632 GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceObjectControlState, &values->SurfaceObjectControlState);
7633 dw[5] =
7634 __gen_offset(values->XOffset, 25, 31) |
7635 __gen_offset(values->YOffset, 20, 23) |
7636 __gen_field(dw_SurfaceObjectControlState, 16, 19) |
7637 __gen_field(values->SurfaceMinLOD, 4, 7) |
7638 __gen_field(values->MIPCountLOD, 0, 3) |
7639 0;
7640
7641 uint32_t dw6 =
7642 __gen_field(values->MCSSurfacePitch, 3, 11) |
7643 __gen_field(values->AppendCounterEnable, 1, 1) |
7644 __gen_field(values->MCSEnable, 0, 0) |
7645 __gen_field(values->ReservedMBZ, 30, 31) |
7646 __gen_field(values->XOffsetforUVPlane, 16, 29) |
7647 __gen_field(values->YOffsetforUVPlane, 0, 13) |
7648 0;
7649
7650 dw[6] =
7651 __gen_combine_address(data, &dw[6], values->AppendCounterAddress, dw6);
7652
7653 dw[7] =
7654 __gen_field(values->ShaderChannelSelectR, 25, 27) |
7655 __gen_field(values->ShaderChannelSelectG, 22, 24) |
7656 __gen_field(values->ShaderChannelSelectB, 19, 21) |
7657 __gen_field(values->ShaderChannelSelectA, 16, 18) |
7658 __gen_field(values->ResourceMinLOD * (1 << 8), 0, 11) |
7659 0;
7660
7661 }
7662
7663 #define GEN75_SAMPLER_BORDER_COLOR_STATE_length 0x00000014
7664
7665 struct GEN75_SAMPLER_BORDER_COLOR_STATE {
7666 uint32_t BorderColorRedDX100GL;
7667 uint32_t BorderColorAlpha;
7668 uint32_t BorderColorBlue;
7669 uint32_t BorderColorGreen;
7670 uint32_t BorderColorRedDX9;
7671 uint32_t BorderColorGreen0;
7672 uint32_t BorderColorBlue0;
7673 uint32_t BorderColorAlpha0;
7674 uint64_t BorderColor;
7675 uint64_t BorderColor0;
7676 uint64_t BorderColor1;
7677 };
7678
7679 static inline void
7680 GEN75_SAMPLER_BORDER_COLOR_STATE_pack(__gen_user_data *data, void * restrict dst,
7681 const struct GEN75_SAMPLER_BORDER_COLOR_STATE * restrict values)
7682 {
7683 uint32_t *dw = (uint32_t * restrict) dst;
7684
7685 dw[0] =
7686 __gen_field(values->BorderColorRedDX100GL, 0, 31) |
7687 __gen_field(values->BorderColorAlpha, 24, 31) |
7688 __gen_field(values->BorderColorBlue, 16, 23) |
7689 __gen_field(values->BorderColorGreen, 8, 15) |
7690 __gen_field(values->BorderColorRedDX9, 0, 7) |
7691 0;
7692
7693 dw[1] =
7694 __gen_field(values->BorderColorGreen, 0, 31) |
7695 0;
7696
7697 dw[2] =
7698 __gen_field(values->BorderColorBlue, 0, 31) |
7699 0;
7700
7701 dw[3] =
7702 __gen_field(values->BorderColorAlpha, 0, 31) |
7703 0;
7704
7705 dw[4] =
7706 0;
7707
7708 dw[16] =
7709 __gen_field(values->BorderColor, 0, 127) |
7710 __gen_field(values->BorderColor, 0, 127) |
7711 __gen_field(values->BorderColor, 0, 127) |
7712 0;
7713
7714 }
7715
7716 #define GEN75_SAMPLER_STATE_length 0x00000004
7717
7718 struct GEN75_SAMPLER_STATE {
7719 bool SamplerDisable;
7720 #define DX10OGL 0
7721 #define DX9 1
7722 uint32_t TextureBorderColorMode;
7723 #define OGL 1
7724 uint32_t LODPreClampEnable;
7725 float BaseMipLevel;
7726 #define MIPFILTER_NONE 0
7727 #define MIPFILTER_NEAREST 1
7728 #define MIPFILTER_LINEAR 3
7729 uint32_t MipModeFilter;
7730 #define MAPFILTER_NEAREST 0
7731 #define MAPFILTER_LINEAR 1
7732 #define MAPFILTER_ANISOTROPIC 2
7733 #define MAPFILTER_MONO 6
7734 uint32_t MagModeFilter;
7735 #define MAPFILTER_NEAREST 0
7736 #define MAPFILTER_LINEAR 1
7737 #define MAPFILTER_ANISOTROPIC 2
7738 #define MAPFILTER_MONO 6
7739 uint32_t MinModeFilter;
7740 uint32_t TextureLODBias;
7741 #define LEGACY 0
7742 #define EWAApproximation 1
7743 uint32_t AnisotropicAlgorithm;
7744 float MinLOD;
7745 float MaxLOD;
7746 #define PREFILTEROPALWAYS 0
7747 #define PREFILTEROPNEVER 1
7748 #define PREFILTEROPLESS 2
7749 #define PREFILTEROPEQUAL 3
7750 #define PREFILTEROPLEQUAL 4
7751 #define PREFILTEROPGREATER 5
7752 #define PREFILTEROPNOTEQUAL 6
7753 #define PREFILTEROPGEQUAL 7
7754 uint32_t ShadowFunction;
7755 #define PROGRAMMED 0
7756 #define OVERRIDE 1
7757 uint32_t CubeSurfaceControlMode;
7758 uint32_t BorderColorPointer;
7759 bool ChromaKeyEnable;
7760 uint32_t ChromaKeyIndex;
7761 #define KEYFILTER_KILL_ON_ANY_MATCH 0
7762 #define KEYFILTER_REPLACE_BLACK 1
7763 uint32_t ChromaKeyMode;
7764 #define RATIO21 0
7765 #define RATIO41 1
7766 #define RATIO61 2
7767 #define RATIO81 3
7768 #define RATIO101 4
7769 #define RATIO121 5
7770 #define RATIO141 6
7771 #define RATIO161 7
7772 uint32_t MaximumAnisotropy;
7773 bool RAddressMinFilterRoundingEnable;
7774 bool RAddressMagFilterRoundingEnable;
7775 bool VAddressMinFilterRoundingEnable;
7776 bool VAddressMagFilterRoundingEnable;
7777 bool UAddressMinFilterRoundingEnable;
7778 bool UAddressMagFilterRoundingEnable;
7779 #define FULL 0
7780 #define TRIQUAL_HIGHMAG_CLAMP_MIPFILTER 1
7781 #define MED 2
7782 #define LOW 3
7783 uint32_t TrilinearFilterQuality;
7784 bool NonnormalizedCoordinateEnable;
7785 uint32_t TCXAddressControlMode;
7786 uint32_t TCYAddressControlMode;
7787 uint32_t TCZAddressControlMode;
7788 };
7789
7790 static inline void
7791 GEN75_SAMPLER_STATE_pack(__gen_user_data *data, void * restrict dst,
7792 const struct GEN75_SAMPLER_STATE * restrict values)
7793 {
7794 uint32_t *dw = (uint32_t * restrict) dst;
7795
7796 dw[0] =
7797 __gen_field(values->SamplerDisable, 31, 31) |
7798 __gen_field(values->TextureBorderColorMode, 29, 29) |
7799 __gen_field(values->LODPreClampEnable, 28, 28) |
7800 __gen_field(values->BaseMipLevel * (1 << 1), 22, 26) |
7801 __gen_field(values->MipModeFilter, 20, 21) |
7802 __gen_field(values->MagModeFilter, 17, 19) |
7803 __gen_field(values->MinModeFilter, 14, 16) |
7804 __gen_field(values->TextureLODBias, 1, 13) |
7805 __gen_field(values->AnisotropicAlgorithm, 0, 0) |
7806 0;
7807
7808 dw[1] =
7809 __gen_field(values->MinLOD * (1 << 8), 20, 31) |
7810 __gen_field(values->MaxLOD * (1 << 8), 8, 19) |
7811 __gen_field(values->ShadowFunction, 1, 3) |
7812 __gen_field(values->CubeSurfaceControlMode, 0, 0) |
7813 0;
7814
7815 dw[2] =
7816 __gen_offset(values->BorderColorPointer, 5, 31) |
7817 0;
7818
7819 dw[3] =
7820 __gen_field(values->ChromaKeyEnable, 25, 25) |
7821 __gen_field(values->ChromaKeyIndex, 23, 24) |
7822 __gen_field(values->ChromaKeyMode, 22, 22) |
7823 __gen_field(values->MaximumAnisotropy, 19, 21) |
7824 __gen_field(values->RAddressMinFilterRoundingEnable, 13, 13) |
7825 __gen_field(values->RAddressMagFilterRoundingEnable, 14, 14) |
7826 __gen_field(values->VAddressMinFilterRoundingEnable, 15, 15) |
7827 __gen_field(values->VAddressMagFilterRoundingEnable, 16, 16) |
7828 __gen_field(values->UAddressMinFilterRoundingEnable, 17, 17) |
7829 __gen_field(values->UAddressMagFilterRoundingEnable, 18, 18) |
7830 __gen_field(values->TrilinearFilterQuality, 11, 12) |
7831 __gen_field(values->NonnormalizedCoordinateEnable, 10, 10) |
7832 __gen_field(values->TCXAddressControlMode, 6, 8) |
7833 __gen_field(values->TCYAddressControlMode, 3, 5) |
7834 __gen_field(values->TCZAddressControlMode, 0, 2) |
7835 0;
7836
7837 }
7838
7839 /* Enum 3D_Prim_Topo_Type */
7840 #define _3DPRIM_POINTLIST 1
7841 #define _3DPRIM_LINELIST 2
7842 #define _3DPRIM_LINESTRIP 3
7843 #define _3DPRIM_TRILIST 4
7844 #define _3DPRIM_TRISTRIP 5
7845 #define _3DPRIM_TRIFAN 6
7846 #define _3DPRIM_QUADLIST 7
7847 #define _3DPRIM_QUADSTRIP 8
7848 #define _3DPRIM_LINELIST_ADJ 9
7849 #define _3DPRIM_LINESTRIP_ADJ 10
7850 #define _3DPRIM_TRILIST_ADJ 11
7851 #define _3DPRIM_TRISTRIP_ADJ 12
7852 #define _3DPRIM_TRISTRIP_REVERSE 13
7853 #define _3DPRIM_POLYGON 14
7854 #define _3DPRIM_RECTLIST 15
7855 #define _3DPRIM_LINELOOP 16
7856 #define _3DPRIM_POINTLIST_BF 17
7857 #define _3DPRIM_LINESTRIP_CONT 18
7858 #define _3DPRIM_LINESTRIP_BF 19
7859 #define _3DPRIM_LINESTRIP_CONT_BF 20
7860 #define _3DPRIM_TRIFAN_NOSTIPPLE 22
7861 #define _3DPRIM_PATCHLIST_1 32
7862 #define _3DPRIM_PATCHLIST_2 33
7863 #define _3DPRIM_PATCHLIST_3 34
7864 #define _3DPRIM_PATCHLIST_4 35
7865 #define _3DPRIM_PATCHLIST_5 36
7866 #define _3DPRIM_PATCHLIST_6 37
7867 #define _3DPRIM_PATCHLIST_7 38
7868 #define _3DPRIM_PATCHLIST_8 39
7869 #define _3DPRIM_PATCHLIST_9 40
7870 #define _3DPRIM_PATCHLIST_10 41
7871 #define _3DPRIM_PATCHLIST_11 42
7872 #define _3DPRIM_PATCHLIST_12 43
7873 #define _3DPRIM_PATCHLIST_13 44
7874 #define _3DPRIM_PATCHLIST_14 45
7875 #define _3DPRIM_PATCHLIST_15 46
7876 #define _3DPRIM_PATCHLIST_16 47
7877 #define _3DPRIM_PATCHLIST_17 48
7878 #define _3DPRIM_PATCHLIST_18 49
7879 #define _3DPRIM_PATCHLIST_19 50
7880 #define _3DPRIM_PATCHLIST_20 51
7881 #define _3DPRIM_PATCHLIST_21 52
7882 #define _3DPRIM_PATCHLIST_22 53
7883 #define _3DPRIM_PATCHLIST_23 54
7884 #define _3DPRIM_PATCHLIST_24 55
7885 #define _3DPRIM_PATCHLIST_25 56
7886 #define _3DPRIM_PATCHLIST_26 57
7887 #define _3DPRIM_PATCHLIST_27 58
7888 #define _3DPRIM_PATCHLIST_28 59
7889 #define _3DPRIM_PATCHLIST_29 60
7890 #define _3DPRIM_PATCHLIST_30 61
7891 #define _3DPRIM_PATCHLIST_31 62
7892 #define _3DPRIM_PATCHLIST_32 63
7893
7894 /* Enum 3D_Vertex_Component_Control */
7895 #define VFCOMP_NOSTORE 0
7896 #define VFCOMP_STORE_SRC 1
7897 #define VFCOMP_STORE_0 2
7898 #define VFCOMP_STORE_1_FP 3
7899 #define VFCOMP_STORE_1_INT 4
7900 #define VFCOMP_STORE_VID 5
7901 #define VFCOMP_STORE_IID 6
7902 #define VFCOMP_STORE_PID 7
7903
7904 /* Enum 3D_Compare_Function */
7905 #define COMPAREFUNCTION_ALWAYS 0
7906 #define COMPAREFUNCTION_NEVER 1
7907 #define COMPAREFUNCTION_LESS 2
7908 #define COMPAREFUNCTION_EQUAL 3
7909 #define COMPAREFUNCTION_LEQUAL 4
7910 #define COMPAREFUNCTION_GREATER 5
7911 #define COMPAREFUNCTION_NOTEQUAL 6
7912 #define COMPAREFUNCTION_GEQUAL 7
7913
7914 /* Enum SURFACE_FORMAT */
7915 #define R32G32B32A32_FLOAT 0
7916 #define R32G32B32A32_SINT 1
7917 #define R32G32B32A32_UINT 2
7918 #define R32G32B32A32_UNORM 3
7919 #define R32G32B32A32_SNORM 4
7920 #define R64G64_FLOAT 5
7921 #define R32G32B32X32_FLOAT 6
7922 #define R32G32B32A32_SSCALED 7
7923 #define R32G32B32A32_USCALED 8
7924 #define R32G32B32A32_SFIXED 32
7925 #define R64G64_PASSTHRU 33
7926 #define R32G32B32_FLOAT 64
7927 #define R32G32B32_SINT 65
7928 #define R32G32B32_UINT 66
7929 #define R32G32B32_UNORM 67
7930 #define R32G32B32_SNORM 68
7931 #define R32G32B32_SSCALED 69
7932 #define R32G32B32_USCALED 70
7933 #define R32G32B32_SFIXED 80
7934 #define R16G16B16A16_UNORM 128
7935 #define R16G16B16A16_SNORM 129
7936 #define R16G16B16A16_SINT 130
7937 #define R16G16B16A16_UINT 131
7938 #define R16G16B16A16_FLOAT 132
7939 #define R32G32_FLOAT 133
7940 #define R32G32_SINT 134
7941 #define R32G32_UINT 135
7942 #define R32_FLOAT_X8X24_TYPELESS 136
7943 #define X32_TYPELESS_G8X24_UINT 137
7944 #define L32A32_FLOAT 138
7945 #define R32G32_UNORM 139
7946 #define R32G32_SNORM 140
7947 #define R64_FLOAT 141
7948 #define R16G16B16X16_UNORM 142
7949 #define R16G16B16X16_FLOAT 143
7950 #define A32X32_FLOAT 144
7951 #define L32X32_FLOAT 145
7952 #define I32X32_FLOAT 146
7953 #define R16G16B16A16_SSCALED 147
7954 #define R16G16B16A16_USCALED 148
7955 #define R32G32_SSCALED 149
7956 #define R32G32_USCALED 150
7957 #define R32G32_SFIXED 160
7958 #define R64_PASSTHRU 161
7959 #define B8G8R8A8_UNORM 192
7960 #define B8G8R8A8_UNORM_SRGB 193
7961 #define R10G10B10A2_UNORM 194
7962 #define R10G10B10A2_UNORM_SRGB 195
7963 #define R10G10B10A2_UINT 196
7964 #define R10G10B10_SNORM_A2_UNORM 197
7965 #define R8G8B8A8_UNORM 199
7966 #define R8G8B8A8_UNORM_SRGB 200
7967 #define R8G8B8A8_SNORM 201
7968 #define R8G8B8A8_SINT 202
7969 #define R8G8B8A8_UINT 203
7970 #define R16G16_UNORM 204
7971 #define R16G16_SNORM 205
7972 #define R16G16_SINT 206
7973 #define R16G16_UINT 207
7974 #define R16G16_FLOAT 208
7975 #define B10G10R10A2_UNORM 209
7976 #define B10G10R10A2_UNORM_SRGB 210
7977 #define R11G11B10_FLOAT 211
7978 #define R32_SINT 214
7979 #define R32_UINT 215
7980 #define R32_FLOAT 216
7981 #define R24_UNORM_X8_TYPELESS 217
7982 #define X24_TYPELESS_G8_UINT 218
7983 #define L32_UNORM 221
7984 #define A32_UNORM 222
7985 #define L16A16_UNORM 223
7986 #define I24X8_UNORM 224
7987 #define L24X8_UNORM 225
7988 #define A24X8_UNORM 226
7989 #define I32_FLOAT 227
7990 #define L32_FLOAT 228
7991 #define A32_FLOAT 229
7992 #define X8B8_UNORM_G8R8_SNORM 230
7993 #define A8X8_UNORM_G8R8_SNORM 231
7994 #define B8X8_UNORM_G8R8_SNORM 232
7995 #define B8G8R8X8_UNORM 233
7996 #define B8G8R8X8_UNORM_SRGB 234
7997 #define R8G8B8X8_UNORM 235
7998 #define R8G8B8X8_UNORM_SRGB 236
7999 #define R9G9B9E5_SHAREDEXP 237
8000 #define B10G10R10X2_UNORM 238
8001 #define L16A16_FLOAT 240
8002 #define R32_UNORM 241
8003 #define R32_SNORM 242
8004 #define R10G10B10X2_USCALED 243
8005 #define R8G8B8A8_SSCALED 244
8006 #define R8G8B8A8_USCALED 245
8007 #define R16G16_SSCALED 246
8008 #define R16G16_USCALED 247
8009 #define R32_SSCALED 248
8010 #define R32_USCALED 249
8011 #define B5G6R5_UNORM 256
8012 #define B5G6R5_UNORM_SRGB 257
8013 #define B5G5R5A1_UNORM 258
8014 #define B5G5R5A1_UNORM_SRGB 259
8015 #define B4G4R4A4_UNORM 260
8016 #define B4G4R4A4_UNORM_SRGB 261
8017 #define R8G8_UNORM 262
8018 #define R8G8_SNORM 263
8019 #define R8G8_SINT 264
8020 #define R8G8_UINT 265
8021 #define R16_UNORM 266
8022 #define R16_SNORM 267
8023 #define R16_SINT 268
8024 #define R16_UINT 269
8025 #define R16_FLOAT 270
8026 #define A8P8_UNORM_PALETTE0 271
8027 #define A8P8_UNORM_PALETTE1 272
8028 #define I16_UNORM 273
8029 #define L16_UNORM 274
8030 #define A16_UNORM 275
8031 #define L8A8_UNORM 276
8032 #define I16_FLOAT 277
8033 #define L16_FLOAT 278
8034 #define A16_FLOAT 279
8035 #define L8A8_UNORM_SRGB 280
8036 #define R5G5_SNORM_B6_UNORM 281
8037 #define B5G5R5X1_UNORM 282
8038 #define B5G5R5X1_UNORM_SRGB 283
8039 #define R8G8_SSCALED 284
8040 #define R8G8_USCALED 285
8041 #define R16_SSCALED 286
8042 #define R16_USCALED 287
8043 #define P8A8_UNORM_PALETTE0 290
8044 #define P8A8_UNORM_PALETTE1 291
8045 #define A1B5G5R5_UNORM 292
8046 #define A4B4G4R4_UNORM 293
8047 #define L8A8_UINT 294
8048 #define L8A8_SINT 295
8049 #define R8_UNORM 320
8050 #define R8_SNORM 321
8051 #define R8_SINT 322
8052 #define R8_UINT 323
8053 #define A8_UNORM 324
8054 #define I8_UNORM 325
8055 #define L8_UNORM 326
8056 #define P4A4_UNORM_PALETTE0 327
8057 #define A4P4_UNORM_PALETTE0 328
8058 #define R8_SSCALED 329
8059 #define R8_USCALED 330
8060 #define P8_UNORM_PALETTE0 331
8061 #define L8_UNORM_SRGB 332
8062 #define P8_UNORM_PALETTE1 333
8063 #define P4A4_UNORM_PALETTE1 334
8064 #define A4P4_UNORM_PALETTE1 335
8065 #define Y8_UNORM 336
8066 #define L8_UINT 338
8067 #define L8_SINT 339
8068 #define I8_UINT 340
8069 #define I8_SINT 341
8070 #define DXT1_RGB_SRGB 384
8071 #define R1_UNORM 385
8072 #define YCRCB_NORMAL 386
8073 #define YCRCB_SWAPUVY 387
8074 #define P2_UNORM_PALETTE0 388
8075 #define P2_UNORM_PALETTE1 389
8076 #define BC1_UNORM 390
8077 #define BC2_UNORM 391
8078 #define BC3_UNORM 392
8079 #define BC4_UNORM 393
8080 #define BC5_UNORM 394
8081 #define BC1_UNORM_SRGB 395
8082 #define BC2_UNORM_SRGB 396
8083 #define BC3_UNORM_SRGB 397
8084 #define MONO8 398
8085 #define YCRCB_SWAPUV 399
8086 #define YCRCB_SWAPY 400
8087 #define DXT1_RGB 401
8088 #define FXT1 402
8089 #define R8G8B8_UNORM 403
8090 #define R8G8B8_SNORM 404
8091 #define R8G8B8_SSCALED 405
8092 #define R8G8B8_USCALED 406
8093 #define R64G64B64A64_FLOAT 407
8094 #define R64G64B64_FLOAT 408
8095 #define BC4_SNORM 409
8096 #define BC5_SNORM 410
8097 #define R16G16B16_FLOAT 411
8098 #define R16G16B16_UNORM 412
8099 #define R16G16B16_SNORM 413
8100 #define R16G16B16_SSCALED 414
8101 #define R16G16B16_USCALED 415
8102 #define BC6H_SF16 417
8103 #define BC7_UNORM 418
8104 #define BC7_UNORM_SRGB 419
8105 #define BC6H_UF16 420
8106 #define PLANAR_420_8 421
8107 #define R8G8B8_UNORM_SRGB 424
8108 #define ETC1_RGB8 425
8109 #define ETC2_RGB8 426
8110 #define EAC_R11 427
8111 #define EAC_RG11 428
8112 #define EAC_SIGNED_R11 429
8113 #define EAC_SIGNED_RG11 430
8114 #define ETC2_SRGB8 431
8115 #define R16G16B16_UINT 432
8116 #define R16G16B16_SINT 433
8117 #define R32_SFIXED 434
8118 #define R10G10B10A2_SNORM 435
8119 #define R10G10B10A2_USCALED 436
8120 #define R10G10B10A2_SSCALED 437
8121 #define R10G10B10A2_SINT 438
8122 #define B10G10R10A2_SNORM 439
8123 #define B10G10R10A2_USCALED 440
8124 #define B10G10R10A2_SSCALED 441
8125 #define B10G10R10A2_UINT 442
8126 #define B10G10R10A2_SINT 443
8127 #define R64G64B64A64_PASSTHRU 444
8128 #define R64G64B64_PASSTHRU 445
8129 #define ETC2_RGB8_PTA 448
8130 #define ETC2_SRGB8_PTA 449
8131 #define ETC2_EAC_RGBA8 450
8132 #define ETC2_EAC_SRGB8_A8 451
8133 #define R8G8B8_UINT 456
8134 #define R8G8B8_SINT 457
8135 #define RAW 511
8136
8137 /* Enum Texture Coordinate Mode */
8138 #define TCM_WRAP 0
8139 #define TCM_MIRROR 1
8140 #define TCM_CLAMP 2
8141 #define TCM_CUBE 3
8142 #define TCM_CLAMP_BORDER 4
8143 #define TCM_MIRROR_ONCE 5
8144