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vk: Use compute pipeline layout when binding compute sets
[mesa.git] / src / vulkan / gen7_pack.h
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24
25 /* Instructions, enums and structures for IVB.
26 *
27 * This file has been generated, do not hand edit.
28 */
29
30 #pragma once
31
32 #include <stdio.h>
33 #include <assert.h>
34
35 #ifndef __gen_validate_value
36 #define __gen_validate_value(x)
37 #endif
38
39 #ifndef __gen_field_functions
40 #define __gen_field_functions
41
42 union __gen_value {
43 float f;
44 uint32_t dw;
45 };
46
47 static inline uint64_t
48 __gen_field(uint64_t v, uint32_t start, uint32_t end)
49 {
50 __gen_validate_value(v);
51 #if DEBUG
52 if (end - start + 1 < 64)
53 assert(v < 1ul << (end - start + 1));
54 #endif
55
56 return v << start;
57 }
58
59 static inline uint64_t
60 __gen_offset(uint64_t v, uint32_t start, uint32_t end)
61 {
62 __gen_validate_value(v);
63 #if DEBUG
64 uint64_t mask = (~0ul >> (64 - (end - start + 1))) << start;
65
66 assert((v & ~mask) == 0);
67 #endif
68
69 return v;
70 }
71
72 static inline uint32_t
73 __gen_float(float v)
74 {
75 __gen_validate_value(v);
76 return ((union __gen_value) { .f = (v) }).dw;
77 }
78
79 #ifndef __gen_address_type
80 #error #define __gen_address_type before including this file
81 #endif
82
83 #ifndef __gen_user_data
84 #error #define __gen_combine_address before including this file
85 #endif
86
87 #endif
88
89 #define GEN7_3DSTATE_URB_VS_length 0x00000002
90 #define GEN7_3DSTATE_URB_VS_length_bias 0x00000002
91 #define GEN7_3DSTATE_URB_VS_header \
92 .CommandType = 3, \
93 .CommandSubType = 3, \
94 ._3DCommandOpcode = 0, \
95 ._3DCommandSubOpcode = 48, \
96 .DwordLength = 0
97
98 struct GEN7_3DSTATE_URB_VS {
99 uint32_t CommandType;
100 uint32_t CommandSubType;
101 uint32_t _3DCommandOpcode;
102 uint32_t _3DCommandSubOpcode;
103 uint32_t DwordLength;
104 uint32_t VSURBStartingAddress;
105 uint32_t VSURBEntryAllocationSize;
106 uint32_t VSNumberofURBEntries;
107 };
108
109 static inline void
110 GEN7_3DSTATE_URB_VS_pack(__gen_user_data *data, void * restrict dst,
111 const struct GEN7_3DSTATE_URB_VS * restrict values)
112 {
113 uint32_t *dw = (uint32_t * restrict) dst;
114
115 dw[0] =
116 __gen_field(values->CommandType, 29, 31) |
117 __gen_field(values->CommandSubType, 27, 28) |
118 __gen_field(values->_3DCommandOpcode, 24, 26) |
119 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
120 __gen_field(values->DwordLength, 0, 7) |
121 0;
122
123 dw[1] =
124 __gen_field(values->VSURBStartingAddress, 25, 29) |
125 __gen_field(values->VSURBEntryAllocationSize, 16, 24) |
126 __gen_field(values->VSNumberofURBEntries, 0, 15) |
127 0;
128
129 }
130
131 #define GEN7_MI_STORE_REGISTER_MEM_length 0x00000003
132 #define GEN7_MI_STORE_REGISTER_MEM_length_bias 0x00000002
133 #define GEN7_MI_STORE_REGISTER_MEM_header \
134 .CommandType = 0, \
135 .MICommandOpcode = 36, \
136 .DwordLength = 1
137
138 struct GEN7_MI_STORE_REGISTER_MEM {
139 uint32_t CommandType;
140 uint32_t MICommandOpcode;
141 uint32_t UseGlobalGTT;
142 uint32_t DwordLength;
143 uint32_t RegisterAddress;
144 __gen_address_type MemoryAddress;
145 };
146
147 static inline void
148 GEN7_MI_STORE_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
149 const struct GEN7_MI_STORE_REGISTER_MEM * restrict values)
150 {
151 uint32_t *dw = (uint32_t * restrict) dst;
152
153 dw[0] =
154 __gen_field(values->CommandType, 29, 31) |
155 __gen_field(values->MICommandOpcode, 23, 28) |
156 __gen_field(values->UseGlobalGTT, 22, 22) |
157 __gen_field(values->DwordLength, 0, 7) |
158 0;
159
160 dw[1] =
161 __gen_offset(values->RegisterAddress, 2, 22) |
162 0;
163
164 uint32_t dw2 =
165 0;
166
167 dw[2] =
168 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
169
170 }
171
172 #define GEN7_PIPELINE_SELECT_length 0x00000001
173 #define GEN7_PIPELINE_SELECT_length_bias 0x00000001
174 #define GEN7_PIPELINE_SELECT_header \
175 .CommandType = 3, \
176 .CommandSubType = 1, \
177 ._3DCommandOpcode = 1, \
178 ._3DCommandSubOpcode = 4
179
180 struct GEN7_PIPELINE_SELECT {
181 uint32_t CommandType;
182 uint32_t CommandSubType;
183 uint32_t _3DCommandOpcode;
184 uint32_t _3DCommandSubOpcode;
185 #define _3D 0
186 #define Media 1
187 #define GPGPU 2
188 uint32_t PipelineSelection;
189 };
190
191 static inline void
192 GEN7_PIPELINE_SELECT_pack(__gen_user_data *data, void * restrict dst,
193 const struct GEN7_PIPELINE_SELECT * restrict values)
194 {
195 uint32_t *dw = (uint32_t * restrict) dst;
196
197 dw[0] =
198 __gen_field(values->CommandType, 29, 31) |
199 __gen_field(values->CommandSubType, 27, 28) |
200 __gen_field(values->_3DCommandOpcode, 24, 26) |
201 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
202 __gen_field(values->PipelineSelection, 0, 1) |
203 0;
204
205 }
206
207 #define GEN7_STATE_BASE_ADDRESS_length 0x0000000a
208 #define GEN7_STATE_BASE_ADDRESS_length_bias 0x00000002
209 #define GEN7_STATE_BASE_ADDRESS_header \
210 .CommandType = 3, \
211 .CommandSubType = 0, \
212 ._3DCommandOpcode = 1, \
213 ._3DCommandSubOpcode = 1, \
214 .DwordLength = 8
215
216 struct GEN7_MEMORY_OBJECT_CONTROL_STATE {
217 uint32_t GraphicsDataTypeGFDT;
218 uint32_t LLCCacheabilityControlLLCCC;
219 uint32_t L3CacheabilityControlL3CC;
220 };
221
222 static inline void
223 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(__gen_user_data *data, void * restrict dst,
224 const struct GEN7_MEMORY_OBJECT_CONTROL_STATE * restrict values)
225 {
226 uint32_t *dw = (uint32_t * restrict) dst;
227
228 dw[0] =
229 __gen_field(values->GraphicsDataTypeGFDT, 2, 2) |
230 __gen_field(values->LLCCacheabilityControlLLCCC, 1, 1) |
231 __gen_field(values->L3CacheabilityControlL3CC, 0, 0) |
232 0;
233
234 }
235
236 struct GEN7_STATE_BASE_ADDRESS {
237 uint32_t CommandType;
238 uint32_t CommandSubType;
239 uint32_t _3DCommandOpcode;
240 uint32_t _3DCommandSubOpcode;
241 uint32_t DwordLength;
242 __gen_address_type GeneralStateBaseAddress;
243 struct GEN7_MEMORY_OBJECT_CONTROL_STATE GeneralStateMemoryObjectControlState;
244 struct GEN7_MEMORY_OBJECT_CONTROL_STATE StatelessDataPortAccessMemoryObjectControlState;
245 uint32_t StatelessDataPortAccessForceWriteThru;
246 uint32_t GeneralStateBaseAddressModifyEnable;
247 __gen_address_type SurfaceStateBaseAddress;
248 struct GEN7_MEMORY_OBJECT_CONTROL_STATE SurfaceStateMemoryObjectControlState;
249 uint32_t SurfaceStateBaseAddressModifyEnable;
250 __gen_address_type DynamicStateBaseAddress;
251 struct GEN7_MEMORY_OBJECT_CONTROL_STATE DynamicStateMemoryObjectControlState;
252 uint32_t DynamicStateBaseAddressModifyEnable;
253 __gen_address_type IndirectObjectBaseAddress;
254 struct GEN7_MEMORY_OBJECT_CONTROL_STATE IndirectObjectMemoryObjectControlState;
255 uint32_t IndirectObjectBaseAddressModifyEnable;
256 __gen_address_type InstructionBaseAddress;
257 struct GEN7_MEMORY_OBJECT_CONTROL_STATE InstructionMemoryObjectControlState;
258 uint32_t InstructionBaseAddressModifyEnable;
259 __gen_address_type GeneralStateAccessUpperBound;
260 uint32_t GeneralStateAccessUpperBoundModifyEnable;
261 __gen_address_type DynamicStateAccessUpperBound;
262 uint32_t DynamicStateAccessUpperBoundModifyEnable;
263 __gen_address_type IndirectObjectAccessUpperBound;
264 uint32_t IndirectObjectAccessUpperBoundModifyEnable;
265 __gen_address_type InstructionAccessUpperBound;
266 uint32_t InstructionAccessUpperBoundModifyEnable;
267 };
268
269 static inline void
270 GEN7_STATE_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
271 const struct GEN7_STATE_BASE_ADDRESS * restrict values)
272 {
273 uint32_t *dw = (uint32_t * restrict) dst;
274
275 dw[0] =
276 __gen_field(values->CommandType, 29, 31) |
277 __gen_field(values->CommandSubType, 27, 28) |
278 __gen_field(values->_3DCommandOpcode, 24, 26) |
279 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
280 __gen_field(values->DwordLength, 0, 7) |
281 0;
282
283 uint32_t dw_GeneralStateMemoryObjectControlState;
284 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_GeneralStateMemoryObjectControlState, &values->GeneralStateMemoryObjectControlState);
285 uint32_t dw_StatelessDataPortAccessMemoryObjectControlState;
286 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StatelessDataPortAccessMemoryObjectControlState, &values->StatelessDataPortAccessMemoryObjectControlState);
287 uint32_t dw1 =
288 __gen_field(dw_GeneralStateMemoryObjectControlState, 8, 11) |
289 __gen_field(dw_StatelessDataPortAccessMemoryObjectControlState, 4, 7) |
290 __gen_field(values->StatelessDataPortAccessForceWriteThru, 3, 3) |
291 __gen_field(values->GeneralStateBaseAddressModifyEnable, 0, 0) |
292 0;
293
294 dw[1] =
295 __gen_combine_address(data, &dw[1], values->GeneralStateBaseAddress, dw1);
296
297 uint32_t dw_SurfaceStateMemoryObjectControlState;
298 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceStateMemoryObjectControlState, &values->SurfaceStateMemoryObjectControlState);
299 uint32_t dw2 =
300 __gen_field(dw_SurfaceStateMemoryObjectControlState, 8, 11) |
301 __gen_field(values->SurfaceStateBaseAddressModifyEnable, 0, 0) |
302 0;
303
304 dw[2] =
305 __gen_combine_address(data, &dw[2], values->SurfaceStateBaseAddress, dw2);
306
307 uint32_t dw_DynamicStateMemoryObjectControlState;
308 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DynamicStateMemoryObjectControlState, &values->DynamicStateMemoryObjectControlState);
309 uint32_t dw3 =
310 __gen_field(dw_DynamicStateMemoryObjectControlState, 8, 11) |
311 __gen_field(values->DynamicStateBaseAddressModifyEnable, 0, 0) |
312 0;
313
314 dw[3] =
315 __gen_combine_address(data, &dw[3], values->DynamicStateBaseAddress, dw3);
316
317 uint32_t dw_IndirectObjectMemoryObjectControlState;
318 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_IndirectObjectMemoryObjectControlState, &values->IndirectObjectMemoryObjectControlState);
319 uint32_t dw4 =
320 __gen_field(dw_IndirectObjectMemoryObjectControlState, 8, 11) |
321 __gen_field(values->IndirectObjectBaseAddressModifyEnable, 0, 0) |
322 0;
323
324 dw[4] =
325 __gen_combine_address(data, &dw[4], values->IndirectObjectBaseAddress, dw4);
326
327 uint32_t dw_InstructionMemoryObjectControlState;
328 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_InstructionMemoryObjectControlState, &values->InstructionMemoryObjectControlState);
329 uint32_t dw5 =
330 __gen_field(dw_InstructionMemoryObjectControlState, 8, 11) |
331 __gen_field(values->InstructionBaseAddressModifyEnable, 0, 0) |
332 0;
333
334 dw[5] =
335 __gen_combine_address(data, &dw[5], values->InstructionBaseAddress, dw5);
336
337 uint32_t dw6 =
338 __gen_field(values->GeneralStateAccessUpperBoundModifyEnable, 0, 0) |
339 0;
340
341 dw[6] =
342 __gen_combine_address(data, &dw[6], values->GeneralStateAccessUpperBound, dw6);
343
344 uint32_t dw7 =
345 __gen_field(values->DynamicStateAccessUpperBoundModifyEnable, 0, 0) |
346 0;
347
348 dw[7] =
349 __gen_combine_address(data, &dw[7], values->DynamicStateAccessUpperBound, dw7);
350
351 uint32_t dw8 =
352 __gen_field(values->IndirectObjectAccessUpperBoundModifyEnable, 0, 0) |
353 0;
354
355 dw[8] =
356 __gen_combine_address(data, &dw[8], values->IndirectObjectAccessUpperBound, dw8);
357
358 uint32_t dw9 =
359 __gen_field(values->InstructionAccessUpperBoundModifyEnable, 0, 0) |
360 0;
361
362 dw[9] =
363 __gen_combine_address(data, &dw[9], values->InstructionAccessUpperBound, dw9);
364
365 }
366
367 #define GEN7_STATE_PREFETCH_length 0x00000002
368 #define GEN7_STATE_PREFETCH_length_bias 0x00000002
369 #define GEN7_STATE_PREFETCH_header \
370 .CommandType = 3, \
371 .CommandSubType = 0, \
372 ._3DCommandOpcode = 0, \
373 ._3DCommandSubOpcode = 3, \
374 .DwordLength = 0
375
376 struct GEN7_STATE_PREFETCH {
377 uint32_t CommandType;
378 uint32_t CommandSubType;
379 uint32_t _3DCommandOpcode;
380 uint32_t _3DCommandSubOpcode;
381 uint32_t DwordLength;
382 __gen_address_type PrefetchPointer;
383 uint32_t PrefetchCount;
384 };
385
386 static inline void
387 GEN7_STATE_PREFETCH_pack(__gen_user_data *data, void * restrict dst,
388 const struct GEN7_STATE_PREFETCH * restrict values)
389 {
390 uint32_t *dw = (uint32_t * restrict) dst;
391
392 dw[0] =
393 __gen_field(values->CommandType, 29, 31) |
394 __gen_field(values->CommandSubType, 27, 28) |
395 __gen_field(values->_3DCommandOpcode, 24, 26) |
396 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
397 __gen_field(values->DwordLength, 0, 7) |
398 0;
399
400 uint32_t dw1 =
401 __gen_field(values->PrefetchCount, 0, 2) |
402 0;
403
404 dw[1] =
405 __gen_combine_address(data, &dw[1], values->PrefetchPointer, dw1);
406
407 }
408
409 #define GEN7_STATE_SIP_length 0x00000002
410 #define GEN7_STATE_SIP_length_bias 0x00000002
411 #define GEN7_STATE_SIP_header \
412 .CommandType = 3, \
413 .CommandSubType = 0, \
414 ._3DCommandOpcode = 1, \
415 ._3DCommandSubOpcode = 2, \
416 .DwordLength = 0
417
418 struct GEN7_STATE_SIP {
419 uint32_t CommandType;
420 uint32_t CommandSubType;
421 uint32_t _3DCommandOpcode;
422 uint32_t _3DCommandSubOpcode;
423 uint32_t DwordLength;
424 uint32_t SystemInstructionPointer;
425 };
426
427 static inline void
428 GEN7_STATE_SIP_pack(__gen_user_data *data, void * restrict dst,
429 const struct GEN7_STATE_SIP * restrict values)
430 {
431 uint32_t *dw = (uint32_t * restrict) dst;
432
433 dw[0] =
434 __gen_field(values->CommandType, 29, 31) |
435 __gen_field(values->CommandSubType, 27, 28) |
436 __gen_field(values->_3DCommandOpcode, 24, 26) |
437 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
438 __gen_field(values->DwordLength, 0, 7) |
439 0;
440
441 dw[1] =
442 __gen_offset(values->SystemInstructionPointer, 4, 31) |
443 0;
444
445 }
446
447 #define GEN7_SWTESS_BASE_ADDRESS_length 0x00000002
448 #define GEN7_SWTESS_BASE_ADDRESS_length_bias 0x00000002
449 #define GEN7_SWTESS_BASE_ADDRESS_header \
450 .CommandType = 3, \
451 .CommandSubType = 0, \
452 ._3DCommandOpcode = 1, \
453 ._3DCommandSubOpcode = 3, \
454 .DwordLength = 0
455
456 struct GEN7_SWTESS_BASE_ADDRESS {
457 uint32_t CommandType;
458 uint32_t CommandSubType;
459 uint32_t _3DCommandOpcode;
460 uint32_t _3DCommandSubOpcode;
461 uint32_t DwordLength;
462 __gen_address_type SWTessellationBaseAddress;
463 struct GEN7_MEMORY_OBJECT_CONTROL_STATE SWTessellationMemoryObjectControlState;
464 };
465
466 static inline void
467 GEN7_SWTESS_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
468 const struct GEN7_SWTESS_BASE_ADDRESS * restrict values)
469 {
470 uint32_t *dw = (uint32_t * restrict) dst;
471
472 dw[0] =
473 __gen_field(values->CommandType, 29, 31) |
474 __gen_field(values->CommandSubType, 27, 28) |
475 __gen_field(values->_3DCommandOpcode, 24, 26) |
476 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
477 __gen_field(values->DwordLength, 0, 7) |
478 0;
479
480 uint32_t dw_SWTessellationMemoryObjectControlState;
481 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SWTessellationMemoryObjectControlState, &values->SWTessellationMemoryObjectControlState);
482 uint32_t dw1 =
483 __gen_field(dw_SWTessellationMemoryObjectControlState, 8, 11) |
484 0;
485
486 dw[1] =
487 __gen_combine_address(data, &dw[1], values->SWTessellationBaseAddress, dw1);
488
489 }
490
491 #define GEN7_3DPRIMITIVE_length 0x00000007
492 #define GEN7_3DPRIMITIVE_length_bias 0x00000002
493 #define GEN7_3DPRIMITIVE_header \
494 .CommandType = 3, \
495 .CommandSubType = 3, \
496 ._3DCommandOpcode = 3, \
497 ._3DCommandSubOpcode = 0, \
498 .DwordLength = 5
499
500 struct GEN7_3DPRIMITIVE {
501 uint32_t CommandType;
502 uint32_t CommandSubType;
503 uint32_t _3DCommandOpcode;
504 uint32_t _3DCommandSubOpcode;
505 uint32_t IndirectParameterEnable;
506 uint32_t PredicateEnable;
507 uint32_t DwordLength;
508 uint32_t EndOffsetEnable;
509 #define SEQUENTIAL 0
510 #define RANDOM 1
511 uint32_t VertexAccessType;
512 uint32_t PrimitiveTopologyType;
513 uint32_t VertexCountPerInstance;
514 uint32_t StartVertexLocation;
515 uint32_t InstanceCount;
516 uint32_t StartInstanceLocation;
517 uint32_t BaseVertexLocation;
518 };
519
520 static inline void
521 GEN7_3DPRIMITIVE_pack(__gen_user_data *data, void * restrict dst,
522 const struct GEN7_3DPRIMITIVE * restrict values)
523 {
524 uint32_t *dw = (uint32_t * restrict) dst;
525
526 dw[0] =
527 __gen_field(values->CommandType, 29, 31) |
528 __gen_field(values->CommandSubType, 27, 28) |
529 __gen_field(values->_3DCommandOpcode, 24, 26) |
530 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
531 __gen_field(values->IndirectParameterEnable, 10, 10) |
532 __gen_field(values->PredicateEnable, 8, 8) |
533 __gen_field(values->DwordLength, 0, 7) |
534 0;
535
536 dw[1] =
537 __gen_field(values->EndOffsetEnable, 9, 9) |
538 __gen_field(values->VertexAccessType, 8, 8) |
539 __gen_field(values->PrimitiveTopologyType, 0, 5) |
540 0;
541
542 dw[2] =
543 __gen_field(values->VertexCountPerInstance, 0, 31) |
544 0;
545
546 dw[3] =
547 __gen_field(values->StartVertexLocation, 0, 31) |
548 0;
549
550 dw[4] =
551 __gen_field(values->InstanceCount, 0, 31) |
552 0;
553
554 dw[5] =
555 __gen_field(values->StartInstanceLocation, 0, 31) |
556 0;
557
558 dw[6] =
559 __gen_field(values->BaseVertexLocation, 0, 31) |
560 0;
561
562 }
563
564 #define GEN7_3DSTATE_AA_LINE_PARAMETERS_length 0x00000003
565 #define GEN7_3DSTATE_AA_LINE_PARAMETERS_length_bias 0x00000002
566 #define GEN7_3DSTATE_AA_LINE_PARAMETERS_header \
567 .CommandType = 3, \
568 .CommandSubType = 3, \
569 ._3DCommandOpcode = 1, \
570 ._3DCommandSubOpcode = 10, \
571 .DwordLength = 1
572
573 struct GEN7_3DSTATE_AA_LINE_PARAMETERS {
574 uint32_t CommandType;
575 uint32_t CommandSubType;
576 uint32_t _3DCommandOpcode;
577 uint32_t _3DCommandSubOpcode;
578 uint32_t DwordLength;
579 float AACoverageBias;
580 float AACoverageSlope;
581 float AACoverageEndCapBias;
582 float AACoverageEndCapSlope;
583 };
584
585 static inline void
586 GEN7_3DSTATE_AA_LINE_PARAMETERS_pack(__gen_user_data *data, void * restrict dst,
587 const struct GEN7_3DSTATE_AA_LINE_PARAMETERS * restrict values)
588 {
589 uint32_t *dw = (uint32_t * restrict) dst;
590
591 dw[0] =
592 __gen_field(values->CommandType, 29, 31) |
593 __gen_field(values->CommandSubType, 27, 28) |
594 __gen_field(values->_3DCommandOpcode, 24, 26) |
595 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
596 __gen_field(values->DwordLength, 0, 7) |
597 0;
598
599 dw[1] =
600 __gen_field(values->AACoverageBias * (1 << 8), 16, 23) |
601 __gen_field(values->AACoverageSlope * (1 << 8), 0, 7) |
602 0;
603
604 dw[2] =
605 __gen_field(values->AACoverageEndCapBias * (1 << 8), 16, 23) |
606 __gen_field(values->AACoverageEndCapSlope * (1 << 8), 0, 7) |
607 0;
608
609 }
610
611 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_length 0x00000002
612 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_length_bias 0x00000002
613 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_header\
614 .CommandType = 3, \
615 .CommandSubType = 3, \
616 ._3DCommandOpcode = 0, \
617 ._3DCommandSubOpcode = 40, \
618 .DwordLength = 0
619
620 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS {
621 uint32_t CommandType;
622 uint32_t CommandSubType;
623 uint32_t _3DCommandOpcode;
624 uint32_t _3DCommandSubOpcode;
625 uint32_t DwordLength;
626 uint32_t PointertoDSBindingTable;
627 };
628
629 static inline void
630 GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
631 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS * restrict values)
632 {
633 uint32_t *dw = (uint32_t * restrict) dst;
634
635 dw[0] =
636 __gen_field(values->CommandType, 29, 31) |
637 __gen_field(values->CommandSubType, 27, 28) |
638 __gen_field(values->_3DCommandOpcode, 24, 26) |
639 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
640 __gen_field(values->DwordLength, 0, 7) |
641 0;
642
643 dw[1] =
644 __gen_offset(values->PointertoDSBindingTable, 5, 15) |
645 0;
646
647 }
648
649 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_length 0x00000002
650 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_length_bias 0x00000002
651 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_header\
652 .CommandType = 3, \
653 .CommandSubType = 3, \
654 ._3DCommandOpcode = 0, \
655 ._3DCommandSubOpcode = 41, \
656 .DwordLength = 0
657
658 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS {
659 uint32_t CommandType;
660 uint32_t CommandSubType;
661 uint32_t _3DCommandOpcode;
662 uint32_t _3DCommandSubOpcode;
663 uint32_t DwordLength;
664 uint32_t PointertoGSBindingTable;
665 };
666
667 static inline void
668 GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
669 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS * restrict values)
670 {
671 uint32_t *dw = (uint32_t * restrict) dst;
672
673 dw[0] =
674 __gen_field(values->CommandType, 29, 31) |
675 __gen_field(values->CommandSubType, 27, 28) |
676 __gen_field(values->_3DCommandOpcode, 24, 26) |
677 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
678 __gen_field(values->DwordLength, 0, 7) |
679 0;
680
681 dw[1] =
682 __gen_offset(values->PointertoGSBindingTable, 5, 15) |
683 0;
684
685 }
686
687 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_length 0x00000002
688 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_length_bias 0x00000002
689 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_header\
690 .CommandType = 3, \
691 .CommandSubType = 3, \
692 ._3DCommandOpcode = 0, \
693 ._3DCommandSubOpcode = 39, \
694 .DwordLength = 0
695
696 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS {
697 uint32_t CommandType;
698 uint32_t CommandSubType;
699 uint32_t _3DCommandOpcode;
700 uint32_t _3DCommandSubOpcode;
701 uint32_t DwordLength;
702 uint32_t PointertoHSBindingTable;
703 };
704
705 static inline void
706 GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
707 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS * restrict values)
708 {
709 uint32_t *dw = (uint32_t * restrict) dst;
710
711 dw[0] =
712 __gen_field(values->CommandType, 29, 31) |
713 __gen_field(values->CommandSubType, 27, 28) |
714 __gen_field(values->_3DCommandOpcode, 24, 26) |
715 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
716 __gen_field(values->DwordLength, 0, 7) |
717 0;
718
719 dw[1] =
720 __gen_offset(values->PointertoHSBindingTable, 5, 15) |
721 0;
722
723 }
724
725 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_length 0x00000002
726 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_length_bias 0x00000002
727 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_header\
728 .CommandType = 3, \
729 .CommandSubType = 3, \
730 ._3DCommandOpcode = 0, \
731 ._3DCommandSubOpcode = 42, \
732 .DwordLength = 0
733
734 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS {
735 uint32_t CommandType;
736 uint32_t CommandSubType;
737 uint32_t _3DCommandOpcode;
738 uint32_t _3DCommandSubOpcode;
739 uint32_t DwordLength;
740 uint32_t PointertoPSBindingTable;
741 };
742
743 static inline void
744 GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
745 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS * restrict values)
746 {
747 uint32_t *dw = (uint32_t * restrict) dst;
748
749 dw[0] =
750 __gen_field(values->CommandType, 29, 31) |
751 __gen_field(values->CommandSubType, 27, 28) |
752 __gen_field(values->_3DCommandOpcode, 24, 26) |
753 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
754 __gen_field(values->DwordLength, 0, 7) |
755 0;
756
757 dw[1] =
758 __gen_offset(values->PointertoPSBindingTable, 5, 15) |
759 0;
760
761 }
762
763 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_length 0x00000002
764 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_length_bias 0x00000002
765 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_header\
766 .CommandType = 3, \
767 .CommandSubType = 3, \
768 ._3DCommandOpcode = 0, \
769 ._3DCommandSubOpcode = 38, \
770 .DwordLength = 0
771
772 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS {
773 uint32_t CommandType;
774 uint32_t CommandSubType;
775 uint32_t _3DCommandOpcode;
776 uint32_t _3DCommandSubOpcode;
777 uint32_t DwordLength;
778 uint32_t PointertoVSBindingTable;
779 };
780
781 static inline void
782 GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
783 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS * restrict values)
784 {
785 uint32_t *dw = (uint32_t * restrict) dst;
786
787 dw[0] =
788 __gen_field(values->CommandType, 29, 31) |
789 __gen_field(values->CommandSubType, 27, 28) |
790 __gen_field(values->_3DCommandOpcode, 24, 26) |
791 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
792 __gen_field(values->DwordLength, 0, 7) |
793 0;
794
795 dw[1] =
796 __gen_offset(values->PointertoVSBindingTable, 5, 15) |
797 0;
798
799 }
800
801 #define GEN7_3DSTATE_BLEND_STATE_POINTERS_length 0x00000002
802 #define GEN7_3DSTATE_BLEND_STATE_POINTERS_length_bias 0x00000002
803 #define GEN7_3DSTATE_BLEND_STATE_POINTERS_header\
804 .CommandType = 3, \
805 .CommandSubType = 3, \
806 ._3DCommandOpcode = 0, \
807 ._3DCommandSubOpcode = 36, \
808 .DwordLength = 0
809
810 struct GEN7_3DSTATE_BLEND_STATE_POINTERS {
811 uint32_t CommandType;
812 uint32_t CommandSubType;
813 uint32_t _3DCommandOpcode;
814 uint32_t _3DCommandSubOpcode;
815 uint32_t DwordLength;
816 uint32_t BlendStatePointer;
817 };
818
819 static inline void
820 GEN7_3DSTATE_BLEND_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
821 const struct GEN7_3DSTATE_BLEND_STATE_POINTERS * restrict values)
822 {
823 uint32_t *dw = (uint32_t * restrict) dst;
824
825 dw[0] =
826 __gen_field(values->CommandType, 29, 31) |
827 __gen_field(values->CommandSubType, 27, 28) |
828 __gen_field(values->_3DCommandOpcode, 24, 26) |
829 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
830 __gen_field(values->DwordLength, 0, 7) |
831 0;
832
833 dw[1] =
834 __gen_offset(values->BlendStatePointer, 6, 31) |
835 0;
836
837 }
838
839 #define GEN7_3DSTATE_CC_STATE_POINTERS_length 0x00000002
840 #define GEN7_3DSTATE_CC_STATE_POINTERS_length_bias 0x00000002
841 #define GEN7_3DSTATE_CC_STATE_POINTERS_header \
842 .CommandType = 3, \
843 .CommandSubType = 3, \
844 ._3DCommandOpcode = 0, \
845 ._3DCommandSubOpcode = 14, \
846 .DwordLength = 0
847
848 struct GEN7_3DSTATE_CC_STATE_POINTERS {
849 uint32_t CommandType;
850 uint32_t CommandSubType;
851 uint32_t _3DCommandOpcode;
852 uint32_t _3DCommandSubOpcode;
853 uint32_t DwordLength;
854 uint32_t ColorCalcStatePointer;
855 };
856
857 static inline void
858 GEN7_3DSTATE_CC_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
859 const struct GEN7_3DSTATE_CC_STATE_POINTERS * restrict values)
860 {
861 uint32_t *dw = (uint32_t * restrict) dst;
862
863 dw[0] =
864 __gen_field(values->CommandType, 29, 31) |
865 __gen_field(values->CommandSubType, 27, 28) |
866 __gen_field(values->_3DCommandOpcode, 24, 26) |
867 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
868 __gen_field(values->DwordLength, 0, 7) |
869 0;
870
871 dw[1] =
872 __gen_offset(values->ColorCalcStatePointer, 6, 31) |
873 0;
874
875 }
876
877 #define GEN7_3DSTATE_CHROMA_KEY_length 0x00000004
878 #define GEN7_3DSTATE_CHROMA_KEY_length_bias 0x00000002
879 #define GEN7_3DSTATE_CHROMA_KEY_header \
880 .CommandType = 3, \
881 .CommandSubType = 3, \
882 ._3DCommandOpcode = 1, \
883 ._3DCommandSubOpcode = 4, \
884 .DwordLength = 2
885
886 struct GEN7_3DSTATE_CHROMA_KEY {
887 uint32_t CommandType;
888 uint32_t CommandSubType;
889 uint32_t _3DCommandOpcode;
890 uint32_t _3DCommandSubOpcode;
891 uint32_t DwordLength;
892 uint32_t ChromaKeyTableIndex;
893 uint32_t ChromaKeyLowValue;
894 uint32_t ChromaKeyHighValue;
895 };
896
897 static inline void
898 GEN7_3DSTATE_CHROMA_KEY_pack(__gen_user_data *data, void * restrict dst,
899 const struct GEN7_3DSTATE_CHROMA_KEY * restrict values)
900 {
901 uint32_t *dw = (uint32_t * restrict) dst;
902
903 dw[0] =
904 __gen_field(values->CommandType, 29, 31) |
905 __gen_field(values->CommandSubType, 27, 28) |
906 __gen_field(values->_3DCommandOpcode, 24, 26) |
907 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
908 __gen_field(values->DwordLength, 0, 7) |
909 0;
910
911 dw[1] =
912 __gen_field(values->ChromaKeyTableIndex, 30, 31) |
913 0;
914
915 dw[2] =
916 __gen_field(values->ChromaKeyLowValue, 0, 31) |
917 0;
918
919 dw[3] =
920 __gen_field(values->ChromaKeyHighValue, 0, 31) |
921 0;
922
923 }
924
925 #define GEN7_3DSTATE_CLEAR_PARAMS_length 0x00000003
926 #define GEN7_3DSTATE_CLEAR_PARAMS_length_bias 0x00000002
927 #define GEN7_3DSTATE_CLEAR_PARAMS_header \
928 .CommandType = 3, \
929 .CommandSubType = 3, \
930 ._3DCommandOpcode = 0, \
931 ._3DCommandSubOpcode = 4, \
932 .DwordLength = 1
933
934 struct GEN7_3DSTATE_CLEAR_PARAMS {
935 uint32_t CommandType;
936 uint32_t CommandSubType;
937 uint32_t _3DCommandOpcode;
938 uint32_t _3DCommandSubOpcode;
939 uint32_t DwordLength;
940 uint32_t DepthClearValue;
941 uint32_t DepthClearValueValid;
942 };
943
944 static inline void
945 GEN7_3DSTATE_CLEAR_PARAMS_pack(__gen_user_data *data, void * restrict dst,
946 const struct GEN7_3DSTATE_CLEAR_PARAMS * restrict values)
947 {
948 uint32_t *dw = (uint32_t * restrict) dst;
949
950 dw[0] =
951 __gen_field(values->CommandType, 29, 31) |
952 __gen_field(values->CommandSubType, 27, 28) |
953 __gen_field(values->_3DCommandOpcode, 24, 26) |
954 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
955 __gen_field(values->DwordLength, 0, 7) |
956 0;
957
958 dw[1] =
959 __gen_field(values->DepthClearValue, 0, 31) |
960 0;
961
962 dw[2] =
963 __gen_field(values->DepthClearValueValid, 0, 0) |
964 0;
965
966 }
967
968 #define GEN7_3DSTATE_CLIP_length 0x00000004
969 #define GEN7_3DSTATE_CLIP_length_bias 0x00000002
970 #define GEN7_3DSTATE_CLIP_header \
971 .CommandType = 3, \
972 .CommandSubType = 3, \
973 ._3DCommandOpcode = 0, \
974 ._3DCommandSubOpcode = 18, \
975 .DwordLength = 2
976
977 struct GEN7_3DSTATE_CLIP {
978 uint32_t CommandType;
979 uint32_t CommandSubType;
980 uint32_t _3DCommandOpcode;
981 uint32_t _3DCommandSubOpcode;
982 uint32_t DwordLength;
983 uint32_t FrontWinding;
984 uint32_t VertexSubPixelPrecisionSelect;
985 uint32_t EarlyCullEnable;
986 #define CULLMODE_BOTH 0
987 #define CULLMODE_NONE 1
988 #define CULLMODE_FRONT 2
989 #define CULLMODE_BACK 3
990 uint32_t CullMode;
991 uint32_t ClipperStatisticsEnable;
992 uint32_t UserClipDistanceCullTestEnableBitmask;
993 uint32_t ClipEnable;
994 #define APIMODE_OGL 0
995 uint32_t APIMode;
996 uint32_t ViewportXYClipTestEnable;
997 uint32_t ViewportZClipTestEnable;
998 uint32_t GuardbandClipTestEnable;
999 uint32_t UserClipDistanceClipTestEnableBitmask;
1000 #define CLIPMODE_NORMAL 0
1001 #define CLIPMODE_REJECT_ALL 3
1002 #define CLIPMODE_ACCEPT_ALL 4
1003 uint32_t ClipMode;
1004 uint32_t PerspectiveDivideDisable;
1005 uint32_t NonPerspectiveBarycentricEnable;
1006 #define Vertex0 0
1007 #define Vertex1 1
1008 #define Vertex2 2
1009 uint32_t TriangleStripListProvokingVertexSelect;
1010 #define Vertex0 0
1011 #define Vertex1 1
1012 uint32_t LineStripListProvokingVertexSelect;
1013 #define Vertex0 0
1014 #define Vertex1 1
1015 #define Vertex2 2
1016 uint32_t TriangleFanProvokingVertexSelect;
1017 float MinimumPointWidth;
1018 float MaximumPointWidth;
1019 uint32_t ForceZeroRTAIndexEnable;
1020 uint32_t MaximumVPIndex;
1021 };
1022
1023 static inline void
1024 GEN7_3DSTATE_CLIP_pack(__gen_user_data *data, void * restrict dst,
1025 const struct GEN7_3DSTATE_CLIP * restrict values)
1026 {
1027 uint32_t *dw = (uint32_t * restrict) dst;
1028
1029 dw[0] =
1030 __gen_field(values->CommandType, 29, 31) |
1031 __gen_field(values->CommandSubType, 27, 28) |
1032 __gen_field(values->_3DCommandOpcode, 24, 26) |
1033 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1034 __gen_field(values->DwordLength, 0, 7) |
1035 0;
1036
1037 dw[1] =
1038 __gen_field(values->FrontWinding, 20, 20) |
1039 __gen_field(values->VertexSubPixelPrecisionSelect, 19, 19) |
1040 __gen_field(values->EarlyCullEnable, 18, 18) |
1041 __gen_field(values->CullMode, 16, 17) |
1042 __gen_field(values->ClipperStatisticsEnable, 10, 10) |
1043 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
1044 0;
1045
1046 dw[2] =
1047 __gen_field(values->ClipEnable, 31, 31) |
1048 __gen_field(values->APIMode, 30, 30) |
1049 __gen_field(values->ViewportXYClipTestEnable, 28, 28) |
1050 __gen_field(values->ViewportZClipTestEnable, 27, 27) |
1051 __gen_field(values->GuardbandClipTestEnable, 26, 26) |
1052 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 16, 23) |
1053 __gen_field(values->ClipMode, 13, 15) |
1054 __gen_field(values->PerspectiveDivideDisable, 9, 9) |
1055 __gen_field(values->NonPerspectiveBarycentricEnable, 8, 8) |
1056 __gen_field(values->TriangleStripListProvokingVertexSelect, 4, 5) |
1057 __gen_field(values->LineStripListProvokingVertexSelect, 2, 3) |
1058 __gen_field(values->TriangleFanProvokingVertexSelect, 0, 1) |
1059 0;
1060
1061 dw[3] =
1062 __gen_field(values->MinimumPointWidth * (1 << 3), 17, 27) |
1063 __gen_field(values->MaximumPointWidth * (1 << 3), 6, 16) |
1064 __gen_field(values->ForceZeroRTAIndexEnable, 5, 5) |
1065 __gen_field(values->MaximumVPIndex, 0, 3) |
1066 0;
1067
1068 }
1069
1070 #define GEN7_3DSTATE_CONSTANT_DS_length 0x00000007
1071 #define GEN7_3DSTATE_CONSTANT_DS_length_bias 0x00000002
1072 #define GEN7_3DSTATE_CONSTANT_DS_header \
1073 .CommandType = 3, \
1074 .CommandSubType = 3, \
1075 ._3DCommandOpcode = 0, \
1076 ._3DCommandSubOpcode = 26, \
1077 .DwordLength = 5
1078
1079 struct GEN7_3DSTATE_CONSTANT_BODY {
1080 uint32_t ConstantBuffer1ReadLength;
1081 uint32_t ConstantBuffer0ReadLength;
1082 uint32_t ConstantBuffer3ReadLength;
1083 uint32_t ConstantBuffer2ReadLength;
1084 __gen_address_type PointerToConstantBuffer0;
1085 struct GEN7_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
1086 __gen_address_type PointerToConstantBuffer1;
1087 __gen_address_type PointerToConstantBuffer2;
1088 __gen_address_type PointerToConstantBuffer3;
1089 };
1090
1091 static inline void
1092 GEN7_3DSTATE_CONSTANT_BODY_pack(__gen_user_data *data, void * restrict dst,
1093 const struct GEN7_3DSTATE_CONSTANT_BODY * restrict values)
1094 {
1095 uint32_t *dw = (uint32_t * restrict) dst;
1096
1097 dw[0] =
1098 __gen_field(values->ConstantBuffer1ReadLength, 16, 31) |
1099 __gen_field(values->ConstantBuffer0ReadLength, 0, 15) |
1100 0;
1101
1102 dw[1] =
1103 __gen_field(values->ConstantBuffer3ReadLength, 16, 31) |
1104 __gen_field(values->ConstantBuffer2ReadLength, 0, 15) |
1105 0;
1106
1107 uint32_t dw_ConstantBufferObjectControlState;
1108 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
1109 uint32_t dw2 =
1110 __gen_field(dw_ConstantBufferObjectControlState, 0, 4) |
1111 0;
1112
1113 dw[2] =
1114 __gen_combine_address(data, &dw[2], values->PointerToConstantBuffer0, dw2);
1115
1116 uint32_t dw3 =
1117 0;
1118
1119 dw[3] =
1120 __gen_combine_address(data, &dw[3], values->PointerToConstantBuffer1, dw3);
1121
1122 uint32_t dw4 =
1123 0;
1124
1125 dw[4] =
1126 __gen_combine_address(data, &dw[4], values->PointerToConstantBuffer2, dw4);
1127
1128 uint32_t dw5 =
1129 0;
1130
1131 dw[5] =
1132 __gen_combine_address(data, &dw[5], values->PointerToConstantBuffer3, dw5);
1133
1134 }
1135
1136 struct GEN7_3DSTATE_CONSTANT_DS {
1137 uint32_t CommandType;
1138 uint32_t CommandSubType;
1139 uint32_t _3DCommandOpcode;
1140 uint32_t _3DCommandSubOpcode;
1141 uint32_t DwordLength;
1142 struct GEN7_3DSTATE_CONSTANT_BODY ConstantBody;
1143 };
1144
1145 static inline void
1146 GEN7_3DSTATE_CONSTANT_DS_pack(__gen_user_data *data, void * restrict dst,
1147 const struct GEN7_3DSTATE_CONSTANT_DS * restrict values)
1148 {
1149 uint32_t *dw = (uint32_t * restrict) dst;
1150
1151 dw[0] =
1152 __gen_field(values->CommandType, 29, 31) |
1153 __gen_field(values->CommandSubType, 27, 28) |
1154 __gen_field(values->_3DCommandOpcode, 24, 26) |
1155 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1156 __gen_field(values->DwordLength, 0, 7) |
1157 0;
1158
1159 GEN7_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1160 }
1161
1162 #define GEN7_3DSTATE_CONSTANT_GS_length 0x00000007
1163 #define GEN7_3DSTATE_CONSTANT_GS_length_bias 0x00000002
1164 #define GEN7_3DSTATE_CONSTANT_GS_header \
1165 .CommandType = 3, \
1166 .CommandSubType = 3, \
1167 ._3DCommandOpcode = 0, \
1168 ._3DCommandSubOpcode = 22, \
1169 .DwordLength = 5
1170
1171 struct GEN7_3DSTATE_CONSTANT_GS {
1172 uint32_t CommandType;
1173 uint32_t CommandSubType;
1174 uint32_t _3DCommandOpcode;
1175 uint32_t _3DCommandSubOpcode;
1176 uint32_t DwordLength;
1177 struct GEN7_3DSTATE_CONSTANT_BODY ConstantBody;
1178 };
1179
1180 static inline void
1181 GEN7_3DSTATE_CONSTANT_GS_pack(__gen_user_data *data, void * restrict dst,
1182 const struct GEN7_3DSTATE_CONSTANT_GS * restrict values)
1183 {
1184 uint32_t *dw = (uint32_t * restrict) dst;
1185
1186 dw[0] =
1187 __gen_field(values->CommandType, 29, 31) |
1188 __gen_field(values->CommandSubType, 27, 28) |
1189 __gen_field(values->_3DCommandOpcode, 24, 26) |
1190 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1191 __gen_field(values->DwordLength, 0, 7) |
1192 0;
1193
1194 GEN7_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1195 }
1196
1197 #define GEN7_3DSTATE_CONSTANT_HS_length 0x00000007
1198 #define GEN7_3DSTATE_CONSTANT_HS_length_bias 0x00000002
1199 #define GEN7_3DSTATE_CONSTANT_HS_header \
1200 .CommandType = 3, \
1201 .CommandSubType = 3, \
1202 ._3DCommandOpcode = 0, \
1203 ._3DCommandSubOpcode = 25, \
1204 .DwordLength = 5
1205
1206 struct GEN7_3DSTATE_CONSTANT_HS {
1207 uint32_t CommandType;
1208 uint32_t CommandSubType;
1209 uint32_t _3DCommandOpcode;
1210 uint32_t _3DCommandSubOpcode;
1211 uint32_t DwordLength;
1212 struct GEN7_3DSTATE_CONSTANT_BODY ConstantBody;
1213 };
1214
1215 static inline void
1216 GEN7_3DSTATE_CONSTANT_HS_pack(__gen_user_data *data, void * restrict dst,
1217 const struct GEN7_3DSTATE_CONSTANT_HS * restrict values)
1218 {
1219 uint32_t *dw = (uint32_t * restrict) dst;
1220
1221 dw[0] =
1222 __gen_field(values->CommandType, 29, 31) |
1223 __gen_field(values->CommandSubType, 27, 28) |
1224 __gen_field(values->_3DCommandOpcode, 24, 26) |
1225 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1226 __gen_field(values->DwordLength, 0, 7) |
1227 0;
1228
1229 GEN7_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1230 }
1231
1232 #define GEN7_3DSTATE_CONSTANT_PS_length 0x00000007
1233 #define GEN7_3DSTATE_CONSTANT_PS_length_bias 0x00000002
1234 #define GEN7_3DSTATE_CONSTANT_PS_header \
1235 .CommandType = 3, \
1236 .CommandSubType = 3, \
1237 ._3DCommandOpcode = 0, \
1238 ._3DCommandSubOpcode = 23, \
1239 .DwordLength = 5
1240
1241 struct GEN7_3DSTATE_CONSTANT_PS {
1242 uint32_t CommandType;
1243 uint32_t CommandSubType;
1244 uint32_t _3DCommandOpcode;
1245 uint32_t _3DCommandSubOpcode;
1246 uint32_t DwordLength;
1247 struct GEN7_3DSTATE_CONSTANT_BODY ConstantBody;
1248 };
1249
1250 static inline void
1251 GEN7_3DSTATE_CONSTANT_PS_pack(__gen_user_data *data, void * restrict dst,
1252 const struct GEN7_3DSTATE_CONSTANT_PS * restrict values)
1253 {
1254 uint32_t *dw = (uint32_t * restrict) dst;
1255
1256 dw[0] =
1257 __gen_field(values->CommandType, 29, 31) |
1258 __gen_field(values->CommandSubType, 27, 28) |
1259 __gen_field(values->_3DCommandOpcode, 24, 26) |
1260 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1261 __gen_field(values->DwordLength, 0, 7) |
1262 0;
1263
1264 GEN7_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1265 }
1266
1267 #define GEN7_3DSTATE_CONSTANT_VS_length 0x00000007
1268 #define GEN7_3DSTATE_CONSTANT_VS_length_bias 0x00000002
1269 #define GEN7_3DSTATE_CONSTANT_VS_header \
1270 .CommandType = 3, \
1271 .CommandSubType = 3, \
1272 ._3DCommandOpcode = 0, \
1273 ._3DCommandSubOpcode = 21, \
1274 .DwordLength = 5
1275
1276 struct GEN7_3DSTATE_CONSTANT_VS {
1277 uint32_t CommandType;
1278 uint32_t CommandSubType;
1279 uint32_t _3DCommandOpcode;
1280 uint32_t _3DCommandSubOpcode;
1281 uint32_t DwordLength;
1282 struct GEN7_3DSTATE_CONSTANT_BODY ConstantBody;
1283 };
1284
1285 static inline void
1286 GEN7_3DSTATE_CONSTANT_VS_pack(__gen_user_data *data, void * restrict dst,
1287 const struct GEN7_3DSTATE_CONSTANT_VS * restrict values)
1288 {
1289 uint32_t *dw = (uint32_t * restrict) dst;
1290
1291 dw[0] =
1292 __gen_field(values->CommandType, 29, 31) |
1293 __gen_field(values->CommandSubType, 27, 28) |
1294 __gen_field(values->_3DCommandOpcode, 24, 26) |
1295 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1296 __gen_field(values->DwordLength, 0, 7) |
1297 0;
1298
1299 GEN7_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1300 }
1301
1302 #define GEN7_3DSTATE_DEPTH_BUFFER_length 0x00000007
1303 #define GEN7_3DSTATE_DEPTH_BUFFER_length_bias 0x00000002
1304 #define GEN7_3DSTATE_DEPTH_BUFFER_header \
1305 .CommandType = 3, \
1306 .CommandSubType = 3, \
1307 ._3DCommandOpcode = 0, \
1308 ._3DCommandSubOpcode = 5, \
1309 .DwordLength = 5
1310
1311 struct GEN7_3DSTATE_DEPTH_BUFFER {
1312 uint32_t CommandType;
1313 uint32_t CommandSubType;
1314 uint32_t _3DCommandOpcode;
1315 uint32_t _3DCommandSubOpcode;
1316 uint32_t DwordLength;
1317 #define SURFTYPE_1D 0
1318 #define SURFTYPE_2D 1
1319 #define SURFTYPE_3D 2
1320 #define SURFTYPE_CUBE 3
1321 #define SURFTYPE_NULL 7
1322 uint32_t SurfaceType;
1323 uint32_t DepthWriteEnable;
1324 uint32_t StencilWriteEnable;
1325 uint32_t HierarchicalDepthBufferEnable;
1326 #define D32_FLOAT 1
1327 #define D24_UNORM_X8_UINT 3
1328 #define D16_UNORM 5
1329 uint32_t SurfaceFormat;
1330 uint32_t SurfacePitch;
1331 __gen_address_type SurfaceBaseAddress;
1332 uint32_t Height;
1333 uint32_t Width;
1334 uint32_t LOD;
1335 #define SURFTYPE_CUBEmustbezero 0
1336 uint32_t Depth;
1337 uint32_t MinimumArrayElement;
1338 struct GEN7_MEMORY_OBJECT_CONTROL_STATE DepthBufferObjectControlState;
1339 uint32_t DepthCoordinateOffsetY;
1340 uint32_t DepthCoordinateOffsetX;
1341 uint32_t RenderTargetViewExtent;
1342 };
1343
1344 static inline void
1345 GEN7_3DSTATE_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
1346 const struct GEN7_3DSTATE_DEPTH_BUFFER * restrict values)
1347 {
1348 uint32_t *dw = (uint32_t * restrict) dst;
1349
1350 dw[0] =
1351 __gen_field(values->CommandType, 29, 31) |
1352 __gen_field(values->CommandSubType, 27, 28) |
1353 __gen_field(values->_3DCommandOpcode, 24, 26) |
1354 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1355 __gen_field(values->DwordLength, 0, 7) |
1356 0;
1357
1358 dw[1] =
1359 __gen_field(values->SurfaceType, 29, 31) |
1360 __gen_field(values->DepthWriteEnable, 28, 28) |
1361 __gen_field(values->StencilWriteEnable, 27, 27) |
1362 __gen_field(values->HierarchicalDepthBufferEnable, 22, 22) |
1363 __gen_field(values->SurfaceFormat, 18, 20) |
1364 __gen_field(values->SurfacePitch, 0, 17) |
1365 0;
1366
1367 uint32_t dw2 =
1368 0;
1369
1370 dw[2] =
1371 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
1372
1373 dw[3] =
1374 __gen_field(values->Height, 18, 31) |
1375 __gen_field(values->Width, 4, 17) |
1376 __gen_field(values->LOD, 0, 3) |
1377 0;
1378
1379 uint32_t dw_DepthBufferObjectControlState;
1380 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DepthBufferObjectControlState, &values->DepthBufferObjectControlState);
1381 dw[4] =
1382 __gen_field(values->Depth, 21, 31) |
1383 __gen_field(values->MinimumArrayElement, 10, 20) |
1384 __gen_field(dw_DepthBufferObjectControlState, 0, 3) |
1385 0;
1386
1387 dw[5] =
1388 __gen_field(values->DepthCoordinateOffsetY, 16, 31) |
1389 __gen_field(values->DepthCoordinateOffsetX, 0, 15) |
1390 0;
1391
1392 dw[6] =
1393 __gen_field(values->RenderTargetViewExtent, 21, 31) |
1394 0;
1395
1396 }
1397
1398 #define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_length 0x00000002
1399 #define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_length_bias 0x00000002
1400 #define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_header\
1401 .CommandType = 3, \
1402 .CommandSubType = 3, \
1403 ._3DCommandOpcode = 0, \
1404 ._3DCommandSubOpcode = 37, \
1405 .DwordLength = 0
1406
1407 struct GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS {
1408 uint32_t CommandType;
1409 uint32_t CommandSubType;
1410 uint32_t _3DCommandOpcode;
1411 uint32_t _3DCommandSubOpcode;
1412 uint32_t DwordLength;
1413 uint32_t PointertoDEPTH_STENCIL_STATE;
1414 };
1415
1416 static inline void
1417 GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
1418 const struct GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS * restrict values)
1419 {
1420 uint32_t *dw = (uint32_t * restrict) dst;
1421
1422 dw[0] =
1423 __gen_field(values->CommandType, 29, 31) |
1424 __gen_field(values->CommandSubType, 27, 28) |
1425 __gen_field(values->_3DCommandOpcode, 24, 26) |
1426 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1427 __gen_field(values->DwordLength, 0, 7) |
1428 0;
1429
1430 dw[1] =
1431 __gen_offset(values->PointertoDEPTH_STENCIL_STATE, 6, 31) |
1432 0;
1433
1434 }
1435
1436 #define GEN7_3DSTATE_DRAWING_RECTANGLE_length 0x00000004
1437 #define GEN7_3DSTATE_DRAWING_RECTANGLE_length_bias 0x00000002
1438 #define GEN7_3DSTATE_DRAWING_RECTANGLE_header \
1439 .CommandType = 3, \
1440 .CommandSubType = 3, \
1441 ._3DCommandOpcode = 1, \
1442 ._3DCommandSubOpcode = 0, \
1443 .DwordLength = 2
1444
1445 struct GEN7_3DSTATE_DRAWING_RECTANGLE {
1446 uint32_t CommandType;
1447 uint32_t CommandSubType;
1448 uint32_t _3DCommandOpcode;
1449 uint32_t _3DCommandSubOpcode;
1450 uint32_t DwordLength;
1451 uint32_t ClippedDrawingRectangleYMin;
1452 uint32_t ClippedDrawingRectangleXMin;
1453 uint32_t ClippedDrawingRectangleYMax;
1454 uint32_t ClippedDrawingRectangleXMax;
1455 uint32_t DrawingRectangleOriginY;
1456 uint32_t DrawingRectangleOriginX;
1457 };
1458
1459 static inline void
1460 GEN7_3DSTATE_DRAWING_RECTANGLE_pack(__gen_user_data *data, void * restrict dst,
1461 const struct GEN7_3DSTATE_DRAWING_RECTANGLE * restrict values)
1462 {
1463 uint32_t *dw = (uint32_t * restrict) dst;
1464
1465 dw[0] =
1466 __gen_field(values->CommandType, 29, 31) |
1467 __gen_field(values->CommandSubType, 27, 28) |
1468 __gen_field(values->_3DCommandOpcode, 24, 26) |
1469 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1470 __gen_field(values->DwordLength, 0, 7) |
1471 0;
1472
1473 dw[1] =
1474 __gen_field(values->ClippedDrawingRectangleYMin, 16, 31) |
1475 __gen_field(values->ClippedDrawingRectangleXMin, 0, 15) |
1476 0;
1477
1478 dw[2] =
1479 __gen_field(values->ClippedDrawingRectangleYMax, 16, 31) |
1480 __gen_field(values->ClippedDrawingRectangleXMax, 0, 15) |
1481 0;
1482
1483 dw[3] =
1484 __gen_field(values->DrawingRectangleOriginY, 16, 31) |
1485 __gen_field(values->DrawingRectangleOriginX, 0, 15) |
1486 0;
1487
1488 }
1489
1490 #define GEN7_3DSTATE_DS_length 0x00000006
1491 #define GEN7_3DSTATE_DS_length_bias 0x00000002
1492 #define GEN7_3DSTATE_DS_header \
1493 .CommandType = 3, \
1494 .CommandSubType = 3, \
1495 ._3DCommandOpcode = 0, \
1496 ._3DCommandSubOpcode = 29, \
1497 .DwordLength = 4
1498
1499 struct GEN7_3DSTATE_DS {
1500 uint32_t CommandType;
1501 uint32_t CommandSubType;
1502 uint32_t _3DCommandOpcode;
1503 uint32_t _3DCommandSubOpcode;
1504 uint32_t DwordLength;
1505 uint32_t KernelStartPointer;
1506 #define Multiple 0
1507 #define Single 1
1508 uint32_t SingleDomainPointDispatch;
1509 #define Dmask 0
1510 #define Vmask 1
1511 uint32_t VectorMaskEnable;
1512 #define NoSamplers 0
1513 #define _14Samplers 1
1514 #define _58Samplers 2
1515 #define _912Samplers 3
1516 #define _1316Samplers 4
1517 uint32_t SamplerCount;
1518 uint32_t BindingTableEntryCount;
1519 #define IEEE754 0
1520 #define Alternate 1
1521 uint32_t FloatingPointMode;
1522 uint32_t IllegalOpcodeExceptionEnable;
1523 uint32_t SoftwareExceptionEnable;
1524 uint32_t ScratchSpaceBasePointer;
1525 uint32_t PerThreadScratchSpace;
1526 uint32_t DispatchGRFStartRegisterForURBData;
1527 uint32_t PatchURBEntryReadLength;
1528 uint32_t PatchURBEntryReadOffset;
1529 uint32_t MaximumNumberofThreads;
1530 uint32_t StatisticsEnable;
1531 uint32_t ComputeWCoordinateEnable;
1532 uint32_t DSCacheDisable;
1533 uint32_t DSFunctionEnable;
1534 };
1535
1536 static inline void
1537 GEN7_3DSTATE_DS_pack(__gen_user_data *data, void * restrict dst,
1538 const struct GEN7_3DSTATE_DS * restrict values)
1539 {
1540 uint32_t *dw = (uint32_t * restrict) dst;
1541
1542 dw[0] =
1543 __gen_field(values->CommandType, 29, 31) |
1544 __gen_field(values->CommandSubType, 27, 28) |
1545 __gen_field(values->_3DCommandOpcode, 24, 26) |
1546 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1547 __gen_field(values->DwordLength, 0, 7) |
1548 0;
1549
1550 dw[1] =
1551 __gen_offset(values->KernelStartPointer, 6, 31) |
1552 0;
1553
1554 dw[2] =
1555 __gen_field(values->SingleDomainPointDispatch, 31, 31) |
1556 __gen_field(values->VectorMaskEnable, 30, 30) |
1557 __gen_field(values->SamplerCount, 27, 29) |
1558 __gen_field(values->BindingTableEntryCount, 18, 25) |
1559 __gen_field(values->FloatingPointMode, 16, 16) |
1560 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
1561 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
1562 0;
1563
1564 dw[3] =
1565 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
1566 __gen_field(values->PerThreadScratchSpace, 0, 3) |
1567 0;
1568
1569 dw[4] =
1570 __gen_field(values->DispatchGRFStartRegisterForURBData, 20, 24) |
1571 __gen_field(values->PatchURBEntryReadLength, 11, 17) |
1572 __gen_field(values->PatchURBEntryReadOffset, 4, 9) |
1573 0;
1574
1575 dw[5] =
1576 __gen_field(values->MaximumNumberofThreads, 25, 31) |
1577 __gen_field(values->StatisticsEnable, 10, 10) |
1578 __gen_field(values->ComputeWCoordinateEnable, 2, 2) |
1579 __gen_field(values->DSCacheDisable, 1, 1) |
1580 __gen_field(values->DSFunctionEnable, 0, 0) |
1581 0;
1582
1583 }
1584
1585 #define GEN7_3DSTATE_GS_length 0x00000007
1586 #define GEN7_3DSTATE_GS_length_bias 0x00000002
1587 #define GEN7_3DSTATE_GS_header \
1588 .CommandType = 3, \
1589 .CommandSubType = 3, \
1590 ._3DCommandOpcode = 0, \
1591 ._3DCommandSubOpcode = 17, \
1592 .DwordLength = 5
1593
1594 struct GEN7_3DSTATE_GS {
1595 uint32_t CommandType;
1596 uint32_t CommandSubType;
1597 uint32_t _3DCommandOpcode;
1598 uint32_t _3DCommandSubOpcode;
1599 uint32_t DwordLength;
1600 uint32_t KernelStartPointer;
1601 uint32_t SingleProgramFlowSPF;
1602 #define Dmask 0
1603 #define Vmask 1
1604 uint32_t VectorMaskEnableVME;
1605 #define NoSamplers 0
1606 #define _14Samplers 1
1607 #define _58Samplers 2
1608 #define _912Samplers 3
1609 #define _1316Samplers 4
1610 uint32_t SamplerCount;
1611 uint32_t BindingTableEntryCount;
1612 #define NormalPriority 0
1613 #define HighPriority 1
1614 uint32_t ThreadPriority;
1615 #define IEEE754 0
1616 #define alternate 1
1617 uint32_t FloatingPointMode;
1618 uint32_t IllegalOpcodeExceptionEnable;
1619 uint32_t MaskStackExceptionEnable;
1620 uint32_t SoftwareExceptionEnable;
1621 uint32_t ScratchSpaceBasePointer;
1622 uint32_t PerThreadScratchSpace;
1623 uint32_t OutputVertexSize;
1624 uint32_t OutputTopology;
1625 uint32_t VertexURBEntryReadLength;
1626 uint32_t IncludeVertexHandles;
1627 uint32_t VertexURBEntryReadOffset;
1628 uint32_t DispatchGRFStartRegisterforURBData;
1629 uint32_t MaximumNumberofThreads;
1630 #define GSCTL_CUT 0
1631 #define GSCTL_SID 1
1632 uint32_t ControlDataFormat;
1633 uint32_t ControlDataHeaderSize;
1634 uint32_t InstanceControl;
1635 uint32_t DefaultStreamID;
1636 #define SINGLE 0
1637 #define DUAL_INSTANCE 1
1638 #define DUAL_OBJECT 2
1639 uint32_t DispatchMode;
1640 uint32_t GSStatisticsEnable;
1641 uint32_t GSInvocationsIncrementValue;
1642 uint32_t IncludePrimitiveID;
1643 uint32_t Hint;
1644 uint32_t ReorderEnable;
1645 uint32_t DiscardAdjacency;
1646 uint32_t GSEnable;
1647 uint32_t SemaphoreHandle;
1648 };
1649
1650 static inline void
1651 GEN7_3DSTATE_GS_pack(__gen_user_data *data, void * restrict dst,
1652 const struct GEN7_3DSTATE_GS * restrict values)
1653 {
1654 uint32_t *dw = (uint32_t * restrict) dst;
1655
1656 dw[0] =
1657 __gen_field(values->CommandType, 29, 31) |
1658 __gen_field(values->CommandSubType, 27, 28) |
1659 __gen_field(values->_3DCommandOpcode, 24, 26) |
1660 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1661 __gen_field(values->DwordLength, 0, 7) |
1662 0;
1663
1664 dw[1] =
1665 __gen_offset(values->KernelStartPointer, 6, 31) |
1666 0;
1667
1668 dw[2] =
1669 __gen_field(values->SingleProgramFlowSPF, 31, 31) |
1670 __gen_field(values->VectorMaskEnableVME, 30, 30) |
1671 __gen_field(values->SamplerCount, 27, 29) |
1672 __gen_field(values->BindingTableEntryCount, 18, 25) |
1673 __gen_field(values->ThreadPriority, 17, 17) |
1674 __gen_field(values->FloatingPointMode, 16, 16) |
1675 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
1676 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
1677 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
1678 0;
1679
1680 dw[3] =
1681 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
1682 __gen_field(values->PerThreadScratchSpace, 0, 3) |
1683 0;
1684
1685 dw[4] =
1686 __gen_field(values->OutputVertexSize, 23, 28) |
1687 __gen_field(values->OutputTopology, 17, 22) |
1688 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
1689 __gen_field(values->IncludeVertexHandles, 10, 10) |
1690 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
1691 __gen_field(values->DispatchGRFStartRegisterforURBData, 0, 3) |
1692 0;
1693
1694 dw[5] =
1695 __gen_field(values->MaximumNumberofThreads, 25, 31) |
1696 __gen_field(values->ControlDataFormat, 24, 24) |
1697 __gen_field(values->ControlDataHeaderSize, 20, 23) |
1698 __gen_field(values->InstanceControl, 15, 19) |
1699 __gen_field(values->DefaultStreamID, 13, 14) |
1700 __gen_field(values->DispatchMode, 11, 12) |
1701 __gen_field(values->GSStatisticsEnable, 10, 10) |
1702 __gen_field(values->GSInvocationsIncrementValue, 5, 9) |
1703 __gen_field(values->IncludePrimitiveID, 4, 4) |
1704 __gen_field(values->Hint, 3, 3) |
1705 __gen_field(values->ReorderEnable, 2, 2) |
1706 __gen_field(values->DiscardAdjacency, 1, 1) |
1707 __gen_field(values->GSEnable, 0, 0) |
1708 0;
1709
1710 dw[6] =
1711 __gen_offset(values->SemaphoreHandle, 0, 11) |
1712 0;
1713
1714 }
1715
1716 #define GEN7_3DSTATE_HIER_DEPTH_BUFFER_length 0x00000003
1717 #define GEN7_3DSTATE_HIER_DEPTH_BUFFER_length_bias 0x00000002
1718 #define GEN7_3DSTATE_HIER_DEPTH_BUFFER_header \
1719 .CommandType = 3, \
1720 .CommandSubType = 3, \
1721 ._3DCommandOpcode = 0, \
1722 ._3DCommandSubOpcode = 7, \
1723 .DwordLength = 1
1724
1725 struct GEN7_3DSTATE_HIER_DEPTH_BUFFER {
1726 uint32_t CommandType;
1727 uint32_t CommandSubType;
1728 uint32_t _3DCommandOpcode;
1729 uint32_t _3DCommandSubOpcode;
1730 uint32_t DwordLength;
1731 struct GEN7_MEMORY_OBJECT_CONTROL_STATE HierarchicalDepthBufferObjectControlState;
1732 uint32_t SurfacePitch;
1733 __gen_address_type SurfaceBaseAddress;
1734 };
1735
1736 static inline void
1737 GEN7_3DSTATE_HIER_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
1738 const struct GEN7_3DSTATE_HIER_DEPTH_BUFFER * restrict values)
1739 {
1740 uint32_t *dw = (uint32_t * restrict) dst;
1741
1742 dw[0] =
1743 __gen_field(values->CommandType, 29, 31) |
1744 __gen_field(values->CommandSubType, 27, 28) |
1745 __gen_field(values->_3DCommandOpcode, 24, 26) |
1746 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1747 __gen_field(values->DwordLength, 0, 7) |
1748 0;
1749
1750 uint32_t dw_HierarchicalDepthBufferObjectControlState;
1751 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_HierarchicalDepthBufferObjectControlState, &values->HierarchicalDepthBufferObjectControlState);
1752 dw[1] =
1753 __gen_field(dw_HierarchicalDepthBufferObjectControlState, 25, 28) |
1754 __gen_field(values->SurfacePitch, 0, 16) |
1755 0;
1756
1757 uint32_t dw2 =
1758 0;
1759
1760 dw[2] =
1761 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
1762
1763 }
1764
1765 #define GEN7_3DSTATE_HS_length 0x00000007
1766 #define GEN7_3DSTATE_HS_length_bias 0x00000002
1767 #define GEN7_3DSTATE_HS_header \
1768 .CommandType = 3, \
1769 .CommandSubType = 3, \
1770 ._3DCommandOpcode = 0, \
1771 ._3DCommandSubOpcode = 27, \
1772 .DwordLength = 5
1773
1774 struct GEN7_3DSTATE_HS {
1775 uint32_t CommandType;
1776 uint32_t CommandSubType;
1777 uint32_t _3DCommandOpcode;
1778 uint32_t _3DCommandSubOpcode;
1779 uint32_t DwordLength;
1780 #define NoSamplers 0
1781 #define _14Samplers 1
1782 #define _58Samplers 2
1783 #define _912Samplers 3
1784 #define _1316Samplers 4
1785 uint32_t SamplerCount;
1786 uint32_t BindingTableEntryCount;
1787 #define IEEE754 0
1788 #define alternate 1
1789 uint32_t FloatingPointMode;
1790 uint32_t IllegalOpcodeExceptionEnable;
1791 uint32_t SoftwareExceptionEnable;
1792 uint32_t MaximumNumberofThreads;
1793 uint32_t Enable;
1794 uint32_t StatisticsEnable;
1795 uint32_t InstanceCount;
1796 uint32_t KernelStartPointer;
1797 uint32_t ScratchSpaceBasePointer;
1798 uint32_t PerThreadScratchSpace;
1799 uint32_t SingleProgramFlow;
1800 #define Dmask 0
1801 #define Vmask 1
1802 uint32_t VectorMaskEnable;
1803 uint32_t IncludeVertexHandles;
1804 uint32_t DispatchGRFStartRegisterForURBData;
1805 uint32_t VertexURBEntryReadLength;
1806 uint32_t VertexURBEntryReadOffset;
1807 uint32_t SemaphoreHandle;
1808 };
1809
1810 static inline void
1811 GEN7_3DSTATE_HS_pack(__gen_user_data *data, void * restrict dst,
1812 const struct GEN7_3DSTATE_HS * restrict values)
1813 {
1814 uint32_t *dw = (uint32_t * restrict) dst;
1815
1816 dw[0] =
1817 __gen_field(values->CommandType, 29, 31) |
1818 __gen_field(values->CommandSubType, 27, 28) |
1819 __gen_field(values->_3DCommandOpcode, 24, 26) |
1820 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1821 __gen_field(values->DwordLength, 0, 7) |
1822 0;
1823
1824 dw[1] =
1825 __gen_field(values->SamplerCount, 27, 29) |
1826 __gen_field(values->BindingTableEntryCount, 18, 25) |
1827 __gen_field(values->FloatingPointMode, 16, 16) |
1828 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
1829 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
1830 __gen_field(values->MaximumNumberofThreads, 0, 6) |
1831 0;
1832
1833 dw[2] =
1834 __gen_field(values->Enable, 31, 31) |
1835 __gen_field(values->StatisticsEnable, 29, 29) |
1836 __gen_field(values->InstanceCount, 0, 3) |
1837 0;
1838
1839 dw[3] =
1840 __gen_offset(values->KernelStartPointer, 6, 31) |
1841 0;
1842
1843 dw[4] =
1844 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
1845 __gen_field(values->PerThreadScratchSpace, 0, 3) |
1846 0;
1847
1848 dw[5] =
1849 __gen_field(values->SingleProgramFlow, 27, 27) |
1850 __gen_field(values->VectorMaskEnable, 26, 26) |
1851 __gen_field(values->IncludeVertexHandles, 24, 24) |
1852 __gen_field(values->DispatchGRFStartRegisterForURBData, 19, 23) |
1853 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
1854 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
1855 0;
1856
1857 dw[6] =
1858 __gen_offset(values->SemaphoreHandle, 0, 11) |
1859 0;
1860
1861 }
1862
1863 #define GEN7_3DSTATE_INDEX_BUFFER_length 0x00000003
1864 #define GEN7_3DSTATE_INDEX_BUFFER_length_bias 0x00000002
1865 #define GEN7_3DSTATE_INDEX_BUFFER_header \
1866 .CommandType = 3, \
1867 .CommandSubType = 3, \
1868 ._3DCommandOpcode = 0, \
1869 ._3DCommandSubOpcode = 10, \
1870 .DwordLength = 1
1871
1872 struct GEN7_3DSTATE_INDEX_BUFFER {
1873 uint32_t CommandType;
1874 uint32_t CommandSubType;
1875 uint32_t _3DCommandOpcode;
1876 uint32_t _3DCommandSubOpcode;
1877 struct GEN7_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
1878 uint32_t CutIndexEnable;
1879 #define INDEX_BYTE 0
1880 #define INDEX_WORD 1
1881 #define INDEX_DWORD 2
1882 uint32_t IndexFormat;
1883 uint32_t DwordLength;
1884 __gen_address_type BufferStartingAddress;
1885 __gen_address_type BufferEndingAddress;
1886 };
1887
1888 static inline void
1889 GEN7_3DSTATE_INDEX_BUFFER_pack(__gen_user_data *data, void * restrict dst,
1890 const struct GEN7_3DSTATE_INDEX_BUFFER * restrict values)
1891 {
1892 uint32_t *dw = (uint32_t * restrict) dst;
1893
1894 uint32_t dw_MemoryObjectControlState;
1895 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
1896 dw[0] =
1897 __gen_field(values->CommandType, 29, 31) |
1898 __gen_field(values->CommandSubType, 27, 28) |
1899 __gen_field(values->_3DCommandOpcode, 24, 26) |
1900 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1901 __gen_field(dw_MemoryObjectControlState, 12, 15) |
1902 __gen_field(values->CutIndexEnable, 10, 10) |
1903 __gen_field(values->IndexFormat, 8, 9) |
1904 __gen_field(values->DwordLength, 0, 7) |
1905 0;
1906
1907 uint32_t dw1 =
1908 0;
1909
1910 dw[1] =
1911 __gen_combine_address(data, &dw[1], values->BufferStartingAddress, dw1);
1912
1913 uint32_t dw2 =
1914 0;
1915
1916 dw[2] =
1917 __gen_combine_address(data, &dw[2], values->BufferEndingAddress, dw2);
1918
1919 }
1920
1921 #define GEN7_3DSTATE_LINE_STIPPLE_length 0x00000003
1922 #define GEN7_3DSTATE_LINE_STIPPLE_length_bias 0x00000002
1923 #define GEN7_3DSTATE_LINE_STIPPLE_header \
1924 .CommandType = 3, \
1925 .CommandSubType = 3, \
1926 ._3DCommandOpcode = 1, \
1927 ._3DCommandSubOpcode = 8, \
1928 .DwordLength = 1
1929
1930 struct GEN7_3DSTATE_LINE_STIPPLE {
1931 uint32_t CommandType;
1932 uint32_t CommandSubType;
1933 uint32_t _3DCommandOpcode;
1934 uint32_t _3DCommandSubOpcode;
1935 uint32_t DwordLength;
1936 uint32_t ModifyEnableCurrentRepeatCounterCurrentStippleIndex;
1937 uint32_t CurrentRepeatCounter;
1938 uint32_t CurrentStippleIndex;
1939 uint32_t LineStipplePattern;
1940 float LineStippleInverseRepeatCount;
1941 uint32_t LineStippleRepeatCount;
1942 };
1943
1944 static inline void
1945 GEN7_3DSTATE_LINE_STIPPLE_pack(__gen_user_data *data, void * restrict dst,
1946 const struct GEN7_3DSTATE_LINE_STIPPLE * restrict values)
1947 {
1948 uint32_t *dw = (uint32_t * restrict) dst;
1949
1950 dw[0] =
1951 __gen_field(values->CommandType, 29, 31) |
1952 __gen_field(values->CommandSubType, 27, 28) |
1953 __gen_field(values->_3DCommandOpcode, 24, 26) |
1954 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1955 __gen_field(values->DwordLength, 0, 7) |
1956 0;
1957
1958 dw[1] =
1959 __gen_field(values->ModifyEnableCurrentRepeatCounterCurrentStippleIndex, 31, 31) |
1960 __gen_field(values->CurrentRepeatCounter, 21, 29) |
1961 __gen_field(values->CurrentStippleIndex, 16, 19) |
1962 __gen_field(values->LineStipplePattern, 0, 15) |
1963 0;
1964
1965 dw[2] =
1966 __gen_field(values->LineStippleInverseRepeatCount * (1 << 16), 15, 31) |
1967 __gen_field(values->LineStippleRepeatCount, 0, 8) |
1968 0;
1969
1970 }
1971
1972 #define GEN7_3DSTATE_MONOFILTER_SIZE_length 0x00000002
1973 #define GEN7_3DSTATE_MONOFILTER_SIZE_length_bias 0x00000002
1974 #define GEN7_3DSTATE_MONOFILTER_SIZE_header \
1975 .CommandType = 3, \
1976 .CommandSubType = 3, \
1977 ._3DCommandOpcode = 1, \
1978 ._3DCommandSubOpcode = 17, \
1979 .DwordLength = 0
1980
1981 struct GEN7_3DSTATE_MONOFILTER_SIZE {
1982 uint32_t CommandType;
1983 uint32_t CommandSubType;
1984 uint32_t _3DCommandOpcode;
1985 uint32_t _3DCommandSubOpcode;
1986 uint32_t DwordLength;
1987 uint32_t MonochromeFilterWidth;
1988 uint32_t MonochromeFilterHeight;
1989 };
1990
1991 static inline void
1992 GEN7_3DSTATE_MONOFILTER_SIZE_pack(__gen_user_data *data, void * restrict dst,
1993 const struct GEN7_3DSTATE_MONOFILTER_SIZE * restrict values)
1994 {
1995 uint32_t *dw = (uint32_t * restrict) dst;
1996
1997 dw[0] =
1998 __gen_field(values->CommandType, 29, 31) |
1999 __gen_field(values->CommandSubType, 27, 28) |
2000 __gen_field(values->_3DCommandOpcode, 24, 26) |
2001 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2002 __gen_field(values->DwordLength, 0, 7) |
2003 0;
2004
2005 dw[1] =
2006 __gen_field(values->MonochromeFilterWidth, 3, 5) |
2007 __gen_field(values->MonochromeFilterHeight, 0, 2) |
2008 0;
2009
2010 }
2011
2012 #define GEN7_3DSTATE_MULTISAMPLE_length 0x00000004
2013 #define GEN7_3DSTATE_MULTISAMPLE_length_bias 0x00000002
2014 #define GEN7_3DSTATE_MULTISAMPLE_header \
2015 .CommandType = 3, \
2016 .CommandSubType = 3, \
2017 ._3DCommandOpcode = 1, \
2018 ._3DCommandSubOpcode = 13, \
2019 .DwordLength = 2
2020
2021 struct GEN7_3DSTATE_MULTISAMPLE {
2022 uint32_t CommandType;
2023 uint32_t CommandSubType;
2024 uint32_t _3DCommandOpcode;
2025 uint32_t _3DCommandSubOpcode;
2026 uint32_t DwordLength;
2027 #define PIXLOC_CENTER 0
2028 #define PIXLOC_UL_CORNER 1
2029 uint32_t PixelLocation;
2030 #define NUMSAMPLES_1 0
2031 #define NUMSAMPLES_4 2
2032 #define NUMSAMPLES_8 3
2033 uint32_t NumberofMultisamples;
2034 float Sample3XOffset;
2035 float Sample3YOffset;
2036 float Sample2XOffset;
2037 float Sample2YOffset;
2038 float Sample1XOffset;
2039 float Sample1YOffset;
2040 float Sample0XOffset;
2041 float Sample0YOffset;
2042 float Sample7XOffset;
2043 float Sample7YOffset;
2044 float Sample6XOffset;
2045 float Sample6YOffset;
2046 float Sample5XOffset;
2047 float Sample5YOffset;
2048 float Sample4XOffset;
2049 float Sample4YOffset;
2050 };
2051
2052 static inline void
2053 GEN7_3DSTATE_MULTISAMPLE_pack(__gen_user_data *data, void * restrict dst,
2054 const struct GEN7_3DSTATE_MULTISAMPLE * restrict values)
2055 {
2056 uint32_t *dw = (uint32_t * restrict) dst;
2057
2058 dw[0] =
2059 __gen_field(values->CommandType, 29, 31) |
2060 __gen_field(values->CommandSubType, 27, 28) |
2061 __gen_field(values->_3DCommandOpcode, 24, 26) |
2062 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2063 __gen_field(values->DwordLength, 0, 7) |
2064 0;
2065
2066 dw[1] =
2067 __gen_field(values->PixelLocation, 4, 4) |
2068 __gen_field(values->NumberofMultisamples, 1, 3) |
2069 0;
2070
2071 dw[2] =
2072 __gen_field(values->Sample3XOffset * (1 << 4), 28, 31) |
2073 __gen_field(values->Sample3YOffset * (1 << 4), 24, 27) |
2074 __gen_field(values->Sample2XOffset * (1 << 4), 20, 23) |
2075 __gen_field(values->Sample2YOffset * (1 << 4), 16, 19) |
2076 __gen_field(values->Sample1XOffset * (1 << 4), 12, 15) |
2077 __gen_field(values->Sample1YOffset * (1 << 4), 8, 11) |
2078 __gen_field(values->Sample0XOffset * (1 << 4), 4, 7) |
2079 __gen_field(values->Sample0YOffset * (1 << 4), 0, 3) |
2080 0;
2081
2082 dw[3] =
2083 __gen_field(values->Sample7XOffset * (1 << 4), 28, 31) |
2084 __gen_field(values->Sample7YOffset * (1 << 4), 24, 27) |
2085 __gen_field(values->Sample6XOffset * (1 << 4), 20, 23) |
2086 __gen_field(values->Sample6YOffset * (1 << 4), 16, 19) |
2087 __gen_field(values->Sample5XOffset * (1 << 4), 12, 15) |
2088 __gen_field(values->Sample5YOffset * (1 << 4), 8, 11) |
2089 __gen_field(values->Sample4XOffset * (1 << 4), 4, 7) |
2090 __gen_field(values->Sample4YOffset * (1 << 4), 0, 3) |
2091 0;
2092
2093 }
2094
2095 #define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_length 0x00000002
2096 #define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_length_bias 0x00000002
2097 #define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_header \
2098 .CommandType = 3, \
2099 .CommandSubType = 3, \
2100 ._3DCommandOpcode = 1, \
2101 ._3DCommandSubOpcode = 6, \
2102 .DwordLength = 0
2103
2104 struct GEN7_3DSTATE_POLY_STIPPLE_OFFSET {
2105 uint32_t CommandType;
2106 uint32_t CommandSubType;
2107 uint32_t _3DCommandOpcode;
2108 uint32_t _3DCommandSubOpcode;
2109 uint32_t DwordLength;
2110 uint32_t PolygonStippleXOffset;
2111 uint32_t PolygonStippleYOffset;
2112 };
2113
2114 static inline void
2115 GEN7_3DSTATE_POLY_STIPPLE_OFFSET_pack(__gen_user_data *data, void * restrict dst,
2116 const struct GEN7_3DSTATE_POLY_STIPPLE_OFFSET * restrict values)
2117 {
2118 uint32_t *dw = (uint32_t * restrict) dst;
2119
2120 dw[0] =
2121 __gen_field(values->CommandType, 29, 31) |
2122 __gen_field(values->CommandSubType, 27, 28) |
2123 __gen_field(values->_3DCommandOpcode, 24, 26) |
2124 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2125 __gen_field(values->DwordLength, 0, 7) |
2126 0;
2127
2128 dw[1] =
2129 __gen_field(values->PolygonStippleXOffset, 8, 12) |
2130 __gen_field(values->PolygonStippleYOffset, 0, 4) |
2131 0;
2132
2133 }
2134
2135 #define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_length 0x00000021
2136 #define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_length_bias 0x00000002
2137 #define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_header\
2138 .CommandType = 3, \
2139 .CommandSubType = 3, \
2140 ._3DCommandOpcode = 1, \
2141 ._3DCommandSubOpcode = 7, \
2142 .DwordLength = 31
2143
2144 struct GEN7_3DSTATE_POLY_STIPPLE_PATTERN {
2145 uint32_t CommandType;
2146 uint32_t CommandSubType;
2147 uint32_t _3DCommandOpcode;
2148 uint32_t _3DCommandSubOpcode;
2149 uint32_t DwordLength;
2150 uint32_t PatternRow;
2151 };
2152
2153 static inline void
2154 GEN7_3DSTATE_POLY_STIPPLE_PATTERN_pack(__gen_user_data *data, void * restrict dst,
2155 const struct GEN7_3DSTATE_POLY_STIPPLE_PATTERN * restrict values)
2156 {
2157 uint32_t *dw = (uint32_t * restrict) dst;
2158
2159 dw[0] =
2160 __gen_field(values->CommandType, 29, 31) |
2161 __gen_field(values->CommandSubType, 27, 28) |
2162 __gen_field(values->_3DCommandOpcode, 24, 26) |
2163 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2164 __gen_field(values->DwordLength, 0, 7) |
2165 0;
2166
2167 dw[1] =
2168 __gen_field(values->PatternRow, 0, 31) |
2169 0;
2170
2171 }
2172
2173 #define GEN7_3DSTATE_PS_length 0x00000008
2174 #define GEN7_3DSTATE_PS_length_bias 0x00000002
2175 #define GEN7_3DSTATE_PS_header \
2176 .CommandType = 3, \
2177 .CommandSubType = 3, \
2178 ._3DCommandOpcode = 0, \
2179 ._3DCommandSubOpcode = 32, \
2180 .DwordLength = 6
2181
2182 struct GEN7_3DSTATE_PS {
2183 uint32_t CommandType;
2184 uint32_t CommandSubType;
2185 uint32_t _3DCommandOpcode;
2186 uint32_t _3DCommandSubOpcode;
2187 uint32_t DwordLength;
2188 uint32_t KernelStartPointer0;
2189 #define Multiple 0
2190 #define Single 1
2191 uint32_t SingleProgramFlowSPF;
2192 #define Dmask 0
2193 #define Vmask 1
2194 uint32_t VectorMaskEnableVME;
2195 uint32_t SamplerCount;
2196 #define FTZ 0
2197 #define RET 1
2198 uint32_t DenormalMode;
2199 uint32_t BindingTableEntryCount;
2200 #define IEEE745 0
2201 #define Alt 1
2202 uint32_t FloatingPointMode;
2203 #define RTNE 0
2204 #define RU 1
2205 #define RD 2
2206 #define RTZ 3
2207 uint32_t RoundingMode;
2208 uint32_t IllegalOpcodeExceptionEnable;
2209 uint32_t MaskStackExceptionEnable;
2210 uint32_t SoftwareExceptionEnable;
2211 uint32_t ScratchSpaceBasePointer;
2212 uint32_t PerThreadScratchSpace;
2213 uint32_t MaximumNumberofThreads;
2214 uint32_t PushConstantEnable;
2215 uint32_t AttributeEnable;
2216 uint32_t oMaskPresenttoRenderTarget;
2217 uint32_t RenderTargetFastClearEnable;
2218 uint32_t DualSourceBlendEnable;
2219 uint32_t RenderTargetResolveEnable;
2220 #define POSOFFSET_NONE 0
2221 #define POSOFFSET_CENTROID 2
2222 #define POSOFFSET_SAMPLE 3
2223 uint32_t PositionXYOffsetSelect;
2224 uint32_t _32PixelDispatchEnable;
2225 uint32_t _16PixelDispatchEnable;
2226 uint32_t _8PixelDispatchEnable;
2227 uint32_t DispatchGRFStartRegisterforConstantSetupData0;
2228 uint32_t DispatchGRFStartRegisterforConstantSetupData1;
2229 uint32_t DispatchGRFStartRegisterforConstantSetupData2;
2230 uint32_t KernelStartPointer1;
2231 uint32_t KernelStartPointer2;
2232 };
2233
2234 static inline void
2235 GEN7_3DSTATE_PS_pack(__gen_user_data *data, void * restrict dst,
2236 const struct GEN7_3DSTATE_PS * restrict values)
2237 {
2238 uint32_t *dw = (uint32_t * restrict) dst;
2239
2240 dw[0] =
2241 __gen_field(values->CommandType, 29, 31) |
2242 __gen_field(values->CommandSubType, 27, 28) |
2243 __gen_field(values->_3DCommandOpcode, 24, 26) |
2244 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2245 __gen_field(values->DwordLength, 0, 7) |
2246 0;
2247
2248 dw[1] =
2249 __gen_offset(values->KernelStartPointer0, 6, 31) |
2250 0;
2251
2252 dw[2] =
2253 __gen_field(values->SingleProgramFlowSPF, 31, 31) |
2254 __gen_field(values->VectorMaskEnableVME, 30, 30) |
2255 __gen_field(values->SamplerCount, 27, 29) |
2256 __gen_field(values->DenormalMode, 26, 26) |
2257 __gen_field(values->BindingTableEntryCount, 18, 25) |
2258 __gen_field(values->FloatingPointMode, 16, 16) |
2259 __gen_field(values->RoundingMode, 14, 15) |
2260 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2261 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
2262 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
2263 0;
2264
2265 dw[3] =
2266 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
2267 __gen_field(values->PerThreadScratchSpace, 0, 3) |
2268 0;
2269
2270 dw[4] =
2271 __gen_field(values->MaximumNumberofThreads, 24, 31) |
2272 __gen_field(values->PushConstantEnable, 11, 11) |
2273 __gen_field(values->AttributeEnable, 10, 10) |
2274 __gen_field(values->oMaskPresenttoRenderTarget, 9, 9) |
2275 __gen_field(values->RenderTargetFastClearEnable, 8, 8) |
2276 __gen_field(values->DualSourceBlendEnable, 7, 7) |
2277 __gen_field(values->RenderTargetResolveEnable, 6, 6) |
2278 __gen_field(values->PositionXYOffsetSelect, 3, 4) |
2279 __gen_field(values->_32PixelDispatchEnable, 2, 2) |
2280 __gen_field(values->_16PixelDispatchEnable, 1, 1) |
2281 __gen_field(values->_8PixelDispatchEnable, 0, 0) |
2282 0;
2283
2284 dw[5] =
2285 __gen_field(values->DispatchGRFStartRegisterforConstantSetupData0, 16, 22) |
2286 __gen_field(values->DispatchGRFStartRegisterforConstantSetupData1, 8, 14) |
2287 __gen_field(values->DispatchGRFStartRegisterforConstantSetupData2, 0, 6) |
2288 0;
2289
2290 dw[6] =
2291 __gen_offset(values->KernelStartPointer1, 6, 31) |
2292 0;
2293
2294 dw[7] =
2295 __gen_offset(values->KernelStartPointer2, 6, 31) |
2296 0;
2297
2298 }
2299
2300 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length 0x00000002
2301 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length_bias 0x00000002
2302 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_header\
2303 .CommandType = 3, \
2304 .CommandSubType = 3, \
2305 ._3DCommandOpcode = 1, \
2306 ._3DCommandSubOpcode = 20, \
2307 .DwordLength = 0
2308
2309 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS {
2310 uint32_t CommandType;
2311 uint32_t CommandSubType;
2312 uint32_t _3DCommandOpcode;
2313 uint32_t _3DCommandSubOpcode;
2314 uint32_t DwordLength;
2315 #define _0KB 0
2316 uint32_t ConstantBufferOffset;
2317 #define _0KB 0
2318 uint32_t ConstantBufferSize;
2319 };
2320
2321 static inline void
2322 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_pack(__gen_user_data *data, void * restrict dst,
2323 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS * restrict values)
2324 {
2325 uint32_t *dw = (uint32_t * restrict) dst;
2326
2327 dw[0] =
2328 __gen_field(values->CommandType, 29, 31) |
2329 __gen_field(values->CommandSubType, 27, 28) |
2330 __gen_field(values->_3DCommandOpcode, 24, 26) |
2331 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2332 __gen_field(values->DwordLength, 0, 7) |
2333 0;
2334
2335 dw[1] =
2336 __gen_field(values->ConstantBufferOffset, 16, 19) |
2337 __gen_field(values->ConstantBufferSize, 0, 4) |
2338 0;
2339
2340 }
2341
2342 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length 0x00000002
2343 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length_bias 0x00000002
2344 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_header\
2345 .CommandType = 3, \
2346 .CommandSubType = 3, \
2347 ._3DCommandOpcode = 1, \
2348 ._3DCommandSubOpcode = 21, \
2349 .DwordLength = 0
2350
2351 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS {
2352 uint32_t CommandType;
2353 uint32_t CommandSubType;
2354 uint32_t _3DCommandOpcode;
2355 uint32_t _3DCommandSubOpcode;
2356 uint32_t DwordLength;
2357 #define _0KB 0
2358 uint32_t ConstantBufferOffset;
2359 #define _0KB 0
2360 uint32_t ConstantBufferSize;
2361 };
2362
2363 static inline void
2364 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_pack(__gen_user_data *data, void * restrict dst,
2365 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS * restrict values)
2366 {
2367 uint32_t *dw = (uint32_t * restrict) dst;
2368
2369 dw[0] =
2370 __gen_field(values->CommandType, 29, 31) |
2371 __gen_field(values->CommandSubType, 27, 28) |
2372 __gen_field(values->_3DCommandOpcode, 24, 26) |
2373 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2374 __gen_field(values->DwordLength, 0, 7) |
2375 0;
2376
2377 dw[1] =
2378 __gen_field(values->ConstantBufferOffset, 16, 19) |
2379 __gen_field(values->ConstantBufferSize, 0, 4) |
2380 0;
2381
2382 }
2383
2384 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length 0x00000002
2385 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length_bias 0x00000002
2386 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_header\
2387 .CommandType = 3, \
2388 .CommandSubType = 3, \
2389 ._3DCommandOpcode = 1, \
2390 ._3DCommandSubOpcode = 19, \
2391 .DwordLength = 0
2392
2393 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS {
2394 uint32_t CommandType;
2395 uint32_t CommandSubType;
2396 uint32_t _3DCommandOpcode;
2397 uint32_t _3DCommandSubOpcode;
2398 uint32_t DwordLength;
2399 #define _0KB 0
2400 uint32_t ConstantBufferOffset;
2401 #define _0KB 0
2402 uint32_t ConstantBufferSize;
2403 };
2404
2405 static inline void
2406 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_pack(__gen_user_data *data, void * restrict dst,
2407 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS * restrict values)
2408 {
2409 uint32_t *dw = (uint32_t * restrict) dst;
2410
2411 dw[0] =
2412 __gen_field(values->CommandType, 29, 31) |
2413 __gen_field(values->CommandSubType, 27, 28) |
2414 __gen_field(values->_3DCommandOpcode, 24, 26) |
2415 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2416 __gen_field(values->DwordLength, 0, 7) |
2417 0;
2418
2419 dw[1] =
2420 __gen_field(values->ConstantBufferOffset, 16, 19) |
2421 __gen_field(values->ConstantBufferSize, 0, 4) |
2422 0;
2423
2424 }
2425
2426 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length 0x00000002
2427 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length_bias 0x00000002
2428 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_header\
2429 .CommandType = 3, \
2430 .CommandSubType = 3, \
2431 ._3DCommandOpcode = 1, \
2432 ._3DCommandSubOpcode = 22, \
2433 .DwordLength = 0
2434
2435 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS {
2436 uint32_t CommandType;
2437 uint32_t CommandSubType;
2438 uint32_t _3DCommandOpcode;
2439 uint32_t _3DCommandSubOpcode;
2440 uint32_t DwordLength;
2441 #define _0KB 0
2442 uint32_t ConstantBufferOffset;
2443 #define _0KB 0
2444 uint32_t ConstantBufferSize;
2445 };
2446
2447 static inline void
2448 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_pack(__gen_user_data *data, void * restrict dst,
2449 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS * restrict values)
2450 {
2451 uint32_t *dw = (uint32_t * restrict) dst;
2452
2453 dw[0] =
2454 __gen_field(values->CommandType, 29, 31) |
2455 __gen_field(values->CommandSubType, 27, 28) |
2456 __gen_field(values->_3DCommandOpcode, 24, 26) |
2457 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2458 __gen_field(values->DwordLength, 0, 7) |
2459 0;
2460
2461 dw[1] =
2462 __gen_field(values->ConstantBufferOffset, 16, 19) |
2463 __gen_field(values->ConstantBufferSize, 0, 4) |
2464 0;
2465
2466 }
2467
2468 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length 0x00000002
2469 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length_bias 0x00000002
2470 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_header\
2471 .CommandType = 3, \
2472 .CommandSubType = 3, \
2473 ._3DCommandOpcode = 1, \
2474 ._3DCommandSubOpcode = 18, \
2475 .DwordLength = 0
2476
2477 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS {
2478 uint32_t CommandType;
2479 uint32_t CommandSubType;
2480 uint32_t _3DCommandOpcode;
2481 uint32_t _3DCommandSubOpcode;
2482 uint32_t DwordLength;
2483 #define _0KB 0
2484 uint32_t ConstantBufferOffset;
2485 #define _0KB 0
2486 uint32_t ConstantBufferSize;
2487 };
2488
2489 static inline void
2490 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_pack(__gen_user_data *data, void * restrict dst,
2491 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS * restrict values)
2492 {
2493 uint32_t *dw = (uint32_t * restrict) dst;
2494
2495 dw[0] =
2496 __gen_field(values->CommandType, 29, 31) |
2497 __gen_field(values->CommandSubType, 27, 28) |
2498 __gen_field(values->_3DCommandOpcode, 24, 26) |
2499 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2500 __gen_field(values->DwordLength, 0, 7) |
2501 0;
2502
2503 dw[1] =
2504 __gen_field(values->ConstantBufferOffset, 16, 19) |
2505 __gen_field(values->ConstantBufferSize, 0, 4) |
2506 0;
2507
2508 }
2509
2510 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_length_bias 0x00000002
2511 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_header\
2512 .CommandType = 3, \
2513 .CommandSubType = 3, \
2514 ._3DCommandOpcode = 1, \
2515 ._3DCommandSubOpcode = 2
2516
2517 struct GEN7_PALETTE_ENTRY {
2518 uint32_t Alpha;
2519 uint32_t Red;
2520 uint32_t Green;
2521 uint32_t Blue;
2522 };
2523
2524 static inline void
2525 GEN7_PALETTE_ENTRY_pack(__gen_user_data *data, void * restrict dst,
2526 const struct GEN7_PALETTE_ENTRY * restrict values)
2527 {
2528 uint32_t *dw = (uint32_t * restrict) dst;
2529
2530 dw[0] =
2531 __gen_field(values->Alpha, 24, 31) |
2532 __gen_field(values->Red, 16, 23) |
2533 __gen_field(values->Green, 8, 15) |
2534 __gen_field(values->Blue, 0, 7) |
2535 0;
2536
2537 }
2538
2539 struct GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0 {
2540 uint32_t CommandType;
2541 uint32_t CommandSubType;
2542 uint32_t _3DCommandOpcode;
2543 uint32_t _3DCommandSubOpcode;
2544 uint32_t DwordLength;
2545 /* variable length fields follow */
2546 };
2547
2548 static inline void
2549 GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_pack(__gen_user_data *data, void * restrict dst,
2550 const struct GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0 * restrict values)
2551 {
2552 uint32_t *dw = (uint32_t * restrict) dst;
2553
2554 dw[0] =
2555 __gen_field(values->CommandType, 29, 31) |
2556 __gen_field(values->CommandSubType, 27, 28) |
2557 __gen_field(values->_3DCommandOpcode, 24, 26) |
2558 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2559 __gen_field(values->DwordLength, 0, 7) |
2560 0;
2561
2562 /* variable length fields follow */
2563 }
2564
2565 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_length_bias 0x00000002
2566 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_header\
2567 .CommandType = 3, \
2568 .CommandSubType = 3, \
2569 ._3DCommandOpcode = 1, \
2570 ._3DCommandSubOpcode = 12
2571
2572 struct GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1 {
2573 uint32_t CommandType;
2574 uint32_t CommandSubType;
2575 uint32_t _3DCommandOpcode;
2576 uint32_t _3DCommandSubOpcode;
2577 uint32_t DwordLength;
2578 /* variable length fields follow */
2579 };
2580
2581 static inline void
2582 GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_pack(__gen_user_data *data, void * restrict dst,
2583 const struct GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1 * restrict values)
2584 {
2585 uint32_t *dw = (uint32_t * restrict) dst;
2586
2587 dw[0] =
2588 __gen_field(values->CommandType, 29, 31) |
2589 __gen_field(values->CommandSubType, 27, 28) |
2590 __gen_field(values->_3DCommandOpcode, 24, 26) |
2591 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2592 __gen_field(values->DwordLength, 0, 7) |
2593 0;
2594
2595 /* variable length fields follow */
2596 }
2597
2598 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_length 0x00000002
2599 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_length_bias 0x00000002
2600 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_header\
2601 .CommandType = 3, \
2602 .CommandSubType = 3, \
2603 ._3DCommandOpcode = 0, \
2604 ._3DCommandSubOpcode = 45, \
2605 .DwordLength = 0
2606
2607 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS {
2608 uint32_t CommandType;
2609 uint32_t CommandSubType;
2610 uint32_t _3DCommandOpcode;
2611 uint32_t _3DCommandSubOpcode;
2612 uint32_t DwordLength;
2613 uint32_t PointertoDSSamplerState;
2614 };
2615
2616 static inline void
2617 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
2618 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS * restrict values)
2619 {
2620 uint32_t *dw = (uint32_t * restrict) dst;
2621
2622 dw[0] =
2623 __gen_field(values->CommandType, 29, 31) |
2624 __gen_field(values->CommandSubType, 27, 28) |
2625 __gen_field(values->_3DCommandOpcode, 24, 26) |
2626 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2627 __gen_field(values->DwordLength, 0, 7) |
2628 0;
2629
2630 dw[1] =
2631 __gen_offset(values->PointertoDSSamplerState, 5, 31) |
2632 0;
2633
2634 }
2635
2636 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_length 0x00000002
2637 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_length_bias 0x00000002
2638 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_header\
2639 .CommandType = 3, \
2640 .CommandSubType = 3, \
2641 ._3DCommandOpcode = 0, \
2642 ._3DCommandSubOpcode = 46, \
2643 .DwordLength = 0
2644
2645 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS {
2646 uint32_t CommandType;
2647 uint32_t CommandSubType;
2648 uint32_t _3DCommandOpcode;
2649 uint32_t _3DCommandSubOpcode;
2650 uint32_t DwordLength;
2651 uint32_t PointertoGSSamplerState;
2652 };
2653
2654 static inline void
2655 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
2656 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS * restrict values)
2657 {
2658 uint32_t *dw = (uint32_t * restrict) dst;
2659
2660 dw[0] =
2661 __gen_field(values->CommandType, 29, 31) |
2662 __gen_field(values->CommandSubType, 27, 28) |
2663 __gen_field(values->_3DCommandOpcode, 24, 26) |
2664 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2665 __gen_field(values->DwordLength, 0, 7) |
2666 0;
2667
2668 dw[1] =
2669 __gen_offset(values->PointertoGSSamplerState, 5, 31) |
2670 0;
2671
2672 }
2673
2674 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_length 0x00000002
2675 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_length_bias 0x00000002
2676 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_header\
2677 .CommandType = 3, \
2678 .CommandSubType = 3, \
2679 ._3DCommandOpcode = 0, \
2680 ._3DCommandSubOpcode = 44, \
2681 .DwordLength = 0
2682
2683 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS {
2684 uint32_t CommandType;
2685 uint32_t CommandSubType;
2686 uint32_t _3DCommandOpcode;
2687 uint32_t _3DCommandSubOpcode;
2688 uint32_t DwordLength;
2689 uint32_t PointertoHSSamplerState;
2690 };
2691
2692 static inline void
2693 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
2694 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS * restrict values)
2695 {
2696 uint32_t *dw = (uint32_t * restrict) dst;
2697
2698 dw[0] =
2699 __gen_field(values->CommandType, 29, 31) |
2700 __gen_field(values->CommandSubType, 27, 28) |
2701 __gen_field(values->_3DCommandOpcode, 24, 26) |
2702 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2703 __gen_field(values->DwordLength, 0, 7) |
2704 0;
2705
2706 dw[1] =
2707 __gen_offset(values->PointertoHSSamplerState, 5, 31) |
2708 0;
2709
2710 }
2711
2712 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_length 0x00000002
2713 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_length_bias 0x00000002
2714 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_header\
2715 .CommandType = 3, \
2716 .CommandSubType = 3, \
2717 ._3DCommandOpcode = 0, \
2718 ._3DCommandSubOpcode = 47, \
2719 .DwordLength = 0
2720
2721 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS {
2722 uint32_t CommandType;
2723 uint32_t CommandSubType;
2724 uint32_t _3DCommandOpcode;
2725 uint32_t _3DCommandSubOpcode;
2726 uint32_t DwordLength;
2727 uint32_t PointertoPSSamplerState;
2728 };
2729
2730 static inline void
2731 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
2732 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS * restrict values)
2733 {
2734 uint32_t *dw = (uint32_t * restrict) dst;
2735
2736 dw[0] =
2737 __gen_field(values->CommandType, 29, 31) |
2738 __gen_field(values->CommandSubType, 27, 28) |
2739 __gen_field(values->_3DCommandOpcode, 24, 26) |
2740 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2741 __gen_field(values->DwordLength, 0, 7) |
2742 0;
2743
2744 dw[1] =
2745 __gen_offset(values->PointertoPSSamplerState, 5, 31) |
2746 0;
2747
2748 }
2749
2750 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_length 0x00000002
2751 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_length_bias 0x00000002
2752 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_header\
2753 .CommandType = 3, \
2754 .CommandSubType = 3, \
2755 ._3DCommandOpcode = 0, \
2756 ._3DCommandSubOpcode = 43, \
2757 .DwordLength = 0
2758
2759 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS {
2760 uint32_t CommandType;
2761 uint32_t CommandSubType;
2762 uint32_t _3DCommandOpcode;
2763 uint32_t _3DCommandSubOpcode;
2764 uint32_t DwordLength;
2765 uint32_t PointertoVSSamplerState;
2766 };
2767
2768 static inline void
2769 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
2770 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS * restrict values)
2771 {
2772 uint32_t *dw = (uint32_t * restrict) dst;
2773
2774 dw[0] =
2775 __gen_field(values->CommandType, 29, 31) |
2776 __gen_field(values->CommandSubType, 27, 28) |
2777 __gen_field(values->_3DCommandOpcode, 24, 26) |
2778 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2779 __gen_field(values->DwordLength, 0, 7) |
2780 0;
2781
2782 dw[1] =
2783 __gen_offset(values->PointertoVSSamplerState, 5, 31) |
2784 0;
2785
2786 }
2787
2788 #define GEN7_3DSTATE_SAMPLE_MASK_length 0x00000002
2789 #define GEN7_3DSTATE_SAMPLE_MASK_length_bias 0x00000002
2790 #define GEN7_3DSTATE_SAMPLE_MASK_header \
2791 .CommandType = 3, \
2792 .CommandSubType = 3, \
2793 ._3DCommandOpcode = 0, \
2794 ._3DCommandSubOpcode = 24, \
2795 .DwordLength = 0
2796
2797 struct GEN7_3DSTATE_SAMPLE_MASK {
2798 uint32_t CommandType;
2799 uint32_t CommandSubType;
2800 uint32_t _3DCommandOpcode;
2801 uint32_t _3DCommandSubOpcode;
2802 uint32_t DwordLength;
2803 uint32_t SampleMask;
2804 };
2805
2806 static inline void
2807 GEN7_3DSTATE_SAMPLE_MASK_pack(__gen_user_data *data, void * restrict dst,
2808 const struct GEN7_3DSTATE_SAMPLE_MASK * restrict values)
2809 {
2810 uint32_t *dw = (uint32_t * restrict) dst;
2811
2812 dw[0] =
2813 __gen_field(values->CommandType, 29, 31) |
2814 __gen_field(values->CommandSubType, 27, 28) |
2815 __gen_field(values->_3DCommandOpcode, 24, 26) |
2816 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2817 __gen_field(values->DwordLength, 0, 7) |
2818 0;
2819
2820 dw[1] =
2821 __gen_field(values->SampleMask, 0, 7) |
2822 0;
2823
2824 }
2825
2826 #define GEN7_3DSTATE_SBE_length 0x0000000e
2827 #define GEN7_3DSTATE_SBE_length_bias 0x00000002
2828 #define GEN7_3DSTATE_SBE_header \
2829 .CommandType = 3, \
2830 .CommandSubType = 3, \
2831 ._3DCommandOpcode = 0, \
2832 ._3DCommandSubOpcode = 31, \
2833 .DwordLength = 12
2834
2835 struct GEN7_3DSTATE_SBE {
2836 uint32_t CommandType;
2837 uint32_t CommandSubType;
2838 uint32_t _3DCommandOpcode;
2839 uint32_t _3DCommandSubOpcode;
2840 uint32_t DwordLength;
2841 #define SWIZ_0_15 0
2842 #define SWIZ_16_31 1
2843 uint32_t AttributeSwizzleControlMode;
2844 uint32_t NumberofSFOutputAttributes;
2845 uint32_t AttributeSwizzleEnable;
2846 #define UPPERLEFT 0
2847 #define LOWERLEFT 1
2848 uint32_t PointSpriteTextureCoordinateOrigin;
2849 uint32_t VertexURBEntryReadLength;
2850 uint32_t VertexURBEntryReadOffset;
2851 uint32_t Attribute2n1ComponentOverrideW;
2852 uint32_t Attribute2n1ComponentOverrideZ;
2853 uint32_t Attribute2n1ComponentOverrideY;
2854 uint32_t Attribute2n1ComponentOverrideX;
2855 #define CONST_0000 0
2856 #define CONST_0001_FLOAT 1
2857 #define CONST_1111_FLOAT 2
2858 #define PRIM_ID 3
2859 uint32_t Attribute2n1ConstantSource;
2860 #define INPUTATTR 0
2861 #define INPUTATTR_FACING 1
2862 #define INPUTATTR_W 2
2863 #define INPUTATTR_FACING_W 3
2864 uint32_t Attribute2n1SwizzleSelect;
2865 uint32_t Attribute2n1SourceAttribute;
2866 uint32_t Attribute2nComponentOverrideW;
2867 uint32_t Attribute2nComponentOverrideZ;
2868 uint32_t Attribute2nComponentOverrideY;
2869 uint32_t Attribute2nComponentOverrideX;
2870 #define CONST_0000 0
2871 #define CONST_0001_FLOAT 1
2872 #define CONST_1111_FLOAT 2
2873 #define PRIM_ID 3
2874 uint32_t Attribute2nConstantSource;
2875 #define INPUTATTR 0
2876 #define INPUTATTR_FACING 1
2877 #define INPUTATTR_W 2
2878 #define INPUTATTR_FACING_W 3
2879 uint32_t Attribute2nSwizzleSelect;
2880 uint32_t Attribute2nSourceAttribute;
2881 uint32_t PointSpriteTextureCoordinateEnable;
2882 uint32_t ConstantInterpolationEnable310;
2883 uint32_t Attribute7WrapShortestEnables;
2884 uint32_t Attribute6WrapShortestEnables;
2885 uint32_t Attribute5WrapShortestEnables;
2886 uint32_t Attribute4WrapShortestEnables;
2887 uint32_t Attribute3WrapShortestEnables;
2888 uint32_t Attribute2WrapShortestEnables;
2889 uint32_t Attribute1WrapShortestEnables;
2890 uint32_t Attribute0WrapShortestEnables;
2891 uint32_t Attribute15WrapShortestEnables;
2892 uint32_t Attribute14WrapShortestEnables;
2893 uint32_t Attribute13WrapShortestEnables;
2894 uint32_t Attribute12WrapShortestEnables;
2895 uint32_t Attribute11WrapShortestEnables;
2896 uint32_t Attribute10WrapShortestEnables;
2897 uint32_t Attribute9WrapShortestEnables;
2898 uint32_t Attribute8WrapShortestEnables;
2899 };
2900
2901 static inline void
2902 GEN7_3DSTATE_SBE_pack(__gen_user_data *data, void * restrict dst,
2903 const struct GEN7_3DSTATE_SBE * restrict values)
2904 {
2905 uint32_t *dw = (uint32_t * restrict) dst;
2906
2907 dw[0] =
2908 __gen_field(values->CommandType, 29, 31) |
2909 __gen_field(values->CommandSubType, 27, 28) |
2910 __gen_field(values->_3DCommandOpcode, 24, 26) |
2911 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2912 __gen_field(values->DwordLength, 0, 7) |
2913 0;
2914
2915 dw[1] =
2916 __gen_field(values->AttributeSwizzleControlMode, 28, 28) |
2917 __gen_field(values->NumberofSFOutputAttributes, 22, 27) |
2918 __gen_field(values->AttributeSwizzleEnable, 21, 21) |
2919 __gen_field(values->PointSpriteTextureCoordinateOrigin, 20, 20) |
2920 __gen_field(values->VertexURBEntryReadLength, 11, 15) |
2921 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
2922 0;
2923
2924 dw[2] =
2925 __gen_field(values->Attribute2n1ComponentOverrideW, 31, 31) |
2926 __gen_field(values->Attribute2n1ComponentOverrideZ, 30, 30) |
2927 __gen_field(values->Attribute2n1ComponentOverrideY, 29, 29) |
2928 __gen_field(values->Attribute2n1ComponentOverrideX, 28, 28) |
2929 __gen_field(values->Attribute2n1ConstantSource, 25, 26) |
2930 __gen_field(values->Attribute2n1SwizzleSelect, 22, 23) |
2931 __gen_field(values->Attribute2n1SourceAttribute, 16, 20) |
2932 __gen_field(values->Attribute2nComponentOverrideW, 15, 15) |
2933 __gen_field(values->Attribute2nComponentOverrideZ, 14, 14) |
2934 __gen_field(values->Attribute2nComponentOverrideY, 13, 13) |
2935 __gen_field(values->Attribute2nComponentOverrideX, 12, 12) |
2936 __gen_field(values->Attribute2nConstantSource, 9, 10) |
2937 __gen_field(values->Attribute2nSwizzleSelect, 6, 7) |
2938 __gen_field(values->Attribute2nSourceAttribute, 0, 4) |
2939 0;
2940
2941 dw[10] =
2942 __gen_field(values->PointSpriteTextureCoordinateEnable, 0, 31) |
2943 0;
2944
2945 dw[11] =
2946 __gen_field(values->ConstantInterpolationEnable310, 0, 31) |
2947 0;
2948
2949 dw[12] =
2950 __gen_field(values->Attribute7WrapShortestEnables, 28, 31) |
2951 __gen_field(values->Attribute6WrapShortestEnables, 24, 27) |
2952 __gen_field(values->Attribute5WrapShortestEnables, 20, 23) |
2953 __gen_field(values->Attribute4WrapShortestEnables, 16, 19) |
2954 __gen_field(values->Attribute3WrapShortestEnables, 12, 15) |
2955 __gen_field(values->Attribute2WrapShortestEnables, 8, 11) |
2956 __gen_field(values->Attribute1WrapShortestEnables, 4, 7) |
2957 __gen_field(values->Attribute0WrapShortestEnables, 0, 3) |
2958 0;
2959
2960 dw[13] =
2961 __gen_field(values->Attribute15WrapShortestEnables, 28, 31) |
2962 __gen_field(values->Attribute14WrapShortestEnables, 24, 27) |
2963 __gen_field(values->Attribute13WrapShortestEnables, 20, 23) |
2964 __gen_field(values->Attribute12WrapShortestEnables, 16, 19) |
2965 __gen_field(values->Attribute11WrapShortestEnables, 12, 15) |
2966 __gen_field(values->Attribute10WrapShortestEnables, 8, 11) |
2967 __gen_field(values->Attribute9WrapShortestEnables, 4, 7) |
2968 __gen_field(values->Attribute8WrapShortestEnables, 0, 3) |
2969 0;
2970
2971 }
2972
2973 #define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_length 0x00000002
2974 #define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_length_bias 0x00000002
2975 #define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_header\
2976 .CommandType = 3, \
2977 .CommandSubType = 3, \
2978 ._3DCommandOpcode = 0, \
2979 ._3DCommandSubOpcode = 15, \
2980 .DwordLength = 0
2981
2982 struct GEN7_3DSTATE_SCISSOR_STATE_POINTERS {
2983 uint32_t CommandType;
2984 uint32_t CommandSubType;
2985 uint32_t _3DCommandOpcode;
2986 uint32_t _3DCommandSubOpcode;
2987 uint32_t DwordLength;
2988 uint32_t ScissorRectPointer;
2989 };
2990
2991 static inline void
2992 GEN7_3DSTATE_SCISSOR_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
2993 const struct GEN7_3DSTATE_SCISSOR_STATE_POINTERS * restrict values)
2994 {
2995 uint32_t *dw = (uint32_t * restrict) dst;
2996
2997 dw[0] =
2998 __gen_field(values->CommandType, 29, 31) |
2999 __gen_field(values->CommandSubType, 27, 28) |
3000 __gen_field(values->_3DCommandOpcode, 24, 26) |
3001 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3002 __gen_field(values->DwordLength, 0, 7) |
3003 0;
3004
3005 dw[1] =
3006 __gen_offset(values->ScissorRectPointer, 5, 31) |
3007 0;
3008
3009 }
3010
3011 #define GEN7_3DSTATE_SF_length 0x00000007
3012 #define GEN7_3DSTATE_SF_length_bias 0x00000002
3013 #define GEN7_3DSTATE_SF_header \
3014 .CommandType = 3, \
3015 .CommandSubType = 3, \
3016 ._3DCommandOpcode = 0, \
3017 ._3DCommandSubOpcode = 19, \
3018 .DwordLength = 5
3019
3020 struct GEN7_3DSTATE_SF {
3021 uint32_t CommandType;
3022 uint32_t CommandSubType;
3023 uint32_t _3DCommandOpcode;
3024 uint32_t _3DCommandSubOpcode;
3025 uint32_t DwordLength;
3026 #define D32_FLOAT_S8X24_UINT 0
3027 #define D32_FLOAT 1
3028 #define D24_UNORM_S8_UINT 2
3029 #define D24_UNORM_X8_UINT 3
3030 #define D16_UNORM 5
3031 uint32_t DepthBufferSurfaceFormat;
3032 uint32_t LegacyGlobalDepthBiasEnable;
3033 uint32_t StatisticsEnable;
3034 uint32_t GlobalDepthOffsetEnableSolid;
3035 uint32_t GlobalDepthOffsetEnableWireframe;
3036 uint32_t GlobalDepthOffsetEnablePoint;
3037 #define RASTER_SOLID 0
3038 #define RASTER_WIREFRAME 1
3039 #define RASTER_POINT 2
3040 uint32_t FrontFaceFillMode;
3041 #define RASTER_SOLID 0
3042 #define RASTER_WIREFRAME 1
3043 #define RASTER_POINT 2
3044 uint32_t BackFaceFillMode;
3045 uint32_t ViewTransformEnable;
3046 uint32_t FrontWinding;
3047 uint32_t AntiAliasingEnable;
3048 #define CULLMODE_BOTH 0
3049 #define CULLMODE_NONE 1
3050 #define CULLMODE_FRONT 2
3051 #define CULLMODE_BACK 3
3052 uint32_t CullMode;
3053 float LineWidth;
3054 uint32_t LineEndCapAntialiasingRegionWidth;
3055 uint32_t ScissorRectangleEnable;
3056 uint32_t MultisampleRasterizationMode;
3057 uint32_t LastPixelEnable;
3058 #define Vertex0 0
3059 #define Vertex1 1
3060 #define Vertex2 2
3061 uint32_t TriangleStripListProvokingVertexSelect;
3062 uint32_t LineStripListProvokingVertexSelect;
3063 #define Vertex0 0
3064 #define Vertex1 1
3065 #define Vertex2 2
3066 uint32_t TriangleFanProvokingVertexSelect;
3067 #define AALINEDISTANCE_TRUE 1
3068 uint32_t AALineDistanceMode;
3069 uint32_t VertexSubPixelPrecisionSelect;
3070 uint32_t UsePointWidthState;
3071 float PointWidth;
3072 uint32_t GlobalDepthOffsetConstant;
3073 uint32_t GlobalDepthOffsetScale;
3074 uint32_t GlobalDepthOffsetClamp;
3075 };
3076
3077 static inline void
3078 GEN7_3DSTATE_SF_pack(__gen_user_data *data, void * restrict dst,
3079 const struct GEN7_3DSTATE_SF * restrict values)
3080 {
3081 uint32_t *dw = (uint32_t * restrict) dst;
3082
3083 dw[0] =
3084 __gen_field(values->CommandType, 29, 31) |
3085 __gen_field(values->CommandSubType, 27, 28) |
3086 __gen_field(values->_3DCommandOpcode, 24, 26) |
3087 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3088 __gen_field(values->DwordLength, 0, 7) |
3089 0;
3090
3091 dw[1] =
3092 __gen_field(values->DepthBufferSurfaceFormat, 12, 14) |
3093 __gen_field(values->LegacyGlobalDepthBiasEnable, 11, 11) |
3094 __gen_field(values->StatisticsEnable, 10, 10) |
3095 __gen_field(values->GlobalDepthOffsetEnableSolid, 9, 9) |
3096 __gen_field(values->GlobalDepthOffsetEnableWireframe, 8, 8) |
3097 __gen_field(values->GlobalDepthOffsetEnablePoint, 7, 7) |
3098 __gen_field(values->FrontFaceFillMode, 5, 6) |
3099 __gen_field(values->BackFaceFillMode, 3, 4) |
3100 __gen_field(values->ViewTransformEnable, 1, 1) |
3101 __gen_field(values->FrontWinding, 0, 0) |
3102 0;
3103
3104 dw[2] =
3105 __gen_field(values->AntiAliasingEnable, 31, 31) |
3106 __gen_field(values->CullMode, 29, 30) |
3107 __gen_field(values->LineWidth * (1 << 7), 18, 27) |
3108 __gen_field(values->LineEndCapAntialiasingRegionWidth, 16, 17) |
3109 __gen_field(values->ScissorRectangleEnable, 11, 11) |
3110 __gen_field(values->MultisampleRasterizationMode, 8, 9) |
3111 0;
3112
3113 dw[3] =
3114 __gen_field(values->LastPixelEnable, 31, 31) |
3115 __gen_field(values->TriangleStripListProvokingVertexSelect, 29, 30) |
3116 __gen_field(values->LineStripListProvokingVertexSelect, 27, 28) |
3117 __gen_field(values->TriangleFanProvokingVertexSelect, 25, 26) |
3118 __gen_field(values->AALineDistanceMode, 14, 14) |
3119 __gen_field(values->VertexSubPixelPrecisionSelect, 12, 12) |
3120 __gen_field(values->UsePointWidthState, 11, 11) |
3121 __gen_field(values->PointWidth * (1 << 3), 0, 10) |
3122 0;
3123
3124 dw[4] =
3125 __gen_field(values->GlobalDepthOffsetConstant, 0, 31) |
3126 0;
3127
3128 dw[5] =
3129 __gen_field(values->GlobalDepthOffsetScale, 0, 31) |
3130 0;
3131
3132 dw[6] =
3133 __gen_field(values->GlobalDepthOffsetClamp, 0, 31) |
3134 0;
3135
3136 }
3137
3138 #define GEN7_3DSTATE_SO_BUFFER_length 0x00000004
3139 #define GEN7_3DSTATE_SO_BUFFER_length_bias 0x00000002
3140 #define GEN7_3DSTATE_SO_BUFFER_header \
3141 .CommandType = 3, \
3142 .CommandSubType = 3, \
3143 ._3DCommandOpcode = 1, \
3144 ._3DCommandSubOpcode = 24, \
3145 .DwordLength = 2
3146
3147 struct GEN7_3DSTATE_SO_BUFFER {
3148 uint32_t CommandType;
3149 uint32_t CommandSubType;
3150 uint32_t _3DCommandOpcode;
3151 uint32_t _3DCommandSubOpcode;
3152 uint32_t DwordLength;
3153 uint32_t SOBufferIndex;
3154 struct GEN7_MEMORY_OBJECT_CONTROL_STATE SOBufferObjectControlState;
3155 uint32_t SurfacePitch;
3156 __gen_address_type SurfaceBaseAddress;
3157 __gen_address_type SurfaceEndAddress;
3158 };
3159
3160 static inline void
3161 GEN7_3DSTATE_SO_BUFFER_pack(__gen_user_data *data, void * restrict dst,
3162 const struct GEN7_3DSTATE_SO_BUFFER * restrict values)
3163 {
3164 uint32_t *dw = (uint32_t * restrict) dst;
3165
3166 dw[0] =
3167 __gen_field(values->CommandType, 29, 31) |
3168 __gen_field(values->CommandSubType, 27, 28) |
3169 __gen_field(values->_3DCommandOpcode, 24, 26) |
3170 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3171 __gen_field(values->DwordLength, 0, 7) |
3172 0;
3173
3174 uint32_t dw_SOBufferObjectControlState;
3175 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SOBufferObjectControlState, &values->SOBufferObjectControlState);
3176 dw[1] =
3177 __gen_field(values->SOBufferIndex, 29, 30) |
3178 __gen_field(dw_SOBufferObjectControlState, 25, 28) |
3179 __gen_field(values->SurfacePitch, 0, 11) |
3180 0;
3181
3182 uint32_t dw2 =
3183 0;
3184
3185 dw[2] =
3186 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
3187
3188 uint32_t dw3 =
3189 0;
3190
3191 dw[3] =
3192 __gen_combine_address(data, &dw[3], values->SurfaceEndAddress, dw3);
3193
3194 }
3195
3196 #define GEN7_3DSTATE_SO_DECL_LIST_length_bias 0x00000002
3197 #define GEN7_3DSTATE_SO_DECL_LIST_header \
3198 .CommandType = 3, \
3199 .CommandSubType = 3, \
3200 ._3DCommandOpcode = 1, \
3201 ._3DCommandSubOpcode = 23
3202
3203 struct GEN7_SO_DECL {
3204 uint32_t OutputBufferSlot;
3205 uint32_t HoleFlag;
3206 uint32_t RegisterIndex;
3207 uint32_t ComponentMask;
3208 };
3209
3210 static inline void
3211 GEN7_SO_DECL_pack(__gen_user_data *data, void * restrict dst,
3212 const struct GEN7_SO_DECL * restrict values)
3213 {
3214 uint32_t *dw = (uint32_t * restrict) dst;
3215
3216 dw[0] =
3217 __gen_field(values->OutputBufferSlot, 12, 13) |
3218 __gen_field(values->HoleFlag, 11, 11) |
3219 __gen_field(values->RegisterIndex, 4, 9) |
3220 __gen_field(values->ComponentMask, 0, 3) |
3221 0;
3222
3223 }
3224
3225 struct GEN7_SO_DECL_ENTRY {
3226 struct GEN7_SO_DECL Stream3Decl;
3227 struct GEN7_SO_DECL Stream2Decl;
3228 struct GEN7_SO_DECL Stream1Decl;
3229 struct GEN7_SO_DECL Stream0Decl;
3230 };
3231
3232 static inline void
3233 GEN7_SO_DECL_ENTRY_pack(__gen_user_data *data, void * restrict dst,
3234 const struct GEN7_SO_DECL_ENTRY * restrict values)
3235 {
3236 uint32_t *dw = (uint32_t * restrict) dst;
3237
3238 uint32_t dw_Stream3Decl;
3239 GEN7_SO_DECL_pack(data, &dw_Stream3Decl, &values->Stream3Decl);
3240 uint32_t dw_Stream2Decl;
3241 GEN7_SO_DECL_pack(data, &dw_Stream2Decl, &values->Stream2Decl);
3242 uint32_t dw_Stream1Decl;
3243 GEN7_SO_DECL_pack(data, &dw_Stream1Decl, &values->Stream1Decl);
3244 uint32_t dw_Stream0Decl;
3245 GEN7_SO_DECL_pack(data, &dw_Stream0Decl, &values->Stream0Decl);
3246 uint64_t qw0 =
3247 __gen_field(dw_Stream3Decl, 48, 63) |
3248 __gen_field(dw_Stream2Decl, 32, 47) |
3249 __gen_field(dw_Stream1Decl, 16, 31) |
3250 __gen_field(dw_Stream0Decl, 0, 15) |
3251 0;
3252
3253 dw[0] = qw0;
3254 dw[1] = qw0 >> 32;
3255
3256 }
3257
3258 struct GEN7_3DSTATE_SO_DECL_LIST {
3259 uint32_t CommandType;
3260 uint32_t CommandSubType;
3261 uint32_t _3DCommandOpcode;
3262 uint32_t _3DCommandSubOpcode;
3263 uint32_t DwordLength;
3264 uint32_t StreamtoBufferSelects3;
3265 uint32_t StreamtoBufferSelects2;
3266 uint32_t StreamtoBufferSelects1;
3267 uint32_t StreamtoBufferSelects0;
3268 uint32_t NumEntries3;
3269 uint32_t NumEntries2;
3270 uint32_t NumEntries1;
3271 uint32_t NumEntries0;
3272 /* variable length fields follow */
3273 };
3274
3275 static inline void
3276 GEN7_3DSTATE_SO_DECL_LIST_pack(__gen_user_data *data, void * restrict dst,
3277 const struct GEN7_3DSTATE_SO_DECL_LIST * restrict values)
3278 {
3279 uint32_t *dw = (uint32_t * restrict) dst;
3280
3281 dw[0] =
3282 __gen_field(values->CommandType, 29, 31) |
3283 __gen_field(values->CommandSubType, 27, 28) |
3284 __gen_field(values->_3DCommandOpcode, 24, 26) |
3285 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3286 __gen_field(values->DwordLength, 0, 8) |
3287 0;
3288
3289 dw[1] =
3290 __gen_field(values->StreamtoBufferSelects3, 12, 15) |
3291 __gen_field(values->StreamtoBufferSelects2, 8, 11) |
3292 __gen_field(values->StreamtoBufferSelects1, 4, 7) |
3293 __gen_field(values->StreamtoBufferSelects0, 0, 3) |
3294 0;
3295
3296 dw[2] =
3297 __gen_field(values->NumEntries3, 24, 31) |
3298 __gen_field(values->NumEntries2, 16, 23) |
3299 __gen_field(values->NumEntries1, 8, 15) |
3300 __gen_field(values->NumEntries0, 0, 7) |
3301 0;
3302
3303 /* variable length fields follow */
3304 }
3305
3306 #define GEN7_3DSTATE_STENCIL_BUFFER_length 0x00000003
3307 #define GEN7_3DSTATE_STENCIL_BUFFER_length_bias 0x00000002
3308 #define GEN7_3DSTATE_STENCIL_BUFFER_header \
3309 .CommandType = 3, \
3310 .CommandSubType = 3, \
3311 ._3DCommandOpcode = 0, \
3312 ._3DCommandSubOpcode = 6, \
3313 .DwordLength = 1
3314
3315 struct GEN7_3DSTATE_STENCIL_BUFFER {
3316 uint32_t CommandType;
3317 uint32_t CommandSubType;
3318 uint32_t _3DCommandOpcode;
3319 uint32_t _3DCommandSubOpcode;
3320 uint32_t DwordLength;
3321 struct GEN7_MEMORY_OBJECT_CONTROL_STATE StencilBufferObjectControlState;
3322 uint32_t SurfacePitch;
3323 __gen_address_type SurfaceBaseAddress;
3324 };
3325
3326 static inline void
3327 GEN7_3DSTATE_STENCIL_BUFFER_pack(__gen_user_data *data, void * restrict dst,
3328 const struct GEN7_3DSTATE_STENCIL_BUFFER * restrict values)
3329 {
3330 uint32_t *dw = (uint32_t * restrict) dst;
3331
3332 dw[0] =
3333 __gen_field(values->CommandType, 29, 31) |
3334 __gen_field(values->CommandSubType, 27, 28) |
3335 __gen_field(values->_3DCommandOpcode, 24, 26) |
3336 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3337 __gen_field(values->DwordLength, 0, 7) |
3338 0;
3339
3340 uint32_t dw_StencilBufferObjectControlState;
3341 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StencilBufferObjectControlState, &values->StencilBufferObjectControlState);
3342 dw[1] =
3343 __gen_field(dw_StencilBufferObjectControlState, 25, 28) |
3344 __gen_field(values->SurfacePitch, 0, 16) |
3345 0;
3346
3347 uint32_t dw2 =
3348 0;
3349
3350 dw[2] =
3351 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
3352
3353 }
3354
3355 #define GEN7_3DSTATE_STREAMOUT_length 0x00000003
3356 #define GEN7_3DSTATE_STREAMOUT_length_bias 0x00000002
3357 #define GEN7_3DSTATE_STREAMOUT_header \
3358 .CommandType = 3, \
3359 .CommandSubType = 3, \
3360 ._3DCommandOpcode = 0, \
3361 ._3DCommandSubOpcode = 30, \
3362 .DwordLength = 1
3363
3364 struct GEN7_3DSTATE_STREAMOUT {
3365 uint32_t CommandType;
3366 uint32_t CommandSubType;
3367 uint32_t _3DCommandOpcode;
3368 uint32_t _3DCommandSubOpcode;
3369 uint32_t DwordLength;
3370 uint32_t SOFunctionEnable;
3371 uint32_t RenderingDisable;
3372 uint32_t RenderStreamSelect;
3373 #define LEADING 0
3374 #define TRAILING 1
3375 uint32_t ReorderMode;
3376 uint32_t SOStatisticsEnable;
3377 uint32_t SOBufferEnable3;
3378 uint32_t SOBufferEnable2;
3379 uint32_t SOBufferEnable1;
3380 uint32_t SOBufferEnable0;
3381 uint32_t Stream3VertexReadOffset;
3382 uint32_t Stream3VertexReadLength;
3383 uint32_t Stream2VertexReadOffset;
3384 uint32_t Stream2VertexReadLength;
3385 uint32_t Stream1VertexReadOffset;
3386 uint32_t Stream1VertexReadLength;
3387 uint32_t Stream0VertexReadOffset;
3388 uint32_t Stream0VertexReadLength;
3389 };
3390
3391 static inline void
3392 GEN7_3DSTATE_STREAMOUT_pack(__gen_user_data *data, void * restrict dst,
3393 const struct GEN7_3DSTATE_STREAMOUT * restrict values)
3394 {
3395 uint32_t *dw = (uint32_t * restrict) dst;
3396
3397 dw[0] =
3398 __gen_field(values->CommandType, 29, 31) |
3399 __gen_field(values->CommandSubType, 27, 28) |
3400 __gen_field(values->_3DCommandOpcode, 24, 26) |
3401 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3402 __gen_field(values->DwordLength, 0, 7) |
3403 0;
3404
3405 dw[1] =
3406 __gen_field(values->SOFunctionEnable, 31, 31) |
3407 __gen_field(values->RenderingDisable, 30, 30) |
3408 __gen_field(values->RenderStreamSelect, 27, 28) |
3409 __gen_field(values->ReorderMode, 26, 26) |
3410 __gen_field(values->SOStatisticsEnable, 25, 25) |
3411 __gen_field(values->SOBufferEnable3, 11, 11) |
3412 __gen_field(values->SOBufferEnable2, 10, 10) |
3413 __gen_field(values->SOBufferEnable1, 9, 9) |
3414 __gen_field(values->SOBufferEnable0, 8, 8) |
3415 0;
3416
3417 dw[2] =
3418 __gen_field(values->Stream3VertexReadOffset, 29, 29) |
3419 __gen_field(values->Stream3VertexReadLength, 24, 28) |
3420 __gen_field(values->Stream2VertexReadOffset, 21, 21) |
3421 __gen_field(values->Stream2VertexReadLength, 16, 20) |
3422 __gen_field(values->Stream1VertexReadOffset, 13, 13) |
3423 __gen_field(values->Stream1VertexReadLength, 8, 12) |
3424 __gen_field(values->Stream0VertexReadOffset, 5, 5) |
3425 __gen_field(values->Stream0VertexReadLength, 0, 4) |
3426 0;
3427
3428 }
3429
3430 #define GEN7_3DSTATE_TE_length 0x00000004
3431 #define GEN7_3DSTATE_TE_length_bias 0x00000002
3432 #define GEN7_3DSTATE_TE_header \
3433 .CommandType = 3, \
3434 .CommandSubType = 3, \
3435 ._3DCommandOpcode = 0, \
3436 ._3DCommandSubOpcode = 28, \
3437 .DwordLength = 2
3438
3439 struct GEN7_3DSTATE_TE {
3440 uint32_t CommandType;
3441 uint32_t CommandSubType;
3442 uint32_t _3DCommandOpcode;
3443 uint32_t _3DCommandSubOpcode;
3444 uint32_t DwordLength;
3445 #define INTEGER 0
3446 #define ODD_FRACTIONAL 1
3447 #define EVEN_FRACTIONAL 2
3448 uint32_t Partitioning;
3449 #define POINT 0
3450 #define LINE 1
3451 #define TRI_CW 2
3452 #define TRI_CCW 3
3453 uint32_t OutputTopology;
3454 #define QUAD 0
3455 #define TRI 1
3456 #define ISOLINE 2
3457 uint32_t TEDomain;
3458 #define HW_TESS 0
3459 #define SW_TESS 1
3460 uint32_t TEMode;
3461 uint32_t TEEnable;
3462 float MaximumTessellationFactorOdd;
3463 float MaximumTessellationFactorNotOdd;
3464 };
3465
3466 static inline void
3467 GEN7_3DSTATE_TE_pack(__gen_user_data *data, void * restrict dst,
3468 const struct GEN7_3DSTATE_TE * restrict values)
3469 {
3470 uint32_t *dw = (uint32_t * restrict) dst;
3471
3472 dw[0] =
3473 __gen_field(values->CommandType, 29, 31) |
3474 __gen_field(values->CommandSubType, 27, 28) |
3475 __gen_field(values->_3DCommandOpcode, 24, 26) |
3476 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3477 __gen_field(values->DwordLength, 0, 7) |
3478 0;
3479
3480 dw[1] =
3481 __gen_field(values->Partitioning, 12, 13) |
3482 __gen_field(values->OutputTopology, 8, 9) |
3483 __gen_field(values->TEDomain, 4, 5) |
3484 __gen_field(values->TEMode, 1, 2) |
3485 __gen_field(values->TEEnable, 0, 0) |
3486 0;
3487
3488 dw[2] =
3489 __gen_float(values->MaximumTessellationFactorOdd) |
3490 0;
3491
3492 dw[3] =
3493 __gen_float(values->MaximumTessellationFactorNotOdd) |
3494 0;
3495
3496 }
3497
3498 #define GEN7_3DSTATE_URB_DS_length 0x00000002
3499 #define GEN7_3DSTATE_URB_DS_length_bias 0x00000002
3500 #define GEN7_3DSTATE_URB_DS_header \
3501 .CommandType = 3, \
3502 .CommandSubType = 3, \
3503 ._3DCommandOpcode = 0, \
3504 ._3DCommandSubOpcode = 50, \
3505 .DwordLength = 0
3506
3507 struct GEN7_3DSTATE_URB_DS {
3508 uint32_t CommandType;
3509 uint32_t CommandSubType;
3510 uint32_t _3DCommandOpcode;
3511 uint32_t _3DCommandSubOpcode;
3512 uint32_t DwordLength;
3513 uint32_t DSURBStartingAddress;
3514 uint32_t DSURBEntryAllocationSize;
3515 uint32_t DSNumberofURBEntries;
3516 };
3517
3518 static inline void
3519 GEN7_3DSTATE_URB_DS_pack(__gen_user_data *data, void * restrict dst,
3520 const struct GEN7_3DSTATE_URB_DS * restrict values)
3521 {
3522 uint32_t *dw = (uint32_t * restrict) dst;
3523
3524 dw[0] =
3525 __gen_field(values->CommandType, 29, 31) |
3526 __gen_field(values->CommandSubType, 27, 28) |
3527 __gen_field(values->_3DCommandOpcode, 24, 26) |
3528 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3529 __gen_field(values->DwordLength, 0, 7) |
3530 0;
3531
3532 dw[1] =
3533 __gen_field(values->DSURBStartingAddress, 25, 29) |
3534 __gen_field(values->DSURBEntryAllocationSize, 16, 24) |
3535 __gen_field(values->DSNumberofURBEntries, 0, 15) |
3536 0;
3537
3538 }
3539
3540 #define GEN7_3DSTATE_URB_GS_length 0x00000002
3541 #define GEN7_3DSTATE_URB_GS_length_bias 0x00000002
3542 #define GEN7_3DSTATE_URB_GS_header \
3543 .CommandType = 3, \
3544 .CommandSubType = 3, \
3545 ._3DCommandOpcode = 0, \
3546 ._3DCommandSubOpcode = 51, \
3547 .DwordLength = 0
3548
3549 struct GEN7_3DSTATE_URB_GS {
3550 uint32_t CommandType;
3551 uint32_t CommandSubType;
3552 uint32_t _3DCommandOpcode;
3553 uint32_t _3DCommandSubOpcode;
3554 uint32_t DwordLength;
3555 uint32_t GSURBStartingAddress;
3556 uint32_t GSURBEntryAllocationSize;
3557 uint32_t GSNumberofURBEntries;
3558 };
3559
3560 static inline void
3561 GEN7_3DSTATE_URB_GS_pack(__gen_user_data *data, void * restrict dst,
3562 const struct GEN7_3DSTATE_URB_GS * restrict values)
3563 {
3564 uint32_t *dw = (uint32_t * restrict) dst;
3565
3566 dw[0] =
3567 __gen_field(values->CommandType, 29, 31) |
3568 __gen_field(values->CommandSubType, 27, 28) |
3569 __gen_field(values->_3DCommandOpcode, 24, 26) |
3570 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3571 __gen_field(values->DwordLength, 0, 7) |
3572 0;
3573
3574 dw[1] =
3575 __gen_field(values->GSURBStartingAddress, 25, 29) |
3576 __gen_field(values->GSURBEntryAllocationSize, 16, 24) |
3577 __gen_field(values->GSNumberofURBEntries, 0, 15) |
3578 0;
3579
3580 }
3581
3582 #define GEN7_3DSTATE_URB_HS_length 0x00000002
3583 #define GEN7_3DSTATE_URB_HS_length_bias 0x00000002
3584 #define GEN7_3DSTATE_URB_HS_header \
3585 .CommandType = 3, \
3586 .CommandSubType = 3, \
3587 ._3DCommandOpcode = 0, \
3588 ._3DCommandSubOpcode = 49, \
3589 .DwordLength = 0
3590
3591 struct GEN7_3DSTATE_URB_HS {
3592 uint32_t CommandType;
3593 uint32_t CommandSubType;
3594 uint32_t _3DCommandOpcode;
3595 uint32_t _3DCommandSubOpcode;
3596 uint32_t DwordLength;
3597 uint32_t HSURBStartingAddress;
3598 uint32_t HSURBEntryAllocationSize;
3599 uint32_t HSNumberofURBEntries;
3600 };
3601
3602 static inline void
3603 GEN7_3DSTATE_URB_HS_pack(__gen_user_data *data, void * restrict dst,
3604 const struct GEN7_3DSTATE_URB_HS * restrict values)
3605 {
3606 uint32_t *dw = (uint32_t * restrict) dst;
3607
3608 dw[0] =
3609 __gen_field(values->CommandType, 29, 31) |
3610 __gen_field(values->CommandSubType, 27, 28) |
3611 __gen_field(values->_3DCommandOpcode, 24, 26) |
3612 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3613 __gen_field(values->DwordLength, 0, 7) |
3614 0;
3615
3616 dw[1] =
3617 __gen_field(values->HSURBStartingAddress, 25, 29) |
3618 __gen_field(values->HSURBEntryAllocationSize, 16, 24) |
3619 __gen_field(values->HSNumberofURBEntries, 0, 15) |
3620 0;
3621
3622 }
3623
3624 #define GEN7_3DSTATE_VERTEX_BUFFERS_length_bias 0x00000002
3625 #define GEN7_3DSTATE_VERTEX_BUFFERS_header \
3626 .CommandType = 3, \
3627 .CommandSubType = 3, \
3628 ._3DCommandOpcode = 0, \
3629 ._3DCommandSubOpcode = 8
3630
3631 struct GEN7_VERTEX_BUFFER_STATE {
3632 uint32_t VertexBufferIndex;
3633 #define VERTEXDATA 0
3634 #define INSTANCEDATA 1
3635 uint32_t BufferAccessType;
3636 struct GEN7_MEMORY_OBJECT_CONTROL_STATE VertexBufferMemoryObjectControlState;
3637 uint32_t AddressModifyEnable;
3638 uint32_t NullVertexBuffer;
3639 uint32_t VertexFetchInvalidate;
3640 uint32_t BufferPitch;
3641 __gen_address_type BufferStartingAddress;
3642 __gen_address_type EndAddress;
3643 uint32_t InstanceDataStepRate;
3644 };
3645
3646 static inline void
3647 GEN7_VERTEX_BUFFER_STATE_pack(__gen_user_data *data, void * restrict dst,
3648 const struct GEN7_VERTEX_BUFFER_STATE * restrict values)
3649 {
3650 uint32_t *dw = (uint32_t * restrict) dst;
3651
3652 uint32_t dw_VertexBufferMemoryObjectControlState;
3653 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_VertexBufferMemoryObjectControlState, &values->VertexBufferMemoryObjectControlState);
3654 dw[0] =
3655 __gen_field(values->VertexBufferIndex, 26, 31) |
3656 __gen_field(values->BufferAccessType, 20, 20) |
3657 __gen_field(dw_VertexBufferMemoryObjectControlState, 16, 19) |
3658 __gen_field(values->AddressModifyEnable, 14, 14) |
3659 __gen_field(values->NullVertexBuffer, 13, 13) |
3660 __gen_field(values->VertexFetchInvalidate, 12, 12) |
3661 __gen_field(values->BufferPitch, 0, 11) |
3662 0;
3663
3664 uint32_t dw1 =
3665 0;
3666
3667 dw[1] =
3668 __gen_combine_address(data, &dw[1], values->BufferStartingAddress, dw1);
3669
3670 uint32_t dw2 =
3671 0;
3672
3673 dw[2] =
3674 __gen_combine_address(data, &dw[2], values->EndAddress, dw2);
3675
3676 dw[3] =
3677 __gen_field(values->InstanceDataStepRate, 0, 31) |
3678 0;
3679
3680 }
3681
3682 struct GEN7_3DSTATE_VERTEX_BUFFERS {
3683 uint32_t CommandType;
3684 uint32_t CommandSubType;
3685 uint32_t _3DCommandOpcode;
3686 uint32_t _3DCommandSubOpcode;
3687 uint32_t DwordLength;
3688 /* variable length fields follow */
3689 };
3690
3691 static inline void
3692 GEN7_3DSTATE_VERTEX_BUFFERS_pack(__gen_user_data *data, void * restrict dst,
3693 const struct GEN7_3DSTATE_VERTEX_BUFFERS * restrict values)
3694 {
3695 uint32_t *dw = (uint32_t * restrict) dst;
3696
3697 dw[0] =
3698 __gen_field(values->CommandType, 29, 31) |
3699 __gen_field(values->CommandSubType, 27, 28) |
3700 __gen_field(values->_3DCommandOpcode, 24, 26) |
3701 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3702 __gen_field(values->DwordLength, 0, 7) |
3703 0;
3704
3705 /* variable length fields follow */
3706 }
3707
3708 #define GEN7_3DSTATE_VERTEX_ELEMENTS_length_bias 0x00000002
3709 #define GEN7_3DSTATE_VERTEX_ELEMENTS_header \
3710 .CommandType = 3, \
3711 .CommandSubType = 3, \
3712 ._3DCommandOpcode = 0, \
3713 ._3DCommandSubOpcode = 9
3714
3715 struct GEN7_VERTEX_ELEMENT_STATE {
3716 uint32_t VertexBufferIndex;
3717 uint32_t Valid;
3718 uint32_t SourceElementFormat;
3719 uint32_t EdgeFlagEnable;
3720 uint32_t SourceElementOffset;
3721 uint32_t Component0Control;
3722 uint32_t Component1Control;
3723 uint32_t Component2Control;
3724 uint32_t Component3Control;
3725 };
3726
3727 static inline void
3728 GEN7_VERTEX_ELEMENT_STATE_pack(__gen_user_data *data, void * restrict dst,
3729 const struct GEN7_VERTEX_ELEMENT_STATE * restrict values)
3730 {
3731 uint32_t *dw = (uint32_t * restrict) dst;
3732
3733 dw[0] =
3734 __gen_field(values->VertexBufferIndex, 26, 31) |
3735 __gen_field(values->Valid, 25, 25) |
3736 __gen_field(values->SourceElementFormat, 16, 24) |
3737 __gen_field(values->EdgeFlagEnable, 15, 15) |
3738 __gen_field(values->SourceElementOffset, 0, 11) |
3739 0;
3740
3741 dw[1] =
3742 __gen_field(values->Component0Control, 28, 30) |
3743 __gen_field(values->Component1Control, 24, 26) |
3744 __gen_field(values->Component2Control, 20, 22) |
3745 __gen_field(values->Component3Control, 16, 18) |
3746 0;
3747
3748 }
3749
3750 struct GEN7_3DSTATE_VERTEX_ELEMENTS {
3751 uint32_t CommandType;
3752 uint32_t CommandSubType;
3753 uint32_t _3DCommandOpcode;
3754 uint32_t _3DCommandSubOpcode;
3755 uint32_t DwordLength;
3756 /* variable length fields follow */
3757 };
3758
3759 static inline void
3760 GEN7_3DSTATE_VERTEX_ELEMENTS_pack(__gen_user_data *data, void * restrict dst,
3761 const struct GEN7_3DSTATE_VERTEX_ELEMENTS * restrict values)
3762 {
3763 uint32_t *dw = (uint32_t * restrict) dst;
3764
3765 dw[0] =
3766 __gen_field(values->CommandType, 29, 31) |
3767 __gen_field(values->CommandSubType, 27, 28) |
3768 __gen_field(values->_3DCommandOpcode, 24, 26) |
3769 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3770 __gen_field(values->DwordLength, 0, 7) |
3771 0;
3772
3773 /* variable length fields follow */
3774 }
3775
3776 #define GEN7_3DSTATE_VF_STATISTICS_length 0x00000001
3777 #define GEN7_3DSTATE_VF_STATISTICS_length_bias 0x00000001
3778 #define GEN7_3DSTATE_VF_STATISTICS_header \
3779 .CommandType = 3, \
3780 .CommandSubType = 1, \
3781 ._3DCommandOpcode = 0, \
3782 ._3DCommandSubOpcode = 11
3783
3784 struct GEN7_3DSTATE_VF_STATISTICS {
3785 uint32_t CommandType;
3786 uint32_t CommandSubType;
3787 uint32_t _3DCommandOpcode;
3788 uint32_t _3DCommandSubOpcode;
3789 uint32_t StatisticsEnable;
3790 };
3791
3792 static inline void
3793 GEN7_3DSTATE_VF_STATISTICS_pack(__gen_user_data *data, void * restrict dst,
3794 const struct GEN7_3DSTATE_VF_STATISTICS * restrict values)
3795 {
3796 uint32_t *dw = (uint32_t * restrict) dst;
3797
3798 dw[0] =
3799 __gen_field(values->CommandType, 29, 31) |
3800 __gen_field(values->CommandSubType, 27, 28) |
3801 __gen_field(values->_3DCommandOpcode, 24, 26) |
3802 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3803 __gen_field(values->StatisticsEnable, 0, 0) |
3804 0;
3805
3806 }
3807
3808 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length 0x00000002
3809 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length_bias 0x00000002
3810 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_header\
3811 .CommandType = 3, \
3812 .CommandSubType = 3, \
3813 ._3DCommandOpcode = 0, \
3814 ._3DCommandSubOpcode = 35, \
3815 .DwordLength = 0
3816
3817 struct GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC {
3818 uint32_t CommandType;
3819 uint32_t CommandSubType;
3820 uint32_t _3DCommandOpcode;
3821 uint32_t _3DCommandSubOpcode;
3822 uint32_t DwordLength;
3823 uint32_t CCViewportPointer;
3824 };
3825
3826 static inline void
3827 GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_pack(__gen_user_data *data, void * restrict dst,
3828 const struct GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC * restrict values)
3829 {
3830 uint32_t *dw = (uint32_t * restrict) dst;
3831
3832 dw[0] =
3833 __gen_field(values->CommandType, 29, 31) |
3834 __gen_field(values->CommandSubType, 27, 28) |
3835 __gen_field(values->_3DCommandOpcode, 24, 26) |
3836 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3837 __gen_field(values->DwordLength, 0, 7) |
3838 0;
3839
3840 dw[1] =
3841 __gen_offset(values->CCViewportPointer, 5, 31) |
3842 0;
3843
3844 }
3845
3846 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length 0x00000002
3847 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length_bias 0x00000002
3848 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_header\
3849 .CommandType = 3, \
3850 .CommandSubType = 3, \
3851 ._3DCommandOpcode = 0, \
3852 ._3DCommandSubOpcode = 33, \
3853 .DwordLength = 0
3854
3855 struct GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP {
3856 uint32_t CommandType;
3857 uint32_t CommandSubType;
3858 uint32_t _3DCommandOpcode;
3859 uint32_t _3DCommandSubOpcode;
3860 uint32_t DwordLength;
3861 uint32_t SFClipViewportPointer;
3862 };
3863
3864 static inline void
3865 GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_pack(__gen_user_data *data, void * restrict dst,
3866 const struct GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP * restrict values)
3867 {
3868 uint32_t *dw = (uint32_t * restrict) dst;
3869
3870 dw[0] =
3871 __gen_field(values->CommandType, 29, 31) |
3872 __gen_field(values->CommandSubType, 27, 28) |
3873 __gen_field(values->_3DCommandOpcode, 24, 26) |
3874 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3875 __gen_field(values->DwordLength, 0, 7) |
3876 0;
3877
3878 dw[1] =
3879 __gen_offset(values->SFClipViewportPointer, 6, 31) |
3880 0;
3881
3882 }
3883
3884 #define GEN7_3DSTATE_VS_length 0x00000006
3885 #define GEN7_3DSTATE_VS_length_bias 0x00000002
3886 #define GEN7_3DSTATE_VS_header \
3887 .CommandType = 3, \
3888 .CommandSubType = 3, \
3889 ._3DCommandOpcode = 0, \
3890 ._3DCommandSubOpcode = 16, \
3891 .DwordLength = 4
3892
3893 struct GEN7_3DSTATE_VS {
3894 uint32_t CommandType;
3895 uint32_t CommandSubType;
3896 uint32_t _3DCommandOpcode;
3897 uint32_t _3DCommandSubOpcode;
3898 uint32_t DwordLength;
3899 uint32_t KernelStartPointer;
3900 #define Multiple 0
3901 #define Single 1
3902 uint32_t SingleVertexDispatch;
3903 #define Dmask 0
3904 #define Vmask 1
3905 uint32_t VectorMaskEnableVME;
3906 #define NoSamplers 0
3907 #define _14Samplers 1
3908 #define _58Samplers 2
3909 #define _912Samplers 3
3910 #define _1316Samplers 4
3911 uint32_t SamplerCount;
3912 uint32_t BindingTableEntryCount;
3913 #define IEEE754 0
3914 #define Alternate 1
3915 uint32_t FloatingPointMode;
3916 uint32_t IllegalOpcodeExceptionEnable;
3917 uint32_t SoftwareExceptionEnable;
3918 uint32_t ScratchSpaceBaseOffset;
3919 uint32_t PerThreadScratchSpace;
3920 uint32_t DispatchGRFStartRegisterforURBData;
3921 uint32_t VertexURBEntryReadLength;
3922 uint32_t VertexURBEntryReadOffset;
3923 uint32_t MaximumNumberofThreads;
3924 uint32_t StatisticsEnable;
3925 uint32_t VertexCacheDisable;
3926 uint32_t VSFunctionEnable;
3927 };
3928
3929 static inline void
3930 GEN7_3DSTATE_VS_pack(__gen_user_data *data, void * restrict dst,
3931 const struct GEN7_3DSTATE_VS * restrict values)
3932 {
3933 uint32_t *dw = (uint32_t * restrict) dst;
3934
3935 dw[0] =
3936 __gen_field(values->CommandType, 29, 31) |
3937 __gen_field(values->CommandSubType, 27, 28) |
3938 __gen_field(values->_3DCommandOpcode, 24, 26) |
3939 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3940 __gen_field(values->DwordLength, 0, 7) |
3941 0;
3942
3943 dw[1] =
3944 __gen_offset(values->KernelStartPointer, 6, 31) |
3945 0;
3946
3947 dw[2] =
3948 __gen_field(values->SingleVertexDispatch, 31, 31) |
3949 __gen_field(values->VectorMaskEnableVME, 30, 30) |
3950 __gen_field(values->SamplerCount, 27, 29) |
3951 __gen_field(values->BindingTableEntryCount, 18, 25) |
3952 __gen_field(values->FloatingPointMode, 16, 16) |
3953 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
3954 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
3955 0;
3956
3957 dw[3] =
3958 __gen_offset(values->ScratchSpaceBaseOffset, 10, 31) |
3959 __gen_field(values->PerThreadScratchSpace, 0, 3) |
3960 0;
3961
3962 dw[4] =
3963 __gen_field(values->DispatchGRFStartRegisterforURBData, 20, 24) |
3964 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
3965 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
3966 0;
3967
3968 dw[5] =
3969 __gen_field(values->MaximumNumberofThreads, 25, 31) |
3970 __gen_field(values->StatisticsEnable, 10, 10) |
3971 __gen_field(values->VertexCacheDisable, 1, 1) |
3972 __gen_field(values->VSFunctionEnable, 0, 0) |
3973 0;
3974
3975 }
3976
3977 #define GEN7_3DSTATE_WM_length 0x00000003
3978 #define GEN7_3DSTATE_WM_length_bias 0x00000002
3979 #define GEN7_3DSTATE_WM_header \
3980 .CommandType = 3, \
3981 .CommandSubType = 3, \
3982 ._3DCommandOpcode = 0, \
3983 ._3DCommandSubOpcode = 20, \
3984 .DwordLength = 1
3985
3986 struct GEN7_3DSTATE_WM {
3987 uint32_t CommandType;
3988 uint32_t CommandSubType;
3989 uint32_t _3DCommandOpcode;
3990 uint32_t _3DCommandSubOpcode;
3991 uint32_t DwordLength;
3992 uint32_t StatisticsEnable;
3993 uint32_t DepthBufferClear;
3994 uint32_t ThreadDispatchEnable;
3995 uint32_t DepthBufferResolveEnable;
3996 uint32_t HierarchicalDepthBufferResolveEnable;
3997 uint32_t LegacyDiamondLineRasterization;
3998 uint32_t PixelShaderKillPixel;
3999 #define PSCDEPTH_OFF 0
4000 #define PSCDEPTH_ON 1
4001 #define PSCDEPTH_ON_GE 2
4002 #define PSCDEPTH_ON_LE 3
4003 uint32_t PixelShaderComputedDepthMode;
4004 #define EDSC_NORMAL 0
4005 #define EDSC_PSEXEC 1
4006 #define EDSC_PREPS 2
4007 uint32_t EarlyDepthStencilControl;
4008 uint32_t PixelShaderUsesSourceDepth;
4009 uint32_t PixelShaderUsesSourceW;
4010 #define INTERP_PIXEL 0
4011 #define INTERP_CENTROID 2
4012 #define INTERP_SAMPLE 3
4013 uint32_t PositionZWInterpolationMode;
4014 uint32_t BarycentricInterpolationMode;
4015 uint32_t PixelShaderUsesInputCoverageMask;
4016 uint32_t LineEndCapAntialiasingRegionWidth;
4017 uint32_t LineAntialiasingRegionWidth;
4018 uint32_t PolygonStippleEnable;
4019 uint32_t LineStippleEnable;
4020 #define RASTRULE_UPPER_LEFT 0
4021 #define RASTRULE_UPPER_RIGHT 1
4022 uint32_t PointRasterizationRule;
4023 #define MSRASTMODE_OFF_PIXEL 0
4024 #define MSRASTMODE_OFF_PATTERN 1
4025 #define MSRASTMODE_ON_PIXEL 2
4026 #define MSRASTMODE_ON_PATTERN 3
4027 uint32_t MultisampleRasterizationMode;
4028 #define MSDISPMODE_PERSAMPLE 0
4029 #define MSDISPMODE_PERPIXEL 1
4030 uint32_t MultisampleDispatchMode;
4031 };
4032
4033 static inline void
4034 GEN7_3DSTATE_WM_pack(__gen_user_data *data, void * restrict dst,
4035 const struct GEN7_3DSTATE_WM * restrict values)
4036 {
4037 uint32_t *dw = (uint32_t * restrict) dst;
4038
4039 dw[0] =
4040 __gen_field(values->CommandType, 29, 31) |
4041 __gen_field(values->CommandSubType, 27, 28) |
4042 __gen_field(values->_3DCommandOpcode, 24, 26) |
4043 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4044 __gen_field(values->DwordLength, 0, 7) |
4045 0;
4046
4047 dw[1] =
4048 __gen_field(values->StatisticsEnable, 31, 31) |
4049 __gen_field(values->DepthBufferClear, 30, 30) |
4050 __gen_field(values->ThreadDispatchEnable, 29, 29) |
4051 __gen_field(values->DepthBufferResolveEnable, 28, 28) |
4052 __gen_field(values->HierarchicalDepthBufferResolveEnable, 27, 27) |
4053 __gen_field(values->LegacyDiamondLineRasterization, 26, 26) |
4054 __gen_field(values->PixelShaderKillPixel, 25, 25) |
4055 __gen_field(values->PixelShaderComputedDepthMode, 23, 24) |
4056 __gen_field(values->EarlyDepthStencilControl, 21, 22) |
4057 __gen_field(values->PixelShaderUsesSourceDepth, 20, 20) |
4058 __gen_field(values->PixelShaderUsesSourceW, 19, 19) |
4059 __gen_field(values->PositionZWInterpolationMode, 17, 18) |
4060 __gen_field(values->BarycentricInterpolationMode, 11, 16) |
4061 __gen_field(values->PixelShaderUsesInputCoverageMask, 10, 10) |
4062 __gen_field(values->LineEndCapAntialiasingRegionWidth, 8, 9) |
4063 __gen_field(values->LineAntialiasingRegionWidth, 6, 7) |
4064 __gen_field(values->PolygonStippleEnable, 4, 4) |
4065 __gen_field(values->LineStippleEnable, 3, 3) |
4066 __gen_field(values->PointRasterizationRule, 2, 2) |
4067 __gen_field(values->MultisampleRasterizationMode, 0, 1) |
4068 0;
4069
4070 dw[2] =
4071 __gen_field(values->MultisampleDispatchMode, 31, 31) |
4072 0;
4073
4074 }
4075
4076 #define GEN7_GPGPU_OBJECT_length 0x00000008
4077 #define GEN7_GPGPU_OBJECT_length_bias 0x00000002
4078 #define GEN7_GPGPU_OBJECT_header \
4079 .CommandType = 3, \
4080 .Pipeline = 2, \
4081 .MediaCommandOpcode = 1, \
4082 .SubOpcode = 4, \
4083 .DwordLength = 6
4084
4085 struct GEN7_GPGPU_OBJECT {
4086 uint32_t CommandType;
4087 uint32_t Pipeline;
4088 uint32_t MediaCommandOpcode;
4089 uint32_t SubOpcode;
4090 uint32_t PredicateEnable;
4091 uint32_t DwordLength;
4092 uint32_t SharedLocalMemoryFixedOffset;
4093 uint32_t InterfaceDescriptorOffset;
4094 uint32_t SharedLocalMemoryOffset;
4095 uint32_t EndofThreadGroup;
4096 #define HalfSlice1 2
4097 #define HalfSlice0 1
4098 #define EitherHalfSlice 0
4099 uint32_t HalfSliceDestinationSelect;
4100 uint32_t IndirectDataLength;
4101 uint32_t IndirectDataStartAddress;
4102 uint32_t ThreadGroupIDX;
4103 uint32_t ThreadGroupIDY;
4104 uint32_t ThreadGroupIDZ;
4105 uint32_t ExecutionMask;
4106 };
4107
4108 static inline void
4109 GEN7_GPGPU_OBJECT_pack(__gen_user_data *data, void * restrict dst,
4110 const struct GEN7_GPGPU_OBJECT * restrict values)
4111 {
4112 uint32_t *dw = (uint32_t * restrict) dst;
4113
4114 dw[0] =
4115 __gen_field(values->CommandType, 29, 31) |
4116 __gen_field(values->Pipeline, 27, 28) |
4117 __gen_field(values->MediaCommandOpcode, 24, 26) |
4118 __gen_field(values->SubOpcode, 16, 23) |
4119 __gen_field(values->PredicateEnable, 8, 8) |
4120 __gen_field(values->DwordLength, 0, 7) |
4121 0;
4122
4123 dw[1] =
4124 __gen_field(values->SharedLocalMemoryFixedOffset, 7, 7) |
4125 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
4126 0;
4127
4128 dw[2] =
4129 __gen_field(values->SharedLocalMemoryOffset, 28, 31) |
4130 __gen_field(values->EndofThreadGroup, 24, 24) |
4131 __gen_field(values->HalfSliceDestinationSelect, 17, 18) |
4132 __gen_field(values->IndirectDataLength, 0, 16) |
4133 0;
4134
4135 dw[3] =
4136 __gen_offset(values->IndirectDataStartAddress, 0, 31) |
4137 0;
4138
4139 dw[4] =
4140 __gen_field(values->ThreadGroupIDX, 0, 31) |
4141 0;
4142
4143 dw[5] =
4144 __gen_field(values->ThreadGroupIDY, 0, 31) |
4145 0;
4146
4147 dw[6] =
4148 __gen_field(values->ThreadGroupIDZ, 0, 31) |
4149 0;
4150
4151 dw[7] =
4152 __gen_field(values->ExecutionMask, 0, 31) |
4153 0;
4154
4155 }
4156
4157 #define GEN7_GPGPU_WALKER_length 0x0000000b
4158 #define GEN7_GPGPU_WALKER_length_bias 0x00000002
4159 #define GEN7_GPGPU_WALKER_header \
4160 .CommandType = 3, \
4161 .Pipeline = 2, \
4162 .MediaCommandOpcode = 1, \
4163 .SubOpcodeA = 5, \
4164 .DwordLength = 9
4165
4166 struct GEN7_GPGPU_WALKER {
4167 uint32_t CommandType;
4168 uint32_t Pipeline;
4169 uint32_t MediaCommandOpcode;
4170 uint32_t SubOpcodeA;
4171 uint32_t IndirectParameterEnable;
4172 uint32_t PredicateEnable;
4173 uint32_t DwordLength;
4174 uint32_t InterfaceDescriptorOffset;
4175 #define SIMD8 0
4176 #define SIMD16 1
4177 #define SIMD32 2
4178 uint32_t SIMDSize;
4179 uint32_t ThreadDepthCounterMaximum;
4180 uint32_t ThreadHeightCounterMaximum;
4181 uint32_t ThreadWidthCounterMaximum;
4182 uint32_t ThreadGroupIDStartingX;
4183 uint32_t ThreadGroupIDXDimension;
4184 uint32_t ThreadGroupIDStartingY;
4185 uint32_t ThreadGroupIDYDimension;
4186 uint32_t ThreadGroupIDStartingZ;
4187 uint32_t ThreadGroupIDZDimension;
4188 uint32_t RightExecutionMask;
4189 uint32_t BottomExecutionMask;
4190 };
4191
4192 static inline void
4193 GEN7_GPGPU_WALKER_pack(__gen_user_data *data, void * restrict dst,
4194 const struct GEN7_GPGPU_WALKER * restrict values)
4195 {
4196 uint32_t *dw = (uint32_t * restrict) dst;
4197
4198 dw[0] =
4199 __gen_field(values->CommandType, 29, 31) |
4200 __gen_field(values->Pipeline, 27, 28) |
4201 __gen_field(values->MediaCommandOpcode, 24, 26) |
4202 __gen_field(values->SubOpcodeA, 16, 23) |
4203 __gen_field(values->IndirectParameterEnable, 10, 10) |
4204 __gen_field(values->PredicateEnable, 8, 8) |
4205 __gen_field(values->DwordLength, 0, 7) |
4206 0;
4207
4208 dw[1] =
4209 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
4210 0;
4211
4212 dw[2] =
4213 __gen_field(values->SIMDSize, 30, 31) |
4214 __gen_field(values->ThreadDepthCounterMaximum, 16, 21) |
4215 __gen_field(values->ThreadHeightCounterMaximum, 8, 13) |
4216 __gen_field(values->ThreadWidthCounterMaximum, 0, 5) |
4217 0;
4218
4219 dw[3] =
4220 __gen_field(values->ThreadGroupIDStartingX, 0, 31) |
4221 0;
4222
4223 dw[4] =
4224 __gen_field(values->ThreadGroupIDXDimension, 0, 31) |
4225 0;
4226
4227 dw[5] =
4228 __gen_field(values->ThreadGroupIDStartingY, 0, 31) |
4229 0;
4230
4231 dw[6] =
4232 __gen_field(values->ThreadGroupIDYDimension, 0, 31) |
4233 0;
4234
4235 dw[7] =
4236 __gen_field(values->ThreadGroupIDStartingZ, 0, 31) |
4237 0;
4238
4239 dw[8] =
4240 __gen_field(values->ThreadGroupIDZDimension, 0, 31) |
4241 0;
4242
4243 dw[9] =
4244 __gen_field(values->RightExecutionMask, 0, 31) |
4245 0;
4246
4247 dw[10] =
4248 __gen_field(values->BottomExecutionMask, 0, 31) |
4249 0;
4250
4251 }
4252
4253 #define GEN7_MEDIA_CURBE_LOAD_length 0x00000004
4254 #define GEN7_MEDIA_CURBE_LOAD_length_bias 0x00000002
4255 #define GEN7_MEDIA_CURBE_LOAD_header \
4256 .CommandType = 3, \
4257 .Pipeline = 2, \
4258 .MediaCommandOpcode = 0, \
4259 .SubOpcode = 1, \
4260 .DwordLength = 2
4261
4262 struct GEN7_MEDIA_CURBE_LOAD {
4263 uint32_t CommandType;
4264 uint32_t Pipeline;
4265 uint32_t MediaCommandOpcode;
4266 uint32_t SubOpcode;
4267 uint32_t DwordLength;
4268 uint32_t CURBETotalDataLength;
4269 uint32_t CURBEDataStartAddress;
4270 };
4271
4272 static inline void
4273 GEN7_MEDIA_CURBE_LOAD_pack(__gen_user_data *data, void * restrict dst,
4274 const struct GEN7_MEDIA_CURBE_LOAD * restrict values)
4275 {
4276 uint32_t *dw = (uint32_t * restrict) dst;
4277
4278 dw[0] =
4279 __gen_field(values->CommandType, 29, 31) |
4280 __gen_field(values->Pipeline, 27, 28) |
4281 __gen_field(values->MediaCommandOpcode, 24, 26) |
4282 __gen_field(values->SubOpcode, 16, 23) |
4283 __gen_field(values->DwordLength, 0, 15) |
4284 0;
4285
4286 dw[1] =
4287 0;
4288
4289 dw[2] =
4290 __gen_field(values->CURBETotalDataLength, 0, 16) |
4291 0;
4292
4293 dw[3] =
4294 __gen_field(values->CURBEDataStartAddress, 0, 31) |
4295 0;
4296
4297 }
4298
4299 #define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 0x00000004
4300 #define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length_bias 0x00000002
4301 #define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_header\
4302 .CommandType = 3, \
4303 .Pipeline = 2, \
4304 .MediaCommandOpcode = 0, \
4305 .SubOpcode = 2, \
4306 .DwordLength = 2
4307
4308 struct GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD {
4309 uint32_t CommandType;
4310 uint32_t Pipeline;
4311 uint32_t MediaCommandOpcode;
4312 uint32_t SubOpcode;
4313 uint32_t DwordLength;
4314 uint32_t InterfaceDescriptorTotalLength;
4315 uint32_t InterfaceDescriptorDataStartAddress;
4316 };
4317
4318 static inline void
4319 GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_pack(__gen_user_data *data, void * restrict dst,
4320 const struct GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD * restrict values)
4321 {
4322 uint32_t *dw = (uint32_t * restrict) dst;
4323
4324 dw[0] =
4325 __gen_field(values->CommandType, 29, 31) |
4326 __gen_field(values->Pipeline, 27, 28) |
4327 __gen_field(values->MediaCommandOpcode, 24, 26) |
4328 __gen_field(values->SubOpcode, 16, 23) |
4329 __gen_field(values->DwordLength, 0, 15) |
4330 0;
4331
4332 dw[1] =
4333 0;
4334
4335 dw[2] =
4336 __gen_field(values->InterfaceDescriptorTotalLength, 0, 16) |
4337 0;
4338
4339 dw[3] =
4340 __gen_offset(values->InterfaceDescriptorDataStartAddress, 0, 31) |
4341 0;
4342
4343 }
4344
4345 #define GEN7_MEDIA_OBJECT_length_bias 0x00000002
4346 #define GEN7_MEDIA_OBJECT_header \
4347 .CommandType = 3, \
4348 .MediaCommandPipeline = 2, \
4349 .MediaCommandOpcode = 1, \
4350 .MediaCommandSubOpcode = 0
4351
4352 struct GEN7_MEDIA_OBJECT {
4353 uint32_t CommandType;
4354 uint32_t MediaCommandPipeline;
4355 uint32_t MediaCommandOpcode;
4356 uint32_t MediaCommandSubOpcode;
4357 uint32_t DwordLength;
4358 uint32_t InterfaceDescriptorOffset;
4359 uint32_t ChildrenPresent;
4360 #define Nothreadsynchronization 0
4361 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
4362 uint32_t ThreadSynchronization;
4363 #define Notusingscoreboard 0
4364 #define Usingscoreboard 1
4365 uint32_t UseScoreboard;
4366 #define HalfSlice1 2
4367 #define HalfSlice0 1
4368 #define Eitherhalfslice 0
4369 uint32_t HalfSliceDestinationSelect;
4370 uint32_t IndirectDataLength;
4371 __gen_address_type IndirectDataStartAddress;
4372 uint32_t ScoredboardY;
4373 uint32_t ScoreboardX;
4374 uint32_t ScoreboardColor;
4375 uint32_t ScoreboardMask;
4376 /* variable length fields follow */
4377 };
4378
4379 static inline void
4380 GEN7_MEDIA_OBJECT_pack(__gen_user_data *data, void * restrict dst,
4381 const struct GEN7_MEDIA_OBJECT * restrict values)
4382 {
4383 uint32_t *dw = (uint32_t * restrict) dst;
4384
4385 dw[0] =
4386 __gen_field(values->CommandType, 29, 31) |
4387 __gen_field(values->MediaCommandPipeline, 27, 28) |
4388 __gen_field(values->MediaCommandOpcode, 24, 26) |
4389 __gen_field(values->MediaCommandSubOpcode, 16, 23) |
4390 __gen_field(values->DwordLength, 0, 15) |
4391 0;
4392
4393 dw[1] =
4394 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
4395 0;
4396
4397 dw[2] =
4398 __gen_field(values->ChildrenPresent, 31, 31) |
4399 __gen_field(values->ThreadSynchronization, 24, 24) |
4400 __gen_field(values->UseScoreboard, 21, 21) |
4401 __gen_field(values->HalfSliceDestinationSelect, 17, 18) |
4402 __gen_field(values->IndirectDataLength, 0, 16) |
4403 0;
4404
4405 uint32_t dw3 =
4406 0;
4407
4408 dw[3] =
4409 __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, dw3);
4410
4411 dw[4] =
4412 __gen_field(values->ScoredboardY, 16, 24) |
4413 __gen_field(values->ScoreboardX, 0, 8) |
4414 0;
4415
4416 dw[5] =
4417 __gen_field(values->ScoreboardColor, 16, 19) |
4418 __gen_field(values->ScoreboardMask, 0, 7) |
4419 0;
4420
4421 /* variable length fields follow */
4422 }
4423
4424 #define GEN7_MEDIA_OBJECT_PRT_length 0x00000010
4425 #define GEN7_MEDIA_OBJECT_PRT_length_bias 0x00000002
4426 #define GEN7_MEDIA_OBJECT_PRT_header \
4427 .CommandType = 3, \
4428 .Pipeline = 2, \
4429 .MediaCommandOpcode = 1, \
4430 .SubOpcode = 2, \
4431 .DwordLength = 14
4432
4433 struct GEN7_MEDIA_OBJECT_PRT {
4434 uint32_t CommandType;
4435 uint32_t Pipeline;
4436 uint32_t MediaCommandOpcode;
4437 uint32_t SubOpcode;
4438 uint32_t DwordLength;
4439 uint32_t InterfaceDescriptorOffset;
4440 uint32_t ChildrenPresent;
4441 uint32_t PRT_FenceNeeded;
4442 #define Rootthreadqueue 0
4443 #define VFEstateflush 1
4444 uint32_t PRT_FenceType;
4445 uint32_t InlineData;
4446 };
4447
4448 static inline void
4449 GEN7_MEDIA_OBJECT_PRT_pack(__gen_user_data *data, void * restrict dst,
4450 const struct GEN7_MEDIA_OBJECT_PRT * restrict values)
4451 {
4452 uint32_t *dw = (uint32_t * restrict) dst;
4453
4454 dw[0] =
4455 __gen_field(values->CommandType, 29, 31) |
4456 __gen_field(values->Pipeline, 27, 28) |
4457 __gen_field(values->MediaCommandOpcode, 24, 26) |
4458 __gen_field(values->SubOpcode, 16, 23) |
4459 __gen_field(values->DwordLength, 0, 15) |
4460 0;
4461
4462 dw[1] =
4463 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
4464 0;
4465
4466 dw[2] =
4467 __gen_field(values->ChildrenPresent, 31, 31) |
4468 __gen_field(values->PRT_FenceNeeded, 23, 23) |
4469 __gen_field(values->PRT_FenceType, 22, 22) |
4470 0;
4471
4472 dw[3] =
4473 0;
4474
4475 dw[4] =
4476 __gen_field(values->InlineData, 0, 31) |
4477 0;
4478
4479 }
4480
4481 #define GEN7_MEDIA_OBJECT_WALKER_length_bias 0x00000002
4482 #define GEN7_MEDIA_OBJECT_WALKER_header \
4483 .CommandType = 3, \
4484 .Pipeline = 2, \
4485 .MediaCommandOpcode = 1, \
4486 .SubOpcode = 3
4487
4488 struct GEN7_MEDIA_OBJECT_WALKER {
4489 uint32_t CommandType;
4490 uint32_t Pipeline;
4491 uint32_t MediaCommandOpcode;
4492 uint32_t SubOpcode;
4493 uint32_t DwordLength;
4494 uint32_t InterfaceDescriptorOffset;
4495 uint32_t ChildrenPresent;
4496 #define Nothreadsynchronization 0
4497 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
4498 uint32_t ThreadSynchronization;
4499 #define Notusingscoreboard 0
4500 #define Usingscoreboard 1
4501 uint32_t UseScoreboard;
4502 uint32_t IndirectDataLength;
4503 uint32_t IndirectDataStartAddress;
4504 uint32_t ScoreboardMask;
4505 uint32_t DualMode;
4506 uint32_t Repel;
4507 uint32_t ColorCountMinusOne;
4508 uint32_t MiddleLoopExtraSteps;
4509 uint32_t LocalMidLoopUnitY;
4510 uint32_t MidLoopUnitX;
4511 uint32_t GlobalLoopExecCount;
4512 uint32_t LocalLoopExecCount;
4513 uint32_t BlockResolutionY;
4514 uint32_t BlockResolutionX;
4515 uint32_t LocalStartY;
4516 uint32_t LocalStartX;
4517 uint32_t LocalEndY;
4518 uint32_t LocalEndX;
4519 uint32_t LocalOuterLoopStrideY;
4520 uint32_t LocalOuterLoopStrideX;
4521 uint32_t LocalInnerLoopUnitY;
4522 uint32_t LocalInnerLoopUnitX;
4523 uint32_t GlobalResolutionY;
4524 uint32_t GlobalResolutionX;
4525 uint32_t GlobalStartY;
4526 uint32_t GlobalStartX;
4527 uint32_t GlobalOuterLoopStrideY;
4528 uint32_t GlobalOuterLoopStrideX;
4529 uint32_t GlobalInnerLoopUnitY;
4530 uint32_t GlobalInnerLoopUnitX;
4531 /* variable length fields follow */
4532 };
4533
4534 static inline void
4535 GEN7_MEDIA_OBJECT_WALKER_pack(__gen_user_data *data, void * restrict dst,
4536 const struct GEN7_MEDIA_OBJECT_WALKER * restrict values)
4537 {
4538 uint32_t *dw = (uint32_t * restrict) dst;
4539
4540 dw[0] =
4541 __gen_field(values->CommandType, 29, 31) |
4542 __gen_field(values->Pipeline, 27, 28) |
4543 __gen_field(values->MediaCommandOpcode, 24, 26) |
4544 __gen_field(values->SubOpcode, 16, 23) |
4545 __gen_field(values->DwordLength, 0, 15) |
4546 0;
4547
4548 dw[1] =
4549 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
4550 0;
4551
4552 dw[2] =
4553 __gen_field(values->ChildrenPresent, 31, 31) |
4554 __gen_field(values->ThreadSynchronization, 24, 24) |
4555 __gen_field(values->UseScoreboard, 21, 21) |
4556 __gen_field(values->IndirectDataLength, 0, 16) |
4557 0;
4558
4559 dw[3] =
4560 __gen_offset(values->IndirectDataStartAddress, 0, 31) |
4561 0;
4562
4563 dw[4] =
4564 0;
4565
4566 dw[5] =
4567 __gen_field(values->ScoreboardMask, 0, 7) |
4568 0;
4569
4570 dw[6] =
4571 __gen_field(values->DualMode, 31, 31) |
4572 __gen_field(values->Repel, 30, 30) |
4573 __gen_field(values->ColorCountMinusOne, 24, 27) |
4574 __gen_field(values->MiddleLoopExtraSteps, 16, 20) |
4575 __gen_field(values->LocalMidLoopUnitY, 12, 13) |
4576 __gen_field(values->MidLoopUnitX, 8, 9) |
4577 0;
4578
4579 dw[7] =
4580 __gen_field(values->GlobalLoopExecCount, 16, 25) |
4581 __gen_field(values->LocalLoopExecCount, 0, 9) |
4582 0;
4583
4584 dw[8] =
4585 __gen_field(values->BlockResolutionY, 16, 24) |
4586 __gen_field(values->BlockResolutionX, 0, 8) |
4587 0;
4588
4589 dw[9] =
4590 __gen_field(values->LocalStartY, 16, 24) |
4591 __gen_field(values->LocalStartX, 0, 8) |
4592 0;
4593
4594 dw[10] =
4595 __gen_field(values->LocalEndY, 16, 24) |
4596 __gen_field(values->LocalEndX, 0, 8) |
4597 0;
4598
4599 dw[11] =
4600 __gen_field(values->LocalOuterLoopStrideY, 16, 25) |
4601 __gen_field(values->LocalOuterLoopStrideX, 0, 9) |
4602 0;
4603
4604 dw[12] =
4605 __gen_field(values->LocalInnerLoopUnitY, 16, 25) |
4606 __gen_field(values->LocalInnerLoopUnitX, 0, 9) |
4607 0;
4608
4609 dw[13] =
4610 __gen_field(values->GlobalResolutionY, 16, 24) |
4611 __gen_field(values->GlobalResolutionX, 0, 8) |
4612 0;
4613
4614 dw[14] =
4615 __gen_field(values->GlobalStartY, 16, 25) |
4616 __gen_field(values->GlobalStartX, 0, 9) |
4617 0;
4618
4619 dw[15] =
4620 __gen_field(values->GlobalOuterLoopStrideY, 16, 25) |
4621 __gen_field(values->GlobalOuterLoopStrideX, 0, 9) |
4622 0;
4623
4624 dw[16] =
4625 __gen_field(values->GlobalInnerLoopUnitY, 16, 25) |
4626 __gen_field(values->GlobalInnerLoopUnitX, 0, 9) |
4627 0;
4628
4629 /* variable length fields follow */
4630 }
4631
4632 #define GEN7_MEDIA_STATE_FLUSH_length 0x00000002
4633 #define GEN7_MEDIA_STATE_FLUSH_length_bias 0x00000002
4634 #define GEN7_MEDIA_STATE_FLUSH_header \
4635 .CommandType = 3, \
4636 .Pipeline = 2, \
4637 .MediaCommandOpcode = 0, \
4638 .SubOpcode = 4, \
4639 .DwordLength = 0
4640
4641 struct GEN7_MEDIA_STATE_FLUSH {
4642 uint32_t CommandType;
4643 uint32_t Pipeline;
4644 uint32_t MediaCommandOpcode;
4645 uint32_t SubOpcode;
4646 uint32_t DwordLength;
4647 uint32_t WatermarkRequired;
4648 uint32_t InterfaceDescriptorOffset;
4649 };
4650
4651 static inline void
4652 GEN7_MEDIA_STATE_FLUSH_pack(__gen_user_data *data, void * restrict dst,
4653 const struct GEN7_MEDIA_STATE_FLUSH * restrict values)
4654 {
4655 uint32_t *dw = (uint32_t * restrict) dst;
4656
4657 dw[0] =
4658 __gen_field(values->CommandType, 29, 31) |
4659 __gen_field(values->Pipeline, 27, 28) |
4660 __gen_field(values->MediaCommandOpcode, 24, 26) |
4661 __gen_field(values->SubOpcode, 16, 23) |
4662 __gen_field(values->DwordLength, 0, 15) |
4663 0;
4664
4665 dw[1] =
4666 __gen_field(values->WatermarkRequired, 6, 6) |
4667 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
4668 0;
4669
4670 }
4671
4672 #define GEN7_MEDIA_VFE_STATE_length 0x00000008
4673 #define GEN7_MEDIA_VFE_STATE_length_bias 0x00000002
4674 #define GEN7_MEDIA_VFE_STATE_header \
4675 .CommandType = 3, \
4676 .Pipeline = 2, \
4677 .MediaCommandOpcode = 0, \
4678 .SubOpcode = 0, \
4679 .DwordLength = 6
4680
4681 struct GEN7_MEDIA_VFE_STATE {
4682 uint32_t CommandType;
4683 uint32_t Pipeline;
4684 uint32_t MediaCommandOpcode;
4685 uint32_t SubOpcode;
4686 uint32_t DwordLength;
4687 uint32_t ScratchSpaceBasePointer;
4688 uint32_t PerThreadScratchSpace;
4689 uint32_t MaximumNumberofThreads;
4690 uint32_t NumberofURBEntries;
4691 #define Maintainingtheexistingtimestampstate 0
4692 #define Resettingrelativetimerandlatchingtheglobaltimestamp 1
4693 uint32_t ResetGatewayTimer;
4694 #define MaintainingOpenGatewayForwardMsgCloseGatewayprotocollegacymode 0
4695 #define BypassingOpenGatewayCloseGatewayprotocol 1
4696 uint32_t BypassGatewayControl;
4697 #define NoMMIOreadwriteallowed 0
4698 #define MMIOreadwritetoanyaddress 2
4699 uint32_t GatewayMMIOAccessControl;
4700 uint32_t GPGPUMode;
4701 uint32_t URBEntryAllocationSize;
4702 uint32_t CURBEAllocationSize;
4703 #define Scoreboarddisabled 0
4704 #define Scoreboardenabled 1
4705 uint32_t ScoreboardEnable;
4706 #define StallingScoreboard 0
4707 #define NonStallingScoreboard 1
4708 uint32_t ScoreboardType;
4709 uint32_t ScoreboardMask;
4710 uint32_t Scoreboard3DeltaY;
4711 uint32_t Scoreboard3DeltaX;
4712 uint32_t Scoreboard2DeltaY;
4713 uint32_t Scoreboard2DeltaX;
4714 uint32_t Scoreboard1DeltaY;
4715 uint32_t Scoreboard1DeltaX;
4716 uint32_t Scoreboard0DeltaY;
4717 uint32_t Scoreboard0DeltaX;
4718 uint32_t Scoreboard7DeltaY;
4719 uint32_t Scoreboard7DeltaX;
4720 uint32_t Scoreboard6DeltaY;
4721 uint32_t Scoreboard6DeltaX;
4722 uint32_t Scoreboard5DeltaY;
4723 uint32_t Scoreboard5DeltaX;
4724 uint32_t Scoreboard4DeltaY;
4725 uint32_t Scoreboard4DeltaX;
4726 };
4727
4728 static inline void
4729 GEN7_MEDIA_VFE_STATE_pack(__gen_user_data *data, void * restrict dst,
4730 const struct GEN7_MEDIA_VFE_STATE * restrict values)
4731 {
4732 uint32_t *dw = (uint32_t * restrict) dst;
4733
4734 dw[0] =
4735 __gen_field(values->CommandType, 29, 31) |
4736 __gen_field(values->Pipeline, 27, 28) |
4737 __gen_field(values->MediaCommandOpcode, 24, 26) |
4738 __gen_field(values->SubOpcode, 16, 23) |
4739 __gen_field(values->DwordLength, 0, 15) |
4740 0;
4741
4742 dw[1] =
4743 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
4744 __gen_field(values->PerThreadScratchSpace, 0, 3) |
4745 0;
4746
4747 dw[2] =
4748 __gen_field(values->MaximumNumberofThreads, 16, 31) |
4749 __gen_field(values->NumberofURBEntries, 8, 15) |
4750 __gen_field(values->ResetGatewayTimer, 7, 7) |
4751 __gen_field(values->BypassGatewayControl, 6, 6) |
4752 __gen_field(values->GatewayMMIOAccessControl, 3, 4) |
4753 __gen_field(values->GPGPUMode, 2, 2) |
4754 0;
4755
4756 dw[3] =
4757 0;
4758
4759 dw[4] =
4760 __gen_field(values->URBEntryAllocationSize, 16, 31) |
4761 __gen_field(values->CURBEAllocationSize, 0, 15) |
4762 0;
4763
4764 dw[5] =
4765 __gen_field(values->ScoreboardEnable, 31, 31) |
4766 __gen_field(values->ScoreboardType, 30, 30) |
4767 __gen_field(values->ScoreboardMask, 0, 7) |
4768 0;
4769
4770 dw[6] =
4771 __gen_field(values->Scoreboard3DeltaY, 28, 31) |
4772 __gen_field(values->Scoreboard3DeltaX, 24, 27) |
4773 __gen_field(values->Scoreboard2DeltaY, 20, 23) |
4774 __gen_field(values->Scoreboard2DeltaX, 16, 19) |
4775 __gen_field(values->Scoreboard1DeltaY, 12, 15) |
4776 __gen_field(values->Scoreboard1DeltaX, 8, 11) |
4777 __gen_field(values->Scoreboard0DeltaY, 4, 7) |
4778 __gen_field(values->Scoreboard0DeltaX, 0, 3) |
4779 0;
4780
4781 dw[7] =
4782 __gen_field(values->Scoreboard7DeltaY, 28, 31) |
4783 __gen_field(values->Scoreboard7DeltaX, 24, 27) |
4784 __gen_field(values->Scoreboard6DeltaY, 20, 23) |
4785 __gen_field(values->Scoreboard6DeltaX, 16, 19) |
4786 __gen_field(values->Scoreboard5DeltaY, 12, 15) |
4787 __gen_field(values->Scoreboard5DeltaX, 8, 11) |
4788 __gen_field(values->Scoreboard4DeltaY, 4, 7) |
4789 __gen_field(values->Scoreboard4DeltaX, 0, 3) |
4790 0;
4791
4792 }
4793
4794 #define GEN7_MI_ARB_CHECK_length 0x00000001
4795 #define GEN7_MI_ARB_CHECK_length_bias 0x00000001
4796 #define GEN7_MI_ARB_CHECK_header \
4797 .CommandType = 0, \
4798 .MICommandOpcode = 5
4799
4800 struct GEN7_MI_ARB_CHECK {
4801 uint32_t CommandType;
4802 uint32_t MICommandOpcode;
4803 };
4804
4805 static inline void
4806 GEN7_MI_ARB_CHECK_pack(__gen_user_data *data, void * restrict dst,
4807 const struct GEN7_MI_ARB_CHECK * restrict values)
4808 {
4809 uint32_t *dw = (uint32_t * restrict) dst;
4810
4811 dw[0] =
4812 __gen_field(values->CommandType, 29, 31) |
4813 __gen_field(values->MICommandOpcode, 23, 28) |
4814 0;
4815
4816 }
4817
4818 #define GEN7_MI_ARB_ON_OFF_length 0x00000001
4819 #define GEN7_MI_ARB_ON_OFF_length_bias 0x00000001
4820 #define GEN7_MI_ARB_ON_OFF_header \
4821 .CommandType = 0, \
4822 .MICommandOpcode = 8
4823
4824 struct GEN7_MI_ARB_ON_OFF {
4825 uint32_t CommandType;
4826 uint32_t MICommandOpcode;
4827 uint32_t ArbitrationEnable;
4828 };
4829
4830 static inline void
4831 GEN7_MI_ARB_ON_OFF_pack(__gen_user_data *data, void * restrict dst,
4832 const struct GEN7_MI_ARB_ON_OFF * restrict values)
4833 {
4834 uint32_t *dw = (uint32_t * restrict) dst;
4835
4836 dw[0] =
4837 __gen_field(values->CommandType, 29, 31) |
4838 __gen_field(values->MICommandOpcode, 23, 28) |
4839 __gen_field(values->ArbitrationEnable, 0, 0) |
4840 0;
4841
4842 }
4843
4844 #define GEN7_MI_BATCH_BUFFER_END_length 0x00000001
4845 #define GEN7_MI_BATCH_BUFFER_END_length_bias 0x00000001
4846 #define GEN7_MI_BATCH_BUFFER_END_header \
4847 .CommandType = 0, \
4848 .MICommandOpcode = 10
4849
4850 struct GEN7_MI_BATCH_BUFFER_END {
4851 uint32_t CommandType;
4852 uint32_t MICommandOpcode;
4853 };
4854
4855 static inline void
4856 GEN7_MI_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
4857 const struct GEN7_MI_BATCH_BUFFER_END * restrict values)
4858 {
4859 uint32_t *dw = (uint32_t * restrict) dst;
4860
4861 dw[0] =
4862 __gen_field(values->CommandType, 29, 31) |
4863 __gen_field(values->MICommandOpcode, 23, 28) |
4864 0;
4865
4866 }
4867
4868 #define GEN7_MI_BATCH_BUFFER_START_length 0x00000002
4869 #define GEN7_MI_BATCH_BUFFER_START_length_bias 0x00000002
4870 #define GEN7_MI_BATCH_BUFFER_START_header \
4871 .CommandType = 0, \
4872 .MICommandOpcode = 49, \
4873 .DwordLength = 0
4874
4875 struct GEN7_MI_BATCH_BUFFER_START {
4876 uint32_t CommandType;
4877 uint32_t MICommandOpcode;
4878 uint32_t ClearCommandBufferEnable;
4879 #define ASI_GGTT 0
4880 #define ASI_PPGTT 1
4881 uint32_t AddressSpaceIndicator;
4882 uint32_t DwordLength;
4883 __gen_address_type BatchBufferStartAddress;
4884 };
4885
4886 static inline void
4887 GEN7_MI_BATCH_BUFFER_START_pack(__gen_user_data *data, void * restrict dst,
4888 const struct GEN7_MI_BATCH_BUFFER_START * restrict values)
4889 {
4890 uint32_t *dw = (uint32_t * restrict) dst;
4891
4892 dw[0] =
4893 __gen_field(values->CommandType, 29, 31) |
4894 __gen_field(values->MICommandOpcode, 23, 28) |
4895 __gen_field(values->ClearCommandBufferEnable, 11, 11) |
4896 __gen_field(values->AddressSpaceIndicator, 8, 8) |
4897 __gen_field(values->DwordLength, 0, 7) |
4898 0;
4899
4900 uint32_t dw1 =
4901 0;
4902
4903 dw[1] =
4904 __gen_combine_address(data, &dw[1], values->BatchBufferStartAddress, dw1);
4905
4906 }
4907
4908 #define GEN7_MI_CLFLUSH_length_bias 0x00000002
4909 #define GEN7_MI_CLFLUSH_header \
4910 .CommandType = 0, \
4911 .MICommandOpcode = 39
4912
4913 struct GEN7_MI_CLFLUSH {
4914 uint32_t CommandType;
4915 uint32_t MICommandOpcode;
4916 #define PerProcessGraphicsAddress 0
4917 #define GlobalGraphicsAddress 1
4918 uint32_t UseGlobalGTT;
4919 uint32_t DwordLength;
4920 __gen_address_type PageBaseAddress;
4921 uint32_t StartingCachelineOffset;
4922 __gen_address_type PageBaseAddressHigh;
4923 /* variable length fields follow */
4924 };
4925
4926 static inline void
4927 GEN7_MI_CLFLUSH_pack(__gen_user_data *data, void * restrict dst,
4928 const struct GEN7_MI_CLFLUSH * restrict values)
4929 {
4930 uint32_t *dw = (uint32_t * restrict) dst;
4931
4932 dw[0] =
4933 __gen_field(values->CommandType, 29, 31) |
4934 __gen_field(values->MICommandOpcode, 23, 28) |
4935 __gen_field(values->UseGlobalGTT, 22, 22) |
4936 __gen_field(values->DwordLength, 0, 9) |
4937 0;
4938
4939 uint32_t dw1 =
4940 __gen_field(values->StartingCachelineOffset, 6, 11) |
4941 0;
4942
4943 dw[1] =
4944 __gen_combine_address(data, &dw[1], values->PageBaseAddress, dw1);
4945
4946 uint32_t dw2 =
4947 0;
4948
4949 dw[2] =
4950 __gen_combine_address(data, &dw[2], values->PageBaseAddressHigh, dw2);
4951
4952 /* variable length fields follow */
4953 }
4954
4955 #define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_length 0x00000002
4956 #define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_length_bias 0x00000002
4957 #define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_header\
4958 .CommandType = 0, \
4959 .MICommandOpcode = 54, \
4960 .UseGlobalGTT = 0, \
4961 .CompareSemaphore = 0, \
4962 .DwordLength = 0
4963
4964 struct GEN7_MI_CONDITIONAL_BATCH_BUFFER_END {
4965 uint32_t CommandType;
4966 uint32_t MICommandOpcode;
4967 uint32_t UseGlobalGTT;
4968 uint32_t CompareSemaphore;
4969 uint32_t DwordLength;
4970 uint32_t CompareDataDword;
4971 __gen_address_type CompareAddress;
4972 };
4973
4974 static inline void
4975 GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
4976 const struct GEN7_MI_CONDITIONAL_BATCH_BUFFER_END * restrict values)
4977 {
4978 uint32_t *dw = (uint32_t * restrict) dst;
4979
4980 dw[0] =
4981 __gen_field(values->CommandType, 29, 31) |
4982 __gen_field(values->MICommandOpcode, 23, 28) |
4983 __gen_field(values->UseGlobalGTT, 22, 22) |
4984 __gen_field(values->CompareSemaphore, 21, 21) |
4985 __gen_field(values->DwordLength, 0, 7) |
4986 0;
4987
4988 dw[1] =
4989 __gen_field(values->CompareDataDword, 0, 31) |
4990 0;
4991
4992 uint32_t dw2 =
4993 0;
4994
4995 dw[2] =
4996 __gen_combine_address(data, &dw[2], values->CompareAddress, dw2);
4997
4998 }
4999
5000 #define GEN7_MI_FLUSH_length 0x00000001
5001 #define GEN7_MI_FLUSH_length_bias 0x00000001
5002 #define GEN7_MI_FLUSH_header \
5003 .CommandType = 0, \
5004 .MICommandOpcode = 4
5005
5006 struct GEN7_MI_FLUSH {
5007 uint32_t CommandType;
5008 uint32_t MICommandOpcode;
5009 uint32_t IndirectStatePointersDisable;
5010 uint32_t GenericMediaStateClear;
5011 #define DontReset 0
5012 #define Reset 1
5013 uint32_t GlobalSnapshotCountReset;
5014 #define Flush 0
5015 #define DontFlush 1
5016 uint32_t RenderCacheFlushInhibit;
5017 #define DontInvalidate 0
5018 #define Invalidate 1
5019 uint32_t StateInstructionCacheInvalidate;
5020 };
5021
5022 static inline void
5023 GEN7_MI_FLUSH_pack(__gen_user_data *data, void * restrict dst,
5024 const struct GEN7_MI_FLUSH * restrict values)
5025 {
5026 uint32_t *dw = (uint32_t * restrict) dst;
5027
5028 dw[0] =
5029 __gen_field(values->CommandType, 29, 31) |
5030 __gen_field(values->MICommandOpcode, 23, 28) |
5031 __gen_field(values->IndirectStatePointersDisable, 5, 5) |
5032 __gen_field(values->GenericMediaStateClear, 4, 4) |
5033 __gen_field(values->GlobalSnapshotCountReset, 3, 3) |
5034 __gen_field(values->RenderCacheFlushInhibit, 2, 2) |
5035 __gen_field(values->StateInstructionCacheInvalidate, 1, 1) |
5036 0;
5037
5038 }
5039
5040 #define GEN7_MI_LOAD_REGISTER_IMM_length 0x00000003
5041 #define GEN7_MI_LOAD_REGISTER_IMM_length_bias 0x00000002
5042 #define GEN7_MI_LOAD_REGISTER_IMM_header \
5043 .CommandType = 0, \
5044 .MICommandOpcode = 34, \
5045 .DwordLength = 1
5046
5047 struct GEN7_MI_LOAD_REGISTER_IMM {
5048 uint32_t CommandType;
5049 uint32_t MICommandOpcode;
5050 uint32_t ByteWriteDisables;
5051 uint32_t DwordLength;
5052 uint32_t RegisterOffset;
5053 uint32_t DataDWord;
5054 };
5055
5056 static inline void
5057 GEN7_MI_LOAD_REGISTER_IMM_pack(__gen_user_data *data, void * restrict dst,
5058 const struct GEN7_MI_LOAD_REGISTER_IMM * restrict values)
5059 {
5060 uint32_t *dw = (uint32_t * restrict) dst;
5061
5062 dw[0] =
5063 __gen_field(values->CommandType, 29, 31) |
5064 __gen_field(values->MICommandOpcode, 23, 28) |
5065 __gen_field(values->ByteWriteDisables, 8, 11) |
5066 __gen_field(values->DwordLength, 0, 7) |
5067 0;
5068
5069 dw[1] =
5070 __gen_offset(values->RegisterOffset, 2, 22) |
5071 0;
5072
5073 dw[2] =
5074 __gen_field(values->DataDWord, 0, 31) |
5075 0;
5076
5077 }
5078
5079 #define GEN7_MI_LOAD_REGISTER_MEM_length 0x00000003
5080 #define GEN7_MI_LOAD_REGISTER_MEM_length_bias 0x00000002
5081 #define GEN7_MI_LOAD_REGISTER_MEM_header \
5082 .CommandType = 0, \
5083 .MICommandOpcode = 41, \
5084 .DwordLength = 1
5085
5086 struct GEN7_MI_LOAD_REGISTER_MEM {
5087 uint32_t CommandType;
5088 uint32_t MICommandOpcode;
5089 uint32_t UseGlobalGTT;
5090 uint32_t AsyncModeEnable;
5091 uint32_t DwordLength;
5092 uint32_t RegisterAddress;
5093 __gen_address_type MemoryAddress;
5094 };
5095
5096 static inline void
5097 GEN7_MI_LOAD_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
5098 const struct GEN7_MI_LOAD_REGISTER_MEM * restrict values)
5099 {
5100 uint32_t *dw = (uint32_t * restrict) dst;
5101
5102 dw[0] =
5103 __gen_field(values->CommandType, 29, 31) |
5104 __gen_field(values->MICommandOpcode, 23, 28) |
5105 __gen_field(values->UseGlobalGTT, 22, 22) |
5106 __gen_field(values->AsyncModeEnable, 21, 21) |
5107 __gen_field(values->DwordLength, 0, 7) |
5108 0;
5109
5110 dw[1] =
5111 __gen_offset(values->RegisterAddress, 2, 22) |
5112 0;
5113
5114 uint32_t dw2 =
5115 0;
5116
5117 dw[2] =
5118 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
5119
5120 }
5121
5122 #define GEN7_MI_NOOP_length 0x00000001
5123 #define GEN7_MI_NOOP_length_bias 0x00000001
5124 #define GEN7_MI_NOOP_header \
5125 .CommandType = 0, \
5126 .MICommandOpcode = 0
5127
5128 struct GEN7_MI_NOOP {
5129 uint32_t CommandType;
5130 uint32_t MICommandOpcode;
5131 uint32_t IdentificationNumberRegisterWriteEnable;
5132 uint32_t IdentificationNumber;
5133 };
5134
5135 static inline void
5136 GEN7_MI_NOOP_pack(__gen_user_data *data, void * restrict dst,
5137 const struct GEN7_MI_NOOP * restrict values)
5138 {
5139 uint32_t *dw = (uint32_t * restrict) dst;
5140
5141 dw[0] =
5142 __gen_field(values->CommandType, 29, 31) |
5143 __gen_field(values->MICommandOpcode, 23, 28) |
5144 __gen_field(values->IdentificationNumberRegisterWriteEnable, 22, 22) |
5145 __gen_field(values->IdentificationNumber, 0, 21) |
5146 0;
5147
5148 }
5149
5150 #define GEN7_MI_PREDICATE_length 0x00000001
5151 #define GEN7_MI_PREDICATE_length_bias 0x00000001
5152 #define GEN7_MI_PREDICATE_header \
5153 .CommandType = 0, \
5154 .MICommandOpcode = 12
5155
5156 struct GEN7_MI_PREDICATE {
5157 uint32_t CommandType;
5158 uint32_t MICommandOpcode;
5159 #define KEEP 0
5160 #define LOAD 2
5161 #define LOADINV 3
5162 uint32_t LoadOperation;
5163 #define COMBINE_SET 0
5164 #define COMBINE_AND 1
5165 #define COMBINE_OR 2
5166 #define COMBINE_XOR 3
5167 uint32_t CombineOperation;
5168 #define COMPARE_SRCS_EQUAL 2
5169 #define COMPARE_DELTAS_EQUAL 3
5170 uint32_t CompareOperation;
5171 };
5172
5173 static inline void
5174 GEN7_MI_PREDICATE_pack(__gen_user_data *data, void * restrict dst,
5175 const struct GEN7_MI_PREDICATE * restrict values)
5176 {
5177 uint32_t *dw = (uint32_t * restrict) dst;
5178
5179 dw[0] =
5180 __gen_field(values->CommandType, 29, 31) |
5181 __gen_field(values->MICommandOpcode, 23, 28) |
5182 __gen_field(values->LoadOperation, 6, 7) |
5183 __gen_field(values->CombineOperation, 3, 4) |
5184 __gen_field(values->CompareOperation, 0, 1) |
5185 0;
5186
5187 }
5188
5189 #define GEN7_MI_REPORT_HEAD_length 0x00000001
5190 #define GEN7_MI_REPORT_HEAD_length_bias 0x00000001
5191 #define GEN7_MI_REPORT_HEAD_header \
5192 .CommandType = 0, \
5193 .MICommandOpcode = 7
5194
5195 struct GEN7_MI_REPORT_HEAD {
5196 uint32_t CommandType;
5197 uint32_t MICommandOpcode;
5198 };
5199
5200 static inline void
5201 GEN7_MI_REPORT_HEAD_pack(__gen_user_data *data, void * restrict dst,
5202 const struct GEN7_MI_REPORT_HEAD * restrict values)
5203 {
5204 uint32_t *dw = (uint32_t * restrict) dst;
5205
5206 dw[0] =
5207 __gen_field(values->CommandType, 29, 31) |
5208 __gen_field(values->MICommandOpcode, 23, 28) |
5209 0;
5210
5211 }
5212
5213 #define GEN7_MI_SEMAPHORE_MBOX_length 0x00000003
5214 #define GEN7_MI_SEMAPHORE_MBOX_length_bias 0x00000002
5215 #define GEN7_MI_SEMAPHORE_MBOX_header \
5216 .CommandType = 0, \
5217 .MICommandOpcode = 22, \
5218 .DwordLength = 1
5219
5220 struct GEN7_MI_SEMAPHORE_MBOX {
5221 uint32_t CommandType;
5222 uint32_t MICommandOpcode;
5223 #define RVSYNC 0
5224 #define RBSYNC 2
5225 #define UseGeneralRegisterSelect 3
5226 uint32_t RegisterSelect;
5227 uint32_t DwordLength;
5228 uint32_t SemaphoreDataDword;
5229 };
5230
5231 static inline void
5232 GEN7_MI_SEMAPHORE_MBOX_pack(__gen_user_data *data, void * restrict dst,
5233 const struct GEN7_MI_SEMAPHORE_MBOX * restrict values)
5234 {
5235 uint32_t *dw = (uint32_t * restrict) dst;
5236
5237 dw[0] =
5238 __gen_field(values->CommandType, 29, 31) |
5239 __gen_field(values->MICommandOpcode, 23, 28) |
5240 __gen_field(values->RegisterSelect, 16, 17) |
5241 __gen_field(values->DwordLength, 0, 7) |
5242 0;
5243
5244 dw[1] =
5245 __gen_field(values->SemaphoreDataDword, 0, 31) |
5246 0;
5247
5248 dw[2] =
5249 0;
5250
5251 }
5252
5253 #define GEN7_MI_SET_CONTEXT_length 0x00000002
5254 #define GEN7_MI_SET_CONTEXT_length_bias 0x00000002
5255 #define GEN7_MI_SET_CONTEXT_header \
5256 .CommandType = 0, \
5257 .MICommandOpcode = 24, \
5258 .DwordLength = 0
5259
5260 struct GEN7_MI_SET_CONTEXT {
5261 uint32_t CommandType;
5262 uint32_t MICommandOpcode;
5263 uint32_t DwordLength;
5264 __gen_address_type LogicalContextAddress;
5265 uint32_t ReservedMustbe1;
5266 uint32_t ExtendedStateSaveEnable;
5267 uint32_t ExtendedStateRestoreEnable;
5268 uint32_t ForceRestore;
5269 uint32_t RestoreInhibit;
5270 };
5271
5272 static inline void
5273 GEN7_MI_SET_CONTEXT_pack(__gen_user_data *data, void * restrict dst,
5274 const struct GEN7_MI_SET_CONTEXT * restrict values)
5275 {
5276 uint32_t *dw = (uint32_t * restrict) dst;
5277
5278 dw[0] =
5279 __gen_field(values->CommandType, 29, 31) |
5280 __gen_field(values->MICommandOpcode, 23, 28) |
5281 __gen_field(values->DwordLength, 0, 7) |
5282 0;
5283
5284 uint32_t dw1 =
5285 __gen_field(values->ReservedMustbe1, 8, 8) |
5286 __gen_field(values->ExtendedStateSaveEnable, 3, 3) |
5287 __gen_field(values->ExtendedStateRestoreEnable, 2, 2) |
5288 __gen_field(values->ForceRestore, 1, 1) |
5289 __gen_field(values->RestoreInhibit, 0, 0) |
5290 0;
5291
5292 dw[1] =
5293 __gen_combine_address(data, &dw[1], values->LogicalContextAddress, dw1);
5294
5295 }
5296
5297 #define GEN7_MI_STORE_DATA_IMM_length 0x00000004
5298 #define GEN7_MI_STORE_DATA_IMM_length_bias 0x00000002
5299 #define GEN7_MI_STORE_DATA_IMM_header \
5300 .CommandType = 0, \
5301 .MICommandOpcode = 32, \
5302 .DwordLength = 2
5303
5304 struct GEN7_MI_STORE_DATA_IMM {
5305 uint32_t CommandType;
5306 uint32_t MICommandOpcode;
5307 uint32_t UseGlobalGTT;
5308 uint32_t DwordLength;
5309 uint32_t Address;
5310 uint32_t CoreModeEnable;
5311 uint32_t DataDWord0;
5312 uint32_t DataDWord1;
5313 };
5314
5315 static inline void
5316 GEN7_MI_STORE_DATA_IMM_pack(__gen_user_data *data, void * restrict dst,
5317 const struct GEN7_MI_STORE_DATA_IMM * restrict values)
5318 {
5319 uint32_t *dw = (uint32_t * restrict) dst;
5320
5321 dw[0] =
5322 __gen_field(values->CommandType, 29, 31) |
5323 __gen_field(values->MICommandOpcode, 23, 28) |
5324 __gen_field(values->UseGlobalGTT, 22, 22) |
5325 __gen_field(values->DwordLength, 0, 5) |
5326 0;
5327
5328 dw[1] =
5329 0;
5330
5331 dw[2] =
5332 __gen_field(values->Address, 2, 31) |
5333 __gen_field(values->CoreModeEnable, 0, 0) |
5334 0;
5335
5336 dw[3] =
5337 __gen_field(values->DataDWord0, 0, 31) |
5338 0;
5339
5340 dw[4] =
5341 __gen_field(values->DataDWord1, 0, 31) |
5342 0;
5343
5344 }
5345
5346 #define GEN7_MI_STORE_DATA_INDEX_length 0x00000003
5347 #define GEN7_MI_STORE_DATA_INDEX_length_bias 0x00000002
5348 #define GEN7_MI_STORE_DATA_INDEX_header \
5349 .CommandType = 0, \
5350 .MICommandOpcode = 33, \
5351 .DwordLength = 1
5352
5353 struct GEN7_MI_STORE_DATA_INDEX {
5354 uint32_t CommandType;
5355 uint32_t MICommandOpcode;
5356 uint32_t DwordLength;
5357 uint32_t Offset;
5358 uint32_t DataDWord0;
5359 uint32_t DataDWord1;
5360 };
5361
5362 static inline void
5363 GEN7_MI_STORE_DATA_INDEX_pack(__gen_user_data *data, void * restrict dst,
5364 const struct GEN7_MI_STORE_DATA_INDEX * restrict values)
5365 {
5366 uint32_t *dw = (uint32_t * restrict) dst;
5367
5368 dw[0] =
5369 __gen_field(values->CommandType, 29, 31) |
5370 __gen_field(values->MICommandOpcode, 23, 28) |
5371 __gen_field(values->DwordLength, 0, 7) |
5372 0;
5373
5374 dw[1] =
5375 __gen_field(values->Offset, 2, 11) |
5376 0;
5377
5378 dw[2] =
5379 __gen_field(values->DataDWord0, 0, 31) |
5380 0;
5381
5382 dw[3] =
5383 __gen_field(values->DataDWord1, 0, 31) |
5384 0;
5385
5386 }
5387
5388 #define GEN7_MI_SUSPEND_FLUSH_length 0x00000001
5389 #define GEN7_MI_SUSPEND_FLUSH_length_bias 0x00000001
5390 #define GEN7_MI_SUSPEND_FLUSH_header \
5391 .CommandType = 0, \
5392 .MICommandOpcode = 11
5393
5394 struct GEN7_MI_SUSPEND_FLUSH {
5395 uint32_t CommandType;
5396 uint32_t MICommandOpcode;
5397 uint32_t SuspendFlush;
5398 };
5399
5400 static inline void
5401 GEN7_MI_SUSPEND_FLUSH_pack(__gen_user_data *data, void * restrict dst,
5402 const struct GEN7_MI_SUSPEND_FLUSH * restrict values)
5403 {
5404 uint32_t *dw = (uint32_t * restrict) dst;
5405
5406 dw[0] =
5407 __gen_field(values->CommandType, 29, 31) |
5408 __gen_field(values->MICommandOpcode, 23, 28) |
5409 __gen_field(values->SuspendFlush, 0, 0) |
5410 0;
5411
5412 }
5413
5414 #define GEN7_MI_TOPOLOGY_FILTER_length 0x00000001
5415 #define GEN7_MI_TOPOLOGY_FILTER_length_bias 0x00000001
5416 #define GEN7_MI_TOPOLOGY_FILTER_header \
5417 .CommandType = 0, \
5418 .MICommandOpcode = 13
5419
5420 struct GEN7_MI_TOPOLOGY_FILTER {
5421 uint32_t CommandType;
5422 uint32_t MICommandOpcode;
5423 uint32_t TopologyFilterValue;
5424 };
5425
5426 static inline void
5427 GEN7_MI_TOPOLOGY_FILTER_pack(__gen_user_data *data, void * restrict dst,
5428 const struct GEN7_MI_TOPOLOGY_FILTER * restrict values)
5429 {
5430 uint32_t *dw = (uint32_t * restrict) dst;
5431
5432 dw[0] =
5433 __gen_field(values->CommandType, 29, 31) |
5434 __gen_field(values->MICommandOpcode, 23, 28) |
5435 __gen_field(values->TopologyFilterValue, 0, 5) |
5436 0;
5437
5438 }
5439
5440 #define GEN7_MI_UPDATE_GTT_length_bias 0x00000002
5441 #define GEN7_MI_UPDATE_GTT_header \
5442 .CommandType = 0, \
5443 .MICommandOpcode = 35
5444
5445 struct GEN7_MI_UPDATE_GTT {
5446 uint32_t CommandType;
5447 uint32_t MICommandOpcode;
5448 #define PerProcessGraphicsAddress 0
5449 #define GlobalGraphicsAddress 1
5450 uint32_t UseGlobalGTT;
5451 uint32_t DwordLength;
5452 __gen_address_type EntryAddress;
5453 /* variable length fields follow */
5454 };
5455
5456 static inline void
5457 GEN7_MI_UPDATE_GTT_pack(__gen_user_data *data, void * restrict dst,
5458 const struct GEN7_MI_UPDATE_GTT * restrict values)
5459 {
5460 uint32_t *dw = (uint32_t * restrict) dst;
5461
5462 dw[0] =
5463 __gen_field(values->CommandType, 29, 31) |
5464 __gen_field(values->MICommandOpcode, 23, 28) |
5465 __gen_field(values->UseGlobalGTT, 22, 22) |
5466 __gen_field(values->DwordLength, 0, 7) |
5467 0;
5468
5469 uint32_t dw1 =
5470 0;
5471
5472 dw[1] =
5473 __gen_combine_address(data, &dw[1], values->EntryAddress, dw1);
5474
5475 /* variable length fields follow */
5476 }
5477
5478 #define GEN7_MI_URB_CLEAR_length 0x00000002
5479 #define GEN7_MI_URB_CLEAR_length_bias 0x00000002
5480 #define GEN7_MI_URB_CLEAR_header \
5481 .CommandType = 0, \
5482 .MICommandOpcode = 25, \
5483 .DwordLength = 0
5484
5485 struct GEN7_MI_URB_CLEAR {
5486 uint32_t CommandType;
5487 uint32_t MICommandOpcode;
5488 uint32_t DwordLength;
5489 uint32_t URBClearLength;
5490 uint32_t URBAddress;
5491 };
5492
5493 static inline void
5494 GEN7_MI_URB_CLEAR_pack(__gen_user_data *data, void * restrict dst,
5495 const struct GEN7_MI_URB_CLEAR * restrict values)
5496 {
5497 uint32_t *dw = (uint32_t * restrict) dst;
5498
5499 dw[0] =
5500 __gen_field(values->CommandType, 29, 31) |
5501 __gen_field(values->MICommandOpcode, 23, 28) |
5502 __gen_field(values->DwordLength, 0, 7) |
5503 0;
5504
5505 dw[1] =
5506 __gen_field(values->URBClearLength, 16, 28) |
5507 __gen_offset(values->URBAddress, 0, 13) |
5508 0;
5509
5510 }
5511
5512 #define GEN7_MI_USER_INTERRUPT_length 0x00000001
5513 #define GEN7_MI_USER_INTERRUPT_length_bias 0x00000001
5514 #define GEN7_MI_USER_INTERRUPT_header \
5515 .CommandType = 0, \
5516 .MICommandOpcode = 2
5517
5518 struct GEN7_MI_USER_INTERRUPT {
5519 uint32_t CommandType;
5520 uint32_t MICommandOpcode;
5521 };
5522
5523 static inline void
5524 GEN7_MI_USER_INTERRUPT_pack(__gen_user_data *data, void * restrict dst,
5525 const struct GEN7_MI_USER_INTERRUPT * restrict values)
5526 {
5527 uint32_t *dw = (uint32_t * restrict) dst;
5528
5529 dw[0] =
5530 __gen_field(values->CommandType, 29, 31) |
5531 __gen_field(values->MICommandOpcode, 23, 28) |
5532 0;
5533
5534 }
5535
5536 #define GEN7_MI_WAIT_FOR_EVENT_length 0x00000001
5537 #define GEN7_MI_WAIT_FOR_EVENT_length_bias 0x00000001
5538 #define GEN7_MI_WAIT_FOR_EVENT_header \
5539 .CommandType = 0, \
5540 .MICommandOpcode = 3
5541
5542 struct GEN7_MI_WAIT_FOR_EVENT {
5543 uint32_t CommandType;
5544 uint32_t MICommandOpcode;
5545 uint32_t DisplayPipeCHorizontalBlankWaitEnable;
5546 uint32_t DisplayPipeCVerticalBlankWaitEnable;
5547 uint32_t DisplaySpriteCFlipPendingWaitEnable;
5548 #define Notenabled 0
5549 uint32_t ConditionCodeWaitSelect;
5550 uint32_t DisplayPlaneCFlipPendingWaitEnable;
5551 uint32_t DisplayPipeCScanLineWaitEnable;
5552 uint32_t DisplayPipeBHorizontalBlankWaitEnable;
5553 uint32_t DisplayPipeBVerticalBlankWaitEnable;
5554 uint32_t DisplaySpriteBFlipPendingWaitEnable;
5555 uint32_t DisplayPlaneBFlipPendingWaitEnable;
5556 uint32_t DisplayPipeBScanLineWaitEnable;
5557 uint32_t DisplayPipeAHorizontalBlankWaitEnable;
5558 uint32_t DisplayPipeAVerticalBlankWaitEnable;
5559 uint32_t DisplaySpriteAFlipPendingWaitEnable;
5560 uint32_t DisplayPlaneAFlipPendingWaitEnable;
5561 uint32_t DisplayPipeAScanLineWaitEnable;
5562 };
5563
5564 static inline void
5565 GEN7_MI_WAIT_FOR_EVENT_pack(__gen_user_data *data, void * restrict dst,
5566 const struct GEN7_MI_WAIT_FOR_EVENT * restrict values)
5567 {
5568 uint32_t *dw = (uint32_t * restrict) dst;
5569
5570 dw[0] =
5571 __gen_field(values->CommandType, 29, 31) |
5572 __gen_field(values->MICommandOpcode, 23, 28) |
5573 __gen_field(values->DisplayPipeCHorizontalBlankWaitEnable, 22, 22) |
5574 __gen_field(values->DisplayPipeCVerticalBlankWaitEnable, 21, 21) |
5575 __gen_field(values->DisplaySpriteCFlipPendingWaitEnable, 20, 20) |
5576 __gen_field(values->ConditionCodeWaitSelect, 16, 19) |
5577 __gen_field(values->DisplayPlaneCFlipPendingWaitEnable, 15, 15) |
5578 __gen_field(values->DisplayPipeCScanLineWaitEnable, 14, 14) |
5579 __gen_field(values->DisplayPipeBHorizontalBlankWaitEnable, 13, 13) |
5580 __gen_field(values->DisplayPipeBVerticalBlankWaitEnable, 11, 11) |
5581 __gen_field(values->DisplaySpriteBFlipPendingWaitEnable, 10, 10) |
5582 __gen_field(values->DisplayPlaneBFlipPendingWaitEnable, 9, 9) |
5583 __gen_field(values->DisplayPipeBScanLineWaitEnable, 8, 8) |
5584 __gen_field(values->DisplayPipeAHorizontalBlankWaitEnable, 5, 5) |
5585 __gen_field(values->DisplayPipeAVerticalBlankWaitEnable, 3, 3) |
5586 __gen_field(values->DisplaySpriteAFlipPendingWaitEnable, 2, 2) |
5587 __gen_field(values->DisplayPlaneAFlipPendingWaitEnable, 1, 1) |
5588 __gen_field(values->DisplayPipeAScanLineWaitEnable, 0, 0) |
5589 0;
5590
5591 }
5592
5593 #define GEN7_PIPE_CONTROL_length 0x00000005
5594 #define GEN7_PIPE_CONTROL_length_bias 0x00000002
5595 #define GEN7_PIPE_CONTROL_header \
5596 .CommandType = 3, \
5597 .CommandSubType = 3, \
5598 ._3DCommandOpcode = 2, \
5599 ._3DCommandSubOpcode = 0, \
5600 .DwordLength = 3
5601
5602 struct GEN7_PIPE_CONTROL {
5603 uint32_t CommandType;
5604 uint32_t CommandSubType;
5605 uint32_t _3DCommandOpcode;
5606 uint32_t _3DCommandSubOpcode;
5607 uint32_t DwordLength;
5608 #define DAT_PPGTT 0
5609 #define DAT_GGTT 1
5610 uint32_t DestinationAddressType;
5611 #define NoLRIOperation 0
5612 #define MMIOWriteImmediateData 1
5613 uint32_t LRIPostSyncOperation;
5614 uint32_t StoreDataIndex;
5615 uint32_t CommandStreamerStallEnable;
5616 #define DontReset 0
5617 #define Reset 1
5618 uint32_t GlobalSnapshotCountReset;
5619 uint32_t TLBInvalidate;
5620 uint32_t GenericMediaStateClear;
5621 #define NoWrite 0
5622 #define WriteImmediateData 1
5623 #define WritePSDepthCount 2
5624 #define WriteTimestamp 3
5625 uint32_t PostSyncOperation;
5626 uint32_t DepthStallEnable;
5627 #define DisableFlush 0
5628 #define EnableFlush 1
5629 uint32_t RenderTargetCacheFlushEnable;
5630 uint32_t InstructionCacheInvalidateEnable;
5631 uint32_t TextureCacheInvalidationEnable;
5632 uint32_t IndirectStatePointersDisable;
5633 uint32_t NotifyEnable;
5634 uint32_t PipeControlFlushEnable;
5635 uint32_t DCFlushEnable;
5636 uint32_t VFCacheInvalidationEnable;
5637 uint32_t ConstantCacheInvalidationEnable;
5638 uint32_t StateCacheInvalidationEnable;
5639 uint32_t StallAtPixelScoreboard;
5640 #define FlushDisabled 0
5641 #define FlushEnabled 1
5642 uint32_t DepthCacheFlushEnable;
5643 __gen_address_type Address;
5644 uint32_t ImmediateData;
5645 uint32_t ImmediateData0;
5646 };
5647
5648 static inline void
5649 GEN7_PIPE_CONTROL_pack(__gen_user_data *data, void * restrict dst,
5650 const struct GEN7_PIPE_CONTROL * restrict values)
5651 {
5652 uint32_t *dw = (uint32_t * restrict) dst;
5653
5654 dw[0] =
5655 __gen_field(values->CommandType, 29, 31) |
5656 __gen_field(values->CommandSubType, 27, 28) |
5657 __gen_field(values->_3DCommandOpcode, 24, 26) |
5658 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5659 __gen_field(values->DwordLength, 0, 7) |
5660 0;
5661
5662 dw[1] =
5663 __gen_field(values->DestinationAddressType, 24, 24) |
5664 __gen_field(values->LRIPostSyncOperation, 23, 23) |
5665 __gen_field(values->StoreDataIndex, 21, 21) |
5666 __gen_field(values->CommandStreamerStallEnable, 20, 20) |
5667 __gen_field(values->GlobalSnapshotCountReset, 19, 19) |
5668 __gen_field(values->TLBInvalidate, 18, 18) |
5669 __gen_field(values->GenericMediaStateClear, 16, 16) |
5670 __gen_field(values->PostSyncOperation, 14, 15) |
5671 __gen_field(values->DepthStallEnable, 13, 13) |
5672 __gen_field(values->RenderTargetCacheFlushEnable, 12, 12) |
5673 __gen_field(values->InstructionCacheInvalidateEnable, 11, 11) |
5674 __gen_field(values->TextureCacheInvalidationEnable, 10, 10) |
5675 __gen_field(values->IndirectStatePointersDisable, 9, 9) |
5676 __gen_field(values->NotifyEnable, 8, 8) |
5677 __gen_field(values->PipeControlFlushEnable, 7, 7) |
5678 __gen_field(values->DCFlushEnable, 5, 5) |
5679 __gen_field(values->VFCacheInvalidationEnable, 4, 4) |
5680 __gen_field(values->ConstantCacheInvalidationEnable, 3, 3) |
5681 __gen_field(values->StateCacheInvalidationEnable, 2, 2) |
5682 __gen_field(values->StallAtPixelScoreboard, 1, 1) |
5683 __gen_field(values->DepthCacheFlushEnable, 0, 0) |
5684 0;
5685
5686 uint32_t dw2 =
5687 0;
5688
5689 dw[2] =
5690 __gen_combine_address(data, &dw[2], values->Address, dw2);
5691
5692 dw[3] =
5693 __gen_field(values->ImmediateData, 0, 31) |
5694 0;
5695
5696 dw[4] =
5697 __gen_field(values->ImmediateData, 0, 31) |
5698 0;
5699
5700 }
5701
5702 #define GEN7_3DSTATE_CONSTANT_BODY_length 0x00000006
5703
5704 #define GEN7_VERTEX_BUFFER_STATE_length 0x00000004
5705
5706 #define GEN7_VERTEX_ELEMENT_STATE_length 0x00000002
5707
5708 #define GEN7_SO_DECL_ENTRY_length 0x00000002
5709
5710 #define GEN7_SO_DECL_length 0x00000001
5711
5712 #define GEN7_SCISSOR_RECT_length 0x00000002
5713
5714 struct GEN7_SCISSOR_RECT {
5715 uint32_t ScissorRectangleYMin;
5716 uint32_t ScissorRectangleXMin;
5717 uint32_t ScissorRectangleYMax;
5718 uint32_t ScissorRectangleXMax;
5719 };
5720
5721 static inline void
5722 GEN7_SCISSOR_RECT_pack(__gen_user_data *data, void * restrict dst,
5723 const struct GEN7_SCISSOR_RECT * restrict values)
5724 {
5725 uint32_t *dw = (uint32_t * restrict) dst;
5726
5727 dw[0] =
5728 __gen_field(values->ScissorRectangleYMin, 16, 31) |
5729 __gen_field(values->ScissorRectangleXMin, 0, 15) |
5730 0;
5731
5732 dw[1] =
5733 __gen_field(values->ScissorRectangleYMax, 16, 31) |
5734 __gen_field(values->ScissorRectangleXMax, 0, 15) |
5735 0;
5736
5737 }
5738
5739 #define GEN7_SF_CLIP_VIEWPORT_length 0x00000010
5740
5741 struct GEN7_SF_CLIP_VIEWPORT {
5742 float ViewportMatrixElementm00;
5743 float ViewportMatrixElementm11;
5744 float ViewportMatrixElementm22;
5745 float ViewportMatrixElementm30;
5746 float ViewportMatrixElementm31;
5747 float ViewportMatrixElementm32;
5748 float XMinClipGuardband;
5749 float XMaxClipGuardband;
5750 float YMinClipGuardband;
5751 float YMaxClipGuardband;
5752 };
5753
5754 static inline void
5755 GEN7_SF_CLIP_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
5756 const struct GEN7_SF_CLIP_VIEWPORT * restrict values)
5757 {
5758 uint32_t *dw = (uint32_t * restrict) dst;
5759
5760 dw[0] =
5761 __gen_float(values->ViewportMatrixElementm00) |
5762 0;
5763
5764 dw[1] =
5765 __gen_float(values->ViewportMatrixElementm11) |
5766 0;
5767
5768 dw[2] =
5769 __gen_float(values->ViewportMatrixElementm22) |
5770 0;
5771
5772 dw[3] =
5773 __gen_float(values->ViewportMatrixElementm30) |
5774 0;
5775
5776 dw[4] =
5777 __gen_float(values->ViewportMatrixElementm31) |
5778 0;
5779
5780 dw[5] =
5781 __gen_float(values->ViewportMatrixElementm32) |
5782 0;
5783
5784 dw[6] =
5785 0;
5786
5787 dw[7] =
5788 0;
5789
5790 dw[8] =
5791 __gen_float(values->XMinClipGuardband) |
5792 0;
5793
5794 dw[9] =
5795 __gen_float(values->XMaxClipGuardband) |
5796 0;
5797
5798 dw[10] =
5799 __gen_float(values->YMinClipGuardband) |
5800 0;
5801
5802 dw[11] =
5803 __gen_float(values->YMaxClipGuardband) |
5804 0;
5805
5806 dw[12] =
5807 0;
5808
5809 }
5810
5811 #define GEN7_BLEND_STATE_length 0x00000002
5812
5813 struct GEN7_BLEND_STATE {
5814 uint32_t ColorBufferBlendEnable;
5815 uint32_t IndependentAlphaBlendEnable;
5816 #define BLENDFUNCTION_ADD 0
5817 #define BLENDFUNCTION_SUBTRACT 1
5818 #define BLENDFUNCTION_REVERSE_SUBTRACT 2
5819 #define BLENDFUNCTION_MIN 3
5820 #define BLENDFUNCTION_MAX 4
5821 uint32_t AlphaBlendFunction;
5822 #define BLENDFACTOR_ONE 1
5823 #define BLENDFACTOR_SRC_COLOR 2
5824 #define BLENDFACTOR_SRC_ALPHA 3
5825 #define BLENDFACTOR_DST_ALPHA 4
5826 #define BLENDFACTOR_DST_COLOR 5
5827 #define BLENDFACTOR_SRC_ALPHA_SATURATE 6
5828 #define BLENDFACTOR_CONST_COLOR 7
5829 #define BLENDFACTOR_CONST_ALPHA 8
5830 #define BLENDFACTOR_SRC1_COLOR 9
5831 #define BLENDFACTOR_SRC1_ALPHA 10
5832 #define BLENDFACTOR_ZERO 17
5833 #define BLENDFACTOR_INV_SRC_COLOR 18
5834 #define BLENDFACTOR_INV_SRC_ALPHA 19
5835 #define BLENDFACTOR_INV_DST_ALPHA 20
5836 #define BLENDFACTOR_INV_DST_COLOR 21
5837 #define BLENDFACTOR_INV_CONST_COLOR 23
5838 #define BLENDFACTOR_INV_CONST_ALPHA 24
5839 #define BLENDFACTOR_INV_SRC1_COLOR 25
5840 #define BLENDFACTOR_INV_SRC1_ALPHA 26
5841 uint32_t SourceAlphaBlendFactor;
5842 uint32_t DestinationAlphaBlendFactor;
5843 #define BLENDFUNCTION_ADD 0
5844 #define BLENDFUNCTION_SUBTRACT 1
5845 #define BLENDFUNCTION_REVERSE_SUBTRACT 2
5846 #define BLENDFUNCTION_MIN 3
5847 #define BLENDFUNCTION_MAX 4
5848 uint32_t ColorBlendFunction;
5849 uint32_t SourceBlendFactor;
5850 uint32_t DestinationBlendFactor;
5851 uint32_t AlphaToCoverageEnable;
5852 uint32_t AlphaToOneEnable;
5853 uint32_t AlphaToCoverageDitherEnable;
5854 uint32_t WriteDisableAlpha;
5855 uint32_t WriteDisableRed;
5856 uint32_t WriteDisableGreen;
5857 uint32_t WriteDisableBlue;
5858 uint32_t LogicOpEnable;
5859 #define LOGICOP_CLEAR 0
5860 #define LOGICOP_NOR 1
5861 #define LOGICOP_AND_INVERTED 2
5862 #define LOGICOP_COPY_INVERTED 3
5863 #define LOGICOP_AND_REVERSE 4
5864 #define LOGICOP_INVERT 5
5865 #define LOGICOP_XOR 6
5866 #define LOGICOP_NAND 7
5867 #define LOGICOP_AND 8
5868 #define LOGICOP_EQUIV 9
5869 #define LOGICOP_NOOP 10
5870 #define LOGICOP_OR_INVERTED 11
5871 #define LOGICOP_COPY 12
5872 #define LOGICOP_OR_REVERSE 13
5873 #define LOGICOP_OR 14
5874 #define LOGICOP_SET 15
5875 uint32_t LogicOpFunction;
5876 uint32_t AlphaTestEnable;
5877 #define COMPAREFUNCTION_ALWAYS 0
5878 #define COMPAREFUNCTION_NEVER 1
5879 #define COMPAREFUNCTION_LESS 2
5880 #define COMPAREFUNCTION_EQUAL 3
5881 #define COMPAREFUNCTION_LEQUAL 4
5882 #define COMPAREFUNCTION_GREATER 5
5883 #define COMPAREFUNCTION_NOTEQUAL 6
5884 #define COMPAREFUNCTION_GEQUAL 7
5885 uint32_t AlphaTestFunction;
5886 uint32_t ColorDitherEnable;
5887 uint32_t XDitherOffset;
5888 uint32_t YDitherOffset;
5889 #define COLORCLAMP_UNORM 0
5890 #define COLORCLAMP_SNORM 1
5891 #define COLORCLAMP_RTFORMAT 2
5892 uint32_t ColorClampRange;
5893 uint32_t PreBlendColorClampEnable;
5894 uint32_t PostBlendColorClampEnable;
5895 };
5896
5897 static inline void
5898 GEN7_BLEND_STATE_pack(__gen_user_data *data, void * restrict dst,
5899 const struct GEN7_BLEND_STATE * restrict values)
5900 {
5901 uint32_t *dw = (uint32_t * restrict) dst;
5902
5903 dw[0] =
5904 __gen_field(values->ColorBufferBlendEnable, 31, 31) |
5905 __gen_field(values->IndependentAlphaBlendEnable, 30, 30) |
5906 __gen_field(values->AlphaBlendFunction, 26, 28) |
5907 __gen_field(values->SourceAlphaBlendFactor, 20, 24) |
5908 __gen_field(values->DestinationAlphaBlendFactor, 15, 19) |
5909 __gen_field(values->ColorBlendFunction, 11, 13) |
5910 __gen_field(values->SourceBlendFactor, 5, 9) |
5911 __gen_field(values->DestinationBlendFactor, 0, 4) |
5912 0;
5913
5914 dw[1] =
5915 __gen_field(values->AlphaToCoverageEnable, 31, 31) |
5916 __gen_field(values->AlphaToOneEnable, 30, 30) |
5917 __gen_field(values->AlphaToCoverageDitherEnable, 29, 29) |
5918 __gen_field(values->WriteDisableAlpha, 27, 27) |
5919 __gen_field(values->WriteDisableRed, 26, 26) |
5920 __gen_field(values->WriteDisableGreen, 25, 25) |
5921 __gen_field(values->WriteDisableBlue, 24, 24) |
5922 __gen_field(values->LogicOpEnable, 22, 22) |
5923 __gen_field(values->LogicOpFunction, 18, 21) |
5924 __gen_field(values->AlphaTestEnable, 16, 16) |
5925 __gen_field(values->AlphaTestFunction, 13, 15) |
5926 __gen_field(values->ColorDitherEnable, 12, 12) |
5927 __gen_field(values->XDitherOffset, 10, 11) |
5928 __gen_field(values->YDitherOffset, 8, 9) |
5929 __gen_field(values->ColorClampRange, 2, 3) |
5930 __gen_field(values->PreBlendColorClampEnable, 1, 1) |
5931 __gen_field(values->PostBlendColorClampEnable, 0, 0) |
5932 0;
5933
5934 }
5935
5936 #define GEN7_CC_VIEWPORT_length 0x00000002
5937
5938 struct GEN7_CC_VIEWPORT {
5939 float MinimumDepth;
5940 float MaximumDepth;
5941 };
5942
5943 static inline void
5944 GEN7_CC_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
5945 const struct GEN7_CC_VIEWPORT * restrict values)
5946 {
5947 uint32_t *dw = (uint32_t * restrict) dst;
5948
5949 dw[0] =
5950 __gen_float(values->MinimumDepth) |
5951 0;
5952
5953 dw[1] =
5954 __gen_float(values->MaximumDepth) |
5955 0;
5956
5957 }
5958
5959 #define GEN7_COLOR_CALC_STATE_length 0x00000006
5960
5961 struct GEN7_COLOR_CALC_STATE {
5962 uint32_t StencilReferenceValue;
5963 uint32_t BackFaceStencilReferenceValue;
5964 #define Cancelled 0
5965 #define NotCancelled 1
5966 uint32_t RoundDisableFunctionDisable;
5967 #define ALPHATEST_UNORM8 0
5968 #define ALPHATEST_FLOAT32 1
5969 uint32_t AlphaTestFormat;
5970 uint32_t AlphaReferenceValueAsUNORM8;
5971 float AlphaReferenceValueAsFLOAT32;
5972 float BlendConstantColorRed;
5973 float BlendConstantColorGreen;
5974 float BlendConstantColorBlue;
5975 float BlendConstantColorAlpha;
5976 };
5977
5978 static inline void
5979 GEN7_COLOR_CALC_STATE_pack(__gen_user_data *data, void * restrict dst,
5980 const struct GEN7_COLOR_CALC_STATE * restrict values)
5981 {
5982 uint32_t *dw = (uint32_t * restrict) dst;
5983
5984 dw[0] =
5985 __gen_field(values->StencilReferenceValue, 24, 31) |
5986 __gen_field(values->BackFaceStencilReferenceValue, 16, 23) |
5987 __gen_field(values->RoundDisableFunctionDisable, 15, 15) |
5988 __gen_field(values->AlphaTestFormat, 0, 0) |
5989 0;
5990
5991 dw[1] =
5992 __gen_field(values->AlphaReferenceValueAsUNORM8, 0, 31) |
5993 __gen_float(values->AlphaReferenceValueAsFLOAT32) |
5994 0;
5995
5996 dw[2] =
5997 __gen_float(values->BlendConstantColorRed) |
5998 0;
5999
6000 dw[3] =
6001 __gen_float(values->BlendConstantColorGreen) |
6002 0;
6003
6004 dw[4] =
6005 __gen_float(values->BlendConstantColorBlue) |
6006 0;
6007
6008 dw[5] =
6009 __gen_float(values->BlendConstantColorAlpha) |
6010 0;
6011
6012 }
6013
6014 #define GEN7_DEPTH_STENCIL_STATE_length 0x00000003
6015
6016 struct GEN7_DEPTH_STENCIL_STATE {
6017 uint32_t StencilTestEnable;
6018 #define COMPAREFUNCTION_ALWAYS 0
6019 #define COMPAREFUNCTION_NEVER 1
6020 #define COMPAREFUNCTION_LESS 2
6021 #define COMPAREFUNCTION_EQUAL 3
6022 #define COMPAREFUNCTION_LEQUAL 4
6023 #define COMPAREFUNCTION_GREATER 5
6024 #define COMPAREFUNCTION_NOTEQUAL 6
6025 #define COMPAREFUNCTION_GEQUAL 7
6026 uint32_t StencilTestFunction;
6027 #define STENCILOP_KEEP 0
6028 #define STENCILOP_ZERO 1
6029 #define STENCILOP_REPLACE 2
6030 #define STENCILOP_INCRSAT 3
6031 #define STENCILOP_DECRSAT 4
6032 #define STENCILOP_INCR 5
6033 #define STENCILOP_DECR 6
6034 #define STENCILOP_INVERT 7
6035 uint32_t StencilFailOp;
6036 uint32_t StencilPassDepthFailOp;
6037 uint32_t StencilPassDepthPassOp;
6038 uint32_t StencilBufferWriteEnable;
6039 uint32_t DoubleSidedStencilEnable;
6040 #define COMPAREFUNCTION_ALWAYS 0
6041 #define COMPAREFUNCTION_NEVER 1
6042 #define COMPAREFUNCTION_LESS 2
6043 #define COMPAREFUNCTION_EQUAL 3
6044 #define COMPAREFUNCTION_LEQUAL 4
6045 #define COMPAREFUNCTION_GREATER 5
6046 #define COMPAREFUNCTION_NOTEQUAL 6
6047 #define COMPAREFUNCTION_GEQUAL 7
6048 uint32_t BackFaceStencilTestFunction;
6049 #define STENCILOP_KEEP 0
6050 #define STENCILOP_ZERO 1
6051 #define STENCILOP_REPLACE 2
6052 #define STENCILOP_INCRSAT 3
6053 #define STENCILOP_DECRSAT 4
6054 #define STENCILOP_INCR 5
6055 #define STENCILOP_DECR 6
6056 #define STENCILOP_INVERT 7
6057 uint32_t BackfaceStencilFailOp;
6058 uint32_t BackfaceStencilPassDepthFailOp;
6059 uint32_t BackfaceStencilPassDepthPassOp;
6060 uint32_t StencilTestMask;
6061 uint32_t StencilWriteMask;
6062 uint32_t BackfaceStencilTestMask;
6063 uint32_t BackfaceStencilWriteMask;
6064 uint32_t DepthTestEnable;
6065 #define COMPAREFUNCTION_ALWAYS 0
6066 #define COMPAREFUNCTION_NEVER 1
6067 #define COMPAREFUNCTION_LESS 2
6068 #define COMPAREFUNCTION_EQUAL 3
6069 #define COMPAREFUNCTION_LEQUAL 4
6070 #define COMPAREFUNCTION_GREATER 5
6071 #define COMPAREFUNCTION_NOTEQUAL 6
6072 #define COMPAREFUNCTION_GEQUAL 7
6073 uint32_t DepthTestFunction;
6074 uint32_t DepthBufferWriteEnable;
6075 };
6076
6077 static inline void
6078 GEN7_DEPTH_STENCIL_STATE_pack(__gen_user_data *data, void * restrict dst,
6079 const struct GEN7_DEPTH_STENCIL_STATE * restrict values)
6080 {
6081 uint32_t *dw = (uint32_t * restrict) dst;
6082
6083 dw[0] =
6084 __gen_field(values->StencilTestEnable, 31, 31) |
6085 __gen_field(values->StencilTestFunction, 28, 30) |
6086 __gen_field(values->StencilFailOp, 25, 27) |
6087 __gen_field(values->StencilPassDepthFailOp, 22, 24) |
6088 __gen_field(values->StencilPassDepthPassOp, 19, 21) |
6089 __gen_field(values->StencilBufferWriteEnable, 18, 18) |
6090 __gen_field(values->DoubleSidedStencilEnable, 15, 15) |
6091 __gen_field(values->BackFaceStencilTestFunction, 12, 14) |
6092 __gen_field(values->BackfaceStencilFailOp, 9, 11) |
6093 __gen_field(values->BackfaceStencilPassDepthFailOp, 6, 8) |
6094 __gen_field(values->BackfaceStencilPassDepthPassOp, 3, 5) |
6095 0;
6096
6097 dw[1] =
6098 __gen_field(values->StencilTestMask, 24, 31) |
6099 __gen_field(values->StencilWriteMask, 16, 23) |
6100 __gen_field(values->BackfaceStencilTestMask, 8, 15) |
6101 __gen_field(values->BackfaceStencilWriteMask, 0, 7) |
6102 0;
6103
6104 dw[2] =
6105 __gen_field(values->DepthTestEnable, 31, 31) |
6106 __gen_field(values->DepthTestFunction, 27, 29) |
6107 __gen_field(values->DepthBufferWriteEnable, 26, 26) |
6108 0;
6109
6110 }
6111
6112 #define GEN7_MEMORY_OBJECT_CONTROL_STATE_length 0x00000001
6113
6114 #define GEN7_INTERFACE_DESCRIPTOR_DATA_length 0x00000008
6115
6116 struct GEN7_INTERFACE_DESCRIPTOR_DATA {
6117 uint32_t KernelStartPointer;
6118 #define Multiple 0
6119 #define Single 1
6120 uint32_t SingleProgramFlow;
6121 #define NormalPriority 0
6122 #define HighPriority 1
6123 uint32_t ThreadPriority;
6124 #define IEEE754 0
6125 #define Alternate 1
6126 uint32_t FloatingPointMode;
6127 uint32_t IllegalOpcodeExceptionEnable;
6128 uint32_t MaskStackExceptionEnable;
6129 uint32_t SoftwareExceptionEnable;
6130 uint32_t SamplerStatePointer;
6131 #define Nosamplersused 0
6132 #define Between1and4samplersused 1
6133 #define Between5and8samplersused 2
6134 #define Between9and12samplersused 3
6135 #define Between13and16samplersused 4
6136 uint32_t SamplerCount;
6137 uint32_t BindingTablePointer;
6138 uint32_t BindingTableEntryCount;
6139 uint32_t ConstantURBEntryReadLength;
6140 uint32_t ConstantURBEntryReadOffset;
6141 #define RTNE 0
6142 #define RU 1
6143 #define RD 2
6144 #define RTZ 3
6145 uint32_t RoundingMode;
6146 uint32_t BarrierEnable;
6147 uint32_t SharedLocalMemorySize;
6148 uint32_t NumberofThreadsinGPGPUThreadGroup;
6149 };
6150
6151 static inline void
6152 GEN7_INTERFACE_DESCRIPTOR_DATA_pack(__gen_user_data *data, void * restrict dst,
6153 const struct GEN7_INTERFACE_DESCRIPTOR_DATA * restrict values)
6154 {
6155 uint32_t *dw = (uint32_t * restrict) dst;
6156
6157 dw[0] =
6158 __gen_offset(values->KernelStartPointer, 6, 31) |
6159 0;
6160
6161 dw[1] =
6162 __gen_field(values->SingleProgramFlow, 18, 18) |
6163 __gen_field(values->ThreadPriority, 17, 17) |
6164 __gen_field(values->FloatingPointMode, 16, 16) |
6165 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
6166 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
6167 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
6168 0;
6169
6170 dw[2] =
6171 __gen_offset(values->SamplerStatePointer, 5, 31) |
6172 __gen_field(values->SamplerCount, 2, 4) |
6173 0;
6174
6175 dw[3] =
6176 __gen_offset(values->BindingTablePointer, 5, 15) |
6177 __gen_field(values->BindingTableEntryCount, 0, 4) |
6178 0;
6179
6180 dw[4] =
6181 __gen_field(values->ConstantURBEntryReadLength, 16, 31) |
6182 __gen_field(values->ConstantURBEntryReadOffset, 0, 15) |
6183 0;
6184
6185 dw[5] =
6186 __gen_field(values->RoundingMode, 22, 23) |
6187 __gen_field(values->BarrierEnable, 21, 21) |
6188 __gen_field(values->SharedLocalMemorySize, 16, 20) |
6189 __gen_field(values->NumberofThreadsinGPGPUThreadGroup, 0, 7) |
6190 0;
6191
6192 dw[6] =
6193 0;
6194
6195 dw[7] =
6196 0;
6197
6198 }
6199
6200 #define GEN7_PALETTE_ENTRY_length 0x00000001
6201
6202 #define GEN7_SAMPLER_BORDER_COLOR_STATE_length 0x00000004
6203
6204 struct GEN7_SAMPLER_BORDER_COLOR_STATE {
6205 uint32_t BorderColorRedDX100GL;
6206 uint32_t BorderColorAlpha;
6207 uint32_t BorderColorBlue;
6208 uint32_t BorderColorGreen;
6209 uint32_t BorderColorRedDX9;
6210 uint32_t BorderColorGreen0;
6211 uint32_t BorderColorBlue0;
6212 uint32_t BorderColorAlpha0;
6213 };
6214
6215 static inline void
6216 GEN7_SAMPLER_BORDER_COLOR_STATE_pack(__gen_user_data *data, void * restrict dst,
6217 const struct GEN7_SAMPLER_BORDER_COLOR_STATE * restrict values)
6218 {
6219 uint32_t *dw = (uint32_t * restrict) dst;
6220
6221 dw[0] =
6222 __gen_field(values->BorderColorRedDX100GL, 0, 31) |
6223 __gen_field(values->BorderColorAlpha, 24, 31) |
6224 __gen_field(values->BorderColorBlue, 16, 23) |
6225 __gen_field(values->BorderColorGreen, 8, 15) |
6226 __gen_field(values->BorderColorRedDX9, 0, 7) |
6227 0;
6228
6229 dw[1] =
6230 __gen_field(values->BorderColorGreen, 0, 31) |
6231 0;
6232
6233 dw[2] =
6234 __gen_field(values->BorderColorBlue, 0, 31) |
6235 0;
6236
6237 dw[3] =
6238 __gen_field(values->BorderColorAlpha, 0, 31) |
6239 0;
6240
6241 }
6242
6243 #define GEN7_SAMPLER_STATE_length 0x00000004
6244
6245 struct GEN7_SAMPLER_STATE {
6246 uint32_t SamplerDisable;
6247 #define DX10OGL 0
6248 #define DX9 1
6249 uint32_t TextureBorderColorMode;
6250 #define OGL 1
6251 uint32_t LODPreClampEnable;
6252 float BaseMipLevel;
6253 #define MIPFILTER_NONE 0
6254 #define MIPFILTER_NEAREST 1
6255 #define MIPFILTER_LINEAR 3
6256 uint32_t MipModeFilter;
6257 #define MAPFILTER_NEAREST 0
6258 #define MAPFILTER_LINEAR 1
6259 #define MAPFILTER_ANISOTROPIC 2
6260 #define MAPFILTER_MONO 6
6261 uint32_t MagModeFilter;
6262 #define MAPFILTER_NEAREST 0
6263 #define MAPFILTER_LINEAR 1
6264 #define MAPFILTER_ANISOTROPIC 2
6265 #define MAPFILTER_MONO 6
6266 uint32_t MinModeFilter;
6267 uint32_t TextureLODBias;
6268 #define LEGACY 0
6269 #define EWAApproximation 1
6270 uint32_t AnisotropicAlgorithm;
6271 float MinLOD;
6272 float MaxLOD;
6273 #define PREFILTEROPALWAYS 0
6274 #define PREFILTEROPNEVER 1
6275 #define PREFILTEROPLESS 2
6276 #define PREFILTEROPEQUAL 3
6277 #define PREFILTEROPLEQUAL 4
6278 #define PREFILTEROPGREATER 5
6279 #define PREFILTEROPNOTEQUAL 6
6280 #define PREFILTEROPGEQUAL 7
6281 uint32_t ShadowFunction;
6282 #define PROGRAMMED 0
6283 #define OVERRIDE 1
6284 uint32_t CubeSurfaceControlMode;
6285 uint32_t BorderColorPointer;
6286 uint32_t ChromaKeyEnable;
6287 uint32_t ChromaKeyIndex;
6288 #define KEYFILTER_KILL_ON_ANY_MATCH 0
6289 #define KEYFILTER_REPLACE_BLACK 1
6290 uint32_t ChromaKeyMode;
6291 #define RATIO21 0
6292 #define RATIO41 1
6293 #define RATIO61 2
6294 #define RATIO81 3
6295 #define RATIO101 4
6296 #define RATIO121 5
6297 #define RATIO141 6
6298 #define RATIO161 7
6299 uint32_t MaximumAnisotropy;
6300 uint32_t RAddressMinFilterRoundingEnable;
6301 uint32_t RAddressMagFilterRoundingEnable;
6302 uint32_t VAddressMinFilterRoundingEnable;
6303 uint32_t VAddressMagFilterRoundingEnable;
6304 uint32_t UAddressMinFilterRoundingEnable;
6305 uint32_t UAddressMagFilterRoundingEnable;
6306 #define FULL 0
6307 #define MED 2
6308 #define LOW 3
6309 uint32_t TrilinearFilterQuality;
6310 uint32_t NonnormalizedCoordinateEnable;
6311 uint32_t TCXAddressControlMode;
6312 uint32_t TCYAddressControlMode;
6313 uint32_t TCZAddressControlMode;
6314 };
6315
6316 static inline void
6317 GEN7_SAMPLER_STATE_pack(__gen_user_data *data, void * restrict dst,
6318 const struct GEN7_SAMPLER_STATE * restrict values)
6319 {
6320 uint32_t *dw = (uint32_t * restrict) dst;
6321
6322 dw[0] =
6323 __gen_field(values->SamplerDisable, 31, 31) |
6324 __gen_field(values->TextureBorderColorMode, 29, 29) |
6325 __gen_field(values->LODPreClampEnable, 28, 28) |
6326 __gen_field(values->BaseMipLevel * (1 << 1), 22, 26) |
6327 __gen_field(values->MipModeFilter, 20, 21) |
6328 __gen_field(values->MagModeFilter, 17, 19) |
6329 __gen_field(values->MinModeFilter, 14, 16) |
6330 __gen_field(values->TextureLODBias, 1, 13) |
6331 __gen_field(values->AnisotropicAlgorithm, 0, 0) |
6332 0;
6333
6334 dw[1] =
6335 __gen_field(values->MinLOD * (1 << 8), 20, 31) |
6336 __gen_field(values->MaxLOD * (1 << 8), 8, 19) |
6337 __gen_field(values->ShadowFunction, 1, 3) |
6338 __gen_field(values->CubeSurfaceControlMode, 0, 0) |
6339 0;
6340
6341 dw[2] =
6342 __gen_offset(values->BorderColorPointer, 5, 31) |
6343 0;
6344
6345 dw[3] =
6346 __gen_field(values->ChromaKeyEnable, 25, 25) |
6347 __gen_field(values->ChromaKeyIndex, 23, 24) |
6348 __gen_field(values->ChromaKeyMode, 22, 22) |
6349 __gen_field(values->MaximumAnisotropy, 19, 21) |
6350 __gen_field(values->RAddressMinFilterRoundingEnable, 13, 13) |
6351 __gen_field(values->RAddressMagFilterRoundingEnable, 14, 14) |
6352 __gen_field(values->VAddressMinFilterRoundingEnable, 15, 15) |
6353 __gen_field(values->VAddressMagFilterRoundingEnable, 16, 16) |
6354 __gen_field(values->UAddressMinFilterRoundingEnable, 17, 17) |
6355 __gen_field(values->UAddressMagFilterRoundingEnable, 18, 18) |
6356 __gen_field(values->TrilinearFilterQuality, 11, 12) |
6357 __gen_field(values->NonnormalizedCoordinateEnable, 10, 10) |
6358 __gen_field(values->TCXAddressControlMode, 6, 8) |
6359 __gen_field(values->TCYAddressControlMode, 3, 5) |
6360 __gen_field(values->TCZAddressControlMode, 0, 2) |
6361 0;
6362
6363 }
6364
6365 /* Enum 3D_Prim_Topo_Type */
6366 #define _3DPRIM_POINTLIST 1
6367 #define _3DPRIM_LINELIST 2
6368 #define _3DPRIM_LINESTRIP 3
6369 #define _3DPRIM_TRILIST 4
6370 #define _3DPRIM_TRISTRIP 5
6371 #define _3DPRIM_TRIFAN 6
6372 #define _3DPRIM_QUADLIST 7
6373 #define _3DPRIM_QUADSTRIP 8
6374 #define _3DPRIM_LINELIST_ADJ 9
6375 #define _3DPRIM_LISTSTRIP_ADJ 10
6376 #define _3DPRIM_TRILIST_ADJ 11
6377 #define _3DPRIM_TRISTRIP_ADJ 12
6378 #define _3DPRIM_TRISTRIP_REVERSE 13
6379 #define _3DPRIM_POLYGON 14
6380 #define _3DPRIM_RECTLIST 15
6381 #define _3DPRIM_LINELOOP 16
6382 #define _3DPRIM_POINTLIST_BF 17
6383 #define _3DPRIM_LINESTRIP_CONT 18
6384 #define _3DPRIM_LINESTRIP_BF 19
6385 #define _3DPRIM_LINESTRIP_CONT_BF 20
6386 #define _3DPRIM_TRIFAN_NOSTIPPLE 22
6387 #define _3DPRIM_PATCHLIST_1 32
6388 #define _3DPRIM_PATCHLIST_2 33
6389 #define _3DPRIM_PATCHLIST_3 34
6390 #define _3DPRIM_PATCHLIST_4 35
6391 #define _3DPRIM_PATCHLIST_5 36
6392 #define _3DPRIM_PATCHLIST_6 37
6393 #define _3DPRIM_PATCHLIST_7 38
6394 #define _3DPRIM_PATCHLIST_8 39
6395 #define _3DPRIM_PATCHLIST_9 40
6396 #define _3DPRIM_PATCHLIST_10 41
6397 #define _3DPRIM_PATCHLIST_11 42
6398 #define _3DPRIM_PATCHLIST_12 43
6399 #define _3DPRIM_PATCHLIST_13 44
6400 #define _3DPRIM_PATCHLIST_14 45
6401 #define _3DPRIM_PATCHLIST_15 46
6402 #define _3DPRIM_PATCHLIST_16 47
6403 #define _3DPRIM_PATCHLIST_17 48
6404 #define _3DPRIM_PATCHLIST_18 49
6405 #define _3DPRIM_PATCHLIST_19 50
6406 #define _3DPRIM_PATCHLIST_20 51
6407 #define _3DPRIM_PATCHLIST_21 52
6408 #define _3DPRIM_PATCHLIST_22 53
6409 #define _3DPRIM_PATCHLIST_23 54
6410 #define _3DPRIM_PATCHLIST_24 55
6411 #define _3DPRIM_PATCHLIST_25 56
6412 #define _3DPRIM_PATCHLIST_26 57
6413 #define _3DPRIM_PATCHLIST_27 58
6414 #define _3DPRIM_PATCHLIST_28 59
6415 #define _3DPRIM_PATCHLIST_29 60
6416 #define _3DPRIM_PATCHLIST_30 61
6417 #define _3DPRIM_PATCHLIST_31 62
6418 #define _3DPRIM_PATCHLIST_32 63
6419
6420 /* Enum 3D_Vertex_Component_Control */
6421 #define VFCOMP_NOSTORE 0
6422 #define VFCOMP_STORE_SRC 1
6423 #define VFCOMP_STORE_0 2
6424 #define VFCOMP_STORE_1_FP 3
6425 #define VFCOMP_STORE_1_INT 4
6426 #define VFCOMP_STORE_VID 5
6427 #define VFCOMP_STORE_IID 6
6428 #define VFCOMP_STORE_PID 7
6429
6430 /* Enum 3D_Compare_Function */
6431 #define COMPAREFUNCTION_ALWAYS 0
6432 #define COMPAREFUNCTION_NEVER 1
6433 #define COMPAREFUNCTION_LESS 2
6434 #define COMPAREFUNCTION_EQUAL 3
6435 #define COMPAREFUNCTION_LEQUAL 4
6436 #define COMPAREFUNCTION_GREATER 5
6437 #define COMPAREFUNCTION_NOTEQUAL 6
6438 #define COMPAREFUNCTION_GEQUAL 7
6439
6440 /* Enum SURFACE_FORMAT */
6441 #define R32G32B32A32_FLOAT 0
6442 #define R32G32B32A32_SINT 1
6443 #define R32G32B32A32_UINT 2
6444 #define R32G32B32A32_UNORM 3
6445 #define R32G32B32A32_SNORM 4
6446 #define R64G64_FLOAT 5
6447 #define R32G32B32X32_FLOAT 6
6448 #define R32G32B32A32_SSCALED 7
6449 #define R32G32B32A32_USCALED 8
6450 #define R32G32B32A32_SFIXED 32
6451 #define R64G64_PASSTHRU 33
6452 #define R32G32B32_FLOAT 64
6453 #define R32G32B32_SINT 65
6454 #define R32G32B32_UINT 66
6455 #define R32G32B32_UNORM 67
6456 #define R32G32B32_SNORM 68
6457 #define R32G32B32_SSCALED 69
6458 #define R32G32B32_USCALED 70
6459 #define R32G32B32_SFIXED 80
6460 #define R16G16B16A16_UNORM 128
6461 #define R16G16B16A16_SNORM 129
6462 #define R16G16B16A16_SINT 130
6463 #define R16G16B16A16_UINT 131
6464 #define R16G16B16A16_FLOAT 132
6465 #define R32G32_FLOAT 133
6466 #define R32G32_SINT 134
6467 #define R32G32_UINT 135
6468 #define R32_FLOAT_X8X24_TYPELESS 136
6469 #define X32_TYPELESS_G8X24_UINT 137
6470 #define L32A32_FLOAT 138
6471 #define R32G32_UNORM 139
6472 #define R32G32_SNORM 140
6473 #define R64_FLOAT 141
6474 #define R16G16B16X16_UNORM 142
6475 #define R16G16B16X16_FLOAT 143
6476 #define A32X32_FLOAT 144
6477 #define L32X32_FLOAT 145
6478 #define I32X32_FLOAT 146
6479 #define R16G16B16A16_SSCALED 147
6480 #define R16G16B16A16_USCALED 148
6481 #define R32G32_SSCALED 149
6482 #define R32G32_USCALED 150
6483 #define R32G32_SFIXED 160
6484 #define R64_PASSTHRU 161
6485 #define B8G8R8A8_UNORM 192
6486 #define B8G8R8A8_UNORM_SRGB 193
6487 #define R10G10B10A2_UNORM 194
6488 #define R10G10B10A2_UNORM_SRGB 195
6489 #define R10G10B10A2_UINT 196
6490 #define R10G10B10_SNORM_A2_UNORM 197
6491 #define R8G8B8A8_UNORM 199
6492 #define R8G8B8A8_UNORM_SRGB 200
6493 #define R8G8B8A8_SNORM 201
6494 #define R8G8B8A8_SINT 202
6495 #define R8G8B8A8_UINT 203
6496 #define R16G16_UNORM 204
6497 #define R16G16_SNORM 205
6498 #define R16G16_SINT 206
6499 #define R16G16_UINT 207
6500 #define R16G16_FLOAT 208
6501 #define B10G10R10A2_UNORM 209
6502 #define B10G10R10A2_UNORM_SRGB 210
6503 #define R11G11B10_FLOAT 211
6504 #define R32_SINT 214
6505 #define R32_UINT 215
6506 #define R32_FLOAT 216
6507 #define R24_UNORM_X8_TYPELESS 217
6508 #define X24_TYPELESS_G8_UINT 218
6509 #define L32_UNORM 221
6510 #define A32_UNORM 222
6511 #define L16A16_UNORM 223
6512 #define I24X8_UNORM 224
6513 #define L24X8_UNORM 225
6514 #define A24X8_UNORM 226
6515 #define I32_FLOAT 227
6516 #define L32_FLOAT 228
6517 #define A32_FLOAT 229
6518 #define X8B8_UNORM_G8R8_SNORM 230
6519 #define A8X8_UNORM_G8R8_SNORM 231
6520 #define B8X8_UNORM_G8R8_SNORM 232
6521 #define B8G8R8X8_UNORM 233
6522 #define B8G8R8X8_UNORM_SRGB 234
6523 #define R8G8B8X8_UNORM 235
6524 #define R8G8B8X8_UNORM_SRGB 236
6525 #define R9G9B9E5_SHAREDEXP 237
6526 #define B10G10R10X2_UNORM 238
6527 #define L16A16_FLOAT 240
6528 #define R32_UNORM 241
6529 #define R32_SNORM 242
6530 #define R10G10B10X2_USCALED 243
6531 #define R8G8B8A8_SSCALED 244
6532 #define R8G8B8A8_USCALED 245
6533 #define R16G16_SSCALED 246
6534 #define R16G16_USCALED 247
6535 #define R32_SSCALED 248
6536 #define R32_USCALED 249
6537 #define B5G6R5_UNORM 256
6538 #define B5G6R5_UNORM_SRGB 257
6539 #define B5G5R5A1_UNORM 258
6540 #define B5G5R5A1_UNORM_SRGB 259
6541 #define B4G4R4A4_UNORM 260
6542 #define B4G4R4A4_UNORM_SRGB 261
6543 #define R8G8_UNORM 262
6544 #define R8G8_SNORM 263
6545 #define R8G8_SINT 264
6546 #define R8G8_UINT 265
6547 #define R16_UNORM 266
6548 #define R16_SNORM 267
6549 #define R16_SINT 268
6550 #define R16_UINT 269
6551 #define R16_FLOAT 270
6552 #define A8P8_UNORM_PALETTE0 271
6553 #define A8P8_UNORM_PALETTE1 272
6554 #define I16_UNORM 273
6555 #define L16_UNORM 274
6556 #define A16_UNORM 275
6557 #define L8A8_UNORM 276
6558 #define I16_FLOAT 277
6559 #define L16_FLOAT 278
6560 #define A16_FLOAT 279
6561 #define L8A8_UNORM_SRGB 280
6562 #define R5G5_SNORM_B6_UNORM 281
6563 #define B5G5R5X1_UNORM 282
6564 #define B5G5R5X1_UNORM_SRGB 283
6565 #define R8G8_SSCALED 284
6566 #define R8G8_USCALED 285
6567 #define R16_SSCALED 286
6568 #define R16_USCALED 287
6569 #define P8A8_UNORM_PALETTE0 290
6570 #define P8A8_UNORM_PALETTE1 291
6571 #define A1B5G5R5_UNORM 292
6572 #define A4B4G4R4_UNORM 293
6573 #define L8A8_UINT 294
6574 #define L8A8_SINT 295
6575 #define R8_UNORM 320
6576 #define R8_SNORM 321
6577 #define R8_SINT 322
6578 #define R8_UINT 323
6579 #define A8_UNORM 324
6580 #define I8_UNORM 325
6581 #define L8_UNORM 326
6582 #define P4A4_UNORM_PALETTE0 327
6583 #define A4P4_UNORM_PALETTE0 328
6584 #define R8_SSCALED 329
6585 #define R8_USCALED 330
6586 #define P8_UNORM_PALETTE0 331
6587 #define L8_UNORM_SRGB 332
6588 #define P8_UNORM_PALETTE1 333
6589 #define P4A4_UNORM_PALETTE1 334
6590 #define A4P4_UNORM_PALETTE1 335
6591 #define Y8_UNORM 336
6592 #define L8_UINT 338
6593 #define L8_SINT 339
6594 #define I8_UINT 340
6595 #define I8_SINT 341
6596 #define DXT1_RGB_SRGB 384
6597 #define R1_UNORM 385
6598 #define YCRCB_NORMAL 386
6599 #define YCRCB_SWAPUVY 387
6600 #define P2_UNORM_PALETTE0 388
6601 #define P2_UNORM_PALETTE1 389
6602 #define BC1_UNORM 390
6603 #define BC2_UNORM 391
6604 #define BC3_UNORM 392
6605 #define BC4_UNORM 393
6606 #define BC5_UNORM 394
6607 #define BC1_UNORM_SRGB 395
6608 #define BC2_UNORM_SRGB 396
6609 #define BC3_UNORM_SRGB 397
6610 #define MONO8 398
6611 #define YCRCB_SWAPUV 399
6612 #define YCRCB_SWAPY 400
6613 #define DXT1_RGB 401
6614 #define FXT1 402
6615 #define R8G8B8_UNORM 403
6616 #define R8G8B8_SNORM 404
6617 #define R8G8B8_SSCALED 405
6618 #define R8G8B8_USCALED 406
6619 #define R64G64B64A64_FLOAT 407
6620 #define R64G64B64_FLOAT 408
6621 #define BC4_SNORM 409
6622 #define BC5_SNORM 410
6623 #define R16G16B16_FLOAT 411
6624 #define R16G16B16_UNORM 412
6625 #define R16G16B16_SNORM 413
6626 #define R16G16B16_SSCALED 414
6627 #define R16G16B16_USCALED 415
6628 #define BC6H_SF16 417
6629 #define BC7_UNORM 418
6630 #define BC7_UNORM_SRGB 419
6631 #define BC6H_UF16 420
6632 #define PLANAR_420_8 421
6633 #define R8G8B8_UNORM_SRGB 424
6634 #define ETC1_RGB8 425
6635 #define ETC2_RGB8 426
6636 #define EAC_R11 427
6637 #define EAC_RG11 428
6638 #define EAC_SIGNED_R11 429
6639 #define EAC_SIGNED_RG11 430
6640 #define ETC2_SRGB8 431
6641 #define R16G16B16_UINT 432
6642 #define R16G16B16_SINT 433
6643 #define R32_SFIXED 434
6644 #define R10G10B10A2_SNORM 435
6645 #define R10G10B10A2_USCALED 436
6646 #define R10G10B10A2_SSCALED 437
6647 #define R10G10B10A2_SINT 438
6648 #define B10G10R10A2_SNORM 439
6649 #define B10G10R10A2_USCALED 440
6650 #define B10G10R10A2_SSCALED 441
6651 #define B10G10R10A2_UINT 442
6652 #define B10G10R10A2_SINT 443
6653 #define R64G64B64A64_PASSTHRU 444
6654 #define R64G64B64_PASSTHRU 445
6655 #define ETC2_RGB8_PTA 448
6656 #define ETC2_SRGB8_PTA 449
6657 #define ETC2_EAC_RGBA8 450
6658 #define ETC2_EAC_SRGB8_A8 451
6659 #define R8G8B8_UINT 456
6660 #define R8G8B8_SINT 457
6661 #define RAW 511
6662
6663 /* Enum Texture Coordinate Mode */
6664 #define TCM_WRAP 0
6665 #define TCM_MIRROR 1
6666 #define TCM_CLAMP 2
6667 #define TCM_CUBE 3
6668 #define TCM_CLAMP_BORDER 4
6669 #define TCM_MIRROR_ONCE 5
6670