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[mesa.git] / src / vulkan / gen7_pack.h
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24
25 /* Instructions, enums and structures for IVB.
26 *
27 * This file has been generated, do not hand edit.
28 */
29
30 #pragma once
31
32 #include <stdio.h>
33 #include <assert.h>
34
35 #ifndef __gen_validate_value
36 #define __gen_validate_value(x)
37 #endif
38
39 #ifndef __gen_field_functions
40 #define __gen_field_functions
41
42 union __gen_value {
43 float f;
44 uint32_t dw;
45 };
46
47 static inline uint64_t
48 __gen_mbo(uint32_t start, uint32_t end)
49 {
50 return (~0ul >> (64 - (end - start + 1))) << start;
51 }
52
53 static inline uint64_t
54 __gen_field(uint64_t v, uint32_t start, uint32_t end)
55 {
56 __gen_validate_value(v);
57 #if DEBUG
58 if (end - start + 1 < 64)
59 assert(v < 1ul << (end - start + 1));
60 #endif
61
62 return v << start;
63 }
64
65 static inline uint64_t
66 __gen_offset(uint64_t v, uint32_t start, uint32_t end)
67 {
68 __gen_validate_value(v);
69 #if DEBUG
70 uint64_t mask = (~0ul >> (64 - (end - start + 1))) << start;
71
72 assert((v & ~mask) == 0);
73 #endif
74
75 return v;
76 }
77
78 static inline uint32_t
79 __gen_float(float v)
80 {
81 __gen_validate_value(v);
82 return ((union __gen_value) { .f = (v) }).dw;
83 }
84
85 #ifndef __gen_address_type
86 #error #define __gen_address_type before including this file
87 #endif
88
89 #ifndef __gen_user_data
90 #error #define __gen_combine_address before including this file
91 #endif
92
93 #endif
94
95 #define GEN7_3DSTATE_URB_VS_length_bias 0x00000002
96 #define GEN7_3DSTATE_URB_VS_header \
97 .CommandType = 3, \
98 .CommandSubType = 3, \
99 ._3DCommandOpcode = 0, \
100 ._3DCommandSubOpcode = 48, \
101 .DwordLength = 0
102
103 #define GEN7_3DSTATE_URB_VS_length 0x00000002
104
105 struct GEN7_3DSTATE_URB_VS {
106 uint32_t CommandType;
107 uint32_t CommandSubType;
108 uint32_t _3DCommandOpcode;
109 uint32_t _3DCommandSubOpcode;
110 uint32_t DwordLength;
111 uint32_t VSURBStartingAddress;
112 uint32_t VSURBEntryAllocationSize;
113 uint32_t VSNumberofURBEntries;
114 };
115
116 static inline void
117 GEN7_3DSTATE_URB_VS_pack(__gen_user_data *data, void * restrict dst,
118 const struct GEN7_3DSTATE_URB_VS * restrict values)
119 {
120 uint32_t *dw = (uint32_t * restrict) dst;
121
122 dw[0] =
123 __gen_field(values->CommandType, 29, 31) |
124 __gen_field(values->CommandSubType, 27, 28) |
125 __gen_field(values->_3DCommandOpcode, 24, 26) |
126 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
127 __gen_field(values->DwordLength, 0, 7) |
128 0;
129
130 dw[1] =
131 __gen_field(values->VSURBStartingAddress, 25, 29) |
132 __gen_field(values->VSURBEntryAllocationSize, 16, 24) |
133 __gen_field(values->VSNumberofURBEntries, 0, 15) |
134 0;
135
136 }
137
138 #define GEN7_MI_STORE_REGISTER_MEM_length_bias 0x00000002
139 #define GEN7_MI_STORE_REGISTER_MEM_header \
140 .CommandType = 0, \
141 .MICommandOpcode = 36, \
142 .DwordLength = 1
143
144 #define GEN7_MI_STORE_REGISTER_MEM_length 0x00000003
145
146 struct GEN7_MI_STORE_REGISTER_MEM {
147 uint32_t CommandType;
148 uint32_t MICommandOpcode;
149 bool UseGlobalGTT;
150 uint32_t DwordLength;
151 uint32_t RegisterAddress;
152 __gen_address_type MemoryAddress;
153 };
154
155 static inline void
156 GEN7_MI_STORE_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
157 const struct GEN7_MI_STORE_REGISTER_MEM * restrict values)
158 {
159 uint32_t *dw = (uint32_t * restrict) dst;
160
161 dw[0] =
162 __gen_field(values->CommandType, 29, 31) |
163 __gen_field(values->MICommandOpcode, 23, 28) |
164 __gen_field(values->UseGlobalGTT, 22, 22) |
165 __gen_field(values->DwordLength, 0, 7) |
166 0;
167
168 dw[1] =
169 __gen_offset(values->RegisterAddress, 2, 22) |
170 0;
171
172 uint32_t dw2 =
173 0;
174
175 dw[2] =
176 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
177
178 }
179
180 #define GEN7_PIPELINE_SELECT_length_bias 0x00000001
181 #define GEN7_PIPELINE_SELECT_header \
182 .CommandType = 3, \
183 .CommandSubType = 1, \
184 ._3DCommandOpcode = 1, \
185 ._3DCommandSubOpcode = 4
186
187 #define GEN7_PIPELINE_SELECT_length 0x00000001
188
189 struct GEN7_PIPELINE_SELECT {
190 uint32_t CommandType;
191 uint32_t CommandSubType;
192 uint32_t _3DCommandOpcode;
193 uint32_t _3DCommandSubOpcode;
194 #define _3D 0
195 #define Media 1
196 #define GPGPU 2
197 uint32_t PipelineSelection;
198 };
199
200 static inline void
201 GEN7_PIPELINE_SELECT_pack(__gen_user_data *data, void * restrict dst,
202 const struct GEN7_PIPELINE_SELECT * restrict values)
203 {
204 uint32_t *dw = (uint32_t * restrict) dst;
205
206 dw[0] =
207 __gen_field(values->CommandType, 29, 31) |
208 __gen_field(values->CommandSubType, 27, 28) |
209 __gen_field(values->_3DCommandOpcode, 24, 26) |
210 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
211 __gen_field(values->PipelineSelection, 0, 1) |
212 0;
213
214 }
215
216 #define GEN7_STATE_BASE_ADDRESS_length_bias 0x00000002
217 #define GEN7_STATE_BASE_ADDRESS_header \
218 .CommandType = 3, \
219 .CommandSubType = 0, \
220 ._3DCommandOpcode = 1, \
221 ._3DCommandSubOpcode = 1, \
222 .DwordLength = 8
223
224 #define GEN7_STATE_BASE_ADDRESS_length 0x0000000a
225
226 #define GEN7_MEMORY_OBJECT_CONTROL_STATE_length 0x00000001
227
228 struct GEN7_MEMORY_OBJECT_CONTROL_STATE {
229 uint32_t GraphicsDataTypeGFDT;
230 uint32_t LLCCacheabilityControlLLCCC;
231 uint32_t L3CacheabilityControlL3CC;
232 };
233
234 static inline void
235 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(__gen_user_data *data, void * restrict dst,
236 const struct GEN7_MEMORY_OBJECT_CONTROL_STATE * restrict values)
237 {
238 uint32_t *dw = (uint32_t * restrict) dst;
239
240 dw[0] =
241 __gen_field(values->GraphicsDataTypeGFDT, 2, 2) |
242 __gen_field(values->LLCCacheabilityControlLLCCC, 1, 1) |
243 __gen_field(values->L3CacheabilityControlL3CC, 0, 0) |
244 0;
245
246 }
247
248 struct GEN7_STATE_BASE_ADDRESS {
249 uint32_t CommandType;
250 uint32_t CommandSubType;
251 uint32_t _3DCommandOpcode;
252 uint32_t _3DCommandSubOpcode;
253 uint32_t DwordLength;
254 __gen_address_type GeneralStateBaseAddress;
255 struct GEN7_MEMORY_OBJECT_CONTROL_STATE GeneralStateMemoryObjectControlState;
256 struct GEN7_MEMORY_OBJECT_CONTROL_STATE StatelessDataPortAccessMemoryObjectControlState;
257 uint32_t StatelessDataPortAccessForceWriteThru;
258 bool GeneralStateBaseAddressModifyEnable;
259 __gen_address_type SurfaceStateBaseAddress;
260 struct GEN7_MEMORY_OBJECT_CONTROL_STATE SurfaceStateMemoryObjectControlState;
261 bool SurfaceStateBaseAddressModifyEnable;
262 __gen_address_type DynamicStateBaseAddress;
263 struct GEN7_MEMORY_OBJECT_CONTROL_STATE DynamicStateMemoryObjectControlState;
264 bool DynamicStateBaseAddressModifyEnable;
265 __gen_address_type IndirectObjectBaseAddress;
266 struct GEN7_MEMORY_OBJECT_CONTROL_STATE IndirectObjectMemoryObjectControlState;
267 bool IndirectObjectBaseAddressModifyEnable;
268 __gen_address_type InstructionBaseAddress;
269 struct GEN7_MEMORY_OBJECT_CONTROL_STATE InstructionMemoryObjectControlState;
270 bool InstructionBaseAddressModifyEnable;
271 __gen_address_type GeneralStateAccessUpperBound;
272 bool GeneralStateAccessUpperBoundModifyEnable;
273 __gen_address_type DynamicStateAccessUpperBound;
274 bool DynamicStateAccessUpperBoundModifyEnable;
275 __gen_address_type IndirectObjectAccessUpperBound;
276 bool IndirectObjectAccessUpperBoundModifyEnable;
277 __gen_address_type InstructionAccessUpperBound;
278 bool InstructionAccessUpperBoundModifyEnable;
279 };
280
281 static inline void
282 GEN7_STATE_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
283 const struct GEN7_STATE_BASE_ADDRESS * restrict values)
284 {
285 uint32_t *dw = (uint32_t * restrict) dst;
286
287 dw[0] =
288 __gen_field(values->CommandType, 29, 31) |
289 __gen_field(values->CommandSubType, 27, 28) |
290 __gen_field(values->_3DCommandOpcode, 24, 26) |
291 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
292 __gen_field(values->DwordLength, 0, 7) |
293 0;
294
295 uint32_t dw_GeneralStateMemoryObjectControlState;
296 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_GeneralStateMemoryObjectControlState, &values->GeneralStateMemoryObjectControlState);
297 uint32_t dw_StatelessDataPortAccessMemoryObjectControlState;
298 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StatelessDataPortAccessMemoryObjectControlState, &values->StatelessDataPortAccessMemoryObjectControlState);
299 uint32_t dw1 =
300 __gen_field(dw_GeneralStateMemoryObjectControlState, 8, 11) |
301 __gen_field(dw_StatelessDataPortAccessMemoryObjectControlState, 4, 7) |
302 __gen_field(values->StatelessDataPortAccessForceWriteThru, 3, 3) |
303 __gen_field(values->GeneralStateBaseAddressModifyEnable, 0, 0) |
304 0;
305
306 dw[1] =
307 __gen_combine_address(data, &dw[1], values->GeneralStateBaseAddress, dw1);
308
309 uint32_t dw_SurfaceStateMemoryObjectControlState;
310 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceStateMemoryObjectControlState, &values->SurfaceStateMemoryObjectControlState);
311 uint32_t dw2 =
312 __gen_field(dw_SurfaceStateMemoryObjectControlState, 8, 11) |
313 __gen_field(values->SurfaceStateBaseAddressModifyEnable, 0, 0) |
314 0;
315
316 dw[2] =
317 __gen_combine_address(data, &dw[2], values->SurfaceStateBaseAddress, dw2);
318
319 uint32_t dw_DynamicStateMemoryObjectControlState;
320 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DynamicStateMemoryObjectControlState, &values->DynamicStateMemoryObjectControlState);
321 uint32_t dw3 =
322 __gen_field(dw_DynamicStateMemoryObjectControlState, 8, 11) |
323 __gen_field(values->DynamicStateBaseAddressModifyEnable, 0, 0) |
324 0;
325
326 dw[3] =
327 __gen_combine_address(data, &dw[3], values->DynamicStateBaseAddress, dw3);
328
329 uint32_t dw_IndirectObjectMemoryObjectControlState;
330 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_IndirectObjectMemoryObjectControlState, &values->IndirectObjectMemoryObjectControlState);
331 uint32_t dw4 =
332 __gen_field(dw_IndirectObjectMemoryObjectControlState, 8, 11) |
333 __gen_field(values->IndirectObjectBaseAddressModifyEnable, 0, 0) |
334 0;
335
336 dw[4] =
337 __gen_combine_address(data, &dw[4], values->IndirectObjectBaseAddress, dw4);
338
339 uint32_t dw_InstructionMemoryObjectControlState;
340 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_InstructionMemoryObjectControlState, &values->InstructionMemoryObjectControlState);
341 uint32_t dw5 =
342 __gen_field(dw_InstructionMemoryObjectControlState, 8, 11) |
343 __gen_field(values->InstructionBaseAddressModifyEnable, 0, 0) |
344 0;
345
346 dw[5] =
347 __gen_combine_address(data, &dw[5], values->InstructionBaseAddress, dw5);
348
349 uint32_t dw6 =
350 __gen_field(values->GeneralStateAccessUpperBoundModifyEnable, 0, 0) |
351 0;
352
353 dw[6] =
354 __gen_combine_address(data, &dw[6], values->GeneralStateAccessUpperBound, dw6);
355
356 uint32_t dw7 =
357 __gen_field(values->DynamicStateAccessUpperBoundModifyEnable, 0, 0) |
358 0;
359
360 dw[7] =
361 __gen_combine_address(data, &dw[7], values->DynamicStateAccessUpperBound, dw7);
362
363 uint32_t dw8 =
364 __gen_field(values->IndirectObjectAccessUpperBoundModifyEnable, 0, 0) |
365 0;
366
367 dw[8] =
368 __gen_combine_address(data, &dw[8], values->IndirectObjectAccessUpperBound, dw8);
369
370 uint32_t dw9 =
371 __gen_field(values->InstructionAccessUpperBoundModifyEnable, 0, 0) |
372 0;
373
374 dw[9] =
375 __gen_combine_address(data, &dw[9], values->InstructionAccessUpperBound, dw9);
376
377 }
378
379 #define GEN7_STATE_PREFETCH_length_bias 0x00000002
380 #define GEN7_STATE_PREFETCH_header \
381 .CommandType = 3, \
382 .CommandSubType = 0, \
383 ._3DCommandOpcode = 0, \
384 ._3DCommandSubOpcode = 3, \
385 .DwordLength = 0
386
387 #define GEN7_STATE_PREFETCH_length 0x00000002
388
389 struct GEN7_STATE_PREFETCH {
390 uint32_t CommandType;
391 uint32_t CommandSubType;
392 uint32_t _3DCommandOpcode;
393 uint32_t _3DCommandSubOpcode;
394 uint32_t DwordLength;
395 __gen_address_type PrefetchPointer;
396 uint32_t PrefetchCount;
397 };
398
399 static inline void
400 GEN7_STATE_PREFETCH_pack(__gen_user_data *data, void * restrict dst,
401 const struct GEN7_STATE_PREFETCH * restrict values)
402 {
403 uint32_t *dw = (uint32_t * restrict) dst;
404
405 dw[0] =
406 __gen_field(values->CommandType, 29, 31) |
407 __gen_field(values->CommandSubType, 27, 28) |
408 __gen_field(values->_3DCommandOpcode, 24, 26) |
409 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
410 __gen_field(values->DwordLength, 0, 7) |
411 0;
412
413 uint32_t dw1 =
414 __gen_field(values->PrefetchCount, 0, 2) |
415 0;
416
417 dw[1] =
418 __gen_combine_address(data, &dw[1], values->PrefetchPointer, dw1);
419
420 }
421
422 #define GEN7_STATE_SIP_length_bias 0x00000002
423 #define GEN7_STATE_SIP_header \
424 .CommandType = 3, \
425 .CommandSubType = 0, \
426 ._3DCommandOpcode = 1, \
427 ._3DCommandSubOpcode = 2, \
428 .DwordLength = 0
429
430 #define GEN7_STATE_SIP_length 0x00000002
431
432 struct GEN7_STATE_SIP {
433 uint32_t CommandType;
434 uint32_t CommandSubType;
435 uint32_t _3DCommandOpcode;
436 uint32_t _3DCommandSubOpcode;
437 uint32_t DwordLength;
438 uint32_t SystemInstructionPointer;
439 };
440
441 static inline void
442 GEN7_STATE_SIP_pack(__gen_user_data *data, void * restrict dst,
443 const struct GEN7_STATE_SIP * restrict values)
444 {
445 uint32_t *dw = (uint32_t * restrict) dst;
446
447 dw[0] =
448 __gen_field(values->CommandType, 29, 31) |
449 __gen_field(values->CommandSubType, 27, 28) |
450 __gen_field(values->_3DCommandOpcode, 24, 26) |
451 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
452 __gen_field(values->DwordLength, 0, 7) |
453 0;
454
455 dw[1] =
456 __gen_offset(values->SystemInstructionPointer, 4, 31) |
457 0;
458
459 }
460
461 #define GEN7_SWTESS_BASE_ADDRESS_length_bias 0x00000002
462 #define GEN7_SWTESS_BASE_ADDRESS_header \
463 .CommandType = 3, \
464 .CommandSubType = 0, \
465 ._3DCommandOpcode = 1, \
466 ._3DCommandSubOpcode = 3, \
467 .DwordLength = 0
468
469 #define GEN7_SWTESS_BASE_ADDRESS_length 0x00000002
470
471 struct GEN7_SWTESS_BASE_ADDRESS {
472 uint32_t CommandType;
473 uint32_t CommandSubType;
474 uint32_t _3DCommandOpcode;
475 uint32_t _3DCommandSubOpcode;
476 uint32_t DwordLength;
477 __gen_address_type SWTessellationBaseAddress;
478 struct GEN7_MEMORY_OBJECT_CONTROL_STATE SWTessellationMemoryObjectControlState;
479 };
480
481 static inline void
482 GEN7_SWTESS_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
483 const struct GEN7_SWTESS_BASE_ADDRESS * restrict values)
484 {
485 uint32_t *dw = (uint32_t * restrict) dst;
486
487 dw[0] =
488 __gen_field(values->CommandType, 29, 31) |
489 __gen_field(values->CommandSubType, 27, 28) |
490 __gen_field(values->_3DCommandOpcode, 24, 26) |
491 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
492 __gen_field(values->DwordLength, 0, 7) |
493 0;
494
495 uint32_t dw_SWTessellationMemoryObjectControlState;
496 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SWTessellationMemoryObjectControlState, &values->SWTessellationMemoryObjectControlState);
497 uint32_t dw1 =
498 __gen_field(dw_SWTessellationMemoryObjectControlState, 8, 11) |
499 0;
500
501 dw[1] =
502 __gen_combine_address(data, &dw[1], values->SWTessellationBaseAddress, dw1);
503
504 }
505
506 #define GEN7_3DPRIMITIVE_length_bias 0x00000002
507 #define GEN7_3DPRIMITIVE_header \
508 .CommandType = 3, \
509 .CommandSubType = 3, \
510 ._3DCommandOpcode = 3, \
511 ._3DCommandSubOpcode = 0, \
512 .DwordLength = 5
513
514 #define GEN7_3DPRIMITIVE_length 0x00000007
515
516 struct GEN7_3DPRIMITIVE {
517 uint32_t CommandType;
518 uint32_t CommandSubType;
519 uint32_t _3DCommandOpcode;
520 uint32_t _3DCommandSubOpcode;
521 bool IndirectParameterEnable;
522 bool PredicateEnable;
523 uint32_t DwordLength;
524 bool EndOffsetEnable;
525 #define SEQUENTIAL 0
526 #define RANDOM 1
527 uint32_t VertexAccessType;
528 uint32_t PrimitiveTopologyType;
529 uint32_t VertexCountPerInstance;
530 uint32_t StartVertexLocation;
531 uint32_t InstanceCount;
532 uint32_t StartInstanceLocation;
533 uint32_t BaseVertexLocation;
534 };
535
536 static inline void
537 GEN7_3DPRIMITIVE_pack(__gen_user_data *data, void * restrict dst,
538 const struct GEN7_3DPRIMITIVE * restrict values)
539 {
540 uint32_t *dw = (uint32_t * restrict) dst;
541
542 dw[0] =
543 __gen_field(values->CommandType, 29, 31) |
544 __gen_field(values->CommandSubType, 27, 28) |
545 __gen_field(values->_3DCommandOpcode, 24, 26) |
546 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
547 __gen_field(values->IndirectParameterEnable, 10, 10) |
548 __gen_field(values->PredicateEnable, 8, 8) |
549 __gen_field(values->DwordLength, 0, 7) |
550 0;
551
552 dw[1] =
553 __gen_field(values->EndOffsetEnable, 9, 9) |
554 __gen_field(values->VertexAccessType, 8, 8) |
555 __gen_field(values->PrimitiveTopologyType, 0, 5) |
556 0;
557
558 dw[2] =
559 __gen_field(values->VertexCountPerInstance, 0, 31) |
560 0;
561
562 dw[3] =
563 __gen_field(values->StartVertexLocation, 0, 31) |
564 0;
565
566 dw[4] =
567 __gen_field(values->InstanceCount, 0, 31) |
568 0;
569
570 dw[5] =
571 __gen_field(values->StartInstanceLocation, 0, 31) |
572 0;
573
574 dw[6] =
575 __gen_field(values->BaseVertexLocation, 0, 31) |
576 0;
577
578 }
579
580 #define GEN7_3DSTATE_AA_LINE_PARAMETERS_length_bias 0x00000002
581 #define GEN7_3DSTATE_AA_LINE_PARAMETERS_header \
582 .CommandType = 3, \
583 .CommandSubType = 3, \
584 ._3DCommandOpcode = 1, \
585 ._3DCommandSubOpcode = 10, \
586 .DwordLength = 1
587
588 #define GEN7_3DSTATE_AA_LINE_PARAMETERS_length 0x00000003
589
590 struct GEN7_3DSTATE_AA_LINE_PARAMETERS {
591 uint32_t CommandType;
592 uint32_t CommandSubType;
593 uint32_t _3DCommandOpcode;
594 uint32_t _3DCommandSubOpcode;
595 uint32_t DwordLength;
596 float AACoverageBias;
597 float AACoverageSlope;
598 float AACoverageEndCapBias;
599 float AACoverageEndCapSlope;
600 };
601
602 static inline void
603 GEN7_3DSTATE_AA_LINE_PARAMETERS_pack(__gen_user_data *data, void * restrict dst,
604 const struct GEN7_3DSTATE_AA_LINE_PARAMETERS * restrict values)
605 {
606 uint32_t *dw = (uint32_t * restrict) dst;
607
608 dw[0] =
609 __gen_field(values->CommandType, 29, 31) |
610 __gen_field(values->CommandSubType, 27, 28) |
611 __gen_field(values->_3DCommandOpcode, 24, 26) |
612 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
613 __gen_field(values->DwordLength, 0, 7) |
614 0;
615
616 dw[1] =
617 __gen_field(values->AACoverageBias * (1 << 8), 16, 23) |
618 __gen_field(values->AACoverageSlope * (1 << 8), 0, 7) |
619 0;
620
621 dw[2] =
622 __gen_field(values->AACoverageEndCapBias * (1 << 8), 16, 23) |
623 __gen_field(values->AACoverageEndCapSlope * (1 << 8), 0, 7) |
624 0;
625
626 }
627
628 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_length_bias 0x00000002
629 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_header\
630 .CommandType = 3, \
631 .CommandSubType = 3, \
632 ._3DCommandOpcode = 0, \
633 ._3DCommandSubOpcode = 40, \
634 .DwordLength = 0
635
636 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_length 0x00000002
637
638 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS {
639 uint32_t CommandType;
640 uint32_t CommandSubType;
641 uint32_t _3DCommandOpcode;
642 uint32_t _3DCommandSubOpcode;
643 uint32_t DwordLength;
644 uint32_t PointertoDSBindingTable;
645 };
646
647 static inline void
648 GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
649 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS * restrict values)
650 {
651 uint32_t *dw = (uint32_t * restrict) dst;
652
653 dw[0] =
654 __gen_field(values->CommandType, 29, 31) |
655 __gen_field(values->CommandSubType, 27, 28) |
656 __gen_field(values->_3DCommandOpcode, 24, 26) |
657 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
658 __gen_field(values->DwordLength, 0, 7) |
659 0;
660
661 dw[1] =
662 __gen_offset(values->PointertoDSBindingTable, 5, 15) |
663 0;
664
665 }
666
667 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_length_bias 0x00000002
668 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_header\
669 .CommandType = 3, \
670 .CommandSubType = 3, \
671 ._3DCommandOpcode = 0, \
672 ._3DCommandSubOpcode = 41, \
673 .DwordLength = 0
674
675 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_length 0x00000002
676
677 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS {
678 uint32_t CommandType;
679 uint32_t CommandSubType;
680 uint32_t _3DCommandOpcode;
681 uint32_t _3DCommandSubOpcode;
682 uint32_t DwordLength;
683 uint32_t PointertoGSBindingTable;
684 };
685
686 static inline void
687 GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
688 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS * restrict values)
689 {
690 uint32_t *dw = (uint32_t * restrict) dst;
691
692 dw[0] =
693 __gen_field(values->CommandType, 29, 31) |
694 __gen_field(values->CommandSubType, 27, 28) |
695 __gen_field(values->_3DCommandOpcode, 24, 26) |
696 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
697 __gen_field(values->DwordLength, 0, 7) |
698 0;
699
700 dw[1] =
701 __gen_offset(values->PointertoGSBindingTable, 5, 15) |
702 0;
703
704 }
705
706 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_length_bias 0x00000002
707 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_header\
708 .CommandType = 3, \
709 .CommandSubType = 3, \
710 ._3DCommandOpcode = 0, \
711 ._3DCommandSubOpcode = 39, \
712 .DwordLength = 0
713
714 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_length 0x00000002
715
716 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS {
717 uint32_t CommandType;
718 uint32_t CommandSubType;
719 uint32_t _3DCommandOpcode;
720 uint32_t _3DCommandSubOpcode;
721 uint32_t DwordLength;
722 uint32_t PointertoHSBindingTable;
723 };
724
725 static inline void
726 GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
727 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS * restrict values)
728 {
729 uint32_t *dw = (uint32_t * restrict) dst;
730
731 dw[0] =
732 __gen_field(values->CommandType, 29, 31) |
733 __gen_field(values->CommandSubType, 27, 28) |
734 __gen_field(values->_3DCommandOpcode, 24, 26) |
735 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
736 __gen_field(values->DwordLength, 0, 7) |
737 0;
738
739 dw[1] =
740 __gen_offset(values->PointertoHSBindingTable, 5, 15) |
741 0;
742
743 }
744
745 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_length_bias 0x00000002
746 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_header\
747 .CommandType = 3, \
748 .CommandSubType = 3, \
749 ._3DCommandOpcode = 0, \
750 ._3DCommandSubOpcode = 42, \
751 .DwordLength = 0
752
753 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_length 0x00000002
754
755 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS {
756 uint32_t CommandType;
757 uint32_t CommandSubType;
758 uint32_t _3DCommandOpcode;
759 uint32_t _3DCommandSubOpcode;
760 uint32_t DwordLength;
761 uint32_t PointertoPSBindingTable;
762 };
763
764 static inline void
765 GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
766 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS * restrict values)
767 {
768 uint32_t *dw = (uint32_t * restrict) dst;
769
770 dw[0] =
771 __gen_field(values->CommandType, 29, 31) |
772 __gen_field(values->CommandSubType, 27, 28) |
773 __gen_field(values->_3DCommandOpcode, 24, 26) |
774 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
775 __gen_field(values->DwordLength, 0, 7) |
776 0;
777
778 dw[1] =
779 __gen_offset(values->PointertoPSBindingTable, 5, 15) |
780 0;
781
782 }
783
784 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_length_bias 0x00000002
785 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_header\
786 .CommandType = 3, \
787 .CommandSubType = 3, \
788 ._3DCommandOpcode = 0, \
789 ._3DCommandSubOpcode = 38, \
790 .DwordLength = 0
791
792 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_length 0x00000002
793
794 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS {
795 uint32_t CommandType;
796 uint32_t CommandSubType;
797 uint32_t _3DCommandOpcode;
798 uint32_t _3DCommandSubOpcode;
799 uint32_t DwordLength;
800 uint32_t PointertoVSBindingTable;
801 };
802
803 static inline void
804 GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
805 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS * restrict values)
806 {
807 uint32_t *dw = (uint32_t * restrict) dst;
808
809 dw[0] =
810 __gen_field(values->CommandType, 29, 31) |
811 __gen_field(values->CommandSubType, 27, 28) |
812 __gen_field(values->_3DCommandOpcode, 24, 26) |
813 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
814 __gen_field(values->DwordLength, 0, 7) |
815 0;
816
817 dw[1] =
818 __gen_offset(values->PointertoVSBindingTable, 5, 15) |
819 0;
820
821 }
822
823 #define GEN7_3DSTATE_BLEND_STATE_POINTERS_length_bias 0x00000002
824 #define GEN7_3DSTATE_BLEND_STATE_POINTERS_header\
825 .CommandType = 3, \
826 .CommandSubType = 3, \
827 ._3DCommandOpcode = 0, \
828 ._3DCommandSubOpcode = 36, \
829 .DwordLength = 0
830
831 #define GEN7_3DSTATE_BLEND_STATE_POINTERS_length 0x00000002
832
833 struct GEN7_3DSTATE_BLEND_STATE_POINTERS {
834 uint32_t CommandType;
835 uint32_t CommandSubType;
836 uint32_t _3DCommandOpcode;
837 uint32_t _3DCommandSubOpcode;
838 uint32_t DwordLength;
839 uint32_t BlendStatePointer;
840 };
841
842 static inline void
843 GEN7_3DSTATE_BLEND_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
844 const struct GEN7_3DSTATE_BLEND_STATE_POINTERS * restrict values)
845 {
846 uint32_t *dw = (uint32_t * restrict) dst;
847
848 dw[0] =
849 __gen_field(values->CommandType, 29, 31) |
850 __gen_field(values->CommandSubType, 27, 28) |
851 __gen_field(values->_3DCommandOpcode, 24, 26) |
852 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
853 __gen_field(values->DwordLength, 0, 7) |
854 0;
855
856 dw[1] =
857 __gen_offset(values->BlendStatePointer, 6, 31) |
858 __gen_mbo(0, 0) |
859 0;
860
861 }
862
863 #define GEN7_3DSTATE_CC_STATE_POINTERS_length_bias 0x00000002
864 #define GEN7_3DSTATE_CC_STATE_POINTERS_header \
865 .CommandType = 3, \
866 .CommandSubType = 3, \
867 ._3DCommandOpcode = 0, \
868 ._3DCommandSubOpcode = 14, \
869 .DwordLength = 0
870
871 #define GEN7_3DSTATE_CC_STATE_POINTERS_length 0x00000002
872
873 struct GEN7_3DSTATE_CC_STATE_POINTERS {
874 uint32_t CommandType;
875 uint32_t CommandSubType;
876 uint32_t _3DCommandOpcode;
877 uint32_t _3DCommandSubOpcode;
878 uint32_t DwordLength;
879 uint32_t ColorCalcStatePointer;
880 };
881
882 static inline void
883 GEN7_3DSTATE_CC_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
884 const struct GEN7_3DSTATE_CC_STATE_POINTERS * restrict values)
885 {
886 uint32_t *dw = (uint32_t * restrict) dst;
887
888 dw[0] =
889 __gen_field(values->CommandType, 29, 31) |
890 __gen_field(values->CommandSubType, 27, 28) |
891 __gen_field(values->_3DCommandOpcode, 24, 26) |
892 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
893 __gen_field(values->DwordLength, 0, 7) |
894 0;
895
896 dw[1] =
897 __gen_offset(values->ColorCalcStatePointer, 6, 31) |
898 __gen_mbo(0, 0) |
899 0;
900
901 }
902
903 #define GEN7_3DSTATE_CHROMA_KEY_length_bias 0x00000002
904 #define GEN7_3DSTATE_CHROMA_KEY_header \
905 .CommandType = 3, \
906 .CommandSubType = 3, \
907 ._3DCommandOpcode = 1, \
908 ._3DCommandSubOpcode = 4, \
909 .DwordLength = 2
910
911 #define GEN7_3DSTATE_CHROMA_KEY_length 0x00000004
912
913 struct GEN7_3DSTATE_CHROMA_KEY {
914 uint32_t CommandType;
915 uint32_t CommandSubType;
916 uint32_t _3DCommandOpcode;
917 uint32_t _3DCommandSubOpcode;
918 uint32_t DwordLength;
919 uint32_t ChromaKeyTableIndex;
920 uint32_t ChromaKeyLowValue;
921 uint32_t ChromaKeyHighValue;
922 };
923
924 static inline void
925 GEN7_3DSTATE_CHROMA_KEY_pack(__gen_user_data *data, void * restrict dst,
926 const struct GEN7_3DSTATE_CHROMA_KEY * restrict values)
927 {
928 uint32_t *dw = (uint32_t * restrict) dst;
929
930 dw[0] =
931 __gen_field(values->CommandType, 29, 31) |
932 __gen_field(values->CommandSubType, 27, 28) |
933 __gen_field(values->_3DCommandOpcode, 24, 26) |
934 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
935 __gen_field(values->DwordLength, 0, 7) |
936 0;
937
938 dw[1] =
939 __gen_field(values->ChromaKeyTableIndex, 30, 31) |
940 0;
941
942 dw[2] =
943 __gen_field(values->ChromaKeyLowValue, 0, 31) |
944 0;
945
946 dw[3] =
947 __gen_field(values->ChromaKeyHighValue, 0, 31) |
948 0;
949
950 }
951
952 #define GEN7_3DSTATE_CLEAR_PARAMS_length_bias 0x00000002
953 #define GEN7_3DSTATE_CLEAR_PARAMS_header \
954 .CommandType = 3, \
955 .CommandSubType = 3, \
956 ._3DCommandOpcode = 0, \
957 ._3DCommandSubOpcode = 4, \
958 .DwordLength = 1
959
960 #define GEN7_3DSTATE_CLEAR_PARAMS_length 0x00000003
961
962 struct GEN7_3DSTATE_CLEAR_PARAMS {
963 uint32_t CommandType;
964 uint32_t CommandSubType;
965 uint32_t _3DCommandOpcode;
966 uint32_t _3DCommandSubOpcode;
967 uint32_t DwordLength;
968 uint32_t DepthClearValue;
969 bool DepthClearValueValid;
970 };
971
972 static inline void
973 GEN7_3DSTATE_CLEAR_PARAMS_pack(__gen_user_data *data, void * restrict dst,
974 const struct GEN7_3DSTATE_CLEAR_PARAMS * restrict values)
975 {
976 uint32_t *dw = (uint32_t * restrict) dst;
977
978 dw[0] =
979 __gen_field(values->CommandType, 29, 31) |
980 __gen_field(values->CommandSubType, 27, 28) |
981 __gen_field(values->_3DCommandOpcode, 24, 26) |
982 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
983 __gen_field(values->DwordLength, 0, 7) |
984 0;
985
986 dw[1] =
987 __gen_field(values->DepthClearValue, 0, 31) |
988 0;
989
990 dw[2] =
991 __gen_field(values->DepthClearValueValid, 0, 0) |
992 0;
993
994 }
995
996 #define GEN7_3DSTATE_CLIP_length_bias 0x00000002
997 #define GEN7_3DSTATE_CLIP_header \
998 .CommandType = 3, \
999 .CommandSubType = 3, \
1000 ._3DCommandOpcode = 0, \
1001 ._3DCommandSubOpcode = 18, \
1002 .DwordLength = 2
1003
1004 #define GEN7_3DSTATE_CLIP_length 0x00000004
1005
1006 struct GEN7_3DSTATE_CLIP {
1007 uint32_t CommandType;
1008 uint32_t CommandSubType;
1009 uint32_t _3DCommandOpcode;
1010 uint32_t _3DCommandSubOpcode;
1011 uint32_t DwordLength;
1012 uint32_t FrontWinding;
1013 uint32_t VertexSubPixelPrecisionSelect;
1014 bool EarlyCullEnable;
1015 #define CULLMODE_BOTH 0
1016 #define CULLMODE_NONE 1
1017 #define CULLMODE_FRONT 2
1018 #define CULLMODE_BACK 3
1019 uint32_t CullMode;
1020 bool ClipperStatisticsEnable;
1021 uint32_t UserClipDistanceCullTestEnableBitmask;
1022 bool ClipEnable;
1023 #define APIMODE_OGL 0
1024 uint32_t APIMode;
1025 bool ViewportXYClipTestEnable;
1026 bool ViewportZClipTestEnable;
1027 bool GuardbandClipTestEnable;
1028 uint32_t UserClipDistanceClipTestEnableBitmask;
1029 #define CLIPMODE_NORMAL 0
1030 #define CLIPMODE_REJECT_ALL 3
1031 #define CLIPMODE_ACCEPT_ALL 4
1032 uint32_t ClipMode;
1033 bool PerspectiveDivideDisable;
1034 bool NonPerspectiveBarycentricEnable;
1035 #define Vertex0 0
1036 #define Vertex1 1
1037 #define Vertex2 2
1038 uint32_t TriangleStripListProvokingVertexSelect;
1039 #define Vertex0 0
1040 #define Vertex1 1
1041 uint32_t LineStripListProvokingVertexSelect;
1042 #define Vertex0 0
1043 #define Vertex1 1
1044 #define Vertex2 2
1045 uint32_t TriangleFanProvokingVertexSelect;
1046 float MinimumPointWidth;
1047 float MaximumPointWidth;
1048 bool ForceZeroRTAIndexEnable;
1049 uint32_t MaximumVPIndex;
1050 };
1051
1052 static inline void
1053 GEN7_3DSTATE_CLIP_pack(__gen_user_data *data, void * restrict dst,
1054 const struct GEN7_3DSTATE_CLIP * restrict values)
1055 {
1056 uint32_t *dw = (uint32_t * restrict) dst;
1057
1058 dw[0] =
1059 __gen_field(values->CommandType, 29, 31) |
1060 __gen_field(values->CommandSubType, 27, 28) |
1061 __gen_field(values->_3DCommandOpcode, 24, 26) |
1062 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1063 __gen_field(values->DwordLength, 0, 7) |
1064 0;
1065
1066 dw[1] =
1067 __gen_field(values->FrontWinding, 20, 20) |
1068 __gen_field(values->VertexSubPixelPrecisionSelect, 19, 19) |
1069 __gen_field(values->EarlyCullEnable, 18, 18) |
1070 __gen_field(values->CullMode, 16, 17) |
1071 __gen_field(values->ClipperStatisticsEnable, 10, 10) |
1072 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
1073 0;
1074
1075 dw[2] =
1076 __gen_field(values->ClipEnable, 31, 31) |
1077 __gen_field(values->APIMode, 30, 30) |
1078 __gen_field(values->ViewportXYClipTestEnable, 28, 28) |
1079 __gen_field(values->ViewportZClipTestEnable, 27, 27) |
1080 __gen_field(values->GuardbandClipTestEnable, 26, 26) |
1081 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 16, 23) |
1082 __gen_field(values->ClipMode, 13, 15) |
1083 __gen_field(values->PerspectiveDivideDisable, 9, 9) |
1084 __gen_field(values->NonPerspectiveBarycentricEnable, 8, 8) |
1085 __gen_field(values->TriangleStripListProvokingVertexSelect, 4, 5) |
1086 __gen_field(values->LineStripListProvokingVertexSelect, 2, 3) |
1087 __gen_field(values->TriangleFanProvokingVertexSelect, 0, 1) |
1088 0;
1089
1090 dw[3] =
1091 __gen_field(values->MinimumPointWidth * (1 << 3), 17, 27) |
1092 __gen_field(values->MaximumPointWidth * (1 << 3), 6, 16) |
1093 __gen_field(values->ForceZeroRTAIndexEnable, 5, 5) |
1094 __gen_field(values->MaximumVPIndex, 0, 3) |
1095 0;
1096
1097 }
1098
1099 #define GEN7_3DSTATE_CONSTANT_DS_length_bias 0x00000002
1100 #define GEN7_3DSTATE_CONSTANT_DS_header \
1101 .CommandType = 3, \
1102 .CommandSubType = 3, \
1103 ._3DCommandOpcode = 0, \
1104 ._3DCommandSubOpcode = 26, \
1105 .DwordLength = 5
1106
1107 #define GEN7_3DSTATE_CONSTANT_DS_length 0x00000007
1108
1109 #define GEN7_3DSTATE_CONSTANT_BODY_length 0x00000006
1110
1111 struct GEN7_3DSTATE_CONSTANT_BODY {
1112 uint32_t ConstantBuffer1ReadLength;
1113 uint32_t ConstantBuffer0ReadLength;
1114 uint32_t ConstantBuffer3ReadLength;
1115 uint32_t ConstantBuffer2ReadLength;
1116 __gen_address_type PointerToConstantBuffer0;
1117 struct GEN7_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
1118 __gen_address_type PointerToConstantBuffer1;
1119 __gen_address_type PointerToConstantBuffer2;
1120 __gen_address_type PointerToConstantBuffer3;
1121 };
1122
1123 static inline void
1124 GEN7_3DSTATE_CONSTANT_BODY_pack(__gen_user_data *data, void * restrict dst,
1125 const struct GEN7_3DSTATE_CONSTANT_BODY * restrict values)
1126 {
1127 uint32_t *dw = (uint32_t * restrict) dst;
1128
1129 dw[0] =
1130 __gen_field(values->ConstantBuffer1ReadLength, 16, 31) |
1131 __gen_field(values->ConstantBuffer0ReadLength, 0, 15) |
1132 0;
1133
1134 dw[1] =
1135 __gen_field(values->ConstantBuffer3ReadLength, 16, 31) |
1136 __gen_field(values->ConstantBuffer2ReadLength, 0, 15) |
1137 0;
1138
1139 uint32_t dw_ConstantBufferObjectControlState;
1140 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
1141 uint32_t dw2 =
1142 __gen_field(dw_ConstantBufferObjectControlState, 0, 4) |
1143 0;
1144
1145 dw[2] =
1146 __gen_combine_address(data, &dw[2], values->PointerToConstantBuffer0, dw2);
1147
1148 uint32_t dw3 =
1149 0;
1150
1151 dw[3] =
1152 __gen_combine_address(data, &dw[3], values->PointerToConstantBuffer1, dw3);
1153
1154 uint32_t dw4 =
1155 0;
1156
1157 dw[4] =
1158 __gen_combine_address(data, &dw[4], values->PointerToConstantBuffer2, dw4);
1159
1160 uint32_t dw5 =
1161 0;
1162
1163 dw[5] =
1164 __gen_combine_address(data, &dw[5], values->PointerToConstantBuffer3, dw5);
1165
1166 }
1167
1168 struct GEN7_3DSTATE_CONSTANT_DS {
1169 uint32_t CommandType;
1170 uint32_t CommandSubType;
1171 uint32_t _3DCommandOpcode;
1172 uint32_t _3DCommandSubOpcode;
1173 uint32_t DwordLength;
1174 struct GEN7_3DSTATE_CONSTANT_BODY ConstantBody;
1175 };
1176
1177 static inline void
1178 GEN7_3DSTATE_CONSTANT_DS_pack(__gen_user_data *data, void * restrict dst,
1179 const struct GEN7_3DSTATE_CONSTANT_DS * restrict values)
1180 {
1181 uint32_t *dw = (uint32_t * restrict) dst;
1182
1183 dw[0] =
1184 __gen_field(values->CommandType, 29, 31) |
1185 __gen_field(values->CommandSubType, 27, 28) |
1186 __gen_field(values->_3DCommandOpcode, 24, 26) |
1187 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1188 __gen_field(values->DwordLength, 0, 7) |
1189 0;
1190
1191 GEN7_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1192 }
1193
1194 #define GEN7_3DSTATE_CONSTANT_GS_length_bias 0x00000002
1195 #define GEN7_3DSTATE_CONSTANT_GS_header \
1196 .CommandType = 3, \
1197 .CommandSubType = 3, \
1198 ._3DCommandOpcode = 0, \
1199 ._3DCommandSubOpcode = 22, \
1200 .DwordLength = 5
1201
1202 #define GEN7_3DSTATE_CONSTANT_GS_length 0x00000007
1203
1204 struct GEN7_3DSTATE_CONSTANT_GS {
1205 uint32_t CommandType;
1206 uint32_t CommandSubType;
1207 uint32_t _3DCommandOpcode;
1208 uint32_t _3DCommandSubOpcode;
1209 uint32_t DwordLength;
1210 struct GEN7_3DSTATE_CONSTANT_BODY ConstantBody;
1211 };
1212
1213 static inline void
1214 GEN7_3DSTATE_CONSTANT_GS_pack(__gen_user_data *data, void * restrict dst,
1215 const struct GEN7_3DSTATE_CONSTANT_GS * restrict values)
1216 {
1217 uint32_t *dw = (uint32_t * restrict) dst;
1218
1219 dw[0] =
1220 __gen_field(values->CommandType, 29, 31) |
1221 __gen_field(values->CommandSubType, 27, 28) |
1222 __gen_field(values->_3DCommandOpcode, 24, 26) |
1223 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1224 __gen_field(values->DwordLength, 0, 7) |
1225 0;
1226
1227 GEN7_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1228 }
1229
1230 #define GEN7_3DSTATE_CONSTANT_HS_length_bias 0x00000002
1231 #define GEN7_3DSTATE_CONSTANT_HS_header \
1232 .CommandType = 3, \
1233 .CommandSubType = 3, \
1234 ._3DCommandOpcode = 0, \
1235 ._3DCommandSubOpcode = 25, \
1236 .DwordLength = 5
1237
1238 #define GEN7_3DSTATE_CONSTANT_HS_length 0x00000007
1239
1240 struct GEN7_3DSTATE_CONSTANT_HS {
1241 uint32_t CommandType;
1242 uint32_t CommandSubType;
1243 uint32_t _3DCommandOpcode;
1244 uint32_t _3DCommandSubOpcode;
1245 uint32_t DwordLength;
1246 struct GEN7_3DSTATE_CONSTANT_BODY ConstantBody;
1247 };
1248
1249 static inline void
1250 GEN7_3DSTATE_CONSTANT_HS_pack(__gen_user_data *data, void * restrict dst,
1251 const struct GEN7_3DSTATE_CONSTANT_HS * restrict values)
1252 {
1253 uint32_t *dw = (uint32_t * restrict) dst;
1254
1255 dw[0] =
1256 __gen_field(values->CommandType, 29, 31) |
1257 __gen_field(values->CommandSubType, 27, 28) |
1258 __gen_field(values->_3DCommandOpcode, 24, 26) |
1259 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1260 __gen_field(values->DwordLength, 0, 7) |
1261 0;
1262
1263 GEN7_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1264 }
1265
1266 #define GEN7_3DSTATE_CONSTANT_PS_length_bias 0x00000002
1267 #define GEN7_3DSTATE_CONSTANT_PS_header \
1268 .CommandType = 3, \
1269 .CommandSubType = 3, \
1270 ._3DCommandOpcode = 0, \
1271 ._3DCommandSubOpcode = 23, \
1272 .DwordLength = 5
1273
1274 #define GEN7_3DSTATE_CONSTANT_PS_length 0x00000007
1275
1276 struct GEN7_3DSTATE_CONSTANT_PS {
1277 uint32_t CommandType;
1278 uint32_t CommandSubType;
1279 uint32_t _3DCommandOpcode;
1280 uint32_t _3DCommandSubOpcode;
1281 uint32_t DwordLength;
1282 struct GEN7_3DSTATE_CONSTANT_BODY ConstantBody;
1283 };
1284
1285 static inline void
1286 GEN7_3DSTATE_CONSTANT_PS_pack(__gen_user_data *data, void * restrict dst,
1287 const struct GEN7_3DSTATE_CONSTANT_PS * restrict values)
1288 {
1289 uint32_t *dw = (uint32_t * restrict) dst;
1290
1291 dw[0] =
1292 __gen_field(values->CommandType, 29, 31) |
1293 __gen_field(values->CommandSubType, 27, 28) |
1294 __gen_field(values->_3DCommandOpcode, 24, 26) |
1295 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1296 __gen_field(values->DwordLength, 0, 7) |
1297 0;
1298
1299 GEN7_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1300 }
1301
1302 #define GEN7_3DSTATE_CONSTANT_VS_length_bias 0x00000002
1303 #define GEN7_3DSTATE_CONSTANT_VS_header \
1304 .CommandType = 3, \
1305 .CommandSubType = 3, \
1306 ._3DCommandOpcode = 0, \
1307 ._3DCommandSubOpcode = 21, \
1308 .DwordLength = 5
1309
1310 #define GEN7_3DSTATE_CONSTANT_VS_length 0x00000007
1311
1312 struct GEN7_3DSTATE_CONSTANT_VS {
1313 uint32_t CommandType;
1314 uint32_t CommandSubType;
1315 uint32_t _3DCommandOpcode;
1316 uint32_t _3DCommandSubOpcode;
1317 uint32_t DwordLength;
1318 struct GEN7_3DSTATE_CONSTANT_BODY ConstantBody;
1319 };
1320
1321 static inline void
1322 GEN7_3DSTATE_CONSTANT_VS_pack(__gen_user_data *data, void * restrict dst,
1323 const struct GEN7_3DSTATE_CONSTANT_VS * restrict values)
1324 {
1325 uint32_t *dw = (uint32_t * restrict) dst;
1326
1327 dw[0] =
1328 __gen_field(values->CommandType, 29, 31) |
1329 __gen_field(values->CommandSubType, 27, 28) |
1330 __gen_field(values->_3DCommandOpcode, 24, 26) |
1331 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1332 __gen_field(values->DwordLength, 0, 7) |
1333 0;
1334
1335 GEN7_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1336 }
1337
1338 #define GEN7_3DSTATE_DEPTH_BUFFER_length_bias 0x00000002
1339 #define GEN7_3DSTATE_DEPTH_BUFFER_header \
1340 .CommandType = 3, \
1341 .CommandSubType = 3, \
1342 ._3DCommandOpcode = 0, \
1343 ._3DCommandSubOpcode = 5, \
1344 .DwordLength = 5
1345
1346 #define GEN7_3DSTATE_DEPTH_BUFFER_length 0x00000007
1347
1348 struct GEN7_3DSTATE_DEPTH_BUFFER {
1349 uint32_t CommandType;
1350 uint32_t CommandSubType;
1351 uint32_t _3DCommandOpcode;
1352 uint32_t _3DCommandSubOpcode;
1353 uint32_t DwordLength;
1354 #define SURFTYPE_1D 0
1355 #define SURFTYPE_2D 1
1356 #define SURFTYPE_3D 2
1357 #define SURFTYPE_CUBE 3
1358 #define SURFTYPE_NULL 7
1359 uint32_t SurfaceType;
1360 bool DepthWriteEnable;
1361 bool StencilWriteEnable;
1362 bool HierarchicalDepthBufferEnable;
1363 #define D32_FLOAT 1
1364 #define D24_UNORM_X8_UINT 3
1365 #define D16_UNORM 5
1366 uint32_t SurfaceFormat;
1367 uint32_t SurfacePitch;
1368 __gen_address_type SurfaceBaseAddress;
1369 uint32_t Height;
1370 uint32_t Width;
1371 uint32_t LOD;
1372 #define SURFTYPE_CUBEmustbezero 0
1373 uint32_t Depth;
1374 uint32_t MinimumArrayElement;
1375 struct GEN7_MEMORY_OBJECT_CONTROL_STATE DepthBufferObjectControlState;
1376 uint32_t DepthCoordinateOffsetY;
1377 uint32_t DepthCoordinateOffsetX;
1378 uint32_t RenderTargetViewExtent;
1379 };
1380
1381 static inline void
1382 GEN7_3DSTATE_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
1383 const struct GEN7_3DSTATE_DEPTH_BUFFER * restrict values)
1384 {
1385 uint32_t *dw = (uint32_t * restrict) dst;
1386
1387 dw[0] =
1388 __gen_field(values->CommandType, 29, 31) |
1389 __gen_field(values->CommandSubType, 27, 28) |
1390 __gen_field(values->_3DCommandOpcode, 24, 26) |
1391 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1392 __gen_field(values->DwordLength, 0, 7) |
1393 0;
1394
1395 dw[1] =
1396 __gen_field(values->SurfaceType, 29, 31) |
1397 __gen_field(values->DepthWriteEnable, 28, 28) |
1398 __gen_field(values->StencilWriteEnable, 27, 27) |
1399 __gen_field(values->HierarchicalDepthBufferEnable, 22, 22) |
1400 __gen_field(values->SurfaceFormat, 18, 20) |
1401 __gen_field(values->SurfacePitch, 0, 17) |
1402 0;
1403
1404 uint32_t dw2 =
1405 0;
1406
1407 dw[2] =
1408 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
1409
1410 dw[3] =
1411 __gen_field(values->Height, 18, 31) |
1412 __gen_field(values->Width, 4, 17) |
1413 __gen_field(values->LOD, 0, 3) |
1414 0;
1415
1416 uint32_t dw_DepthBufferObjectControlState;
1417 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DepthBufferObjectControlState, &values->DepthBufferObjectControlState);
1418 dw[4] =
1419 __gen_field(values->Depth, 21, 31) |
1420 __gen_field(values->MinimumArrayElement, 10, 20) |
1421 __gen_field(dw_DepthBufferObjectControlState, 0, 3) |
1422 0;
1423
1424 dw[5] =
1425 __gen_field(values->DepthCoordinateOffsetY, 16, 31) |
1426 __gen_field(values->DepthCoordinateOffsetX, 0, 15) |
1427 0;
1428
1429 dw[6] =
1430 __gen_field(values->RenderTargetViewExtent, 21, 31) |
1431 0;
1432
1433 }
1434
1435 #define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_length_bias 0x00000002
1436 #define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_header\
1437 .CommandType = 3, \
1438 .CommandSubType = 3, \
1439 ._3DCommandOpcode = 0, \
1440 ._3DCommandSubOpcode = 37, \
1441 .DwordLength = 0
1442
1443 #define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_length 0x00000002
1444
1445 struct GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS {
1446 uint32_t CommandType;
1447 uint32_t CommandSubType;
1448 uint32_t _3DCommandOpcode;
1449 uint32_t _3DCommandSubOpcode;
1450 uint32_t DwordLength;
1451 uint32_t PointertoDEPTH_STENCIL_STATE;
1452 };
1453
1454 static inline void
1455 GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
1456 const struct GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS * restrict values)
1457 {
1458 uint32_t *dw = (uint32_t * restrict) dst;
1459
1460 dw[0] =
1461 __gen_field(values->CommandType, 29, 31) |
1462 __gen_field(values->CommandSubType, 27, 28) |
1463 __gen_field(values->_3DCommandOpcode, 24, 26) |
1464 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1465 __gen_field(values->DwordLength, 0, 7) |
1466 0;
1467
1468 dw[1] =
1469 __gen_offset(values->PointertoDEPTH_STENCIL_STATE, 6, 31) |
1470 __gen_mbo(0, 0) |
1471 0;
1472
1473 }
1474
1475 #define GEN7_3DSTATE_DRAWING_RECTANGLE_length_bias 0x00000002
1476 #define GEN7_3DSTATE_DRAWING_RECTANGLE_header \
1477 .CommandType = 3, \
1478 .CommandSubType = 3, \
1479 ._3DCommandOpcode = 1, \
1480 ._3DCommandSubOpcode = 0, \
1481 .DwordLength = 2
1482
1483 #define GEN7_3DSTATE_DRAWING_RECTANGLE_length 0x00000004
1484
1485 struct GEN7_3DSTATE_DRAWING_RECTANGLE {
1486 uint32_t CommandType;
1487 uint32_t CommandSubType;
1488 uint32_t _3DCommandOpcode;
1489 uint32_t _3DCommandSubOpcode;
1490 uint32_t DwordLength;
1491 uint32_t ClippedDrawingRectangleYMin;
1492 uint32_t ClippedDrawingRectangleXMin;
1493 uint32_t ClippedDrawingRectangleYMax;
1494 uint32_t ClippedDrawingRectangleXMax;
1495 uint32_t DrawingRectangleOriginY;
1496 uint32_t DrawingRectangleOriginX;
1497 };
1498
1499 static inline void
1500 GEN7_3DSTATE_DRAWING_RECTANGLE_pack(__gen_user_data *data, void * restrict dst,
1501 const struct GEN7_3DSTATE_DRAWING_RECTANGLE * restrict values)
1502 {
1503 uint32_t *dw = (uint32_t * restrict) dst;
1504
1505 dw[0] =
1506 __gen_field(values->CommandType, 29, 31) |
1507 __gen_field(values->CommandSubType, 27, 28) |
1508 __gen_field(values->_3DCommandOpcode, 24, 26) |
1509 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1510 __gen_field(values->DwordLength, 0, 7) |
1511 0;
1512
1513 dw[1] =
1514 __gen_field(values->ClippedDrawingRectangleYMin, 16, 31) |
1515 __gen_field(values->ClippedDrawingRectangleXMin, 0, 15) |
1516 0;
1517
1518 dw[2] =
1519 __gen_field(values->ClippedDrawingRectangleYMax, 16, 31) |
1520 __gen_field(values->ClippedDrawingRectangleXMax, 0, 15) |
1521 0;
1522
1523 dw[3] =
1524 __gen_field(values->DrawingRectangleOriginY, 16, 31) |
1525 __gen_field(values->DrawingRectangleOriginX, 0, 15) |
1526 0;
1527
1528 }
1529
1530 #define GEN7_3DSTATE_DS_length_bias 0x00000002
1531 #define GEN7_3DSTATE_DS_header \
1532 .CommandType = 3, \
1533 .CommandSubType = 3, \
1534 ._3DCommandOpcode = 0, \
1535 ._3DCommandSubOpcode = 29, \
1536 .DwordLength = 4
1537
1538 #define GEN7_3DSTATE_DS_length 0x00000006
1539
1540 struct GEN7_3DSTATE_DS {
1541 uint32_t CommandType;
1542 uint32_t CommandSubType;
1543 uint32_t _3DCommandOpcode;
1544 uint32_t _3DCommandSubOpcode;
1545 uint32_t DwordLength;
1546 uint32_t KernelStartPointer;
1547 #define Multiple 0
1548 #define Single 1
1549 uint32_t SingleDomainPointDispatch;
1550 #define Dmask 0
1551 #define Vmask 1
1552 uint32_t VectorMaskEnable;
1553 #define NoSamplers 0
1554 #define _14Samplers 1
1555 #define _58Samplers 2
1556 #define _912Samplers 3
1557 #define _1316Samplers 4
1558 uint32_t SamplerCount;
1559 uint32_t BindingTableEntryCount;
1560 #define IEEE754 0
1561 #define Alternate 1
1562 uint32_t FloatingPointMode;
1563 bool IllegalOpcodeExceptionEnable;
1564 bool SoftwareExceptionEnable;
1565 uint32_t ScratchSpaceBasePointer;
1566 uint32_t PerThreadScratchSpace;
1567 uint32_t DispatchGRFStartRegisterForURBData;
1568 uint32_t PatchURBEntryReadLength;
1569 uint32_t PatchURBEntryReadOffset;
1570 uint32_t MaximumNumberofThreads;
1571 bool StatisticsEnable;
1572 bool ComputeWCoordinateEnable;
1573 bool DSCacheDisable;
1574 bool DSFunctionEnable;
1575 };
1576
1577 static inline void
1578 GEN7_3DSTATE_DS_pack(__gen_user_data *data, void * restrict dst,
1579 const struct GEN7_3DSTATE_DS * restrict values)
1580 {
1581 uint32_t *dw = (uint32_t * restrict) dst;
1582
1583 dw[0] =
1584 __gen_field(values->CommandType, 29, 31) |
1585 __gen_field(values->CommandSubType, 27, 28) |
1586 __gen_field(values->_3DCommandOpcode, 24, 26) |
1587 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1588 __gen_field(values->DwordLength, 0, 7) |
1589 0;
1590
1591 dw[1] =
1592 __gen_offset(values->KernelStartPointer, 6, 31) |
1593 0;
1594
1595 dw[2] =
1596 __gen_field(values->SingleDomainPointDispatch, 31, 31) |
1597 __gen_field(values->VectorMaskEnable, 30, 30) |
1598 __gen_field(values->SamplerCount, 27, 29) |
1599 __gen_field(values->BindingTableEntryCount, 18, 25) |
1600 __gen_field(values->FloatingPointMode, 16, 16) |
1601 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
1602 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
1603 0;
1604
1605 dw[3] =
1606 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
1607 __gen_field(values->PerThreadScratchSpace, 0, 3) |
1608 0;
1609
1610 dw[4] =
1611 __gen_field(values->DispatchGRFStartRegisterForURBData, 20, 24) |
1612 __gen_field(values->PatchURBEntryReadLength, 11, 17) |
1613 __gen_field(values->PatchURBEntryReadOffset, 4, 9) |
1614 0;
1615
1616 dw[5] =
1617 __gen_field(values->MaximumNumberofThreads, 25, 31) |
1618 __gen_field(values->StatisticsEnable, 10, 10) |
1619 __gen_field(values->ComputeWCoordinateEnable, 2, 2) |
1620 __gen_field(values->DSCacheDisable, 1, 1) |
1621 __gen_field(values->DSFunctionEnable, 0, 0) |
1622 0;
1623
1624 }
1625
1626 #define GEN7_3DSTATE_GS_length_bias 0x00000002
1627 #define GEN7_3DSTATE_GS_header \
1628 .CommandType = 3, \
1629 .CommandSubType = 3, \
1630 ._3DCommandOpcode = 0, \
1631 ._3DCommandSubOpcode = 17, \
1632 .DwordLength = 5
1633
1634 #define GEN7_3DSTATE_GS_length 0x00000007
1635
1636 struct GEN7_3DSTATE_GS {
1637 uint32_t CommandType;
1638 uint32_t CommandSubType;
1639 uint32_t _3DCommandOpcode;
1640 uint32_t _3DCommandSubOpcode;
1641 uint32_t DwordLength;
1642 uint32_t KernelStartPointer;
1643 uint32_t SingleProgramFlowSPF;
1644 #define Dmask 0
1645 #define Vmask 1
1646 uint32_t VectorMaskEnableVME;
1647 #define NoSamplers 0
1648 #define _14Samplers 1
1649 #define _58Samplers 2
1650 #define _912Samplers 3
1651 #define _1316Samplers 4
1652 uint32_t SamplerCount;
1653 uint32_t BindingTableEntryCount;
1654 #define NormalPriority 0
1655 #define HighPriority 1
1656 uint32_t ThreadPriority;
1657 #define IEEE754 0
1658 #define alternate 1
1659 uint32_t FloatingPointMode;
1660 bool IllegalOpcodeExceptionEnable;
1661 bool MaskStackExceptionEnable;
1662 bool SoftwareExceptionEnable;
1663 uint32_t ScratchSpaceBasePointer;
1664 uint32_t PerThreadScratchSpace;
1665 uint32_t OutputVertexSize;
1666 uint32_t OutputTopology;
1667 uint32_t VertexURBEntryReadLength;
1668 bool IncludeVertexHandles;
1669 uint32_t VertexURBEntryReadOffset;
1670 uint32_t DispatchGRFStartRegisterforURBData;
1671 uint32_t MaximumNumberofThreads;
1672 #define GSCTL_CUT 0
1673 #define GSCTL_SID 1
1674 uint32_t ControlDataFormat;
1675 uint32_t ControlDataHeaderSize;
1676 uint32_t InstanceControl;
1677 uint32_t DefaultStreamID;
1678 #define SINGLE 0
1679 #define DUAL_INSTANCE 1
1680 #define DUAL_OBJECT 2
1681 uint32_t DispatchMode;
1682 uint32_t GSStatisticsEnable;
1683 uint32_t GSInvocationsIncrementValue;
1684 bool IncludePrimitiveID;
1685 uint32_t Hint;
1686 bool ReorderEnable;
1687 bool DiscardAdjacency;
1688 bool GSEnable;
1689 uint32_t SemaphoreHandle;
1690 };
1691
1692 static inline void
1693 GEN7_3DSTATE_GS_pack(__gen_user_data *data, void * restrict dst,
1694 const struct GEN7_3DSTATE_GS * restrict values)
1695 {
1696 uint32_t *dw = (uint32_t * restrict) dst;
1697
1698 dw[0] =
1699 __gen_field(values->CommandType, 29, 31) |
1700 __gen_field(values->CommandSubType, 27, 28) |
1701 __gen_field(values->_3DCommandOpcode, 24, 26) |
1702 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1703 __gen_field(values->DwordLength, 0, 7) |
1704 0;
1705
1706 dw[1] =
1707 __gen_offset(values->KernelStartPointer, 6, 31) |
1708 0;
1709
1710 dw[2] =
1711 __gen_field(values->SingleProgramFlowSPF, 31, 31) |
1712 __gen_field(values->VectorMaskEnableVME, 30, 30) |
1713 __gen_field(values->SamplerCount, 27, 29) |
1714 __gen_field(values->BindingTableEntryCount, 18, 25) |
1715 __gen_field(values->ThreadPriority, 17, 17) |
1716 __gen_field(values->FloatingPointMode, 16, 16) |
1717 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
1718 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
1719 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
1720 0;
1721
1722 dw[3] =
1723 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
1724 __gen_field(values->PerThreadScratchSpace, 0, 3) |
1725 0;
1726
1727 dw[4] =
1728 __gen_field(values->OutputVertexSize, 23, 28) |
1729 __gen_field(values->OutputTopology, 17, 22) |
1730 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
1731 __gen_field(values->IncludeVertexHandles, 10, 10) |
1732 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
1733 __gen_field(values->DispatchGRFStartRegisterforURBData, 0, 3) |
1734 0;
1735
1736 dw[5] =
1737 __gen_field(values->MaximumNumberofThreads, 25, 31) |
1738 __gen_field(values->ControlDataFormat, 24, 24) |
1739 __gen_field(values->ControlDataHeaderSize, 20, 23) |
1740 __gen_field(values->InstanceControl, 15, 19) |
1741 __gen_field(values->DefaultStreamID, 13, 14) |
1742 __gen_field(values->DispatchMode, 11, 12) |
1743 __gen_field(values->GSStatisticsEnable, 10, 10) |
1744 __gen_field(values->GSInvocationsIncrementValue, 5, 9) |
1745 __gen_field(values->IncludePrimitiveID, 4, 4) |
1746 __gen_field(values->Hint, 3, 3) |
1747 __gen_field(values->ReorderEnable, 2, 2) |
1748 __gen_field(values->DiscardAdjacency, 1, 1) |
1749 __gen_field(values->GSEnable, 0, 0) |
1750 0;
1751
1752 dw[6] =
1753 __gen_offset(values->SemaphoreHandle, 0, 11) |
1754 0;
1755
1756 }
1757
1758 #define GEN7_3DSTATE_HIER_DEPTH_BUFFER_length_bias 0x00000002
1759 #define GEN7_3DSTATE_HIER_DEPTH_BUFFER_header \
1760 .CommandType = 3, \
1761 .CommandSubType = 3, \
1762 ._3DCommandOpcode = 0, \
1763 ._3DCommandSubOpcode = 7, \
1764 .DwordLength = 1
1765
1766 #define GEN7_3DSTATE_HIER_DEPTH_BUFFER_length 0x00000003
1767
1768 struct GEN7_3DSTATE_HIER_DEPTH_BUFFER {
1769 uint32_t CommandType;
1770 uint32_t CommandSubType;
1771 uint32_t _3DCommandOpcode;
1772 uint32_t _3DCommandSubOpcode;
1773 uint32_t DwordLength;
1774 struct GEN7_MEMORY_OBJECT_CONTROL_STATE HierarchicalDepthBufferObjectControlState;
1775 uint32_t SurfacePitch;
1776 __gen_address_type SurfaceBaseAddress;
1777 };
1778
1779 static inline void
1780 GEN7_3DSTATE_HIER_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
1781 const struct GEN7_3DSTATE_HIER_DEPTH_BUFFER * restrict values)
1782 {
1783 uint32_t *dw = (uint32_t * restrict) dst;
1784
1785 dw[0] =
1786 __gen_field(values->CommandType, 29, 31) |
1787 __gen_field(values->CommandSubType, 27, 28) |
1788 __gen_field(values->_3DCommandOpcode, 24, 26) |
1789 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1790 __gen_field(values->DwordLength, 0, 7) |
1791 0;
1792
1793 uint32_t dw_HierarchicalDepthBufferObjectControlState;
1794 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_HierarchicalDepthBufferObjectControlState, &values->HierarchicalDepthBufferObjectControlState);
1795 dw[1] =
1796 __gen_field(dw_HierarchicalDepthBufferObjectControlState, 25, 28) |
1797 __gen_field(values->SurfacePitch, 0, 16) |
1798 0;
1799
1800 uint32_t dw2 =
1801 0;
1802
1803 dw[2] =
1804 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
1805
1806 }
1807
1808 #define GEN7_3DSTATE_HS_length_bias 0x00000002
1809 #define GEN7_3DSTATE_HS_header \
1810 .CommandType = 3, \
1811 .CommandSubType = 3, \
1812 ._3DCommandOpcode = 0, \
1813 ._3DCommandSubOpcode = 27, \
1814 .DwordLength = 5
1815
1816 #define GEN7_3DSTATE_HS_length 0x00000007
1817
1818 struct GEN7_3DSTATE_HS {
1819 uint32_t CommandType;
1820 uint32_t CommandSubType;
1821 uint32_t _3DCommandOpcode;
1822 uint32_t _3DCommandSubOpcode;
1823 uint32_t DwordLength;
1824 #define NoSamplers 0
1825 #define _14Samplers 1
1826 #define _58Samplers 2
1827 #define _912Samplers 3
1828 #define _1316Samplers 4
1829 uint32_t SamplerCount;
1830 uint32_t BindingTableEntryCount;
1831 #define IEEE754 0
1832 #define alternate 1
1833 uint32_t FloatingPointMode;
1834 bool IllegalOpcodeExceptionEnable;
1835 bool SoftwareExceptionEnable;
1836 uint32_t MaximumNumberofThreads;
1837 bool Enable;
1838 bool StatisticsEnable;
1839 uint32_t InstanceCount;
1840 uint32_t KernelStartPointer;
1841 uint32_t ScratchSpaceBasePointer;
1842 uint32_t PerThreadScratchSpace;
1843 uint32_t SingleProgramFlow;
1844 #define Dmask 0
1845 #define Vmask 1
1846 uint32_t VectorMaskEnable;
1847 bool IncludeVertexHandles;
1848 uint32_t DispatchGRFStartRegisterForURBData;
1849 uint32_t VertexURBEntryReadLength;
1850 uint32_t VertexURBEntryReadOffset;
1851 uint32_t SemaphoreHandle;
1852 };
1853
1854 static inline void
1855 GEN7_3DSTATE_HS_pack(__gen_user_data *data, void * restrict dst,
1856 const struct GEN7_3DSTATE_HS * restrict values)
1857 {
1858 uint32_t *dw = (uint32_t * restrict) dst;
1859
1860 dw[0] =
1861 __gen_field(values->CommandType, 29, 31) |
1862 __gen_field(values->CommandSubType, 27, 28) |
1863 __gen_field(values->_3DCommandOpcode, 24, 26) |
1864 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1865 __gen_field(values->DwordLength, 0, 7) |
1866 0;
1867
1868 dw[1] =
1869 __gen_field(values->SamplerCount, 27, 29) |
1870 __gen_field(values->BindingTableEntryCount, 18, 25) |
1871 __gen_field(values->FloatingPointMode, 16, 16) |
1872 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
1873 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
1874 __gen_field(values->MaximumNumberofThreads, 0, 6) |
1875 0;
1876
1877 dw[2] =
1878 __gen_field(values->Enable, 31, 31) |
1879 __gen_field(values->StatisticsEnable, 29, 29) |
1880 __gen_field(values->InstanceCount, 0, 3) |
1881 0;
1882
1883 dw[3] =
1884 __gen_offset(values->KernelStartPointer, 6, 31) |
1885 0;
1886
1887 dw[4] =
1888 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
1889 __gen_field(values->PerThreadScratchSpace, 0, 3) |
1890 0;
1891
1892 dw[5] =
1893 __gen_field(values->SingleProgramFlow, 27, 27) |
1894 __gen_field(values->VectorMaskEnable, 26, 26) |
1895 __gen_field(values->IncludeVertexHandles, 24, 24) |
1896 __gen_field(values->DispatchGRFStartRegisterForURBData, 19, 23) |
1897 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
1898 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
1899 0;
1900
1901 dw[6] =
1902 __gen_offset(values->SemaphoreHandle, 0, 11) |
1903 0;
1904
1905 }
1906
1907 #define GEN7_3DSTATE_INDEX_BUFFER_length_bias 0x00000002
1908 #define GEN7_3DSTATE_INDEX_BUFFER_header \
1909 .CommandType = 3, \
1910 .CommandSubType = 3, \
1911 ._3DCommandOpcode = 0, \
1912 ._3DCommandSubOpcode = 10, \
1913 .DwordLength = 1
1914
1915 #define GEN7_3DSTATE_INDEX_BUFFER_length 0x00000003
1916
1917 struct GEN7_3DSTATE_INDEX_BUFFER {
1918 uint32_t CommandType;
1919 uint32_t CommandSubType;
1920 uint32_t _3DCommandOpcode;
1921 uint32_t _3DCommandSubOpcode;
1922 struct GEN7_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
1923 bool CutIndexEnable;
1924 #define INDEX_BYTE 0
1925 #define INDEX_WORD 1
1926 #define INDEX_DWORD 2
1927 uint32_t IndexFormat;
1928 uint32_t DwordLength;
1929 __gen_address_type BufferStartingAddress;
1930 __gen_address_type BufferEndingAddress;
1931 };
1932
1933 static inline void
1934 GEN7_3DSTATE_INDEX_BUFFER_pack(__gen_user_data *data, void * restrict dst,
1935 const struct GEN7_3DSTATE_INDEX_BUFFER * restrict values)
1936 {
1937 uint32_t *dw = (uint32_t * restrict) dst;
1938
1939 uint32_t dw_MemoryObjectControlState;
1940 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
1941 dw[0] =
1942 __gen_field(values->CommandType, 29, 31) |
1943 __gen_field(values->CommandSubType, 27, 28) |
1944 __gen_field(values->_3DCommandOpcode, 24, 26) |
1945 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1946 __gen_field(dw_MemoryObjectControlState, 12, 15) |
1947 __gen_field(values->CutIndexEnable, 10, 10) |
1948 __gen_field(values->IndexFormat, 8, 9) |
1949 __gen_field(values->DwordLength, 0, 7) |
1950 0;
1951
1952 uint32_t dw1 =
1953 0;
1954
1955 dw[1] =
1956 __gen_combine_address(data, &dw[1], values->BufferStartingAddress, dw1);
1957
1958 uint32_t dw2 =
1959 0;
1960
1961 dw[2] =
1962 __gen_combine_address(data, &dw[2], values->BufferEndingAddress, dw2);
1963
1964 }
1965
1966 #define GEN7_3DSTATE_LINE_STIPPLE_length_bias 0x00000002
1967 #define GEN7_3DSTATE_LINE_STIPPLE_header \
1968 .CommandType = 3, \
1969 .CommandSubType = 3, \
1970 ._3DCommandOpcode = 1, \
1971 ._3DCommandSubOpcode = 8, \
1972 .DwordLength = 1
1973
1974 #define GEN7_3DSTATE_LINE_STIPPLE_length 0x00000003
1975
1976 struct GEN7_3DSTATE_LINE_STIPPLE {
1977 uint32_t CommandType;
1978 uint32_t CommandSubType;
1979 uint32_t _3DCommandOpcode;
1980 uint32_t _3DCommandSubOpcode;
1981 uint32_t DwordLength;
1982 bool ModifyEnableCurrentRepeatCounterCurrentStippleIndex;
1983 uint32_t CurrentRepeatCounter;
1984 uint32_t CurrentStippleIndex;
1985 uint32_t LineStipplePattern;
1986 float LineStippleInverseRepeatCount;
1987 uint32_t LineStippleRepeatCount;
1988 };
1989
1990 static inline void
1991 GEN7_3DSTATE_LINE_STIPPLE_pack(__gen_user_data *data, void * restrict dst,
1992 const struct GEN7_3DSTATE_LINE_STIPPLE * restrict values)
1993 {
1994 uint32_t *dw = (uint32_t * restrict) dst;
1995
1996 dw[0] =
1997 __gen_field(values->CommandType, 29, 31) |
1998 __gen_field(values->CommandSubType, 27, 28) |
1999 __gen_field(values->_3DCommandOpcode, 24, 26) |
2000 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2001 __gen_field(values->DwordLength, 0, 7) |
2002 0;
2003
2004 dw[1] =
2005 __gen_field(values->ModifyEnableCurrentRepeatCounterCurrentStippleIndex, 31, 31) |
2006 __gen_field(values->CurrentRepeatCounter, 21, 29) |
2007 __gen_field(values->CurrentStippleIndex, 16, 19) |
2008 __gen_field(values->LineStipplePattern, 0, 15) |
2009 0;
2010
2011 dw[2] =
2012 __gen_field(values->LineStippleInverseRepeatCount * (1 << 16), 15, 31) |
2013 __gen_field(values->LineStippleRepeatCount, 0, 8) |
2014 0;
2015
2016 }
2017
2018 #define GEN7_3DSTATE_MONOFILTER_SIZE_length_bias 0x00000002
2019 #define GEN7_3DSTATE_MONOFILTER_SIZE_header \
2020 .CommandType = 3, \
2021 .CommandSubType = 3, \
2022 ._3DCommandOpcode = 1, \
2023 ._3DCommandSubOpcode = 17, \
2024 .DwordLength = 0
2025
2026 #define GEN7_3DSTATE_MONOFILTER_SIZE_length 0x00000002
2027
2028 struct GEN7_3DSTATE_MONOFILTER_SIZE {
2029 uint32_t CommandType;
2030 uint32_t CommandSubType;
2031 uint32_t _3DCommandOpcode;
2032 uint32_t _3DCommandSubOpcode;
2033 uint32_t DwordLength;
2034 uint32_t MonochromeFilterWidth;
2035 uint32_t MonochromeFilterHeight;
2036 };
2037
2038 static inline void
2039 GEN7_3DSTATE_MONOFILTER_SIZE_pack(__gen_user_data *data, void * restrict dst,
2040 const struct GEN7_3DSTATE_MONOFILTER_SIZE * restrict values)
2041 {
2042 uint32_t *dw = (uint32_t * restrict) dst;
2043
2044 dw[0] =
2045 __gen_field(values->CommandType, 29, 31) |
2046 __gen_field(values->CommandSubType, 27, 28) |
2047 __gen_field(values->_3DCommandOpcode, 24, 26) |
2048 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2049 __gen_field(values->DwordLength, 0, 7) |
2050 0;
2051
2052 dw[1] =
2053 __gen_field(values->MonochromeFilterWidth, 3, 5) |
2054 __gen_field(values->MonochromeFilterHeight, 0, 2) |
2055 0;
2056
2057 }
2058
2059 #define GEN7_3DSTATE_MULTISAMPLE_length_bias 0x00000002
2060 #define GEN7_3DSTATE_MULTISAMPLE_header \
2061 .CommandType = 3, \
2062 .CommandSubType = 3, \
2063 ._3DCommandOpcode = 1, \
2064 ._3DCommandSubOpcode = 13, \
2065 .DwordLength = 2
2066
2067 #define GEN7_3DSTATE_MULTISAMPLE_length 0x00000004
2068
2069 struct GEN7_3DSTATE_MULTISAMPLE {
2070 uint32_t CommandType;
2071 uint32_t CommandSubType;
2072 uint32_t _3DCommandOpcode;
2073 uint32_t _3DCommandSubOpcode;
2074 uint32_t DwordLength;
2075 #define PIXLOC_CENTER 0
2076 #define PIXLOC_UL_CORNER 1
2077 uint32_t PixelLocation;
2078 #define NUMSAMPLES_1 0
2079 #define NUMSAMPLES_4 2
2080 #define NUMSAMPLES_8 3
2081 uint32_t NumberofMultisamples;
2082 float Sample3XOffset;
2083 float Sample3YOffset;
2084 float Sample2XOffset;
2085 float Sample2YOffset;
2086 float Sample1XOffset;
2087 float Sample1YOffset;
2088 float Sample0XOffset;
2089 float Sample0YOffset;
2090 float Sample7XOffset;
2091 float Sample7YOffset;
2092 float Sample6XOffset;
2093 float Sample6YOffset;
2094 float Sample5XOffset;
2095 float Sample5YOffset;
2096 float Sample4XOffset;
2097 float Sample4YOffset;
2098 };
2099
2100 static inline void
2101 GEN7_3DSTATE_MULTISAMPLE_pack(__gen_user_data *data, void * restrict dst,
2102 const struct GEN7_3DSTATE_MULTISAMPLE * restrict values)
2103 {
2104 uint32_t *dw = (uint32_t * restrict) dst;
2105
2106 dw[0] =
2107 __gen_field(values->CommandType, 29, 31) |
2108 __gen_field(values->CommandSubType, 27, 28) |
2109 __gen_field(values->_3DCommandOpcode, 24, 26) |
2110 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2111 __gen_field(values->DwordLength, 0, 7) |
2112 0;
2113
2114 dw[1] =
2115 __gen_field(values->PixelLocation, 4, 4) |
2116 __gen_field(values->NumberofMultisamples, 1, 3) |
2117 0;
2118
2119 dw[2] =
2120 __gen_field(values->Sample3XOffset * (1 << 4), 28, 31) |
2121 __gen_field(values->Sample3YOffset * (1 << 4), 24, 27) |
2122 __gen_field(values->Sample2XOffset * (1 << 4), 20, 23) |
2123 __gen_field(values->Sample2YOffset * (1 << 4), 16, 19) |
2124 __gen_field(values->Sample1XOffset * (1 << 4), 12, 15) |
2125 __gen_field(values->Sample1YOffset * (1 << 4), 8, 11) |
2126 __gen_field(values->Sample0XOffset * (1 << 4), 4, 7) |
2127 __gen_field(values->Sample0YOffset * (1 << 4), 0, 3) |
2128 0;
2129
2130 dw[3] =
2131 __gen_field(values->Sample7XOffset * (1 << 4), 28, 31) |
2132 __gen_field(values->Sample7YOffset * (1 << 4), 24, 27) |
2133 __gen_field(values->Sample6XOffset * (1 << 4), 20, 23) |
2134 __gen_field(values->Sample6YOffset * (1 << 4), 16, 19) |
2135 __gen_field(values->Sample5XOffset * (1 << 4), 12, 15) |
2136 __gen_field(values->Sample5YOffset * (1 << 4), 8, 11) |
2137 __gen_field(values->Sample4XOffset * (1 << 4), 4, 7) |
2138 __gen_field(values->Sample4YOffset * (1 << 4), 0, 3) |
2139 0;
2140
2141 }
2142
2143 #define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_length_bias 0x00000002
2144 #define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_header \
2145 .CommandType = 3, \
2146 .CommandSubType = 3, \
2147 ._3DCommandOpcode = 1, \
2148 ._3DCommandSubOpcode = 6, \
2149 .DwordLength = 0
2150
2151 #define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_length 0x00000002
2152
2153 struct GEN7_3DSTATE_POLY_STIPPLE_OFFSET {
2154 uint32_t CommandType;
2155 uint32_t CommandSubType;
2156 uint32_t _3DCommandOpcode;
2157 uint32_t _3DCommandSubOpcode;
2158 uint32_t DwordLength;
2159 uint32_t PolygonStippleXOffset;
2160 uint32_t PolygonStippleYOffset;
2161 };
2162
2163 static inline void
2164 GEN7_3DSTATE_POLY_STIPPLE_OFFSET_pack(__gen_user_data *data, void * restrict dst,
2165 const struct GEN7_3DSTATE_POLY_STIPPLE_OFFSET * restrict values)
2166 {
2167 uint32_t *dw = (uint32_t * restrict) dst;
2168
2169 dw[0] =
2170 __gen_field(values->CommandType, 29, 31) |
2171 __gen_field(values->CommandSubType, 27, 28) |
2172 __gen_field(values->_3DCommandOpcode, 24, 26) |
2173 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2174 __gen_field(values->DwordLength, 0, 7) |
2175 0;
2176
2177 dw[1] =
2178 __gen_field(values->PolygonStippleXOffset, 8, 12) |
2179 __gen_field(values->PolygonStippleYOffset, 0, 4) |
2180 0;
2181
2182 }
2183
2184 #define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_length_bias 0x00000002
2185 #define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_header\
2186 .CommandType = 3, \
2187 .CommandSubType = 3, \
2188 ._3DCommandOpcode = 1, \
2189 ._3DCommandSubOpcode = 7, \
2190 .DwordLength = 31
2191
2192 #define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_length 0x00000021
2193
2194 struct GEN7_3DSTATE_POLY_STIPPLE_PATTERN {
2195 uint32_t CommandType;
2196 uint32_t CommandSubType;
2197 uint32_t _3DCommandOpcode;
2198 uint32_t _3DCommandSubOpcode;
2199 uint32_t DwordLength;
2200 uint32_t PatternRow[32];
2201 };
2202
2203 static inline void
2204 GEN7_3DSTATE_POLY_STIPPLE_PATTERN_pack(__gen_user_data *data, void * restrict dst,
2205 const struct GEN7_3DSTATE_POLY_STIPPLE_PATTERN * restrict values)
2206 {
2207 uint32_t *dw = (uint32_t * restrict) dst;
2208
2209 dw[0] =
2210 __gen_field(values->CommandType, 29, 31) |
2211 __gen_field(values->CommandSubType, 27, 28) |
2212 __gen_field(values->_3DCommandOpcode, 24, 26) |
2213 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2214 __gen_field(values->DwordLength, 0, 7) |
2215 0;
2216
2217 for (uint32_t i = 0, j = 1; i < 32; i += 1, j++) {
2218 dw[j] =
2219 __gen_field(values->PatternRow[i + 0], 0, 31) |
2220 0;
2221 }
2222
2223 }
2224
2225 #define GEN7_3DSTATE_PS_length_bias 0x00000002
2226 #define GEN7_3DSTATE_PS_header \
2227 .CommandType = 3, \
2228 .CommandSubType = 3, \
2229 ._3DCommandOpcode = 0, \
2230 ._3DCommandSubOpcode = 32, \
2231 .DwordLength = 6
2232
2233 #define GEN7_3DSTATE_PS_length 0x00000008
2234
2235 struct GEN7_3DSTATE_PS {
2236 uint32_t CommandType;
2237 uint32_t CommandSubType;
2238 uint32_t _3DCommandOpcode;
2239 uint32_t _3DCommandSubOpcode;
2240 uint32_t DwordLength;
2241 uint32_t KernelStartPointer0;
2242 #define Multiple 0
2243 #define Single 1
2244 uint32_t SingleProgramFlowSPF;
2245 #define Dmask 0
2246 #define Vmask 1
2247 uint32_t VectorMaskEnableVME;
2248 uint32_t SamplerCount;
2249 #define FTZ 0
2250 #define RET 1
2251 uint32_t DenormalMode;
2252 uint32_t BindingTableEntryCount;
2253 #define IEEE745 0
2254 #define Alt 1
2255 uint32_t FloatingPointMode;
2256 #define RTNE 0
2257 #define RU 1
2258 #define RD 2
2259 #define RTZ 3
2260 uint32_t RoundingMode;
2261 bool IllegalOpcodeExceptionEnable;
2262 bool MaskStackExceptionEnable;
2263 bool SoftwareExceptionEnable;
2264 uint32_t ScratchSpaceBasePointer;
2265 uint32_t PerThreadScratchSpace;
2266 uint32_t MaximumNumberofThreads;
2267 bool PushConstantEnable;
2268 bool AttributeEnable;
2269 bool oMaskPresenttoRenderTarget;
2270 bool RenderTargetFastClearEnable;
2271 bool DualSourceBlendEnable;
2272 bool RenderTargetResolveEnable;
2273 #define POSOFFSET_NONE 0
2274 #define POSOFFSET_CENTROID 2
2275 #define POSOFFSET_SAMPLE 3
2276 uint32_t PositionXYOffsetSelect;
2277 bool _32PixelDispatchEnable;
2278 bool _16PixelDispatchEnable;
2279 bool _8PixelDispatchEnable;
2280 uint32_t DispatchGRFStartRegisterforConstantSetupData0;
2281 uint32_t DispatchGRFStartRegisterforConstantSetupData1;
2282 uint32_t DispatchGRFStartRegisterforConstantSetupData2;
2283 uint32_t KernelStartPointer1;
2284 uint32_t KernelStartPointer2;
2285 };
2286
2287 static inline void
2288 GEN7_3DSTATE_PS_pack(__gen_user_data *data, void * restrict dst,
2289 const struct GEN7_3DSTATE_PS * restrict values)
2290 {
2291 uint32_t *dw = (uint32_t * restrict) dst;
2292
2293 dw[0] =
2294 __gen_field(values->CommandType, 29, 31) |
2295 __gen_field(values->CommandSubType, 27, 28) |
2296 __gen_field(values->_3DCommandOpcode, 24, 26) |
2297 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2298 __gen_field(values->DwordLength, 0, 7) |
2299 0;
2300
2301 dw[1] =
2302 __gen_offset(values->KernelStartPointer0, 6, 31) |
2303 0;
2304
2305 dw[2] =
2306 __gen_field(values->SingleProgramFlowSPF, 31, 31) |
2307 __gen_field(values->VectorMaskEnableVME, 30, 30) |
2308 __gen_field(values->SamplerCount, 27, 29) |
2309 __gen_field(values->DenormalMode, 26, 26) |
2310 __gen_field(values->BindingTableEntryCount, 18, 25) |
2311 __gen_field(values->FloatingPointMode, 16, 16) |
2312 __gen_field(values->RoundingMode, 14, 15) |
2313 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2314 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
2315 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
2316 0;
2317
2318 dw[3] =
2319 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
2320 __gen_field(values->PerThreadScratchSpace, 0, 3) |
2321 0;
2322
2323 dw[4] =
2324 __gen_field(values->MaximumNumberofThreads, 24, 31) |
2325 __gen_field(values->PushConstantEnable, 11, 11) |
2326 __gen_field(values->AttributeEnable, 10, 10) |
2327 __gen_field(values->oMaskPresenttoRenderTarget, 9, 9) |
2328 __gen_field(values->RenderTargetFastClearEnable, 8, 8) |
2329 __gen_field(values->DualSourceBlendEnable, 7, 7) |
2330 __gen_field(values->RenderTargetResolveEnable, 6, 6) |
2331 __gen_field(values->PositionXYOffsetSelect, 3, 4) |
2332 __gen_field(values->_32PixelDispatchEnable, 2, 2) |
2333 __gen_field(values->_16PixelDispatchEnable, 1, 1) |
2334 __gen_field(values->_8PixelDispatchEnable, 0, 0) |
2335 0;
2336
2337 dw[5] =
2338 __gen_field(values->DispatchGRFStartRegisterforConstantSetupData0, 16, 22) |
2339 __gen_field(values->DispatchGRFStartRegisterforConstantSetupData1, 8, 14) |
2340 __gen_field(values->DispatchGRFStartRegisterforConstantSetupData2, 0, 6) |
2341 0;
2342
2343 dw[6] =
2344 __gen_offset(values->KernelStartPointer1, 6, 31) |
2345 0;
2346
2347 dw[7] =
2348 __gen_offset(values->KernelStartPointer2, 6, 31) |
2349 0;
2350
2351 }
2352
2353 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length_bias 0x00000002
2354 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_header\
2355 .CommandType = 3, \
2356 .CommandSubType = 3, \
2357 ._3DCommandOpcode = 1, \
2358 ._3DCommandSubOpcode = 20, \
2359 .DwordLength = 0
2360
2361 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length 0x00000002
2362
2363 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS {
2364 uint32_t CommandType;
2365 uint32_t CommandSubType;
2366 uint32_t _3DCommandOpcode;
2367 uint32_t _3DCommandSubOpcode;
2368 uint32_t DwordLength;
2369 #define _0KB 0
2370 uint32_t ConstantBufferOffset;
2371 #define _0KB 0
2372 uint32_t ConstantBufferSize;
2373 };
2374
2375 static inline void
2376 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_pack(__gen_user_data *data, void * restrict dst,
2377 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS * restrict values)
2378 {
2379 uint32_t *dw = (uint32_t * restrict) dst;
2380
2381 dw[0] =
2382 __gen_field(values->CommandType, 29, 31) |
2383 __gen_field(values->CommandSubType, 27, 28) |
2384 __gen_field(values->_3DCommandOpcode, 24, 26) |
2385 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2386 __gen_field(values->DwordLength, 0, 7) |
2387 0;
2388
2389 dw[1] =
2390 __gen_field(values->ConstantBufferOffset, 16, 19) |
2391 __gen_field(values->ConstantBufferSize, 0, 4) |
2392 0;
2393
2394 }
2395
2396 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length_bias 0x00000002
2397 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_header\
2398 .CommandType = 3, \
2399 .CommandSubType = 3, \
2400 ._3DCommandOpcode = 1, \
2401 ._3DCommandSubOpcode = 21, \
2402 .DwordLength = 0
2403
2404 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length 0x00000002
2405
2406 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS {
2407 uint32_t CommandType;
2408 uint32_t CommandSubType;
2409 uint32_t _3DCommandOpcode;
2410 uint32_t _3DCommandSubOpcode;
2411 uint32_t DwordLength;
2412 #define _0KB 0
2413 uint32_t ConstantBufferOffset;
2414 #define _0KB 0
2415 uint32_t ConstantBufferSize;
2416 };
2417
2418 static inline void
2419 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_pack(__gen_user_data *data, void * restrict dst,
2420 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS * restrict values)
2421 {
2422 uint32_t *dw = (uint32_t * restrict) dst;
2423
2424 dw[0] =
2425 __gen_field(values->CommandType, 29, 31) |
2426 __gen_field(values->CommandSubType, 27, 28) |
2427 __gen_field(values->_3DCommandOpcode, 24, 26) |
2428 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2429 __gen_field(values->DwordLength, 0, 7) |
2430 0;
2431
2432 dw[1] =
2433 __gen_field(values->ConstantBufferOffset, 16, 19) |
2434 __gen_field(values->ConstantBufferSize, 0, 4) |
2435 0;
2436
2437 }
2438
2439 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length_bias 0x00000002
2440 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_header\
2441 .CommandType = 3, \
2442 .CommandSubType = 3, \
2443 ._3DCommandOpcode = 1, \
2444 ._3DCommandSubOpcode = 19, \
2445 .DwordLength = 0
2446
2447 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length 0x00000002
2448
2449 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS {
2450 uint32_t CommandType;
2451 uint32_t CommandSubType;
2452 uint32_t _3DCommandOpcode;
2453 uint32_t _3DCommandSubOpcode;
2454 uint32_t DwordLength;
2455 #define _0KB 0
2456 uint32_t ConstantBufferOffset;
2457 #define _0KB 0
2458 uint32_t ConstantBufferSize;
2459 };
2460
2461 static inline void
2462 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_pack(__gen_user_data *data, void * restrict dst,
2463 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS * restrict values)
2464 {
2465 uint32_t *dw = (uint32_t * restrict) dst;
2466
2467 dw[0] =
2468 __gen_field(values->CommandType, 29, 31) |
2469 __gen_field(values->CommandSubType, 27, 28) |
2470 __gen_field(values->_3DCommandOpcode, 24, 26) |
2471 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2472 __gen_field(values->DwordLength, 0, 7) |
2473 0;
2474
2475 dw[1] =
2476 __gen_field(values->ConstantBufferOffset, 16, 19) |
2477 __gen_field(values->ConstantBufferSize, 0, 4) |
2478 0;
2479
2480 }
2481
2482 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length_bias 0x00000002
2483 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_header\
2484 .CommandType = 3, \
2485 .CommandSubType = 3, \
2486 ._3DCommandOpcode = 1, \
2487 ._3DCommandSubOpcode = 22, \
2488 .DwordLength = 0
2489
2490 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length 0x00000002
2491
2492 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS {
2493 uint32_t CommandType;
2494 uint32_t CommandSubType;
2495 uint32_t _3DCommandOpcode;
2496 uint32_t _3DCommandSubOpcode;
2497 uint32_t DwordLength;
2498 #define _0KB 0
2499 uint32_t ConstantBufferOffset;
2500 #define _0KB 0
2501 uint32_t ConstantBufferSize;
2502 };
2503
2504 static inline void
2505 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_pack(__gen_user_data *data, void * restrict dst,
2506 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS * restrict values)
2507 {
2508 uint32_t *dw = (uint32_t * restrict) dst;
2509
2510 dw[0] =
2511 __gen_field(values->CommandType, 29, 31) |
2512 __gen_field(values->CommandSubType, 27, 28) |
2513 __gen_field(values->_3DCommandOpcode, 24, 26) |
2514 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2515 __gen_field(values->DwordLength, 0, 7) |
2516 0;
2517
2518 dw[1] =
2519 __gen_field(values->ConstantBufferOffset, 16, 19) |
2520 __gen_field(values->ConstantBufferSize, 0, 4) |
2521 0;
2522
2523 }
2524
2525 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length_bias 0x00000002
2526 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_header\
2527 .CommandType = 3, \
2528 .CommandSubType = 3, \
2529 ._3DCommandOpcode = 1, \
2530 ._3DCommandSubOpcode = 18, \
2531 .DwordLength = 0
2532
2533 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length 0x00000002
2534
2535 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS {
2536 uint32_t CommandType;
2537 uint32_t CommandSubType;
2538 uint32_t _3DCommandOpcode;
2539 uint32_t _3DCommandSubOpcode;
2540 uint32_t DwordLength;
2541 #define _0KB 0
2542 uint32_t ConstantBufferOffset;
2543 #define _0KB 0
2544 uint32_t ConstantBufferSize;
2545 };
2546
2547 static inline void
2548 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_pack(__gen_user_data *data, void * restrict dst,
2549 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS * restrict values)
2550 {
2551 uint32_t *dw = (uint32_t * restrict) dst;
2552
2553 dw[0] =
2554 __gen_field(values->CommandType, 29, 31) |
2555 __gen_field(values->CommandSubType, 27, 28) |
2556 __gen_field(values->_3DCommandOpcode, 24, 26) |
2557 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2558 __gen_field(values->DwordLength, 0, 7) |
2559 0;
2560
2561 dw[1] =
2562 __gen_field(values->ConstantBufferOffset, 16, 19) |
2563 __gen_field(values->ConstantBufferSize, 0, 4) |
2564 0;
2565
2566 }
2567
2568 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_length_bias 0x00000002
2569 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_header\
2570 .CommandType = 3, \
2571 .CommandSubType = 3, \
2572 ._3DCommandOpcode = 1, \
2573 ._3DCommandSubOpcode = 2
2574
2575 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_length 0x00000000
2576
2577 #define GEN7_PALETTE_ENTRY_length 0x00000001
2578
2579 struct GEN7_PALETTE_ENTRY {
2580 uint32_t Alpha;
2581 uint32_t Red;
2582 uint32_t Green;
2583 uint32_t Blue;
2584 };
2585
2586 static inline void
2587 GEN7_PALETTE_ENTRY_pack(__gen_user_data *data, void * restrict dst,
2588 const struct GEN7_PALETTE_ENTRY * restrict values)
2589 {
2590 uint32_t *dw = (uint32_t * restrict) dst;
2591
2592 dw[0] =
2593 __gen_field(values->Alpha, 24, 31) |
2594 __gen_field(values->Red, 16, 23) |
2595 __gen_field(values->Green, 8, 15) |
2596 __gen_field(values->Blue, 0, 7) |
2597 0;
2598
2599 }
2600
2601 struct GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0 {
2602 uint32_t CommandType;
2603 uint32_t CommandSubType;
2604 uint32_t _3DCommandOpcode;
2605 uint32_t _3DCommandSubOpcode;
2606 uint32_t DwordLength;
2607 /* variable length fields follow */
2608 };
2609
2610 static inline void
2611 GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_pack(__gen_user_data *data, void * restrict dst,
2612 const struct GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0 * restrict values)
2613 {
2614 uint32_t *dw = (uint32_t * restrict) dst;
2615
2616 dw[0] =
2617 __gen_field(values->CommandType, 29, 31) |
2618 __gen_field(values->CommandSubType, 27, 28) |
2619 __gen_field(values->_3DCommandOpcode, 24, 26) |
2620 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2621 __gen_field(values->DwordLength, 0, 7) |
2622 0;
2623
2624 /* variable length fields follow */
2625 }
2626
2627 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_length_bias 0x00000002
2628 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_header\
2629 .CommandType = 3, \
2630 .CommandSubType = 3, \
2631 ._3DCommandOpcode = 1, \
2632 ._3DCommandSubOpcode = 12
2633
2634 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_length 0x00000000
2635
2636 struct GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1 {
2637 uint32_t CommandType;
2638 uint32_t CommandSubType;
2639 uint32_t _3DCommandOpcode;
2640 uint32_t _3DCommandSubOpcode;
2641 uint32_t DwordLength;
2642 /* variable length fields follow */
2643 };
2644
2645 static inline void
2646 GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_pack(__gen_user_data *data, void * restrict dst,
2647 const struct GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1 * restrict values)
2648 {
2649 uint32_t *dw = (uint32_t * restrict) dst;
2650
2651 dw[0] =
2652 __gen_field(values->CommandType, 29, 31) |
2653 __gen_field(values->CommandSubType, 27, 28) |
2654 __gen_field(values->_3DCommandOpcode, 24, 26) |
2655 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2656 __gen_field(values->DwordLength, 0, 7) |
2657 0;
2658
2659 /* variable length fields follow */
2660 }
2661
2662 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_length_bias 0x00000002
2663 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_header\
2664 .CommandType = 3, \
2665 .CommandSubType = 3, \
2666 ._3DCommandOpcode = 0, \
2667 ._3DCommandSubOpcode = 45, \
2668 .DwordLength = 0
2669
2670 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_length 0x00000002
2671
2672 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS {
2673 uint32_t CommandType;
2674 uint32_t CommandSubType;
2675 uint32_t _3DCommandOpcode;
2676 uint32_t _3DCommandSubOpcode;
2677 uint32_t DwordLength;
2678 uint32_t PointertoDSSamplerState;
2679 };
2680
2681 static inline void
2682 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
2683 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS * restrict values)
2684 {
2685 uint32_t *dw = (uint32_t * restrict) dst;
2686
2687 dw[0] =
2688 __gen_field(values->CommandType, 29, 31) |
2689 __gen_field(values->CommandSubType, 27, 28) |
2690 __gen_field(values->_3DCommandOpcode, 24, 26) |
2691 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2692 __gen_field(values->DwordLength, 0, 7) |
2693 0;
2694
2695 dw[1] =
2696 __gen_offset(values->PointertoDSSamplerState, 5, 31) |
2697 0;
2698
2699 }
2700
2701 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_length_bias 0x00000002
2702 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_header\
2703 .CommandType = 3, \
2704 .CommandSubType = 3, \
2705 ._3DCommandOpcode = 0, \
2706 ._3DCommandSubOpcode = 46, \
2707 .DwordLength = 0
2708
2709 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_length 0x00000002
2710
2711 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS {
2712 uint32_t CommandType;
2713 uint32_t CommandSubType;
2714 uint32_t _3DCommandOpcode;
2715 uint32_t _3DCommandSubOpcode;
2716 uint32_t DwordLength;
2717 uint32_t PointertoGSSamplerState;
2718 };
2719
2720 static inline void
2721 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
2722 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS * restrict values)
2723 {
2724 uint32_t *dw = (uint32_t * restrict) dst;
2725
2726 dw[0] =
2727 __gen_field(values->CommandType, 29, 31) |
2728 __gen_field(values->CommandSubType, 27, 28) |
2729 __gen_field(values->_3DCommandOpcode, 24, 26) |
2730 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2731 __gen_field(values->DwordLength, 0, 7) |
2732 0;
2733
2734 dw[1] =
2735 __gen_offset(values->PointertoGSSamplerState, 5, 31) |
2736 0;
2737
2738 }
2739
2740 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_length_bias 0x00000002
2741 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_header\
2742 .CommandType = 3, \
2743 .CommandSubType = 3, \
2744 ._3DCommandOpcode = 0, \
2745 ._3DCommandSubOpcode = 44, \
2746 .DwordLength = 0
2747
2748 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_length 0x00000002
2749
2750 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS {
2751 uint32_t CommandType;
2752 uint32_t CommandSubType;
2753 uint32_t _3DCommandOpcode;
2754 uint32_t _3DCommandSubOpcode;
2755 uint32_t DwordLength;
2756 uint32_t PointertoHSSamplerState;
2757 };
2758
2759 static inline void
2760 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
2761 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS * restrict values)
2762 {
2763 uint32_t *dw = (uint32_t * restrict) dst;
2764
2765 dw[0] =
2766 __gen_field(values->CommandType, 29, 31) |
2767 __gen_field(values->CommandSubType, 27, 28) |
2768 __gen_field(values->_3DCommandOpcode, 24, 26) |
2769 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2770 __gen_field(values->DwordLength, 0, 7) |
2771 0;
2772
2773 dw[1] =
2774 __gen_offset(values->PointertoHSSamplerState, 5, 31) |
2775 0;
2776
2777 }
2778
2779 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_length_bias 0x00000002
2780 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_header\
2781 .CommandType = 3, \
2782 .CommandSubType = 3, \
2783 ._3DCommandOpcode = 0, \
2784 ._3DCommandSubOpcode = 47, \
2785 .DwordLength = 0
2786
2787 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_length 0x00000002
2788
2789 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS {
2790 uint32_t CommandType;
2791 uint32_t CommandSubType;
2792 uint32_t _3DCommandOpcode;
2793 uint32_t _3DCommandSubOpcode;
2794 uint32_t DwordLength;
2795 uint32_t PointertoPSSamplerState;
2796 };
2797
2798 static inline void
2799 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
2800 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS * restrict values)
2801 {
2802 uint32_t *dw = (uint32_t * restrict) dst;
2803
2804 dw[0] =
2805 __gen_field(values->CommandType, 29, 31) |
2806 __gen_field(values->CommandSubType, 27, 28) |
2807 __gen_field(values->_3DCommandOpcode, 24, 26) |
2808 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2809 __gen_field(values->DwordLength, 0, 7) |
2810 0;
2811
2812 dw[1] =
2813 __gen_offset(values->PointertoPSSamplerState, 5, 31) |
2814 0;
2815
2816 }
2817
2818 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_length_bias 0x00000002
2819 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_header\
2820 .CommandType = 3, \
2821 .CommandSubType = 3, \
2822 ._3DCommandOpcode = 0, \
2823 ._3DCommandSubOpcode = 43, \
2824 .DwordLength = 0
2825
2826 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_length 0x00000002
2827
2828 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS {
2829 uint32_t CommandType;
2830 uint32_t CommandSubType;
2831 uint32_t _3DCommandOpcode;
2832 uint32_t _3DCommandSubOpcode;
2833 uint32_t DwordLength;
2834 uint32_t PointertoVSSamplerState;
2835 };
2836
2837 static inline void
2838 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
2839 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS * restrict values)
2840 {
2841 uint32_t *dw = (uint32_t * restrict) dst;
2842
2843 dw[0] =
2844 __gen_field(values->CommandType, 29, 31) |
2845 __gen_field(values->CommandSubType, 27, 28) |
2846 __gen_field(values->_3DCommandOpcode, 24, 26) |
2847 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2848 __gen_field(values->DwordLength, 0, 7) |
2849 0;
2850
2851 dw[1] =
2852 __gen_offset(values->PointertoVSSamplerState, 5, 31) |
2853 0;
2854
2855 }
2856
2857 #define GEN7_3DSTATE_SAMPLE_MASK_length_bias 0x00000002
2858 #define GEN7_3DSTATE_SAMPLE_MASK_header \
2859 .CommandType = 3, \
2860 .CommandSubType = 3, \
2861 ._3DCommandOpcode = 0, \
2862 ._3DCommandSubOpcode = 24, \
2863 .DwordLength = 0
2864
2865 #define GEN7_3DSTATE_SAMPLE_MASK_length 0x00000002
2866
2867 struct GEN7_3DSTATE_SAMPLE_MASK {
2868 uint32_t CommandType;
2869 uint32_t CommandSubType;
2870 uint32_t _3DCommandOpcode;
2871 uint32_t _3DCommandSubOpcode;
2872 uint32_t DwordLength;
2873 uint32_t SampleMask;
2874 };
2875
2876 static inline void
2877 GEN7_3DSTATE_SAMPLE_MASK_pack(__gen_user_data *data, void * restrict dst,
2878 const struct GEN7_3DSTATE_SAMPLE_MASK * restrict values)
2879 {
2880 uint32_t *dw = (uint32_t * restrict) dst;
2881
2882 dw[0] =
2883 __gen_field(values->CommandType, 29, 31) |
2884 __gen_field(values->CommandSubType, 27, 28) |
2885 __gen_field(values->_3DCommandOpcode, 24, 26) |
2886 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2887 __gen_field(values->DwordLength, 0, 7) |
2888 0;
2889
2890 dw[1] =
2891 __gen_field(values->SampleMask, 0, 7) |
2892 0;
2893
2894 }
2895
2896 #define GEN7_3DSTATE_SBE_length_bias 0x00000002
2897 #define GEN7_3DSTATE_SBE_header \
2898 .CommandType = 3, \
2899 .CommandSubType = 3, \
2900 ._3DCommandOpcode = 0, \
2901 ._3DCommandSubOpcode = 31, \
2902 .DwordLength = 12
2903
2904 #define GEN7_3DSTATE_SBE_length 0x0000000e
2905
2906 struct GEN7_3DSTATE_SBE {
2907 uint32_t CommandType;
2908 uint32_t CommandSubType;
2909 uint32_t _3DCommandOpcode;
2910 uint32_t _3DCommandSubOpcode;
2911 uint32_t DwordLength;
2912 #define SWIZ_0_15 0
2913 #define SWIZ_16_31 1
2914 uint32_t AttributeSwizzleControlMode;
2915 uint32_t NumberofSFOutputAttributes;
2916 bool AttributeSwizzleEnable;
2917 #define UPPERLEFT 0
2918 #define LOWERLEFT 1
2919 uint32_t PointSpriteTextureCoordinateOrigin;
2920 uint32_t VertexURBEntryReadLength;
2921 uint32_t VertexURBEntryReadOffset;
2922 bool Attribute2n1ComponentOverrideW;
2923 bool Attribute2n1ComponentOverrideZ;
2924 bool Attribute2n1ComponentOverrideY;
2925 bool Attribute2n1ComponentOverrideX;
2926 #define CONST_0000 0
2927 #define CONST_0001_FLOAT 1
2928 #define CONST_1111_FLOAT 2
2929 #define PRIM_ID 3
2930 uint32_t Attribute2n1ConstantSource;
2931 #define INPUTATTR 0
2932 #define INPUTATTR_FACING 1
2933 #define INPUTATTR_W 2
2934 #define INPUTATTR_FACING_W 3
2935 uint32_t Attribute2n1SwizzleSelect;
2936 uint32_t Attribute2n1SourceAttribute;
2937 bool Attribute2nComponentOverrideW;
2938 bool Attribute2nComponentOverrideZ;
2939 bool Attribute2nComponentOverrideY;
2940 bool Attribute2nComponentOverrideX;
2941 #define CONST_0000 0
2942 #define CONST_0001_FLOAT 1
2943 #define CONST_1111_FLOAT 2
2944 #define PRIM_ID 3
2945 uint32_t Attribute2nConstantSource;
2946 #define INPUTATTR 0
2947 #define INPUTATTR_FACING 1
2948 #define INPUTATTR_W 2
2949 #define INPUTATTR_FACING_W 3
2950 uint32_t Attribute2nSwizzleSelect;
2951 uint32_t Attribute2nSourceAttribute;
2952 uint32_t PointSpriteTextureCoordinateEnable;
2953 uint32_t ConstantInterpolationEnable310;
2954 uint32_t Attribute7WrapShortestEnables;
2955 uint32_t Attribute6WrapShortestEnables;
2956 uint32_t Attribute5WrapShortestEnables;
2957 uint32_t Attribute4WrapShortestEnables;
2958 uint32_t Attribute3WrapShortestEnables;
2959 uint32_t Attribute2WrapShortestEnables;
2960 uint32_t Attribute1WrapShortestEnables;
2961 uint32_t Attribute0WrapShortestEnables;
2962 uint32_t Attribute15WrapShortestEnables;
2963 uint32_t Attribute14WrapShortestEnables;
2964 uint32_t Attribute13WrapShortestEnables;
2965 uint32_t Attribute12WrapShortestEnables;
2966 uint32_t Attribute11WrapShortestEnables;
2967 uint32_t Attribute10WrapShortestEnables;
2968 uint32_t Attribute9WrapShortestEnables;
2969 uint32_t Attribute8WrapShortestEnables;
2970 };
2971
2972 static inline void
2973 GEN7_3DSTATE_SBE_pack(__gen_user_data *data, void * restrict dst,
2974 const struct GEN7_3DSTATE_SBE * restrict values)
2975 {
2976 uint32_t *dw = (uint32_t * restrict) dst;
2977
2978 dw[0] =
2979 __gen_field(values->CommandType, 29, 31) |
2980 __gen_field(values->CommandSubType, 27, 28) |
2981 __gen_field(values->_3DCommandOpcode, 24, 26) |
2982 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2983 __gen_field(values->DwordLength, 0, 7) |
2984 0;
2985
2986 dw[1] =
2987 __gen_field(values->AttributeSwizzleControlMode, 28, 28) |
2988 __gen_field(values->NumberofSFOutputAttributes, 22, 27) |
2989 __gen_field(values->AttributeSwizzleEnable, 21, 21) |
2990 __gen_field(values->PointSpriteTextureCoordinateOrigin, 20, 20) |
2991 __gen_field(values->VertexURBEntryReadLength, 11, 15) |
2992 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
2993 0;
2994
2995 dw[2] =
2996 __gen_field(values->Attribute2n1ComponentOverrideW, 31, 31) |
2997 __gen_field(values->Attribute2n1ComponentOverrideZ, 30, 30) |
2998 __gen_field(values->Attribute2n1ComponentOverrideY, 29, 29) |
2999 __gen_field(values->Attribute2n1ComponentOverrideX, 28, 28) |
3000 __gen_field(values->Attribute2n1ConstantSource, 25, 26) |
3001 __gen_field(values->Attribute2n1SwizzleSelect, 22, 23) |
3002 __gen_field(values->Attribute2n1SourceAttribute, 16, 20) |
3003 __gen_field(values->Attribute2nComponentOverrideW, 15, 15) |
3004 __gen_field(values->Attribute2nComponentOverrideZ, 14, 14) |
3005 __gen_field(values->Attribute2nComponentOverrideY, 13, 13) |
3006 __gen_field(values->Attribute2nComponentOverrideX, 12, 12) |
3007 __gen_field(values->Attribute2nConstantSource, 9, 10) |
3008 __gen_field(values->Attribute2nSwizzleSelect, 6, 7) |
3009 __gen_field(values->Attribute2nSourceAttribute, 0, 4) |
3010 0;
3011
3012 dw[10] =
3013 __gen_field(values->PointSpriteTextureCoordinateEnable, 0, 31) |
3014 0;
3015
3016 dw[11] =
3017 __gen_field(values->ConstantInterpolationEnable310, 0, 31) |
3018 0;
3019
3020 dw[12] =
3021 __gen_field(values->Attribute7WrapShortestEnables, 28, 31) |
3022 __gen_field(values->Attribute6WrapShortestEnables, 24, 27) |
3023 __gen_field(values->Attribute5WrapShortestEnables, 20, 23) |
3024 __gen_field(values->Attribute4WrapShortestEnables, 16, 19) |
3025 __gen_field(values->Attribute3WrapShortestEnables, 12, 15) |
3026 __gen_field(values->Attribute2WrapShortestEnables, 8, 11) |
3027 __gen_field(values->Attribute1WrapShortestEnables, 4, 7) |
3028 __gen_field(values->Attribute0WrapShortestEnables, 0, 3) |
3029 0;
3030
3031 dw[13] =
3032 __gen_field(values->Attribute15WrapShortestEnables, 28, 31) |
3033 __gen_field(values->Attribute14WrapShortestEnables, 24, 27) |
3034 __gen_field(values->Attribute13WrapShortestEnables, 20, 23) |
3035 __gen_field(values->Attribute12WrapShortestEnables, 16, 19) |
3036 __gen_field(values->Attribute11WrapShortestEnables, 12, 15) |
3037 __gen_field(values->Attribute10WrapShortestEnables, 8, 11) |
3038 __gen_field(values->Attribute9WrapShortestEnables, 4, 7) |
3039 __gen_field(values->Attribute8WrapShortestEnables, 0, 3) |
3040 0;
3041
3042 }
3043
3044 #define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_length_bias 0x00000002
3045 #define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_header\
3046 .CommandType = 3, \
3047 .CommandSubType = 3, \
3048 ._3DCommandOpcode = 0, \
3049 ._3DCommandSubOpcode = 15, \
3050 .DwordLength = 0
3051
3052 #define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_length 0x00000002
3053
3054 struct GEN7_3DSTATE_SCISSOR_STATE_POINTERS {
3055 uint32_t CommandType;
3056 uint32_t CommandSubType;
3057 uint32_t _3DCommandOpcode;
3058 uint32_t _3DCommandSubOpcode;
3059 uint32_t DwordLength;
3060 uint32_t ScissorRectPointer;
3061 };
3062
3063 static inline void
3064 GEN7_3DSTATE_SCISSOR_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
3065 const struct GEN7_3DSTATE_SCISSOR_STATE_POINTERS * restrict values)
3066 {
3067 uint32_t *dw = (uint32_t * restrict) dst;
3068
3069 dw[0] =
3070 __gen_field(values->CommandType, 29, 31) |
3071 __gen_field(values->CommandSubType, 27, 28) |
3072 __gen_field(values->_3DCommandOpcode, 24, 26) |
3073 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3074 __gen_field(values->DwordLength, 0, 7) |
3075 0;
3076
3077 dw[1] =
3078 __gen_offset(values->ScissorRectPointer, 5, 31) |
3079 0;
3080
3081 }
3082
3083 #define GEN7_3DSTATE_SF_length_bias 0x00000002
3084 #define GEN7_3DSTATE_SF_header \
3085 .CommandType = 3, \
3086 .CommandSubType = 3, \
3087 ._3DCommandOpcode = 0, \
3088 ._3DCommandSubOpcode = 19, \
3089 .DwordLength = 5
3090
3091 #define GEN7_3DSTATE_SF_length 0x00000007
3092
3093 struct GEN7_3DSTATE_SF {
3094 uint32_t CommandType;
3095 uint32_t CommandSubType;
3096 uint32_t _3DCommandOpcode;
3097 uint32_t _3DCommandSubOpcode;
3098 uint32_t DwordLength;
3099 #define D32_FLOAT_S8X24_UINT 0
3100 #define D32_FLOAT 1
3101 #define D24_UNORM_S8_UINT 2
3102 #define D24_UNORM_X8_UINT 3
3103 #define D16_UNORM 5
3104 uint32_t DepthBufferSurfaceFormat;
3105 bool LegacyGlobalDepthBiasEnable;
3106 bool StatisticsEnable;
3107 bool GlobalDepthOffsetEnableSolid;
3108 bool GlobalDepthOffsetEnableWireframe;
3109 bool GlobalDepthOffsetEnablePoint;
3110 #define RASTER_SOLID 0
3111 #define RASTER_WIREFRAME 1
3112 #define RASTER_POINT 2
3113 uint32_t FrontFaceFillMode;
3114 #define RASTER_SOLID 0
3115 #define RASTER_WIREFRAME 1
3116 #define RASTER_POINT 2
3117 uint32_t BackFaceFillMode;
3118 bool ViewTransformEnable;
3119 uint32_t FrontWinding;
3120 bool AntiAliasingEnable;
3121 #define CULLMODE_BOTH 0
3122 #define CULLMODE_NONE 1
3123 #define CULLMODE_FRONT 2
3124 #define CULLMODE_BACK 3
3125 uint32_t CullMode;
3126 float LineWidth;
3127 uint32_t LineEndCapAntialiasingRegionWidth;
3128 bool ScissorRectangleEnable;
3129 uint32_t MultisampleRasterizationMode;
3130 bool LastPixelEnable;
3131 #define Vertex0 0
3132 #define Vertex1 1
3133 #define Vertex2 2
3134 uint32_t TriangleStripListProvokingVertexSelect;
3135 uint32_t LineStripListProvokingVertexSelect;
3136 #define Vertex0 0
3137 #define Vertex1 1
3138 #define Vertex2 2
3139 uint32_t TriangleFanProvokingVertexSelect;
3140 #define AALINEDISTANCE_TRUE 1
3141 uint32_t AALineDistanceMode;
3142 uint32_t VertexSubPixelPrecisionSelect;
3143 uint32_t UsePointWidthState;
3144 float PointWidth;
3145 float GlobalDepthOffsetConstant;
3146 float GlobalDepthOffsetScale;
3147 float GlobalDepthOffsetClamp;
3148 };
3149
3150 static inline void
3151 GEN7_3DSTATE_SF_pack(__gen_user_data *data, void * restrict dst,
3152 const struct GEN7_3DSTATE_SF * restrict values)
3153 {
3154 uint32_t *dw = (uint32_t * restrict) dst;
3155
3156 dw[0] =
3157 __gen_field(values->CommandType, 29, 31) |
3158 __gen_field(values->CommandSubType, 27, 28) |
3159 __gen_field(values->_3DCommandOpcode, 24, 26) |
3160 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3161 __gen_field(values->DwordLength, 0, 7) |
3162 0;
3163
3164 dw[1] =
3165 __gen_field(values->DepthBufferSurfaceFormat, 12, 14) |
3166 __gen_field(values->LegacyGlobalDepthBiasEnable, 11, 11) |
3167 __gen_field(values->StatisticsEnable, 10, 10) |
3168 __gen_field(values->GlobalDepthOffsetEnableSolid, 9, 9) |
3169 __gen_field(values->GlobalDepthOffsetEnableWireframe, 8, 8) |
3170 __gen_field(values->GlobalDepthOffsetEnablePoint, 7, 7) |
3171 __gen_field(values->FrontFaceFillMode, 5, 6) |
3172 __gen_field(values->BackFaceFillMode, 3, 4) |
3173 __gen_field(values->ViewTransformEnable, 1, 1) |
3174 __gen_field(values->FrontWinding, 0, 0) |
3175 0;
3176
3177 dw[2] =
3178 __gen_field(values->AntiAliasingEnable, 31, 31) |
3179 __gen_field(values->CullMode, 29, 30) |
3180 __gen_field(values->LineWidth * (1 << 7), 18, 27) |
3181 __gen_field(values->LineEndCapAntialiasingRegionWidth, 16, 17) |
3182 __gen_field(values->ScissorRectangleEnable, 11, 11) |
3183 __gen_field(values->MultisampleRasterizationMode, 8, 9) |
3184 0;
3185
3186 dw[3] =
3187 __gen_field(values->LastPixelEnable, 31, 31) |
3188 __gen_field(values->TriangleStripListProvokingVertexSelect, 29, 30) |
3189 __gen_field(values->LineStripListProvokingVertexSelect, 27, 28) |
3190 __gen_field(values->TriangleFanProvokingVertexSelect, 25, 26) |
3191 __gen_field(values->AALineDistanceMode, 14, 14) |
3192 __gen_field(values->VertexSubPixelPrecisionSelect, 12, 12) |
3193 __gen_field(values->UsePointWidthState, 11, 11) |
3194 __gen_field(values->PointWidth * (1 << 3), 0, 10) |
3195 0;
3196
3197 dw[4] =
3198 __gen_float(values->GlobalDepthOffsetConstant) |
3199 0;
3200
3201 dw[5] =
3202 __gen_float(values->GlobalDepthOffsetScale) |
3203 0;
3204
3205 dw[6] =
3206 __gen_float(values->GlobalDepthOffsetClamp) |
3207 0;
3208
3209 }
3210
3211 #define GEN7_3DSTATE_SO_BUFFER_length_bias 0x00000002
3212 #define GEN7_3DSTATE_SO_BUFFER_header \
3213 .CommandType = 3, \
3214 .CommandSubType = 3, \
3215 ._3DCommandOpcode = 1, \
3216 ._3DCommandSubOpcode = 24, \
3217 .DwordLength = 2
3218
3219 #define GEN7_3DSTATE_SO_BUFFER_length 0x00000004
3220
3221 struct GEN7_3DSTATE_SO_BUFFER {
3222 uint32_t CommandType;
3223 uint32_t CommandSubType;
3224 uint32_t _3DCommandOpcode;
3225 uint32_t _3DCommandSubOpcode;
3226 uint32_t DwordLength;
3227 uint32_t SOBufferIndex;
3228 struct GEN7_MEMORY_OBJECT_CONTROL_STATE SOBufferObjectControlState;
3229 uint32_t SurfacePitch;
3230 __gen_address_type SurfaceBaseAddress;
3231 __gen_address_type SurfaceEndAddress;
3232 };
3233
3234 static inline void
3235 GEN7_3DSTATE_SO_BUFFER_pack(__gen_user_data *data, void * restrict dst,
3236 const struct GEN7_3DSTATE_SO_BUFFER * restrict values)
3237 {
3238 uint32_t *dw = (uint32_t * restrict) dst;
3239
3240 dw[0] =
3241 __gen_field(values->CommandType, 29, 31) |
3242 __gen_field(values->CommandSubType, 27, 28) |
3243 __gen_field(values->_3DCommandOpcode, 24, 26) |
3244 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3245 __gen_field(values->DwordLength, 0, 7) |
3246 0;
3247
3248 uint32_t dw_SOBufferObjectControlState;
3249 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SOBufferObjectControlState, &values->SOBufferObjectControlState);
3250 dw[1] =
3251 __gen_field(values->SOBufferIndex, 29, 30) |
3252 __gen_field(dw_SOBufferObjectControlState, 25, 28) |
3253 __gen_field(values->SurfacePitch, 0, 11) |
3254 0;
3255
3256 uint32_t dw2 =
3257 0;
3258
3259 dw[2] =
3260 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
3261
3262 uint32_t dw3 =
3263 0;
3264
3265 dw[3] =
3266 __gen_combine_address(data, &dw[3], values->SurfaceEndAddress, dw3);
3267
3268 }
3269
3270 #define GEN7_3DSTATE_SO_DECL_LIST_length_bias 0x00000002
3271 #define GEN7_3DSTATE_SO_DECL_LIST_header \
3272 .CommandType = 3, \
3273 .CommandSubType = 3, \
3274 ._3DCommandOpcode = 1, \
3275 ._3DCommandSubOpcode = 23
3276
3277 #define GEN7_3DSTATE_SO_DECL_LIST_length 0x00000000
3278
3279 #define GEN7_SO_DECL_ENTRY_length 0x00000002
3280
3281 #define GEN7_SO_DECL_length 0x00000001
3282
3283 struct GEN7_SO_DECL {
3284 uint32_t OutputBufferSlot;
3285 uint32_t HoleFlag;
3286 uint32_t RegisterIndex;
3287 uint32_t ComponentMask;
3288 };
3289
3290 static inline void
3291 GEN7_SO_DECL_pack(__gen_user_data *data, void * restrict dst,
3292 const struct GEN7_SO_DECL * restrict values)
3293 {
3294 uint32_t *dw = (uint32_t * restrict) dst;
3295
3296 dw[0] =
3297 __gen_field(values->OutputBufferSlot, 12, 13) |
3298 __gen_field(values->HoleFlag, 11, 11) |
3299 __gen_field(values->RegisterIndex, 4, 9) |
3300 __gen_field(values->ComponentMask, 0, 3) |
3301 0;
3302
3303 }
3304
3305 struct GEN7_SO_DECL_ENTRY {
3306 struct GEN7_SO_DECL Stream3Decl;
3307 struct GEN7_SO_DECL Stream2Decl;
3308 struct GEN7_SO_DECL Stream1Decl;
3309 struct GEN7_SO_DECL Stream0Decl;
3310 };
3311
3312 static inline void
3313 GEN7_SO_DECL_ENTRY_pack(__gen_user_data *data, void * restrict dst,
3314 const struct GEN7_SO_DECL_ENTRY * restrict values)
3315 {
3316 uint32_t *dw = (uint32_t * restrict) dst;
3317
3318 uint32_t dw_Stream3Decl;
3319 GEN7_SO_DECL_pack(data, &dw_Stream3Decl, &values->Stream3Decl);
3320 uint32_t dw_Stream2Decl;
3321 GEN7_SO_DECL_pack(data, &dw_Stream2Decl, &values->Stream2Decl);
3322 uint32_t dw_Stream1Decl;
3323 GEN7_SO_DECL_pack(data, &dw_Stream1Decl, &values->Stream1Decl);
3324 uint32_t dw_Stream0Decl;
3325 GEN7_SO_DECL_pack(data, &dw_Stream0Decl, &values->Stream0Decl);
3326 uint64_t qw0 =
3327 __gen_field(dw_Stream3Decl, 48, 63) |
3328 __gen_field(dw_Stream2Decl, 32, 47) |
3329 __gen_field(dw_Stream1Decl, 16, 31) |
3330 __gen_field(dw_Stream0Decl, 0, 15) |
3331 0;
3332
3333 dw[0] = qw0;
3334 dw[1] = qw0 >> 32;
3335
3336 }
3337
3338 struct GEN7_3DSTATE_SO_DECL_LIST {
3339 uint32_t CommandType;
3340 uint32_t CommandSubType;
3341 uint32_t _3DCommandOpcode;
3342 uint32_t _3DCommandSubOpcode;
3343 uint32_t DwordLength;
3344 uint32_t StreamtoBufferSelects3;
3345 uint32_t StreamtoBufferSelects2;
3346 uint32_t StreamtoBufferSelects1;
3347 uint32_t StreamtoBufferSelects0;
3348 uint32_t NumEntries3;
3349 uint32_t NumEntries2;
3350 uint32_t NumEntries1;
3351 uint32_t NumEntries0;
3352 /* variable length fields follow */
3353 };
3354
3355 static inline void
3356 GEN7_3DSTATE_SO_DECL_LIST_pack(__gen_user_data *data, void * restrict dst,
3357 const struct GEN7_3DSTATE_SO_DECL_LIST * restrict values)
3358 {
3359 uint32_t *dw = (uint32_t * restrict) dst;
3360
3361 dw[0] =
3362 __gen_field(values->CommandType, 29, 31) |
3363 __gen_field(values->CommandSubType, 27, 28) |
3364 __gen_field(values->_3DCommandOpcode, 24, 26) |
3365 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3366 __gen_field(values->DwordLength, 0, 8) |
3367 0;
3368
3369 dw[1] =
3370 __gen_field(values->StreamtoBufferSelects3, 12, 15) |
3371 __gen_field(values->StreamtoBufferSelects2, 8, 11) |
3372 __gen_field(values->StreamtoBufferSelects1, 4, 7) |
3373 __gen_field(values->StreamtoBufferSelects0, 0, 3) |
3374 0;
3375
3376 dw[2] =
3377 __gen_field(values->NumEntries3, 24, 31) |
3378 __gen_field(values->NumEntries2, 16, 23) |
3379 __gen_field(values->NumEntries1, 8, 15) |
3380 __gen_field(values->NumEntries0, 0, 7) |
3381 0;
3382
3383 /* variable length fields follow */
3384 }
3385
3386 #define GEN7_3DSTATE_STENCIL_BUFFER_length_bias 0x00000002
3387 #define GEN7_3DSTATE_STENCIL_BUFFER_header \
3388 .CommandType = 3, \
3389 .CommandSubType = 3, \
3390 ._3DCommandOpcode = 0, \
3391 ._3DCommandSubOpcode = 6, \
3392 .DwordLength = 1
3393
3394 #define GEN7_3DSTATE_STENCIL_BUFFER_length 0x00000003
3395
3396 struct GEN7_3DSTATE_STENCIL_BUFFER {
3397 uint32_t CommandType;
3398 uint32_t CommandSubType;
3399 uint32_t _3DCommandOpcode;
3400 uint32_t _3DCommandSubOpcode;
3401 uint32_t DwordLength;
3402 struct GEN7_MEMORY_OBJECT_CONTROL_STATE StencilBufferObjectControlState;
3403 uint32_t SurfacePitch;
3404 __gen_address_type SurfaceBaseAddress;
3405 };
3406
3407 static inline void
3408 GEN7_3DSTATE_STENCIL_BUFFER_pack(__gen_user_data *data, void * restrict dst,
3409 const struct GEN7_3DSTATE_STENCIL_BUFFER * restrict values)
3410 {
3411 uint32_t *dw = (uint32_t * restrict) dst;
3412
3413 dw[0] =
3414 __gen_field(values->CommandType, 29, 31) |
3415 __gen_field(values->CommandSubType, 27, 28) |
3416 __gen_field(values->_3DCommandOpcode, 24, 26) |
3417 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3418 __gen_field(values->DwordLength, 0, 7) |
3419 0;
3420
3421 uint32_t dw_StencilBufferObjectControlState;
3422 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StencilBufferObjectControlState, &values->StencilBufferObjectControlState);
3423 dw[1] =
3424 __gen_field(dw_StencilBufferObjectControlState, 25, 28) |
3425 __gen_field(values->SurfacePitch, 0, 16) |
3426 0;
3427
3428 uint32_t dw2 =
3429 0;
3430
3431 dw[2] =
3432 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
3433
3434 }
3435
3436 #define GEN7_3DSTATE_STREAMOUT_length_bias 0x00000002
3437 #define GEN7_3DSTATE_STREAMOUT_header \
3438 .CommandType = 3, \
3439 .CommandSubType = 3, \
3440 ._3DCommandOpcode = 0, \
3441 ._3DCommandSubOpcode = 30, \
3442 .DwordLength = 1
3443
3444 #define GEN7_3DSTATE_STREAMOUT_length 0x00000003
3445
3446 struct GEN7_3DSTATE_STREAMOUT {
3447 uint32_t CommandType;
3448 uint32_t CommandSubType;
3449 uint32_t _3DCommandOpcode;
3450 uint32_t _3DCommandSubOpcode;
3451 uint32_t DwordLength;
3452 uint32_t SOFunctionEnable;
3453 uint32_t RenderingDisable;
3454 uint32_t RenderStreamSelect;
3455 #define LEADING 0
3456 #define TRAILING 1
3457 uint32_t ReorderMode;
3458 bool SOStatisticsEnable;
3459 uint32_t SOBufferEnable3;
3460 uint32_t SOBufferEnable2;
3461 uint32_t SOBufferEnable1;
3462 uint32_t SOBufferEnable0;
3463 uint32_t Stream3VertexReadOffset;
3464 uint32_t Stream3VertexReadLength;
3465 uint32_t Stream2VertexReadOffset;
3466 uint32_t Stream2VertexReadLength;
3467 uint32_t Stream1VertexReadOffset;
3468 uint32_t Stream1VertexReadLength;
3469 uint32_t Stream0VertexReadOffset;
3470 uint32_t Stream0VertexReadLength;
3471 };
3472
3473 static inline void
3474 GEN7_3DSTATE_STREAMOUT_pack(__gen_user_data *data, void * restrict dst,
3475 const struct GEN7_3DSTATE_STREAMOUT * restrict values)
3476 {
3477 uint32_t *dw = (uint32_t * restrict) dst;
3478
3479 dw[0] =
3480 __gen_field(values->CommandType, 29, 31) |
3481 __gen_field(values->CommandSubType, 27, 28) |
3482 __gen_field(values->_3DCommandOpcode, 24, 26) |
3483 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3484 __gen_field(values->DwordLength, 0, 7) |
3485 0;
3486
3487 dw[1] =
3488 __gen_field(values->SOFunctionEnable, 31, 31) |
3489 __gen_field(values->RenderingDisable, 30, 30) |
3490 __gen_field(values->RenderStreamSelect, 27, 28) |
3491 __gen_field(values->ReorderMode, 26, 26) |
3492 __gen_field(values->SOStatisticsEnable, 25, 25) |
3493 __gen_field(values->SOBufferEnable3, 11, 11) |
3494 __gen_field(values->SOBufferEnable2, 10, 10) |
3495 __gen_field(values->SOBufferEnable1, 9, 9) |
3496 __gen_field(values->SOBufferEnable0, 8, 8) |
3497 0;
3498
3499 dw[2] =
3500 __gen_field(values->Stream3VertexReadOffset, 29, 29) |
3501 __gen_field(values->Stream3VertexReadLength, 24, 28) |
3502 __gen_field(values->Stream2VertexReadOffset, 21, 21) |
3503 __gen_field(values->Stream2VertexReadLength, 16, 20) |
3504 __gen_field(values->Stream1VertexReadOffset, 13, 13) |
3505 __gen_field(values->Stream1VertexReadLength, 8, 12) |
3506 __gen_field(values->Stream0VertexReadOffset, 5, 5) |
3507 __gen_field(values->Stream0VertexReadLength, 0, 4) |
3508 0;
3509
3510 }
3511
3512 #define GEN7_3DSTATE_TE_length_bias 0x00000002
3513 #define GEN7_3DSTATE_TE_header \
3514 .CommandType = 3, \
3515 .CommandSubType = 3, \
3516 ._3DCommandOpcode = 0, \
3517 ._3DCommandSubOpcode = 28, \
3518 .DwordLength = 2
3519
3520 #define GEN7_3DSTATE_TE_length 0x00000004
3521
3522 struct GEN7_3DSTATE_TE {
3523 uint32_t CommandType;
3524 uint32_t CommandSubType;
3525 uint32_t _3DCommandOpcode;
3526 uint32_t _3DCommandSubOpcode;
3527 uint32_t DwordLength;
3528 #define INTEGER 0
3529 #define ODD_FRACTIONAL 1
3530 #define EVEN_FRACTIONAL 2
3531 uint32_t Partitioning;
3532 #define POINT 0
3533 #define OUTPUT_LINE 1
3534 #define OUTPUT_TRI_CW 2
3535 #define OUTPUT_TRI_CCW 3
3536 uint32_t OutputTopology;
3537 #define QUAD 0
3538 #define TRI 1
3539 #define ISOLINE 2
3540 uint32_t TEDomain;
3541 #define HW_TESS 0
3542 #define SW_TESS 1
3543 uint32_t TEMode;
3544 bool TEEnable;
3545 float MaximumTessellationFactorOdd;
3546 float MaximumTessellationFactorNotOdd;
3547 };
3548
3549 static inline void
3550 GEN7_3DSTATE_TE_pack(__gen_user_data *data, void * restrict dst,
3551 const struct GEN7_3DSTATE_TE * restrict values)
3552 {
3553 uint32_t *dw = (uint32_t * restrict) dst;
3554
3555 dw[0] =
3556 __gen_field(values->CommandType, 29, 31) |
3557 __gen_field(values->CommandSubType, 27, 28) |
3558 __gen_field(values->_3DCommandOpcode, 24, 26) |
3559 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3560 __gen_field(values->DwordLength, 0, 7) |
3561 0;
3562
3563 dw[1] =
3564 __gen_field(values->Partitioning, 12, 13) |
3565 __gen_field(values->OutputTopology, 8, 9) |
3566 __gen_field(values->TEDomain, 4, 5) |
3567 __gen_field(values->TEMode, 1, 2) |
3568 __gen_field(values->TEEnable, 0, 0) |
3569 0;
3570
3571 dw[2] =
3572 __gen_float(values->MaximumTessellationFactorOdd) |
3573 0;
3574
3575 dw[3] =
3576 __gen_float(values->MaximumTessellationFactorNotOdd) |
3577 0;
3578
3579 }
3580
3581 #define GEN7_3DSTATE_URB_DS_length_bias 0x00000002
3582 #define GEN7_3DSTATE_URB_DS_header \
3583 .CommandType = 3, \
3584 .CommandSubType = 3, \
3585 ._3DCommandOpcode = 0, \
3586 ._3DCommandSubOpcode = 50, \
3587 .DwordLength = 0
3588
3589 #define GEN7_3DSTATE_URB_DS_length 0x00000002
3590
3591 struct GEN7_3DSTATE_URB_DS {
3592 uint32_t CommandType;
3593 uint32_t CommandSubType;
3594 uint32_t _3DCommandOpcode;
3595 uint32_t _3DCommandSubOpcode;
3596 uint32_t DwordLength;
3597 uint32_t DSURBStartingAddress;
3598 uint32_t DSURBEntryAllocationSize;
3599 uint32_t DSNumberofURBEntries;
3600 };
3601
3602 static inline void
3603 GEN7_3DSTATE_URB_DS_pack(__gen_user_data *data, void * restrict dst,
3604 const struct GEN7_3DSTATE_URB_DS * restrict values)
3605 {
3606 uint32_t *dw = (uint32_t * restrict) dst;
3607
3608 dw[0] =
3609 __gen_field(values->CommandType, 29, 31) |
3610 __gen_field(values->CommandSubType, 27, 28) |
3611 __gen_field(values->_3DCommandOpcode, 24, 26) |
3612 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3613 __gen_field(values->DwordLength, 0, 7) |
3614 0;
3615
3616 dw[1] =
3617 __gen_field(values->DSURBStartingAddress, 25, 29) |
3618 __gen_field(values->DSURBEntryAllocationSize, 16, 24) |
3619 __gen_field(values->DSNumberofURBEntries, 0, 15) |
3620 0;
3621
3622 }
3623
3624 #define GEN7_3DSTATE_URB_GS_length_bias 0x00000002
3625 #define GEN7_3DSTATE_URB_GS_header \
3626 .CommandType = 3, \
3627 .CommandSubType = 3, \
3628 ._3DCommandOpcode = 0, \
3629 ._3DCommandSubOpcode = 51, \
3630 .DwordLength = 0
3631
3632 #define GEN7_3DSTATE_URB_GS_length 0x00000002
3633
3634 struct GEN7_3DSTATE_URB_GS {
3635 uint32_t CommandType;
3636 uint32_t CommandSubType;
3637 uint32_t _3DCommandOpcode;
3638 uint32_t _3DCommandSubOpcode;
3639 uint32_t DwordLength;
3640 uint32_t GSURBStartingAddress;
3641 uint32_t GSURBEntryAllocationSize;
3642 uint32_t GSNumberofURBEntries;
3643 };
3644
3645 static inline void
3646 GEN7_3DSTATE_URB_GS_pack(__gen_user_data *data, void * restrict dst,
3647 const struct GEN7_3DSTATE_URB_GS * restrict values)
3648 {
3649 uint32_t *dw = (uint32_t * restrict) dst;
3650
3651 dw[0] =
3652 __gen_field(values->CommandType, 29, 31) |
3653 __gen_field(values->CommandSubType, 27, 28) |
3654 __gen_field(values->_3DCommandOpcode, 24, 26) |
3655 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3656 __gen_field(values->DwordLength, 0, 7) |
3657 0;
3658
3659 dw[1] =
3660 __gen_field(values->GSURBStartingAddress, 25, 29) |
3661 __gen_field(values->GSURBEntryAllocationSize, 16, 24) |
3662 __gen_field(values->GSNumberofURBEntries, 0, 15) |
3663 0;
3664
3665 }
3666
3667 #define GEN7_3DSTATE_URB_HS_length_bias 0x00000002
3668 #define GEN7_3DSTATE_URB_HS_header \
3669 .CommandType = 3, \
3670 .CommandSubType = 3, \
3671 ._3DCommandOpcode = 0, \
3672 ._3DCommandSubOpcode = 49, \
3673 .DwordLength = 0
3674
3675 #define GEN7_3DSTATE_URB_HS_length 0x00000002
3676
3677 struct GEN7_3DSTATE_URB_HS {
3678 uint32_t CommandType;
3679 uint32_t CommandSubType;
3680 uint32_t _3DCommandOpcode;
3681 uint32_t _3DCommandSubOpcode;
3682 uint32_t DwordLength;
3683 uint32_t HSURBStartingAddress;
3684 uint32_t HSURBEntryAllocationSize;
3685 uint32_t HSNumberofURBEntries;
3686 };
3687
3688 static inline void
3689 GEN7_3DSTATE_URB_HS_pack(__gen_user_data *data, void * restrict dst,
3690 const struct GEN7_3DSTATE_URB_HS * restrict values)
3691 {
3692 uint32_t *dw = (uint32_t * restrict) dst;
3693
3694 dw[0] =
3695 __gen_field(values->CommandType, 29, 31) |
3696 __gen_field(values->CommandSubType, 27, 28) |
3697 __gen_field(values->_3DCommandOpcode, 24, 26) |
3698 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3699 __gen_field(values->DwordLength, 0, 7) |
3700 0;
3701
3702 dw[1] =
3703 __gen_field(values->HSURBStartingAddress, 25, 29) |
3704 __gen_field(values->HSURBEntryAllocationSize, 16, 24) |
3705 __gen_field(values->HSNumberofURBEntries, 0, 15) |
3706 0;
3707
3708 }
3709
3710 #define GEN7_3DSTATE_VERTEX_BUFFERS_length_bias 0x00000002
3711 #define GEN7_3DSTATE_VERTEX_BUFFERS_header \
3712 .CommandType = 3, \
3713 .CommandSubType = 3, \
3714 ._3DCommandOpcode = 0, \
3715 ._3DCommandSubOpcode = 8
3716
3717 #define GEN7_3DSTATE_VERTEX_BUFFERS_length 0x00000000
3718
3719 #define GEN7_VERTEX_BUFFER_STATE_length 0x00000004
3720
3721 struct GEN7_VERTEX_BUFFER_STATE {
3722 uint32_t VertexBufferIndex;
3723 #define VERTEXDATA 0
3724 #define INSTANCEDATA 1
3725 uint32_t BufferAccessType;
3726 struct GEN7_MEMORY_OBJECT_CONTROL_STATE VertexBufferMemoryObjectControlState;
3727 uint32_t AddressModifyEnable;
3728 bool NullVertexBuffer;
3729 uint32_t VertexFetchInvalidate;
3730 uint32_t BufferPitch;
3731 __gen_address_type BufferStartingAddress;
3732 __gen_address_type EndAddress;
3733 uint32_t InstanceDataStepRate;
3734 };
3735
3736 static inline void
3737 GEN7_VERTEX_BUFFER_STATE_pack(__gen_user_data *data, void * restrict dst,
3738 const struct GEN7_VERTEX_BUFFER_STATE * restrict values)
3739 {
3740 uint32_t *dw = (uint32_t * restrict) dst;
3741
3742 uint32_t dw_VertexBufferMemoryObjectControlState;
3743 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_VertexBufferMemoryObjectControlState, &values->VertexBufferMemoryObjectControlState);
3744 dw[0] =
3745 __gen_field(values->VertexBufferIndex, 26, 31) |
3746 __gen_field(values->BufferAccessType, 20, 20) |
3747 __gen_field(dw_VertexBufferMemoryObjectControlState, 16, 19) |
3748 __gen_field(values->AddressModifyEnable, 14, 14) |
3749 __gen_field(values->NullVertexBuffer, 13, 13) |
3750 __gen_field(values->VertexFetchInvalidate, 12, 12) |
3751 __gen_field(values->BufferPitch, 0, 11) |
3752 0;
3753
3754 uint32_t dw1 =
3755 0;
3756
3757 dw[1] =
3758 __gen_combine_address(data, &dw[1], values->BufferStartingAddress, dw1);
3759
3760 uint32_t dw2 =
3761 0;
3762
3763 dw[2] =
3764 __gen_combine_address(data, &dw[2], values->EndAddress, dw2);
3765
3766 dw[3] =
3767 __gen_field(values->InstanceDataStepRate, 0, 31) |
3768 0;
3769
3770 }
3771
3772 struct GEN7_3DSTATE_VERTEX_BUFFERS {
3773 uint32_t CommandType;
3774 uint32_t CommandSubType;
3775 uint32_t _3DCommandOpcode;
3776 uint32_t _3DCommandSubOpcode;
3777 uint32_t DwordLength;
3778 /* variable length fields follow */
3779 };
3780
3781 static inline void
3782 GEN7_3DSTATE_VERTEX_BUFFERS_pack(__gen_user_data *data, void * restrict dst,
3783 const struct GEN7_3DSTATE_VERTEX_BUFFERS * restrict values)
3784 {
3785 uint32_t *dw = (uint32_t * restrict) dst;
3786
3787 dw[0] =
3788 __gen_field(values->CommandType, 29, 31) |
3789 __gen_field(values->CommandSubType, 27, 28) |
3790 __gen_field(values->_3DCommandOpcode, 24, 26) |
3791 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3792 __gen_field(values->DwordLength, 0, 7) |
3793 0;
3794
3795 /* variable length fields follow */
3796 }
3797
3798 #define GEN7_3DSTATE_VERTEX_ELEMENTS_length_bias 0x00000002
3799 #define GEN7_3DSTATE_VERTEX_ELEMENTS_header \
3800 .CommandType = 3, \
3801 .CommandSubType = 3, \
3802 ._3DCommandOpcode = 0, \
3803 ._3DCommandSubOpcode = 9
3804
3805 #define GEN7_3DSTATE_VERTEX_ELEMENTS_length 0x00000000
3806
3807 #define GEN7_VERTEX_ELEMENT_STATE_length 0x00000002
3808
3809 struct GEN7_VERTEX_ELEMENT_STATE {
3810 uint32_t VertexBufferIndex;
3811 bool Valid;
3812 uint32_t SourceElementFormat;
3813 bool EdgeFlagEnable;
3814 uint32_t SourceElementOffset;
3815 uint32_t Component0Control;
3816 uint32_t Component1Control;
3817 uint32_t Component2Control;
3818 uint32_t Component3Control;
3819 };
3820
3821 static inline void
3822 GEN7_VERTEX_ELEMENT_STATE_pack(__gen_user_data *data, void * restrict dst,
3823 const struct GEN7_VERTEX_ELEMENT_STATE * restrict values)
3824 {
3825 uint32_t *dw = (uint32_t * restrict) dst;
3826
3827 dw[0] =
3828 __gen_field(values->VertexBufferIndex, 26, 31) |
3829 __gen_field(values->Valid, 25, 25) |
3830 __gen_field(values->SourceElementFormat, 16, 24) |
3831 __gen_field(values->EdgeFlagEnable, 15, 15) |
3832 __gen_field(values->SourceElementOffset, 0, 11) |
3833 0;
3834
3835 dw[1] =
3836 __gen_field(values->Component0Control, 28, 30) |
3837 __gen_field(values->Component1Control, 24, 26) |
3838 __gen_field(values->Component2Control, 20, 22) |
3839 __gen_field(values->Component3Control, 16, 18) |
3840 0;
3841
3842 }
3843
3844 struct GEN7_3DSTATE_VERTEX_ELEMENTS {
3845 uint32_t CommandType;
3846 uint32_t CommandSubType;
3847 uint32_t _3DCommandOpcode;
3848 uint32_t _3DCommandSubOpcode;
3849 uint32_t DwordLength;
3850 /* variable length fields follow */
3851 };
3852
3853 static inline void
3854 GEN7_3DSTATE_VERTEX_ELEMENTS_pack(__gen_user_data *data, void * restrict dst,
3855 const struct GEN7_3DSTATE_VERTEX_ELEMENTS * restrict values)
3856 {
3857 uint32_t *dw = (uint32_t * restrict) dst;
3858
3859 dw[0] =
3860 __gen_field(values->CommandType, 29, 31) |
3861 __gen_field(values->CommandSubType, 27, 28) |
3862 __gen_field(values->_3DCommandOpcode, 24, 26) |
3863 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3864 __gen_field(values->DwordLength, 0, 7) |
3865 0;
3866
3867 /* variable length fields follow */
3868 }
3869
3870 #define GEN7_3DSTATE_VF_STATISTICS_length_bias 0x00000001
3871 #define GEN7_3DSTATE_VF_STATISTICS_header \
3872 .CommandType = 3, \
3873 .CommandSubType = 1, \
3874 ._3DCommandOpcode = 0, \
3875 ._3DCommandSubOpcode = 11
3876
3877 #define GEN7_3DSTATE_VF_STATISTICS_length 0x00000001
3878
3879 struct GEN7_3DSTATE_VF_STATISTICS {
3880 uint32_t CommandType;
3881 uint32_t CommandSubType;
3882 uint32_t _3DCommandOpcode;
3883 uint32_t _3DCommandSubOpcode;
3884 bool StatisticsEnable;
3885 };
3886
3887 static inline void
3888 GEN7_3DSTATE_VF_STATISTICS_pack(__gen_user_data *data, void * restrict dst,
3889 const struct GEN7_3DSTATE_VF_STATISTICS * restrict values)
3890 {
3891 uint32_t *dw = (uint32_t * restrict) dst;
3892
3893 dw[0] =
3894 __gen_field(values->CommandType, 29, 31) |
3895 __gen_field(values->CommandSubType, 27, 28) |
3896 __gen_field(values->_3DCommandOpcode, 24, 26) |
3897 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3898 __gen_field(values->StatisticsEnable, 0, 0) |
3899 0;
3900
3901 }
3902
3903 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length_bias 0x00000002
3904 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_header\
3905 .CommandType = 3, \
3906 .CommandSubType = 3, \
3907 ._3DCommandOpcode = 0, \
3908 ._3DCommandSubOpcode = 35, \
3909 .DwordLength = 0
3910
3911 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length 0x00000002
3912
3913 struct GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC {
3914 uint32_t CommandType;
3915 uint32_t CommandSubType;
3916 uint32_t _3DCommandOpcode;
3917 uint32_t _3DCommandSubOpcode;
3918 uint32_t DwordLength;
3919 uint32_t CCViewportPointer;
3920 };
3921
3922 static inline void
3923 GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_pack(__gen_user_data *data, void * restrict dst,
3924 const struct GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC * restrict values)
3925 {
3926 uint32_t *dw = (uint32_t * restrict) dst;
3927
3928 dw[0] =
3929 __gen_field(values->CommandType, 29, 31) |
3930 __gen_field(values->CommandSubType, 27, 28) |
3931 __gen_field(values->_3DCommandOpcode, 24, 26) |
3932 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3933 __gen_field(values->DwordLength, 0, 7) |
3934 0;
3935
3936 dw[1] =
3937 __gen_offset(values->CCViewportPointer, 5, 31) |
3938 0;
3939
3940 }
3941
3942 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length_bias 0x00000002
3943 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_header\
3944 .CommandType = 3, \
3945 .CommandSubType = 3, \
3946 ._3DCommandOpcode = 0, \
3947 ._3DCommandSubOpcode = 33, \
3948 .DwordLength = 0
3949
3950 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length 0x00000002
3951
3952 struct GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP {
3953 uint32_t CommandType;
3954 uint32_t CommandSubType;
3955 uint32_t _3DCommandOpcode;
3956 uint32_t _3DCommandSubOpcode;
3957 uint32_t DwordLength;
3958 uint32_t SFClipViewportPointer;
3959 };
3960
3961 static inline void
3962 GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_pack(__gen_user_data *data, void * restrict dst,
3963 const struct GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP * restrict values)
3964 {
3965 uint32_t *dw = (uint32_t * restrict) dst;
3966
3967 dw[0] =
3968 __gen_field(values->CommandType, 29, 31) |
3969 __gen_field(values->CommandSubType, 27, 28) |
3970 __gen_field(values->_3DCommandOpcode, 24, 26) |
3971 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3972 __gen_field(values->DwordLength, 0, 7) |
3973 0;
3974
3975 dw[1] =
3976 __gen_offset(values->SFClipViewportPointer, 6, 31) |
3977 0;
3978
3979 }
3980
3981 #define GEN7_3DSTATE_VS_length_bias 0x00000002
3982 #define GEN7_3DSTATE_VS_header \
3983 .CommandType = 3, \
3984 .CommandSubType = 3, \
3985 ._3DCommandOpcode = 0, \
3986 ._3DCommandSubOpcode = 16, \
3987 .DwordLength = 4
3988
3989 #define GEN7_3DSTATE_VS_length 0x00000006
3990
3991 struct GEN7_3DSTATE_VS {
3992 uint32_t CommandType;
3993 uint32_t CommandSubType;
3994 uint32_t _3DCommandOpcode;
3995 uint32_t _3DCommandSubOpcode;
3996 uint32_t DwordLength;
3997 uint32_t KernelStartPointer;
3998 #define Multiple 0
3999 #define Single 1
4000 uint32_t SingleVertexDispatch;
4001 #define Dmask 0
4002 #define Vmask 1
4003 uint32_t VectorMaskEnableVME;
4004 #define NoSamplers 0
4005 #define _14Samplers 1
4006 #define _58Samplers 2
4007 #define _912Samplers 3
4008 #define _1316Samplers 4
4009 uint32_t SamplerCount;
4010 uint32_t BindingTableEntryCount;
4011 #define IEEE754 0
4012 #define Alternate 1
4013 uint32_t FloatingPointMode;
4014 bool IllegalOpcodeExceptionEnable;
4015 bool SoftwareExceptionEnable;
4016 uint32_t ScratchSpaceBaseOffset;
4017 uint32_t PerThreadScratchSpace;
4018 uint32_t DispatchGRFStartRegisterforURBData;
4019 uint32_t VertexURBEntryReadLength;
4020 uint32_t VertexURBEntryReadOffset;
4021 uint32_t MaximumNumberofThreads;
4022 bool StatisticsEnable;
4023 bool VertexCacheDisable;
4024 bool VSFunctionEnable;
4025 };
4026
4027 static inline void
4028 GEN7_3DSTATE_VS_pack(__gen_user_data *data, void * restrict dst,
4029 const struct GEN7_3DSTATE_VS * restrict values)
4030 {
4031 uint32_t *dw = (uint32_t * restrict) dst;
4032
4033 dw[0] =
4034 __gen_field(values->CommandType, 29, 31) |
4035 __gen_field(values->CommandSubType, 27, 28) |
4036 __gen_field(values->_3DCommandOpcode, 24, 26) |
4037 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4038 __gen_field(values->DwordLength, 0, 7) |
4039 0;
4040
4041 dw[1] =
4042 __gen_offset(values->KernelStartPointer, 6, 31) |
4043 0;
4044
4045 dw[2] =
4046 __gen_field(values->SingleVertexDispatch, 31, 31) |
4047 __gen_field(values->VectorMaskEnableVME, 30, 30) |
4048 __gen_field(values->SamplerCount, 27, 29) |
4049 __gen_field(values->BindingTableEntryCount, 18, 25) |
4050 __gen_field(values->FloatingPointMode, 16, 16) |
4051 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
4052 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
4053 0;
4054
4055 dw[3] =
4056 __gen_offset(values->ScratchSpaceBaseOffset, 10, 31) |
4057 __gen_field(values->PerThreadScratchSpace, 0, 3) |
4058 0;
4059
4060 dw[4] =
4061 __gen_field(values->DispatchGRFStartRegisterforURBData, 20, 24) |
4062 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
4063 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
4064 0;
4065
4066 dw[5] =
4067 __gen_field(values->MaximumNumberofThreads, 25, 31) |
4068 __gen_field(values->StatisticsEnable, 10, 10) |
4069 __gen_field(values->VertexCacheDisable, 1, 1) |
4070 __gen_field(values->VSFunctionEnable, 0, 0) |
4071 0;
4072
4073 }
4074
4075 #define GEN7_3DSTATE_WM_length_bias 0x00000002
4076 #define GEN7_3DSTATE_WM_header \
4077 .CommandType = 3, \
4078 .CommandSubType = 3, \
4079 ._3DCommandOpcode = 0, \
4080 ._3DCommandSubOpcode = 20, \
4081 .DwordLength = 1
4082
4083 #define GEN7_3DSTATE_WM_length 0x00000003
4084
4085 struct GEN7_3DSTATE_WM {
4086 uint32_t CommandType;
4087 uint32_t CommandSubType;
4088 uint32_t _3DCommandOpcode;
4089 uint32_t _3DCommandSubOpcode;
4090 uint32_t DwordLength;
4091 bool StatisticsEnable;
4092 bool DepthBufferClear;
4093 bool ThreadDispatchEnable;
4094 bool DepthBufferResolveEnable;
4095 bool HierarchicalDepthBufferResolveEnable;
4096 bool LegacyDiamondLineRasterization;
4097 bool PixelShaderKillPixel;
4098 #define PSCDEPTH_OFF 0
4099 #define PSCDEPTH_ON 1
4100 #define PSCDEPTH_ON_GE 2
4101 #define PSCDEPTH_ON_LE 3
4102 uint32_t PixelShaderComputedDepthMode;
4103 #define EDSC_NORMAL 0
4104 #define EDSC_PSEXEC 1
4105 #define EDSC_PREPS 2
4106 uint32_t EarlyDepthStencilControl;
4107 bool PixelShaderUsesSourceDepth;
4108 bool PixelShaderUsesSourceW;
4109 #define INTERP_PIXEL 0
4110 #define INTERP_CENTROID 2
4111 #define INTERP_SAMPLE 3
4112 uint32_t PositionZWInterpolationMode;
4113 uint32_t BarycentricInterpolationMode;
4114 bool PixelShaderUsesInputCoverageMask;
4115 uint32_t LineEndCapAntialiasingRegionWidth;
4116 uint32_t LineAntialiasingRegionWidth;
4117 bool PolygonStippleEnable;
4118 bool LineStippleEnable;
4119 #define RASTRULE_UPPER_LEFT 0
4120 #define RASTRULE_UPPER_RIGHT 1
4121 uint32_t PointRasterizationRule;
4122 #define MSRASTMODE_OFF_PIXEL 0
4123 #define MSRASTMODE_OFF_PATTERN 1
4124 #define MSRASTMODE_ON_PIXEL 2
4125 #define MSRASTMODE_ON_PATTERN 3
4126 uint32_t MultisampleRasterizationMode;
4127 #define MSDISPMODE_PERSAMPLE 0
4128 #define MSDISPMODE_PERPIXEL 1
4129 uint32_t MultisampleDispatchMode;
4130 };
4131
4132 static inline void
4133 GEN7_3DSTATE_WM_pack(__gen_user_data *data, void * restrict dst,
4134 const struct GEN7_3DSTATE_WM * restrict values)
4135 {
4136 uint32_t *dw = (uint32_t * restrict) dst;
4137
4138 dw[0] =
4139 __gen_field(values->CommandType, 29, 31) |
4140 __gen_field(values->CommandSubType, 27, 28) |
4141 __gen_field(values->_3DCommandOpcode, 24, 26) |
4142 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4143 __gen_field(values->DwordLength, 0, 7) |
4144 0;
4145
4146 dw[1] =
4147 __gen_field(values->StatisticsEnable, 31, 31) |
4148 __gen_field(values->DepthBufferClear, 30, 30) |
4149 __gen_field(values->ThreadDispatchEnable, 29, 29) |
4150 __gen_field(values->DepthBufferResolveEnable, 28, 28) |
4151 __gen_field(values->HierarchicalDepthBufferResolveEnable, 27, 27) |
4152 __gen_field(values->LegacyDiamondLineRasterization, 26, 26) |
4153 __gen_field(values->PixelShaderKillPixel, 25, 25) |
4154 __gen_field(values->PixelShaderComputedDepthMode, 23, 24) |
4155 __gen_field(values->EarlyDepthStencilControl, 21, 22) |
4156 __gen_field(values->PixelShaderUsesSourceDepth, 20, 20) |
4157 __gen_field(values->PixelShaderUsesSourceW, 19, 19) |
4158 __gen_field(values->PositionZWInterpolationMode, 17, 18) |
4159 __gen_field(values->BarycentricInterpolationMode, 11, 16) |
4160 __gen_field(values->PixelShaderUsesInputCoverageMask, 10, 10) |
4161 __gen_field(values->LineEndCapAntialiasingRegionWidth, 8, 9) |
4162 __gen_field(values->LineAntialiasingRegionWidth, 6, 7) |
4163 __gen_field(values->PolygonStippleEnable, 4, 4) |
4164 __gen_field(values->LineStippleEnable, 3, 3) |
4165 __gen_field(values->PointRasterizationRule, 2, 2) |
4166 __gen_field(values->MultisampleRasterizationMode, 0, 1) |
4167 0;
4168
4169 dw[2] =
4170 __gen_field(values->MultisampleDispatchMode, 31, 31) |
4171 0;
4172
4173 }
4174
4175 #define GEN7_GPGPU_OBJECT_length_bias 0x00000002
4176 #define GEN7_GPGPU_OBJECT_header \
4177 .CommandType = 3, \
4178 .Pipeline = 2, \
4179 .MediaCommandOpcode = 1, \
4180 .SubOpcode = 4, \
4181 .DwordLength = 6
4182
4183 #define GEN7_GPGPU_OBJECT_length 0x00000008
4184
4185 struct GEN7_GPGPU_OBJECT {
4186 uint32_t CommandType;
4187 uint32_t Pipeline;
4188 uint32_t MediaCommandOpcode;
4189 uint32_t SubOpcode;
4190 bool PredicateEnable;
4191 uint32_t DwordLength;
4192 uint32_t SharedLocalMemoryFixedOffset;
4193 uint32_t InterfaceDescriptorOffset;
4194 uint32_t SharedLocalMemoryOffset;
4195 uint32_t EndofThreadGroup;
4196 #define HalfSlice1 2
4197 #define HalfSlice0 1
4198 #define EitherHalfSlice 0
4199 uint32_t HalfSliceDestinationSelect;
4200 uint32_t IndirectDataLength;
4201 uint32_t IndirectDataStartAddress;
4202 uint32_t ThreadGroupIDX;
4203 uint32_t ThreadGroupIDY;
4204 uint32_t ThreadGroupIDZ;
4205 uint32_t ExecutionMask;
4206 };
4207
4208 static inline void
4209 GEN7_GPGPU_OBJECT_pack(__gen_user_data *data, void * restrict dst,
4210 const struct GEN7_GPGPU_OBJECT * restrict values)
4211 {
4212 uint32_t *dw = (uint32_t * restrict) dst;
4213
4214 dw[0] =
4215 __gen_field(values->CommandType, 29, 31) |
4216 __gen_field(values->Pipeline, 27, 28) |
4217 __gen_field(values->MediaCommandOpcode, 24, 26) |
4218 __gen_field(values->SubOpcode, 16, 23) |
4219 __gen_field(values->PredicateEnable, 8, 8) |
4220 __gen_field(values->DwordLength, 0, 7) |
4221 0;
4222
4223 dw[1] =
4224 __gen_field(values->SharedLocalMemoryFixedOffset, 7, 7) |
4225 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
4226 0;
4227
4228 dw[2] =
4229 __gen_field(values->SharedLocalMemoryOffset, 28, 31) |
4230 __gen_field(values->EndofThreadGroup, 24, 24) |
4231 __gen_field(values->HalfSliceDestinationSelect, 17, 18) |
4232 __gen_field(values->IndirectDataLength, 0, 16) |
4233 0;
4234
4235 dw[3] =
4236 __gen_offset(values->IndirectDataStartAddress, 0, 31) |
4237 0;
4238
4239 dw[4] =
4240 __gen_field(values->ThreadGroupIDX, 0, 31) |
4241 0;
4242
4243 dw[5] =
4244 __gen_field(values->ThreadGroupIDY, 0, 31) |
4245 0;
4246
4247 dw[6] =
4248 __gen_field(values->ThreadGroupIDZ, 0, 31) |
4249 0;
4250
4251 dw[7] =
4252 __gen_field(values->ExecutionMask, 0, 31) |
4253 0;
4254
4255 }
4256
4257 #define GEN7_GPGPU_WALKER_length_bias 0x00000002
4258 #define GEN7_GPGPU_WALKER_header \
4259 .CommandType = 3, \
4260 .Pipeline = 2, \
4261 .MediaCommandOpcode = 1, \
4262 .SubOpcodeA = 5, \
4263 .DwordLength = 9
4264
4265 #define GEN7_GPGPU_WALKER_length 0x0000000b
4266
4267 struct GEN7_GPGPU_WALKER {
4268 uint32_t CommandType;
4269 uint32_t Pipeline;
4270 uint32_t MediaCommandOpcode;
4271 uint32_t SubOpcodeA;
4272 bool IndirectParameterEnable;
4273 bool PredicateEnable;
4274 uint32_t DwordLength;
4275 uint32_t InterfaceDescriptorOffset;
4276 #define SIMD8 0
4277 #define SIMD16 1
4278 #define SIMD32 2
4279 uint32_t SIMDSize;
4280 uint32_t ThreadDepthCounterMaximum;
4281 uint32_t ThreadHeightCounterMaximum;
4282 uint32_t ThreadWidthCounterMaximum;
4283 uint32_t ThreadGroupIDStartingX;
4284 uint32_t ThreadGroupIDXDimension;
4285 uint32_t ThreadGroupIDStartingY;
4286 uint32_t ThreadGroupIDYDimension;
4287 uint32_t ThreadGroupIDStartingZ;
4288 uint32_t ThreadGroupIDZDimension;
4289 uint32_t RightExecutionMask;
4290 uint32_t BottomExecutionMask;
4291 };
4292
4293 static inline void
4294 GEN7_GPGPU_WALKER_pack(__gen_user_data *data, void * restrict dst,
4295 const struct GEN7_GPGPU_WALKER * restrict values)
4296 {
4297 uint32_t *dw = (uint32_t * restrict) dst;
4298
4299 dw[0] =
4300 __gen_field(values->CommandType, 29, 31) |
4301 __gen_field(values->Pipeline, 27, 28) |
4302 __gen_field(values->MediaCommandOpcode, 24, 26) |
4303 __gen_field(values->SubOpcodeA, 16, 23) |
4304 __gen_field(values->IndirectParameterEnable, 10, 10) |
4305 __gen_field(values->PredicateEnable, 8, 8) |
4306 __gen_field(values->DwordLength, 0, 7) |
4307 0;
4308
4309 dw[1] =
4310 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
4311 0;
4312
4313 dw[2] =
4314 __gen_field(values->SIMDSize, 30, 31) |
4315 __gen_field(values->ThreadDepthCounterMaximum, 16, 21) |
4316 __gen_field(values->ThreadHeightCounterMaximum, 8, 13) |
4317 __gen_field(values->ThreadWidthCounterMaximum, 0, 5) |
4318 0;
4319
4320 dw[3] =
4321 __gen_field(values->ThreadGroupIDStartingX, 0, 31) |
4322 0;
4323
4324 dw[4] =
4325 __gen_field(values->ThreadGroupIDXDimension, 0, 31) |
4326 0;
4327
4328 dw[5] =
4329 __gen_field(values->ThreadGroupIDStartingY, 0, 31) |
4330 0;
4331
4332 dw[6] =
4333 __gen_field(values->ThreadGroupIDYDimension, 0, 31) |
4334 0;
4335
4336 dw[7] =
4337 __gen_field(values->ThreadGroupIDStartingZ, 0, 31) |
4338 0;
4339
4340 dw[8] =
4341 __gen_field(values->ThreadGroupIDZDimension, 0, 31) |
4342 0;
4343
4344 dw[9] =
4345 __gen_field(values->RightExecutionMask, 0, 31) |
4346 0;
4347
4348 dw[10] =
4349 __gen_field(values->BottomExecutionMask, 0, 31) |
4350 0;
4351
4352 }
4353
4354 #define GEN7_MEDIA_CURBE_LOAD_length_bias 0x00000002
4355 #define GEN7_MEDIA_CURBE_LOAD_header \
4356 .CommandType = 3, \
4357 .Pipeline = 2, \
4358 .MediaCommandOpcode = 0, \
4359 .SubOpcode = 1, \
4360 .DwordLength = 2
4361
4362 #define GEN7_MEDIA_CURBE_LOAD_length 0x00000004
4363
4364 struct GEN7_MEDIA_CURBE_LOAD {
4365 uint32_t CommandType;
4366 uint32_t Pipeline;
4367 uint32_t MediaCommandOpcode;
4368 uint32_t SubOpcode;
4369 uint32_t DwordLength;
4370 uint32_t CURBETotalDataLength;
4371 uint32_t CURBEDataStartAddress;
4372 };
4373
4374 static inline void
4375 GEN7_MEDIA_CURBE_LOAD_pack(__gen_user_data *data, void * restrict dst,
4376 const struct GEN7_MEDIA_CURBE_LOAD * restrict values)
4377 {
4378 uint32_t *dw = (uint32_t * restrict) dst;
4379
4380 dw[0] =
4381 __gen_field(values->CommandType, 29, 31) |
4382 __gen_field(values->Pipeline, 27, 28) |
4383 __gen_field(values->MediaCommandOpcode, 24, 26) |
4384 __gen_field(values->SubOpcode, 16, 23) |
4385 __gen_field(values->DwordLength, 0, 15) |
4386 0;
4387
4388 dw[1] =
4389 0;
4390
4391 dw[2] =
4392 __gen_field(values->CURBETotalDataLength, 0, 16) |
4393 0;
4394
4395 dw[3] =
4396 __gen_field(values->CURBEDataStartAddress, 0, 31) |
4397 0;
4398
4399 }
4400
4401 #define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length_bias 0x00000002
4402 #define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_header\
4403 .CommandType = 3, \
4404 .Pipeline = 2, \
4405 .MediaCommandOpcode = 0, \
4406 .SubOpcode = 2, \
4407 .DwordLength = 2
4408
4409 #define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 0x00000004
4410
4411 struct GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD {
4412 uint32_t CommandType;
4413 uint32_t Pipeline;
4414 uint32_t MediaCommandOpcode;
4415 uint32_t SubOpcode;
4416 uint32_t DwordLength;
4417 uint32_t InterfaceDescriptorTotalLength;
4418 uint32_t InterfaceDescriptorDataStartAddress;
4419 };
4420
4421 static inline void
4422 GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_pack(__gen_user_data *data, void * restrict dst,
4423 const struct GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD * restrict values)
4424 {
4425 uint32_t *dw = (uint32_t * restrict) dst;
4426
4427 dw[0] =
4428 __gen_field(values->CommandType, 29, 31) |
4429 __gen_field(values->Pipeline, 27, 28) |
4430 __gen_field(values->MediaCommandOpcode, 24, 26) |
4431 __gen_field(values->SubOpcode, 16, 23) |
4432 __gen_field(values->DwordLength, 0, 15) |
4433 0;
4434
4435 dw[1] =
4436 0;
4437
4438 dw[2] =
4439 __gen_field(values->InterfaceDescriptorTotalLength, 0, 16) |
4440 0;
4441
4442 dw[3] =
4443 __gen_offset(values->InterfaceDescriptorDataStartAddress, 0, 31) |
4444 0;
4445
4446 }
4447
4448 #define GEN7_MEDIA_OBJECT_length_bias 0x00000002
4449 #define GEN7_MEDIA_OBJECT_header \
4450 .CommandType = 3, \
4451 .MediaCommandPipeline = 2, \
4452 .MediaCommandOpcode = 1, \
4453 .MediaCommandSubOpcode = 0
4454
4455 #define GEN7_MEDIA_OBJECT_length 0x00000000
4456
4457 struct GEN7_MEDIA_OBJECT {
4458 uint32_t CommandType;
4459 uint32_t MediaCommandPipeline;
4460 uint32_t MediaCommandOpcode;
4461 uint32_t MediaCommandSubOpcode;
4462 uint32_t DwordLength;
4463 uint32_t InterfaceDescriptorOffset;
4464 bool ChildrenPresent;
4465 #define Nothreadsynchronization 0
4466 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
4467 uint32_t ThreadSynchronization;
4468 #define Notusingscoreboard 0
4469 #define Usingscoreboard 1
4470 uint32_t UseScoreboard;
4471 #define HalfSlice1 2
4472 #define HalfSlice0 1
4473 #define Eitherhalfslice 0
4474 uint32_t HalfSliceDestinationSelect;
4475 uint32_t IndirectDataLength;
4476 __gen_address_type IndirectDataStartAddress;
4477 uint32_t ScoredboardY;
4478 uint32_t ScoreboardX;
4479 uint32_t ScoreboardColor;
4480 bool ScoreboardMask;
4481 /* variable length fields follow */
4482 };
4483
4484 static inline void
4485 GEN7_MEDIA_OBJECT_pack(__gen_user_data *data, void * restrict dst,
4486 const struct GEN7_MEDIA_OBJECT * restrict values)
4487 {
4488 uint32_t *dw = (uint32_t * restrict) dst;
4489
4490 dw[0] =
4491 __gen_field(values->CommandType, 29, 31) |
4492 __gen_field(values->MediaCommandPipeline, 27, 28) |
4493 __gen_field(values->MediaCommandOpcode, 24, 26) |
4494 __gen_field(values->MediaCommandSubOpcode, 16, 23) |
4495 __gen_field(values->DwordLength, 0, 15) |
4496 0;
4497
4498 dw[1] =
4499 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
4500 0;
4501
4502 dw[2] =
4503 __gen_field(values->ChildrenPresent, 31, 31) |
4504 __gen_field(values->ThreadSynchronization, 24, 24) |
4505 __gen_field(values->UseScoreboard, 21, 21) |
4506 __gen_field(values->HalfSliceDestinationSelect, 17, 18) |
4507 __gen_field(values->IndirectDataLength, 0, 16) |
4508 0;
4509
4510 uint32_t dw3 =
4511 0;
4512
4513 dw[3] =
4514 __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, dw3);
4515
4516 dw[4] =
4517 __gen_field(values->ScoredboardY, 16, 24) |
4518 __gen_field(values->ScoreboardX, 0, 8) |
4519 0;
4520
4521 dw[5] =
4522 __gen_field(values->ScoreboardColor, 16, 19) |
4523 __gen_field(values->ScoreboardMask, 0, 7) |
4524 0;
4525
4526 /* variable length fields follow */
4527 }
4528
4529 #define GEN7_MEDIA_OBJECT_PRT_length_bias 0x00000002
4530 #define GEN7_MEDIA_OBJECT_PRT_header \
4531 .CommandType = 3, \
4532 .Pipeline = 2, \
4533 .MediaCommandOpcode = 1, \
4534 .SubOpcode = 2, \
4535 .DwordLength = 14
4536
4537 #define GEN7_MEDIA_OBJECT_PRT_length 0x00000010
4538
4539 struct GEN7_MEDIA_OBJECT_PRT {
4540 uint32_t CommandType;
4541 uint32_t Pipeline;
4542 uint32_t MediaCommandOpcode;
4543 uint32_t SubOpcode;
4544 uint32_t DwordLength;
4545 uint32_t InterfaceDescriptorOffset;
4546 bool ChildrenPresent;
4547 bool PRT_FenceNeeded;
4548 #define Rootthreadqueue 0
4549 #define VFEstateflush 1
4550 uint32_t PRT_FenceType;
4551 uint32_t InlineData[12];
4552 };
4553
4554 static inline void
4555 GEN7_MEDIA_OBJECT_PRT_pack(__gen_user_data *data, void * restrict dst,
4556 const struct GEN7_MEDIA_OBJECT_PRT * restrict values)
4557 {
4558 uint32_t *dw = (uint32_t * restrict) dst;
4559
4560 dw[0] =
4561 __gen_field(values->CommandType, 29, 31) |
4562 __gen_field(values->Pipeline, 27, 28) |
4563 __gen_field(values->MediaCommandOpcode, 24, 26) |
4564 __gen_field(values->SubOpcode, 16, 23) |
4565 __gen_field(values->DwordLength, 0, 15) |
4566 0;
4567
4568 dw[1] =
4569 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
4570 0;
4571
4572 dw[2] =
4573 __gen_field(values->ChildrenPresent, 31, 31) |
4574 __gen_field(values->PRT_FenceNeeded, 23, 23) |
4575 __gen_field(values->PRT_FenceType, 22, 22) |
4576 0;
4577
4578 dw[3] =
4579 0;
4580
4581 for (uint32_t i = 0, j = 4; i < 12; i += 1, j++) {
4582 dw[j] =
4583 __gen_field(values->InlineData[i + 0], 0, 31) |
4584 0;
4585 }
4586
4587 }
4588
4589 #define GEN7_MEDIA_OBJECT_WALKER_length_bias 0x00000002
4590 #define GEN7_MEDIA_OBJECT_WALKER_header \
4591 .CommandType = 3, \
4592 .Pipeline = 2, \
4593 .MediaCommandOpcode = 1, \
4594 .SubOpcode = 3
4595
4596 #define GEN7_MEDIA_OBJECT_WALKER_length 0x00000000
4597
4598 struct GEN7_MEDIA_OBJECT_WALKER {
4599 uint32_t CommandType;
4600 uint32_t Pipeline;
4601 uint32_t MediaCommandOpcode;
4602 uint32_t SubOpcode;
4603 uint32_t DwordLength;
4604 uint32_t InterfaceDescriptorOffset;
4605 bool ChildrenPresent;
4606 #define Nothreadsynchronization 0
4607 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
4608 uint32_t ThreadSynchronization;
4609 #define Notusingscoreboard 0
4610 #define Usingscoreboard 1
4611 uint32_t UseScoreboard;
4612 uint32_t IndirectDataLength;
4613 uint32_t IndirectDataStartAddress;
4614 bool ScoreboardMask;
4615 bool DualMode;
4616 bool Repel;
4617 uint32_t ColorCountMinusOne;
4618 uint32_t MiddleLoopExtraSteps;
4619 uint32_t LocalMidLoopUnitY;
4620 uint32_t MidLoopUnitX;
4621 uint32_t GlobalLoopExecCount;
4622 uint32_t LocalLoopExecCount;
4623 uint32_t BlockResolutionY;
4624 uint32_t BlockResolutionX;
4625 uint32_t LocalStartY;
4626 uint32_t LocalStartX;
4627 uint32_t LocalEndY;
4628 uint32_t LocalEndX;
4629 uint32_t LocalOuterLoopStrideY;
4630 uint32_t LocalOuterLoopStrideX;
4631 uint32_t LocalInnerLoopUnitY;
4632 uint32_t LocalInnerLoopUnitX;
4633 uint32_t GlobalResolutionY;
4634 uint32_t GlobalResolutionX;
4635 uint32_t GlobalStartY;
4636 uint32_t GlobalStartX;
4637 uint32_t GlobalOuterLoopStrideY;
4638 uint32_t GlobalOuterLoopStrideX;
4639 uint32_t GlobalInnerLoopUnitY;
4640 uint32_t GlobalInnerLoopUnitX;
4641 /* variable length fields follow */
4642 };
4643
4644 static inline void
4645 GEN7_MEDIA_OBJECT_WALKER_pack(__gen_user_data *data, void * restrict dst,
4646 const struct GEN7_MEDIA_OBJECT_WALKER * restrict values)
4647 {
4648 uint32_t *dw = (uint32_t * restrict) dst;
4649
4650 dw[0] =
4651 __gen_field(values->CommandType, 29, 31) |
4652 __gen_field(values->Pipeline, 27, 28) |
4653 __gen_field(values->MediaCommandOpcode, 24, 26) |
4654 __gen_field(values->SubOpcode, 16, 23) |
4655 __gen_field(values->DwordLength, 0, 15) |
4656 0;
4657
4658 dw[1] =
4659 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
4660 0;
4661
4662 dw[2] =
4663 __gen_field(values->ChildrenPresent, 31, 31) |
4664 __gen_field(values->ThreadSynchronization, 24, 24) |
4665 __gen_field(values->UseScoreboard, 21, 21) |
4666 __gen_field(values->IndirectDataLength, 0, 16) |
4667 0;
4668
4669 dw[3] =
4670 __gen_offset(values->IndirectDataStartAddress, 0, 31) |
4671 0;
4672
4673 dw[4] =
4674 0;
4675
4676 dw[5] =
4677 __gen_field(values->ScoreboardMask, 0, 7) |
4678 0;
4679
4680 dw[6] =
4681 __gen_field(values->DualMode, 31, 31) |
4682 __gen_field(values->Repel, 30, 30) |
4683 __gen_field(values->ColorCountMinusOne, 24, 27) |
4684 __gen_field(values->MiddleLoopExtraSteps, 16, 20) |
4685 __gen_field(values->LocalMidLoopUnitY, 12, 13) |
4686 __gen_field(values->MidLoopUnitX, 8, 9) |
4687 0;
4688
4689 dw[7] =
4690 __gen_field(values->GlobalLoopExecCount, 16, 25) |
4691 __gen_field(values->LocalLoopExecCount, 0, 9) |
4692 0;
4693
4694 dw[8] =
4695 __gen_field(values->BlockResolutionY, 16, 24) |
4696 __gen_field(values->BlockResolutionX, 0, 8) |
4697 0;
4698
4699 dw[9] =
4700 __gen_field(values->LocalStartY, 16, 24) |
4701 __gen_field(values->LocalStartX, 0, 8) |
4702 0;
4703
4704 dw[10] =
4705 __gen_field(values->LocalEndY, 16, 24) |
4706 __gen_field(values->LocalEndX, 0, 8) |
4707 0;
4708
4709 dw[11] =
4710 __gen_field(values->LocalOuterLoopStrideY, 16, 25) |
4711 __gen_field(values->LocalOuterLoopStrideX, 0, 9) |
4712 0;
4713
4714 dw[12] =
4715 __gen_field(values->LocalInnerLoopUnitY, 16, 25) |
4716 __gen_field(values->LocalInnerLoopUnitX, 0, 9) |
4717 0;
4718
4719 dw[13] =
4720 __gen_field(values->GlobalResolutionY, 16, 24) |
4721 __gen_field(values->GlobalResolutionX, 0, 8) |
4722 0;
4723
4724 dw[14] =
4725 __gen_field(values->GlobalStartY, 16, 25) |
4726 __gen_field(values->GlobalStartX, 0, 9) |
4727 0;
4728
4729 dw[15] =
4730 __gen_field(values->GlobalOuterLoopStrideY, 16, 25) |
4731 __gen_field(values->GlobalOuterLoopStrideX, 0, 9) |
4732 0;
4733
4734 dw[16] =
4735 __gen_field(values->GlobalInnerLoopUnitY, 16, 25) |
4736 __gen_field(values->GlobalInnerLoopUnitX, 0, 9) |
4737 0;
4738
4739 /* variable length fields follow */
4740 }
4741
4742 #define GEN7_MEDIA_STATE_FLUSH_length_bias 0x00000002
4743 #define GEN7_MEDIA_STATE_FLUSH_header \
4744 .CommandType = 3, \
4745 .Pipeline = 2, \
4746 .MediaCommandOpcode = 0, \
4747 .SubOpcode = 4, \
4748 .DwordLength = 0
4749
4750 #define GEN7_MEDIA_STATE_FLUSH_length 0x00000002
4751
4752 struct GEN7_MEDIA_STATE_FLUSH {
4753 uint32_t CommandType;
4754 uint32_t Pipeline;
4755 uint32_t MediaCommandOpcode;
4756 uint32_t SubOpcode;
4757 uint32_t DwordLength;
4758 uint32_t WatermarkRequired;
4759 uint32_t InterfaceDescriptorOffset;
4760 };
4761
4762 static inline void
4763 GEN7_MEDIA_STATE_FLUSH_pack(__gen_user_data *data, void * restrict dst,
4764 const struct GEN7_MEDIA_STATE_FLUSH * restrict values)
4765 {
4766 uint32_t *dw = (uint32_t * restrict) dst;
4767
4768 dw[0] =
4769 __gen_field(values->CommandType, 29, 31) |
4770 __gen_field(values->Pipeline, 27, 28) |
4771 __gen_field(values->MediaCommandOpcode, 24, 26) |
4772 __gen_field(values->SubOpcode, 16, 23) |
4773 __gen_field(values->DwordLength, 0, 15) |
4774 0;
4775
4776 dw[1] =
4777 __gen_field(values->WatermarkRequired, 6, 6) |
4778 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
4779 0;
4780
4781 }
4782
4783 #define GEN7_MEDIA_VFE_STATE_length_bias 0x00000002
4784 #define GEN7_MEDIA_VFE_STATE_header \
4785 .CommandType = 3, \
4786 .Pipeline = 2, \
4787 .MediaCommandOpcode = 0, \
4788 .SubOpcode = 0, \
4789 .DwordLength = 6
4790
4791 #define GEN7_MEDIA_VFE_STATE_length 0x00000008
4792
4793 struct GEN7_MEDIA_VFE_STATE {
4794 uint32_t CommandType;
4795 uint32_t Pipeline;
4796 uint32_t MediaCommandOpcode;
4797 uint32_t SubOpcode;
4798 uint32_t DwordLength;
4799 uint32_t ScratchSpaceBasePointer;
4800 uint32_t PerThreadScratchSpace;
4801 uint32_t MaximumNumberofThreads;
4802 uint32_t NumberofURBEntries;
4803 #define Maintainingtheexistingtimestampstate 0
4804 #define Resettingrelativetimerandlatchingtheglobaltimestamp 1
4805 uint32_t ResetGatewayTimer;
4806 #define MaintainingOpenGatewayForwardMsgCloseGatewayprotocollegacymode 0
4807 #define BypassingOpenGatewayCloseGatewayprotocol 1
4808 uint32_t BypassGatewayControl;
4809 #define NoMMIOreadwriteallowed 0
4810 #define MMIOreadwritetoanyaddress 2
4811 uint32_t GatewayMMIOAccessControl;
4812 uint32_t GPGPUMode;
4813 uint32_t URBEntryAllocationSize;
4814 uint32_t CURBEAllocationSize;
4815 #define Scoreboarddisabled 0
4816 #define Scoreboardenabled 1
4817 uint32_t ScoreboardEnable;
4818 #define StallingScoreboard 0
4819 #define NonStallingScoreboard 1
4820 uint32_t ScoreboardType;
4821 uint32_t ScoreboardMask;
4822 uint32_t Scoreboard3DeltaY;
4823 uint32_t Scoreboard3DeltaX;
4824 uint32_t Scoreboard2DeltaY;
4825 uint32_t Scoreboard2DeltaX;
4826 uint32_t Scoreboard1DeltaY;
4827 uint32_t Scoreboard1DeltaX;
4828 uint32_t Scoreboard0DeltaY;
4829 uint32_t Scoreboard0DeltaX;
4830 uint32_t Scoreboard7DeltaY;
4831 uint32_t Scoreboard7DeltaX;
4832 uint32_t Scoreboard6DeltaY;
4833 uint32_t Scoreboard6DeltaX;
4834 uint32_t Scoreboard5DeltaY;
4835 uint32_t Scoreboard5DeltaX;
4836 uint32_t Scoreboard4DeltaY;
4837 uint32_t Scoreboard4DeltaX;
4838 };
4839
4840 static inline void
4841 GEN7_MEDIA_VFE_STATE_pack(__gen_user_data *data, void * restrict dst,
4842 const struct GEN7_MEDIA_VFE_STATE * restrict values)
4843 {
4844 uint32_t *dw = (uint32_t * restrict) dst;
4845
4846 dw[0] =
4847 __gen_field(values->CommandType, 29, 31) |
4848 __gen_field(values->Pipeline, 27, 28) |
4849 __gen_field(values->MediaCommandOpcode, 24, 26) |
4850 __gen_field(values->SubOpcode, 16, 23) |
4851 __gen_field(values->DwordLength, 0, 15) |
4852 0;
4853
4854 dw[1] =
4855 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
4856 __gen_field(values->PerThreadScratchSpace, 0, 3) |
4857 0;
4858
4859 dw[2] =
4860 __gen_field(values->MaximumNumberofThreads, 16, 31) |
4861 __gen_field(values->NumberofURBEntries, 8, 15) |
4862 __gen_field(values->ResetGatewayTimer, 7, 7) |
4863 __gen_field(values->BypassGatewayControl, 6, 6) |
4864 __gen_field(values->GatewayMMIOAccessControl, 3, 4) |
4865 __gen_field(values->GPGPUMode, 2, 2) |
4866 0;
4867
4868 dw[3] =
4869 0;
4870
4871 dw[4] =
4872 __gen_field(values->URBEntryAllocationSize, 16, 31) |
4873 __gen_field(values->CURBEAllocationSize, 0, 15) |
4874 0;
4875
4876 dw[5] =
4877 __gen_field(values->ScoreboardEnable, 31, 31) |
4878 __gen_field(values->ScoreboardType, 30, 30) |
4879 __gen_field(values->ScoreboardMask, 0, 7) |
4880 0;
4881
4882 dw[6] =
4883 __gen_field(values->Scoreboard3DeltaY, 28, 31) |
4884 __gen_field(values->Scoreboard3DeltaX, 24, 27) |
4885 __gen_field(values->Scoreboard2DeltaY, 20, 23) |
4886 __gen_field(values->Scoreboard2DeltaX, 16, 19) |
4887 __gen_field(values->Scoreboard1DeltaY, 12, 15) |
4888 __gen_field(values->Scoreboard1DeltaX, 8, 11) |
4889 __gen_field(values->Scoreboard0DeltaY, 4, 7) |
4890 __gen_field(values->Scoreboard0DeltaX, 0, 3) |
4891 0;
4892
4893 dw[7] =
4894 __gen_field(values->Scoreboard7DeltaY, 28, 31) |
4895 __gen_field(values->Scoreboard7DeltaX, 24, 27) |
4896 __gen_field(values->Scoreboard6DeltaY, 20, 23) |
4897 __gen_field(values->Scoreboard6DeltaX, 16, 19) |
4898 __gen_field(values->Scoreboard5DeltaY, 12, 15) |
4899 __gen_field(values->Scoreboard5DeltaX, 8, 11) |
4900 __gen_field(values->Scoreboard4DeltaY, 4, 7) |
4901 __gen_field(values->Scoreboard4DeltaX, 0, 3) |
4902 0;
4903
4904 }
4905
4906 #define GEN7_MI_ARB_CHECK_length_bias 0x00000001
4907 #define GEN7_MI_ARB_CHECK_header \
4908 .CommandType = 0, \
4909 .MICommandOpcode = 5
4910
4911 #define GEN7_MI_ARB_CHECK_length 0x00000001
4912
4913 struct GEN7_MI_ARB_CHECK {
4914 uint32_t CommandType;
4915 uint32_t MICommandOpcode;
4916 };
4917
4918 static inline void
4919 GEN7_MI_ARB_CHECK_pack(__gen_user_data *data, void * restrict dst,
4920 const struct GEN7_MI_ARB_CHECK * restrict values)
4921 {
4922 uint32_t *dw = (uint32_t * restrict) dst;
4923
4924 dw[0] =
4925 __gen_field(values->CommandType, 29, 31) |
4926 __gen_field(values->MICommandOpcode, 23, 28) |
4927 0;
4928
4929 }
4930
4931 #define GEN7_MI_ARB_ON_OFF_length_bias 0x00000001
4932 #define GEN7_MI_ARB_ON_OFF_header \
4933 .CommandType = 0, \
4934 .MICommandOpcode = 8
4935
4936 #define GEN7_MI_ARB_ON_OFF_length 0x00000001
4937
4938 struct GEN7_MI_ARB_ON_OFF {
4939 uint32_t CommandType;
4940 uint32_t MICommandOpcode;
4941 bool ArbitrationEnable;
4942 };
4943
4944 static inline void
4945 GEN7_MI_ARB_ON_OFF_pack(__gen_user_data *data, void * restrict dst,
4946 const struct GEN7_MI_ARB_ON_OFF * restrict values)
4947 {
4948 uint32_t *dw = (uint32_t * restrict) dst;
4949
4950 dw[0] =
4951 __gen_field(values->CommandType, 29, 31) |
4952 __gen_field(values->MICommandOpcode, 23, 28) |
4953 __gen_field(values->ArbitrationEnable, 0, 0) |
4954 0;
4955
4956 }
4957
4958 #define GEN7_MI_BATCH_BUFFER_END_length_bias 0x00000001
4959 #define GEN7_MI_BATCH_BUFFER_END_header \
4960 .CommandType = 0, \
4961 .MICommandOpcode = 10
4962
4963 #define GEN7_MI_BATCH_BUFFER_END_length 0x00000001
4964
4965 struct GEN7_MI_BATCH_BUFFER_END {
4966 uint32_t CommandType;
4967 uint32_t MICommandOpcode;
4968 };
4969
4970 static inline void
4971 GEN7_MI_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
4972 const struct GEN7_MI_BATCH_BUFFER_END * restrict values)
4973 {
4974 uint32_t *dw = (uint32_t * restrict) dst;
4975
4976 dw[0] =
4977 __gen_field(values->CommandType, 29, 31) |
4978 __gen_field(values->MICommandOpcode, 23, 28) |
4979 0;
4980
4981 }
4982
4983 #define GEN7_MI_BATCH_BUFFER_START_length_bias 0x00000002
4984 #define GEN7_MI_BATCH_BUFFER_START_header \
4985 .CommandType = 0, \
4986 .MICommandOpcode = 49, \
4987 .DwordLength = 0
4988
4989 #define GEN7_MI_BATCH_BUFFER_START_length 0x00000002
4990
4991 struct GEN7_MI_BATCH_BUFFER_START {
4992 uint32_t CommandType;
4993 uint32_t MICommandOpcode;
4994 bool ClearCommandBufferEnable;
4995 #define ASI_GGTT 0
4996 #define ASI_PPGTT 1
4997 uint32_t AddressSpaceIndicator;
4998 uint32_t DwordLength;
4999 __gen_address_type BatchBufferStartAddress;
5000 };
5001
5002 static inline void
5003 GEN7_MI_BATCH_BUFFER_START_pack(__gen_user_data *data, void * restrict dst,
5004 const struct GEN7_MI_BATCH_BUFFER_START * restrict values)
5005 {
5006 uint32_t *dw = (uint32_t * restrict) dst;
5007
5008 dw[0] =
5009 __gen_field(values->CommandType, 29, 31) |
5010 __gen_field(values->MICommandOpcode, 23, 28) |
5011 __gen_field(values->ClearCommandBufferEnable, 11, 11) |
5012 __gen_field(values->AddressSpaceIndicator, 8, 8) |
5013 __gen_field(values->DwordLength, 0, 7) |
5014 0;
5015
5016 uint32_t dw1 =
5017 0;
5018
5019 dw[1] =
5020 __gen_combine_address(data, &dw[1], values->BatchBufferStartAddress, dw1);
5021
5022 }
5023
5024 #define GEN7_MI_CLFLUSH_length_bias 0x00000002
5025 #define GEN7_MI_CLFLUSH_header \
5026 .CommandType = 0, \
5027 .MICommandOpcode = 39
5028
5029 #define GEN7_MI_CLFLUSH_length 0x00000000
5030
5031 struct GEN7_MI_CLFLUSH {
5032 uint32_t CommandType;
5033 uint32_t MICommandOpcode;
5034 #define PerProcessGraphicsAddress 0
5035 #define GlobalGraphicsAddress 1
5036 uint32_t UseGlobalGTT;
5037 uint32_t DwordLength;
5038 __gen_address_type PageBaseAddress;
5039 uint32_t StartingCachelineOffset;
5040 __gen_address_type PageBaseAddressHigh;
5041 /* variable length fields follow */
5042 };
5043
5044 static inline void
5045 GEN7_MI_CLFLUSH_pack(__gen_user_data *data, void * restrict dst,
5046 const struct GEN7_MI_CLFLUSH * restrict values)
5047 {
5048 uint32_t *dw = (uint32_t * restrict) dst;
5049
5050 dw[0] =
5051 __gen_field(values->CommandType, 29, 31) |
5052 __gen_field(values->MICommandOpcode, 23, 28) |
5053 __gen_field(values->UseGlobalGTT, 22, 22) |
5054 __gen_field(values->DwordLength, 0, 9) |
5055 0;
5056
5057 uint32_t dw1 =
5058 __gen_field(values->StartingCachelineOffset, 6, 11) |
5059 0;
5060
5061 dw[1] =
5062 __gen_combine_address(data, &dw[1], values->PageBaseAddress, dw1);
5063
5064 uint32_t dw2 =
5065 0;
5066
5067 dw[2] =
5068 __gen_combine_address(data, &dw[2], values->PageBaseAddressHigh, dw2);
5069
5070 /* variable length fields follow */
5071 }
5072
5073 #define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_length_bias 0x00000002
5074 #define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_header\
5075 .CommandType = 0, \
5076 .MICommandOpcode = 54, \
5077 .UseGlobalGTT = 0, \
5078 .CompareSemaphore = 0, \
5079 .DwordLength = 0
5080
5081 #define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_length 0x00000002
5082
5083 struct GEN7_MI_CONDITIONAL_BATCH_BUFFER_END {
5084 uint32_t CommandType;
5085 uint32_t MICommandOpcode;
5086 uint32_t UseGlobalGTT;
5087 uint32_t CompareSemaphore;
5088 uint32_t DwordLength;
5089 uint32_t CompareDataDword;
5090 __gen_address_type CompareAddress;
5091 };
5092
5093 static inline void
5094 GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
5095 const struct GEN7_MI_CONDITIONAL_BATCH_BUFFER_END * restrict values)
5096 {
5097 uint32_t *dw = (uint32_t * restrict) dst;
5098
5099 dw[0] =
5100 __gen_field(values->CommandType, 29, 31) |
5101 __gen_field(values->MICommandOpcode, 23, 28) |
5102 __gen_field(values->UseGlobalGTT, 22, 22) |
5103 __gen_field(values->CompareSemaphore, 21, 21) |
5104 __gen_field(values->DwordLength, 0, 7) |
5105 0;
5106
5107 dw[1] =
5108 __gen_field(values->CompareDataDword, 0, 31) |
5109 0;
5110
5111 uint32_t dw2 =
5112 0;
5113
5114 dw[2] =
5115 __gen_combine_address(data, &dw[2], values->CompareAddress, dw2);
5116
5117 }
5118
5119 #define GEN7_MI_FLUSH_length_bias 0x00000001
5120 #define GEN7_MI_FLUSH_header \
5121 .CommandType = 0, \
5122 .MICommandOpcode = 4
5123
5124 #define GEN7_MI_FLUSH_length 0x00000001
5125
5126 struct GEN7_MI_FLUSH {
5127 uint32_t CommandType;
5128 uint32_t MICommandOpcode;
5129 bool IndirectStatePointersDisable;
5130 bool GenericMediaStateClear;
5131 #define DontReset 0
5132 #define Reset 1
5133 bool GlobalSnapshotCountReset;
5134 #define Flush 0
5135 #define DontFlush 1
5136 bool RenderCacheFlushInhibit;
5137 #define DontInvalidate 0
5138 #define Invalidate 1
5139 bool StateInstructionCacheInvalidate;
5140 };
5141
5142 static inline void
5143 GEN7_MI_FLUSH_pack(__gen_user_data *data, void * restrict dst,
5144 const struct GEN7_MI_FLUSH * restrict values)
5145 {
5146 uint32_t *dw = (uint32_t * restrict) dst;
5147
5148 dw[0] =
5149 __gen_field(values->CommandType, 29, 31) |
5150 __gen_field(values->MICommandOpcode, 23, 28) |
5151 __gen_field(values->IndirectStatePointersDisable, 5, 5) |
5152 __gen_field(values->GenericMediaStateClear, 4, 4) |
5153 __gen_field(values->GlobalSnapshotCountReset, 3, 3) |
5154 __gen_field(values->RenderCacheFlushInhibit, 2, 2) |
5155 __gen_field(values->StateInstructionCacheInvalidate, 1, 1) |
5156 0;
5157
5158 }
5159
5160 #define GEN7_MI_LOAD_REGISTER_IMM_length_bias 0x00000002
5161 #define GEN7_MI_LOAD_REGISTER_IMM_header \
5162 .CommandType = 0, \
5163 .MICommandOpcode = 34, \
5164 .DwordLength = 1
5165
5166 #define GEN7_MI_LOAD_REGISTER_IMM_length 0x00000003
5167
5168 struct GEN7_MI_LOAD_REGISTER_IMM {
5169 uint32_t CommandType;
5170 uint32_t MICommandOpcode;
5171 uint32_t ByteWriteDisables;
5172 uint32_t DwordLength;
5173 uint32_t RegisterOffset;
5174 uint32_t DataDWord;
5175 };
5176
5177 static inline void
5178 GEN7_MI_LOAD_REGISTER_IMM_pack(__gen_user_data *data, void * restrict dst,
5179 const struct GEN7_MI_LOAD_REGISTER_IMM * restrict values)
5180 {
5181 uint32_t *dw = (uint32_t * restrict) dst;
5182
5183 dw[0] =
5184 __gen_field(values->CommandType, 29, 31) |
5185 __gen_field(values->MICommandOpcode, 23, 28) |
5186 __gen_field(values->ByteWriteDisables, 8, 11) |
5187 __gen_field(values->DwordLength, 0, 7) |
5188 0;
5189
5190 dw[1] =
5191 __gen_offset(values->RegisterOffset, 2, 22) |
5192 0;
5193
5194 dw[2] =
5195 __gen_field(values->DataDWord, 0, 31) |
5196 0;
5197
5198 }
5199
5200 #define GEN7_MI_LOAD_REGISTER_MEM_length_bias 0x00000002
5201 #define GEN7_MI_LOAD_REGISTER_MEM_header \
5202 .CommandType = 0, \
5203 .MICommandOpcode = 41, \
5204 .DwordLength = 1
5205
5206 #define GEN7_MI_LOAD_REGISTER_MEM_length 0x00000003
5207
5208 struct GEN7_MI_LOAD_REGISTER_MEM {
5209 uint32_t CommandType;
5210 uint32_t MICommandOpcode;
5211 bool UseGlobalGTT;
5212 uint32_t AsyncModeEnable;
5213 uint32_t DwordLength;
5214 uint32_t RegisterAddress;
5215 __gen_address_type MemoryAddress;
5216 };
5217
5218 static inline void
5219 GEN7_MI_LOAD_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
5220 const struct GEN7_MI_LOAD_REGISTER_MEM * restrict values)
5221 {
5222 uint32_t *dw = (uint32_t * restrict) dst;
5223
5224 dw[0] =
5225 __gen_field(values->CommandType, 29, 31) |
5226 __gen_field(values->MICommandOpcode, 23, 28) |
5227 __gen_field(values->UseGlobalGTT, 22, 22) |
5228 __gen_field(values->AsyncModeEnable, 21, 21) |
5229 __gen_field(values->DwordLength, 0, 7) |
5230 0;
5231
5232 dw[1] =
5233 __gen_offset(values->RegisterAddress, 2, 22) |
5234 0;
5235
5236 uint32_t dw2 =
5237 0;
5238
5239 dw[2] =
5240 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
5241
5242 }
5243
5244 #define GEN7_MI_NOOP_length_bias 0x00000001
5245 #define GEN7_MI_NOOP_header \
5246 .CommandType = 0, \
5247 .MICommandOpcode = 0
5248
5249 #define GEN7_MI_NOOP_length 0x00000001
5250
5251 struct GEN7_MI_NOOP {
5252 uint32_t CommandType;
5253 uint32_t MICommandOpcode;
5254 bool IdentificationNumberRegisterWriteEnable;
5255 uint32_t IdentificationNumber;
5256 };
5257
5258 static inline void
5259 GEN7_MI_NOOP_pack(__gen_user_data *data, void * restrict dst,
5260 const struct GEN7_MI_NOOP * restrict values)
5261 {
5262 uint32_t *dw = (uint32_t * restrict) dst;
5263
5264 dw[0] =
5265 __gen_field(values->CommandType, 29, 31) |
5266 __gen_field(values->MICommandOpcode, 23, 28) |
5267 __gen_field(values->IdentificationNumberRegisterWriteEnable, 22, 22) |
5268 __gen_field(values->IdentificationNumber, 0, 21) |
5269 0;
5270
5271 }
5272
5273 #define GEN7_MI_PREDICATE_length_bias 0x00000001
5274 #define GEN7_MI_PREDICATE_header \
5275 .CommandType = 0, \
5276 .MICommandOpcode = 12
5277
5278 #define GEN7_MI_PREDICATE_length 0x00000001
5279
5280 struct GEN7_MI_PREDICATE {
5281 uint32_t CommandType;
5282 uint32_t MICommandOpcode;
5283 #define LOAD_KEEP 0
5284 #define LOAD_LOAD 2
5285 #define LOAD_LOADINV 3
5286 uint32_t LoadOperation;
5287 #define COMBINE_SET 0
5288 #define COMBINE_AND 1
5289 #define COMBINE_OR 2
5290 #define COMBINE_XOR 3
5291 uint32_t CombineOperation;
5292 #define COMPARE_SRCS_EQUAL 2
5293 #define COMPARE_DELTAS_EQUAL 3
5294 uint32_t CompareOperation;
5295 };
5296
5297 static inline void
5298 GEN7_MI_PREDICATE_pack(__gen_user_data *data, void * restrict dst,
5299 const struct GEN7_MI_PREDICATE * restrict values)
5300 {
5301 uint32_t *dw = (uint32_t * restrict) dst;
5302
5303 dw[0] =
5304 __gen_field(values->CommandType, 29, 31) |
5305 __gen_field(values->MICommandOpcode, 23, 28) |
5306 __gen_field(values->LoadOperation, 6, 7) |
5307 __gen_field(values->CombineOperation, 3, 4) |
5308 __gen_field(values->CompareOperation, 0, 1) |
5309 0;
5310
5311 }
5312
5313 #define GEN7_MI_REPORT_HEAD_length_bias 0x00000001
5314 #define GEN7_MI_REPORT_HEAD_header \
5315 .CommandType = 0, \
5316 .MICommandOpcode = 7
5317
5318 #define GEN7_MI_REPORT_HEAD_length 0x00000001
5319
5320 struct GEN7_MI_REPORT_HEAD {
5321 uint32_t CommandType;
5322 uint32_t MICommandOpcode;
5323 };
5324
5325 static inline void
5326 GEN7_MI_REPORT_HEAD_pack(__gen_user_data *data, void * restrict dst,
5327 const struct GEN7_MI_REPORT_HEAD * restrict values)
5328 {
5329 uint32_t *dw = (uint32_t * restrict) dst;
5330
5331 dw[0] =
5332 __gen_field(values->CommandType, 29, 31) |
5333 __gen_field(values->MICommandOpcode, 23, 28) |
5334 0;
5335
5336 }
5337
5338 #define GEN7_MI_SEMAPHORE_MBOX_length_bias 0x00000002
5339 #define GEN7_MI_SEMAPHORE_MBOX_header \
5340 .CommandType = 0, \
5341 .MICommandOpcode = 22, \
5342 .DwordLength = 1
5343
5344 #define GEN7_MI_SEMAPHORE_MBOX_length 0x00000003
5345
5346 struct GEN7_MI_SEMAPHORE_MBOX {
5347 uint32_t CommandType;
5348 uint32_t MICommandOpcode;
5349 #define RVSYNC 0
5350 #define RBSYNC 2
5351 #define UseGeneralRegisterSelect 3
5352 uint32_t RegisterSelect;
5353 uint32_t DwordLength;
5354 uint32_t SemaphoreDataDword;
5355 };
5356
5357 static inline void
5358 GEN7_MI_SEMAPHORE_MBOX_pack(__gen_user_data *data, void * restrict dst,
5359 const struct GEN7_MI_SEMAPHORE_MBOX * restrict values)
5360 {
5361 uint32_t *dw = (uint32_t * restrict) dst;
5362
5363 dw[0] =
5364 __gen_field(values->CommandType, 29, 31) |
5365 __gen_field(values->MICommandOpcode, 23, 28) |
5366 __gen_field(values->RegisterSelect, 16, 17) |
5367 __gen_field(values->DwordLength, 0, 7) |
5368 0;
5369
5370 dw[1] =
5371 __gen_field(values->SemaphoreDataDword, 0, 31) |
5372 0;
5373
5374 dw[2] =
5375 0;
5376
5377 }
5378
5379 #define GEN7_MI_SET_CONTEXT_length_bias 0x00000002
5380 #define GEN7_MI_SET_CONTEXT_header \
5381 .CommandType = 0, \
5382 .MICommandOpcode = 24, \
5383 .DwordLength = 0
5384
5385 #define GEN7_MI_SET_CONTEXT_length 0x00000002
5386
5387 struct GEN7_MI_SET_CONTEXT {
5388 uint32_t CommandType;
5389 uint32_t MICommandOpcode;
5390 uint32_t DwordLength;
5391 __gen_address_type LogicalContextAddress;
5392 uint32_t ReservedMustbe1;
5393 bool ExtendedStateSaveEnable;
5394 bool ExtendedStateRestoreEnable;
5395 uint32_t ForceRestore;
5396 uint32_t RestoreInhibit;
5397 };
5398
5399 static inline void
5400 GEN7_MI_SET_CONTEXT_pack(__gen_user_data *data, void * restrict dst,
5401 const struct GEN7_MI_SET_CONTEXT * restrict values)
5402 {
5403 uint32_t *dw = (uint32_t * restrict) dst;
5404
5405 dw[0] =
5406 __gen_field(values->CommandType, 29, 31) |
5407 __gen_field(values->MICommandOpcode, 23, 28) |
5408 __gen_field(values->DwordLength, 0, 7) |
5409 0;
5410
5411 uint32_t dw1 =
5412 __gen_field(values->ReservedMustbe1, 8, 8) |
5413 __gen_field(values->ExtendedStateSaveEnable, 3, 3) |
5414 __gen_field(values->ExtendedStateRestoreEnable, 2, 2) |
5415 __gen_field(values->ForceRestore, 1, 1) |
5416 __gen_field(values->RestoreInhibit, 0, 0) |
5417 0;
5418
5419 dw[1] =
5420 __gen_combine_address(data, &dw[1], values->LogicalContextAddress, dw1);
5421
5422 }
5423
5424 #define GEN7_MI_STORE_DATA_IMM_length_bias 0x00000002
5425 #define GEN7_MI_STORE_DATA_IMM_header \
5426 .CommandType = 0, \
5427 .MICommandOpcode = 32, \
5428 .DwordLength = 2
5429
5430 #define GEN7_MI_STORE_DATA_IMM_length 0x00000004
5431
5432 struct GEN7_MI_STORE_DATA_IMM {
5433 uint32_t CommandType;
5434 uint32_t MICommandOpcode;
5435 bool UseGlobalGTT;
5436 uint32_t DwordLength;
5437 uint32_t Address;
5438 uint32_t CoreModeEnable;
5439 uint32_t DataDWord0;
5440 uint32_t DataDWord1;
5441 };
5442
5443 static inline void
5444 GEN7_MI_STORE_DATA_IMM_pack(__gen_user_data *data, void * restrict dst,
5445 const struct GEN7_MI_STORE_DATA_IMM * restrict values)
5446 {
5447 uint32_t *dw = (uint32_t * restrict) dst;
5448
5449 dw[0] =
5450 __gen_field(values->CommandType, 29, 31) |
5451 __gen_field(values->MICommandOpcode, 23, 28) |
5452 __gen_field(values->UseGlobalGTT, 22, 22) |
5453 __gen_field(values->DwordLength, 0, 5) |
5454 0;
5455
5456 dw[1] =
5457 0;
5458
5459 dw[2] =
5460 __gen_field(values->Address, 2, 31) |
5461 __gen_field(values->CoreModeEnable, 0, 0) |
5462 0;
5463
5464 dw[3] =
5465 __gen_field(values->DataDWord0, 0, 31) |
5466 0;
5467
5468 dw[4] =
5469 __gen_field(values->DataDWord1, 0, 31) |
5470 0;
5471
5472 }
5473
5474 #define GEN7_MI_STORE_DATA_INDEX_length_bias 0x00000002
5475 #define GEN7_MI_STORE_DATA_INDEX_header \
5476 .CommandType = 0, \
5477 .MICommandOpcode = 33, \
5478 .DwordLength = 1
5479
5480 #define GEN7_MI_STORE_DATA_INDEX_length 0x00000003
5481
5482 struct GEN7_MI_STORE_DATA_INDEX {
5483 uint32_t CommandType;
5484 uint32_t MICommandOpcode;
5485 uint32_t DwordLength;
5486 uint32_t Offset;
5487 uint32_t DataDWord0;
5488 uint32_t DataDWord1;
5489 };
5490
5491 static inline void
5492 GEN7_MI_STORE_DATA_INDEX_pack(__gen_user_data *data, void * restrict dst,
5493 const struct GEN7_MI_STORE_DATA_INDEX * restrict values)
5494 {
5495 uint32_t *dw = (uint32_t * restrict) dst;
5496
5497 dw[0] =
5498 __gen_field(values->CommandType, 29, 31) |
5499 __gen_field(values->MICommandOpcode, 23, 28) |
5500 __gen_field(values->DwordLength, 0, 7) |
5501 0;
5502
5503 dw[1] =
5504 __gen_field(values->Offset, 2, 11) |
5505 0;
5506
5507 dw[2] =
5508 __gen_field(values->DataDWord0, 0, 31) |
5509 0;
5510
5511 dw[3] =
5512 __gen_field(values->DataDWord1, 0, 31) |
5513 0;
5514
5515 }
5516
5517 #define GEN7_MI_SUSPEND_FLUSH_length_bias 0x00000001
5518 #define GEN7_MI_SUSPEND_FLUSH_header \
5519 .CommandType = 0, \
5520 .MICommandOpcode = 11
5521
5522 #define GEN7_MI_SUSPEND_FLUSH_length 0x00000001
5523
5524 struct GEN7_MI_SUSPEND_FLUSH {
5525 uint32_t CommandType;
5526 uint32_t MICommandOpcode;
5527 bool SuspendFlush;
5528 };
5529
5530 static inline void
5531 GEN7_MI_SUSPEND_FLUSH_pack(__gen_user_data *data, void * restrict dst,
5532 const struct GEN7_MI_SUSPEND_FLUSH * restrict values)
5533 {
5534 uint32_t *dw = (uint32_t * restrict) dst;
5535
5536 dw[0] =
5537 __gen_field(values->CommandType, 29, 31) |
5538 __gen_field(values->MICommandOpcode, 23, 28) |
5539 __gen_field(values->SuspendFlush, 0, 0) |
5540 0;
5541
5542 }
5543
5544 #define GEN7_MI_TOPOLOGY_FILTER_length_bias 0x00000001
5545 #define GEN7_MI_TOPOLOGY_FILTER_header \
5546 .CommandType = 0, \
5547 .MICommandOpcode = 13
5548
5549 #define GEN7_MI_TOPOLOGY_FILTER_length 0x00000001
5550
5551 struct GEN7_MI_TOPOLOGY_FILTER {
5552 uint32_t CommandType;
5553 uint32_t MICommandOpcode;
5554 uint32_t TopologyFilterValue;
5555 };
5556
5557 static inline void
5558 GEN7_MI_TOPOLOGY_FILTER_pack(__gen_user_data *data, void * restrict dst,
5559 const struct GEN7_MI_TOPOLOGY_FILTER * restrict values)
5560 {
5561 uint32_t *dw = (uint32_t * restrict) dst;
5562
5563 dw[0] =
5564 __gen_field(values->CommandType, 29, 31) |
5565 __gen_field(values->MICommandOpcode, 23, 28) |
5566 __gen_field(values->TopologyFilterValue, 0, 5) |
5567 0;
5568
5569 }
5570
5571 #define GEN7_MI_UPDATE_GTT_length_bias 0x00000002
5572 #define GEN7_MI_UPDATE_GTT_header \
5573 .CommandType = 0, \
5574 .MICommandOpcode = 35
5575
5576 #define GEN7_MI_UPDATE_GTT_length 0x00000000
5577
5578 struct GEN7_MI_UPDATE_GTT {
5579 uint32_t CommandType;
5580 uint32_t MICommandOpcode;
5581 #define PerProcessGraphicsAddress 0
5582 #define GlobalGraphicsAddress 1
5583 uint32_t UseGlobalGTT;
5584 uint32_t DwordLength;
5585 __gen_address_type EntryAddress;
5586 /* variable length fields follow */
5587 };
5588
5589 static inline void
5590 GEN7_MI_UPDATE_GTT_pack(__gen_user_data *data, void * restrict dst,
5591 const struct GEN7_MI_UPDATE_GTT * restrict values)
5592 {
5593 uint32_t *dw = (uint32_t * restrict) dst;
5594
5595 dw[0] =
5596 __gen_field(values->CommandType, 29, 31) |
5597 __gen_field(values->MICommandOpcode, 23, 28) |
5598 __gen_field(values->UseGlobalGTT, 22, 22) |
5599 __gen_field(values->DwordLength, 0, 7) |
5600 0;
5601
5602 uint32_t dw1 =
5603 0;
5604
5605 dw[1] =
5606 __gen_combine_address(data, &dw[1], values->EntryAddress, dw1);
5607
5608 /* variable length fields follow */
5609 }
5610
5611 #define GEN7_MI_URB_CLEAR_length_bias 0x00000002
5612 #define GEN7_MI_URB_CLEAR_header \
5613 .CommandType = 0, \
5614 .MICommandOpcode = 25, \
5615 .DwordLength = 0
5616
5617 #define GEN7_MI_URB_CLEAR_length 0x00000002
5618
5619 struct GEN7_MI_URB_CLEAR {
5620 uint32_t CommandType;
5621 uint32_t MICommandOpcode;
5622 uint32_t DwordLength;
5623 uint32_t URBClearLength;
5624 uint32_t URBAddress;
5625 };
5626
5627 static inline void
5628 GEN7_MI_URB_CLEAR_pack(__gen_user_data *data, void * restrict dst,
5629 const struct GEN7_MI_URB_CLEAR * restrict values)
5630 {
5631 uint32_t *dw = (uint32_t * restrict) dst;
5632
5633 dw[0] =
5634 __gen_field(values->CommandType, 29, 31) |
5635 __gen_field(values->MICommandOpcode, 23, 28) |
5636 __gen_field(values->DwordLength, 0, 7) |
5637 0;
5638
5639 dw[1] =
5640 __gen_field(values->URBClearLength, 16, 28) |
5641 __gen_offset(values->URBAddress, 0, 13) |
5642 0;
5643
5644 }
5645
5646 #define GEN7_MI_USER_INTERRUPT_length_bias 0x00000001
5647 #define GEN7_MI_USER_INTERRUPT_header \
5648 .CommandType = 0, \
5649 .MICommandOpcode = 2
5650
5651 #define GEN7_MI_USER_INTERRUPT_length 0x00000001
5652
5653 struct GEN7_MI_USER_INTERRUPT {
5654 uint32_t CommandType;
5655 uint32_t MICommandOpcode;
5656 };
5657
5658 static inline void
5659 GEN7_MI_USER_INTERRUPT_pack(__gen_user_data *data, void * restrict dst,
5660 const struct GEN7_MI_USER_INTERRUPT * restrict values)
5661 {
5662 uint32_t *dw = (uint32_t * restrict) dst;
5663
5664 dw[0] =
5665 __gen_field(values->CommandType, 29, 31) |
5666 __gen_field(values->MICommandOpcode, 23, 28) |
5667 0;
5668
5669 }
5670
5671 #define GEN7_MI_WAIT_FOR_EVENT_length_bias 0x00000001
5672 #define GEN7_MI_WAIT_FOR_EVENT_header \
5673 .CommandType = 0, \
5674 .MICommandOpcode = 3
5675
5676 #define GEN7_MI_WAIT_FOR_EVENT_length 0x00000001
5677
5678 struct GEN7_MI_WAIT_FOR_EVENT {
5679 uint32_t CommandType;
5680 uint32_t MICommandOpcode;
5681 bool DisplayPipeCHorizontalBlankWaitEnable;
5682 bool DisplayPipeCVerticalBlankWaitEnable;
5683 bool DisplaySpriteCFlipPendingWaitEnable;
5684 #define Notenabled 0
5685 uint32_t ConditionCodeWaitSelect;
5686 bool DisplayPlaneCFlipPendingWaitEnable;
5687 bool DisplayPipeCScanLineWaitEnable;
5688 bool DisplayPipeBHorizontalBlankWaitEnable;
5689 bool DisplayPipeBVerticalBlankWaitEnable;
5690 bool DisplaySpriteBFlipPendingWaitEnable;
5691 bool DisplayPlaneBFlipPendingWaitEnable;
5692 bool DisplayPipeBScanLineWaitEnable;
5693 bool DisplayPipeAHorizontalBlankWaitEnable;
5694 bool DisplayPipeAVerticalBlankWaitEnable;
5695 bool DisplaySpriteAFlipPendingWaitEnable;
5696 bool DisplayPlaneAFlipPendingWaitEnable;
5697 bool DisplayPipeAScanLineWaitEnable;
5698 };
5699
5700 static inline void
5701 GEN7_MI_WAIT_FOR_EVENT_pack(__gen_user_data *data, void * restrict dst,
5702 const struct GEN7_MI_WAIT_FOR_EVENT * restrict values)
5703 {
5704 uint32_t *dw = (uint32_t * restrict) dst;
5705
5706 dw[0] =
5707 __gen_field(values->CommandType, 29, 31) |
5708 __gen_field(values->MICommandOpcode, 23, 28) |
5709 __gen_field(values->DisplayPipeCHorizontalBlankWaitEnable, 22, 22) |
5710 __gen_field(values->DisplayPipeCVerticalBlankWaitEnable, 21, 21) |
5711 __gen_field(values->DisplaySpriteCFlipPendingWaitEnable, 20, 20) |
5712 __gen_field(values->ConditionCodeWaitSelect, 16, 19) |
5713 __gen_field(values->DisplayPlaneCFlipPendingWaitEnable, 15, 15) |
5714 __gen_field(values->DisplayPipeCScanLineWaitEnable, 14, 14) |
5715 __gen_field(values->DisplayPipeBHorizontalBlankWaitEnable, 13, 13) |
5716 __gen_field(values->DisplayPipeBVerticalBlankWaitEnable, 11, 11) |
5717 __gen_field(values->DisplaySpriteBFlipPendingWaitEnable, 10, 10) |
5718 __gen_field(values->DisplayPlaneBFlipPendingWaitEnable, 9, 9) |
5719 __gen_field(values->DisplayPipeBScanLineWaitEnable, 8, 8) |
5720 __gen_field(values->DisplayPipeAHorizontalBlankWaitEnable, 5, 5) |
5721 __gen_field(values->DisplayPipeAVerticalBlankWaitEnable, 3, 3) |
5722 __gen_field(values->DisplaySpriteAFlipPendingWaitEnable, 2, 2) |
5723 __gen_field(values->DisplayPlaneAFlipPendingWaitEnable, 1, 1) |
5724 __gen_field(values->DisplayPipeAScanLineWaitEnable, 0, 0) |
5725 0;
5726
5727 }
5728
5729 #define GEN7_PIPE_CONTROL_length_bias 0x00000002
5730 #define GEN7_PIPE_CONTROL_header \
5731 .CommandType = 3, \
5732 .CommandSubType = 3, \
5733 ._3DCommandOpcode = 2, \
5734 ._3DCommandSubOpcode = 0, \
5735 .DwordLength = 3
5736
5737 #define GEN7_PIPE_CONTROL_length 0x00000005
5738
5739 struct GEN7_PIPE_CONTROL {
5740 uint32_t CommandType;
5741 uint32_t CommandSubType;
5742 uint32_t _3DCommandOpcode;
5743 uint32_t _3DCommandSubOpcode;
5744 uint32_t DwordLength;
5745 #define DAT_PPGTT 0
5746 #define DAT_GGTT 1
5747 uint32_t DestinationAddressType;
5748 #define NoLRIOperation 0
5749 #define MMIOWriteImmediateData 1
5750 uint32_t LRIPostSyncOperation;
5751 uint32_t StoreDataIndex;
5752 uint32_t CommandStreamerStallEnable;
5753 #define DontReset 0
5754 #define Reset 1
5755 uint32_t GlobalSnapshotCountReset;
5756 uint32_t TLBInvalidate;
5757 bool GenericMediaStateClear;
5758 #define NoWrite 0
5759 #define WriteImmediateData 1
5760 #define WritePSDepthCount 2
5761 #define WriteTimestamp 3
5762 uint32_t PostSyncOperation;
5763 bool DepthStallEnable;
5764 #define DisableFlush 0
5765 #define EnableFlush 1
5766 bool RenderTargetCacheFlushEnable;
5767 bool InstructionCacheInvalidateEnable;
5768 bool TextureCacheInvalidationEnable;
5769 bool IndirectStatePointersDisable;
5770 bool NotifyEnable;
5771 bool PipeControlFlushEnable;
5772 bool DCFlushEnable;
5773 bool VFCacheInvalidationEnable;
5774 bool ConstantCacheInvalidationEnable;
5775 bool StateCacheInvalidationEnable;
5776 bool StallAtPixelScoreboard;
5777 #define FlushDisabled 0
5778 #define FlushEnabled 1
5779 bool DepthCacheFlushEnable;
5780 __gen_address_type Address;
5781 uint32_t ImmediateData;
5782 uint32_t ImmediateData0;
5783 };
5784
5785 static inline void
5786 GEN7_PIPE_CONTROL_pack(__gen_user_data *data, void * restrict dst,
5787 const struct GEN7_PIPE_CONTROL * restrict values)
5788 {
5789 uint32_t *dw = (uint32_t * restrict) dst;
5790
5791 dw[0] =
5792 __gen_field(values->CommandType, 29, 31) |
5793 __gen_field(values->CommandSubType, 27, 28) |
5794 __gen_field(values->_3DCommandOpcode, 24, 26) |
5795 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5796 __gen_field(values->DwordLength, 0, 7) |
5797 0;
5798
5799 dw[1] =
5800 __gen_field(values->DestinationAddressType, 24, 24) |
5801 __gen_field(values->LRIPostSyncOperation, 23, 23) |
5802 __gen_field(values->StoreDataIndex, 21, 21) |
5803 __gen_field(values->CommandStreamerStallEnable, 20, 20) |
5804 __gen_field(values->GlobalSnapshotCountReset, 19, 19) |
5805 __gen_field(values->TLBInvalidate, 18, 18) |
5806 __gen_field(values->GenericMediaStateClear, 16, 16) |
5807 __gen_field(values->PostSyncOperation, 14, 15) |
5808 __gen_field(values->DepthStallEnable, 13, 13) |
5809 __gen_field(values->RenderTargetCacheFlushEnable, 12, 12) |
5810 __gen_field(values->InstructionCacheInvalidateEnable, 11, 11) |
5811 __gen_field(values->TextureCacheInvalidationEnable, 10, 10) |
5812 __gen_field(values->IndirectStatePointersDisable, 9, 9) |
5813 __gen_field(values->NotifyEnable, 8, 8) |
5814 __gen_field(values->PipeControlFlushEnable, 7, 7) |
5815 __gen_field(values->DCFlushEnable, 5, 5) |
5816 __gen_field(values->VFCacheInvalidationEnable, 4, 4) |
5817 __gen_field(values->ConstantCacheInvalidationEnable, 3, 3) |
5818 __gen_field(values->StateCacheInvalidationEnable, 2, 2) |
5819 __gen_field(values->StallAtPixelScoreboard, 1, 1) |
5820 __gen_field(values->DepthCacheFlushEnable, 0, 0) |
5821 0;
5822
5823 uint32_t dw2 =
5824 0;
5825
5826 dw[2] =
5827 __gen_combine_address(data, &dw[2], values->Address, dw2);
5828
5829 dw[3] =
5830 __gen_field(values->ImmediateData, 0, 31) |
5831 0;
5832
5833 dw[4] =
5834 __gen_field(values->ImmediateData, 0, 31) |
5835 0;
5836
5837 }
5838
5839 #define GEN7_SCISSOR_RECT_length 0x00000002
5840
5841 struct GEN7_SCISSOR_RECT {
5842 uint32_t ScissorRectangleYMin;
5843 uint32_t ScissorRectangleXMin;
5844 uint32_t ScissorRectangleYMax;
5845 uint32_t ScissorRectangleXMax;
5846 };
5847
5848 static inline void
5849 GEN7_SCISSOR_RECT_pack(__gen_user_data *data, void * restrict dst,
5850 const struct GEN7_SCISSOR_RECT * restrict values)
5851 {
5852 uint32_t *dw = (uint32_t * restrict) dst;
5853
5854 dw[0] =
5855 __gen_field(values->ScissorRectangleYMin, 16, 31) |
5856 __gen_field(values->ScissorRectangleXMin, 0, 15) |
5857 0;
5858
5859 dw[1] =
5860 __gen_field(values->ScissorRectangleYMax, 16, 31) |
5861 __gen_field(values->ScissorRectangleXMax, 0, 15) |
5862 0;
5863
5864 }
5865
5866 #define GEN7_SF_CLIP_VIEWPORT_length 0x00000010
5867
5868 struct GEN7_SF_CLIP_VIEWPORT {
5869 float ViewportMatrixElementm00;
5870 float ViewportMatrixElementm11;
5871 float ViewportMatrixElementm22;
5872 float ViewportMatrixElementm30;
5873 float ViewportMatrixElementm31;
5874 float ViewportMatrixElementm32;
5875 float XMinClipGuardband;
5876 float XMaxClipGuardband;
5877 float YMinClipGuardband;
5878 float YMaxClipGuardband;
5879 };
5880
5881 static inline void
5882 GEN7_SF_CLIP_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
5883 const struct GEN7_SF_CLIP_VIEWPORT * restrict values)
5884 {
5885 uint32_t *dw = (uint32_t * restrict) dst;
5886
5887 dw[0] =
5888 __gen_float(values->ViewportMatrixElementm00) |
5889 0;
5890
5891 dw[1] =
5892 __gen_float(values->ViewportMatrixElementm11) |
5893 0;
5894
5895 dw[2] =
5896 __gen_float(values->ViewportMatrixElementm22) |
5897 0;
5898
5899 dw[3] =
5900 __gen_float(values->ViewportMatrixElementm30) |
5901 0;
5902
5903 dw[4] =
5904 __gen_float(values->ViewportMatrixElementm31) |
5905 0;
5906
5907 dw[5] =
5908 __gen_float(values->ViewportMatrixElementm32) |
5909 0;
5910
5911 dw[6] =
5912 0;
5913
5914 dw[7] =
5915 0;
5916
5917 dw[8] =
5918 __gen_float(values->XMinClipGuardband) |
5919 0;
5920
5921 dw[9] =
5922 __gen_float(values->XMaxClipGuardband) |
5923 0;
5924
5925 dw[10] =
5926 __gen_float(values->YMinClipGuardband) |
5927 0;
5928
5929 dw[11] =
5930 __gen_float(values->YMaxClipGuardband) |
5931 0;
5932
5933 for (uint32_t i = 0, j = 12; i < 4; i += 1, j++) {
5934 dw[j] =
5935 0;
5936 }
5937
5938 }
5939
5940 #define GEN7_BLEND_STATE_length 0x00000002
5941
5942 struct GEN7_BLEND_STATE {
5943 bool ColorBufferBlendEnable;
5944 bool IndependentAlphaBlendEnable;
5945 #define BLENDFUNCTION_ADD 0
5946 #define BLENDFUNCTION_SUBTRACT 1
5947 #define BLENDFUNCTION_REVERSE_SUBTRACT 2
5948 #define BLENDFUNCTION_MIN 3
5949 #define BLENDFUNCTION_MAX 4
5950 uint32_t AlphaBlendFunction;
5951 #define BLENDFACTOR_ONE 1
5952 #define BLENDFACTOR_SRC_COLOR 2
5953 #define BLENDFACTOR_SRC_ALPHA 3
5954 #define BLENDFACTOR_DST_ALPHA 4
5955 #define BLENDFACTOR_DST_COLOR 5
5956 #define BLENDFACTOR_SRC_ALPHA_SATURATE 6
5957 #define BLENDFACTOR_CONST_COLOR 7
5958 #define BLENDFACTOR_CONST_ALPHA 8
5959 #define BLENDFACTOR_SRC1_COLOR 9
5960 #define BLENDFACTOR_SRC1_ALPHA 10
5961 #define BLENDFACTOR_ZERO 17
5962 #define BLENDFACTOR_INV_SRC_COLOR 18
5963 #define BLENDFACTOR_INV_SRC_ALPHA 19
5964 #define BLENDFACTOR_INV_DST_ALPHA 20
5965 #define BLENDFACTOR_INV_DST_COLOR 21
5966 #define BLENDFACTOR_INV_CONST_COLOR 23
5967 #define BLENDFACTOR_INV_CONST_ALPHA 24
5968 #define BLENDFACTOR_INV_SRC1_COLOR 25
5969 #define BLENDFACTOR_INV_SRC1_ALPHA 26
5970 uint32_t SourceAlphaBlendFactor;
5971 uint32_t DestinationAlphaBlendFactor;
5972 #define BLENDFUNCTION_ADD 0
5973 #define BLENDFUNCTION_SUBTRACT 1
5974 #define BLENDFUNCTION_REVERSE_SUBTRACT 2
5975 #define BLENDFUNCTION_MIN 3
5976 #define BLENDFUNCTION_MAX 4
5977 uint32_t ColorBlendFunction;
5978 uint32_t SourceBlendFactor;
5979 uint32_t DestinationBlendFactor;
5980 bool AlphaToCoverageEnable;
5981 bool AlphaToOneEnable;
5982 bool AlphaToCoverageDitherEnable;
5983 bool WriteDisableAlpha;
5984 bool WriteDisableRed;
5985 bool WriteDisableGreen;
5986 bool WriteDisableBlue;
5987 bool LogicOpEnable;
5988 #define LOGICOP_CLEAR 0
5989 #define LOGICOP_NOR 1
5990 #define LOGICOP_AND_INVERTED 2
5991 #define LOGICOP_COPY_INVERTED 3
5992 #define LOGICOP_AND_REVERSE 4
5993 #define LOGICOP_INVERT 5
5994 #define LOGICOP_XOR 6
5995 #define LOGICOP_NAND 7
5996 #define LOGICOP_AND 8
5997 #define LOGICOP_EQUIV 9
5998 #define LOGICOP_NOOP 10
5999 #define LOGICOP_OR_INVERTED 11
6000 #define LOGICOP_COPY 12
6001 #define LOGICOP_OR_REVERSE 13
6002 #define LOGICOP_OR 14
6003 #define LOGICOP_SET 15
6004 uint32_t LogicOpFunction;
6005 bool AlphaTestEnable;
6006 #define COMPAREFUNCTION_ALWAYS 0
6007 #define COMPAREFUNCTION_NEVER 1
6008 #define COMPAREFUNCTION_LESS 2
6009 #define COMPAREFUNCTION_EQUAL 3
6010 #define COMPAREFUNCTION_LEQUAL 4
6011 #define COMPAREFUNCTION_GREATER 5
6012 #define COMPAREFUNCTION_NOTEQUAL 6
6013 #define COMPAREFUNCTION_GEQUAL 7
6014 uint32_t AlphaTestFunction;
6015 bool ColorDitherEnable;
6016 uint32_t XDitherOffset;
6017 uint32_t YDitherOffset;
6018 #define COLORCLAMP_UNORM 0
6019 #define COLORCLAMP_SNORM 1
6020 #define COLORCLAMP_RTFORMAT 2
6021 uint32_t ColorClampRange;
6022 bool PreBlendColorClampEnable;
6023 bool PostBlendColorClampEnable;
6024 };
6025
6026 static inline void
6027 GEN7_BLEND_STATE_pack(__gen_user_data *data, void * restrict dst,
6028 const struct GEN7_BLEND_STATE * restrict values)
6029 {
6030 uint32_t *dw = (uint32_t * restrict) dst;
6031
6032 dw[0] =
6033 __gen_field(values->ColorBufferBlendEnable, 31, 31) |
6034 __gen_field(values->IndependentAlphaBlendEnable, 30, 30) |
6035 __gen_field(values->AlphaBlendFunction, 26, 28) |
6036 __gen_field(values->SourceAlphaBlendFactor, 20, 24) |
6037 __gen_field(values->DestinationAlphaBlendFactor, 15, 19) |
6038 __gen_field(values->ColorBlendFunction, 11, 13) |
6039 __gen_field(values->SourceBlendFactor, 5, 9) |
6040 __gen_field(values->DestinationBlendFactor, 0, 4) |
6041 0;
6042
6043 dw[1] =
6044 __gen_field(values->AlphaToCoverageEnable, 31, 31) |
6045 __gen_field(values->AlphaToOneEnable, 30, 30) |
6046 __gen_field(values->AlphaToCoverageDitherEnable, 29, 29) |
6047 __gen_field(values->WriteDisableAlpha, 27, 27) |
6048 __gen_field(values->WriteDisableRed, 26, 26) |
6049 __gen_field(values->WriteDisableGreen, 25, 25) |
6050 __gen_field(values->WriteDisableBlue, 24, 24) |
6051 __gen_field(values->LogicOpEnable, 22, 22) |
6052 __gen_field(values->LogicOpFunction, 18, 21) |
6053 __gen_field(values->AlphaTestEnable, 16, 16) |
6054 __gen_field(values->AlphaTestFunction, 13, 15) |
6055 __gen_field(values->ColorDitherEnable, 12, 12) |
6056 __gen_field(values->XDitherOffset, 10, 11) |
6057 __gen_field(values->YDitherOffset, 8, 9) |
6058 __gen_field(values->ColorClampRange, 2, 3) |
6059 __gen_field(values->PreBlendColorClampEnable, 1, 1) |
6060 __gen_field(values->PostBlendColorClampEnable, 0, 0) |
6061 0;
6062
6063 }
6064
6065 #define GEN7_CC_VIEWPORT_length 0x00000002
6066
6067 struct GEN7_CC_VIEWPORT {
6068 float MinimumDepth;
6069 float MaximumDepth;
6070 };
6071
6072 static inline void
6073 GEN7_CC_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
6074 const struct GEN7_CC_VIEWPORT * restrict values)
6075 {
6076 uint32_t *dw = (uint32_t * restrict) dst;
6077
6078 dw[0] =
6079 __gen_float(values->MinimumDepth) |
6080 0;
6081
6082 dw[1] =
6083 __gen_float(values->MaximumDepth) |
6084 0;
6085
6086 }
6087
6088 #define GEN7_COLOR_CALC_STATE_length 0x00000006
6089
6090 struct GEN7_COLOR_CALC_STATE {
6091 uint32_t StencilReferenceValue;
6092 uint32_t BackFaceStencilReferenceValue;
6093 #define Cancelled 0
6094 #define NotCancelled 1
6095 uint32_t RoundDisableFunctionDisable;
6096 #define ALPHATEST_UNORM8 0
6097 #define ALPHATEST_FLOAT32 1
6098 uint32_t AlphaTestFormat;
6099 uint32_t AlphaReferenceValueAsUNORM8;
6100 float AlphaReferenceValueAsFLOAT32;
6101 float BlendConstantColorRed;
6102 float BlendConstantColorGreen;
6103 float BlendConstantColorBlue;
6104 float BlendConstantColorAlpha;
6105 };
6106
6107 static inline void
6108 GEN7_COLOR_CALC_STATE_pack(__gen_user_data *data, void * restrict dst,
6109 const struct GEN7_COLOR_CALC_STATE * restrict values)
6110 {
6111 uint32_t *dw = (uint32_t * restrict) dst;
6112
6113 dw[0] =
6114 __gen_field(values->StencilReferenceValue, 24, 31) |
6115 __gen_field(values->BackFaceStencilReferenceValue, 16, 23) |
6116 __gen_field(values->RoundDisableFunctionDisable, 15, 15) |
6117 __gen_field(values->AlphaTestFormat, 0, 0) |
6118 0;
6119
6120 dw[1] =
6121 __gen_field(values->AlphaReferenceValueAsUNORM8, 0, 31) |
6122 __gen_float(values->AlphaReferenceValueAsFLOAT32) |
6123 0;
6124
6125 dw[2] =
6126 __gen_float(values->BlendConstantColorRed) |
6127 0;
6128
6129 dw[3] =
6130 __gen_float(values->BlendConstantColorGreen) |
6131 0;
6132
6133 dw[4] =
6134 __gen_float(values->BlendConstantColorBlue) |
6135 0;
6136
6137 dw[5] =
6138 __gen_float(values->BlendConstantColorAlpha) |
6139 0;
6140
6141 }
6142
6143 #define GEN7_DEPTH_STENCIL_STATE_length 0x00000003
6144
6145 struct GEN7_DEPTH_STENCIL_STATE {
6146 bool StencilTestEnable;
6147 #define COMPAREFUNCTION_ALWAYS 0
6148 #define COMPAREFUNCTION_NEVER 1
6149 #define COMPAREFUNCTION_LESS 2
6150 #define COMPAREFUNCTION_EQUAL 3
6151 #define COMPAREFUNCTION_LEQUAL 4
6152 #define COMPAREFUNCTION_GREATER 5
6153 #define COMPAREFUNCTION_NOTEQUAL 6
6154 #define COMPAREFUNCTION_GEQUAL 7
6155 uint32_t StencilTestFunction;
6156 #define STENCILOP_KEEP 0
6157 #define STENCILOP_ZERO 1
6158 #define STENCILOP_REPLACE 2
6159 #define STENCILOP_INCRSAT 3
6160 #define STENCILOP_DECRSAT 4
6161 #define STENCILOP_INCR 5
6162 #define STENCILOP_DECR 6
6163 #define STENCILOP_INVERT 7
6164 uint32_t StencilFailOp;
6165 uint32_t StencilPassDepthFailOp;
6166 uint32_t StencilPassDepthPassOp;
6167 bool StencilBufferWriteEnable;
6168 bool DoubleSidedStencilEnable;
6169 #define COMPAREFUNCTION_ALWAYS 0
6170 #define COMPAREFUNCTION_NEVER 1
6171 #define COMPAREFUNCTION_LESS 2
6172 #define COMPAREFUNCTION_EQUAL 3
6173 #define COMPAREFUNCTION_LEQUAL 4
6174 #define COMPAREFUNCTION_GREATER 5
6175 #define COMPAREFUNCTION_NOTEQUAL 6
6176 #define COMPAREFUNCTION_GEQUAL 7
6177 uint32_t BackFaceStencilTestFunction;
6178 #define STENCILOP_KEEP 0
6179 #define STENCILOP_ZERO 1
6180 #define STENCILOP_REPLACE 2
6181 #define STENCILOP_INCRSAT 3
6182 #define STENCILOP_DECRSAT 4
6183 #define STENCILOP_INCR 5
6184 #define STENCILOP_DECR 6
6185 #define STENCILOP_INVERT 7
6186 uint32_t BackfaceStencilFailOp;
6187 uint32_t BackfaceStencilPassDepthFailOp;
6188 uint32_t BackfaceStencilPassDepthPassOp;
6189 uint32_t StencilTestMask;
6190 uint32_t StencilWriteMask;
6191 uint32_t BackfaceStencilTestMask;
6192 uint32_t BackfaceStencilWriteMask;
6193 bool DepthTestEnable;
6194 #define COMPAREFUNCTION_ALWAYS 0
6195 #define COMPAREFUNCTION_NEVER 1
6196 #define COMPAREFUNCTION_LESS 2
6197 #define COMPAREFUNCTION_EQUAL 3
6198 #define COMPAREFUNCTION_LEQUAL 4
6199 #define COMPAREFUNCTION_GREATER 5
6200 #define COMPAREFUNCTION_NOTEQUAL 6
6201 #define COMPAREFUNCTION_GEQUAL 7
6202 uint32_t DepthTestFunction;
6203 bool DepthBufferWriteEnable;
6204 };
6205
6206 static inline void
6207 GEN7_DEPTH_STENCIL_STATE_pack(__gen_user_data *data, void * restrict dst,
6208 const struct GEN7_DEPTH_STENCIL_STATE * restrict values)
6209 {
6210 uint32_t *dw = (uint32_t * restrict) dst;
6211
6212 dw[0] =
6213 __gen_field(values->StencilTestEnable, 31, 31) |
6214 __gen_field(values->StencilTestFunction, 28, 30) |
6215 __gen_field(values->StencilFailOp, 25, 27) |
6216 __gen_field(values->StencilPassDepthFailOp, 22, 24) |
6217 __gen_field(values->StencilPassDepthPassOp, 19, 21) |
6218 __gen_field(values->StencilBufferWriteEnable, 18, 18) |
6219 __gen_field(values->DoubleSidedStencilEnable, 15, 15) |
6220 __gen_field(values->BackFaceStencilTestFunction, 12, 14) |
6221 __gen_field(values->BackfaceStencilFailOp, 9, 11) |
6222 __gen_field(values->BackfaceStencilPassDepthFailOp, 6, 8) |
6223 __gen_field(values->BackfaceStencilPassDepthPassOp, 3, 5) |
6224 0;
6225
6226 dw[1] =
6227 __gen_field(values->StencilTestMask, 24, 31) |
6228 __gen_field(values->StencilWriteMask, 16, 23) |
6229 __gen_field(values->BackfaceStencilTestMask, 8, 15) |
6230 __gen_field(values->BackfaceStencilWriteMask, 0, 7) |
6231 0;
6232
6233 dw[2] =
6234 __gen_field(values->DepthTestEnable, 31, 31) |
6235 __gen_field(values->DepthTestFunction, 27, 29) |
6236 __gen_field(values->DepthBufferWriteEnable, 26, 26) |
6237 0;
6238
6239 }
6240
6241 #define GEN7_INTERFACE_DESCRIPTOR_DATA_length 0x00000008
6242
6243 struct GEN7_INTERFACE_DESCRIPTOR_DATA {
6244 uint32_t KernelStartPointer;
6245 #define Multiple 0
6246 #define Single 1
6247 uint32_t SingleProgramFlow;
6248 #define NormalPriority 0
6249 #define HighPriority 1
6250 uint32_t ThreadPriority;
6251 #define IEEE754 0
6252 #define Alternate 1
6253 uint32_t FloatingPointMode;
6254 bool IllegalOpcodeExceptionEnable;
6255 bool MaskStackExceptionEnable;
6256 bool SoftwareExceptionEnable;
6257 uint32_t SamplerStatePointer;
6258 #define Nosamplersused 0
6259 #define Between1and4samplersused 1
6260 #define Between5and8samplersused 2
6261 #define Between9and12samplersused 3
6262 #define Between13and16samplersused 4
6263 uint32_t SamplerCount;
6264 uint32_t BindingTablePointer;
6265 uint32_t BindingTableEntryCount;
6266 uint32_t ConstantURBEntryReadLength;
6267 uint32_t ConstantURBEntryReadOffset;
6268 #define RTNE 0
6269 #define RU 1
6270 #define RD 2
6271 #define RTZ 3
6272 uint32_t RoundingMode;
6273 bool BarrierEnable;
6274 uint32_t SharedLocalMemorySize;
6275 uint32_t NumberofThreadsinGPGPUThreadGroup;
6276 };
6277
6278 static inline void
6279 GEN7_INTERFACE_DESCRIPTOR_DATA_pack(__gen_user_data *data, void * restrict dst,
6280 const struct GEN7_INTERFACE_DESCRIPTOR_DATA * restrict values)
6281 {
6282 uint32_t *dw = (uint32_t * restrict) dst;
6283
6284 dw[0] =
6285 __gen_offset(values->KernelStartPointer, 6, 31) |
6286 0;
6287
6288 dw[1] =
6289 __gen_field(values->SingleProgramFlow, 18, 18) |
6290 __gen_field(values->ThreadPriority, 17, 17) |
6291 __gen_field(values->FloatingPointMode, 16, 16) |
6292 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
6293 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
6294 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
6295 0;
6296
6297 dw[2] =
6298 __gen_offset(values->SamplerStatePointer, 5, 31) |
6299 __gen_field(values->SamplerCount, 2, 4) |
6300 0;
6301
6302 dw[3] =
6303 __gen_offset(values->BindingTablePointer, 5, 15) |
6304 __gen_field(values->BindingTableEntryCount, 0, 4) |
6305 0;
6306
6307 dw[4] =
6308 __gen_field(values->ConstantURBEntryReadLength, 16, 31) |
6309 __gen_field(values->ConstantURBEntryReadOffset, 0, 15) |
6310 0;
6311
6312 dw[5] =
6313 __gen_field(values->RoundingMode, 22, 23) |
6314 __gen_field(values->BarrierEnable, 21, 21) |
6315 __gen_field(values->SharedLocalMemorySize, 16, 20) |
6316 __gen_field(values->NumberofThreadsinGPGPUThreadGroup, 0, 7) |
6317 0;
6318
6319 dw[6] =
6320 0;
6321
6322 dw[7] =
6323 0;
6324
6325 }
6326
6327 #define GEN7_BINDING_TABLE_STATE_length 0x00000001
6328
6329 struct GEN7_BINDING_TABLE_STATE {
6330 uint32_t SurfaceStatePointer;
6331 };
6332
6333 static inline void
6334 GEN7_BINDING_TABLE_STATE_pack(__gen_user_data *data, void * restrict dst,
6335 const struct GEN7_BINDING_TABLE_STATE * restrict values)
6336 {
6337 uint32_t *dw = (uint32_t * restrict) dst;
6338
6339 dw[0] =
6340 __gen_offset(values->SurfaceStatePointer, 5, 31) |
6341 0;
6342
6343 }
6344
6345 #define GEN7_RENDER_SURFACE_STATE_length 0x00000008
6346
6347 struct GEN7_RENDER_SURFACE_STATE {
6348 #define SURFTYPE_1D 0
6349 #define SURFTYPE_2D 1
6350 #define SURFTYPE_3D 2
6351 #define SURFTYPE_CUBE 3
6352 #define SURFTYPE_BUFFER 4
6353 #define SURFTYPE_STRBUF 5
6354 #define SURFTYPE_NULL 7
6355 uint32_t SurfaceType;
6356 bool SurfaceArray;
6357 uint32_t SurfaceFormat;
6358 #define VALIGN_2 0
6359 #define VALIGN_4 1
6360 uint32_t SurfaceVerticalAlignment;
6361 #define HALIGN_4 0
6362 #define HALIGN_8 1
6363 uint32_t SurfaceHorizontalAlignment;
6364 uint32_t TiledSurface;
6365 #define TILEWALK_XMAJOR 0
6366 #define TILEWALK_YMAJOR 1
6367 uint32_t TileWalk;
6368 uint32_t VerticalLineStride;
6369 uint32_t VerticalLineStrideOffset;
6370 #define ARYSPC_FULL 0
6371 #define ARYSPC_LOD0 1
6372 uint32_t SurfaceArraySpacing;
6373 uint32_t RenderCacheReadWriteMode;
6374 #define NORMAL_MODE 0
6375 #define PROGRESSIVE_FRAME 2
6376 #define INTERLACED_FRAME 3
6377 uint32_t MediaBoundaryPixelMode;
6378 uint32_t CubeFaceEnables;
6379 __gen_address_type SurfaceBaseAddress;
6380 uint32_t Height;
6381 uint32_t Width;
6382 uint32_t Depth;
6383 uint32_t SurfacePitch;
6384 #define RTROTATE_0DEG 0
6385 #define RTROTATE_90DEG 1
6386 #define RTROTATE_270DEG 3
6387 uint32_t RenderTargetRotation;
6388 uint32_t MinimumArrayElement;
6389 uint32_t RenderTargetViewExtent;
6390 #define MSFMT_MSS 0
6391 #define MSFMT_DEPTH_STENCIL 1
6392 uint32_t MultisampledSurfaceStorageFormat;
6393 #define MULTISAMPLECOUNT_1 0
6394 #define MULTISAMPLECOUNT_4 2
6395 #define MULTISAMPLECOUNT_8 3
6396 uint32_t NumberofMultisamples;
6397 uint32_t MultisamplePositionPaletteIndex;
6398 uint32_t MinimumArrayElement0;
6399 uint32_t XOffset;
6400 uint32_t YOffset;
6401 struct GEN7_MEMORY_OBJECT_CONTROL_STATE SurfaceObjectControlState;
6402 uint32_t SurfaceMinLOD;
6403 uint32_t MIPCountLOD;
6404 __gen_address_type MCSBaseAddress;
6405 uint32_t MCSSurfacePitch;
6406 __gen_address_type AppendCounterAddress;
6407 bool AppendCounterEnable;
6408 bool MCSEnable;
6409 uint32_t XOffsetforUVPlane;
6410 uint32_t YOffsetforUVPlane;
6411 #define CC_ZERO 0
6412 #define CC_ONE 1
6413 uint32_t RedClearColor;
6414 #define CC_ZERO 0
6415 #define CC_ONE 1
6416 uint32_t GreenClearColor;
6417 #define CC_ZERO 0
6418 #define CC_ONE 1
6419 uint32_t BlueClearColor;
6420 #define CC_ZERO 0
6421 #define CC_ONE 1
6422 uint32_t AlphaClearColor;
6423 float ResourceMinLOD;
6424 };
6425
6426 static inline void
6427 GEN7_RENDER_SURFACE_STATE_pack(__gen_user_data *data, void * restrict dst,
6428 const struct GEN7_RENDER_SURFACE_STATE * restrict values)
6429 {
6430 uint32_t *dw = (uint32_t * restrict) dst;
6431
6432 dw[0] =
6433 __gen_field(values->SurfaceType, 29, 31) |
6434 __gen_field(values->SurfaceArray, 28, 28) |
6435 __gen_field(values->SurfaceFormat, 18, 26) |
6436 __gen_field(values->SurfaceVerticalAlignment, 16, 17) |
6437 __gen_field(values->SurfaceHorizontalAlignment, 15, 15) |
6438 __gen_field(values->TiledSurface, 14, 14) |
6439 __gen_field(values->TileWalk, 13, 13) |
6440 __gen_field(values->VerticalLineStride, 12, 12) |
6441 __gen_field(values->VerticalLineStrideOffset, 11, 11) |
6442 __gen_field(values->SurfaceArraySpacing, 10, 10) |
6443 __gen_field(values->RenderCacheReadWriteMode, 8, 8) |
6444 __gen_field(values->MediaBoundaryPixelMode, 6, 7) |
6445 __gen_field(values->CubeFaceEnables, 0, 5) |
6446 0;
6447
6448 uint32_t dw1 =
6449 0;
6450
6451 dw[1] =
6452 __gen_combine_address(data, &dw[1], values->SurfaceBaseAddress, dw1);
6453
6454 dw[2] =
6455 __gen_field(values->Height, 16, 29) |
6456 __gen_field(values->Width, 0, 13) |
6457 0;
6458
6459 dw[3] =
6460 __gen_field(values->Depth, 21, 31) |
6461 __gen_field(values->SurfacePitch, 0, 17) |
6462 0;
6463
6464 dw[4] =
6465 __gen_field(values->RenderTargetRotation, 29, 30) |
6466 __gen_field(values->MinimumArrayElement, 18, 28) |
6467 __gen_field(values->RenderTargetViewExtent, 7, 17) |
6468 __gen_field(values->MultisampledSurfaceStorageFormat, 6, 6) |
6469 __gen_field(values->NumberofMultisamples, 3, 5) |
6470 __gen_field(values->MultisamplePositionPaletteIndex, 0, 2) |
6471 __gen_field(values->MinimumArrayElement, 0, 26) |
6472 0;
6473
6474 uint32_t dw_SurfaceObjectControlState;
6475 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceObjectControlState, &values->SurfaceObjectControlState);
6476 dw[5] =
6477 __gen_offset(values->XOffset, 25, 31) |
6478 __gen_offset(values->YOffset, 20, 23) |
6479 __gen_field(dw_SurfaceObjectControlState, 16, 19) |
6480 __gen_field(values->SurfaceMinLOD, 4, 7) |
6481 __gen_field(values->MIPCountLOD, 0, 3) |
6482 0;
6483
6484 uint32_t dw6 =
6485 __gen_field(values->MCSSurfacePitch, 3, 11) |
6486 __gen_field(values->AppendCounterEnable, 1, 1) |
6487 __gen_field(values->MCSEnable, 0, 0) |
6488 __gen_field(values->XOffsetforUVPlane, 16, 29) |
6489 __gen_field(values->YOffsetforUVPlane, 0, 13) |
6490 0;
6491
6492 dw[6] =
6493 __gen_combine_address(data, &dw[6], values->AppendCounterAddress, dw6);
6494
6495 dw[7] =
6496 __gen_field(values->RedClearColor, 31, 31) |
6497 __gen_field(values->GreenClearColor, 30, 30) |
6498 __gen_field(values->BlueClearColor, 29, 29) |
6499 __gen_field(values->AlphaClearColor, 28, 28) |
6500 __gen_field(values->ResourceMinLOD * (1 << 8), 0, 11) |
6501 0;
6502
6503 }
6504
6505 #define GEN7_SAMPLER_BORDER_COLOR_STATE_length 0x00000004
6506
6507 struct GEN7_SAMPLER_BORDER_COLOR_STATE {
6508 float BorderColorRedDX100GL;
6509 uint32_t BorderColorAlpha;
6510 uint32_t BorderColorBlue;
6511 uint32_t BorderColorGreen;
6512 uint32_t BorderColorRedDX9;
6513 float BorderColorGreen0;
6514 float BorderColorBlue0;
6515 float BorderColorAlpha0;
6516 };
6517
6518 static inline void
6519 GEN7_SAMPLER_BORDER_COLOR_STATE_pack(__gen_user_data *data, void * restrict dst,
6520 const struct GEN7_SAMPLER_BORDER_COLOR_STATE * restrict values)
6521 {
6522 uint32_t *dw = (uint32_t * restrict) dst;
6523
6524 dw[0] =
6525 __gen_float(values->BorderColorRedDX100GL) |
6526 __gen_field(values->BorderColorAlpha, 24, 31) |
6527 __gen_field(values->BorderColorBlue, 16, 23) |
6528 __gen_field(values->BorderColorGreen, 8, 15) |
6529 __gen_field(values->BorderColorRedDX9, 0, 7) |
6530 0;
6531
6532 dw[1] =
6533 __gen_float(values->BorderColorGreen) |
6534 0;
6535
6536 dw[2] =
6537 __gen_float(values->BorderColorBlue) |
6538 0;
6539
6540 dw[3] =
6541 __gen_float(values->BorderColorAlpha) |
6542 0;
6543
6544 }
6545
6546 #define GEN7_SAMPLER_STATE_length 0x00000004
6547
6548 struct GEN7_SAMPLER_STATE {
6549 bool SamplerDisable;
6550 #define DX10OGL 0
6551 #define DX9 1
6552 uint32_t TextureBorderColorMode;
6553 #define OGL 1
6554 uint32_t LODPreClampEnable;
6555 float BaseMipLevel;
6556 #define MIPFILTER_NONE 0
6557 #define MIPFILTER_NEAREST 1
6558 #define MIPFILTER_LINEAR 3
6559 uint32_t MipModeFilter;
6560 #define MAPFILTER_NEAREST 0
6561 #define MAPFILTER_LINEAR 1
6562 #define MAPFILTER_ANISOTROPIC 2
6563 #define MAPFILTER_MONO 6
6564 uint32_t MagModeFilter;
6565 #define MAPFILTER_NEAREST 0
6566 #define MAPFILTER_LINEAR 1
6567 #define MAPFILTER_ANISOTROPIC 2
6568 #define MAPFILTER_MONO 6
6569 uint32_t MinModeFilter;
6570 uint32_t TextureLODBias;
6571 #define LEGACY 0
6572 #define EWAApproximation 1
6573 uint32_t AnisotropicAlgorithm;
6574 float MinLOD;
6575 float MaxLOD;
6576 #define PREFILTEROPALWAYS 0
6577 #define PREFILTEROPNEVER 1
6578 #define PREFILTEROPLESS 2
6579 #define PREFILTEROPEQUAL 3
6580 #define PREFILTEROPLEQUAL 4
6581 #define PREFILTEROPGREATER 5
6582 #define PREFILTEROPNOTEQUAL 6
6583 #define PREFILTEROPGEQUAL 7
6584 uint32_t ShadowFunction;
6585 #define PROGRAMMED 0
6586 #define OVERRIDE 1
6587 uint32_t CubeSurfaceControlMode;
6588 uint32_t BorderColorPointer;
6589 bool ChromaKeyEnable;
6590 uint32_t ChromaKeyIndex;
6591 #define KEYFILTER_KILL_ON_ANY_MATCH 0
6592 #define KEYFILTER_REPLACE_BLACK 1
6593 uint32_t ChromaKeyMode;
6594 #define RATIO21 0
6595 #define RATIO41 1
6596 #define RATIO61 2
6597 #define RATIO81 3
6598 #define RATIO101 4
6599 #define RATIO121 5
6600 #define RATIO141 6
6601 #define RATIO161 7
6602 uint32_t MaximumAnisotropy;
6603 bool RAddressMinFilterRoundingEnable;
6604 bool RAddressMagFilterRoundingEnable;
6605 bool VAddressMinFilterRoundingEnable;
6606 bool VAddressMagFilterRoundingEnable;
6607 bool UAddressMinFilterRoundingEnable;
6608 bool UAddressMagFilterRoundingEnable;
6609 #define FULL 0
6610 #define MED 2
6611 #define LOW 3
6612 uint32_t TrilinearFilterQuality;
6613 bool NonnormalizedCoordinateEnable;
6614 uint32_t TCXAddressControlMode;
6615 uint32_t TCYAddressControlMode;
6616 uint32_t TCZAddressControlMode;
6617 };
6618
6619 static inline void
6620 GEN7_SAMPLER_STATE_pack(__gen_user_data *data, void * restrict dst,
6621 const struct GEN7_SAMPLER_STATE * restrict values)
6622 {
6623 uint32_t *dw = (uint32_t * restrict) dst;
6624
6625 dw[0] =
6626 __gen_field(values->SamplerDisable, 31, 31) |
6627 __gen_field(values->TextureBorderColorMode, 29, 29) |
6628 __gen_field(values->LODPreClampEnable, 28, 28) |
6629 __gen_field(values->BaseMipLevel * (1 << 1), 22, 26) |
6630 __gen_field(values->MipModeFilter, 20, 21) |
6631 __gen_field(values->MagModeFilter, 17, 19) |
6632 __gen_field(values->MinModeFilter, 14, 16) |
6633 __gen_field(values->TextureLODBias, 1, 13) |
6634 __gen_field(values->AnisotropicAlgorithm, 0, 0) |
6635 0;
6636
6637 dw[1] =
6638 __gen_field(values->MinLOD * (1 << 8), 20, 31) |
6639 __gen_field(values->MaxLOD * (1 << 8), 8, 19) |
6640 __gen_field(values->ShadowFunction, 1, 3) |
6641 __gen_field(values->CubeSurfaceControlMode, 0, 0) |
6642 0;
6643
6644 dw[2] =
6645 __gen_offset(values->BorderColorPointer, 5, 31) |
6646 0;
6647
6648 dw[3] =
6649 __gen_field(values->ChromaKeyEnable, 25, 25) |
6650 __gen_field(values->ChromaKeyIndex, 23, 24) |
6651 __gen_field(values->ChromaKeyMode, 22, 22) |
6652 __gen_field(values->MaximumAnisotropy, 19, 21) |
6653 __gen_field(values->RAddressMinFilterRoundingEnable, 13, 13) |
6654 __gen_field(values->RAddressMagFilterRoundingEnable, 14, 14) |
6655 __gen_field(values->VAddressMinFilterRoundingEnable, 15, 15) |
6656 __gen_field(values->VAddressMagFilterRoundingEnable, 16, 16) |
6657 __gen_field(values->UAddressMinFilterRoundingEnable, 17, 17) |
6658 __gen_field(values->UAddressMagFilterRoundingEnable, 18, 18) |
6659 __gen_field(values->TrilinearFilterQuality, 11, 12) |
6660 __gen_field(values->NonnormalizedCoordinateEnable, 10, 10) |
6661 __gen_field(values->TCXAddressControlMode, 6, 8) |
6662 __gen_field(values->TCYAddressControlMode, 3, 5) |
6663 __gen_field(values->TCZAddressControlMode, 0, 2) |
6664 0;
6665
6666 }
6667
6668 /* Enum 3D_Prim_Topo_Type */
6669 #define _3DPRIM_POINTLIST 1
6670 #define _3DPRIM_LINELIST 2
6671 #define _3DPRIM_LINESTRIP 3
6672 #define _3DPRIM_TRILIST 4
6673 #define _3DPRIM_TRISTRIP 5
6674 #define _3DPRIM_TRIFAN 6
6675 #define _3DPRIM_QUADLIST 7
6676 #define _3DPRIM_QUADSTRIP 8
6677 #define _3DPRIM_LINELIST_ADJ 9
6678 #define _3DPRIM_LINESTRIP_ADJ 10
6679 #define _3DPRIM_TRILIST_ADJ 11
6680 #define _3DPRIM_TRISTRIP_ADJ 12
6681 #define _3DPRIM_TRISTRIP_REVERSE 13
6682 #define _3DPRIM_POLYGON 14
6683 #define _3DPRIM_RECTLIST 15
6684 #define _3DPRIM_LINELOOP 16
6685 #define _3DPRIM_POINTLIST_BF 17
6686 #define _3DPRIM_LINESTRIP_CONT 18
6687 #define _3DPRIM_LINESTRIP_BF 19
6688 #define _3DPRIM_LINESTRIP_CONT_BF 20
6689 #define _3DPRIM_TRIFAN_NOSTIPPLE 22
6690 #define _3DPRIM_PATCHLIST_1 32
6691 #define _3DPRIM_PATCHLIST_2 33
6692 #define _3DPRIM_PATCHLIST_3 34
6693 #define _3DPRIM_PATCHLIST_4 35
6694 #define _3DPRIM_PATCHLIST_5 36
6695 #define _3DPRIM_PATCHLIST_6 37
6696 #define _3DPRIM_PATCHLIST_7 38
6697 #define _3DPRIM_PATCHLIST_8 39
6698 #define _3DPRIM_PATCHLIST_9 40
6699 #define _3DPRIM_PATCHLIST_10 41
6700 #define _3DPRIM_PATCHLIST_11 42
6701 #define _3DPRIM_PATCHLIST_12 43
6702 #define _3DPRIM_PATCHLIST_13 44
6703 #define _3DPRIM_PATCHLIST_14 45
6704 #define _3DPRIM_PATCHLIST_15 46
6705 #define _3DPRIM_PATCHLIST_16 47
6706 #define _3DPRIM_PATCHLIST_17 48
6707 #define _3DPRIM_PATCHLIST_18 49
6708 #define _3DPRIM_PATCHLIST_19 50
6709 #define _3DPRIM_PATCHLIST_20 51
6710 #define _3DPRIM_PATCHLIST_21 52
6711 #define _3DPRIM_PATCHLIST_22 53
6712 #define _3DPRIM_PATCHLIST_23 54
6713 #define _3DPRIM_PATCHLIST_24 55
6714 #define _3DPRIM_PATCHLIST_25 56
6715 #define _3DPRIM_PATCHLIST_26 57
6716 #define _3DPRIM_PATCHLIST_27 58
6717 #define _3DPRIM_PATCHLIST_28 59
6718 #define _3DPRIM_PATCHLIST_29 60
6719 #define _3DPRIM_PATCHLIST_30 61
6720 #define _3DPRIM_PATCHLIST_31 62
6721 #define _3DPRIM_PATCHLIST_32 63
6722
6723 /* Enum 3D_Vertex_Component_Control */
6724 #define VFCOMP_NOSTORE 0
6725 #define VFCOMP_STORE_SRC 1
6726 #define VFCOMP_STORE_0 2
6727 #define VFCOMP_STORE_1_FP 3
6728 #define VFCOMP_STORE_1_INT 4
6729 #define VFCOMP_STORE_VID 5
6730 #define VFCOMP_STORE_IID 6
6731 #define VFCOMP_STORE_PID 7
6732
6733 /* Enum 3D_Compare_Function */
6734 #define COMPAREFUNCTION_ALWAYS 0
6735 #define COMPAREFUNCTION_NEVER 1
6736 #define COMPAREFUNCTION_LESS 2
6737 #define COMPAREFUNCTION_EQUAL 3
6738 #define COMPAREFUNCTION_LEQUAL 4
6739 #define COMPAREFUNCTION_GREATER 5
6740 #define COMPAREFUNCTION_NOTEQUAL 6
6741 #define COMPAREFUNCTION_GEQUAL 7
6742
6743 /* Enum SURFACE_FORMAT */
6744 #define R32G32B32A32_FLOAT 0
6745 #define R32G32B32A32_SINT 1
6746 #define R32G32B32A32_UINT 2
6747 #define R32G32B32A32_UNORM 3
6748 #define R32G32B32A32_SNORM 4
6749 #define R64G64_FLOAT 5
6750 #define R32G32B32X32_FLOAT 6
6751 #define R32G32B32A32_SSCALED 7
6752 #define R32G32B32A32_USCALED 8
6753 #define R32G32B32A32_SFIXED 32
6754 #define R64G64_PASSTHRU 33
6755 #define R32G32B32_FLOAT 64
6756 #define R32G32B32_SINT 65
6757 #define R32G32B32_UINT 66
6758 #define R32G32B32_UNORM 67
6759 #define R32G32B32_SNORM 68
6760 #define R32G32B32_SSCALED 69
6761 #define R32G32B32_USCALED 70
6762 #define R32G32B32_SFIXED 80
6763 #define R16G16B16A16_UNORM 128
6764 #define R16G16B16A16_SNORM 129
6765 #define R16G16B16A16_SINT 130
6766 #define R16G16B16A16_UINT 131
6767 #define R16G16B16A16_FLOAT 132
6768 #define R32G32_FLOAT 133
6769 #define R32G32_SINT 134
6770 #define R32G32_UINT 135
6771 #define R32_FLOAT_X8X24_TYPELESS 136
6772 #define X32_TYPELESS_G8X24_UINT 137
6773 #define L32A32_FLOAT 138
6774 #define R32G32_UNORM 139
6775 #define R32G32_SNORM 140
6776 #define R64_FLOAT 141
6777 #define R16G16B16X16_UNORM 142
6778 #define R16G16B16X16_FLOAT 143
6779 #define A32X32_FLOAT 144
6780 #define L32X32_FLOAT 145
6781 #define I32X32_FLOAT 146
6782 #define R16G16B16A16_SSCALED 147
6783 #define R16G16B16A16_USCALED 148
6784 #define R32G32_SSCALED 149
6785 #define R32G32_USCALED 150
6786 #define R32G32_SFIXED 160
6787 #define R64_PASSTHRU 161
6788 #define B8G8R8A8_UNORM 192
6789 #define B8G8R8A8_UNORM_SRGB 193
6790 #define R10G10B10A2_UNORM 194
6791 #define R10G10B10A2_UNORM_SRGB 195
6792 #define R10G10B10A2_UINT 196
6793 #define R10G10B10_SNORM_A2_UNORM 197
6794 #define R8G8B8A8_UNORM 199
6795 #define R8G8B8A8_UNORM_SRGB 200
6796 #define R8G8B8A8_SNORM 201
6797 #define R8G8B8A8_SINT 202
6798 #define R8G8B8A8_UINT 203
6799 #define R16G16_UNORM 204
6800 #define R16G16_SNORM 205
6801 #define R16G16_SINT 206
6802 #define R16G16_UINT 207
6803 #define R16G16_FLOAT 208
6804 #define B10G10R10A2_UNORM 209
6805 #define B10G10R10A2_UNORM_SRGB 210
6806 #define R11G11B10_FLOAT 211
6807 #define R32_SINT 214
6808 #define R32_UINT 215
6809 #define R32_FLOAT 216
6810 #define R24_UNORM_X8_TYPELESS 217
6811 #define X24_TYPELESS_G8_UINT 218
6812 #define L32_UNORM 221
6813 #define A32_UNORM 222
6814 #define L16A16_UNORM 223
6815 #define I24X8_UNORM 224
6816 #define L24X8_UNORM 225
6817 #define A24X8_UNORM 226
6818 #define I32_FLOAT 227
6819 #define L32_FLOAT 228
6820 #define A32_FLOAT 229
6821 #define X8B8_UNORM_G8R8_SNORM 230
6822 #define A8X8_UNORM_G8R8_SNORM 231
6823 #define B8X8_UNORM_G8R8_SNORM 232
6824 #define B8G8R8X8_UNORM 233
6825 #define B8G8R8X8_UNORM_SRGB 234
6826 #define R8G8B8X8_UNORM 235
6827 #define R8G8B8X8_UNORM_SRGB 236
6828 #define R9G9B9E5_SHAREDEXP 237
6829 #define B10G10R10X2_UNORM 238
6830 #define L16A16_FLOAT 240
6831 #define R32_UNORM 241
6832 #define R32_SNORM 242
6833 #define R10G10B10X2_USCALED 243
6834 #define R8G8B8A8_SSCALED 244
6835 #define R8G8B8A8_USCALED 245
6836 #define R16G16_SSCALED 246
6837 #define R16G16_USCALED 247
6838 #define R32_SSCALED 248
6839 #define R32_USCALED 249
6840 #define B5G6R5_UNORM 256
6841 #define B5G6R5_UNORM_SRGB 257
6842 #define B5G5R5A1_UNORM 258
6843 #define B5G5R5A1_UNORM_SRGB 259
6844 #define B4G4R4A4_UNORM 260
6845 #define B4G4R4A4_UNORM_SRGB 261
6846 #define R8G8_UNORM 262
6847 #define R8G8_SNORM 263
6848 #define R8G8_SINT 264
6849 #define R8G8_UINT 265
6850 #define R16_UNORM 266
6851 #define R16_SNORM 267
6852 #define R16_SINT 268
6853 #define R16_UINT 269
6854 #define R16_FLOAT 270
6855 #define A8P8_UNORM_PALETTE0 271
6856 #define A8P8_UNORM_PALETTE1 272
6857 #define I16_UNORM 273
6858 #define L16_UNORM 274
6859 #define A16_UNORM 275
6860 #define L8A8_UNORM 276
6861 #define I16_FLOAT 277
6862 #define L16_FLOAT 278
6863 #define A16_FLOAT 279
6864 #define L8A8_UNORM_SRGB 280
6865 #define R5G5_SNORM_B6_UNORM 281
6866 #define B5G5R5X1_UNORM 282
6867 #define B5G5R5X1_UNORM_SRGB 283
6868 #define R8G8_SSCALED 284
6869 #define R8G8_USCALED 285
6870 #define R16_SSCALED 286
6871 #define R16_USCALED 287
6872 #define P8A8_UNORM_PALETTE0 290
6873 #define P8A8_UNORM_PALETTE1 291
6874 #define A1B5G5R5_UNORM 292
6875 #define A4B4G4R4_UNORM 293
6876 #define L8A8_UINT 294
6877 #define L8A8_SINT 295
6878 #define R8_UNORM 320
6879 #define R8_SNORM 321
6880 #define R8_SINT 322
6881 #define R8_UINT 323
6882 #define A8_UNORM 324
6883 #define I8_UNORM 325
6884 #define L8_UNORM 326
6885 #define P4A4_UNORM_PALETTE0 327
6886 #define A4P4_UNORM_PALETTE0 328
6887 #define R8_SSCALED 329
6888 #define R8_USCALED 330
6889 #define P8_UNORM_PALETTE0 331
6890 #define L8_UNORM_SRGB 332
6891 #define P8_UNORM_PALETTE1 333
6892 #define P4A4_UNORM_PALETTE1 334
6893 #define A4P4_UNORM_PALETTE1 335
6894 #define Y8_UNORM 336
6895 #define L8_UINT 338
6896 #define L8_SINT 339
6897 #define I8_UINT 340
6898 #define I8_SINT 341
6899 #define DXT1_RGB_SRGB 384
6900 #define R1_UNORM 385
6901 #define YCRCB_NORMAL 386
6902 #define YCRCB_SWAPUVY 387
6903 #define P2_UNORM_PALETTE0 388
6904 #define P2_UNORM_PALETTE1 389
6905 #define BC1_UNORM 390
6906 #define BC2_UNORM 391
6907 #define BC3_UNORM 392
6908 #define BC4_UNORM 393
6909 #define BC5_UNORM 394
6910 #define BC1_UNORM_SRGB 395
6911 #define BC2_UNORM_SRGB 396
6912 #define BC3_UNORM_SRGB 397
6913 #define MONO8 398
6914 #define YCRCB_SWAPUV 399
6915 #define YCRCB_SWAPY 400
6916 #define DXT1_RGB 401
6917 #define FXT1 402
6918 #define R8G8B8_UNORM 403
6919 #define R8G8B8_SNORM 404
6920 #define R8G8B8_SSCALED 405
6921 #define R8G8B8_USCALED 406
6922 #define R64G64B64A64_FLOAT 407
6923 #define R64G64B64_FLOAT 408
6924 #define BC4_SNORM 409
6925 #define BC5_SNORM 410
6926 #define R16G16B16_FLOAT 411
6927 #define R16G16B16_UNORM 412
6928 #define R16G16B16_SNORM 413
6929 #define R16G16B16_SSCALED 414
6930 #define R16G16B16_USCALED 415
6931 #define BC6H_SF16 417
6932 #define BC7_UNORM 418
6933 #define BC7_UNORM_SRGB 419
6934 #define BC6H_UF16 420
6935 #define PLANAR_420_8 421
6936 #define R8G8B8_UNORM_SRGB 424
6937 #define ETC1_RGB8 425
6938 #define ETC2_RGB8 426
6939 #define EAC_R11 427
6940 #define EAC_RG11 428
6941 #define EAC_SIGNED_R11 429
6942 #define EAC_SIGNED_RG11 430
6943 #define ETC2_SRGB8 431
6944 #define R16G16B16_UINT 432
6945 #define R16G16B16_SINT 433
6946 #define R32_SFIXED 434
6947 #define R10G10B10A2_SNORM 435
6948 #define R10G10B10A2_USCALED 436
6949 #define R10G10B10A2_SSCALED 437
6950 #define R10G10B10A2_SINT 438
6951 #define B10G10R10A2_SNORM 439
6952 #define B10G10R10A2_USCALED 440
6953 #define B10G10R10A2_SSCALED 441
6954 #define B10G10R10A2_UINT 442
6955 #define B10G10R10A2_SINT 443
6956 #define R64G64B64A64_PASSTHRU 444
6957 #define R64G64B64_PASSTHRU 445
6958 #define ETC2_RGB8_PTA 448
6959 #define ETC2_SRGB8_PTA 449
6960 #define ETC2_EAC_RGBA8 450
6961 #define ETC2_EAC_SRGB8_A8 451
6962 #define R8G8B8_UINT 456
6963 #define R8G8B8_SINT 457
6964 #define RAW 511
6965
6966 /* Enum Texture Coordinate Mode */
6967 #define TCM_WRAP 0
6968 #define TCM_MIRROR 1
6969 #define TCM_CLAMP 2
6970 #define TCM_CUBE 3
6971 #define TCM_CLAMP_BORDER 4
6972 #define TCM_MIRROR_ONCE 5
6973