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anv/gen7: Set SLM size in interface descriptor
[mesa.git] / src / vulkan / gen7_pack.h
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24
25 /* Instructions, enums and structures for IVB.
26 *
27 * This file has been generated, do not hand edit.
28 */
29
30 #pragma once
31
32 #include <stdio.h>
33 #include <assert.h>
34
35 #ifndef __gen_validate_value
36 #define __gen_validate_value(x)
37 #endif
38
39 #ifndef __gen_field_functions
40 #define __gen_field_functions
41
42 union __gen_value {
43 float f;
44 uint32_t dw;
45 };
46
47 static inline uint64_t
48 __gen_mbo(uint32_t start, uint32_t end)
49 {
50 return (~0ul >> (64 - (end - start + 1))) << start;
51 }
52
53 static inline uint64_t
54 __gen_field(uint64_t v, uint32_t start, uint32_t end)
55 {
56 __gen_validate_value(v);
57 #if DEBUG
58 if (end - start + 1 < 64)
59 assert(v < 1ul << (end - start + 1));
60 #endif
61
62 return v << start;
63 }
64
65 static inline uint64_t
66 __gen_fixed(float v, uint32_t start, uint32_t end,
67 bool is_signed, uint32_t fract_bits)
68 {
69 __gen_validate_value(v);
70
71 const float factor = (1 << fract_bits);
72
73 float max, min;
74 if (is_signed) {
75 max = ((1 << (end - start)) - 1) / factor;
76 min = -(1 << (end - start)) / factor;
77 } else {
78 max = ((1 << (end - start + 1)) - 1) / factor;
79 min = 0.0f;
80 }
81
82 if (v > max)
83 v = max;
84 else if (v < min)
85 v = min;
86
87 int32_t int_val = roundf(v * factor);
88
89 if (is_signed)
90 int_val &= (1 << (end - start + 1)) - 1;
91
92 return int_val << start;
93 }
94
95 static inline uint64_t
96 __gen_offset(uint64_t v, uint32_t start, uint32_t end)
97 {
98 __gen_validate_value(v);
99 #if DEBUG
100 uint64_t mask = (~0ul >> (64 - (end - start + 1))) << start;
101
102 assert((v & ~mask) == 0);
103 #endif
104
105 return v;
106 }
107
108 static inline uint32_t
109 __gen_float(float v)
110 {
111 __gen_validate_value(v);
112 return ((union __gen_value) { .f = (v) }).dw;
113 }
114
115 #ifndef __gen_address_type
116 #error #define __gen_address_type before including this file
117 #endif
118
119 #ifndef __gen_user_data
120 #error #define __gen_combine_address before including this file
121 #endif
122
123 #endif
124
125 #define GEN7_3DSTATE_URB_VS_length_bias 0x00000002
126 #define GEN7_3DSTATE_URB_VS_header \
127 .CommandType = 3, \
128 .CommandSubType = 3, \
129 ._3DCommandOpcode = 0, \
130 ._3DCommandSubOpcode = 48, \
131 .DwordLength = 0
132
133 #define GEN7_3DSTATE_URB_VS_length 0x00000002
134
135 struct GEN7_3DSTATE_URB_VS {
136 uint32_t CommandType;
137 uint32_t CommandSubType;
138 uint32_t _3DCommandOpcode;
139 uint32_t _3DCommandSubOpcode;
140 uint32_t DwordLength;
141 uint32_t VSURBStartingAddress;
142 uint32_t VSURBEntryAllocationSize;
143 uint32_t VSNumberofURBEntries;
144 };
145
146 static inline void
147 GEN7_3DSTATE_URB_VS_pack(__gen_user_data *data, void * restrict dst,
148 const struct GEN7_3DSTATE_URB_VS * restrict values)
149 {
150 uint32_t *dw = (uint32_t * restrict) dst;
151
152 dw[0] =
153 __gen_field(values->CommandType, 29, 31) |
154 __gen_field(values->CommandSubType, 27, 28) |
155 __gen_field(values->_3DCommandOpcode, 24, 26) |
156 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
157 __gen_field(values->DwordLength, 0, 7) |
158 0;
159
160 dw[1] =
161 __gen_field(values->VSURBStartingAddress, 25, 29) |
162 __gen_field(values->VSURBEntryAllocationSize, 16, 24) |
163 __gen_field(values->VSNumberofURBEntries, 0, 15) |
164 0;
165
166 }
167
168 #define GEN7_MI_STORE_REGISTER_MEM_length_bias 0x00000002
169 #define GEN7_MI_STORE_REGISTER_MEM_header \
170 .CommandType = 0, \
171 .MICommandOpcode = 36, \
172 .DwordLength = 1
173
174 #define GEN7_MI_STORE_REGISTER_MEM_length 0x00000003
175
176 struct GEN7_MI_STORE_REGISTER_MEM {
177 uint32_t CommandType;
178 uint32_t MICommandOpcode;
179 bool UseGlobalGTT;
180 uint32_t DwordLength;
181 uint32_t RegisterAddress;
182 __gen_address_type MemoryAddress;
183 };
184
185 static inline void
186 GEN7_MI_STORE_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
187 const struct GEN7_MI_STORE_REGISTER_MEM * restrict values)
188 {
189 uint32_t *dw = (uint32_t * restrict) dst;
190
191 dw[0] =
192 __gen_field(values->CommandType, 29, 31) |
193 __gen_field(values->MICommandOpcode, 23, 28) |
194 __gen_field(values->UseGlobalGTT, 22, 22) |
195 __gen_field(values->DwordLength, 0, 7) |
196 0;
197
198 dw[1] =
199 __gen_offset(values->RegisterAddress, 2, 22) |
200 0;
201
202 uint32_t dw2 =
203 0;
204
205 dw[2] =
206 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
207
208 }
209
210 #define GEN7_PIPELINE_SELECT_length_bias 0x00000001
211 #define GEN7_PIPELINE_SELECT_header \
212 .CommandType = 3, \
213 .CommandSubType = 1, \
214 ._3DCommandOpcode = 1, \
215 ._3DCommandSubOpcode = 4
216
217 #define GEN7_PIPELINE_SELECT_length 0x00000001
218
219 struct GEN7_PIPELINE_SELECT {
220 uint32_t CommandType;
221 uint32_t CommandSubType;
222 uint32_t _3DCommandOpcode;
223 uint32_t _3DCommandSubOpcode;
224 #define _3D 0
225 #define Media 1
226 #define GPGPU 2
227 uint32_t PipelineSelection;
228 };
229
230 static inline void
231 GEN7_PIPELINE_SELECT_pack(__gen_user_data *data, void * restrict dst,
232 const struct GEN7_PIPELINE_SELECT * restrict values)
233 {
234 uint32_t *dw = (uint32_t * restrict) dst;
235
236 dw[0] =
237 __gen_field(values->CommandType, 29, 31) |
238 __gen_field(values->CommandSubType, 27, 28) |
239 __gen_field(values->_3DCommandOpcode, 24, 26) |
240 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
241 __gen_field(values->PipelineSelection, 0, 1) |
242 0;
243
244 }
245
246 #define GEN7_STATE_BASE_ADDRESS_length_bias 0x00000002
247 #define GEN7_STATE_BASE_ADDRESS_header \
248 .CommandType = 3, \
249 .CommandSubType = 0, \
250 ._3DCommandOpcode = 1, \
251 ._3DCommandSubOpcode = 1, \
252 .DwordLength = 8
253
254 #define GEN7_STATE_BASE_ADDRESS_length 0x0000000a
255
256 #define GEN7_MEMORY_OBJECT_CONTROL_STATE_length 0x00000001
257
258 struct GEN7_MEMORY_OBJECT_CONTROL_STATE {
259 uint32_t GraphicsDataTypeGFDT;
260 uint32_t LLCCacheabilityControlLLCCC;
261 uint32_t L3CacheabilityControlL3CC;
262 };
263
264 static inline void
265 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(__gen_user_data *data, void * restrict dst,
266 const struct GEN7_MEMORY_OBJECT_CONTROL_STATE * restrict values)
267 {
268 uint32_t *dw = (uint32_t * restrict) dst;
269
270 dw[0] =
271 __gen_field(values->GraphicsDataTypeGFDT, 2, 2) |
272 __gen_field(values->LLCCacheabilityControlLLCCC, 1, 1) |
273 __gen_field(values->L3CacheabilityControlL3CC, 0, 0) |
274 0;
275
276 }
277
278 struct GEN7_STATE_BASE_ADDRESS {
279 uint32_t CommandType;
280 uint32_t CommandSubType;
281 uint32_t _3DCommandOpcode;
282 uint32_t _3DCommandSubOpcode;
283 uint32_t DwordLength;
284 __gen_address_type GeneralStateBaseAddress;
285 struct GEN7_MEMORY_OBJECT_CONTROL_STATE GeneralStateMemoryObjectControlState;
286 struct GEN7_MEMORY_OBJECT_CONTROL_STATE StatelessDataPortAccessMemoryObjectControlState;
287 uint32_t StatelessDataPortAccessForceWriteThru;
288 bool GeneralStateBaseAddressModifyEnable;
289 __gen_address_type SurfaceStateBaseAddress;
290 struct GEN7_MEMORY_OBJECT_CONTROL_STATE SurfaceStateMemoryObjectControlState;
291 bool SurfaceStateBaseAddressModifyEnable;
292 __gen_address_type DynamicStateBaseAddress;
293 struct GEN7_MEMORY_OBJECT_CONTROL_STATE DynamicStateMemoryObjectControlState;
294 bool DynamicStateBaseAddressModifyEnable;
295 __gen_address_type IndirectObjectBaseAddress;
296 struct GEN7_MEMORY_OBJECT_CONTROL_STATE IndirectObjectMemoryObjectControlState;
297 bool IndirectObjectBaseAddressModifyEnable;
298 __gen_address_type InstructionBaseAddress;
299 struct GEN7_MEMORY_OBJECT_CONTROL_STATE InstructionMemoryObjectControlState;
300 bool InstructionBaseAddressModifyEnable;
301 __gen_address_type GeneralStateAccessUpperBound;
302 bool GeneralStateAccessUpperBoundModifyEnable;
303 __gen_address_type DynamicStateAccessUpperBound;
304 bool DynamicStateAccessUpperBoundModifyEnable;
305 __gen_address_type IndirectObjectAccessUpperBound;
306 bool IndirectObjectAccessUpperBoundModifyEnable;
307 __gen_address_type InstructionAccessUpperBound;
308 bool InstructionAccessUpperBoundModifyEnable;
309 };
310
311 static inline void
312 GEN7_STATE_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
313 const struct GEN7_STATE_BASE_ADDRESS * restrict values)
314 {
315 uint32_t *dw = (uint32_t * restrict) dst;
316
317 dw[0] =
318 __gen_field(values->CommandType, 29, 31) |
319 __gen_field(values->CommandSubType, 27, 28) |
320 __gen_field(values->_3DCommandOpcode, 24, 26) |
321 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
322 __gen_field(values->DwordLength, 0, 7) |
323 0;
324
325 uint32_t dw_GeneralStateMemoryObjectControlState;
326 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_GeneralStateMemoryObjectControlState, &values->GeneralStateMemoryObjectControlState);
327 uint32_t dw_StatelessDataPortAccessMemoryObjectControlState;
328 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StatelessDataPortAccessMemoryObjectControlState, &values->StatelessDataPortAccessMemoryObjectControlState);
329 uint32_t dw1 =
330 __gen_field(dw_GeneralStateMemoryObjectControlState, 8, 11) |
331 __gen_field(dw_StatelessDataPortAccessMemoryObjectControlState, 4, 7) |
332 __gen_field(values->StatelessDataPortAccessForceWriteThru, 3, 3) |
333 __gen_field(values->GeneralStateBaseAddressModifyEnable, 0, 0) |
334 0;
335
336 dw[1] =
337 __gen_combine_address(data, &dw[1], values->GeneralStateBaseAddress, dw1);
338
339 uint32_t dw_SurfaceStateMemoryObjectControlState;
340 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceStateMemoryObjectControlState, &values->SurfaceStateMemoryObjectControlState);
341 uint32_t dw2 =
342 __gen_field(dw_SurfaceStateMemoryObjectControlState, 8, 11) |
343 __gen_field(values->SurfaceStateBaseAddressModifyEnable, 0, 0) |
344 0;
345
346 dw[2] =
347 __gen_combine_address(data, &dw[2], values->SurfaceStateBaseAddress, dw2);
348
349 uint32_t dw_DynamicStateMemoryObjectControlState;
350 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DynamicStateMemoryObjectControlState, &values->DynamicStateMemoryObjectControlState);
351 uint32_t dw3 =
352 __gen_field(dw_DynamicStateMemoryObjectControlState, 8, 11) |
353 __gen_field(values->DynamicStateBaseAddressModifyEnable, 0, 0) |
354 0;
355
356 dw[3] =
357 __gen_combine_address(data, &dw[3], values->DynamicStateBaseAddress, dw3);
358
359 uint32_t dw_IndirectObjectMemoryObjectControlState;
360 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_IndirectObjectMemoryObjectControlState, &values->IndirectObjectMemoryObjectControlState);
361 uint32_t dw4 =
362 __gen_field(dw_IndirectObjectMemoryObjectControlState, 8, 11) |
363 __gen_field(values->IndirectObjectBaseAddressModifyEnable, 0, 0) |
364 0;
365
366 dw[4] =
367 __gen_combine_address(data, &dw[4], values->IndirectObjectBaseAddress, dw4);
368
369 uint32_t dw_InstructionMemoryObjectControlState;
370 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_InstructionMemoryObjectControlState, &values->InstructionMemoryObjectControlState);
371 uint32_t dw5 =
372 __gen_field(dw_InstructionMemoryObjectControlState, 8, 11) |
373 __gen_field(values->InstructionBaseAddressModifyEnable, 0, 0) |
374 0;
375
376 dw[5] =
377 __gen_combine_address(data, &dw[5], values->InstructionBaseAddress, dw5);
378
379 uint32_t dw6 =
380 __gen_field(values->GeneralStateAccessUpperBoundModifyEnable, 0, 0) |
381 0;
382
383 dw[6] =
384 __gen_combine_address(data, &dw[6], values->GeneralStateAccessUpperBound, dw6);
385
386 uint32_t dw7 =
387 __gen_field(values->DynamicStateAccessUpperBoundModifyEnable, 0, 0) |
388 0;
389
390 dw[7] =
391 __gen_combine_address(data, &dw[7], values->DynamicStateAccessUpperBound, dw7);
392
393 uint32_t dw8 =
394 __gen_field(values->IndirectObjectAccessUpperBoundModifyEnable, 0, 0) |
395 0;
396
397 dw[8] =
398 __gen_combine_address(data, &dw[8], values->IndirectObjectAccessUpperBound, dw8);
399
400 uint32_t dw9 =
401 __gen_field(values->InstructionAccessUpperBoundModifyEnable, 0, 0) |
402 0;
403
404 dw[9] =
405 __gen_combine_address(data, &dw[9], values->InstructionAccessUpperBound, dw9);
406
407 }
408
409 #define GEN7_STATE_PREFETCH_length_bias 0x00000002
410 #define GEN7_STATE_PREFETCH_header \
411 .CommandType = 3, \
412 .CommandSubType = 0, \
413 ._3DCommandOpcode = 0, \
414 ._3DCommandSubOpcode = 3, \
415 .DwordLength = 0
416
417 #define GEN7_STATE_PREFETCH_length 0x00000002
418
419 struct GEN7_STATE_PREFETCH {
420 uint32_t CommandType;
421 uint32_t CommandSubType;
422 uint32_t _3DCommandOpcode;
423 uint32_t _3DCommandSubOpcode;
424 uint32_t DwordLength;
425 __gen_address_type PrefetchPointer;
426 uint32_t PrefetchCount;
427 };
428
429 static inline void
430 GEN7_STATE_PREFETCH_pack(__gen_user_data *data, void * restrict dst,
431 const struct GEN7_STATE_PREFETCH * restrict values)
432 {
433 uint32_t *dw = (uint32_t * restrict) dst;
434
435 dw[0] =
436 __gen_field(values->CommandType, 29, 31) |
437 __gen_field(values->CommandSubType, 27, 28) |
438 __gen_field(values->_3DCommandOpcode, 24, 26) |
439 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
440 __gen_field(values->DwordLength, 0, 7) |
441 0;
442
443 uint32_t dw1 =
444 __gen_field(values->PrefetchCount, 0, 2) |
445 0;
446
447 dw[1] =
448 __gen_combine_address(data, &dw[1], values->PrefetchPointer, dw1);
449
450 }
451
452 #define GEN7_STATE_SIP_length_bias 0x00000002
453 #define GEN7_STATE_SIP_header \
454 .CommandType = 3, \
455 .CommandSubType = 0, \
456 ._3DCommandOpcode = 1, \
457 ._3DCommandSubOpcode = 2, \
458 .DwordLength = 0
459
460 #define GEN7_STATE_SIP_length 0x00000002
461
462 struct GEN7_STATE_SIP {
463 uint32_t CommandType;
464 uint32_t CommandSubType;
465 uint32_t _3DCommandOpcode;
466 uint32_t _3DCommandSubOpcode;
467 uint32_t DwordLength;
468 uint32_t SystemInstructionPointer;
469 };
470
471 static inline void
472 GEN7_STATE_SIP_pack(__gen_user_data *data, void * restrict dst,
473 const struct GEN7_STATE_SIP * restrict values)
474 {
475 uint32_t *dw = (uint32_t * restrict) dst;
476
477 dw[0] =
478 __gen_field(values->CommandType, 29, 31) |
479 __gen_field(values->CommandSubType, 27, 28) |
480 __gen_field(values->_3DCommandOpcode, 24, 26) |
481 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
482 __gen_field(values->DwordLength, 0, 7) |
483 0;
484
485 dw[1] =
486 __gen_offset(values->SystemInstructionPointer, 4, 31) |
487 0;
488
489 }
490
491 #define GEN7_SWTESS_BASE_ADDRESS_length_bias 0x00000002
492 #define GEN7_SWTESS_BASE_ADDRESS_header \
493 .CommandType = 3, \
494 .CommandSubType = 0, \
495 ._3DCommandOpcode = 1, \
496 ._3DCommandSubOpcode = 3, \
497 .DwordLength = 0
498
499 #define GEN7_SWTESS_BASE_ADDRESS_length 0x00000002
500
501 struct GEN7_SWTESS_BASE_ADDRESS {
502 uint32_t CommandType;
503 uint32_t CommandSubType;
504 uint32_t _3DCommandOpcode;
505 uint32_t _3DCommandSubOpcode;
506 uint32_t DwordLength;
507 __gen_address_type SWTessellationBaseAddress;
508 struct GEN7_MEMORY_OBJECT_CONTROL_STATE SWTessellationMemoryObjectControlState;
509 };
510
511 static inline void
512 GEN7_SWTESS_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
513 const struct GEN7_SWTESS_BASE_ADDRESS * restrict values)
514 {
515 uint32_t *dw = (uint32_t * restrict) dst;
516
517 dw[0] =
518 __gen_field(values->CommandType, 29, 31) |
519 __gen_field(values->CommandSubType, 27, 28) |
520 __gen_field(values->_3DCommandOpcode, 24, 26) |
521 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
522 __gen_field(values->DwordLength, 0, 7) |
523 0;
524
525 uint32_t dw_SWTessellationMemoryObjectControlState;
526 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SWTessellationMemoryObjectControlState, &values->SWTessellationMemoryObjectControlState);
527 uint32_t dw1 =
528 __gen_field(dw_SWTessellationMemoryObjectControlState, 8, 11) |
529 0;
530
531 dw[1] =
532 __gen_combine_address(data, &dw[1], values->SWTessellationBaseAddress, dw1);
533
534 }
535
536 #define GEN7_3DPRIMITIVE_length_bias 0x00000002
537 #define GEN7_3DPRIMITIVE_header \
538 .CommandType = 3, \
539 .CommandSubType = 3, \
540 ._3DCommandOpcode = 3, \
541 ._3DCommandSubOpcode = 0, \
542 .DwordLength = 5
543
544 #define GEN7_3DPRIMITIVE_length 0x00000007
545
546 struct GEN7_3DPRIMITIVE {
547 uint32_t CommandType;
548 uint32_t CommandSubType;
549 uint32_t _3DCommandOpcode;
550 uint32_t _3DCommandSubOpcode;
551 bool IndirectParameterEnable;
552 bool PredicateEnable;
553 uint32_t DwordLength;
554 bool EndOffsetEnable;
555 #define SEQUENTIAL 0
556 #define RANDOM 1
557 uint32_t VertexAccessType;
558 uint32_t PrimitiveTopologyType;
559 uint32_t VertexCountPerInstance;
560 uint32_t StartVertexLocation;
561 uint32_t InstanceCount;
562 uint32_t StartInstanceLocation;
563 uint32_t BaseVertexLocation;
564 };
565
566 static inline void
567 GEN7_3DPRIMITIVE_pack(__gen_user_data *data, void * restrict dst,
568 const struct GEN7_3DPRIMITIVE * restrict values)
569 {
570 uint32_t *dw = (uint32_t * restrict) dst;
571
572 dw[0] =
573 __gen_field(values->CommandType, 29, 31) |
574 __gen_field(values->CommandSubType, 27, 28) |
575 __gen_field(values->_3DCommandOpcode, 24, 26) |
576 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
577 __gen_field(values->IndirectParameterEnable, 10, 10) |
578 __gen_field(values->PredicateEnable, 8, 8) |
579 __gen_field(values->DwordLength, 0, 7) |
580 0;
581
582 dw[1] =
583 __gen_field(values->EndOffsetEnable, 9, 9) |
584 __gen_field(values->VertexAccessType, 8, 8) |
585 __gen_field(values->PrimitiveTopologyType, 0, 5) |
586 0;
587
588 dw[2] =
589 __gen_field(values->VertexCountPerInstance, 0, 31) |
590 0;
591
592 dw[3] =
593 __gen_field(values->StartVertexLocation, 0, 31) |
594 0;
595
596 dw[4] =
597 __gen_field(values->InstanceCount, 0, 31) |
598 0;
599
600 dw[5] =
601 __gen_field(values->StartInstanceLocation, 0, 31) |
602 0;
603
604 dw[6] =
605 __gen_field(values->BaseVertexLocation, 0, 31) |
606 0;
607
608 }
609
610 #define GEN7_3DSTATE_AA_LINE_PARAMETERS_length_bias 0x00000002
611 #define GEN7_3DSTATE_AA_LINE_PARAMETERS_header \
612 .CommandType = 3, \
613 .CommandSubType = 3, \
614 ._3DCommandOpcode = 1, \
615 ._3DCommandSubOpcode = 10, \
616 .DwordLength = 1
617
618 #define GEN7_3DSTATE_AA_LINE_PARAMETERS_length 0x00000003
619
620 struct GEN7_3DSTATE_AA_LINE_PARAMETERS {
621 uint32_t CommandType;
622 uint32_t CommandSubType;
623 uint32_t _3DCommandOpcode;
624 uint32_t _3DCommandSubOpcode;
625 uint32_t DwordLength;
626 float AACoverageBias;
627 float AACoverageSlope;
628 float AACoverageEndCapBias;
629 float AACoverageEndCapSlope;
630 };
631
632 static inline void
633 GEN7_3DSTATE_AA_LINE_PARAMETERS_pack(__gen_user_data *data, void * restrict dst,
634 const struct GEN7_3DSTATE_AA_LINE_PARAMETERS * restrict values)
635 {
636 uint32_t *dw = (uint32_t * restrict) dst;
637
638 dw[0] =
639 __gen_field(values->CommandType, 29, 31) |
640 __gen_field(values->CommandSubType, 27, 28) |
641 __gen_field(values->_3DCommandOpcode, 24, 26) |
642 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
643 __gen_field(values->DwordLength, 0, 7) |
644 0;
645
646 dw[1] =
647 __gen_field(values->AACoverageBias * (1 << 8), 16, 23) |
648 __gen_field(values->AACoverageSlope * (1 << 8), 0, 7) |
649 0;
650
651 dw[2] =
652 __gen_field(values->AACoverageEndCapBias * (1 << 8), 16, 23) |
653 __gen_field(values->AACoverageEndCapSlope * (1 << 8), 0, 7) |
654 0;
655
656 }
657
658 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_length_bias 0x00000002
659 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_header\
660 .CommandType = 3, \
661 .CommandSubType = 3, \
662 ._3DCommandOpcode = 0, \
663 ._3DCommandSubOpcode = 40, \
664 .DwordLength = 0
665
666 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_length 0x00000002
667
668 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS {
669 uint32_t CommandType;
670 uint32_t CommandSubType;
671 uint32_t _3DCommandOpcode;
672 uint32_t _3DCommandSubOpcode;
673 uint32_t DwordLength;
674 uint32_t PointertoDSBindingTable;
675 };
676
677 static inline void
678 GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
679 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS * restrict values)
680 {
681 uint32_t *dw = (uint32_t * restrict) dst;
682
683 dw[0] =
684 __gen_field(values->CommandType, 29, 31) |
685 __gen_field(values->CommandSubType, 27, 28) |
686 __gen_field(values->_3DCommandOpcode, 24, 26) |
687 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
688 __gen_field(values->DwordLength, 0, 7) |
689 0;
690
691 dw[1] =
692 __gen_offset(values->PointertoDSBindingTable, 5, 15) |
693 0;
694
695 }
696
697 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_length_bias 0x00000002
698 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_header\
699 .CommandType = 3, \
700 .CommandSubType = 3, \
701 ._3DCommandOpcode = 0, \
702 ._3DCommandSubOpcode = 41, \
703 .DwordLength = 0
704
705 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_length 0x00000002
706
707 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS {
708 uint32_t CommandType;
709 uint32_t CommandSubType;
710 uint32_t _3DCommandOpcode;
711 uint32_t _3DCommandSubOpcode;
712 uint32_t DwordLength;
713 uint32_t PointertoGSBindingTable;
714 };
715
716 static inline void
717 GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
718 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS * restrict values)
719 {
720 uint32_t *dw = (uint32_t * restrict) dst;
721
722 dw[0] =
723 __gen_field(values->CommandType, 29, 31) |
724 __gen_field(values->CommandSubType, 27, 28) |
725 __gen_field(values->_3DCommandOpcode, 24, 26) |
726 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
727 __gen_field(values->DwordLength, 0, 7) |
728 0;
729
730 dw[1] =
731 __gen_offset(values->PointertoGSBindingTable, 5, 15) |
732 0;
733
734 }
735
736 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_length_bias 0x00000002
737 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_header\
738 .CommandType = 3, \
739 .CommandSubType = 3, \
740 ._3DCommandOpcode = 0, \
741 ._3DCommandSubOpcode = 39, \
742 .DwordLength = 0
743
744 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_length 0x00000002
745
746 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS {
747 uint32_t CommandType;
748 uint32_t CommandSubType;
749 uint32_t _3DCommandOpcode;
750 uint32_t _3DCommandSubOpcode;
751 uint32_t DwordLength;
752 uint32_t PointertoHSBindingTable;
753 };
754
755 static inline void
756 GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
757 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS * restrict values)
758 {
759 uint32_t *dw = (uint32_t * restrict) dst;
760
761 dw[0] =
762 __gen_field(values->CommandType, 29, 31) |
763 __gen_field(values->CommandSubType, 27, 28) |
764 __gen_field(values->_3DCommandOpcode, 24, 26) |
765 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
766 __gen_field(values->DwordLength, 0, 7) |
767 0;
768
769 dw[1] =
770 __gen_offset(values->PointertoHSBindingTable, 5, 15) |
771 0;
772
773 }
774
775 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_length_bias 0x00000002
776 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_header\
777 .CommandType = 3, \
778 .CommandSubType = 3, \
779 ._3DCommandOpcode = 0, \
780 ._3DCommandSubOpcode = 42, \
781 .DwordLength = 0
782
783 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_length 0x00000002
784
785 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS {
786 uint32_t CommandType;
787 uint32_t CommandSubType;
788 uint32_t _3DCommandOpcode;
789 uint32_t _3DCommandSubOpcode;
790 uint32_t DwordLength;
791 uint32_t PointertoPSBindingTable;
792 };
793
794 static inline void
795 GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
796 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS * restrict values)
797 {
798 uint32_t *dw = (uint32_t * restrict) dst;
799
800 dw[0] =
801 __gen_field(values->CommandType, 29, 31) |
802 __gen_field(values->CommandSubType, 27, 28) |
803 __gen_field(values->_3DCommandOpcode, 24, 26) |
804 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
805 __gen_field(values->DwordLength, 0, 7) |
806 0;
807
808 dw[1] =
809 __gen_offset(values->PointertoPSBindingTable, 5, 15) |
810 0;
811
812 }
813
814 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_length_bias 0x00000002
815 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_header\
816 .CommandType = 3, \
817 .CommandSubType = 3, \
818 ._3DCommandOpcode = 0, \
819 ._3DCommandSubOpcode = 38, \
820 .DwordLength = 0
821
822 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_length 0x00000002
823
824 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS {
825 uint32_t CommandType;
826 uint32_t CommandSubType;
827 uint32_t _3DCommandOpcode;
828 uint32_t _3DCommandSubOpcode;
829 uint32_t DwordLength;
830 uint32_t PointertoVSBindingTable;
831 };
832
833 static inline void
834 GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
835 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS * restrict values)
836 {
837 uint32_t *dw = (uint32_t * restrict) dst;
838
839 dw[0] =
840 __gen_field(values->CommandType, 29, 31) |
841 __gen_field(values->CommandSubType, 27, 28) |
842 __gen_field(values->_3DCommandOpcode, 24, 26) |
843 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
844 __gen_field(values->DwordLength, 0, 7) |
845 0;
846
847 dw[1] =
848 __gen_offset(values->PointertoVSBindingTable, 5, 15) |
849 0;
850
851 }
852
853 #define GEN7_3DSTATE_BLEND_STATE_POINTERS_length_bias 0x00000002
854 #define GEN7_3DSTATE_BLEND_STATE_POINTERS_header\
855 .CommandType = 3, \
856 .CommandSubType = 3, \
857 ._3DCommandOpcode = 0, \
858 ._3DCommandSubOpcode = 36, \
859 .DwordLength = 0
860
861 #define GEN7_3DSTATE_BLEND_STATE_POINTERS_length 0x00000002
862
863 struct GEN7_3DSTATE_BLEND_STATE_POINTERS {
864 uint32_t CommandType;
865 uint32_t CommandSubType;
866 uint32_t _3DCommandOpcode;
867 uint32_t _3DCommandSubOpcode;
868 uint32_t DwordLength;
869 uint32_t BlendStatePointer;
870 };
871
872 static inline void
873 GEN7_3DSTATE_BLEND_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
874 const struct GEN7_3DSTATE_BLEND_STATE_POINTERS * restrict values)
875 {
876 uint32_t *dw = (uint32_t * restrict) dst;
877
878 dw[0] =
879 __gen_field(values->CommandType, 29, 31) |
880 __gen_field(values->CommandSubType, 27, 28) |
881 __gen_field(values->_3DCommandOpcode, 24, 26) |
882 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
883 __gen_field(values->DwordLength, 0, 7) |
884 0;
885
886 dw[1] =
887 __gen_offset(values->BlendStatePointer, 6, 31) |
888 __gen_mbo(0, 0) |
889 0;
890
891 }
892
893 #define GEN7_3DSTATE_CC_STATE_POINTERS_length_bias 0x00000002
894 #define GEN7_3DSTATE_CC_STATE_POINTERS_header \
895 .CommandType = 3, \
896 .CommandSubType = 3, \
897 ._3DCommandOpcode = 0, \
898 ._3DCommandSubOpcode = 14, \
899 .DwordLength = 0
900
901 #define GEN7_3DSTATE_CC_STATE_POINTERS_length 0x00000002
902
903 struct GEN7_3DSTATE_CC_STATE_POINTERS {
904 uint32_t CommandType;
905 uint32_t CommandSubType;
906 uint32_t _3DCommandOpcode;
907 uint32_t _3DCommandSubOpcode;
908 uint32_t DwordLength;
909 uint32_t ColorCalcStatePointer;
910 };
911
912 static inline void
913 GEN7_3DSTATE_CC_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
914 const struct GEN7_3DSTATE_CC_STATE_POINTERS * restrict values)
915 {
916 uint32_t *dw = (uint32_t * restrict) dst;
917
918 dw[0] =
919 __gen_field(values->CommandType, 29, 31) |
920 __gen_field(values->CommandSubType, 27, 28) |
921 __gen_field(values->_3DCommandOpcode, 24, 26) |
922 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
923 __gen_field(values->DwordLength, 0, 7) |
924 0;
925
926 dw[1] =
927 __gen_offset(values->ColorCalcStatePointer, 6, 31) |
928 __gen_mbo(0, 0) |
929 0;
930
931 }
932
933 #define GEN7_3DSTATE_CHROMA_KEY_length_bias 0x00000002
934 #define GEN7_3DSTATE_CHROMA_KEY_header \
935 .CommandType = 3, \
936 .CommandSubType = 3, \
937 ._3DCommandOpcode = 1, \
938 ._3DCommandSubOpcode = 4, \
939 .DwordLength = 2
940
941 #define GEN7_3DSTATE_CHROMA_KEY_length 0x00000004
942
943 struct GEN7_3DSTATE_CHROMA_KEY {
944 uint32_t CommandType;
945 uint32_t CommandSubType;
946 uint32_t _3DCommandOpcode;
947 uint32_t _3DCommandSubOpcode;
948 uint32_t DwordLength;
949 uint32_t ChromaKeyTableIndex;
950 uint32_t ChromaKeyLowValue;
951 uint32_t ChromaKeyHighValue;
952 };
953
954 static inline void
955 GEN7_3DSTATE_CHROMA_KEY_pack(__gen_user_data *data, void * restrict dst,
956 const struct GEN7_3DSTATE_CHROMA_KEY * restrict values)
957 {
958 uint32_t *dw = (uint32_t * restrict) dst;
959
960 dw[0] =
961 __gen_field(values->CommandType, 29, 31) |
962 __gen_field(values->CommandSubType, 27, 28) |
963 __gen_field(values->_3DCommandOpcode, 24, 26) |
964 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
965 __gen_field(values->DwordLength, 0, 7) |
966 0;
967
968 dw[1] =
969 __gen_field(values->ChromaKeyTableIndex, 30, 31) |
970 0;
971
972 dw[2] =
973 __gen_field(values->ChromaKeyLowValue, 0, 31) |
974 0;
975
976 dw[3] =
977 __gen_field(values->ChromaKeyHighValue, 0, 31) |
978 0;
979
980 }
981
982 #define GEN7_3DSTATE_CLEAR_PARAMS_length_bias 0x00000002
983 #define GEN7_3DSTATE_CLEAR_PARAMS_header \
984 .CommandType = 3, \
985 .CommandSubType = 3, \
986 ._3DCommandOpcode = 0, \
987 ._3DCommandSubOpcode = 4, \
988 .DwordLength = 1
989
990 #define GEN7_3DSTATE_CLEAR_PARAMS_length 0x00000003
991
992 struct GEN7_3DSTATE_CLEAR_PARAMS {
993 uint32_t CommandType;
994 uint32_t CommandSubType;
995 uint32_t _3DCommandOpcode;
996 uint32_t _3DCommandSubOpcode;
997 uint32_t DwordLength;
998 uint32_t DepthClearValue;
999 bool DepthClearValueValid;
1000 };
1001
1002 static inline void
1003 GEN7_3DSTATE_CLEAR_PARAMS_pack(__gen_user_data *data, void * restrict dst,
1004 const struct GEN7_3DSTATE_CLEAR_PARAMS * restrict values)
1005 {
1006 uint32_t *dw = (uint32_t * restrict) dst;
1007
1008 dw[0] =
1009 __gen_field(values->CommandType, 29, 31) |
1010 __gen_field(values->CommandSubType, 27, 28) |
1011 __gen_field(values->_3DCommandOpcode, 24, 26) |
1012 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1013 __gen_field(values->DwordLength, 0, 7) |
1014 0;
1015
1016 dw[1] =
1017 __gen_field(values->DepthClearValue, 0, 31) |
1018 0;
1019
1020 dw[2] =
1021 __gen_field(values->DepthClearValueValid, 0, 0) |
1022 0;
1023
1024 }
1025
1026 #define GEN7_3DSTATE_CLIP_length_bias 0x00000002
1027 #define GEN7_3DSTATE_CLIP_header \
1028 .CommandType = 3, \
1029 .CommandSubType = 3, \
1030 ._3DCommandOpcode = 0, \
1031 ._3DCommandSubOpcode = 18, \
1032 .DwordLength = 2
1033
1034 #define GEN7_3DSTATE_CLIP_length 0x00000004
1035
1036 struct GEN7_3DSTATE_CLIP {
1037 uint32_t CommandType;
1038 uint32_t CommandSubType;
1039 uint32_t _3DCommandOpcode;
1040 uint32_t _3DCommandSubOpcode;
1041 uint32_t DwordLength;
1042 uint32_t FrontWinding;
1043 uint32_t VertexSubPixelPrecisionSelect;
1044 bool EarlyCullEnable;
1045 #define CULLMODE_BOTH 0
1046 #define CULLMODE_NONE 1
1047 #define CULLMODE_FRONT 2
1048 #define CULLMODE_BACK 3
1049 uint32_t CullMode;
1050 bool ClipperStatisticsEnable;
1051 uint32_t UserClipDistanceCullTestEnableBitmask;
1052 bool ClipEnable;
1053 #define APIMODE_OGL 0
1054 uint32_t APIMode;
1055 bool ViewportXYClipTestEnable;
1056 bool ViewportZClipTestEnable;
1057 bool GuardbandClipTestEnable;
1058 uint32_t UserClipDistanceClipTestEnableBitmask;
1059 #define CLIPMODE_NORMAL 0
1060 #define CLIPMODE_REJECT_ALL 3
1061 #define CLIPMODE_ACCEPT_ALL 4
1062 uint32_t ClipMode;
1063 bool PerspectiveDivideDisable;
1064 bool NonPerspectiveBarycentricEnable;
1065 #define Vertex0 0
1066 #define Vertex1 1
1067 #define Vertex2 2
1068 uint32_t TriangleStripListProvokingVertexSelect;
1069 #define Vertex0 0
1070 #define Vertex1 1
1071 uint32_t LineStripListProvokingVertexSelect;
1072 #define Vertex0 0
1073 #define Vertex1 1
1074 #define Vertex2 2
1075 uint32_t TriangleFanProvokingVertexSelect;
1076 float MinimumPointWidth;
1077 float MaximumPointWidth;
1078 bool ForceZeroRTAIndexEnable;
1079 uint32_t MaximumVPIndex;
1080 };
1081
1082 static inline void
1083 GEN7_3DSTATE_CLIP_pack(__gen_user_data *data, void * restrict dst,
1084 const struct GEN7_3DSTATE_CLIP * restrict values)
1085 {
1086 uint32_t *dw = (uint32_t * restrict) dst;
1087
1088 dw[0] =
1089 __gen_field(values->CommandType, 29, 31) |
1090 __gen_field(values->CommandSubType, 27, 28) |
1091 __gen_field(values->_3DCommandOpcode, 24, 26) |
1092 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1093 __gen_field(values->DwordLength, 0, 7) |
1094 0;
1095
1096 dw[1] =
1097 __gen_field(values->FrontWinding, 20, 20) |
1098 __gen_field(values->VertexSubPixelPrecisionSelect, 19, 19) |
1099 __gen_field(values->EarlyCullEnable, 18, 18) |
1100 __gen_field(values->CullMode, 16, 17) |
1101 __gen_field(values->ClipperStatisticsEnable, 10, 10) |
1102 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
1103 0;
1104
1105 dw[2] =
1106 __gen_field(values->ClipEnable, 31, 31) |
1107 __gen_field(values->APIMode, 30, 30) |
1108 __gen_field(values->ViewportXYClipTestEnable, 28, 28) |
1109 __gen_field(values->ViewportZClipTestEnable, 27, 27) |
1110 __gen_field(values->GuardbandClipTestEnable, 26, 26) |
1111 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 16, 23) |
1112 __gen_field(values->ClipMode, 13, 15) |
1113 __gen_field(values->PerspectiveDivideDisable, 9, 9) |
1114 __gen_field(values->NonPerspectiveBarycentricEnable, 8, 8) |
1115 __gen_field(values->TriangleStripListProvokingVertexSelect, 4, 5) |
1116 __gen_field(values->LineStripListProvokingVertexSelect, 2, 3) |
1117 __gen_field(values->TriangleFanProvokingVertexSelect, 0, 1) |
1118 0;
1119
1120 dw[3] =
1121 __gen_field(values->MinimumPointWidth * (1 << 3), 17, 27) |
1122 __gen_field(values->MaximumPointWidth * (1 << 3), 6, 16) |
1123 __gen_field(values->ForceZeroRTAIndexEnable, 5, 5) |
1124 __gen_field(values->MaximumVPIndex, 0, 3) |
1125 0;
1126
1127 }
1128
1129 #define GEN7_3DSTATE_CONSTANT_DS_length_bias 0x00000002
1130 #define GEN7_3DSTATE_CONSTANT_DS_header \
1131 .CommandType = 3, \
1132 .CommandSubType = 3, \
1133 ._3DCommandOpcode = 0, \
1134 ._3DCommandSubOpcode = 26, \
1135 .DwordLength = 5
1136
1137 #define GEN7_3DSTATE_CONSTANT_DS_length 0x00000007
1138
1139 #define GEN7_3DSTATE_CONSTANT_BODY_length 0x00000006
1140
1141 struct GEN7_3DSTATE_CONSTANT_BODY {
1142 uint32_t ConstantBuffer1ReadLength;
1143 uint32_t ConstantBuffer0ReadLength;
1144 uint32_t ConstantBuffer3ReadLength;
1145 uint32_t ConstantBuffer2ReadLength;
1146 __gen_address_type PointerToConstantBuffer0;
1147 struct GEN7_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
1148 __gen_address_type PointerToConstantBuffer1;
1149 __gen_address_type PointerToConstantBuffer2;
1150 __gen_address_type PointerToConstantBuffer3;
1151 };
1152
1153 static inline void
1154 GEN7_3DSTATE_CONSTANT_BODY_pack(__gen_user_data *data, void * restrict dst,
1155 const struct GEN7_3DSTATE_CONSTANT_BODY * restrict values)
1156 {
1157 uint32_t *dw = (uint32_t * restrict) dst;
1158
1159 dw[0] =
1160 __gen_field(values->ConstantBuffer1ReadLength, 16, 31) |
1161 __gen_field(values->ConstantBuffer0ReadLength, 0, 15) |
1162 0;
1163
1164 dw[1] =
1165 __gen_field(values->ConstantBuffer3ReadLength, 16, 31) |
1166 __gen_field(values->ConstantBuffer2ReadLength, 0, 15) |
1167 0;
1168
1169 uint32_t dw_ConstantBufferObjectControlState;
1170 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
1171 uint32_t dw2 =
1172 __gen_field(dw_ConstantBufferObjectControlState, 0, 4) |
1173 0;
1174
1175 dw[2] =
1176 __gen_combine_address(data, &dw[2], values->PointerToConstantBuffer0, dw2);
1177
1178 uint32_t dw3 =
1179 0;
1180
1181 dw[3] =
1182 __gen_combine_address(data, &dw[3], values->PointerToConstantBuffer1, dw3);
1183
1184 uint32_t dw4 =
1185 0;
1186
1187 dw[4] =
1188 __gen_combine_address(data, &dw[4], values->PointerToConstantBuffer2, dw4);
1189
1190 uint32_t dw5 =
1191 0;
1192
1193 dw[5] =
1194 __gen_combine_address(data, &dw[5], values->PointerToConstantBuffer3, dw5);
1195
1196 }
1197
1198 struct GEN7_3DSTATE_CONSTANT_DS {
1199 uint32_t CommandType;
1200 uint32_t CommandSubType;
1201 uint32_t _3DCommandOpcode;
1202 uint32_t _3DCommandSubOpcode;
1203 uint32_t DwordLength;
1204 struct GEN7_3DSTATE_CONSTANT_BODY ConstantBody;
1205 };
1206
1207 static inline void
1208 GEN7_3DSTATE_CONSTANT_DS_pack(__gen_user_data *data, void * restrict dst,
1209 const struct GEN7_3DSTATE_CONSTANT_DS * restrict values)
1210 {
1211 uint32_t *dw = (uint32_t * restrict) dst;
1212
1213 dw[0] =
1214 __gen_field(values->CommandType, 29, 31) |
1215 __gen_field(values->CommandSubType, 27, 28) |
1216 __gen_field(values->_3DCommandOpcode, 24, 26) |
1217 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1218 __gen_field(values->DwordLength, 0, 7) |
1219 0;
1220
1221 GEN7_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1222 }
1223
1224 #define GEN7_3DSTATE_CONSTANT_GS_length_bias 0x00000002
1225 #define GEN7_3DSTATE_CONSTANT_GS_header \
1226 .CommandType = 3, \
1227 .CommandSubType = 3, \
1228 ._3DCommandOpcode = 0, \
1229 ._3DCommandSubOpcode = 22, \
1230 .DwordLength = 5
1231
1232 #define GEN7_3DSTATE_CONSTANT_GS_length 0x00000007
1233
1234 struct GEN7_3DSTATE_CONSTANT_GS {
1235 uint32_t CommandType;
1236 uint32_t CommandSubType;
1237 uint32_t _3DCommandOpcode;
1238 uint32_t _3DCommandSubOpcode;
1239 uint32_t DwordLength;
1240 struct GEN7_3DSTATE_CONSTANT_BODY ConstantBody;
1241 };
1242
1243 static inline void
1244 GEN7_3DSTATE_CONSTANT_GS_pack(__gen_user_data *data, void * restrict dst,
1245 const struct GEN7_3DSTATE_CONSTANT_GS * restrict values)
1246 {
1247 uint32_t *dw = (uint32_t * restrict) dst;
1248
1249 dw[0] =
1250 __gen_field(values->CommandType, 29, 31) |
1251 __gen_field(values->CommandSubType, 27, 28) |
1252 __gen_field(values->_3DCommandOpcode, 24, 26) |
1253 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1254 __gen_field(values->DwordLength, 0, 7) |
1255 0;
1256
1257 GEN7_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1258 }
1259
1260 #define GEN7_3DSTATE_CONSTANT_HS_length_bias 0x00000002
1261 #define GEN7_3DSTATE_CONSTANT_HS_header \
1262 .CommandType = 3, \
1263 .CommandSubType = 3, \
1264 ._3DCommandOpcode = 0, \
1265 ._3DCommandSubOpcode = 25, \
1266 .DwordLength = 5
1267
1268 #define GEN7_3DSTATE_CONSTANT_HS_length 0x00000007
1269
1270 struct GEN7_3DSTATE_CONSTANT_HS {
1271 uint32_t CommandType;
1272 uint32_t CommandSubType;
1273 uint32_t _3DCommandOpcode;
1274 uint32_t _3DCommandSubOpcode;
1275 uint32_t DwordLength;
1276 struct GEN7_3DSTATE_CONSTANT_BODY ConstantBody;
1277 };
1278
1279 static inline void
1280 GEN7_3DSTATE_CONSTANT_HS_pack(__gen_user_data *data, void * restrict dst,
1281 const struct GEN7_3DSTATE_CONSTANT_HS * restrict values)
1282 {
1283 uint32_t *dw = (uint32_t * restrict) dst;
1284
1285 dw[0] =
1286 __gen_field(values->CommandType, 29, 31) |
1287 __gen_field(values->CommandSubType, 27, 28) |
1288 __gen_field(values->_3DCommandOpcode, 24, 26) |
1289 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1290 __gen_field(values->DwordLength, 0, 7) |
1291 0;
1292
1293 GEN7_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1294 }
1295
1296 #define GEN7_3DSTATE_CONSTANT_PS_length_bias 0x00000002
1297 #define GEN7_3DSTATE_CONSTANT_PS_header \
1298 .CommandType = 3, \
1299 .CommandSubType = 3, \
1300 ._3DCommandOpcode = 0, \
1301 ._3DCommandSubOpcode = 23, \
1302 .DwordLength = 5
1303
1304 #define GEN7_3DSTATE_CONSTANT_PS_length 0x00000007
1305
1306 struct GEN7_3DSTATE_CONSTANT_PS {
1307 uint32_t CommandType;
1308 uint32_t CommandSubType;
1309 uint32_t _3DCommandOpcode;
1310 uint32_t _3DCommandSubOpcode;
1311 uint32_t DwordLength;
1312 struct GEN7_3DSTATE_CONSTANT_BODY ConstantBody;
1313 };
1314
1315 static inline void
1316 GEN7_3DSTATE_CONSTANT_PS_pack(__gen_user_data *data, void * restrict dst,
1317 const struct GEN7_3DSTATE_CONSTANT_PS * restrict values)
1318 {
1319 uint32_t *dw = (uint32_t * restrict) dst;
1320
1321 dw[0] =
1322 __gen_field(values->CommandType, 29, 31) |
1323 __gen_field(values->CommandSubType, 27, 28) |
1324 __gen_field(values->_3DCommandOpcode, 24, 26) |
1325 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1326 __gen_field(values->DwordLength, 0, 7) |
1327 0;
1328
1329 GEN7_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1330 }
1331
1332 #define GEN7_3DSTATE_CONSTANT_VS_length_bias 0x00000002
1333 #define GEN7_3DSTATE_CONSTANT_VS_header \
1334 .CommandType = 3, \
1335 .CommandSubType = 3, \
1336 ._3DCommandOpcode = 0, \
1337 ._3DCommandSubOpcode = 21, \
1338 .DwordLength = 5
1339
1340 #define GEN7_3DSTATE_CONSTANT_VS_length 0x00000007
1341
1342 struct GEN7_3DSTATE_CONSTANT_VS {
1343 uint32_t CommandType;
1344 uint32_t CommandSubType;
1345 uint32_t _3DCommandOpcode;
1346 uint32_t _3DCommandSubOpcode;
1347 uint32_t DwordLength;
1348 struct GEN7_3DSTATE_CONSTANT_BODY ConstantBody;
1349 };
1350
1351 static inline void
1352 GEN7_3DSTATE_CONSTANT_VS_pack(__gen_user_data *data, void * restrict dst,
1353 const struct GEN7_3DSTATE_CONSTANT_VS * restrict values)
1354 {
1355 uint32_t *dw = (uint32_t * restrict) dst;
1356
1357 dw[0] =
1358 __gen_field(values->CommandType, 29, 31) |
1359 __gen_field(values->CommandSubType, 27, 28) |
1360 __gen_field(values->_3DCommandOpcode, 24, 26) |
1361 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1362 __gen_field(values->DwordLength, 0, 7) |
1363 0;
1364
1365 GEN7_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1366 }
1367
1368 #define GEN7_3DSTATE_DEPTH_BUFFER_length_bias 0x00000002
1369 #define GEN7_3DSTATE_DEPTH_BUFFER_header \
1370 .CommandType = 3, \
1371 .CommandSubType = 3, \
1372 ._3DCommandOpcode = 0, \
1373 ._3DCommandSubOpcode = 5, \
1374 .DwordLength = 5
1375
1376 #define GEN7_3DSTATE_DEPTH_BUFFER_length 0x00000007
1377
1378 struct GEN7_3DSTATE_DEPTH_BUFFER {
1379 uint32_t CommandType;
1380 uint32_t CommandSubType;
1381 uint32_t _3DCommandOpcode;
1382 uint32_t _3DCommandSubOpcode;
1383 uint32_t DwordLength;
1384 #define SURFTYPE_1D 0
1385 #define SURFTYPE_2D 1
1386 #define SURFTYPE_3D 2
1387 #define SURFTYPE_CUBE 3
1388 #define SURFTYPE_NULL 7
1389 uint32_t SurfaceType;
1390 bool DepthWriteEnable;
1391 bool StencilWriteEnable;
1392 bool HierarchicalDepthBufferEnable;
1393 #define D32_FLOAT 1
1394 #define D24_UNORM_X8_UINT 3
1395 #define D16_UNORM 5
1396 uint32_t SurfaceFormat;
1397 uint32_t SurfacePitch;
1398 __gen_address_type SurfaceBaseAddress;
1399 uint32_t Height;
1400 uint32_t Width;
1401 uint32_t LOD;
1402 #define SURFTYPE_CUBEmustbezero 0
1403 uint32_t Depth;
1404 uint32_t MinimumArrayElement;
1405 struct GEN7_MEMORY_OBJECT_CONTROL_STATE DepthBufferObjectControlState;
1406 uint32_t DepthCoordinateOffsetY;
1407 uint32_t DepthCoordinateOffsetX;
1408 uint32_t RenderTargetViewExtent;
1409 };
1410
1411 static inline void
1412 GEN7_3DSTATE_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
1413 const struct GEN7_3DSTATE_DEPTH_BUFFER * restrict values)
1414 {
1415 uint32_t *dw = (uint32_t * restrict) dst;
1416
1417 dw[0] =
1418 __gen_field(values->CommandType, 29, 31) |
1419 __gen_field(values->CommandSubType, 27, 28) |
1420 __gen_field(values->_3DCommandOpcode, 24, 26) |
1421 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1422 __gen_field(values->DwordLength, 0, 7) |
1423 0;
1424
1425 dw[1] =
1426 __gen_field(values->SurfaceType, 29, 31) |
1427 __gen_field(values->DepthWriteEnable, 28, 28) |
1428 __gen_field(values->StencilWriteEnable, 27, 27) |
1429 __gen_field(values->HierarchicalDepthBufferEnable, 22, 22) |
1430 __gen_field(values->SurfaceFormat, 18, 20) |
1431 __gen_field(values->SurfacePitch, 0, 17) |
1432 0;
1433
1434 uint32_t dw2 =
1435 0;
1436
1437 dw[2] =
1438 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
1439
1440 dw[3] =
1441 __gen_field(values->Height, 18, 31) |
1442 __gen_field(values->Width, 4, 17) |
1443 __gen_field(values->LOD, 0, 3) |
1444 0;
1445
1446 uint32_t dw_DepthBufferObjectControlState;
1447 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DepthBufferObjectControlState, &values->DepthBufferObjectControlState);
1448 dw[4] =
1449 __gen_field(values->Depth, 21, 31) |
1450 __gen_field(values->MinimumArrayElement, 10, 20) |
1451 __gen_field(dw_DepthBufferObjectControlState, 0, 3) |
1452 0;
1453
1454 dw[5] =
1455 __gen_field(values->DepthCoordinateOffsetY, 16, 31) |
1456 __gen_field(values->DepthCoordinateOffsetX, 0, 15) |
1457 0;
1458
1459 dw[6] =
1460 __gen_field(values->RenderTargetViewExtent, 21, 31) |
1461 0;
1462
1463 }
1464
1465 #define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_length_bias 0x00000002
1466 #define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_header\
1467 .CommandType = 3, \
1468 .CommandSubType = 3, \
1469 ._3DCommandOpcode = 0, \
1470 ._3DCommandSubOpcode = 37, \
1471 .DwordLength = 0
1472
1473 #define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_length 0x00000002
1474
1475 struct GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS {
1476 uint32_t CommandType;
1477 uint32_t CommandSubType;
1478 uint32_t _3DCommandOpcode;
1479 uint32_t _3DCommandSubOpcode;
1480 uint32_t DwordLength;
1481 uint32_t PointertoDEPTH_STENCIL_STATE;
1482 };
1483
1484 static inline void
1485 GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
1486 const struct GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS * restrict values)
1487 {
1488 uint32_t *dw = (uint32_t * restrict) dst;
1489
1490 dw[0] =
1491 __gen_field(values->CommandType, 29, 31) |
1492 __gen_field(values->CommandSubType, 27, 28) |
1493 __gen_field(values->_3DCommandOpcode, 24, 26) |
1494 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1495 __gen_field(values->DwordLength, 0, 7) |
1496 0;
1497
1498 dw[1] =
1499 __gen_offset(values->PointertoDEPTH_STENCIL_STATE, 6, 31) |
1500 __gen_mbo(0, 0) |
1501 0;
1502
1503 }
1504
1505 #define GEN7_3DSTATE_DRAWING_RECTANGLE_length_bias 0x00000002
1506 #define GEN7_3DSTATE_DRAWING_RECTANGLE_header \
1507 .CommandType = 3, \
1508 .CommandSubType = 3, \
1509 ._3DCommandOpcode = 1, \
1510 ._3DCommandSubOpcode = 0, \
1511 .DwordLength = 2
1512
1513 #define GEN7_3DSTATE_DRAWING_RECTANGLE_length 0x00000004
1514
1515 struct GEN7_3DSTATE_DRAWING_RECTANGLE {
1516 uint32_t CommandType;
1517 uint32_t CommandSubType;
1518 uint32_t _3DCommandOpcode;
1519 uint32_t _3DCommandSubOpcode;
1520 uint32_t DwordLength;
1521 uint32_t ClippedDrawingRectangleYMin;
1522 uint32_t ClippedDrawingRectangleXMin;
1523 uint32_t ClippedDrawingRectangleYMax;
1524 uint32_t ClippedDrawingRectangleXMax;
1525 uint32_t DrawingRectangleOriginY;
1526 uint32_t DrawingRectangleOriginX;
1527 };
1528
1529 static inline void
1530 GEN7_3DSTATE_DRAWING_RECTANGLE_pack(__gen_user_data *data, void * restrict dst,
1531 const struct GEN7_3DSTATE_DRAWING_RECTANGLE * restrict values)
1532 {
1533 uint32_t *dw = (uint32_t * restrict) dst;
1534
1535 dw[0] =
1536 __gen_field(values->CommandType, 29, 31) |
1537 __gen_field(values->CommandSubType, 27, 28) |
1538 __gen_field(values->_3DCommandOpcode, 24, 26) |
1539 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1540 __gen_field(values->DwordLength, 0, 7) |
1541 0;
1542
1543 dw[1] =
1544 __gen_field(values->ClippedDrawingRectangleYMin, 16, 31) |
1545 __gen_field(values->ClippedDrawingRectangleXMin, 0, 15) |
1546 0;
1547
1548 dw[2] =
1549 __gen_field(values->ClippedDrawingRectangleYMax, 16, 31) |
1550 __gen_field(values->ClippedDrawingRectangleXMax, 0, 15) |
1551 0;
1552
1553 dw[3] =
1554 __gen_field(values->DrawingRectangleOriginY, 16, 31) |
1555 __gen_field(values->DrawingRectangleOriginX, 0, 15) |
1556 0;
1557
1558 }
1559
1560 #define GEN7_3DSTATE_DS_length_bias 0x00000002
1561 #define GEN7_3DSTATE_DS_header \
1562 .CommandType = 3, \
1563 .CommandSubType = 3, \
1564 ._3DCommandOpcode = 0, \
1565 ._3DCommandSubOpcode = 29, \
1566 .DwordLength = 4
1567
1568 #define GEN7_3DSTATE_DS_length 0x00000006
1569
1570 struct GEN7_3DSTATE_DS {
1571 uint32_t CommandType;
1572 uint32_t CommandSubType;
1573 uint32_t _3DCommandOpcode;
1574 uint32_t _3DCommandSubOpcode;
1575 uint32_t DwordLength;
1576 uint32_t KernelStartPointer;
1577 #define Multiple 0
1578 #define Single 1
1579 uint32_t SingleDomainPointDispatch;
1580 #define Dmask 0
1581 #define Vmask 1
1582 uint32_t VectorMaskEnable;
1583 #define NoSamplers 0
1584 #define _14Samplers 1
1585 #define _58Samplers 2
1586 #define _912Samplers 3
1587 #define _1316Samplers 4
1588 uint32_t SamplerCount;
1589 uint32_t BindingTableEntryCount;
1590 #define IEEE754 0
1591 #define Alternate 1
1592 uint32_t FloatingPointMode;
1593 bool IllegalOpcodeExceptionEnable;
1594 bool SoftwareExceptionEnable;
1595 uint32_t ScratchSpaceBasePointer;
1596 uint32_t PerThreadScratchSpace;
1597 uint32_t DispatchGRFStartRegisterForURBData;
1598 uint32_t PatchURBEntryReadLength;
1599 uint32_t PatchURBEntryReadOffset;
1600 uint32_t MaximumNumberofThreads;
1601 bool StatisticsEnable;
1602 bool ComputeWCoordinateEnable;
1603 bool DSCacheDisable;
1604 bool DSFunctionEnable;
1605 };
1606
1607 static inline void
1608 GEN7_3DSTATE_DS_pack(__gen_user_data *data, void * restrict dst,
1609 const struct GEN7_3DSTATE_DS * restrict values)
1610 {
1611 uint32_t *dw = (uint32_t * restrict) dst;
1612
1613 dw[0] =
1614 __gen_field(values->CommandType, 29, 31) |
1615 __gen_field(values->CommandSubType, 27, 28) |
1616 __gen_field(values->_3DCommandOpcode, 24, 26) |
1617 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1618 __gen_field(values->DwordLength, 0, 7) |
1619 0;
1620
1621 dw[1] =
1622 __gen_offset(values->KernelStartPointer, 6, 31) |
1623 0;
1624
1625 dw[2] =
1626 __gen_field(values->SingleDomainPointDispatch, 31, 31) |
1627 __gen_field(values->VectorMaskEnable, 30, 30) |
1628 __gen_field(values->SamplerCount, 27, 29) |
1629 __gen_field(values->BindingTableEntryCount, 18, 25) |
1630 __gen_field(values->FloatingPointMode, 16, 16) |
1631 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
1632 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
1633 0;
1634
1635 dw[3] =
1636 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
1637 __gen_field(values->PerThreadScratchSpace, 0, 3) |
1638 0;
1639
1640 dw[4] =
1641 __gen_field(values->DispatchGRFStartRegisterForURBData, 20, 24) |
1642 __gen_field(values->PatchURBEntryReadLength, 11, 17) |
1643 __gen_field(values->PatchURBEntryReadOffset, 4, 9) |
1644 0;
1645
1646 dw[5] =
1647 __gen_field(values->MaximumNumberofThreads, 25, 31) |
1648 __gen_field(values->StatisticsEnable, 10, 10) |
1649 __gen_field(values->ComputeWCoordinateEnable, 2, 2) |
1650 __gen_field(values->DSCacheDisable, 1, 1) |
1651 __gen_field(values->DSFunctionEnable, 0, 0) |
1652 0;
1653
1654 }
1655
1656 #define GEN7_3DSTATE_GS_length_bias 0x00000002
1657 #define GEN7_3DSTATE_GS_header \
1658 .CommandType = 3, \
1659 .CommandSubType = 3, \
1660 ._3DCommandOpcode = 0, \
1661 ._3DCommandSubOpcode = 17, \
1662 .DwordLength = 5
1663
1664 #define GEN7_3DSTATE_GS_length 0x00000007
1665
1666 struct GEN7_3DSTATE_GS {
1667 uint32_t CommandType;
1668 uint32_t CommandSubType;
1669 uint32_t _3DCommandOpcode;
1670 uint32_t _3DCommandSubOpcode;
1671 uint32_t DwordLength;
1672 uint32_t KernelStartPointer;
1673 uint32_t SingleProgramFlowSPF;
1674 #define Dmask 0
1675 #define Vmask 1
1676 uint32_t VectorMaskEnableVME;
1677 #define NoSamplers 0
1678 #define _14Samplers 1
1679 #define _58Samplers 2
1680 #define _912Samplers 3
1681 #define _1316Samplers 4
1682 uint32_t SamplerCount;
1683 uint32_t BindingTableEntryCount;
1684 #define NormalPriority 0
1685 #define HighPriority 1
1686 uint32_t ThreadPriority;
1687 #define IEEE754 0
1688 #define alternate 1
1689 uint32_t FloatingPointMode;
1690 bool IllegalOpcodeExceptionEnable;
1691 bool MaskStackExceptionEnable;
1692 bool SoftwareExceptionEnable;
1693 uint32_t ScratchSpaceBasePointer;
1694 uint32_t PerThreadScratchSpace;
1695 uint32_t OutputVertexSize;
1696 uint32_t OutputTopology;
1697 uint32_t VertexURBEntryReadLength;
1698 bool IncludeVertexHandles;
1699 uint32_t VertexURBEntryReadOffset;
1700 uint32_t DispatchGRFStartRegisterforURBData;
1701 uint32_t MaximumNumberofThreads;
1702 #define GSCTL_CUT 0
1703 #define GSCTL_SID 1
1704 uint32_t ControlDataFormat;
1705 uint32_t ControlDataHeaderSize;
1706 uint32_t InstanceControl;
1707 uint32_t DefaultStreamID;
1708 #define SINGLE 0
1709 #define DUAL_INSTANCE 1
1710 #define DUAL_OBJECT 2
1711 uint32_t DispatchMode;
1712 uint32_t GSStatisticsEnable;
1713 uint32_t GSInvocationsIncrementValue;
1714 bool IncludePrimitiveID;
1715 uint32_t Hint;
1716 bool ReorderEnable;
1717 bool DiscardAdjacency;
1718 bool GSEnable;
1719 uint32_t SemaphoreHandle;
1720 };
1721
1722 static inline void
1723 GEN7_3DSTATE_GS_pack(__gen_user_data *data, void * restrict dst,
1724 const struct GEN7_3DSTATE_GS * restrict values)
1725 {
1726 uint32_t *dw = (uint32_t * restrict) dst;
1727
1728 dw[0] =
1729 __gen_field(values->CommandType, 29, 31) |
1730 __gen_field(values->CommandSubType, 27, 28) |
1731 __gen_field(values->_3DCommandOpcode, 24, 26) |
1732 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1733 __gen_field(values->DwordLength, 0, 7) |
1734 0;
1735
1736 dw[1] =
1737 __gen_offset(values->KernelStartPointer, 6, 31) |
1738 0;
1739
1740 dw[2] =
1741 __gen_field(values->SingleProgramFlowSPF, 31, 31) |
1742 __gen_field(values->VectorMaskEnableVME, 30, 30) |
1743 __gen_field(values->SamplerCount, 27, 29) |
1744 __gen_field(values->BindingTableEntryCount, 18, 25) |
1745 __gen_field(values->ThreadPriority, 17, 17) |
1746 __gen_field(values->FloatingPointMode, 16, 16) |
1747 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
1748 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
1749 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
1750 0;
1751
1752 dw[3] =
1753 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
1754 __gen_field(values->PerThreadScratchSpace, 0, 3) |
1755 0;
1756
1757 dw[4] =
1758 __gen_field(values->OutputVertexSize, 23, 28) |
1759 __gen_field(values->OutputTopology, 17, 22) |
1760 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
1761 __gen_field(values->IncludeVertexHandles, 10, 10) |
1762 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
1763 __gen_field(values->DispatchGRFStartRegisterforURBData, 0, 3) |
1764 0;
1765
1766 dw[5] =
1767 __gen_field(values->MaximumNumberofThreads, 25, 31) |
1768 __gen_field(values->ControlDataFormat, 24, 24) |
1769 __gen_field(values->ControlDataHeaderSize, 20, 23) |
1770 __gen_field(values->InstanceControl, 15, 19) |
1771 __gen_field(values->DefaultStreamID, 13, 14) |
1772 __gen_field(values->DispatchMode, 11, 12) |
1773 __gen_field(values->GSStatisticsEnable, 10, 10) |
1774 __gen_field(values->GSInvocationsIncrementValue, 5, 9) |
1775 __gen_field(values->IncludePrimitiveID, 4, 4) |
1776 __gen_field(values->Hint, 3, 3) |
1777 __gen_field(values->ReorderEnable, 2, 2) |
1778 __gen_field(values->DiscardAdjacency, 1, 1) |
1779 __gen_field(values->GSEnable, 0, 0) |
1780 0;
1781
1782 dw[6] =
1783 __gen_offset(values->SemaphoreHandle, 0, 11) |
1784 0;
1785
1786 }
1787
1788 #define GEN7_3DSTATE_HIER_DEPTH_BUFFER_length_bias 0x00000002
1789 #define GEN7_3DSTATE_HIER_DEPTH_BUFFER_header \
1790 .CommandType = 3, \
1791 .CommandSubType = 3, \
1792 ._3DCommandOpcode = 0, \
1793 ._3DCommandSubOpcode = 7, \
1794 .DwordLength = 1
1795
1796 #define GEN7_3DSTATE_HIER_DEPTH_BUFFER_length 0x00000003
1797
1798 struct GEN7_3DSTATE_HIER_DEPTH_BUFFER {
1799 uint32_t CommandType;
1800 uint32_t CommandSubType;
1801 uint32_t _3DCommandOpcode;
1802 uint32_t _3DCommandSubOpcode;
1803 uint32_t DwordLength;
1804 struct GEN7_MEMORY_OBJECT_CONTROL_STATE HierarchicalDepthBufferObjectControlState;
1805 uint32_t SurfacePitch;
1806 __gen_address_type SurfaceBaseAddress;
1807 };
1808
1809 static inline void
1810 GEN7_3DSTATE_HIER_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
1811 const struct GEN7_3DSTATE_HIER_DEPTH_BUFFER * restrict values)
1812 {
1813 uint32_t *dw = (uint32_t * restrict) dst;
1814
1815 dw[0] =
1816 __gen_field(values->CommandType, 29, 31) |
1817 __gen_field(values->CommandSubType, 27, 28) |
1818 __gen_field(values->_3DCommandOpcode, 24, 26) |
1819 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1820 __gen_field(values->DwordLength, 0, 7) |
1821 0;
1822
1823 uint32_t dw_HierarchicalDepthBufferObjectControlState;
1824 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_HierarchicalDepthBufferObjectControlState, &values->HierarchicalDepthBufferObjectControlState);
1825 dw[1] =
1826 __gen_field(dw_HierarchicalDepthBufferObjectControlState, 25, 28) |
1827 __gen_field(values->SurfacePitch, 0, 16) |
1828 0;
1829
1830 uint32_t dw2 =
1831 0;
1832
1833 dw[2] =
1834 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
1835
1836 }
1837
1838 #define GEN7_3DSTATE_HS_length_bias 0x00000002
1839 #define GEN7_3DSTATE_HS_header \
1840 .CommandType = 3, \
1841 .CommandSubType = 3, \
1842 ._3DCommandOpcode = 0, \
1843 ._3DCommandSubOpcode = 27, \
1844 .DwordLength = 5
1845
1846 #define GEN7_3DSTATE_HS_length 0x00000007
1847
1848 struct GEN7_3DSTATE_HS {
1849 uint32_t CommandType;
1850 uint32_t CommandSubType;
1851 uint32_t _3DCommandOpcode;
1852 uint32_t _3DCommandSubOpcode;
1853 uint32_t DwordLength;
1854 #define NoSamplers 0
1855 #define _14Samplers 1
1856 #define _58Samplers 2
1857 #define _912Samplers 3
1858 #define _1316Samplers 4
1859 uint32_t SamplerCount;
1860 uint32_t BindingTableEntryCount;
1861 #define IEEE754 0
1862 #define alternate 1
1863 uint32_t FloatingPointMode;
1864 bool IllegalOpcodeExceptionEnable;
1865 bool SoftwareExceptionEnable;
1866 uint32_t MaximumNumberofThreads;
1867 bool Enable;
1868 bool StatisticsEnable;
1869 uint32_t InstanceCount;
1870 uint32_t KernelStartPointer;
1871 uint32_t ScratchSpaceBasePointer;
1872 uint32_t PerThreadScratchSpace;
1873 uint32_t SingleProgramFlow;
1874 #define Dmask 0
1875 #define Vmask 1
1876 uint32_t VectorMaskEnable;
1877 bool IncludeVertexHandles;
1878 uint32_t DispatchGRFStartRegisterForURBData;
1879 uint32_t VertexURBEntryReadLength;
1880 uint32_t VertexURBEntryReadOffset;
1881 uint32_t SemaphoreHandle;
1882 };
1883
1884 static inline void
1885 GEN7_3DSTATE_HS_pack(__gen_user_data *data, void * restrict dst,
1886 const struct GEN7_3DSTATE_HS * restrict values)
1887 {
1888 uint32_t *dw = (uint32_t * restrict) dst;
1889
1890 dw[0] =
1891 __gen_field(values->CommandType, 29, 31) |
1892 __gen_field(values->CommandSubType, 27, 28) |
1893 __gen_field(values->_3DCommandOpcode, 24, 26) |
1894 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1895 __gen_field(values->DwordLength, 0, 7) |
1896 0;
1897
1898 dw[1] =
1899 __gen_field(values->SamplerCount, 27, 29) |
1900 __gen_field(values->BindingTableEntryCount, 18, 25) |
1901 __gen_field(values->FloatingPointMode, 16, 16) |
1902 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
1903 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
1904 __gen_field(values->MaximumNumberofThreads, 0, 6) |
1905 0;
1906
1907 dw[2] =
1908 __gen_field(values->Enable, 31, 31) |
1909 __gen_field(values->StatisticsEnable, 29, 29) |
1910 __gen_field(values->InstanceCount, 0, 3) |
1911 0;
1912
1913 dw[3] =
1914 __gen_offset(values->KernelStartPointer, 6, 31) |
1915 0;
1916
1917 dw[4] =
1918 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
1919 __gen_field(values->PerThreadScratchSpace, 0, 3) |
1920 0;
1921
1922 dw[5] =
1923 __gen_field(values->SingleProgramFlow, 27, 27) |
1924 __gen_field(values->VectorMaskEnable, 26, 26) |
1925 __gen_field(values->IncludeVertexHandles, 24, 24) |
1926 __gen_field(values->DispatchGRFStartRegisterForURBData, 19, 23) |
1927 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
1928 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
1929 0;
1930
1931 dw[6] =
1932 __gen_offset(values->SemaphoreHandle, 0, 11) |
1933 0;
1934
1935 }
1936
1937 #define GEN7_3DSTATE_INDEX_BUFFER_length_bias 0x00000002
1938 #define GEN7_3DSTATE_INDEX_BUFFER_header \
1939 .CommandType = 3, \
1940 .CommandSubType = 3, \
1941 ._3DCommandOpcode = 0, \
1942 ._3DCommandSubOpcode = 10, \
1943 .DwordLength = 1
1944
1945 #define GEN7_3DSTATE_INDEX_BUFFER_length 0x00000003
1946
1947 struct GEN7_3DSTATE_INDEX_BUFFER {
1948 uint32_t CommandType;
1949 uint32_t CommandSubType;
1950 uint32_t _3DCommandOpcode;
1951 uint32_t _3DCommandSubOpcode;
1952 struct GEN7_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
1953 bool CutIndexEnable;
1954 #define INDEX_BYTE 0
1955 #define INDEX_WORD 1
1956 #define INDEX_DWORD 2
1957 uint32_t IndexFormat;
1958 uint32_t DwordLength;
1959 __gen_address_type BufferStartingAddress;
1960 __gen_address_type BufferEndingAddress;
1961 };
1962
1963 static inline void
1964 GEN7_3DSTATE_INDEX_BUFFER_pack(__gen_user_data *data, void * restrict dst,
1965 const struct GEN7_3DSTATE_INDEX_BUFFER * restrict values)
1966 {
1967 uint32_t *dw = (uint32_t * restrict) dst;
1968
1969 uint32_t dw_MemoryObjectControlState;
1970 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
1971 dw[0] =
1972 __gen_field(values->CommandType, 29, 31) |
1973 __gen_field(values->CommandSubType, 27, 28) |
1974 __gen_field(values->_3DCommandOpcode, 24, 26) |
1975 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1976 __gen_field(dw_MemoryObjectControlState, 12, 15) |
1977 __gen_field(values->CutIndexEnable, 10, 10) |
1978 __gen_field(values->IndexFormat, 8, 9) |
1979 __gen_field(values->DwordLength, 0, 7) |
1980 0;
1981
1982 uint32_t dw1 =
1983 0;
1984
1985 dw[1] =
1986 __gen_combine_address(data, &dw[1], values->BufferStartingAddress, dw1);
1987
1988 uint32_t dw2 =
1989 0;
1990
1991 dw[2] =
1992 __gen_combine_address(data, &dw[2], values->BufferEndingAddress, dw2);
1993
1994 }
1995
1996 #define GEN7_3DSTATE_LINE_STIPPLE_length_bias 0x00000002
1997 #define GEN7_3DSTATE_LINE_STIPPLE_header \
1998 .CommandType = 3, \
1999 .CommandSubType = 3, \
2000 ._3DCommandOpcode = 1, \
2001 ._3DCommandSubOpcode = 8, \
2002 .DwordLength = 1
2003
2004 #define GEN7_3DSTATE_LINE_STIPPLE_length 0x00000003
2005
2006 struct GEN7_3DSTATE_LINE_STIPPLE {
2007 uint32_t CommandType;
2008 uint32_t CommandSubType;
2009 uint32_t _3DCommandOpcode;
2010 uint32_t _3DCommandSubOpcode;
2011 uint32_t DwordLength;
2012 bool ModifyEnableCurrentRepeatCounterCurrentStippleIndex;
2013 uint32_t CurrentRepeatCounter;
2014 uint32_t CurrentStippleIndex;
2015 uint32_t LineStipplePattern;
2016 float LineStippleInverseRepeatCount;
2017 uint32_t LineStippleRepeatCount;
2018 };
2019
2020 static inline void
2021 GEN7_3DSTATE_LINE_STIPPLE_pack(__gen_user_data *data, void * restrict dst,
2022 const struct GEN7_3DSTATE_LINE_STIPPLE * restrict values)
2023 {
2024 uint32_t *dw = (uint32_t * restrict) dst;
2025
2026 dw[0] =
2027 __gen_field(values->CommandType, 29, 31) |
2028 __gen_field(values->CommandSubType, 27, 28) |
2029 __gen_field(values->_3DCommandOpcode, 24, 26) |
2030 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2031 __gen_field(values->DwordLength, 0, 7) |
2032 0;
2033
2034 dw[1] =
2035 __gen_field(values->ModifyEnableCurrentRepeatCounterCurrentStippleIndex, 31, 31) |
2036 __gen_field(values->CurrentRepeatCounter, 21, 29) |
2037 __gen_field(values->CurrentStippleIndex, 16, 19) |
2038 __gen_field(values->LineStipplePattern, 0, 15) |
2039 0;
2040
2041 dw[2] =
2042 __gen_field(values->LineStippleInverseRepeatCount * (1 << 16), 15, 31) |
2043 __gen_field(values->LineStippleRepeatCount, 0, 8) |
2044 0;
2045
2046 }
2047
2048 #define GEN7_3DSTATE_MONOFILTER_SIZE_length_bias 0x00000002
2049 #define GEN7_3DSTATE_MONOFILTER_SIZE_header \
2050 .CommandType = 3, \
2051 .CommandSubType = 3, \
2052 ._3DCommandOpcode = 1, \
2053 ._3DCommandSubOpcode = 17, \
2054 .DwordLength = 0
2055
2056 #define GEN7_3DSTATE_MONOFILTER_SIZE_length 0x00000002
2057
2058 struct GEN7_3DSTATE_MONOFILTER_SIZE {
2059 uint32_t CommandType;
2060 uint32_t CommandSubType;
2061 uint32_t _3DCommandOpcode;
2062 uint32_t _3DCommandSubOpcode;
2063 uint32_t DwordLength;
2064 uint32_t MonochromeFilterWidth;
2065 uint32_t MonochromeFilterHeight;
2066 };
2067
2068 static inline void
2069 GEN7_3DSTATE_MONOFILTER_SIZE_pack(__gen_user_data *data, void * restrict dst,
2070 const struct GEN7_3DSTATE_MONOFILTER_SIZE * restrict values)
2071 {
2072 uint32_t *dw = (uint32_t * restrict) dst;
2073
2074 dw[0] =
2075 __gen_field(values->CommandType, 29, 31) |
2076 __gen_field(values->CommandSubType, 27, 28) |
2077 __gen_field(values->_3DCommandOpcode, 24, 26) |
2078 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2079 __gen_field(values->DwordLength, 0, 7) |
2080 0;
2081
2082 dw[1] =
2083 __gen_field(values->MonochromeFilterWidth, 3, 5) |
2084 __gen_field(values->MonochromeFilterHeight, 0, 2) |
2085 0;
2086
2087 }
2088
2089 #define GEN7_3DSTATE_MULTISAMPLE_length_bias 0x00000002
2090 #define GEN7_3DSTATE_MULTISAMPLE_header \
2091 .CommandType = 3, \
2092 .CommandSubType = 3, \
2093 ._3DCommandOpcode = 1, \
2094 ._3DCommandSubOpcode = 13, \
2095 .DwordLength = 2
2096
2097 #define GEN7_3DSTATE_MULTISAMPLE_length 0x00000004
2098
2099 struct GEN7_3DSTATE_MULTISAMPLE {
2100 uint32_t CommandType;
2101 uint32_t CommandSubType;
2102 uint32_t _3DCommandOpcode;
2103 uint32_t _3DCommandSubOpcode;
2104 uint32_t DwordLength;
2105 #define PIXLOC_CENTER 0
2106 #define PIXLOC_UL_CORNER 1
2107 uint32_t PixelLocation;
2108 #define NUMSAMPLES_1 0
2109 #define NUMSAMPLES_4 2
2110 #define NUMSAMPLES_8 3
2111 uint32_t NumberofMultisamples;
2112 float Sample3XOffset;
2113 float Sample3YOffset;
2114 float Sample2XOffset;
2115 float Sample2YOffset;
2116 float Sample1XOffset;
2117 float Sample1YOffset;
2118 float Sample0XOffset;
2119 float Sample0YOffset;
2120 float Sample7XOffset;
2121 float Sample7YOffset;
2122 float Sample6XOffset;
2123 float Sample6YOffset;
2124 float Sample5XOffset;
2125 float Sample5YOffset;
2126 float Sample4XOffset;
2127 float Sample4YOffset;
2128 };
2129
2130 static inline void
2131 GEN7_3DSTATE_MULTISAMPLE_pack(__gen_user_data *data, void * restrict dst,
2132 const struct GEN7_3DSTATE_MULTISAMPLE * restrict values)
2133 {
2134 uint32_t *dw = (uint32_t * restrict) dst;
2135
2136 dw[0] =
2137 __gen_field(values->CommandType, 29, 31) |
2138 __gen_field(values->CommandSubType, 27, 28) |
2139 __gen_field(values->_3DCommandOpcode, 24, 26) |
2140 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2141 __gen_field(values->DwordLength, 0, 7) |
2142 0;
2143
2144 dw[1] =
2145 __gen_field(values->PixelLocation, 4, 4) |
2146 __gen_field(values->NumberofMultisamples, 1, 3) |
2147 0;
2148
2149 dw[2] =
2150 __gen_field(values->Sample3XOffset * (1 << 4), 28, 31) |
2151 __gen_field(values->Sample3YOffset * (1 << 4), 24, 27) |
2152 __gen_field(values->Sample2XOffset * (1 << 4), 20, 23) |
2153 __gen_field(values->Sample2YOffset * (1 << 4), 16, 19) |
2154 __gen_field(values->Sample1XOffset * (1 << 4), 12, 15) |
2155 __gen_field(values->Sample1YOffset * (1 << 4), 8, 11) |
2156 __gen_field(values->Sample0XOffset * (1 << 4), 4, 7) |
2157 __gen_field(values->Sample0YOffset * (1 << 4), 0, 3) |
2158 0;
2159
2160 dw[3] =
2161 __gen_field(values->Sample7XOffset * (1 << 4), 28, 31) |
2162 __gen_field(values->Sample7YOffset * (1 << 4), 24, 27) |
2163 __gen_field(values->Sample6XOffset * (1 << 4), 20, 23) |
2164 __gen_field(values->Sample6YOffset * (1 << 4), 16, 19) |
2165 __gen_field(values->Sample5XOffset * (1 << 4), 12, 15) |
2166 __gen_field(values->Sample5YOffset * (1 << 4), 8, 11) |
2167 __gen_field(values->Sample4XOffset * (1 << 4), 4, 7) |
2168 __gen_field(values->Sample4YOffset * (1 << 4), 0, 3) |
2169 0;
2170
2171 }
2172
2173 #define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_length_bias 0x00000002
2174 #define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_header \
2175 .CommandType = 3, \
2176 .CommandSubType = 3, \
2177 ._3DCommandOpcode = 1, \
2178 ._3DCommandSubOpcode = 6, \
2179 .DwordLength = 0
2180
2181 #define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_length 0x00000002
2182
2183 struct GEN7_3DSTATE_POLY_STIPPLE_OFFSET {
2184 uint32_t CommandType;
2185 uint32_t CommandSubType;
2186 uint32_t _3DCommandOpcode;
2187 uint32_t _3DCommandSubOpcode;
2188 uint32_t DwordLength;
2189 uint32_t PolygonStippleXOffset;
2190 uint32_t PolygonStippleYOffset;
2191 };
2192
2193 static inline void
2194 GEN7_3DSTATE_POLY_STIPPLE_OFFSET_pack(__gen_user_data *data, void * restrict dst,
2195 const struct GEN7_3DSTATE_POLY_STIPPLE_OFFSET * restrict values)
2196 {
2197 uint32_t *dw = (uint32_t * restrict) dst;
2198
2199 dw[0] =
2200 __gen_field(values->CommandType, 29, 31) |
2201 __gen_field(values->CommandSubType, 27, 28) |
2202 __gen_field(values->_3DCommandOpcode, 24, 26) |
2203 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2204 __gen_field(values->DwordLength, 0, 7) |
2205 0;
2206
2207 dw[1] =
2208 __gen_field(values->PolygonStippleXOffset, 8, 12) |
2209 __gen_field(values->PolygonStippleYOffset, 0, 4) |
2210 0;
2211
2212 }
2213
2214 #define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_length_bias 0x00000002
2215 #define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_header\
2216 .CommandType = 3, \
2217 .CommandSubType = 3, \
2218 ._3DCommandOpcode = 1, \
2219 ._3DCommandSubOpcode = 7, \
2220 .DwordLength = 31
2221
2222 #define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_length 0x00000021
2223
2224 struct GEN7_3DSTATE_POLY_STIPPLE_PATTERN {
2225 uint32_t CommandType;
2226 uint32_t CommandSubType;
2227 uint32_t _3DCommandOpcode;
2228 uint32_t _3DCommandSubOpcode;
2229 uint32_t DwordLength;
2230 uint32_t PatternRow[32];
2231 };
2232
2233 static inline void
2234 GEN7_3DSTATE_POLY_STIPPLE_PATTERN_pack(__gen_user_data *data, void * restrict dst,
2235 const struct GEN7_3DSTATE_POLY_STIPPLE_PATTERN * restrict values)
2236 {
2237 uint32_t *dw = (uint32_t * restrict) dst;
2238
2239 dw[0] =
2240 __gen_field(values->CommandType, 29, 31) |
2241 __gen_field(values->CommandSubType, 27, 28) |
2242 __gen_field(values->_3DCommandOpcode, 24, 26) |
2243 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2244 __gen_field(values->DwordLength, 0, 7) |
2245 0;
2246
2247 for (uint32_t i = 0, j = 1; i < 32; i += 1, j++) {
2248 dw[j] =
2249 __gen_field(values->PatternRow[i + 0], 0, 31) |
2250 0;
2251 }
2252
2253 }
2254
2255 #define GEN7_3DSTATE_PS_length_bias 0x00000002
2256 #define GEN7_3DSTATE_PS_header \
2257 .CommandType = 3, \
2258 .CommandSubType = 3, \
2259 ._3DCommandOpcode = 0, \
2260 ._3DCommandSubOpcode = 32, \
2261 .DwordLength = 6
2262
2263 #define GEN7_3DSTATE_PS_length 0x00000008
2264
2265 struct GEN7_3DSTATE_PS {
2266 uint32_t CommandType;
2267 uint32_t CommandSubType;
2268 uint32_t _3DCommandOpcode;
2269 uint32_t _3DCommandSubOpcode;
2270 uint32_t DwordLength;
2271 uint32_t KernelStartPointer0;
2272 #define Multiple 0
2273 #define Single 1
2274 uint32_t SingleProgramFlowSPF;
2275 #define Dmask 0
2276 #define Vmask 1
2277 uint32_t VectorMaskEnableVME;
2278 uint32_t SamplerCount;
2279 #define FTZ 0
2280 #define RET 1
2281 uint32_t DenormalMode;
2282 uint32_t BindingTableEntryCount;
2283 #define IEEE745 0
2284 #define Alt 1
2285 uint32_t FloatingPointMode;
2286 #define RTNE 0
2287 #define RU 1
2288 #define RD 2
2289 #define RTZ 3
2290 uint32_t RoundingMode;
2291 bool IllegalOpcodeExceptionEnable;
2292 bool MaskStackExceptionEnable;
2293 bool SoftwareExceptionEnable;
2294 uint32_t ScratchSpaceBasePointer;
2295 uint32_t PerThreadScratchSpace;
2296 uint32_t MaximumNumberofThreads;
2297 bool PushConstantEnable;
2298 bool AttributeEnable;
2299 bool oMaskPresenttoRenderTarget;
2300 bool RenderTargetFastClearEnable;
2301 bool DualSourceBlendEnable;
2302 bool RenderTargetResolveEnable;
2303 #define POSOFFSET_NONE 0
2304 #define POSOFFSET_CENTROID 2
2305 #define POSOFFSET_SAMPLE 3
2306 uint32_t PositionXYOffsetSelect;
2307 bool _32PixelDispatchEnable;
2308 bool _16PixelDispatchEnable;
2309 bool _8PixelDispatchEnable;
2310 uint32_t DispatchGRFStartRegisterforConstantSetupData0;
2311 uint32_t DispatchGRFStartRegisterforConstantSetupData1;
2312 uint32_t DispatchGRFStartRegisterforConstantSetupData2;
2313 uint32_t KernelStartPointer1;
2314 uint32_t KernelStartPointer2;
2315 };
2316
2317 static inline void
2318 GEN7_3DSTATE_PS_pack(__gen_user_data *data, void * restrict dst,
2319 const struct GEN7_3DSTATE_PS * restrict values)
2320 {
2321 uint32_t *dw = (uint32_t * restrict) dst;
2322
2323 dw[0] =
2324 __gen_field(values->CommandType, 29, 31) |
2325 __gen_field(values->CommandSubType, 27, 28) |
2326 __gen_field(values->_3DCommandOpcode, 24, 26) |
2327 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2328 __gen_field(values->DwordLength, 0, 7) |
2329 0;
2330
2331 dw[1] =
2332 __gen_offset(values->KernelStartPointer0, 6, 31) |
2333 0;
2334
2335 dw[2] =
2336 __gen_field(values->SingleProgramFlowSPF, 31, 31) |
2337 __gen_field(values->VectorMaskEnableVME, 30, 30) |
2338 __gen_field(values->SamplerCount, 27, 29) |
2339 __gen_field(values->DenormalMode, 26, 26) |
2340 __gen_field(values->BindingTableEntryCount, 18, 25) |
2341 __gen_field(values->FloatingPointMode, 16, 16) |
2342 __gen_field(values->RoundingMode, 14, 15) |
2343 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2344 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
2345 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
2346 0;
2347
2348 dw[3] =
2349 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
2350 __gen_field(values->PerThreadScratchSpace, 0, 3) |
2351 0;
2352
2353 dw[4] =
2354 __gen_field(values->MaximumNumberofThreads, 24, 31) |
2355 __gen_field(values->PushConstantEnable, 11, 11) |
2356 __gen_field(values->AttributeEnable, 10, 10) |
2357 __gen_field(values->oMaskPresenttoRenderTarget, 9, 9) |
2358 __gen_field(values->RenderTargetFastClearEnable, 8, 8) |
2359 __gen_field(values->DualSourceBlendEnable, 7, 7) |
2360 __gen_field(values->RenderTargetResolveEnable, 6, 6) |
2361 __gen_field(values->PositionXYOffsetSelect, 3, 4) |
2362 __gen_field(values->_32PixelDispatchEnable, 2, 2) |
2363 __gen_field(values->_16PixelDispatchEnable, 1, 1) |
2364 __gen_field(values->_8PixelDispatchEnable, 0, 0) |
2365 0;
2366
2367 dw[5] =
2368 __gen_field(values->DispatchGRFStartRegisterforConstantSetupData0, 16, 22) |
2369 __gen_field(values->DispatchGRFStartRegisterforConstantSetupData1, 8, 14) |
2370 __gen_field(values->DispatchGRFStartRegisterforConstantSetupData2, 0, 6) |
2371 0;
2372
2373 dw[6] =
2374 __gen_offset(values->KernelStartPointer1, 6, 31) |
2375 0;
2376
2377 dw[7] =
2378 __gen_offset(values->KernelStartPointer2, 6, 31) |
2379 0;
2380
2381 }
2382
2383 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length_bias 0x00000002
2384 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_header\
2385 .CommandType = 3, \
2386 .CommandSubType = 3, \
2387 ._3DCommandOpcode = 1, \
2388 ._3DCommandSubOpcode = 20, \
2389 .DwordLength = 0
2390
2391 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length 0x00000002
2392
2393 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS {
2394 uint32_t CommandType;
2395 uint32_t CommandSubType;
2396 uint32_t _3DCommandOpcode;
2397 uint32_t _3DCommandSubOpcode;
2398 uint32_t DwordLength;
2399 #define _0KB 0
2400 uint32_t ConstantBufferOffset;
2401 #define _0KB 0
2402 uint32_t ConstantBufferSize;
2403 };
2404
2405 static inline void
2406 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_pack(__gen_user_data *data, void * restrict dst,
2407 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS * restrict values)
2408 {
2409 uint32_t *dw = (uint32_t * restrict) dst;
2410
2411 dw[0] =
2412 __gen_field(values->CommandType, 29, 31) |
2413 __gen_field(values->CommandSubType, 27, 28) |
2414 __gen_field(values->_3DCommandOpcode, 24, 26) |
2415 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2416 __gen_field(values->DwordLength, 0, 7) |
2417 0;
2418
2419 dw[1] =
2420 __gen_field(values->ConstantBufferOffset, 16, 19) |
2421 __gen_field(values->ConstantBufferSize, 0, 4) |
2422 0;
2423
2424 }
2425
2426 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length_bias 0x00000002
2427 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_header\
2428 .CommandType = 3, \
2429 .CommandSubType = 3, \
2430 ._3DCommandOpcode = 1, \
2431 ._3DCommandSubOpcode = 21, \
2432 .DwordLength = 0
2433
2434 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length 0x00000002
2435
2436 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS {
2437 uint32_t CommandType;
2438 uint32_t CommandSubType;
2439 uint32_t _3DCommandOpcode;
2440 uint32_t _3DCommandSubOpcode;
2441 uint32_t DwordLength;
2442 #define _0KB 0
2443 uint32_t ConstantBufferOffset;
2444 #define _0KB 0
2445 uint32_t ConstantBufferSize;
2446 };
2447
2448 static inline void
2449 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_pack(__gen_user_data *data, void * restrict dst,
2450 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS * restrict values)
2451 {
2452 uint32_t *dw = (uint32_t * restrict) dst;
2453
2454 dw[0] =
2455 __gen_field(values->CommandType, 29, 31) |
2456 __gen_field(values->CommandSubType, 27, 28) |
2457 __gen_field(values->_3DCommandOpcode, 24, 26) |
2458 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2459 __gen_field(values->DwordLength, 0, 7) |
2460 0;
2461
2462 dw[1] =
2463 __gen_field(values->ConstantBufferOffset, 16, 19) |
2464 __gen_field(values->ConstantBufferSize, 0, 4) |
2465 0;
2466
2467 }
2468
2469 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length_bias 0x00000002
2470 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_header\
2471 .CommandType = 3, \
2472 .CommandSubType = 3, \
2473 ._3DCommandOpcode = 1, \
2474 ._3DCommandSubOpcode = 19, \
2475 .DwordLength = 0
2476
2477 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length 0x00000002
2478
2479 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS {
2480 uint32_t CommandType;
2481 uint32_t CommandSubType;
2482 uint32_t _3DCommandOpcode;
2483 uint32_t _3DCommandSubOpcode;
2484 uint32_t DwordLength;
2485 #define _0KB 0
2486 uint32_t ConstantBufferOffset;
2487 #define _0KB 0
2488 uint32_t ConstantBufferSize;
2489 };
2490
2491 static inline void
2492 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_pack(__gen_user_data *data, void * restrict dst,
2493 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS * restrict values)
2494 {
2495 uint32_t *dw = (uint32_t * restrict) dst;
2496
2497 dw[0] =
2498 __gen_field(values->CommandType, 29, 31) |
2499 __gen_field(values->CommandSubType, 27, 28) |
2500 __gen_field(values->_3DCommandOpcode, 24, 26) |
2501 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2502 __gen_field(values->DwordLength, 0, 7) |
2503 0;
2504
2505 dw[1] =
2506 __gen_field(values->ConstantBufferOffset, 16, 19) |
2507 __gen_field(values->ConstantBufferSize, 0, 4) |
2508 0;
2509
2510 }
2511
2512 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length_bias 0x00000002
2513 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_header\
2514 .CommandType = 3, \
2515 .CommandSubType = 3, \
2516 ._3DCommandOpcode = 1, \
2517 ._3DCommandSubOpcode = 22, \
2518 .DwordLength = 0
2519
2520 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length 0x00000002
2521
2522 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS {
2523 uint32_t CommandType;
2524 uint32_t CommandSubType;
2525 uint32_t _3DCommandOpcode;
2526 uint32_t _3DCommandSubOpcode;
2527 uint32_t DwordLength;
2528 #define _0KB 0
2529 uint32_t ConstantBufferOffset;
2530 #define _0KB 0
2531 uint32_t ConstantBufferSize;
2532 };
2533
2534 static inline void
2535 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_pack(__gen_user_data *data, void * restrict dst,
2536 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS * restrict values)
2537 {
2538 uint32_t *dw = (uint32_t * restrict) dst;
2539
2540 dw[0] =
2541 __gen_field(values->CommandType, 29, 31) |
2542 __gen_field(values->CommandSubType, 27, 28) |
2543 __gen_field(values->_3DCommandOpcode, 24, 26) |
2544 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2545 __gen_field(values->DwordLength, 0, 7) |
2546 0;
2547
2548 dw[1] =
2549 __gen_field(values->ConstantBufferOffset, 16, 19) |
2550 __gen_field(values->ConstantBufferSize, 0, 4) |
2551 0;
2552
2553 }
2554
2555 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length_bias 0x00000002
2556 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_header\
2557 .CommandType = 3, \
2558 .CommandSubType = 3, \
2559 ._3DCommandOpcode = 1, \
2560 ._3DCommandSubOpcode = 18, \
2561 .DwordLength = 0
2562
2563 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length 0x00000002
2564
2565 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS {
2566 uint32_t CommandType;
2567 uint32_t CommandSubType;
2568 uint32_t _3DCommandOpcode;
2569 uint32_t _3DCommandSubOpcode;
2570 uint32_t DwordLength;
2571 #define _0KB 0
2572 uint32_t ConstantBufferOffset;
2573 #define _0KB 0
2574 uint32_t ConstantBufferSize;
2575 };
2576
2577 static inline void
2578 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_pack(__gen_user_data *data, void * restrict dst,
2579 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS * restrict values)
2580 {
2581 uint32_t *dw = (uint32_t * restrict) dst;
2582
2583 dw[0] =
2584 __gen_field(values->CommandType, 29, 31) |
2585 __gen_field(values->CommandSubType, 27, 28) |
2586 __gen_field(values->_3DCommandOpcode, 24, 26) |
2587 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2588 __gen_field(values->DwordLength, 0, 7) |
2589 0;
2590
2591 dw[1] =
2592 __gen_field(values->ConstantBufferOffset, 16, 19) |
2593 __gen_field(values->ConstantBufferSize, 0, 4) |
2594 0;
2595
2596 }
2597
2598 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_length_bias 0x00000002
2599 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_header\
2600 .CommandType = 3, \
2601 .CommandSubType = 3, \
2602 ._3DCommandOpcode = 1, \
2603 ._3DCommandSubOpcode = 2
2604
2605 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_length 0x00000000
2606
2607 #define GEN7_PALETTE_ENTRY_length 0x00000001
2608
2609 struct GEN7_PALETTE_ENTRY {
2610 uint32_t Alpha;
2611 uint32_t Red;
2612 uint32_t Green;
2613 uint32_t Blue;
2614 };
2615
2616 static inline void
2617 GEN7_PALETTE_ENTRY_pack(__gen_user_data *data, void * restrict dst,
2618 const struct GEN7_PALETTE_ENTRY * restrict values)
2619 {
2620 uint32_t *dw = (uint32_t * restrict) dst;
2621
2622 dw[0] =
2623 __gen_field(values->Alpha, 24, 31) |
2624 __gen_field(values->Red, 16, 23) |
2625 __gen_field(values->Green, 8, 15) |
2626 __gen_field(values->Blue, 0, 7) |
2627 0;
2628
2629 }
2630
2631 struct GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0 {
2632 uint32_t CommandType;
2633 uint32_t CommandSubType;
2634 uint32_t _3DCommandOpcode;
2635 uint32_t _3DCommandSubOpcode;
2636 uint32_t DwordLength;
2637 /* variable length fields follow */
2638 };
2639
2640 static inline void
2641 GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_pack(__gen_user_data *data, void * restrict dst,
2642 const struct GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0 * restrict values)
2643 {
2644 uint32_t *dw = (uint32_t * restrict) dst;
2645
2646 dw[0] =
2647 __gen_field(values->CommandType, 29, 31) |
2648 __gen_field(values->CommandSubType, 27, 28) |
2649 __gen_field(values->_3DCommandOpcode, 24, 26) |
2650 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2651 __gen_field(values->DwordLength, 0, 7) |
2652 0;
2653
2654 /* variable length fields follow */
2655 }
2656
2657 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_length_bias 0x00000002
2658 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_header\
2659 .CommandType = 3, \
2660 .CommandSubType = 3, \
2661 ._3DCommandOpcode = 1, \
2662 ._3DCommandSubOpcode = 12
2663
2664 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_length 0x00000000
2665
2666 struct GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1 {
2667 uint32_t CommandType;
2668 uint32_t CommandSubType;
2669 uint32_t _3DCommandOpcode;
2670 uint32_t _3DCommandSubOpcode;
2671 uint32_t DwordLength;
2672 /* variable length fields follow */
2673 };
2674
2675 static inline void
2676 GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_pack(__gen_user_data *data, void * restrict dst,
2677 const struct GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1 * restrict values)
2678 {
2679 uint32_t *dw = (uint32_t * restrict) dst;
2680
2681 dw[0] =
2682 __gen_field(values->CommandType, 29, 31) |
2683 __gen_field(values->CommandSubType, 27, 28) |
2684 __gen_field(values->_3DCommandOpcode, 24, 26) |
2685 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2686 __gen_field(values->DwordLength, 0, 7) |
2687 0;
2688
2689 /* variable length fields follow */
2690 }
2691
2692 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_length_bias 0x00000002
2693 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_header\
2694 .CommandType = 3, \
2695 .CommandSubType = 3, \
2696 ._3DCommandOpcode = 0, \
2697 ._3DCommandSubOpcode = 45, \
2698 .DwordLength = 0
2699
2700 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_length 0x00000002
2701
2702 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS {
2703 uint32_t CommandType;
2704 uint32_t CommandSubType;
2705 uint32_t _3DCommandOpcode;
2706 uint32_t _3DCommandSubOpcode;
2707 uint32_t DwordLength;
2708 uint32_t PointertoDSSamplerState;
2709 };
2710
2711 static inline void
2712 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
2713 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS * restrict values)
2714 {
2715 uint32_t *dw = (uint32_t * restrict) dst;
2716
2717 dw[0] =
2718 __gen_field(values->CommandType, 29, 31) |
2719 __gen_field(values->CommandSubType, 27, 28) |
2720 __gen_field(values->_3DCommandOpcode, 24, 26) |
2721 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2722 __gen_field(values->DwordLength, 0, 7) |
2723 0;
2724
2725 dw[1] =
2726 __gen_offset(values->PointertoDSSamplerState, 5, 31) |
2727 0;
2728
2729 }
2730
2731 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_length_bias 0x00000002
2732 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_header\
2733 .CommandType = 3, \
2734 .CommandSubType = 3, \
2735 ._3DCommandOpcode = 0, \
2736 ._3DCommandSubOpcode = 46, \
2737 .DwordLength = 0
2738
2739 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_length 0x00000002
2740
2741 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS {
2742 uint32_t CommandType;
2743 uint32_t CommandSubType;
2744 uint32_t _3DCommandOpcode;
2745 uint32_t _3DCommandSubOpcode;
2746 uint32_t DwordLength;
2747 uint32_t PointertoGSSamplerState;
2748 };
2749
2750 static inline void
2751 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
2752 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS * restrict values)
2753 {
2754 uint32_t *dw = (uint32_t * restrict) dst;
2755
2756 dw[0] =
2757 __gen_field(values->CommandType, 29, 31) |
2758 __gen_field(values->CommandSubType, 27, 28) |
2759 __gen_field(values->_3DCommandOpcode, 24, 26) |
2760 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2761 __gen_field(values->DwordLength, 0, 7) |
2762 0;
2763
2764 dw[1] =
2765 __gen_offset(values->PointertoGSSamplerState, 5, 31) |
2766 0;
2767
2768 }
2769
2770 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_length_bias 0x00000002
2771 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_header\
2772 .CommandType = 3, \
2773 .CommandSubType = 3, \
2774 ._3DCommandOpcode = 0, \
2775 ._3DCommandSubOpcode = 44, \
2776 .DwordLength = 0
2777
2778 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_length 0x00000002
2779
2780 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS {
2781 uint32_t CommandType;
2782 uint32_t CommandSubType;
2783 uint32_t _3DCommandOpcode;
2784 uint32_t _3DCommandSubOpcode;
2785 uint32_t DwordLength;
2786 uint32_t PointertoHSSamplerState;
2787 };
2788
2789 static inline void
2790 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
2791 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS * restrict values)
2792 {
2793 uint32_t *dw = (uint32_t * restrict) dst;
2794
2795 dw[0] =
2796 __gen_field(values->CommandType, 29, 31) |
2797 __gen_field(values->CommandSubType, 27, 28) |
2798 __gen_field(values->_3DCommandOpcode, 24, 26) |
2799 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2800 __gen_field(values->DwordLength, 0, 7) |
2801 0;
2802
2803 dw[1] =
2804 __gen_offset(values->PointertoHSSamplerState, 5, 31) |
2805 0;
2806
2807 }
2808
2809 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_length_bias 0x00000002
2810 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_header\
2811 .CommandType = 3, \
2812 .CommandSubType = 3, \
2813 ._3DCommandOpcode = 0, \
2814 ._3DCommandSubOpcode = 47, \
2815 .DwordLength = 0
2816
2817 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_length 0x00000002
2818
2819 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS {
2820 uint32_t CommandType;
2821 uint32_t CommandSubType;
2822 uint32_t _3DCommandOpcode;
2823 uint32_t _3DCommandSubOpcode;
2824 uint32_t DwordLength;
2825 uint32_t PointertoPSSamplerState;
2826 };
2827
2828 static inline void
2829 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
2830 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS * restrict values)
2831 {
2832 uint32_t *dw = (uint32_t * restrict) dst;
2833
2834 dw[0] =
2835 __gen_field(values->CommandType, 29, 31) |
2836 __gen_field(values->CommandSubType, 27, 28) |
2837 __gen_field(values->_3DCommandOpcode, 24, 26) |
2838 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2839 __gen_field(values->DwordLength, 0, 7) |
2840 0;
2841
2842 dw[1] =
2843 __gen_offset(values->PointertoPSSamplerState, 5, 31) |
2844 0;
2845
2846 }
2847
2848 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_length_bias 0x00000002
2849 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_header\
2850 .CommandType = 3, \
2851 .CommandSubType = 3, \
2852 ._3DCommandOpcode = 0, \
2853 ._3DCommandSubOpcode = 43, \
2854 .DwordLength = 0
2855
2856 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_length 0x00000002
2857
2858 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS {
2859 uint32_t CommandType;
2860 uint32_t CommandSubType;
2861 uint32_t _3DCommandOpcode;
2862 uint32_t _3DCommandSubOpcode;
2863 uint32_t DwordLength;
2864 uint32_t PointertoVSSamplerState;
2865 };
2866
2867 static inline void
2868 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
2869 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS * restrict values)
2870 {
2871 uint32_t *dw = (uint32_t * restrict) dst;
2872
2873 dw[0] =
2874 __gen_field(values->CommandType, 29, 31) |
2875 __gen_field(values->CommandSubType, 27, 28) |
2876 __gen_field(values->_3DCommandOpcode, 24, 26) |
2877 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2878 __gen_field(values->DwordLength, 0, 7) |
2879 0;
2880
2881 dw[1] =
2882 __gen_offset(values->PointertoVSSamplerState, 5, 31) |
2883 0;
2884
2885 }
2886
2887 #define GEN7_3DSTATE_SAMPLE_MASK_length_bias 0x00000002
2888 #define GEN7_3DSTATE_SAMPLE_MASK_header \
2889 .CommandType = 3, \
2890 .CommandSubType = 3, \
2891 ._3DCommandOpcode = 0, \
2892 ._3DCommandSubOpcode = 24, \
2893 .DwordLength = 0
2894
2895 #define GEN7_3DSTATE_SAMPLE_MASK_length 0x00000002
2896
2897 struct GEN7_3DSTATE_SAMPLE_MASK {
2898 uint32_t CommandType;
2899 uint32_t CommandSubType;
2900 uint32_t _3DCommandOpcode;
2901 uint32_t _3DCommandSubOpcode;
2902 uint32_t DwordLength;
2903 uint32_t SampleMask;
2904 };
2905
2906 static inline void
2907 GEN7_3DSTATE_SAMPLE_MASK_pack(__gen_user_data *data, void * restrict dst,
2908 const struct GEN7_3DSTATE_SAMPLE_MASK * restrict values)
2909 {
2910 uint32_t *dw = (uint32_t * restrict) dst;
2911
2912 dw[0] =
2913 __gen_field(values->CommandType, 29, 31) |
2914 __gen_field(values->CommandSubType, 27, 28) |
2915 __gen_field(values->_3DCommandOpcode, 24, 26) |
2916 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2917 __gen_field(values->DwordLength, 0, 7) |
2918 0;
2919
2920 dw[1] =
2921 __gen_field(values->SampleMask, 0, 7) |
2922 0;
2923
2924 }
2925
2926 #define GEN7_3DSTATE_SBE_length_bias 0x00000002
2927 #define GEN7_3DSTATE_SBE_header \
2928 .CommandType = 3, \
2929 .CommandSubType = 3, \
2930 ._3DCommandOpcode = 0, \
2931 ._3DCommandSubOpcode = 31, \
2932 .DwordLength = 12
2933
2934 #define GEN7_3DSTATE_SBE_length 0x0000000e
2935
2936 struct GEN7_3DSTATE_SBE {
2937 uint32_t CommandType;
2938 uint32_t CommandSubType;
2939 uint32_t _3DCommandOpcode;
2940 uint32_t _3DCommandSubOpcode;
2941 uint32_t DwordLength;
2942 #define SWIZ_0_15 0
2943 #define SWIZ_16_31 1
2944 uint32_t AttributeSwizzleControlMode;
2945 uint32_t NumberofSFOutputAttributes;
2946 bool AttributeSwizzleEnable;
2947 #define UPPERLEFT 0
2948 #define LOWERLEFT 1
2949 uint32_t PointSpriteTextureCoordinateOrigin;
2950 uint32_t VertexURBEntryReadLength;
2951 uint32_t VertexURBEntryReadOffset;
2952 bool Attribute2n1ComponentOverrideW;
2953 bool Attribute2n1ComponentOverrideZ;
2954 bool Attribute2n1ComponentOverrideY;
2955 bool Attribute2n1ComponentOverrideX;
2956 #define CONST_0000 0
2957 #define CONST_0001_FLOAT 1
2958 #define CONST_1111_FLOAT 2
2959 #define PRIM_ID 3
2960 uint32_t Attribute2n1ConstantSource;
2961 #define INPUTATTR 0
2962 #define INPUTATTR_FACING 1
2963 #define INPUTATTR_W 2
2964 #define INPUTATTR_FACING_W 3
2965 uint32_t Attribute2n1SwizzleSelect;
2966 uint32_t Attribute2n1SourceAttribute;
2967 bool Attribute2nComponentOverrideW;
2968 bool Attribute2nComponentOverrideZ;
2969 bool Attribute2nComponentOverrideY;
2970 bool Attribute2nComponentOverrideX;
2971 #define CONST_0000 0
2972 #define CONST_0001_FLOAT 1
2973 #define CONST_1111_FLOAT 2
2974 #define PRIM_ID 3
2975 uint32_t Attribute2nConstantSource;
2976 #define INPUTATTR 0
2977 #define INPUTATTR_FACING 1
2978 #define INPUTATTR_W 2
2979 #define INPUTATTR_FACING_W 3
2980 uint32_t Attribute2nSwizzleSelect;
2981 uint32_t Attribute2nSourceAttribute;
2982 uint32_t PointSpriteTextureCoordinateEnable;
2983 uint32_t ConstantInterpolationEnable310;
2984 uint32_t Attribute7WrapShortestEnables;
2985 uint32_t Attribute6WrapShortestEnables;
2986 uint32_t Attribute5WrapShortestEnables;
2987 uint32_t Attribute4WrapShortestEnables;
2988 uint32_t Attribute3WrapShortestEnables;
2989 uint32_t Attribute2WrapShortestEnables;
2990 uint32_t Attribute1WrapShortestEnables;
2991 uint32_t Attribute0WrapShortestEnables;
2992 uint32_t Attribute15WrapShortestEnables;
2993 uint32_t Attribute14WrapShortestEnables;
2994 uint32_t Attribute13WrapShortestEnables;
2995 uint32_t Attribute12WrapShortestEnables;
2996 uint32_t Attribute11WrapShortestEnables;
2997 uint32_t Attribute10WrapShortestEnables;
2998 uint32_t Attribute9WrapShortestEnables;
2999 uint32_t Attribute8WrapShortestEnables;
3000 };
3001
3002 static inline void
3003 GEN7_3DSTATE_SBE_pack(__gen_user_data *data, void * restrict dst,
3004 const struct GEN7_3DSTATE_SBE * restrict values)
3005 {
3006 uint32_t *dw = (uint32_t * restrict) dst;
3007
3008 dw[0] =
3009 __gen_field(values->CommandType, 29, 31) |
3010 __gen_field(values->CommandSubType, 27, 28) |
3011 __gen_field(values->_3DCommandOpcode, 24, 26) |
3012 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3013 __gen_field(values->DwordLength, 0, 7) |
3014 0;
3015
3016 dw[1] =
3017 __gen_field(values->AttributeSwizzleControlMode, 28, 28) |
3018 __gen_field(values->NumberofSFOutputAttributes, 22, 27) |
3019 __gen_field(values->AttributeSwizzleEnable, 21, 21) |
3020 __gen_field(values->PointSpriteTextureCoordinateOrigin, 20, 20) |
3021 __gen_field(values->VertexURBEntryReadLength, 11, 15) |
3022 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
3023 0;
3024
3025 dw[2] =
3026 __gen_field(values->Attribute2n1ComponentOverrideW, 31, 31) |
3027 __gen_field(values->Attribute2n1ComponentOverrideZ, 30, 30) |
3028 __gen_field(values->Attribute2n1ComponentOverrideY, 29, 29) |
3029 __gen_field(values->Attribute2n1ComponentOverrideX, 28, 28) |
3030 __gen_field(values->Attribute2n1ConstantSource, 25, 26) |
3031 __gen_field(values->Attribute2n1SwizzleSelect, 22, 23) |
3032 __gen_field(values->Attribute2n1SourceAttribute, 16, 20) |
3033 __gen_field(values->Attribute2nComponentOverrideW, 15, 15) |
3034 __gen_field(values->Attribute2nComponentOverrideZ, 14, 14) |
3035 __gen_field(values->Attribute2nComponentOverrideY, 13, 13) |
3036 __gen_field(values->Attribute2nComponentOverrideX, 12, 12) |
3037 __gen_field(values->Attribute2nConstantSource, 9, 10) |
3038 __gen_field(values->Attribute2nSwizzleSelect, 6, 7) |
3039 __gen_field(values->Attribute2nSourceAttribute, 0, 4) |
3040 0;
3041
3042 dw[10] =
3043 __gen_field(values->PointSpriteTextureCoordinateEnable, 0, 31) |
3044 0;
3045
3046 dw[11] =
3047 __gen_field(values->ConstantInterpolationEnable310, 0, 31) |
3048 0;
3049
3050 dw[12] =
3051 __gen_field(values->Attribute7WrapShortestEnables, 28, 31) |
3052 __gen_field(values->Attribute6WrapShortestEnables, 24, 27) |
3053 __gen_field(values->Attribute5WrapShortestEnables, 20, 23) |
3054 __gen_field(values->Attribute4WrapShortestEnables, 16, 19) |
3055 __gen_field(values->Attribute3WrapShortestEnables, 12, 15) |
3056 __gen_field(values->Attribute2WrapShortestEnables, 8, 11) |
3057 __gen_field(values->Attribute1WrapShortestEnables, 4, 7) |
3058 __gen_field(values->Attribute0WrapShortestEnables, 0, 3) |
3059 0;
3060
3061 dw[13] =
3062 __gen_field(values->Attribute15WrapShortestEnables, 28, 31) |
3063 __gen_field(values->Attribute14WrapShortestEnables, 24, 27) |
3064 __gen_field(values->Attribute13WrapShortestEnables, 20, 23) |
3065 __gen_field(values->Attribute12WrapShortestEnables, 16, 19) |
3066 __gen_field(values->Attribute11WrapShortestEnables, 12, 15) |
3067 __gen_field(values->Attribute10WrapShortestEnables, 8, 11) |
3068 __gen_field(values->Attribute9WrapShortestEnables, 4, 7) |
3069 __gen_field(values->Attribute8WrapShortestEnables, 0, 3) |
3070 0;
3071
3072 }
3073
3074 #define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_length_bias 0x00000002
3075 #define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_header\
3076 .CommandType = 3, \
3077 .CommandSubType = 3, \
3078 ._3DCommandOpcode = 0, \
3079 ._3DCommandSubOpcode = 15, \
3080 .DwordLength = 0
3081
3082 #define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_length 0x00000002
3083
3084 struct GEN7_3DSTATE_SCISSOR_STATE_POINTERS {
3085 uint32_t CommandType;
3086 uint32_t CommandSubType;
3087 uint32_t _3DCommandOpcode;
3088 uint32_t _3DCommandSubOpcode;
3089 uint32_t DwordLength;
3090 uint32_t ScissorRectPointer;
3091 };
3092
3093 static inline void
3094 GEN7_3DSTATE_SCISSOR_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
3095 const struct GEN7_3DSTATE_SCISSOR_STATE_POINTERS * restrict values)
3096 {
3097 uint32_t *dw = (uint32_t * restrict) dst;
3098
3099 dw[0] =
3100 __gen_field(values->CommandType, 29, 31) |
3101 __gen_field(values->CommandSubType, 27, 28) |
3102 __gen_field(values->_3DCommandOpcode, 24, 26) |
3103 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3104 __gen_field(values->DwordLength, 0, 7) |
3105 0;
3106
3107 dw[1] =
3108 __gen_offset(values->ScissorRectPointer, 5, 31) |
3109 0;
3110
3111 }
3112
3113 #define GEN7_3DSTATE_SF_length_bias 0x00000002
3114 #define GEN7_3DSTATE_SF_header \
3115 .CommandType = 3, \
3116 .CommandSubType = 3, \
3117 ._3DCommandOpcode = 0, \
3118 ._3DCommandSubOpcode = 19, \
3119 .DwordLength = 5
3120
3121 #define GEN7_3DSTATE_SF_length 0x00000007
3122
3123 struct GEN7_3DSTATE_SF {
3124 uint32_t CommandType;
3125 uint32_t CommandSubType;
3126 uint32_t _3DCommandOpcode;
3127 uint32_t _3DCommandSubOpcode;
3128 uint32_t DwordLength;
3129 #define D32_FLOAT_S8X24_UINT 0
3130 #define D32_FLOAT 1
3131 #define D24_UNORM_S8_UINT 2
3132 #define D24_UNORM_X8_UINT 3
3133 #define D16_UNORM 5
3134 uint32_t DepthBufferSurfaceFormat;
3135 bool LegacyGlobalDepthBiasEnable;
3136 bool StatisticsEnable;
3137 bool GlobalDepthOffsetEnableSolid;
3138 bool GlobalDepthOffsetEnableWireframe;
3139 bool GlobalDepthOffsetEnablePoint;
3140 #define RASTER_SOLID 0
3141 #define RASTER_WIREFRAME 1
3142 #define RASTER_POINT 2
3143 uint32_t FrontFaceFillMode;
3144 #define RASTER_SOLID 0
3145 #define RASTER_WIREFRAME 1
3146 #define RASTER_POINT 2
3147 uint32_t BackFaceFillMode;
3148 bool ViewTransformEnable;
3149 uint32_t FrontWinding;
3150 bool AntiAliasingEnable;
3151 #define CULLMODE_BOTH 0
3152 #define CULLMODE_NONE 1
3153 #define CULLMODE_FRONT 2
3154 #define CULLMODE_BACK 3
3155 uint32_t CullMode;
3156 float LineWidth;
3157 uint32_t LineEndCapAntialiasingRegionWidth;
3158 bool ScissorRectangleEnable;
3159 uint32_t MultisampleRasterizationMode;
3160 bool LastPixelEnable;
3161 #define Vertex0 0
3162 #define Vertex1 1
3163 #define Vertex2 2
3164 uint32_t TriangleStripListProvokingVertexSelect;
3165 uint32_t LineStripListProvokingVertexSelect;
3166 #define Vertex0 0
3167 #define Vertex1 1
3168 #define Vertex2 2
3169 uint32_t TriangleFanProvokingVertexSelect;
3170 #define AALINEDISTANCE_TRUE 1
3171 uint32_t AALineDistanceMode;
3172 uint32_t VertexSubPixelPrecisionSelect;
3173 uint32_t UsePointWidthState;
3174 float PointWidth;
3175 float GlobalDepthOffsetConstant;
3176 float GlobalDepthOffsetScale;
3177 float GlobalDepthOffsetClamp;
3178 };
3179
3180 static inline void
3181 GEN7_3DSTATE_SF_pack(__gen_user_data *data, void * restrict dst,
3182 const struct GEN7_3DSTATE_SF * restrict values)
3183 {
3184 uint32_t *dw = (uint32_t * restrict) dst;
3185
3186 dw[0] =
3187 __gen_field(values->CommandType, 29, 31) |
3188 __gen_field(values->CommandSubType, 27, 28) |
3189 __gen_field(values->_3DCommandOpcode, 24, 26) |
3190 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3191 __gen_field(values->DwordLength, 0, 7) |
3192 0;
3193
3194 dw[1] =
3195 __gen_field(values->DepthBufferSurfaceFormat, 12, 14) |
3196 __gen_field(values->LegacyGlobalDepthBiasEnable, 11, 11) |
3197 __gen_field(values->StatisticsEnable, 10, 10) |
3198 __gen_field(values->GlobalDepthOffsetEnableSolid, 9, 9) |
3199 __gen_field(values->GlobalDepthOffsetEnableWireframe, 8, 8) |
3200 __gen_field(values->GlobalDepthOffsetEnablePoint, 7, 7) |
3201 __gen_field(values->FrontFaceFillMode, 5, 6) |
3202 __gen_field(values->BackFaceFillMode, 3, 4) |
3203 __gen_field(values->ViewTransformEnable, 1, 1) |
3204 __gen_field(values->FrontWinding, 0, 0) |
3205 0;
3206
3207 dw[2] =
3208 __gen_field(values->AntiAliasingEnable, 31, 31) |
3209 __gen_field(values->CullMode, 29, 30) |
3210 __gen_field(values->LineWidth * (1 << 7), 18, 27) |
3211 __gen_field(values->LineEndCapAntialiasingRegionWidth, 16, 17) |
3212 __gen_field(values->ScissorRectangleEnable, 11, 11) |
3213 __gen_field(values->MultisampleRasterizationMode, 8, 9) |
3214 0;
3215
3216 dw[3] =
3217 __gen_field(values->LastPixelEnable, 31, 31) |
3218 __gen_field(values->TriangleStripListProvokingVertexSelect, 29, 30) |
3219 __gen_field(values->LineStripListProvokingVertexSelect, 27, 28) |
3220 __gen_field(values->TriangleFanProvokingVertexSelect, 25, 26) |
3221 __gen_field(values->AALineDistanceMode, 14, 14) |
3222 __gen_field(values->VertexSubPixelPrecisionSelect, 12, 12) |
3223 __gen_field(values->UsePointWidthState, 11, 11) |
3224 __gen_field(values->PointWidth * (1 << 3), 0, 10) |
3225 0;
3226
3227 dw[4] =
3228 __gen_float(values->GlobalDepthOffsetConstant) |
3229 0;
3230
3231 dw[5] =
3232 __gen_float(values->GlobalDepthOffsetScale) |
3233 0;
3234
3235 dw[6] =
3236 __gen_float(values->GlobalDepthOffsetClamp) |
3237 0;
3238
3239 }
3240
3241 #define GEN7_3DSTATE_SO_BUFFER_length_bias 0x00000002
3242 #define GEN7_3DSTATE_SO_BUFFER_header \
3243 .CommandType = 3, \
3244 .CommandSubType = 3, \
3245 ._3DCommandOpcode = 1, \
3246 ._3DCommandSubOpcode = 24, \
3247 .DwordLength = 2
3248
3249 #define GEN7_3DSTATE_SO_BUFFER_length 0x00000004
3250
3251 struct GEN7_3DSTATE_SO_BUFFER {
3252 uint32_t CommandType;
3253 uint32_t CommandSubType;
3254 uint32_t _3DCommandOpcode;
3255 uint32_t _3DCommandSubOpcode;
3256 uint32_t DwordLength;
3257 uint32_t SOBufferIndex;
3258 struct GEN7_MEMORY_OBJECT_CONTROL_STATE SOBufferObjectControlState;
3259 uint32_t SurfacePitch;
3260 __gen_address_type SurfaceBaseAddress;
3261 __gen_address_type SurfaceEndAddress;
3262 };
3263
3264 static inline void
3265 GEN7_3DSTATE_SO_BUFFER_pack(__gen_user_data *data, void * restrict dst,
3266 const struct GEN7_3DSTATE_SO_BUFFER * restrict values)
3267 {
3268 uint32_t *dw = (uint32_t * restrict) dst;
3269
3270 dw[0] =
3271 __gen_field(values->CommandType, 29, 31) |
3272 __gen_field(values->CommandSubType, 27, 28) |
3273 __gen_field(values->_3DCommandOpcode, 24, 26) |
3274 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3275 __gen_field(values->DwordLength, 0, 7) |
3276 0;
3277
3278 uint32_t dw_SOBufferObjectControlState;
3279 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SOBufferObjectControlState, &values->SOBufferObjectControlState);
3280 dw[1] =
3281 __gen_field(values->SOBufferIndex, 29, 30) |
3282 __gen_field(dw_SOBufferObjectControlState, 25, 28) |
3283 __gen_field(values->SurfacePitch, 0, 11) |
3284 0;
3285
3286 uint32_t dw2 =
3287 0;
3288
3289 dw[2] =
3290 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
3291
3292 uint32_t dw3 =
3293 0;
3294
3295 dw[3] =
3296 __gen_combine_address(data, &dw[3], values->SurfaceEndAddress, dw3);
3297
3298 }
3299
3300 #define GEN7_3DSTATE_SO_DECL_LIST_length_bias 0x00000002
3301 #define GEN7_3DSTATE_SO_DECL_LIST_header \
3302 .CommandType = 3, \
3303 .CommandSubType = 3, \
3304 ._3DCommandOpcode = 1, \
3305 ._3DCommandSubOpcode = 23
3306
3307 #define GEN7_3DSTATE_SO_DECL_LIST_length 0x00000000
3308
3309 #define GEN7_SO_DECL_ENTRY_length 0x00000002
3310
3311 #define GEN7_SO_DECL_length 0x00000001
3312
3313 struct GEN7_SO_DECL {
3314 uint32_t OutputBufferSlot;
3315 uint32_t HoleFlag;
3316 uint32_t RegisterIndex;
3317 uint32_t ComponentMask;
3318 };
3319
3320 static inline void
3321 GEN7_SO_DECL_pack(__gen_user_data *data, void * restrict dst,
3322 const struct GEN7_SO_DECL * restrict values)
3323 {
3324 uint32_t *dw = (uint32_t * restrict) dst;
3325
3326 dw[0] =
3327 __gen_field(values->OutputBufferSlot, 12, 13) |
3328 __gen_field(values->HoleFlag, 11, 11) |
3329 __gen_field(values->RegisterIndex, 4, 9) |
3330 __gen_field(values->ComponentMask, 0, 3) |
3331 0;
3332
3333 }
3334
3335 struct GEN7_SO_DECL_ENTRY {
3336 struct GEN7_SO_DECL Stream3Decl;
3337 struct GEN7_SO_DECL Stream2Decl;
3338 struct GEN7_SO_DECL Stream1Decl;
3339 struct GEN7_SO_DECL Stream0Decl;
3340 };
3341
3342 static inline void
3343 GEN7_SO_DECL_ENTRY_pack(__gen_user_data *data, void * restrict dst,
3344 const struct GEN7_SO_DECL_ENTRY * restrict values)
3345 {
3346 uint32_t *dw = (uint32_t * restrict) dst;
3347
3348 uint32_t dw_Stream3Decl;
3349 GEN7_SO_DECL_pack(data, &dw_Stream3Decl, &values->Stream3Decl);
3350 uint32_t dw_Stream2Decl;
3351 GEN7_SO_DECL_pack(data, &dw_Stream2Decl, &values->Stream2Decl);
3352 uint32_t dw_Stream1Decl;
3353 GEN7_SO_DECL_pack(data, &dw_Stream1Decl, &values->Stream1Decl);
3354 uint32_t dw_Stream0Decl;
3355 GEN7_SO_DECL_pack(data, &dw_Stream0Decl, &values->Stream0Decl);
3356 uint64_t qw0 =
3357 __gen_field(dw_Stream3Decl, 48, 63) |
3358 __gen_field(dw_Stream2Decl, 32, 47) |
3359 __gen_field(dw_Stream1Decl, 16, 31) |
3360 __gen_field(dw_Stream0Decl, 0, 15) |
3361 0;
3362
3363 dw[0] = qw0;
3364 dw[1] = qw0 >> 32;
3365
3366 }
3367
3368 struct GEN7_3DSTATE_SO_DECL_LIST {
3369 uint32_t CommandType;
3370 uint32_t CommandSubType;
3371 uint32_t _3DCommandOpcode;
3372 uint32_t _3DCommandSubOpcode;
3373 uint32_t DwordLength;
3374 uint32_t StreamtoBufferSelects3;
3375 uint32_t StreamtoBufferSelects2;
3376 uint32_t StreamtoBufferSelects1;
3377 uint32_t StreamtoBufferSelects0;
3378 uint32_t NumEntries3;
3379 uint32_t NumEntries2;
3380 uint32_t NumEntries1;
3381 uint32_t NumEntries0;
3382 /* variable length fields follow */
3383 };
3384
3385 static inline void
3386 GEN7_3DSTATE_SO_DECL_LIST_pack(__gen_user_data *data, void * restrict dst,
3387 const struct GEN7_3DSTATE_SO_DECL_LIST * restrict values)
3388 {
3389 uint32_t *dw = (uint32_t * restrict) dst;
3390
3391 dw[0] =
3392 __gen_field(values->CommandType, 29, 31) |
3393 __gen_field(values->CommandSubType, 27, 28) |
3394 __gen_field(values->_3DCommandOpcode, 24, 26) |
3395 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3396 __gen_field(values->DwordLength, 0, 8) |
3397 0;
3398
3399 dw[1] =
3400 __gen_field(values->StreamtoBufferSelects3, 12, 15) |
3401 __gen_field(values->StreamtoBufferSelects2, 8, 11) |
3402 __gen_field(values->StreamtoBufferSelects1, 4, 7) |
3403 __gen_field(values->StreamtoBufferSelects0, 0, 3) |
3404 0;
3405
3406 dw[2] =
3407 __gen_field(values->NumEntries3, 24, 31) |
3408 __gen_field(values->NumEntries2, 16, 23) |
3409 __gen_field(values->NumEntries1, 8, 15) |
3410 __gen_field(values->NumEntries0, 0, 7) |
3411 0;
3412
3413 /* variable length fields follow */
3414 }
3415
3416 #define GEN7_3DSTATE_STENCIL_BUFFER_length_bias 0x00000002
3417 #define GEN7_3DSTATE_STENCIL_BUFFER_header \
3418 .CommandType = 3, \
3419 .CommandSubType = 3, \
3420 ._3DCommandOpcode = 0, \
3421 ._3DCommandSubOpcode = 6, \
3422 .DwordLength = 1
3423
3424 #define GEN7_3DSTATE_STENCIL_BUFFER_length 0x00000003
3425
3426 struct GEN7_3DSTATE_STENCIL_BUFFER {
3427 uint32_t CommandType;
3428 uint32_t CommandSubType;
3429 uint32_t _3DCommandOpcode;
3430 uint32_t _3DCommandSubOpcode;
3431 uint32_t DwordLength;
3432 struct GEN7_MEMORY_OBJECT_CONTROL_STATE StencilBufferObjectControlState;
3433 uint32_t SurfacePitch;
3434 __gen_address_type SurfaceBaseAddress;
3435 };
3436
3437 static inline void
3438 GEN7_3DSTATE_STENCIL_BUFFER_pack(__gen_user_data *data, void * restrict dst,
3439 const struct GEN7_3DSTATE_STENCIL_BUFFER * restrict values)
3440 {
3441 uint32_t *dw = (uint32_t * restrict) dst;
3442
3443 dw[0] =
3444 __gen_field(values->CommandType, 29, 31) |
3445 __gen_field(values->CommandSubType, 27, 28) |
3446 __gen_field(values->_3DCommandOpcode, 24, 26) |
3447 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3448 __gen_field(values->DwordLength, 0, 7) |
3449 0;
3450
3451 uint32_t dw_StencilBufferObjectControlState;
3452 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StencilBufferObjectControlState, &values->StencilBufferObjectControlState);
3453 dw[1] =
3454 __gen_field(dw_StencilBufferObjectControlState, 25, 28) |
3455 __gen_field(values->SurfacePitch, 0, 16) |
3456 0;
3457
3458 uint32_t dw2 =
3459 0;
3460
3461 dw[2] =
3462 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
3463
3464 }
3465
3466 #define GEN7_3DSTATE_STREAMOUT_length_bias 0x00000002
3467 #define GEN7_3DSTATE_STREAMOUT_header \
3468 .CommandType = 3, \
3469 .CommandSubType = 3, \
3470 ._3DCommandOpcode = 0, \
3471 ._3DCommandSubOpcode = 30, \
3472 .DwordLength = 1
3473
3474 #define GEN7_3DSTATE_STREAMOUT_length 0x00000003
3475
3476 struct GEN7_3DSTATE_STREAMOUT {
3477 uint32_t CommandType;
3478 uint32_t CommandSubType;
3479 uint32_t _3DCommandOpcode;
3480 uint32_t _3DCommandSubOpcode;
3481 uint32_t DwordLength;
3482 uint32_t SOFunctionEnable;
3483 uint32_t RenderingDisable;
3484 uint32_t RenderStreamSelect;
3485 #define LEADING 0
3486 #define TRAILING 1
3487 uint32_t ReorderMode;
3488 bool SOStatisticsEnable;
3489 uint32_t SOBufferEnable3;
3490 uint32_t SOBufferEnable2;
3491 uint32_t SOBufferEnable1;
3492 uint32_t SOBufferEnable0;
3493 uint32_t Stream3VertexReadOffset;
3494 uint32_t Stream3VertexReadLength;
3495 uint32_t Stream2VertexReadOffset;
3496 uint32_t Stream2VertexReadLength;
3497 uint32_t Stream1VertexReadOffset;
3498 uint32_t Stream1VertexReadLength;
3499 uint32_t Stream0VertexReadOffset;
3500 uint32_t Stream0VertexReadLength;
3501 };
3502
3503 static inline void
3504 GEN7_3DSTATE_STREAMOUT_pack(__gen_user_data *data, void * restrict dst,
3505 const struct GEN7_3DSTATE_STREAMOUT * restrict values)
3506 {
3507 uint32_t *dw = (uint32_t * restrict) dst;
3508
3509 dw[0] =
3510 __gen_field(values->CommandType, 29, 31) |
3511 __gen_field(values->CommandSubType, 27, 28) |
3512 __gen_field(values->_3DCommandOpcode, 24, 26) |
3513 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3514 __gen_field(values->DwordLength, 0, 7) |
3515 0;
3516
3517 dw[1] =
3518 __gen_field(values->SOFunctionEnable, 31, 31) |
3519 __gen_field(values->RenderingDisable, 30, 30) |
3520 __gen_field(values->RenderStreamSelect, 27, 28) |
3521 __gen_field(values->ReorderMode, 26, 26) |
3522 __gen_field(values->SOStatisticsEnable, 25, 25) |
3523 __gen_field(values->SOBufferEnable3, 11, 11) |
3524 __gen_field(values->SOBufferEnable2, 10, 10) |
3525 __gen_field(values->SOBufferEnable1, 9, 9) |
3526 __gen_field(values->SOBufferEnable0, 8, 8) |
3527 0;
3528
3529 dw[2] =
3530 __gen_field(values->Stream3VertexReadOffset, 29, 29) |
3531 __gen_field(values->Stream3VertexReadLength, 24, 28) |
3532 __gen_field(values->Stream2VertexReadOffset, 21, 21) |
3533 __gen_field(values->Stream2VertexReadLength, 16, 20) |
3534 __gen_field(values->Stream1VertexReadOffset, 13, 13) |
3535 __gen_field(values->Stream1VertexReadLength, 8, 12) |
3536 __gen_field(values->Stream0VertexReadOffset, 5, 5) |
3537 __gen_field(values->Stream0VertexReadLength, 0, 4) |
3538 0;
3539
3540 }
3541
3542 #define GEN7_3DSTATE_TE_length_bias 0x00000002
3543 #define GEN7_3DSTATE_TE_header \
3544 .CommandType = 3, \
3545 .CommandSubType = 3, \
3546 ._3DCommandOpcode = 0, \
3547 ._3DCommandSubOpcode = 28, \
3548 .DwordLength = 2
3549
3550 #define GEN7_3DSTATE_TE_length 0x00000004
3551
3552 struct GEN7_3DSTATE_TE {
3553 uint32_t CommandType;
3554 uint32_t CommandSubType;
3555 uint32_t _3DCommandOpcode;
3556 uint32_t _3DCommandSubOpcode;
3557 uint32_t DwordLength;
3558 #define INTEGER 0
3559 #define ODD_FRACTIONAL 1
3560 #define EVEN_FRACTIONAL 2
3561 uint32_t Partitioning;
3562 #define POINT 0
3563 #define OUTPUT_LINE 1
3564 #define OUTPUT_TRI_CW 2
3565 #define OUTPUT_TRI_CCW 3
3566 uint32_t OutputTopology;
3567 #define QUAD 0
3568 #define TRI 1
3569 #define ISOLINE 2
3570 uint32_t TEDomain;
3571 #define HW_TESS 0
3572 #define SW_TESS 1
3573 uint32_t TEMode;
3574 bool TEEnable;
3575 float MaximumTessellationFactorOdd;
3576 float MaximumTessellationFactorNotOdd;
3577 };
3578
3579 static inline void
3580 GEN7_3DSTATE_TE_pack(__gen_user_data *data, void * restrict dst,
3581 const struct GEN7_3DSTATE_TE * restrict values)
3582 {
3583 uint32_t *dw = (uint32_t * restrict) dst;
3584
3585 dw[0] =
3586 __gen_field(values->CommandType, 29, 31) |
3587 __gen_field(values->CommandSubType, 27, 28) |
3588 __gen_field(values->_3DCommandOpcode, 24, 26) |
3589 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3590 __gen_field(values->DwordLength, 0, 7) |
3591 0;
3592
3593 dw[1] =
3594 __gen_field(values->Partitioning, 12, 13) |
3595 __gen_field(values->OutputTopology, 8, 9) |
3596 __gen_field(values->TEDomain, 4, 5) |
3597 __gen_field(values->TEMode, 1, 2) |
3598 __gen_field(values->TEEnable, 0, 0) |
3599 0;
3600
3601 dw[2] =
3602 __gen_float(values->MaximumTessellationFactorOdd) |
3603 0;
3604
3605 dw[3] =
3606 __gen_float(values->MaximumTessellationFactorNotOdd) |
3607 0;
3608
3609 }
3610
3611 #define GEN7_3DSTATE_URB_DS_length_bias 0x00000002
3612 #define GEN7_3DSTATE_URB_DS_header \
3613 .CommandType = 3, \
3614 .CommandSubType = 3, \
3615 ._3DCommandOpcode = 0, \
3616 ._3DCommandSubOpcode = 50, \
3617 .DwordLength = 0
3618
3619 #define GEN7_3DSTATE_URB_DS_length 0x00000002
3620
3621 struct GEN7_3DSTATE_URB_DS {
3622 uint32_t CommandType;
3623 uint32_t CommandSubType;
3624 uint32_t _3DCommandOpcode;
3625 uint32_t _3DCommandSubOpcode;
3626 uint32_t DwordLength;
3627 uint32_t DSURBStartingAddress;
3628 uint32_t DSURBEntryAllocationSize;
3629 uint32_t DSNumberofURBEntries;
3630 };
3631
3632 static inline void
3633 GEN7_3DSTATE_URB_DS_pack(__gen_user_data *data, void * restrict dst,
3634 const struct GEN7_3DSTATE_URB_DS * restrict values)
3635 {
3636 uint32_t *dw = (uint32_t * restrict) dst;
3637
3638 dw[0] =
3639 __gen_field(values->CommandType, 29, 31) |
3640 __gen_field(values->CommandSubType, 27, 28) |
3641 __gen_field(values->_3DCommandOpcode, 24, 26) |
3642 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3643 __gen_field(values->DwordLength, 0, 7) |
3644 0;
3645
3646 dw[1] =
3647 __gen_field(values->DSURBStartingAddress, 25, 29) |
3648 __gen_field(values->DSURBEntryAllocationSize, 16, 24) |
3649 __gen_field(values->DSNumberofURBEntries, 0, 15) |
3650 0;
3651
3652 }
3653
3654 #define GEN7_3DSTATE_URB_GS_length_bias 0x00000002
3655 #define GEN7_3DSTATE_URB_GS_header \
3656 .CommandType = 3, \
3657 .CommandSubType = 3, \
3658 ._3DCommandOpcode = 0, \
3659 ._3DCommandSubOpcode = 51, \
3660 .DwordLength = 0
3661
3662 #define GEN7_3DSTATE_URB_GS_length 0x00000002
3663
3664 struct GEN7_3DSTATE_URB_GS {
3665 uint32_t CommandType;
3666 uint32_t CommandSubType;
3667 uint32_t _3DCommandOpcode;
3668 uint32_t _3DCommandSubOpcode;
3669 uint32_t DwordLength;
3670 uint32_t GSURBStartingAddress;
3671 uint32_t GSURBEntryAllocationSize;
3672 uint32_t GSNumberofURBEntries;
3673 };
3674
3675 static inline void
3676 GEN7_3DSTATE_URB_GS_pack(__gen_user_data *data, void * restrict dst,
3677 const struct GEN7_3DSTATE_URB_GS * restrict values)
3678 {
3679 uint32_t *dw = (uint32_t * restrict) dst;
3680
3681 dw[0] =
3682 __gen_field(values->CommandType, 29, 31) |
3683 __gen_field(values->CommandSubType, 27, 28) |
3684 __gen_field(values->_3DCommandOpcode, 24, 26) |
3685 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3686 __gen_field(values->DwordLength, 0, 7) |
3687 0;
3688
3689 dw[1] =
3690 __gen_field(values->GSURBStartingAddress, 25, 29) |
3691 __gen_field(values->GSURBEntryAllocationSize, 16, 24) |
3692 __gen_field(values->GSNumberofURBEntries, 0, 15) |
3693 0;
3694
3695 }
3696
3697 #define GEN7_3DSTATE_URB_HS_length_bias 0x00000002
3698 #define GEN7_3DSTATE_URB_HS_header \
3699 .CommandType = 3, \
3700 .CommandSubType = 3, \
3701 ._3DCommandOpcode = 0, \
3702 ._3DCommandSubOpcode = 49, \
3703 .DwordLength = 0
3704
3705 #define GEN7_3DSTATE_URB_HS_length 0x00000002
3706
3707 struct GEN7_3DSTATE_URB_HS {
3708 uint32_t CommandType;
3709 uint32_t CommandSubType;
3710 uint32_t _3DCommandOpcode;
3711 uint32_t _3DCommandSubOpcode;
3712 uint32_t DwordLength;
3713 uint32_t HSURBStartingAddress;
3714 uint32_t HSURBEntryAllocationSize;
3715 uint32_t HSNumberofURBEntries;
3716 };
3717
3718 static inline void
3719 GEN7_3DSTATE_URB_HS_pack(__gen_user_data *data, void * restrict dst,
3720 const struct GEN7_3DSTATE_URB_HS * restrict values)
3721 {
3722 uint32_t *dw = (uint32_t * restrict) dst;
3723
3724 dw[0] =
3725 __gen_field(values->CommandType, 29, 31) |
3726 __gen_field(values->CommandSubType, 27, 28) |
3727 __gen_field(values->_3DCommandOpcode, 24, 26) |
3728 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3729 __gen_field(values->DwordLength, 0, 7) |
3730 0;
3731
3732 dw[1] =
3733 __gen_field(values->HSURBStartingAddress, 25, 29) |
3734 __gen_field(values->HSURBEntryAllocationSize, 16, 24) |
3735 __gen_field(values->HSNumberofURBEntries, 0, 15) |
3736 0;
3737
3738 }
3739
3740 #define GEN7_3DSTATE_VERTEX_BUFFERS_length_bias 0x00000002
3741 #define GEN7_3DSTATE_VERTEX_BUFFERS_header \
3742 .CommandType = 3, \
3743 .CommandSubType = 3, \
3744 ._3DCommandOpcode = 0, \
3745 ._3DCommandSubOpcode = 8
3746
3747 #define GEN7_3DSTATE_VERTEX_BUFFERS_length 0x00000000
3748
3749 #define GEN7_VERTEX_BUFFER_STATE_length 0x00000004
3750
3751 struct GEN7_VERTEX_BUFFER_STATE {
3752 uint32_t VertexBufferIndex;
3753 #define VERTEXDATA 0
3754 #define INSTANCEDATA 1
3755 uint32_t BufferAccessType;
3756 struct GEN7_MEMORY_OBJECT_CONTROL_STATE VertexBufferMemoryObjectControlState;
3757 uint32_t AddressModifyEnable;
3758 bool NullVertexBuffer;
3759 uint32_t VertexFetchInvalidate;
3760 uint32_t BufferPitch;
3761 __gen_address_type BufferStartingAddress;
3762 __gen_address_type EndAddress;
3763 uint32_t InstanceDataStepRate;
3764 };
3765
3766 static inline void
3767 GEN7_VERTEX_BUFFER_STATE_pack(__gen_user_data *data, void * restrict dst,
3768 const struct GEN7_VERTEX_BUFFER_STATE * restrict values)
3769 {
3770 uint32_t *dw = (uint32_t * restrict) dst;
3771
3772 uint32_t dw_VertexBufferMemoryObjectControlState;
3773 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_VertexBufferMemoryObjectControlState, &values->VertexBufferMemoryObjectControlState);
3774 dw[0] =
3775 __gen_field(values->VertexBufferIndex, 26, 31) |
3776 __gen_field(values->BufferAccessType, 20, 20) |
3777 __gen_field(dw_VertexBufferMemoryObjectControlState, 16, 19) |
3778 __gen_field(values->AddressModifyEnable, 14, 14) |
3779 __gen_field(values->NullVertexBuffer, 13, 13) |
3780 __gen_field(values->VertexFetchInvalidate, 12, 12) |
3781 __gen_field(values->BufferPitch, 0, 11) |
3782 0;
3783
3784 uint32_t dw1 =
3785 0;
3786
3787 dw[1] =
3788 __gen_combine_address(data, &dw[1], values->BufferStartingAddress, dw1);
3789
3790 uint32_t dw2 =
3791 0;
3792
3793 dw[2] =
3794 __gen_combine_address(data, &dw[2], values->EndAddress, dw2);
3795
3796 dw[3] =
3797 __gen_field(values->InstanceDataStepRate, 0, 31) |
3798 0;
3799
3800 }
3801
3802 struct GEN7_3DSTATE_VERTEX_BUFFERS {
3803 uint32_t CommandType;
3804 uint32_t CommandSubType;
3805 uint32_t _3DCommandOpcode;
3806 uint32_t _3DCommandSubOpcode;
3807 uint32_t DwordLength;
3808 /* variable length fields follow */
3809 };
3810
3811 static inline void
3812 GEN7_3DSTATE_VERTEX_BUFFERS_pack(__gen_user_data *data, void * restrict dst,
3813 const struct GEN7_3DSTATE_VERTEX_BUFFERS * restrict values)
3814 {
3815 uint32_t *dw = (uint32_t * restrict) dst;
3816
3817 dw[0] =
3818 __gen_field(values->CommandType, 29, 31) |
3819 __gen_field(values->CommandSubType, 27, 28) |
3820 __gen_field(values->_3DCommandOpcode, 24, 26) |
3821 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3822 __gen_field(values->DwordLength, 0, 7) |
3823 0;
3824
3825 /* variable length fields follow */
3826 }
3827
3828 #define GEN7_3DSTATE_VERTEX_ELEMENTS_length_bias 0x00000002
3829 #define GEN7_3DSTATE_VERTEX_ELEMENTS_header \
3830 .CommandType = 3, \
3831 .CommandSubType = 3, \
3832 ._3DCommandOpcode = 0, \
3833 ._3DCommandSubOpcode = 9
3834
3835 #define GEN7_3DSTATE_VERTEX_ELEMENTS_length 0x00000000
3836
3837 #define GEN7_VERTEX_ELEMENT_STATE_length 0x00000002
3838
3839 struct GEN7_VERTEX_ELEMENT_STATE {
3840 uint32_t VertexBufferIndex;
3841 bool Valid;
3842 uint32_t SourceElementFormat;
3843 bool EdgeFlagEnable;
3844 uint32_t SourceElementOffset;
3845 uint32_t Component0Control;
3846 uint32_t Component1Control;
3847 uint32_t Component2Control;
3848 uint32_t Component3Control;
3849 };
3850
3851 static inline void
3852 GEN7_VERTEX_ELEMENT_STATE_pack(__gen_user_data *data, void * restrict dst,
3853 const struct GEN7_VERTEX_ELEMENT_STATE * restrict values)
3854 {
3855 uint32_t *dw = (uint32_t * restrict) dst;
3856
3857 dw[0] =
3858 __gen_field(values->VertexBufferIndex, 26, 31) |
3859 __gen_field(values->Valid, 25, 25) |
3860 __gen_field(values->SourceElementFormat, 16, 24) |
3861 __gen_field(values->EdgeFlagEnable, 15, 15) |
3862 __gen_field(values->SourceElementOffset, 0, 11) |
3863 0;
3864
3865 dw[1] =
3866 __gen_field(values->Component0Control, 28, 30) |
3867 __gen_field(values->Component1Control, 24, 26) |
3868 __gen_field(values->Component2Control, 20, 22) |
3869 __gen_field(values->Component3Control, 16, 18) |
3870 0;
3871
3872 }
3873
3874 struct GEN7_3DSTATE_VERTEX_ELEMENTS {
3875 uint32_t CommandType;
3876 uint32_t CommandSubType;
3877 uint32_t _3DCommandOpcode;
3878 uint32_t _3DCommandSubOpcode;
3879 uint32_t DwordLength;
3880 /* variable length fields follow */
3881 };
3882
3883 static inline void
3884 GEN7_3DSTATE_VERTEX_ELEMENTS_pack(__gen_user_data *data, void * restrict dst,
3885 const struct GEN7_3DSTATE_VERTEX_ELEMENTS * restrict values)
3886 {
3887 uint32_t *dw = (uint32_t * restrict) dst;
3888
3889 dw[0] =
3890 __gen_field(values->CommandType, 29, 31) |
3891 __gen_field(values->CommandSubType, 27, 28) |
3892 __gen_field(values->_3DCommandOpcode, 24, 26) |
3893 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3894 __gen_field(values->DwordLength, 0, 7) |
3895 0;
3896
3897 /* variable length fields follow */
3898 }
3899
3900 #define GEN7_3DSTATE_VF_STATISTICS_length_bias 0x00000001
3901 #define GEN7_3DSTATE_VF_STATISTICS_header \
3902 .CommandType = 3, \
3903 .CommandSubType = 1, \
3904 ._3DCommandOpcode = 0, \
3905 ._3DCommandSubOpcode = 11
3906
3907 #define GEN7_3DSTATE_VF_STATISTICS_length 0x00000001
3908
3909 struct GEN7_3DSTATE_VF_STATISTICS {
3910 uint32_t CommandType;
3911 uint32_t CommandSubType;
3912 uint32_t _3DCommandOpcode;
3913 uint32_t _3DCommandSubOpcode;
3914 bool StatisticsEnable;
3915 };
3916
3917 static inline void
3918 GEN7_3DSTATE_VF_STATISTICS_pack(__gen_user_data *data, void * restrict dst,
3919 const struct GEN7_3DSTATE_VF_STATISTICS * restrict values)
3920 {
3921 uint32_t *dw = (uint32_t * restrict) dst;
3922
3923 dw[0] =
3924 __gen_field(values->CommandType, 29, 31) |
3925 __gen_field(values->CommandSubType, 27, 28) |
3926 __gen_field(values->_3DCommandOpcode, 24, 26) |
3927 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3928 __gen_field(values->StatisticsEnable, 0, 0) |
3929 0;
3930
3931 }
3932
3933 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length_bias 0x00000002
3934 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_header\
3935 .CommandType = 3, \
3936 .CommandSubType = 3, \
3937 ._3DCommandOpcode = 0, \
3938 ._3DCommandSubOpcode = 35, \
3939 .DwordLength = 0
3940
3941 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length 0x00000002
3942
3943 struct GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC {
3944 uint32_t CommandType;
3945 uint32_t CommandSubType;
3946 uint32_t _3DCommandOpcode;
3947 uint32_t _3DCommandSubOpcode;
3948 uint32_t DwordLength;
3949 uint32_t CCViewportPointer;
3950 };
3951
3952 static inline void
3953 GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_pack(__gen_user_data *data, void * restrict dst,
3954 const struct GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC * restrict values)
3955 {
3956 uint32_t *dw = (uint32_t * restrict) dst;
3957
3958 dw[0] =
3959 __gen_field(values->CommandType, 29, 31) |
3960 __gen_field(values->CommandSubType, 27, 28) |
3961 __gen_field(values->_3DCommandOpcode, 24, 26) |
3962 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3963 __gen_field(values->DwordLength, 0, 7) |
3964 0;
3965
3966 dw[1] =
3967 __gen_offset(values->CCViewportPointer, 5, 31) |
3968 0;
3969
3970 }
3971
3972 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length_bias 0x00000002
3973 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_header\
3974 .CommandType = 3, \
3975 .CommandSubType = 3, \
3976 ._3DCommandOpcode = 0, \
3977 ._3DCommandSubOpcode = 33, \
3978 .DwordLength = 0
3979
3980 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length 0x00000002
3981
3982 struct GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP {
3983 uint32_t CommandType;
3984 uint32_t CommandSubType;
3985 uint32_t _3DCommandOpcode;
3986 uint32_t _3DCommandSubOpcode;
3987 uint32_t DwordLength;
3988 uint32_t SFClipViewportPointer;
3989 };
3990
3991 static inline void
3992 GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_pack(__gen_user_data *data, void * restrict dst,
3993 const struct GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP * restrict values)
3994 {
3995 uint32_t *dw = (uint32_t * restrict) dst;
3996
3997 dw[0] =
3998 __gen_field(values->CommandType, 29, 31) |
3999 __gen_field(values->CommandSubType, 27, 28) |
4000 __gen_field(values->_3DCommandOpcode, 24, 26) |
4001 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4002 __gen_field(values->DwordLength, 0, 7) |
4003 0;
4004
4005 dw[1] =
4006 __gen_offset(values->SFClipViewportPointer, 6, 31) |
4007 0;
4008
4009 }
4010
4011 #define GEN7_3DSTATE_VS_length_bias 0x00000002
4012 #define GEN7_3DSTATE_VS_header \
4013 .CommandType = 3, \
4014 .CommandSubType = 3, \
4015 ._3DCommandOpcode = 0, \
4016 ._3DCommandSubOpcode = 16, \
4017 .DwordLength = 4
4018
4019 #define GEN7_3DSTATE_VS_length 0x00000006
4020
4021 struct GEN7_3DSTATE_VS {
4022 uint32_t CommandType;
4023 uint32_t CommandSubType;
4024 uint32_t _3DCommandOpcode;
4025 uint32_t _3DCommandSubOpcode;
4026 uint32_t DwordLength;
4027 uint32_t KernelStartPointer;
4028 #define Multiple 0
4029 #define Single 1
4030 uint32_t SingleVertexDispatch;
4031 #define Dmask 0
4032 #define Vmask 1
4033 uint32_t VectorMaskEnableVME;
4034 #define NoSamplers 0
4035 #define _14Samplers 1
4036 #define _58Samplers 2
4037 #define _912Samplers 3
4038 #define _1316Samplers 4
4039 uint32_t SamplerCount;
4040 uint32_t BindingTableEntryCount;
4041 #define IEEE754 0
4042 #define Alternate 1
4043 uint32_t FloatingPointMode;
4044 bool IllegalOpcodeExceptionEnable;
4045 bool SoftwareExceptionEnable;
4046 uint32_t ScratchSpaceBaseOffset;
4047 uint32_t PerThreadScratchSpace;
4048 uint32_t DispatchGRFStartRegisterforURBData;
4049 uint32_t VertexURBEntryReadLength;
4050 uint32_t VertexURBEntryReadOffset;
4051 uint32_t MaximumNumberofThreads;
4052 bool StatisticsEnable;
4053 bool VertexCacheDisable;
4054 bool VSFunctionEnable;
4055 };
4056
4057 static inline void
4058 GEN7_3DSTATE_VS_pack(__gen_user_data *data, void * restrict dst,
4059 const struct GEN7_3DSTATE_VS * restrict values)
4060 {
4061 uint32_t *dw = (uint32_t * restrict) dst;
4062
4063 dw[0] =
4064 __gen_field(values->CommandType, 29, 31) |
4065 __gen_field(values->CommandSubType, 27, 28) |
4066 __gen_field(values->_3DCommandOpcode, 24, 26) |
4067 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4068 __gen_field(values->DwordLength, 0, 7) |
4069 0;
4070
4071 dw[1] =
4072 __gen_offset(values->KernelStartPointer, 6, 31) |
4073 0;
4074
4075 dw[2] =
4076 __gen_field(values->SingleVertexDispatch, 31, 31) |
4077 __gen_field(values->VectorMaskEnableVME, 30, 30) |
4078 __gen_field(values->SamplerCount, 27, 29) |
4079 __gen_field(values->BindingTableEntryCount, 18, 25) |
4080 __gen_field(values->FloatingPointMode, 16, 16) |
4081 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
4082 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
4083 0;
4084
4085 dw[3] =
4086 __gen_offset(values->ScratchSpaceBaseOffset, 10, 31) |
4087 __gen_field(values->PerThreadScratchSpace, 0, 3) |
4088 0;
4089
4090 dw[4] =
4091 __gen_field(values->DispatchGRFStartRegisterforURBData, 20, 24) |
4092 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
4093 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
4094 0;
4095
4096 dw[5] =
4097 __gen_field(values->MaximumNumberofThreads, 25, 31) |
4098 __gen_field(values->StatisticsEnable, 10, 10) |
4099 __gen_field(values->VertexCacheDisable, 1, 1) |
4100 __gen_field(values->VSFunctionEnable, 0, 0) |
4101 0;
4102
4103 }
4104
4105 #define GEN7_3DSTATE_WM_length_bias 0x00000002
4106 #define GEN7_3DSTATE_WM_header \
4107 .CommandType = 3, \
4108 .CommandSubType = 3, \
4109 ._3DCommandOpcode = 0, \
4110 ._3DCommandSubOpcode = 20, \
4111 .DwordLength = 1
4112
4113 #define GEN7_3DSTATE_WM_length 0x00000003
4114
4115 struct GEN7_3DSTATE_WM {
4116 uint32_t CommandType;
4117 uint32_t CommandSubType;
4118 uint32_t _3DCommandOpcode;
4119 uint32_t _3DCommandSubOpcode;
4120 uint32_t DwordLength;
4121 bool StatisticsEnable;
4122 bool DepthBufferClear;
4123 bool ThreadDispatchEnable;
4124 bool DepthBufferResolveEnable;
4125 bool HierarchicalDepthBufferResolveEnable;
4126 bool LegacyDiamondLineRasterization;
4127 bool PixelShaderKillPixel;
4128 #define PSCDEPTH_OFF 0
4129 #define PSCDEPTH_ON 1
4130 #define PSCDEPTH_ON_GE 2
4131 #define PSCDEPTH_ON_LE 3
4132 uint32_t PixelShaderComputedDepthMode;
4133 #define EDSC_NORMAL 0
4134 #define EDSC_PSEXEC 1
4135 #define EDSC_PREPS 2
4136 uint32_t EarlyDepthStencilControl;
4137 bool PixelShaderUsesSourceDepth;
4138 bool PixelShaderUsesSourceW;
4139 #define INTERP_PIXEL 0
4140 #define INTERP_CENTROID 2
4141 #define INTERP_SAMPLE 3
4142 uint32_t PositionZWInterpolationMode;
4143 uint32_t BarycentricInterpolationMode;
4144 bool PixelShaderUsesInputCoverageMask;
4145 uint32_t LineEndCapAntialiasingRegionWidth;
4146 uint32_t LineAntialiasingRegionWidth;
4147 bool PolygonStippleEnable;
4148 bool LineStippleEnable;
4149 #define RASTRULE_UPPER_LEFT 0
4150 #define RASTRULE_UPPER_RIGHT 1
4151 uint32_t PointRasterizationRule;
4152 #define MSRASTMODE_OFF_PIXEL 0
4153 #define MSRASTMODE_OFF_PATTERN 1
4154 #define MSRASTMODE_ON_PIXEL 2
4155 #define MSRASTMODE_ON_PATTERN 3
4156 uint32_t MultisampleRasterizationMode;
4157 #define MSDISPMODE_PERSAMPLE 0
4158 #define MSDISPMODE_PERPIXEL 1
4159 uint32_t MultisampleDispatchMode;
4160 };
4161
4162 static inline void
4163 GEN7_3DSTATE_WM_pack(__gen_user_data *data, void * restrict dst,
4164 const struct GEN7_3DSTATE_WM * restrict values)
4165 {
4166 uint32_t *dw = (uint32_t * restrict) dst;
4167
4168 dw[0] =
4169 __gen_field(values->CommandType, 29, 31) |
4170 __gen_field(values->CommandSubType, 27, 28) |
4171 __gen_field(values->_3DCommandOpcode, 24, 26) |
4172 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4173 __gen_field(values->DwordLength, 0, 7) |
4174 0;
4175
4176 dw[1] =
4177 __gen_field(values->StatisticsEnable, 31, 31) |
4178 __gen_field(values->DepthBufferClear, 30, 30) |
4179 __gen_field(values->ThreadDispatchEnable, 29, 29) |
4180 __gen_field(values->DepthBufferResolveEnable, 28, 28) |
4181 __gen_field(values->HierarchicalDepthBufferResolveEnable, 27, 27) |
4182 __gen_field(values->LegacyDiamondLineRasterization, 26, 26) |
4183 __gen_field(values->PixelShaderKillPixel, 25, 25) |
4184 __gen_field(values->PixelShaderComputedDepthMode, 23, 24) |
4185 __gen_field(values->EarlyDepthStencilControl, 21, 22) |
4186 __gen_field(values->PixelShaderUsesSourceDepth, 20, 20) |
4187 __gen_field(values->PixelShaderUsesSourceW, 19, 19) |
4188 __gen_field(values->PositionZWInterpolationMode, 17, 18) |
4189 __gen_field(values->BarycentricInterpolationMode, 11, 16) |
4190 __gen_field(values->PixelShaderUsesInputCoverageMask, 10, 10) |
4191 __gen_field(values->LineEndCapAntialiasingRegionWidth, 8, 9) |
4192 __gen_field(values->LineAntialiasingRegionWidth, 6, 7) |
4193 __gen_field(values->PolygonStippleEnable, 4, 4) |
4194 __gen_field(values->LineStippleEnable, 3, 3) |
4195 __gen_field(values->PointRasterizationRule, 2, 2) |
4196 __gen_field(values->MultisampleRasterizationMode, 0, 1) |
4197 0;
4198
4199 dw[2] =
4200 __gen_field(values->MultisampleDispatchMode, 31, 31) |
4201 0;
4202
4203 }
4204
4205 #define GEN7_GPGPU_OBJECT_length_bias 0x00000002
4206 #define GEN7_GPGPU_OBJECT_header \
4207 .CommandType = 3, \
4208 .Pipeline = 2, \
4209 .MediaCommandOpcode = 1, \
4210 .SubOpcode = 4, \
4211 .DwordLength = 6
4212
4213 #define GEN7_GPGPU_OBJECT_length 0x00000008
4214
4215 struct GEN7_GPGPU_OBJECT {
4216 uint32_t CommandType;
4217 uint32_t Pipeline;
4218 uint32_t MediaCommandOpcode;
4219 uint32_t SubOpcode;
4220 bool PredicateEnable;
4221 uint32_t DwordLength;
4222 uint32_t SharedLocalMemoryFixedOffset;
4223 uint32_t InterfaceDescriptorOffset;
4224 uint32_t SharedLocalMemoryOffset;
4225 uint32_t EndofThreadGroup;
4226 #define HalfSlice1 2
4227 #define HalfSlice0 1
4228 #define EitherHalfSlice 0
4229 uint32_t HalfSliceDestinationSelect;
4230 uint32_t IndirectDataLength;
4231 uint32_t IndirectDataStartAddress;
4232 uint32_t ThreadGroupIDX;
4233 uint32_t ThreadGroupIDY;
4234 uint32_t ThreadGroupIDZ;
4235 uint32_t ExecutionMask;
4236 };
4237
4238 static inline void
4239 GEN7_GPGPU_OBJECT_pack(__gen_user_data *data, void * restrict dst,
4240 const struct GEN7_GPGPU_OBJECT * restrict values)
4241 {
4242 uint32_t *dw = (uint32_t * restrict) dst;
4243
4244 dw[0] =
4245 __gen_field(values->CommandType, 29, 31) |
4246 __gen_field(values->Pipeline, 27, 28) |
4247 __gen_field(values->MediaCommandOpcode, 24, 26) |
4248 __gen_field(values->SubOpcode, 16, 23) |
4249 __gen_field(values->PredicateEnable, 8, 8) |
4250 __gen_field(values->DwordLength, 0, 7) |
4251 0;
4252
4253 dw[1] =
4254 __gen_field(values->SharedLocalMemoryFixedOffset, 7, 7) |
4255 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
4256 0;
4257
4258 dw[2] =
4259 __gen_field(values->SharedLocalMemoryOffset, 28, 31) |
4260 __gen_field(values->EndofThreadGroup, 24, 24) |
4261 __gen_field(values->HalfSliceDestinationSelect, 17, 18) |
4262 __gen_field(values->IndirectDataLength, 0, 16) |
4263 0;
4264
4265 dw[3] =
4266 __gen_offset(values->IndirectDataStartAddress, 0, 31) |
4267 0;
4268
4269 dw[4] =
4270 __gen_field(values->ThreadGroupIDX, 0, 31) |
4271 0;
4272
4273 dw[5] =
4274 __gen_field(values->ThreadGroupIDY, 0, 31) |
4275 0;
4276
4277 dw[6] =
4278 __gen_field(values->ThreadGroupIDZ, 0, 31) |
4279 0;
4280
4281 dw[7] =
4282 __gen_field(values->ExecutionMask, 0, 31) |
4283 0;
4284
4285 }
4286
4287 #define GEN7_GPGPU_WALKER_length_bias 0x00000002
4288 #define GEN7_GPGPU_WALKER_header \
4289 .CommandType = 3, \
4290 .Pipeline = 2, \
4291 .MediaCommandOpcode = 1, \
4292 .SubOpcodeA = 5, \
4293 .DwordLength = 9
4294
4295 #define GEN7_GPGPU_WALKER_length 0x0000000b
4296
4297 struct GEN7_GPGPU_WALKER {
4298 uint32_t CommandType;
4299 uint32_t Pipeline;
4300 uint32_t MediaCommandOpcode;
4301 uint32_t SubOpcodeA;
4302 bool IndirectParameterEnable;
4303 bool PredicateEnable;
4304 uint32_t DwordLength;
4305 uint32_t InterfaceDescriptorOffset;
4306 #define SIMD8 0
4307 #define SIMD16 1
4308 #define SIMD32 2
4309 uint32_t SIMDSize;
4310 uint32_t ThreadDepthCounterMaximum;
4311 uint32_t ThreadHeightCounterMaximum;
4312 uint32_t ThreadWidthCounterMaximum;
4313 uint32_t ThreadGroupIDStartingX;
4314 uint32_t ThreadGroupIDXDimension;
4315 uint32_t ThreadGroupIDStartingY;
4316 uint32_t ThreadGroupIDYDimension;
4317 uint32_t ThreadGroupIDStartingZ;
4318 uint32_t ThreadGroupIDZDimension;
4319 uint32_t RightExecutionMask;
4320 uint32_t BottomExecutionMask;
4321 };
4322
4323 static inline void
4324 GEN7_GPGPU_WALKER_pack(__gen_user_data *data, void * restrict dst,
4325 const struct GEN7_GPGPU_WALKER * restrict values)
4326 {
4327 uint32_t *dw = (uint32_t * restrict) dst;
4328
4329 dw[0] =
4330 __gen_field(values->CommandType, 29, 31) |
4331 __gen_field(values->Pipeline, 27, 28) |
4332 __gen_field(values->MediaCommandOpcode, 24, 26) |
4333 __gen_field(values->SubOpcodeA, 16, 23) |
4334 __gen_field(values->IndirectParameterEnable, 10, 10) |
4335 __gen_field(values->PredicateEnable, 8, 8) |
4336 __gen_field(values->DwordLength, 0, 7) |
4337 0;
4338
4339 dw[1] =
4340 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
4341 0;
4342
4343 dw[2] =
4344 __gen_field(values->SIMDSize, 30, 31) |
4345 __gen_field(values->ThreadDepthCounterMaximum, 16, 21) |
4346 __gen_field(values->ThreadHeightCounterMaximum, 8, 13) |
4347 __gen_field(values->ThreadWidthCounterMaximum, 0, 5) |
4348 0;
4349
4350 dw[3] =
4351 __gen_field(values->ThreadGroupIDStartingX, 0, 31) |
4352 0;
4353
4354 dw[4] =
4355 __gen_field(values->ThreadGroupIDXDimension, 0, 31) |
4356 0;
4357
4358 dw[5] =
4359 __gen_field(values->ThreadGroupIDStartingY, 0, 31) |
4360 0;
4361
4362 dw[6] =
4363 __gen_field(values->ThreadGroupIDYDimension, 0, 31) |
4364 0;
4365
4366 dw[7] =
4367 __gen_field(values->ThreadGroupIDStartingZ, 0, 31) |
4368 0;
4369
4370 dw[8] =
4371 __gen_field(values->ThreadGroupIDZDimension, 0, 31) |
4372 0;
4373
4374 dw[9] =
4375 __gen_field(values->RightExecutionMask, 0, 31) |
4376 0;
4377
4378 dw[10] =
4379 __gen_field(values->BottomExecutionMask, 0, 31) |
4380 0;
4381
4382 }
4383
4384 #define GEN7_MEDIA_CURBE_LOAD_length_bias 0x00000002
4385 #define GEN7_MEDIA_CURBE_LOAD_header \
4386 .CommandType = 3, \
4387 .Pipeline = 2, \
4388 .MediaCommandOpcode = 0, \
4389 .SubOpcode = 1, \
4390 .DwordLength = 2
4391
4392 #define GEN7_MEDIA_CURBE_LOAD_length 0x00000004
4393
4394 struct GEN7_MEDIA_CURBE_LOAD {
4395 uint32_t CommandType;
4396 uint32_t Pipeline;
4397 uint32_t MediaCommandOpcode;
4398 uint32_t SubOpcode;
4399 uint32_t DwordLength;
4400 uint32_t CURBETotalDataLength;
4401 uint32_t CURBEDataStartAddress;
4402 };
4403
4404 static inline void
4405 GEN7_MEDIA_CURBE_LOAD_pack(__gen_user_data *data, void * restrict dst,
4406 const struct GEN7_MEDIA_CURBE_LOAD * restrict values)
4407 {
4408 uint32_t *dw = (uint32_t * restrict) dst;
4409
4410 dw[0] =
4411 __gen_field(values->CommandType, 29, 31) |
4412 __gen_field(values->Pipeline, 27, 28) |
4413 __gen_field(values->MediaCommandOpcode, 24, 26) |
4414 __gen_field(values->SubOpcode, 16, 23) |
4415 __gen_field(values->DwordLength, 0, 15) |
4416 0;
4417
4418 dw[1] =
4419 0;
4420
4421 dw[2] =
4422 __gen_field(values->CURBETotalDataLength, 0, 16) |
4423 0;
4424
4425 dw[3] =
4426 __gen_field(values->CURBEDataStartAddress, 0, 31) |
4427 0;
4428
4429 }
4430
4431 #define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length_bias 0x00000002
4432 #define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_header\
4433 .CommandType = 3, \
4434 .Pipeline = 2, \
4435 .MediaCommandOpcode = 0, \
4436 .SubOpcode = 2, \
4437 .DwordLength = 2
4438
4439 #define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 0x00000004
4440
4441 struct GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD {
4442 uint32_t CommandType;
4443 uint32_t Pipeline;
4444 uint32_t MediaCommandOpcode;
4445 uint32_t SubOpcode;
4446 uint32_t DwordLength;
4447 uint32_t InterfaceDescriptorTotalLength;
4448 uint32_t InterfaceDescriptorDataStartAddress;
4449 };
4450
4451 static inline void
4452 GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_pack(__gen_user_data *data, void * restrict dst,
4453 const struct GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD * restrict values)
4454 {
4455 uint32_t *dw = (uint32_t * restrict) dst;
4456
4457 dw[0] =
4458 __gen_field(values->CommandType, 29, 31) |
4459 __gen_field(values->Pipeline, 27, 28) |
4460 __gen_field(values->MediaCommandOpcode, 24, 26) |
4461 __gen_field(values->SubOpcode, 16, 23) |
4462 __gen_field(values->DwordLength, 0, 15) |
4463 0;
4464
4465 dw[1] =
4466 0;
4467
4468 dw[2] =
4469 __gen_field(values->InterfaceDescriptorTotalLength, 0, 16) |
4470 0;
4471
4472 dw[3] =
4473 __gen_offset(values->InterfaceDescriptorDataStartAddress, 0, 31) |
4474 0;
4475
4476 }
4477
4478 #define GEN7_MEDIA_OBJECT_length_bias 0x00000002
4479 #define GEN7_MEDIA_OBJECT_header \
4480 .CommandType = 3, \
4481 .MediaCommandPipeline = 2, \
4482 .MediaCommandOpcode = 1, \
4483 .MediaCommandSubOpcode = 0
4484
4485 #define GEN7_MEDIA_OBJECT_length 0x00000000
4486
4487 struct GEN7_MEDIA_OBJECT {
4488 uint32_t CommandType;
4489 uint32_t MediaCommandPipeline;
4490 uint32_t MediaCommandOpcode;
4491 uint32_t MediaCommandSubOpcode;
4492 uint32_t DwordLength;
4493 uint32_t InterfaceDescriptorOffset;
4494 bool ChildrenPresent;
4495 #define Nothreadsynchronization 0
4496 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
4497 uint32_t ThreadSynchronization;
4498 #define Notusingscoreboard 0
4499 #define Usingscoreboard 1
4500 uint32_t UseScoreboard;
4501 #define HalfSlice1 2
4502 #define HalfSlice0 1
4503 #define Eitherhalfslice 0
4504 uint32_t HalfSliceDestinationSelect;
4505 uint32_t IndirectDataLength;
4506 __gen_address_type IndirectDataStartAddress;
4507 uint32_t ScoredboardY;
4508 uint32_t ScoreboardX;
4509 uint32_t ScoreboardColor;
4510 bool ScoreboardMask;
4511 /* variable length fields follow */
4512 };
4513
4514 static inline void
4515 GEN7_MEDIA_OBJECT_pack(__gen_user_data *data, void * restrict dst,
4516 const struct GEN7_MEDIA_OBJECT * restrict values)
4517 {
4518 uint32_t *dw = (uint32_t * restrict) dst;
4519
4520 dw[0] =
4521 __gen_field(values->CommandType, 29, 31) |
4522 __gen_field(values->MediaCommandPipeline, 27, 28) |
4523 __gen_field(values->MediaCommandOpcode, 24, 26) |
4524 __gen_field(values->MediaCommandSubOpcode, 16, 23) |
4525 __gen_field(values->DwordLength, 0, 15) |
4526 0;
4527
4528 dw[1] =
4529 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
4530 0;
4531
4532 dw[2] =
4533 __gen_field(values->ChildrenPresent, 31, 31) |
4534 __gen_field(values->ThreadSynchronization, 24, 24) |
4535 __gen_field(values->UseScoreboard, 21, 21) |
4536 __gen_field(values->HalfSliceDestinationSelect, 17, 18) |
4537 __gen_field(values->IndirectDataLength, 0, 16) |
4538 0;
4539
4540 uint32_t dw3 =
4541 0;
4542
4543 dw[3] =
4544 __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, dw3);
4545
4546 dw[4] =
4547 __gen_field(values->ScoredboardY, 16, 24) |
4548 __gen_field(values->ScoreboardX, 0, 8) |
4549 0;
4550
4551 dw[5] =
4552 __gen_field(values->ScoreboardColor, 16, 19) |
4553 __gen_field(values->ScoreboardMask, 0, 7) |
4554 0;
4555
4556 /* variable length fields follow */
4557 }
4558
4559 #define GEN7_MEDIA_OBJECT_PRT_length_bias 0x00000002
4560 #define GEN7_MEDIA_OBJECT_PRT_header \
4561 .CommandType = 3, \
4562 .Pipeline = 2, \
4563 .MediaCommandOpcode = 1, \
4564 .SubOpcode = 2, \
4565 .DwordLength = 14
4566
4567 #define GEN7_MEDIA_OBJECT_PRT_length 0x00000010
4568
4569 struct GEN7_MEDIA_OBJECT_PRT {
4570 uint32_t CommandType;
4571 uint32_t Pipeline;
4572 uint32_t MediaCommandOpcode;
4573 uint32_t SubOpcode;
4574 uint32_t DwordLength;
4575 uint32_t InterfaceDescriptorOffset;
4576 bool ChildrenPresent;
4577 bool PRT_FenceNeeded;
4578 #define Rootthreadqueue 0
4579 #define VFEstateflush 1
4580 uint32_t PRT_FenceType;
4581 uint32_t InlineData[12];
4582 };
4583
4584 static inline void
4585 GEN7_MEDIA_OBJECT_PRT_pack(__gen_user_data *data, void * restrict dst,
4586 const struct GEN7_MEDIA_OBJECT_PRT * restrict values)
4587 {
4588 uint32_t *dw = (uint32_t * restrict) dst;
4589
4590 dw[0] =
4591 __gen_field(values->CommandType, 29, 31) |
4592 __gen_field(values->Pipeline, 27, 28) |
4593 __gen_field(values->MediaCommandOpcode, 24, 26) |
4594 __gen_field(values->SubOpcode, 16, 23) |
4595 __gen_field(values->DwordLength, 0, 15) |
4596 0;
4597
4598 dw[1] =
4599 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
4600 0;
4601
4602 dw[2] =
4603 __gen_field(values->ChildrenPresent, 31, 31) |
4604 __gen_field(values->PRT_FenceNeeded, 23, 23) |
4605 __gen_field(values->PRT_FenceType, 22, 22) |
4606 0;
4607
4608 dw[3] =
4609 0;
4610
4611 for (uint32_t i = 0, j = 4; i < 12; i += 1, j++) {
4612 dw[j] =
4613 __gen_field(values->InlineData[i + 0], 0, 31) |
4614 0;
4615 }
4616
4617 }
4618
4619 #define GEN7_MEDIA_OBJECT_WALKER_length_bias 0x00000002
4620 #define GEN7_MEDIA_OBJECT_WALKER_header \
4621 .CommandType = 3, \
4622 .Pipeline = 2, \
4623 .MediaCommandOpcode = 1, \
4624 .SubOpcode = 3
4625
4626 #define GEN7_MEDIA_OBJECT_WALKER_length 0x00000000
4627
4628 struct GEN7_MEDIA_OBJECT_WALKER {
4629 uint32_t CommandType;
4630 uint32_t Pipeline;
4631 uint32_t MediaCommandOpcode;
4632 uint32_t SubOpcode;
4633 uint32_t DwordLength;
4634 uint32_t InterfaceDescriptorOffset;
4635 bool ChildrenPresent;
4636 #define Nothreadsynchronization 0
4637 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
4638 uint32_t ThreadSynchronization;
4639 #define Notusingscoreboard 0
4640 #define Usingscoreboard 1
4641 uint32_t UseScoreboard;
4642 uint32_t IndirectDataLength;
4643 uint32_t IndirectDataStartAddress;
4644 bool ScoreboardMask;
4645 bool DualMode;
4646 bool Repel;
4647 uint32_t ColorCountMinusOne;
4648 uint32_t MiddleLoopExtraSteps;
4649 uint32_t LocalMidLoopUnitY;
4650 uint32_t MidLoopUnitX;
4651 uint32_t GlobalLoopExecCount;
4652 uint32_t LocalLoopExecCount;
4653 uint32_t BlockResolutionY;
4654 uint32_t BlockResolutionX;
4655 uint32_t LocalStartY;
4656 uint32_t LocalStartX;
4657 uint32_t LocalEndY;
4658 uint32_t LocalEndX;
4659 uint32_t LocalOuterLoopStrideY;
4660 uint32_t LocalOuterLoopStrideX;
4661 uint32_t LocalInnerLoopUnitY;
4662 uint32_t LocalInnerLoopUnitX;
4663 uint32_t GlobalResolutionY;
4664 uint32_t GlobalResolutionX;
4665 uint32_t GlobalStartY;
4666 uint32_t GlobalStartX;
4667 uint32_t GlobalOuterLoopStrideY;
4668 uint32_t GlobalOuterLoopStrideX;
4669 uint32_t GlobalInnerLoopUnitY;
4670 uint32_t GlobalInnerLoopUnitX;
4671 /* variable length fields follow */
4672 };
4673
4674 static inline void
4675 GEN7_MEDIA_OBJECT_WALKER_pack(__gen_user_data *data, void * restrict dst,
4676 const struct GEN7_MEDIA_OBJECT_WALKER * restrict values)
4677 {
4678 uint32_t *dw = (uint32_t * restrict) dst;
4679
4680 dw[0] =
4681 __gen_field(values->CommandType, 29, 31) |
4682 __gen_field(values->Pipeline, 27, 28) |
4683 __gen_field(values->MediaCommandOpcode, 24, 26) |
4684 __gen_field(values->SubOpcode, 16, 23) |
4685 __gen_field(values->DwordLength, 0, 15) |
4686 0;
4687
4688 dw[1] =
4689 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
4690 0;
4691
4692 dw[2] =
4693 __gen_field(values->ChildrenPresent, 31, 31) |
4694 __gen_field(values->ThreadSynchronization, 24, 24) |
4695 __gen_field(values->UseScoreboard, 21, 21) |
4696 __gen_field(values->IndirectDataLength, 0, 16) |
4697 0;
4698
4699 dw[3] =
4700 __gen_offset(values->IndirectDataStartAddress, 0, 31) |
4701 0;
4702
4703 dw[4] =
4704 0;
4705
4706 dw[5] =
4707 __gen_field(values->ScoreboardMask, 0, 7) |
4708 0;
4709
4710 dw[6] =
4711 __gen_field(values->DualMode, 31, 31) |
4712 __gen_field(values->Repel, 30, 30) |
4713 __gen_field(values->ColorCountMinusOne, 24, 27) |
4714 __gen_field(values->MiddleLoopExtraSteps, 16, 20) |
4715 __gen_field(values->LocalMidLoopUnitY, 12, 13) |
4716 __gen_field(values->MidLoopUnitX, 8, 9) |
4717 0;
4718
4719 dw[7] =
4720 __gen_field(values->GlobalLoopExecCount, 16, 25) |
4721 __gen_field(values->LocalLoopExecCount, 0, 9) |
4722 0;
4723
4724 dw[8] =
4725 __gen_field(values->BlockResolutionY, 16, 24) |
4726 __gen_field(values->BlockResolutionX, 0, 8) |
4727 0;
4728
4729 dw[9] =
4730 __gen_field(values->LocalStartY, 16, 24) |
4731 __gen_field(values->LocalStartX, 0, 8) |
4732 0;
4733
4734 dw[10] =
4735 __gen_field(values->LocalEndY, 16, 24) |
4736 __gen_field(values->LocalEndX, 0, 8) |
4737 0;
4738
4739 dw[11] =
4740 __gen_field(values->LocalOuterLoopStrideY, 16, 25) |
4741 __gen_field(values->LocalOuterLoopStrideX, 0, 9) |
4742 0;
4743
4744 dw[12] =
4745 __gen_field(values->LocalInnerLoopUnitY, 16, 25) |
4746 __gen_field(values->LocalInnerLoopUnitX, 0, 9) |
4747 0;
4748
4749 dw[13] =
4750 __gen_field(values->GlobalResolutionY, 16, 24) |
4751 __gen_field(values->GlobalResolutionX, 0, 8) |
4752 0;
4753
4754 dw[14] =
4755 __gen_field(values->GlobalStartY, 16, 25) |
4756 __gen_field(values->GlobalStartX, 0, 9) |
4757 0;
4758
4759 dw[15] =
4760 __gen_field(values->GlobalOuterLoopStrideY, 16, 25) |
4761 __gen_field(values->GlobalOuterLoopStrideX, 0, 9) |
4762 0;
4763
4764 dw[16] =
4765 __gen_field(values->GlobalInnerLoopUnitY, 16, 25) |
4766 __gen_field(values->GlobalInnerLoopUnitX, 0, 9) |
4767 0;
4768
4769 /* variable length fields follow */
4770 }
4771
4772 #define GEN7_MEDIA_STATE_FLUSH_length_bias 0x00000002
4773 #define GEN7_MEDIA_STATE_FLUSH_header \
4774 .CommandType = 3, \
4775 .Pipeline = 2, \
4776 .MediaCommandOpcode = 0, \
4777 .SubOpcode = 4, \
4778 .DwordLength = 0
4779
4780 #define GEN7_MEDIA_STATE_FLUSH_length 0x00000002
4781
4782 struct GEN7_MEDIA_STATE_FLUSH {
4783 uint32_t CommandType;
4784 uint32_t Pipeline;
4785 uint32_t MediaCommandOpcode;
4786 uint32_t SubOpcode;
4787 uint32_t DwordLength;
4788 uint32_t WatermarkRequired;
4789 uint32_t InterfaceDescriptorOffset;
4790 };
4791
4792 static inline void
4793 GEN7_MEDIA_STATE_FLUSH_pack(__gen_user_data *data, void * restrict dst,
4794 const struct GEN7_MEDIA_STATE_FLUSH * restrict values)
4795 {
4796 uint32_t *dw = (uint32_t * restrict) dst;
4797
4798 dw[0] =
4799 __gen_field(values->CommandType, 29, 31) |
4800 __gen_field(values->Pipeline, 27, 28) |
4801 __gen_field(values->MediaCommandOpcode, 24, 26) |
4802 __gen_field(values->SubOpcode, 16, 23) |
4803 __gen_field(values->DwordLength, 0, 15) |
4804 0;
4805
4806 dw[1] =
4807 __gen_field(values->WatermarkRequired, 6, 6) |
4808 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
4809 0;
4810
4811 }
4812
4813 #define GEN7_MEDIA_VFE_STATE_length_bias 0x00000002
4814 #define GEN7_MEDIA_VFE_STATE_header \
4815 .CommandType = 3, \
4816 .Pipeline = 2, \
4817 .MediaCommandOpcode = 0, \
4818 .SubOpcode = 0, \
4819 .DwordLength = 6
4820
4821 #define GEN7_MEDIA_VFE_STATE_length 0x00000008
4822
4823 struct GEN7_MEDIA_VFE_STATE {
4824 uint32_t CommandType;
4825 uint32_t Pipeline;
4826 uint32_t MediaCommandOpcode;
4827 uint32_t SubOpcode;
4828 uint32_t DwordLength;
4829 uint32_t ScratchSpaceBasePointer;
4830 uint32_t PerThreadScratchSpace;
4831 uint32_t MaximumNumberofThreads;
4832 uint32_t NumberofURBEntries;
4833 #define Maintainingtheexistingtimestampstate 0
4834 #define Resettingrelativetimerandlatchingtheglobaltimestamp 1
4835 uint32_t ResetGatewayTimer;
4836 #define MaintainingOpenGatewayForwardMsgCloseGatewayprotocollegacymode 0
4837 #define BypassingOpenGatewayCloseGatewayprotocol 1
4838 uint32_t BypassGatewayControl;
4839 #define NoMMIOreadwriteallowed 0
4840 #define MMIOreadwritetoanyaddress 2
4841 uint32_t GatewayMMIOAccessControl;
4842 uint32_t GPGPUMode;
4843 uint32_t URBEntryAllocationSize;
4844 uint32_t CURBEAllocationSize;
4845 #define Scoreboarddisabled 0
4846 #define Scoreboardenabled 1
4847 uint32_t ScoreboardEnable;
4848 #define StallingScoreboard 0
4849 #define NonStallingScoreboard 1
4850 uint32_t ScoreboardType;
4851 uint32_t ScoreboardMask;
4852 uint32_t Scoreboard3DeltaY;
4853 uint32_t Scoreboard3DeltaX;
4854 uint32_t Scoreboard2DeltaY;
4855 uint32_t Scoreboard2DeltaX;
4856 uint32_t Scoreboard1DeltaY;
4857 uint32_t Scoreboard1DeltaX;
4858 uint32_t Scoreboard0DeltaY;
4859 uint32_t Scoreboard0DeltaX;
4860 uint32_t Scoreboard7DeltaY;
4861 uint32_t Scoreboard7DeltaX;
4862 uint32_t Scoreboard6DeltaY;
4863 uint32_t Scoreboard6DeltaX;
4864 uint32_t Scoreboard5DeltaY;
4865 uint32_t Scoreboard5DeltaX;
4866 uint32_t Scoreboard4DeltaY;
4867 uint32_t Scoreboard4DeltaX;
4868 };
4869
4870 static inline void
4871 GEN7_MEDIA_VFE_STATE_pack(__gen_user_data *data, void * restrict dst,
4872 const struct GEN7_MEDIA_VFE_STATE * restrict values)
4873 {
4874 uint32_t *dw = (uint32_t * restrict) dst;
4875
4876 dw[0] =
4877 __gen_field(values->CommandType, 29, 31) |
4878 __gen_field(values->Pipeline, 27, 28) |
4879 __gen_field(values->MediaCommandOpcode, 24, 26) |
4880 __gen_field(values->SubOpcode, 16, 23) |
4881 __gen_field(values->DwordLength, 0, 15) |
4882 0;
4883
4884 dw[1] =
4885 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
4886 __gen_field(values->PerThreadScratchSpace, 0, 3) |
4887 0;
4888
4889 dw[2] =
4890 __gen_field(values->MaximumNumberofThreads, 16, 31) |
4891 __gen_field(values->NumberofURBEntries, 8, 15) |
4892 __gen_field(values->ResetGatewayTimer, 7, 7) |
4893 __gen_field(values->BypassGatewayControl, 6, 6) |
4894 __gen_field(values->GatewayMMIOAccessControl, 3, 4) |
4895 __gen_field(values->GPGPUMode, 2, 2) |
4896 0;
4897
4898 dw[3] =
4899 0;
4900
4901 dw[4] =
4902 __gen_field(values->URBEntryAllocationSize, 16, 31) |
4903 __gen_field(values->CURBEAllocationSize, 0, 15) |
4904 0;
4905
4906 dw[5] =
4907 __gen_field(values->ScoreboardEnable, 31, 31) |
4908 __gen_field(values->ScoreboardType, 30, 30) |
4909 __gen_field(values->ScoreboardMask, 0, 7) |
4910 0;
4911
4912 dw[6] =
4913 __gen_field(values->Scoreboard3DeltaY, 28, 31) |
4914 __gen_field(values->Scoreboard3DeltaX, 24, 27) |
4915 __gen_field(values->Scoreboard2DeltaY, 20, 23) |
4916 __gen_field(values->Scoreboard2DeltaX, 16, 19) |
4917 __gen_field(values->Scoreboard1DeltaY, 12, 15) |
4918 __gen_field(values->Scoreboard1DeltaX, 8, 11) |
4919 __gen_field(values->Scoreboard0DeltaY, 4, 7) |
4920 __gen_field(values->Scoreboard0DeltaX, 0, 3) |
4921 0;
4922
4923 dw[7] =
4924 __gen_field(values->Scoreboard7DeltaY, 28, 31) |
4925 __gen_field(values->Scoreboard7DeltaX, 24, 27) |
4926 __gen_field(values->Scoreboard6DeltaY, 20, 23) |
4927 __gen_field(values->Scoreboard6DeltaX, 16, 19) |
4928 __gen_field(values->Scoreboard5DeltaY, 12, 15) |
4929 __gen_field(values->Scoreboard5DeltaX, 8, 11) |
4930 __gen_field(values->Scoreboard4DeltaY, 4, 7) |
4931 __gen_field(values->Scoreboard4DeltaX, 0, 3) |
4932 0;
4933
4934 }
4935
4936 #define GEN7_MI_ARB_CHECK_length_bias 0x00000001
4937 #define GEN7_MI_ARB_CHECK_header \
4938 .CommandType = 0, \
4939 .MICommandOpcode = 5
4940
4941 #define GEN7_MI_ARB_CHECK_length 0x00000001
4942
4943 struct GEN7_MI_ARB_CHECK {
4944 uint32_t CommandType;
4945 uint32_t MICommandOpcode;
4946 };
4947
4948 static inline void
4949 GEN7_MI_ARB_CHECK_pack(__gen_user_data *data, void * restrict dst,
4950 const struct GEN7_MI_ARB_CHECK * restrict values)
4951 {
4952 uint32_t *dw = (uint32_t * restrict) dst;
4953
4954 dw[0] =
4955 __gen_field(values->CommandType, 29, 31) |
4956 __gen_field(values->MICommandOpcode, 23, 28) |
4957 0;
4958
4959 }
4960
4961 #define GEN7_MI_ARB_ON_OFF_length_bias 0x00000001
4962 #define GEN7_MI_ARB_ON_OFF_header \
4963 .CommandType = 0, \
4964 .MICommandOpcode = 8
4965
4966 #define GEN7_MI_ARB_ON_OFF_length 0x00000001
4967
4968 struct GEN7_MI_ARB_ON_OFF {
4969 uint32_t CommandType;
4970 uint32_t MICommandOpcode;
4971 bool ArbitrationEnable;
4972 };
4973
4974 static inline void
4975 GEN7_MI_ARB_ON_OFF_pack(__gen_user_data *data, void * restrict dst,
4976 const struct GEN7_MI_ARB_ON_OFF * restrict values)
4977 {
4978 uint32_t *dw = (uint32_t * restrict) dst;
4979
4980 dw[0] =
4981 __gen_field(values->CommandType, 29, 31) |
4982 __gen_field(values->MICommandOpcode, 23, 28) |
4983 __gen_field(values->ArbitrationEnable, 0, 0) |
4984 0;
4985
4986 }
4987
4988 #define GEN7_MI_BATCH_BUFFER_END_length_bias 0x00000001
4989 #define GEN7_MI_BATCH_BUFFER_END_header \
4990 .CommandType = 0, \
4991 .MICommandOpcode = 10
4992
4993 #define GEN7_MI_BATCH_BUFFER_END_length 0x00000001
4994
4995 struct GEN7_MI_BATCH_BUFFER_END {
4996 uint32_t CommandType;
4997 uint32_t MICommandOpcode;
4998 };
4999
5000 static inline void
5001 GEN7_MI_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
5002 const struct GEN7_MI_BATCH_BUFFER_END * restrict values)
5003 {
5004 uint32_t *dw = (uint32_t * restrict) dst;
5005
5006 dw[0] =
5007 __gen_field(values->CommandType, 29, 31) |
5008 __gen_field(values->MICommandOpcode, 23, 28) |
5009 0;
5010
5011 }
5012
5013 #define GEN7_MI_BATCH_BUFFER_START_length_bias 0x00000002
5014 #define GEN7_MI_BATCH_BUFFER_START_header \
5015 .CommandType = 0, \
5016 .MICommandOpcode = 49, \
5017 .DwordLength = 0
5018
5019 #define GEN7_MI_BATCH_BUFFER_START_length 0x00000002
5020
5021 struct GEN7_MI_BATCH_BUFFER_START {
5022 uint32_t CommandType;
5023 uint32_t MICommandOpcode;
5024 bool ClearCommandBufferEnable;
5025 #define ASI_GGTT 0
5026 #define ASI_PPGTT 1
5027 uint32_t AddressSpaceIndicator;
5028 uint32_t DwordLength;
5029 __gen_address_type BatchBufferStartAddress;
5030 };
5031
5032 static inline void
5033 GEN7_MI_BATCH_BUFFER_START_pack(__gen_user_data *data, void * restrict dst,
5034 const struct GEN7_MI_BATCH_BUFFER_START * restrict values)
5035 {
5036 uint32_t *dw = (uint32_t * restrict) dst;
5037
5038 dw[0] =
5039 __gen_field(values->CommandType, 29, 31) |
5040 __gen_field(values->MICommandOpcode, 23, 28) |
5041 __gen_field(values->ClearCommandBufferEnable, 11, 11) |
5042 __gen_field(values->AddressSpaceIndicator, 8, 8) |
5043 __gen_field(values->DwordLength, 0, 7) |
5044 0;
5045
5046 uint32_t dw1 =
5047 0;
5048
5049 dw[1] =
5050 __gen_combine_address(data, &dw[1], values->BatchBufferStartAddress, dw1);
5051
5052 }
5053
5054 #define GEN7_MI_CLFLUSH_length_bias 0x00000002
5055 #define GEN7_MI_CLFLUSH_header \
5056 .CommandType = 0, \
5057 .MICommandOpcode = 39
5058
5059 #define GEN7_MI_CLFLUSH_length 0x00000000
5060
5061 struct GEN7_MI_CLFLUSH {
5062 uint32_t CommandType;
5063 uint32_t MICommandOpcode;
5064 #define PerProcessGraphicsAddress 0
5065 #define GlobalGraphicsAddress 1
5066 uint32_t UseGlobalGTT;
5067 uint32_t DwordLength;
5068 __gen_address_type PageBaseAddress;
5069 uint32_t StartingCachelineOffset;
5070 __gen_address_type PageBaseAddressHigh;
5071 /* variable length fields follow */
5072 };
5073
5074 static inline void
5075 GEN7_MI_CLFLUSH_pack(__gen_user_data *data, void * restrict dst,
5076 const struct GEN7_MI_CLFLUSH * restrict values)
5077 {
5078 uint32_t *dw = (uint32_t * restrict) dst;
5079
5080 dw[0] =
5081 __gen_field(values->CommandType, 29, 31) |
5082 __gen_field(values->MICommandOpcode, 23, 28) |
5083 __gen_field(values->UseGlobalGTT, 22, 22) |
5084 __gen_field(values->DwordLength, 0, 9) |
5085 0;
5086
5087 uint32_t dw1 =
5088 __gen_field(values->StartingCachelineOffset, 6, 11) |
5089 0;
5090
5091 dw[1] =
5092 __gen_combine_address(data, &dw[1], values->PageBaseAddress, dw1);
5093
5094 uint32_t dw2 =
5095 0;
5096
5097 dw[2] =
5098 __gen_combine_address(data, &dw[2], values->PageBaseAddressHigh, dw2);
5099
5100 /* variable length fields follow */
5101 }
5102
5103 #define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_length_bias 0x00000002
5104 #define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_header\
5105 .CommandType = 0, \
5106 .MICommandOpcode = 54, \
5107 .UseGlobalGTT = 0, \
5108 .CompareSemaphore = 0, \
5109 .DwordLength = 0
5110
5111 #define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_length 0x00000002
5112
5113 struct GEN7_MI_CONDITIONAL_BATCH_BUFFER_END {
5114 uint32_t CommandType;
5115 uint32_t MICommandOpcode;
5116 uint32_t UseGlobalGTT;
5117 uint32_t CompareSemaphore;
5118 uint32_t DwordLength;
5119 uint32_t CompareDataDword;
5120 __gen_address_type CompareAddress;
5121 };
5122
5123 static inline void
5124 GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
5125 const struct GEN7_MI_CONDITIONAL_BATCH_BUFFER_END * restrict values)
5126 {
5127 uint32_t *dw = (uint32_t * restrict) dst;
5128
5129 dw[0] =
5130 __gen_field(values->CommandType, 29, 31) |
5131 __gen_field(values->MICommandOpcode, 23, 28) |
5132 __gen_field(values->UseGlobalGTT, 22, 22) |
5133 __gen_field(values->CompareSemaphore, 21, 21) |
5134 __gen_field(values->DwordLength, 0, 7) |
5135 0;
5136
5137 dw[1] =
5138 __gen_field(values->CompareDataDword, 0, 31) |
5139 0;
5140
5141 uint32_t dw2 =
5142 0;
5143
5144 dw[2] =
5145 __gen_combine_address(data, &dw[2], values->CompareAddress, dw2);
5146
5147 }
5148
5149 #define GEN7_MI_FLUSH_length_bias 0x00000001
5150 #define GEN7_MI_FLUSH_header \
5151 .CommandType = 0, \
5152 .MICommandOpcode = 4
5153
5154 #define GEN7_MI_FLUSH_length 0x00000001
5155
5156 struct GEN7_MI_FLUSH {
5157 uint32_t CommandType;
5158 uint32_t MICommandOpcode;
5159 bool IndirectStatePointersDisable;
5160 bool GenericMediaStateClear;
5161 #define DontReset 0
5162 #define Reset 1
5163 bool GlobalSnapshotCountReset;
5164 #define Flush 0
5165 #define DontFlush 1
5166 bool RenderCacheFlushInhibit;
5167 #define DontInvalidate 0
5168 #define Invalidate 1
5169 bool StateInstructionCacheInvalidate;
5170 };
5171
5172 static inline void
5173 GEN7_MI_FLUSH_pack(__gen_user_data *data, void * restrict dst,
5174 const struct GEN7_MI_FLUSH * restrict values)
5175 {
5176 uint32_t *dw = (uint32_t * restrict) dst;
5177
5178 dw[0] =
5179 __gen_field(values->CommandType, 29, 31) |
5180 __gen_field(values->MICommandOpcode, 23, 28) |
5181 __gen_field(values->IndirectStatePointersDisable, 5, 5) |
5182 __gen_field(values->GenericMediaStateClear, 4, 4) |
5183 __gen_field(values->GlobalSnapshotCountReset, 3, 3) |
5184 __gen_field(values->RenderCacheFlushInhibit, 2, 2) |
5185 __gen_field(values->StateInstructionCacheInvalidate, 1, 1) |
5186 0;
5187
5188 }
5189
5190 #define GEN7_MI_LOAD_REGISTER_IMM_length_bias 0x00000002
5191 #define GEN7_MI_LOAD_REGISTER_IMM_header \
5192 .CommandType = 0, \
5193 .MICommandOpcode = 34, \
5194 .DwordLength = 1
5195
5196 #define GEN7_MI_LOAD_REGISTER_IMM_length 0x00000003
5197
5198 struct GEN7_MI_LOAD_REGISTER_IMM {
5199 uint32_t CommandType;
5200 uint32_t MICommandOpcode;
5201 uint32_t ByteWriteDisables;
5202 uint32_t DwordLength;
5203 uint32_t RegisterOffset;
5204 uint32_t DataDWord;
5205 };
5206
5207 static inline void
5208 GEN7_MI_LOAD_REGISTER_IMM_pack(__gen_user_data *data, void * restrict dst,
5209 const struct GEN7_MI_LOAD_REGISTER_IMM * restrict values)
5210 {
5211 uint32_t *dw = (uint32_t * restrict) dst;
5212
5213 dw[0] =
5214 __gen_field(values->CommandType, 29, 31) |
5215 __gen_field(values->MICommandOpcode, 23, 28) |
5216 __gen_field(values->ByteWriteDisables, 8, 11) |
5217 __gen_field(values->DwordLength, 0, 7) |
5218 0;
5219
5220 dw[1] =
5221 __gen_offset(values->RegisterOffset, 2, 22) |
5222 0;
5223
5224 dw[2] =
5225 __gen_field(values->DataDWord, 0, 31) |
5226 0;
5227
5228 }
5229
5230 #define GEN7_MI_LOAD_REGISTER_MEM_length_bias 0x00000002
5231 #define GEN7_MI_LOAD_REGISTER_MEM_header \
5232 .CommandType = 0, \
5233 .MICommandOpcode = 41, \
5234 .DwordLength = 1
5235
5236 #define GEN7_MI_LOAD_REGISTER_MEM_length 0x00000003
5237
5238 struct GEN7_MI_LOAD_REGISTER_MEM {
5239 uint32_t CommandType;
5240 uint32_t MICommandOpcode;
5241 bool UseGlobalGTT;
5242 uint32_t AsyncModeEnable;
5243 uint32_t DwordLength;
5244 uint32_t RegisterAddress;
5245 __gen_address_type MemoryAddress;
5246 };
5247
5248 static inline void
5249 GEN7_MI_LOAD_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
5250 const struct GEN7_MI_LOAD_REGISTER_MEM * restrict values)
5251 {
5252 uint32_t *dw = (uint32_t * restrict) dst;
5253
5254 dw[0] =
5255 __gen_field(values->CommandType, 29, 31) |
5256 __gen_field(values->MICommandOpcode, 23, 28) |
5257 __gen_field(values->UseGlobalGTT, 22, 22) |
5258 __gen_field(values->AsyncModeEnable, 21, 21) |
5259 __gen_field(values->DwordLength, 0, 7) |
5260 0;
5261
5262 dw[1] =
5263 __gen_offset(values->RegisterAddress, 2, 22) |
5264 0;
5265
5266 uint32_t dw2 =
5267 0;
5268
5269 dw[2] =
5270 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
5271
5272 }
5273
5274 #define GEN7_MI_NOOP_length_bias 0x00000001
5275 #define GEN7_MI_NOOP_header \
5276 .CommandType = 0, \
5277 .MICommandOpcode = 0
5278
5279 #define GEN7_MI_NOOP_length 0x00000001
5280
5281 struct GEN7_MI_NOOP {
5282 uint32_t CommandType;
5283 uint32_t MICommandOpcode;
5284 bool IdentificationNumberRegisterWriteEnable;
5285 uint32_t IdentificationNumber;
5286 };
5287
5288 static inline void
5289 GEN7_MI_NOOP_pack(__gen_user_data *data, void * restrict dst,
5290 const struct GEN7_MI_NOOP * restrict values)
5291 {
5292 uint32_t *dw = (uint32_t * restrict) dst;
5293
5294 dw[0] =
5295 __gen_field(values->CommandType, 29, 31) |
5296 __gen_field(values->MICommandOpcode, 23, 28) |
5297 __gen_field(values->IdentificationNumberRegisterWriteEnable, 22, 22) |
5298 __gen_field(values->IdentificationNumber, 0, 21) |
5299 0;
5300
5301 }
5302
5303 #define GEN7_MI_PREDICATE_length_bias 0x00000001
5304 #define GEN7_MI_PREDICATE_header \
5305 .CommandType = 0, \
5306 .MICommandOpcode = 12
5307
5308 #define GEN7_MI_PREDICATE_length 0x00000001
5309
5310 struct GEN7_MI_PREDICATE {
5311 uint32_t CommandType;
5312 uint32_t MICommandOpcode;
5313 #define LOAD_KEEP 0
5314 #define LOAD_LOAD 2
5315 #define LOAD_LOADINV 3
5316 uint32_t LoadOperation;
5317 #define COMBINE_SET 0
5318 #define COMBINE_AND 1
5319 #define COMBINE_OR 2
5320 #define COMBINE_XOR 3
5321 uint32_t CombineOperation;
5322 #define COMPARE_SRCS_EQUAL 2
5323 #define COMPARE_DELTAS_EQUAL 3
5324 uint32_t CompareOperation;
5325 };
5326
5327 static inline void
5328 GEN7_MI_PREDICATE_pack(__gen_user_data *data, void * restrict dst,
5329 const struct GEN7_MI_PREDICATE * restrict values)
5330 {
5331 uint32_t *dw = (uint32_t * restrict) dst;
5332
5333 dw[0] =
5334 __gen_field(values->CommandType, 29, 31) |
5335 __gen_field(values->MICommandOpcode, 23, 28) |
5336 __gen_field(values->LoadOperation, 6, 7) |
5337 __gen_field(values->CombineOperation, 3, 4) |
5338 __gen_field(values->CompareOperation, 0, 1) |
5339 0;
5340
5341 }
5342
5343 #define GEN7_MI_REPORT_HEAD_length_bias 0x00000001
5344 #define GEN7_MI_REPORT_HEAD_header \
5345 .CommandType = 0, \
5346 .MICommandOpcode = 7
5347
5348 #define GEN7_MI_REPORT_HEAD_length 0x00000001
5349
5350 struct GEN7_MI_REPORT_HEAD {
5351 uint32_t CommandType;
5352 uint32_t MICommandOpcode;
5353 };
5354
5355 static inline void
5356 GEN7_MI_REPORT_HEAD_pack(__gen_user_data *data, void * restrict dst,
5357 const struct GEN7_MI_REPORT_HEAD * restrict values)
5358 {
5359 uint32_t *dw = (uint32_t * restrict) dst;
5360
5361 dw[0] =
5362 __gen_field(values->CommandType, 29, 31) |
5363 __gen_field(values->MICommandOpcode, 23, 28) |
5364 0;
5365
5366 }
5367
5368 #define GEN7_MI_SEMAPHORE_MBOX_length_bias 0x00000002
5369 #define GEN7_MI_SEMAPHORE_MBOX_header \
5370 .CommandType = 0, \
5371 .MICommandOpcode = 22, \
5372 .DwordLength = 1
5373
5374 #define GEN7_MI_SEMAPHORE_MBOX_length 0x00000003
5375
5376 struct GEN7_MI_SEMAPHORE_MBOX {
5377 uint32_t CommandType;
5378 uint32_t MICommandOpcode;
5379 #define RVSYNC 0
5380 #define RBSYNC 2
5381 #define UseGeneralRegisterSelect 3
5382 uint32_t RegisterSelect;
5383 uint32_t DwordLength;
5384 uint32_t SemaphoreDataDword;
5385 };
5386
5387 static inline void
5388 GEN7_MI_SEMAPHORE_MBOX_pack(__gen_user_data *data, void * restrict dst,
5389 const struct GEN7_MI_SEMAPHORE_MBOX * restrict values)
5390 {
5391 uint32_t *dw = (uint32_t * restrict) dst;
5392
5393 dw[0] =
5394 __gen_field(values->CommandType, 29, 31) |
5395 __gen_field(values->MICommandOpcode, 23, 28) |
5396 __gen_field(values->RegisterSelect, 16, 17) |
5397 __gen_field(values->DwordLength, 0, 7) |
5398 0;
5399
5400 dw[1] =
5401 __gen_field(values->SemaphoreDataDword, 0, 31) |
5402 0;
5403
5404 dw[2] =
5405 0;
5406
5407 }
5408
5409 #define GEN7_MI_SET_CONTEXT_length_bias 0x00000002
5410 #define GEN7_MI_SET_CONTEXT_header \
5411 .CommandType = 0, \
5412 .MICommandOpcode = 24, \
5413 .DwordLength = 0
5414
5415 #define GEN7_MI_SET_CONTEXT_length 0x00000002
5416
5417 struct GEN7_MI_SET_CONTEXT {
5418 uint32_t CommandType;
5419 uint32_t MICommandOpcode;
5420 uint32_t DwordLength;
5421 __gen_address_type LogicalContextAddress;
5422 uint32_t ReservedMustbe1;
5423 bool ExtendedStateSaveEnable;
5424 bool ExtendedStateRestoreEnable;
5425 uint32_t ForceRestore;
5426 uint32_t RestoreInhibit;
5427 };
5428
5429 static inline void
5430 GEN7_MI_SET_CONTEXT_pack(__gen_user_data *data, void * restrict dst,
5431 const struct GEN7_MI_SET_CONTEXT * restrict values)
5432 {
5433 uint32_t *dw = (uint32_t * restrict) dst;
5434
5435 dw[0] =
5436 __gen_field(values->CommandType, 29, 31) |
5437 __gen_field(values->MICommandOpcode, 23, 28) |
5438 __gen_field(values->DwordLength, 0, 7) |
5439 0;
5440
5441 uint32_t dw1 =
5442 __gen_field(values->ReservedMustbe1, 8, 8) |
5443 __gen_field(values->ExtendedStateSaveEnable, 3, 3) |
5444 __gen_field(values->ExtendedStateRestoreEnable, 2, 2) |
5445 __gen_field(values->ForceRestore, 1, 1) |
5446 __gen_field(values->RestoreInhibit, 0, 0) |
5447 0;
5448
5449 dw[1] =
5450 __gen_combine_address(data, &dw[1], values->LogicalContextAddress, dw1);
5451
5452 }
5453
5454 #define GEN7_MI_STORE_DATA_IMM_length_bias 0x00000002
5455 #define GEN7_MI_STORE_DATA_IMM_header \
5456 .CommandType = 0, \
5457 .MICommandOpcode = 32, \
5458 .DwordLength = 2
5459
5460 #define GEN7_MI_STORE_DATA_IMM_length 0x00000004
5461
5462 struct GEN7_MI_STORE_DATA_IMM {
5463 uint32_t CommandType;
5464 uint32_t MICommandOpcode;
5465 bool UseGlobalGTT;
5466 uint32_t DwordLength;
5467 uint32_t Address;
5468 uint32_t CoreModeEnable;
5469 uint32_t DataDWord0;
5470 uint32_t DataDWord1;
5471 };
5472
5473 static inline void
5474 GEN7_MI_STORE_DATA_IMM_pack(__gen_user_data *data, void * restrict dst,
5475 const struct GEN7_MI_STORE_DATA_IMM * restrict values)
5476 {
5477 uint32_t *dw = (uint32_t * restrict) dst;
5478
5479 dw[0] =
5480 __gen_field(values->CommandType, 29, 31) |
5481 __gen_field(values->MICommandOpcode, 23, 28) |
5482 __gen_field(values->UseGlobalGTT, 22, 22) |
5483 __gen_field(values->DwordLength, 0, 5) |
5484 0;
5485
5486 dw[1] =
5487 0;
5488
5489 dw[2] =
5490 __gen_field(values->Address, 2, 31) |
5491 __gen_field(values->CoreModeEnable, 0, 0) |
5492 0;
5493
5494 dw[3] =
5495 __gen_field(values->DataDWord0, 0, 31) |
5496 0;
5497
5498 dw[4] =
5499 __gen_field(values->DataDWord1, 0, 31) |
5500 0;
5501
5502 }
5503
5504 #define GEN7_MI_STORE_DATA_INDEX_length_bias 0x00000002
5505 #define GEN7_MI_STORE_DATA_INDEX_header \
5506 .CommandType = 0, \
5507 .MICommandOpcode = 33, \
5508 .DwordLength = 1
5509
5510 #define GEN7_MI_STORE_DATA_INDEX_length 0x00000003
5511
5512 struct GEN7_MI_STORE_DATA_INDEX {
5513 uint32_t CommandType;
5514 uint32_t MICommandOpcode;
5515 uint32_t DwordLength;
5516 uint32_t Offset;
5517 uint32_t DataDWord0;
5518 uint32_t DataDWord1;
5519 };
5520
5521 static inline void
5522 GEN7_MI_STORE_DATA_INDEX_pack(__gen_user_data *data, void * restrict dst,
5523 const struct GEN7_MI_STORE_DATA_INDEX * restrict values)
5524 {
5525 uint32_t *dw = (uint32_t * restrict) dst;
5526
5527 dw[0] =
5528 __gen_field(values->CommandType, 29, 31) |
5529 __gen_field(values->MICommandOpcode, 23, 28) |
5530 __gen_field(values->DwordLength, 0, 7) |
5531 0;
5532
5533 dw[1] =
5534 __gen_field(values->Offset, 2, 11) |
5535 0;
5536
5537 dw[2] =
5538 __gen_field(values->DataDWord0, 0, 31) |
5539 0;
5540
5541 dw[3] =
5542 __gen_field(values->DataDWord1, 0, 31) |
5543 0;
5544
5545 }
5546
5547 #define GEN7_MI_SUSPEND_FLUSH_length_bias 0x00000001
5548 #define GEN7_MI_SUSPEND_FLUSH_header \
5549 .CommandType = 0, \
5550 .MICommandOpcode = 11
5551
5552 #define GEN7_MI_SUSPEND_FLUSH_length 0x00000001
5553
5554 struct GEN7_MI_SUSPEND_FLUSH {
5555 uint32_t CommandType;
5556 uint32_t MICommandOpcode;
5557 bool SuspendFlush;
5558 };
5559
5560 static inline void
5561 GEN7_MI_SUSPEND_FLUSH_pack(__gen_user_data *data, void * restrict dst,
5562 const struct GEN7_MI_SUSPEND_FLUSH * restrict values)
5563 {
5564 uint32_t *dw = (uint32_t * restrict) dst;
5565
5566 dw[0] =
5567 __gen_field(values->CommandType, 29, 31) |
5568 __gen_field(values->MICommandOpcode, 23, 28) |
5569 __gen_field(values->SuspendFlush, 0, 0) |
5570 0;
5571
5572 }
5573
5574 #define GEN7_MI_TOPOLOGY_FILTER_length_bias 0x00000001
5575 #define GEN7_MI_TOPOLOGY_FILTER_header \
5576 .CommandType = 0, \
5577 .MICommandOpcode = 13
5578
5579 #define GEN7_MI_TOPOLOGY_FILTER_length 0x00000001
5580
5581 struct GEN7_MI_TOPOLOGY_FILTER {
5582 uint32_t CommandType;
5583 uint32_t MICommandOpcode;
5584 uint32_t TopologyFilterValue;
5585 };
5586
5587 static inline void
5588 GEN7_MI_TOPOLOGY_FILTER_pack(__gen_user_data *data, void * restrict dst,
5589 const struct GEN7_MI_TOPOLOGY_FILTER * restrict values)
5590 {
5591 uint32_t *dw = (uint32_t * restrict) dst;
5592
5593 dw[0] =
5594 __gen_field(values->CommandType, 29, 31) |
5595 __gen_field(values->MICommandOpcode, 23, 28) |
5596 __gen_field(values->TopologyFilterValue, 0, 5) |
5597 0;
5598
5599 }
5600
5601 #define GEN7_MI_UPDATE_GTT_length_bias 0x00000002
5602 #define GEN7_MI_UPDATE_GTT_header \
5603 .CommandType = 0, \
5604 .MICommandOpcode = 35
5605
5606 #define GEN7_MI_UPDATE_GTT_length 0x00000000
5607
5608 struct GEN7_MI_UPDATE_GTT {
5609 uint32_t CommandType;
5610 uint32_t MICommandOpcode;
5611 #define PerProcessGraphicsAddress 0
5612 #define GlobalGraphicsAddress 1
5613 uint32_t UseGlobalGTT;
5614 uint32_t DwordLength;
5615 __gen_address_type EntryAddress;
5616 /* variable length fields follow */
5617 };
5618
5619 static inline void
5620 GEN7_MI_UPDATE_GTT_pack(__gen_user_data *data, void * restrict dst,
5621 const struct GEN7_MI_UPDATE_GTT * restrict values)
5622 {
5623 uint32_t *dw = (uint32_t * restrict) dst;
5624
5625 dw[0] =
5626 __gen_field(values->CommandType, 29, 31) |
5627 __gen_field(values->MICommandOpcode, 23, 28) |
5628 __gen_field(values->UseGlobalGTT, 22, 22) |
5629 __gen_field(values->DwordLength, 0, 7) |
5630 0;
5631
5632 uint32_t dw1 =
5633 0;
5634
5635 dw[1] =
5636 __gen_combine_address(data, &dw[1], values->EntryAddress, dw1);
5637
5638 /* variable length fields follow */
5639 }
5640
5641 #define GEN7_MI_URB_CLEAR_length_bias 0x00000002
5642 #define GEN7_MI_URB_CLEAR_header \
5643 .CommandType = 0, \
5644 .MICommandOpcode = 25, \
5645 .DwordLength = 0
5646
5647 #define GEN7_MI_URB_CLEAR_length 0x00000002
5648
5649 struct GEN7_MI_URB_CLEAR {
5650 uint32_t CommandType;
5651 uint32_t MICommandOpcode;
5652 uint32_t DwordLength;
5653 uint32_t URBClearLength;
5654 uint32_t URBAddress;
5655 };
5656
5657 static inline void
5658 GEN7_MI_URB_CLEAR_pack(__gen_user_data *data, void * restrict dst,
5659 const struct GEN7_MI_URB_CLEAR * restrict values)
5660 {
5661 uint32_t *dw = (uint32_t * restrict) dst;
5662
5663 dw[0] =
5664 __gen_field(values->CommandType, 29, 31) |
5665 __gen_field(values->MICommandOpcode, 23, 28) |
5666 __gen_field(values->DwordLength, 0, 7) |
5667 0;
5668
5669 dw[1] =
5670 __gen_field(values->URBClearLength, 16, 28) |
5671 __gen_offset(values->URBAddress, 0, 13) |
5672 0;
5673
5674 }
5675
5676 #define GEN7_MI_USER_INTERRUPT_length_bias 0x00000001
5677 #define GEN7_MI_USER_INTERRUPT_header \
5678 .CommandType = 0, \
5679 .MICommandOpcode = 2
5680
5681 #define GEN7_MI_USER_INTERRUPT_length 0x00000001
5682
5683 struct GEN7_MI_USER_INTERRUPT {
5684 uint32_t CommandType;
5685 uint32_t MICommandOpcode;
5686 };
5687
5688 static inline void
5689 GEN7_MI_USER_INTERRUPT_pack(__gen_user_data *data, void * restrict dst,
5690 const struct GEN7_MI_USER_INTERRUPT * restrict values)
5691 {
5692 uint32_t *dw = (uint32_t * restrict) dst;
5693
5694 dw[0] =
5695 __gen_field(values->CommandType, 29, 31) |
5696 __gen_field(values->MICommandOpcode, 23, 28) |
5697 0;
5698
5699 }
5700
5701 #define GEN7_MI_WAIT_FOR_EVENT_length_bias 0x00000001
5702 #define GEN7_MI_WAIT_FOR_EVENT_header \
5703 .CommandType = 0, \
5704 .MICommandOpcode = 3
5705
5706 #define GEN7_MI_WAIT_FOR_EVENT_length 0x00000001
5707
5708 struct GEN7_MI_WAIT_FOR_EVENT {
5709 uint32_t CommandType;
5710 uint32_t MICommandOpcode;
5711 bool DisplayPipeCHorizontalBlankWaitEnable;
5712 bool DisplayPipeCVerticalBlankWaitEnable;
5713 bool DisplaySpriteCFlipPendingWaitEnable;
5714 #define Notenabled 0
5715 uint32_t ConditionCodeWaitSelect;
5716 bool DisplayPlaneCFlipPendingWaitEnable;
5717 bool DisplayPipeCScanLineWaitEnable;
5718 bool DisplayPipeBHorizontalBlankWaitEnable;
5719 bool DisplayPipeBVerticalBlankWaitEnable;
5720 bool DisplaySpriteBFlipPendingWaitEnable;
5721 bool DisplayPlaneBFlipPendingWaitEnable;
5722 bool DisplayPipeBScanLineWaitEnable;
5723 bool DisplayPipeAHorizontalBlankWaitEnable;
5724 bool DisplayPipeAVerticalBlankWaitEnable;
5725 bool DisplaySpriteAFlipPendingWaitEnable;
5726 bool DisplayPlaneAFlipPendingWaitEnable;
5727 bool DisplayPipeAScanLineWaitEnable;
5728 };
5729
5730 static inline void
5731 GEN7_MI_WAIT_FOR_EVENT_pack(__gen_user_data *data, void * restrict dst,
5732 const struct GEN7_MI_WAIT_FOR_EVENT * restrict values)
5733 {
5734 uint32_t *dw = (uint32_t * restrict) dst;
5735
5736 dw[0] =
5737 __gen_field(values->CommandType, 29, 31) |
5738 __gen_field(values->MICommandOpcode, 23, 28) |
5739 __gen_field(values->DisplayPipeCHorizontalBlankWaitEnable, 22, 22) |
5740 __gen_field(values->DisplayPipeCVerticalBlankWaitEnable, 21, 21) |
5741 __gen_field(values->DisplaySpriteCFlipPendingWaitEnable, 20, 20) |
5742 __gen_field(values->ConditionCodeWaitSelect, 16, 19) |
5743 __gen_field(values->DisplayPlaneCFlipPendingWaitEnable, 15, 15) |
5744 __gen_field(values->DisplayPipeCScanLineWaitEnable, 14, 14) |
5745 __gen_field(values->DisplayPipeBHorizontalBlankWaitEnable, 13, 13) |
5746 __gen_field(values->DisplayPipeBVerticalBlankWaitEnable, 11, 11) |
5747 __gen_field(values->DisplaySpriteBFlipPendingWaitEnable, 10, 10) |
5748 __gen_field(values->DisplayPlaneBFlipPendingWaitEnable, 9, 9) |
5749 __gen_field(values->DisplayPipeBScanLineWaitEnable, 8, 8) |
5750 __gen_field(values->DisplayPipeAHorizontalBlankWaitEnable, 5, 5) |
5751 __gen_field(values->DisplayPipeAVerticalBlankWaitEnable, 3, 3) |
5752 __gen_field(values->DisplaySpriteAFlipPendingWaitEnable, 2, 2) |
5753 __gen_field(values->DisplayPlaneAFlipPendingWaitEnable, 1, 1) |
5754 __gen_field(values->DisplayPipeAScanLineWaitEnable, 0, 0) |
5755 0;
5756
5757 }
5758
5759 #define GEN7_PIPE_CONTROL_length_bias 0x00000002
5760 #define GEN7_PIPE_CONTROL_header \
5761 .CommandType = 3, \
5762 .CommandSubType = 3, \
5763 ._3DCommandOpcode = 2, \
5764 ._3DCommandSubOpcode = 0, \
5765 .DwordLength = 3
5766
5767 #define GEN7_PIPE_CONTROL_length 0x00000005
5768
5769 struct GEN7_PIPE_CONTROL {
5770 uint32_t CommandType;
5771 uint32_t CommandSubType;
5772 uint32_t _3DCommandOpcode;
5773 uint32_t _3DCommandSubOpcode;
5774 uint32_t DwordLength;
5775 #define DAT_PPGTT 0
5776 #define DAT_GGTT 1
5777 uint32_t DestinationAddressType;
5778 #define NoLRIOperation 0
5779 #define MMIOWriteImmediateData 1
5780 uint32_t LRIPostSyncOperation;
5781 uint32_t StoreDataIndex;
5782 uint32_t CommandStreamerStallEnable;
5783 #define DontReset 0
5784 #define Reset 1
5785 uint32_t GlobalSnapshotCountReset;
5786 uint32_t TLBInvalidate;
5787 bool GenericMediaStateClear;
5788 #define NoWrite 0
5789 #define WriteImmediateData 1
5790 #define WritePSDepthCount 2
5791 #define WriteTimestamp 3
5792 uint32_t PostSyncOperation;
5793 bool DepthStallEnable;
5794 #define DisableFlush 0
5795 #define EnableFlush 1
5796 bool RenderTargetCacheFlushEnable;
5797 bool InstructionCacheInvalidateEnable;
5798 bool TextureCacheInvalidationEnable;
5799 bool IndirectStatePointersDisable;
5800 bool NotifyEnable;
5801 bool PipeControlFlushEnable;
5802 bool DCFlushEnable;
5803 bool VFCacheInvalidationEnable;
5804 bool ConstantCacheInvalidationEnable;
5805 bool StateCacheInvalidationEnable;
5806 bool StallAtPixelScoreboard;
5807 #define FlushDisabled 0
5808 #define FlushEnabled 1
5809 bool DepthCacheFlushEnable;
5810 __gen_address_type Address;
5811 uint32_t ImmediateData;
5812 uint32_t ImmediateData0;
5813 };
5814
5815 static inline void
5816 GEN7_PIPE_CONTROL_pack(__gen_user_data *data, void * restrict dst,
5817 const struct GEN7_PIPE_CONTROL * restrict values)
5818 {
5819 uint32_t *dw = (uint32_t * restrict) dst;
5820
5821 dw[0] =
5822 __gen_field(values->CommandType, 29, 31) |
5823 __gen_field(values->CommandSubType, 27, 28) |
5824 __gen_field(values->_3DCommandOpcode, 24, 26) |
5825 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5826 __gen_field(values->DwordLength, 0, 7) |
5827 0;
5828
5829 dw[1] =
5830 __gen_field(values->DestinationAddressType, 24, 24) |
5831 __gen_field(values->LRIPostSyncOperation, 23, 23) |
5832 __gen_field(values->StoreDataIndex, 21, 21) |
5833 __gen_field(values->CommandStreamerStallEnable, 20, 20) |
5834 __gen_field(values->GlobalSnapshotCountReset, 19, 19) |
5835 __gen_field(values->TLBInvalidate, 18, 18) |
5836 __gen_field(values->GenericMediaStateClear, 16, 16) |
5837 __gen_field(values->PostSyncOperation, 14, 15) |
5838 __gen_field(values->DepthStallEnable, 13, 13) |
5839 __gen_field(values->RenderTargetCacheFlushEnable, 12, 12) |
5840 __gen_field(values->InstructionCacheInvalidateEnable, 11, 11) |
5841 __gen_field(values->TextureCacheInvalidationEnable, 10, 10) |
5842 __gen_field(values->IndirectStatePointersDisable, 9, 9) |
5843 __gen_field(values->NotifyEnable, 8, 8) |
5844 __gen_field(values->PipeControlFlushEnable, 7, 7) |
5845 __gen_field(values->DCFlushEnable, 5, 5) |
5846 __gen_field(values->VFCacheInvalidationEnable, 4, 4) |
5847 __gen_field(values->ConstantCacheInvalidationEnable, 3, 3) |
5848 __gen_field(values->StateCacheInvalidationEnable, 2, 2) |
5849 __gen_field(values->StallAtPixelScoreboard, 1, 1) |
5850 __gen_field(values->DepthCacheFlushEnable, 0, 0) |
5851 0;
5852
5853 uint32_t dw2 =
5854 0;
5855
5856 dw[2] =
5857 __gen_combine_address(data, &dw[2], values->Address, dw2);
5858
5859 dw[3] =
5860 __gen_field(values->ImmediateData, 0, 31) |
5861 0;
5862
5863 dw[4] =
5864 __gen_field(values->ImmediateData, 0, 31) |
5865 0;
5866
5867 }
5868
5869 #define GEN7_SCISSOR_RECT_length 0x00000002
5870
5871 struct GEN7_SCISSOR_RECT {
5872 uint32_t ScissorRectangleYMin;
5873 uint32_t ScissorRectangleXMin;
5874 uint32_t ScissorRectangleYMax;
5875 uint32_t ScissorRectangleXMax;
5876 };
5877
5878 static inline void
5879 GEN7_SCISSOR_RECT_pack(__gen_user_data *data, void * restrict dst,
5880 const struct GEN7_SCISSOR_RECT * restrict values)
5881 {
5882 uint32_t *dw = (uint32_t * restrict) dst;
5883
5884 dw[0] =
5885 __gen_field(values->ScissorRectangleYMin, 16, 31) |
5886 __gen_field(values->ScissorRectangleXMin, 0, 15) |
5887 0;
5888
5889 dw[1] =
5890 __gen_field(values->ScissorRectangleYMax, 16, 31) |
5891 __gen_field(values->ScissorRectangleXMax, 0, 15) |
5892 0;
5893
5894 }
5895
5896 #define GEN7_SF_CLIP_VIEWPORT_length 0x00000010
5897
5898 struct GEN7_SF_CLIP_VIEWPORT {
5899 float ViewportMatrixElementm00;
5900 float ViewportMatrixElementm11;
5901 float ViewportMatrixElementm22;
5902 float ViewportMatrixElementm30;
5903 float ViewportMatrixElementm31;
5904 float ViewportMatrixElementm32;
5905 float XMinClipGuardband;
5906 float XMaxClipGuardband;
5907 float YMinClipGuardband;
5908 float YMaxClipGuardband;
5909 };
5910
5911 static inline void
5912 GEN7_SF_CLIP_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
5913 const struct GEN7_SF_CLIP_VIEWPORT * restrict values)
5914 {
5915 uint32_t *dw = (uint32_t * restrict) dst;
5916
5917 dw[0] =
5918 __gen_float(values->ViewportMatrixElementm00) |
5919 0;
5920
5921 dw[1] =
5922 __gen_float(values->ViewportMatrixElementm11) |
5923 0;
5924
5925 dw[2] =
5926 __gen_float(values->ViewportMatrixElementm22) |
5927 0;
5928
5929 dw[3] =
5930 __gen_float(values->ViewportMatrixElementm30) |
5931 0;
5932
5933 dw[4] =
5934 __gen_float(values->ViewportMatrixElementm31) |
5935 0;
5936
5937 dw[5] =
5938 __gen_float(values->ViewportMatrixElementm32) |
5939 0;
5940
5941 dw[6] =
5942 0;
5943
5944 dw[7] =
5945 0;
5946
5947 dw[8] =
5948 __gen_float(values->XMinClipGuardband) |
5949 0;
5950
5951 dw[9] =
5952 __gen_float(values->XMaxClipGuardband) |
5953 0;
5954
5955 dw[10] =
5956 __gen_float(values->YMinClipGuardband) |
5957 0;
5958
5959 dw[11] =
5960 __gen_float(values->YMaxClipGuardband) |
5961 0;
5962
5963 for (uint32_t i = 0, j = 12; i < 4; i += 1, j++) {
5964 dw[j] =
5965 0;
5966 }
5967
5968 }
5969
5970 #define GEN7_BLEND_STATE_length 0x00000002
5971
5972 struct GEN7_BLEND_STATE {
5973 bool ColorBufferBlendEnable;
5974 bool IndependentAlphaBlendEnable;
5975 #define BLENDFUNCTION_ADD 0
5976 #define BLENDFUNCTION_SUBTRACT 1
5977 #define BLENDFUNCTION_REVERSE_SUBTRACT 2
5978 #define BLENDFUNCTION_MIN 3
5979 #define BLENDFUNCTION_MAX 4
5980 uint32_t AlphaBlendFunction;
5981 #define BLENDFACTOR_ONE 1
5982 #define BLENDFACTOR_SRC_COLOR 2
5983 #define BLENDFACTOR_SRC_ALPHA 3
5984 #define BLENDFACTOR_DST_ALPHA 4
5985 #define BLENDFACTOR_DST_COLOR 5
5986 #define BLENDFACTOR_SRC_ALPHA_SATURATE 6
5987 #define BLENDFACTOR_CONST_COLOR 7
5988 #define BLENDFACTOR_CONST_ALPHA 8
5989 #define BLENDFACTOR_SRC1_COLOR 9
5990 #define BLENDFACTOR_SRC1_ALPHA 10
5991 #define BLENDFACTOR_ZERO 17
5992 #define BLENDFACTOR_INV_SRC_COLOR 18
5993 #define BLENDFACTOR_INV_SRC_ALPHA 19
5994 #define BLENDFACTOR_INV_DST_ALPHA 20
5995 #define BLENDFACTOR_INV_DST_COLOR 21
5996 #define BLENDFACTOR_INV_CONST_COLOR 23
5997 #define BLENDFACTOR_INV_CONST_ALPHA 24
5998 #define BLENDFACTOR_INV_SRC1_COLOR 25
5999 #define BLENDFACTOR_INV_SRC1_ALPHA 26
6000 uint32_t SourceAlphaBlendFactor;
6001 uint32_t DestinationAlphaBlendFactor;
6002 #define BLENDFUNCTION_ADD 0
6003 #define BLENDFUNCTION_SUBTRACT 1
6004 #define BLENDFUNCTION_REVERSE_SUBTRACT 2
6005 #define BLENDFUNCTION_MIN 3
6006 #define BLENDFUNCTION_MAX 4
6007 uint32_t ColorBlendFunction;
6008 uint32_t SourceBlendFactor;
6009 uint32_t DestinationBlendFactor;
6010 bool AlphaToCoverageEnable;
6011 bool AlphaToOneEnable;
6012 bool AlphaToCoverageDitherEnable;
6013 bool WriteDisableAlpha;
6014 bool WriteDisableRed;
6015 bool WriteDisableGreen;
6016 bool WriteDisableBlue;
6017 bool LogicOpEnable;
6018 #define LOGICOP_CLEAR 0
6019 #define LOGICOP_NOR 1
6020 #define LOGICOP_AND_INVERTED 2
6021 #define LOGICOP_COPY_INVERTED 3
6022 #define LOGICOP_AND_REVERSE 4
6023 #define LOGICOP_INVERT 5
6024 #define LOGICOP_XOR 6
6025 #define LOGICOP_NAND 7
6026 #define LOGICOP_AND 8
6027 #define LOGICOP_EQUIV 9
6028 #define LOGICOP_NOOP 10
6029 #define LOGICOP_OR_INVERTED 11
6030 #define LOGICOP_COPY 12
6031 #define LOGICOP_OR_REVERSE 13
6032 #define LOGICOP_OR 14
6033 #define LOGICOP_SET 15
6034 uint32_t LogicOpFunction;
6035 bool AlphaTestEnable;
6036 #define COMPAREFUNCTION_ALWAYS 0
6037 #define COMPAREFUNCTION_NEVER 1
6038 #define COMPAREFUNCTION_LESS 2
6039 #define COMPAREFUNCTION_EQUAL 3
6040 #define COMPAREFUNCTION_LEQUAL 4
6041 #define COMPAREFUNCTION_GREATER 5
6042 #define COMPAREFUNCTION_NOTEQUAL 6
6043 #define COMPAREFUNCTION_GEQUAL 7
6044 uint32_t AlphaTestFunction;
6045 bool ColorDitherEnable;
6046 uint32_t XDitherOffset;
6047 uint32_t YDitherOffset;
6048 #define COLORCLAMP_UNORM 0
6049 #define COLORCLAMP_SNORM 1
6050 #define COLORCLAMP_RTFORMAT 2
6051 uint32_t ColorClampRange;
6052 bool PreBlendColorClampEnable;
6053 bool PostBlendColorClampEnable;
6054 };
6055
6056 static inline void
6057 GEN7_BLEND_STATE_pack(__gen_user_data *data, void * restrict dst,
6058 const struct GEN7_BLEND_STATE * restrict values)
6059 {
6060 uint32_t *dw = (uint32_t * restrict) dst;
6061
6062 dw[0] =
6063 __gen_field(values->ColorBufferBlendEnable, 31, 31) |
6064 __gen_field(values->IndependentAlphaBlendEnable, 30, 30) |
6065 __gen_field(values->AlphaBlendFunction, 26, 28) |
6066 __gen_field(values->SourceAlphaBlendFactor, 20, 24) |
6067 __gen_field(values->DestinationAlphaBlendFactor, 15, 19) |
6068 __gen_field(values->ColorBlendFunction, 11, 13) |
6069 __gen_field(values->SourceBlendFactor, 5, 9) |
6070 __gen_field(values->DestinationBlendFactor, 0, 4) |
6071 0;
6072
6073 dw[1] =
6074 __gen_field(values->AlphaToCoverageEnable, 31, 31) |
6075 __gen_field(values->AlphaToOneEnable, 30, 30) |
6076 __gen_field(values->AlphaToCoverageDitherEnable, 29, 29) |
6077 __gen_field(values->WriteDisableAlpha, 27, 27) |
6078 __gen_field(values->WriteDisableRed, 26, 26) |
6079 __gen_field(values->WriteDisableGreen, 25, 25) |
6080 __gen_field(values->WriteDisableBlue, 24, 24) |
6081 __gen_field(values->LogicOpEnable, 22, 22) |
6082 __gen_field(values->LogicOpFunction, 18, 21) |
6083 __gen_field(values->AlphaTestEnable, 16, 16) |
6084 __gen_field(values->AlphaTestFunction, 13, 15) |
6085 __gen_field(values->ColorDitherEnable, 12, 12) |
6086 __gen_field(values->XDitherOffset, 10, 11) |
6087 __gen_field(values->YDitherOffset, 8, 9) |
6088 __gen_field(values->ColorClampRange, 2, 3) |
6089 __gen_field(values->PreBlendColorClampEnable, 1, 1) |
6090 __gen_field(values->PostBlendColorClampEnable, 0, 0) |
6091 0;
6092
6093 }
6094
6095 #define GEN7_CC_VIEWPORT_length 0x00000002
6096
6097 struct GEN7_CC_VIEWPORT {
6098 float MinimumDepth;
6099 float MaximumDepth;
6100 };
6101
6102 static inline void
6103 GEN7_CC_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
6104 const struct GEN7_CC_VIEWPORT * restrict values)
6105 {
6106 uint32_t *dw = (uint32_t * restrict) dst;
6107
6108 dw[0] =
6109 __gen_float(values->MinimumDepth) |
6110 0;
6111
6112 dw[1] =
6113 __gen_float(values->MaximumDepth) |
6114 0;
6115
6116 }
6117
6118 #define GEN7_COLOR_CALC_STATE_length 0x00000006
6119
6120 struct GEN7_COLOR_CALC_STATE {
6121 uint32_t StencilReferenceValue;
6122 uint32_t BackFaceStencilReferenceValue;
6123 #define Cancelled 0
6124 #define NotCancelled 1
6125 uint32_t RoundDisableFunctionDisable;
6126 #define ALPHATEST_UNORM8 0
6127 #define ALPHATEST_FLOAT32 1
6128 uint32_t AlphaTestFormat;
6129 uint32_t AlphaReferenceValueAsUNORM8;
6130 float AlphaReferenceValueAsFLOAT32;
6131 float BlendConstantColorRed;
6132 float BlendConstantColorGreen;
6133 float BlendConstantColorBlue;
6134 float BlendConstantColorAlpha;
6135 };
6136
6137 static inline void
6138 GEN7_COLOR_CALC_STATE_pack(__gen_user_data *data, void * restrict dst,
6139 const struct GEN7_COLOR_CALC_STATE * restrict values)
6140 {
6141 uint32_t *dw = (uint32_t * restrict) dst;
6142
6143 dw[0] =
6144 __gen_field(values->StencilReferenceValue, 24, 31) |
6145 __gen_field(values->BackFaceStencilReferenceValue, 16, 23) |
6146 __gen_field(values->RoundDisableFunctionDisable, 15, 15) |
6147 __gen_field(values->AlphaTestFormat, 0, 0) |
6148 0;
6149
6150 dw[1] =
6151 __gen_field(values->AlphaReferenceValueAsUNORM8, 0, 31) |
6152 __gen_float(values->AlphaReferenceValueAsFLOAT32) |
6153 0;
6154
6155 dw[2] =
6156 __gen_float(values->BlendConstantColorRed) |
6157 0;
6158
6159 dw[3] =
6160 __gen_float(values->BlendConstantColorGreen) |
6161 0;
6162
6163 dw[4] =
6164 __gen_float(values->BlendConstantColorBlue) |
6165 0;
6166
6167 dw[5] =
6168 __gen_float(values->BlendConstantColorAlpha) |
6169 0;
6170
6171 }
6172
6173 #define GEN7_DEPTH_STENCIL_STATE_length 0x00000003
6174
6175 struct GEN7_DEPTH_STENCIL_STATE {
6176 bool StencilTestEnable;
6177 #define COMPAREFUNCTION_ALWAYS 0
6178 #define COMPAREFUNCTION_NEVER 1
6179 #define COMPAREFUNCTION_LESS 2
6180 #define COMPAREFUNCTION_EQUAL 3
6181 #define COMPAREFUNCTION_LEQUAL 4
6182 #define COMPAREFUNCTION_GREATER 5
6183 #define COMPAREFUNCTION_NOTEQUAL 6
6184 #define COMPAREFUNCTION_GEQUAL 7
6185 uint32_t StencilTestFunction;
6186 #define STENCILOP_KEEP 0
6187 #define STENCILOP_ZERO 1
6188 #define STENCILOP_REPLACE 2
6189 #define STENCILOP_INCRSAT 3
6190 #define STENCILOP_DECRSAT 4
6191 #define STENCILOP_INCR 5
6192 #define STENCILOP_DECR 6
6193 #define STENCILOP_INVERT 7
6194 uint32_t StencilFailOp;
6195 uint32_t StencilPassDepthFailOp;
6196 uint32_t StencilPassDepthPassOp;
6197 bool StencilBufferWriteEnable;
6198 bool DoubleSidedStencilEnable;
6199 #define COMPAREFUNCTION_ALWAYS 0
6200 #define COMPAREFUNCTION_NEVER 1
6201 #define COMPAREFUNCTION_LESS 2
6202 #define COMPAREFUNCTION_EQUAL 3
6203 #define COMPAREFUNCTION_LEQUAL 4
6204 #define COMPAREFUNCTION_GREATER 5
6205 #define COMPAREFUNCTION_NOTEQUAL 6
6206 #define COMPAREFUNCTION_GEQUAL 7
6207 uint32_t BackFaceStencilTestFunction;
6208 #define STENCILOP_KEEP 0
6209 #define STENCILOP_ZERO 1
6210 #define STENCILOP_REPLACE 2
6211 #define STENCILOP_INCRSAT 3
6212 #define STENCILOP_DECRSAT 4
6213 #define STENCILOP_INCR 5
6214 #define STENCILOP_DECR 6
6215 #define STENCILOP_INVERT 7
6216 uint32_t BackfaceStencilFailOp;
6217 uint32_t BackfaceStencilPassDepthFailOp;
6218 uint32_t BackfaceStencilPassDepthPassOp;
6219 uint32_t StencilTestMask;
6220 uint32_t StencilWriteMask;
6221 uint32_t BackfaceStencilTestMask;
6222 uint32_t BackfaceStencilWriteMask;
6223 bool DepthTestEnable;
6224 #define COMPAREFUNCTION_ALWAYS 0
6225 #define COMPAREFUNCTION_NEVER 1
6226 #define COMPAREFUNCTION_LESS 2
6227 #define COMPAREFUNCTION_EQUAL 3
6228 #define COMPAREFUNCTION_LEQUAL 4
6229 #define COMPAREFUNCTION_GREATER 5
6230 #define COMPAREFUNCTION_NOTEQUAL 6
6231 #define COMPAREFUNCTION_GEQUAL 7
6232 uint32_t DepthTestFunction;
6233 bool DepthBufferWriteEnable;
6234 };
6235
6236 static inline void
6237 GEN7_DEPTH_STENCIL_STATE_pack(__gen_user_data *data, void * restrict dst,
6238 const struct GEN7_DEPTH_STENCIL_STATE * restrict values)
6239 {
6240 uint32_t *dw = (uint32_t * restrict) dst;
6241
6242 dw[0] =
6243 __gen_field(values->StencilTestEnable, 31, 31) |
6244 __gen_field(values->StencilTestFunction, 28, 30) |
6245 __gen_field(values->StencilFailOp, 25, 27) |
6246 __gen_field(values->StencilPassDepthFailOp, 22, 24) |
6247 __gen_field(values->StencilPassDepthPassOp, 19, 21) |
6248 __gen_field(values->StencilBufferWriteEnable, 18, 18) |
6249 __gen_field(values->DoubleSidedStencilEnable, 15, 15) |
6250 __gen_field(values->BackFaceStencilTestFunction, 12, 14) |
6251 __gen_field(values->BackfaceStencilFailOp, 9, 11) |
6252 __gen_field(values->BackfaceStencilPassDepthFailOp, 6, 8) |
6253 __gen_field(values->BackfaceStencilPassDepthPassOp, 3, 5) |
6254 0;
6255
6256 dw[1] =
6257 __gen_field(values->StencilTestMask, 24, 31) |
6258 __gen_field(values->StencilWriteMask, 16, 23) |
6259 __gen_field(values->BackfaceStencilTestMask, 8, 15) |
6260 __gen_field(values->BackfaceStencilWriteMask, 0, 7) |
6261 0;
6262
6263 dw[2] =
6264 __gen_field(values->DepthTestEnable, 31, 31) |
6265 __gen_field(values->DepthTestFunction, 27, 29) |
6266 __gen_field(values->DepthBufferWriteEnable, 26, 26) |
6267 0;
6268
6269 }
6270
6271 #define GEN7_INTERFACE_DESCRIPTOR_DATA_length 0x00000008
6272
6273 struct GEN7_INTERFACE_DESCRIPTOR_DATA {
6274 uint32_t KernelStartPointer;
6275 #define Multiple 0
6276 #define Single 1
6277 uint32_t SingleProgramFlow;
6278 #define NormalPriority 0
6279 #define HighPriority 1
6280 uint32_t ThreadPriority;
6281 #define IEEE754 0
6282 #define Alternate 1
6283 uint32_t FloatingPointMode;
6284 bool IllegalOpcodeExceptionEnable;
6285 bool MaskStackExceptionEnable;
6286 bool SoftwareExceptionEnable;
6287 uint32_t SamplerStatePointer;
6288 #define Nosamplersused 0
6289 #define Between1and4samplersused 1
6290 #define Between5and8samplersused 2
6291 #define Between9and12samplersused 3
6292 #define Between13and16samplersused 4
6293 uint32_t SamplerCount;
6294 uint32_t BindingTablePointer;
6295 uint32_t BindingTableEntryCount;
6296 uint32_t ConstantURBEntryReadLength;
6297 uint32_t ConstantURBEntryReadOffset;
6298 #define RTNE 0
6299 #define RU 1
6300 #define RD 2
6301 #define RTZ 3
6302 uint32_t RoundingMode;
6303 bool BarrierEnable;
6304 uint32_t SharedLocalMemorySize;
6305 uint32_t NumberofThreadsinGPGPUThreadGroup;
6306 };
6307
6308 static inline void
6309 GEN7_INTERFACE_DESCRIPTOR_DATA_pack(__gen_user_data *data, void * restrict dst,
6310 const struct GEN7_INTERFACE_DESCRIPTOR_DATA * restrict values)
6311 {
6312 uint32_t *dw = (uint32_t * restrict) dst;
6313
6314 dw[0] =
6315 __gen_offset(values->KernelStartPointer, 6, 31) |
6316 0;
6317
6318 dw[1] =
6319 __gen_field(values->SingleProgramFlow, 18, 18) |
6320 __gen_field(values->ThreadPriority, 17, 17) |
6321 __gen_field(values->FloatingPointMode, 16, 16) |
6322 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
6323 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
6324 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
6325 0;
6326
6327 dw[2] =
6328 __gen_offset(values->SamplerStatePointer, 5, 31) |
6329 __gen_field(values->SamplerCount, 2, 4) |
6330 0;
6331
6332 dw[3] =
6333 __gen_offset(values->BindingTablePointer, 5, 15) |
6334 __gen_field(values->BindingTableEntryCount, 0, 4) |
6335 0;
6336
6337 dw[4] =
6338 __gen_field(values->ConstantURBEntryReadLength, 16, 31) |
6339 __gen_field(values->ConstantURBEntryReadOffset, 0, 15) |
6340 0;
6341
6342 dw[5] =
6343 __gen_field(values->RoundingMode, 22, 23) |
6344 __gen_field(values->BarrierEnable, 21, 21) |
6345 __gen_field(values->SharedLocalMemorySize, 16, 20) |
6346 __gen_field(values->NumberofThreadsinGPGPUThreadGroup, 0, 7) |
6347 0;
6348
6349 dw[6] =
6350 0;
6351
6352 dw[7] =
6353 0;
6354
6355 }
6356
6357 #define GEN7_BINDING_TABLE_STATE_length 0x00000001
6358
6359 struct GEN7_BINDING_TABLE_STATE {
6360 uint32_t SurfaceStatePointer;
6361 };
6362
6363 static inline void
6364 GEN7_BINDING_TABLE_STATE_pack(__gen_user_data *data, void * restrict dst,
6365 const struct GEN7_BINDING_TABLE_STATE * restrict values)
6366 {
6367 uint32_t *dw = (uint32_t * restrict) dst;
6368
6369 dw[0] =
6370 __gen_offset(values->SurfaceStatePointer, 5, 31) |
6371 0;
6372
6373 }
6374
6375 #define GEN7_RENDER_SURFACE_STATE_length 0x00000008
6376
6377 struct GEN7_RENDER_SURFACE_STATE {
6378 #define SURFTYPE_1D 0
6379 #define SURFTYPE_2D 1
6380 #define SURFTYPE_3D 2
6381 #define SURFTYPE_CUBE 3
6382 #define SURFTYPE_BUFFER 4
6383 #define SURFTYPE_STRBUF 5
6384 #define SURFTYPE_NULL 7
6385 uint32_t SurfaceType;
6386 bool SurfaceArray;
6387 uint32_t SurfaceFormat;
6388 #define VALIGN_2 0
6389 #define VALIGN_4 1
6390 uint32_t SurfaceVerticalAlignment;
6391 #define HALIGN_4 0
6392 #define HALIGN_8 1
6393 uint32_t SurfaceHorizontalAlignment;
6394 uint32_t TiledSurface;
6395 #define TILEWALK_XMAJOR 0
6396 #define TILEWALK_YMAJOR 1
6397 uint32_t TileWalk;
6398 uint32_t VerticalLineStride;
6399 uint32_t VerticalLineStrideOffset;
6400 #define ARYSPC_FULL 0
6401 #define ARYSPC_LOD0 1
6402 uint32_t SurfaceArraySpacing;
6403 uint32_t RenderCacheReadWriteMode;
6404 #define NORMAL_MODE 0
6405 #define PROGRESSIVE_FRAME 2
6406 #define INTERLACED_FRAME 3
6407 uint32_t MediaBoundaryPixelMode;
6408 uint32_t CubeFaceEnables;
6409 __gen_address_type SurfaceBaseAddress;
6410 uint32_t Height;
6411 uint32_t Width;
6412 uint32_t Depth;
6413 uint32_t SurfacePitch;
6414 #define RTROTATE_0DEG 0
6415 #define RTROTATE_90DEG 1
6416 #define RTROTATE_270DEG 3
6417 uint32_t RenderTargetRotation;
6418 uint32_t MinimumArrayElement;
6419 uint32_t RenderTargetViewExtent;
6420 #define MSFMT_MSS 0
6421 #define MSFMT_DEPTH_STENCIL 1
6422 uint32_t MultisampledSurfaceStorageFormat;
6423 #define MULTISAMPLECOUNT_1 0
6424 #define MULTISAMPLECOUNT_4 2
6425 #define MULTISAMPLECOUNT_8 3
6426 uint32_t NumberofMultisamples;
6427 uint32_t MultisamplePositionPaletteIndex;
6428 uint32_t MinimumArrayElement0;
6429 uint32_t XOffset;
6430 uint32_t YOffset;
6431 struct GEN7_MEMORY_OBJECT_CONTROL_STATE SurfaceObjectControlState;
6432 uint32_t SurfaceMinLOD;
6433 uint32_t MIPCountLOD;
6434 __gen_address_type MCSBaseAddress;
6435 uint32_t MCSSurfacePitch;
6436 __gen_address_type AppendCounterAddress;
6437 bool AppendCounterEnable;
6438 bool MCSEnable;
6439 uint32_t XOffsetforUVPlane;
6440 uint32_t YOffsetforUVPlane;
6441 #define CC_ZERO 0
6442 #define CC_ONE 1
6443 uint32_t RedClearColor;
6444 #define CC_ZERO 0
6445 #define CC_ONE 1
6446 uint32_t GreenClearColor;
6447 #define CC_ZERO 0
6448 #define CC_ONE 1
6449 uint32_t BlueClearColor;
6450 #define CC_ZERO 0
6451 #define CC_ONE 1
6452 uint32_t AlphaClearColor;
6453 float ResourceMinLOD;
6454 };
6455
6456 static inline void
6457 GEN7_RENDER_SURFACE_STATE_pack(__gen_user_data *data, void * restrict dst,
6458 const struct GEN7_RENDER_SURFACE_STATE * restrict values)
6459 {
6460 uint32_t *dw = (uint32_t * restrict) dst;
6461
6462 dw[0] =
6463 __gen_field(values->SurfaceType, 29, 31) |
6464 __gen_field(values->SurfaceArray, 28, 28) |
6465 __gen_field(values->SurfaceFormat, 18, 26) |
6466 __gen_field(values->SurfaceVerticalAlignment, 16, 17) |
6467 __gen_field(values->SurfaceHorizontalAlignment, 15, 15) |
6468 __gen_field(values->TiledSurface, 14, 14) |
6469 __gen_field(values->TileWalk, 13, 13) |
6470 __gen_field(values->VerticalLineStride, 12, 12) |
6471 __gen_field(values->VerticalLineStrideOffset, 11, 11) |
6472 __gen_field(values->SurfaceArraySpacing, 10, 10) |
6473 __gen_field(values->RenderCacheReadWriteMode, 8, 8) |
6474 __gen_field(values->MediaBoundaryPixelMode, 6, 7) |
6475 __gen_field(values->CubeFaceEnables, 0, 5) |
6476 0;
6477
6478 uint32_t dw1 =
6479 0;
6480
6481 dw[1] =
6482 __gen_combine_address(data, &dw[1], values->SurfaceBaseAddress, dw1);
6483
6484 dw[2] =
6485 __gen_field(values->Height, 16, 29) |
6486 __gen_field(values->Width, 0, 13) |
6487 0;
6488
6489 dw[3] =
6490 __gen_field(values->Depth, 21, 31) |
6491 __gen_field(values->SurfacePitch, 0, 17) |
6492 0;
6493
6494 dw[4] =
6495 __gen_field(values->RenderTargetRotation, 29, 30) |
6496 __gen_field(values->MinimumArrayElement, 18, 28) |
6497 __gen_field(values->RenderTargetViewExtent, 7, 17) |
6498 __gen_field(values->MultisampledSurfaceStorageFormat, 6, 6) |
6499 __gen_field(values->NumberofMultisamples, 3, 5) |
6500 __gen_field(values->MultisamplePositionPaletteIndex, 0, 2) |
6501 __gen_field(values->MinimumArrayElement, 0, 26) |
6502 0;
6503
6504 uint32_t dw_SurfaceObjectControlState;
6505 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceObjectControlState, &values->SurfaceObjectControlState);
6506 dw[5] =
6507 __gen_offset(values->XOffset, 25, 31) |
6508 __gen_offset(values->YOffset, 20, 23) |
6509 __gen_field(dw_SurfaceObjectControlState, 16, 19) |
6510 __gen_field(values->SurfaceMinLOD, 4, 7) |
6511 __gen_field(values->MIPCountLOD, 0, 3) |
6512 0;
6513
6514 uint32_t dw6 =
6515 __gen_field(values->MCSSurfacePitch, 3, 11) |
6516 __gen_field(values->AppendCounterEnable, 1, 1) |
6517 __gen_field(values->MCSEnable, 0, 0) |
6518 __gen_field(values->XOffsetforUVPlane, 16, 29) |
6519 __gen_field(values->YOffsetforUVPlane, 0, 13) |
6520 0;
6521
6522 dw[6] =
6523 __gen_combine_address(data, &dw[6], values->AppendCounterAddress, dw6);
6524
6525 dw[7] =
6526 __gen_field(values->RedClearColor, 31, 31) |
6527 __gen_field(values->GreenClearColor, 30, 30) |
6528 __gen_field(values->BlueClearColor, 29, 29) |
6529 __gen_field(values->AlphaClearColor, 28, 28) |
6530 __gen_field(values->ResourceMinLOD * (1 << 8), 0, 11) |
6531 0;
6532
6533 }
6534
6535 #define GEN7_SAMPLER_BORDER_COLOR_STATE_length 0x00000004
6536
6537 struct GEN7_SAMPLER_BORDER_COLOR_STATE {
6538 float BorderColorRedDX100GL;
6539 uint32_t BorderColorAlpha;
6540 uint32_t BorderColorBlue;
6541 uint32_t BorderColorGreen;
6542 uint32_t BorderColorRedDX9;
6543 float BorderColorGreen0;
6544 float BorderColorBlue0;
6545 float BorderColorAlpha0;
6546 };
6547
6548 static inline void
6549 GEN7_SAMPLER_BORDER_COLOR_STATE_pack(__gen_user_data *data, void * restrict dst,
6550 const struct GEN7_SAMPLER_BORDER_COLOR_STATE * restrict values)
6551 {
6552 uint32_t *dw = (uint32_t * restrict) dst;
6553
6554 dw[0] =
6555 __gen_float(values->BorderColorRedDX100GL) |
6556 __gen_field(values->BorderColorAlpha, 24, 31) |
6557 __gen_field(values->BorderColorBlue, 16, 23) |
6558 __gen_field(values->BorderColorGreen, 8, 15) |
6559 __gen_field(values->BorderColorRedDX9, 0, 7) |
6560 0;
6561
6562 dw[1] =
6563 __gen_float(values->BorderColorGreen) |
6564 0;
6565
6566 dw[2] =
6567 __gen_float(values->BorderColorBlue) |
6568 0;
6569
6570 dw[3] =
6571 __gen_float(values->BorderColorAlpha) |
6572 0;
6573
6574 }
6575
6576 #define GEN7_SAMPLER_STATE_length 0x00000004
6577
6578 struct GEN7_SAMPLER_STATE {
6579 bool SamplerDisable;
6580 #define DX10OGL 0
6581 #define DX9 1
6582 uint32_t TextureBorderColorMode;
6583 #define OGL 1
6584 uint32_t LODPreClampEnable;
6585 float BaseMipLevel;
6586 #define MIPFILTER_NONE 0
6587 #define MIPFILTER_NEAREST 1
6588 #define MIPFILTER_LINEAR 3
6589 uint32_t MipModeFilter;
6590 #define MAPFILTER_NEAREST 0
6591 #define MAPFILTER_LINEAR 1
6592 #define MAPFILTER_ANISOTROPIC 2
6593 #define MAPFILTER_MONO 6
6594 uint32_t MagModeFilter;
6595 #define MAPFILTER_NEAREST 0
6596 #define MAPFILTER_LINEAR 1
6597 #define MAPFILTER_ANISOTROPIC 2
6598 #define MAPFILTER_MONO 6
6599 uint32_t MinModeFilter;
6600 float TextureLODBias;
6601 #define LEGACY 0
6602 #define EWAApproximation 1
6603 uint32_t AnisotropicAlgorithm;
6604 float MinLOD;
6605 float MaxLOD;
6606 #define PREFILTEROPALWAYS 0
6607 #define PREFILTEROPNEVER 1
6608 #define PREFILTEROPLESS 2
6609 #define PREFILTEROPEQUAL 3
6610 #define PREFILTEROPLEQUAL 4
6611 #define PREFILTEROPGREATER 5
6612 #define PREFILTEROPNOTEQUAL 6
6613 #define PREFILTEROPGEQUAL 7
6614 uint32_t ShadowFunction;
6615 #define PROGRAMMED 0
6616 #define OVERRIDE 1
6617 uint32_t CubeSurfaceControlMode;
6618 uint32_t BorderColorPointer;
6619 bool ChromaKeyEnable;
6620 uint32_t ChromaKeyIndex;
6621 #define KEYFILTER_KILL_ON_ANY_MATCH 0
6622 #define KEYFILTER_REPLACE_BLACK 1
6623 uint32_t ChromaKeyMode;
6624 #define RATIO21 0
6625 #define RATIO41 1
6626 #define RATIO61 2
6627 #define RATIO81 3
6628 #define RATIO101 4
6629 #define RATIO121 5
6630 #define RATIO141 6
6631 #define RATIO161 7
6632 uint32_t MaximumAnisotropy;
6633 bool RAddressMinFilterRoundingEnable;
6634 bool RAddressMagFilterRoundingEnable;
6635 bool VAddressMinFilterRoundingEnable;
6636 bool VAddressMagFilterRoundingEnable;
6637 bool UAddressMinFilterRoundingEnable;
6638 bool UAddressMagFilterRoundingEnable;
6639 #define FULL 0
6640 #define MED 2
6641 #define LOW 3
6642 uint32_t TrilinearFilterQuality;
6643 bool NonnormalizedCoordinateEnable;
6644 uint32_t TCXAddressControlMode;
6645 uint32_t TCYAddressControlMode;
6646 uint32_t TCZAddressControlMode;
6647 };
6648
6649 static inline void
6650 GEN7_SAMPLER_STATE_pack(__gen_user_data *data, void * restrict dst,
6651 const struct GEN7_SAMPLER_STATE * restrict values)
6652 {
6653 uint32_t *dw = (uint32_t * restrict) dst;
6654
6655 dw[0] =
6656 __gen_field(values->SamplerDisable, 31, 31) |
6657 __gen_field(values->TextureBorderColorMode, 29, 29) |
6658 __gen_field(values->LODPreClampEnable, 28, 28) |
6659 __gen_field(values->BaseMipLevel * (1 << 1), 22, 26) |
6660 __gen_field(values->MipModeFilter, 20, 21) |
6661 __gen_field(values->MagModeFilter, 17, 19) |
6662 __gen_field(values->MinModeFilter, 14, 16) |
6663 __gen_fixed(values->TextureLODBias, 1, 13, true, 8) |
6664 __gen_field(values->AnisotropicAlgorithm, 0, 0) |
6665 0;
6666
6667 dw[1] =
6668 __gen_field(values->MinLOD * (1 << 8), 20, 31) |
6669 __gen_field(values->MaxLOD * (1 << 8), 8, 19) |
6670 __gen_field(values->ShadowFunction, 1, 3) |
6671 __gen_field(values->CubeSurfaceControlMode, 0, 0) |
6672 0;
6673
6674 dw[2] =
6675 __gen_offset(values->BorderColorPointer, 5, 31) |
6676 0;
6677
6678 dw[3] =
6679 __gen_field(values->ChromaKeyEnable, 25, 25) |
6680 __gen_field(values->ChromaKeyIndex, 23, 24) |
6681 __gen_field(values->ChromaKeyMode, 22, 22) |
6682 __gen_field(values->MaximumAnisotropy, 19, 21) |
6683 __gen_field(values->RAddressMinFilterRoundingEnable, 13, 13) |
6684 __gen_field(values->RAddressMagFilterRoundingEnable, 14, 14) |
6685 __gen_field(values->VAddressMinFilterRoundingEnable, 15, 15) |
6686 __gen_field(values->VAddressMagFilterRoundingEnable, 16, 16) |
6687 __gen_field(values->UAddressMinFilterRoundingEnable, 17, 17) |
6688 __gen_field(values->UAddressMagFilterRoundingEnable, 18, 18) |
6689 __gen_field(values->TrilinearFilterQuality, 11, 12) |
6690 __gen_field(values->NonnormalizedCoordinateEnable, 10, 10) |
6691 __gen_field(values->TCXAddressControlMode, 6, 8) |
6692 __gen_field(values->TCYAddressControlMode, 3, 5) |
6693 __gen_field(values->TCZAddressControlMode, 0, 2) |
6694 0;
6695
6696 }
6697
6698 /* Enum 3D_Prim_Topo_Type */
6699 #define _3DPRIM_POINTLIST 1
6700 #define _3DPRIM_LINELIST 2
6701 #define _3DPRIM_LINESTRIP 3
6702 #define _3DPRIM_TRILIST 4
6703 #define _3DPRIM_TRISTRIP 5
6704 #define _3DPRIM_TRIFAN 6
6705 #define _3DPRIM_QUADLIST 7
6706 #define _3DPRIM_QUADSTRIP 8
6707 #define _3DPRIM_LINELIST_ADJ 9
6708 #define _3DPRIM_LINESTRIP_ADJ 10
6709 #define _3DPRIM_TRILIST_ADJ 11
6710 #define _3DPRIM_TRISTRIP_ADJ 12
6711 #define _3DPRIM_TRISTRIP_REVERSE 13
6712 #define _3DPRIM_POLYGON 14
6713 #define _3DPRIM_RECTLIST 15
6714 #define _3DPRIM_LINELOOP 16
6715 #define _3DPRIM_POINTLIST_BF 17
6716 #define _3DPRIM_LINESTRIP_CONT 18
6717 #define _3DPRIM_LINESTRIP_BF 19
6718 #define _3DPRIM_LINESTRIP_CONT_BF 20
6719 #define _3DPRIM_TRIFAN_NOSTIPPLE 22
6720 #define _3DPRIM_PATCHLIST_1 32
6721 #define _3DPRIM_PATCHLIST_2 33
6722 #define _3DPRIM_PATCHLIST_3 34
6723 #define _3DPRIM_PATCHLIST_4 35
6724 #define _3DPRIM_PATCHLIST_5 36
6725 #define _3DPRIM_PATCHLIST_6 37
6726 #define _3DPRIM_PATCHLIST_7 38
6727 #define _3DPRIM_PATCHLIST_8 39
6728 #define _3DPRIM_PATCHLIST_9 40
6729 #define _3DPRIM_PATCHLIST_10 41
6730 #define _3DPRIM_PATCHLIST_11 42
6731 #define _3DPRIM_PATCHLIST_12 43
6732 #define _3DPRIM_PATCHLIST_13 44
6733 #define _3DPRIM_PATCHLIST_14 45
6734 #define _3DPRIM_PATCHLIST_15 46
6735 #define _3DPRIM_PATCHLIST_16 47
6736 #define _3DPRIM_PATCHLIST_17 48
6737 #define _3DPRIM_PATCHLIST_18 49
6738 #define _3DPRIM_PATCHLIST_19 50
6739 #define _3DPRIM_PATCHLIST_20 51
6740 #define _3DPRIM_PATCHLIST_21 52
6741 #define _3DPRIM_PATCHLIST_22 53
6742 #define _3DPRIM_PATCHLIST_23 54
6743 #define _3DPRIM_PATCHLIST_24 55
6744 #define _3DPRIM_PATCHLIST_25 56
6745 #define _3DPRIM_PATCHLIST_26 57
6746 #define _3DPRIM_PATCHLIST_27 58
6747 #define _3DPRIM_PATCHLIST_28 59
6748 #define _3DPRIM_PATCHLIST_29 60
6749 #define _3DPRIM_PATCHLIST_30 61
6750 #define _3DPRIM_PATCHLIST_31 62
6751 #define _3DPRIM_PATCHLIST_32 63
6752
6753 /* Enum 3D_Vertex_Component_Control */
6754 #define VFCOMP_NOSTORE 0
6755 #define VFCOMP_STORE_SRC 1
6756 #define VFCOMP_STORE_0 2
6757 #define VFCOMP_STORE_1_FP 3
6758 #define VFCOMP_STORE_1_INT 4
6759 #define VFCOMP_STORE_VID 5
6760 #define VFCOMP_STORE_IID 6
6761 #define VFCOMP_STORE_PID 7
6762
6763 /* Enum 3D_Compare_Function */
6764 #define COMPAREFUNCTION_ALWAYS 0
6765 #define COMPAREFUNCTION_NEVER 1
6766 #define COMPAREFUNCTION_LESS 2
6767 #define COMPAREFUNCTION_EQUAL 3
6768 #define COMPAREFUNCTION_LEQUAL 4
6769 #define COMPAREFUNCTION_GREATER 5
6770 #define COMPAREFUNCTION_NOTEQUAL 6
6771 #define COMPAREFUNCTION_GEQUAL 7
6772
6773 /* Enum SURFACE_FORMAT */
6774 #define R32G32B32A32_FLOAT 0
6775 #define R32G32B32A32_SINT 1
6776 #define R32G32B32A32_UINT 2
6777 #define R32G32B32A32_UNORM 3
6778 #define R32G32B32A32_SNORM 4
6779 #define R64G64_FLOAT 5
6780 #define R32G32B32X32_FLOAT 6
6781 #define R32G32B32A32_SSCALED 7
6782 #define R32G32B32A32_USCALED 8
6783 #define R32G32B32A32_SFIXED 32
6784 #define R64G64_PASSTHRU 33
6785 #define R32G32B32_FLOAT 64
6786 #define R32G32B32_SINT 65
6787 #define R32G32B32_UINT 66
6788 #define R32G32B32_UNORM 67
6789 #define R32G32B32_SNORM 68
6790 #define R32G32B32_SSCALED 69
6791 #define R32G32B32_USCALED 70
6792 #define R32G32B32_SFIXED 80
6793 #define R16G16B16A16_UNORM 128
6794 #define R16G16B16A16_SNORM 129
6795 #define R16G16B16A16_SINT 130
6796 #define R16G16B16A16_UINT 131
6797 #define R16G16B16A16_FLOAT 132
6798 #define R32G32_FLOAT 133
6799 #define R32G32_SINT 134
6800 #define R32G32_UINT 135
6801 #define R32_FLOAT_X8X24_TYPELESS 136
6802 #define X32_TYPELESS_G8X24_UINT 137
6803 #define L32A32_FLOAT 138
6804 #define R32G32_UNORM 139
6805 #define R32G32_SNORM 140
6806 #define R64_FLOAT 141
6807 #define R16G16B16X16_UNORM 142
6808 #define R16G16B16X16_FLOAT 143
6809 #define A32X32_FLOAT 144
6810 #define L32X32_FLOAT 145
6811 #define I32X32_FLOAT 146
6812 #define R16G16B16A16_SSCALED 147
6813 #define R16G16B16A16_USCALED 148
6814 #define R32G32_SSCALED 149
6815 #define R32G32_USCALED 150
6816 #define R32G32_SFIXED 160
6817 #define R64_PASSTHRU 161
6818 #define B8G8R8A8_UNORM 192
6819 #define B8G8R8A8_UNORM_SRGB 193
6820 #define R10G10B10A2_UNORM 194
6821 #define R10G10B10A2_UNORM_SRGB 195
6822 #define R10G10B10A2_UINT 196
6823 #define R10G10B10_SNORM_A2_UNORM 197
6824 #define R8G8B8A8_UNORM 199
6825 #define R8G8B8A8_UNORM_SRGB 200
6826 #define R8G8B8A8_SNORM 201
6827 #define R8G8B8A8_SINT 202
6828 #define R8G8B8A8_UINT 203
6829 #define R16G16_UNORM 204
6830 #define R16G16_SNORM 205
6831 #define R16G16_SINT 206
6832 #define R16G16_UINT 207
6833 #define R16G16_FLOAT 208
6834 #define B10G10R10A2_UNORM 209
6835 #define B10G10R10A2_UNORM_SRGB 210
6836 #define R11G11B10_FLOAT 211
6837 #define R32_SINT 214
6838 #define R32_UINT 215
6839 #define R32_FLOAT 216
6840 #define R24_UNORM_X8_TYPELESS 217
6841 #define X24_TYPELESS_G8_UINT 218
6842 #define L32_UNORM 221
6843 #define A32_UNORM 222
6844 #define L16A16_UNORM 223
6845 #define I24X8_UNORM 224
6846 #define L24X8_UNORM 225
6847 #define A24X8_UNORM 226
6848 #define I32_FLOAT 227
6849 #define L32_FLOAT 228
6850 #define A32_FLOAT 229
6851 #define X8B8_UNORM_G8R8_SNORM 230
6852 #define A8X8_UNORM_G8R8_SNORM 231
6853 #define B8X8_UNORM_G8R8_SNORM 232
6854 #define B8G8R8X8_UNORM 233
6855 #define B8G8R8X8_UNORM_SRGB 234
6856 #define R8G8B8X8_UNORM 235
6857 #define R8G8B8X8_UNORM_SRGB 236
6858 #define R9G9B9E5_SHAREDEXP 237
6859 #define B10G10R10X2_UNORM 238
6860 #define L16A16_FLOAT 240
6861 #define R32_UNORM 241
6862 #define R32_SNORM 242
6863 #define R10G10B10X2_USCALED 243
6864 #define R8G8B8A8_SSCALED 244
6865 #define R8G8B8A8_USCALED 245
6866 #define R16G16_SSCALED 246
6867 #define R16G16_USCALED 247
6868 #define R32_SSCALED 248
6869 #define R32_USCALED 249
6870 #define B5G6R5_UNORM 256
6871 #define B5G6R5_UNORM_SRGB 257
6872 #define B5G5R5A1_UNORM 258
6873 #define B5G5R5A1_UNORM_SRGB 259
6874 #define B4G4R4A4_UNORM 260
6875 #define B4G4R4A4_UNORM_SRGB 261
6876 #define R8G8_UNORM 262
6877 #define R8G8_SNORM 263
6878 #define R8G8_SINT 264
6879 #define R8G8_UINT 265
6880 #define R16_UNORM 266
6881 #define R16_SNORM 267
6882 #define R16_SINT 268
6883 #define R16_UINT 269
6884 #define R16_FLOAT 270
6885 #define A8P8_UNORM_PALETTE0 271
6886 #define A8P8_UNORM_PALETTE1 272
6887 #define I16_UNORM 273
6888 #define L16_UNORM 274
6889 #define A16_UNORM 275
6890 #define L8A8_UNORM 276
6891 #define I16_FLOAT 277
6892 #define L16_FLOAT 278
6893 #define A16_FLOAT 279
6894 #define L8A8_UNORM_SRGB 280
6895 #define R5G5_SNORM_B6_UNORM 281
6896 #define B5G5R5X1_UNORM 282
6897 #define B5G5R5X1_UNORM_SRGB 283
6898 #define R8G8_SSCALED 284
6899 #define R8G8_USCALED 285
6900 #define R16_SSCALED 286
6901 #define R16_USCALED 287
6902 #define P8A8_UNORM_PALETTE0 290
6903 #define P8A8_UNORM_PALETTE1 291
6904 #define A1B5G5R5_UNORM 292
6905 #define A4B4G4R4_UNORM 293
6906 #define L8A8_UINT 294
6907 #define L8A8_SINT 295
6908 #define R8_UNORM 320
6909 #define R8_SNORM 321
6910 #define R8_SINT 322
6911 #define R8_UINT 323
6912 #define A8_UNORM 324
6913 #define I8_UNORM 325
6914 #define L8_UNORM 326
6915 #define P4A4_UNORM_PALETTE0 327
6916 #define A4P4_UNORM_PALETTE0 328
6917 #define R8_SSCALED 329
6918 #define R8_USCALED 330
6919 #define P8_UNORM_PALETTE0 331
6920 #define L8_UNORM_SRGB 332
6921 #define P8_UNORM_PALETTE1 333
6922 #define P4A4_UNORM_PALETTE1 334
6923 #define A4P4_UNORM_PALETTE1 335
6924 #define Y8_UNORM 336
6925 #define L8_UINT 338
6926 #define L8_SINT 339
6927 #define I8_UINT 340
6928 #define I8_SINT 341
6929 #define DXT1_RGB_SRGB 384
6930 #define R1_UNORM 385
6931 #define YCRCB_NORMAL 386
6932 #define YCRCB_SWAPUVY 387
6933 #define P2_UNORM_PALETTE0 388
6934 #define P2_UNORM_PALETTE1 389
6935 #define BC1_UNORM 390
6936 #define BC2_UNORM 391
6937 #define BC3_UNORM 392
6938 #define BC4_UNORM 393
6939 #define BC5_UNORM 394
6940 #define BC1_UNORM_SRGB 395
6941 #define BC2_UNORM_SRGB 396
6942 #define BC3_UNORM_SRGB 397
6943 #define MONO8 398
6944 #define YCRCB_SWAPUV 399
6945 #define YCRCB_SWAPY 400
6946 #define DXT1_RGB 401
6947 #define FXT1 402
6948 #define R8G8B8_UNORM 403
6949 #define R8G8B8_SNORM 404
6950 #define R8G8B8_SSCALED 405
6951 #define R8G8B8_USCALED 406
6952 #define R64G64B64A64_FLOAT 407
6953 #define R64G64B64_FLOAT 408
6954 #define BC4_SNORM 409
6955 #define BC5_SNORM 410
6956 #define R16G16B16_FLOAT 411
6957 #define R16G16B16_UNORM 412
6958 #define R16G16B16_SNORM 413
6959 #define R16G16B16_SSCALED 414
6960 #define R16G16B16_USCALED 415
6961 #define BC6H_SF16 417
6962 #define BC7_UNORM 418
6963 #define BC7_UNORM_SRGB 419
6964 #define BC6H_UF16 420
6965 #define PLANAR_420_8 421
6966 #define R8G8B8_UNORM_SRGB 424
6967 #define ETC1_RGB8 425
6968 #define ETC2_RGB8 426
6969 #define EAC_R11 427
6970 #define EAC_RG11 428
6971 #define EAC_SIGNED_R11 429
6972 #define EAC_SIGNED_RG11 430
6973 #define ETC2_SRGB8 431
6974 #define R16G16B16_UINT 432
6975 #define R16G16B16_SINT 433
6976 #define R32_SFIXED 434
6977 #define R10G10B10A2_SNORM 435
6978 #define R10G10B10A2_USCALED 436
6979 #define R10G10B10A2_SSCALED 437
6980 #define R10G10B10A2_SINT 438
6981 #define B10G10R10A2_SNORM 439
6982 #define B10G10R10A2_USCALED 440
6983 #define B10G10R10A2_SSCALED 441
6984 #define B10G10R10A2_UINT 442
6985 #define B10G10R10A2_SINT 443
6986 #define R64G64B64A64_PASSTHRU 444
6987 #define R64G64B64_PASSTHRU 445
6988 #define ETC2_RGB8_PTA 448
6989 #define ETC2_SRGB8_PTA 449
6990 #define ETC2_EAC_RGBA8 450
6991 #define ETC2_EAC_SRGB8_A8 451
6992 #define R8G8B8_UINT 456
6993 #define R8G8B8_SINT 457
6994 #define RAW 511
6995
6996 /* Enum Texture Coordinate Mode */
6997 #define TCM_WRAP 0
6998 #define TCM_MIRROR 1
6999 #define TCM_CLAMP 2
7000 #define TCM_CUBE 3
7001 #define TCM_CLAMP_BORDER 4
7002 #define TCM_MIRROR_ONCE 5
7003