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vk: Update generated header files
[mesa.git] / src / vulkan / gen7_pack.h
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24
25 /* Instructions, enums and structures for IVB.
26 *
27 * This file has been generated, do not hand edit.
28 */
29
30 #pragma once
31
32 #include <stdio.h>
33 #include <assert.h>
34
35 #ifndef __gen_field_functions
36 #define __gen_field_functions
37
38 union __gen_value {
39 float f;
40 uint32_t dw;
41 };
42
43 static inline uint64_t
44 __gen_field(uint64_t v, uint32_t start, uint32_t end)
45 {
46 #if DEBUG
47 if (end - start + 1 < 64)
48 assert(v < 1ul << (end - start + 1));
49 #endif
50
51 return v << start;
52 }
53
54 static inline uint64_t
55 __gen_offset(uint64_t v, uint32_t start, uint32_t end)
56 {
57 #if DEBUG
58 uint64_t mask = (~0ul >> (64 - (end - start + 1))) << start;
59
60 assert((v & ~mask) == 0);
61 #endif
62
63 return v;
64 }
65
66 static inline uint32_t
67 __gen_float(float v)
68 {
69 return ((union __gen_value) { .f = (v) }).dw;
70 }
71
72 #ifndef __gen_address_type
73 #error #define __gen_address_type before including this file
74 #endif
75
76 #ifndef __gen_user_data
77 #error #define __gen_combine_address before including this file
78 #endif
79
80 #endif
81
82 #define GEN7_3DSTATE_URB_VS_length 0x00000002
83 #define GEN7_3DSTATE_URB_VS_length_bias 0x00000002
84 #define GEN7_3DSTATE_URB_VS_header \
85 .CommandType = 3, \
86 .CommandSubType = 3, \
87 ._3DCommandOpcode = 0, \
88 ._3DCommandSubOpcode = 48, \
89 .DwordLength = 0
90
91 struct GEN7_3DSTATE_URB_VS {
92 uint32_t CommandType;
93 uint32_t CommandSubType;
94 uint32_t _3DCommandOpcode;
95 uint32_t _3DCommandSubOpcode;
96 uint32_t DwordLength;
97 uint32_t VSURBStartingAddress;
98 uint32_t VSURBEntryAllocationSize;
99 uint32_t VSNumberofURBEntries;
100 };
101
102 static inline void
103 GEN7_3DSTATE_URB_VS_pack(__gen_user_data *data, void * restrict dst,
104 const struct GEN7_3DSTATE_URB_VS * restrict values)
105 {
106 uint32_t *dw = (uint32_t * restrict) dst;
107
108 dw[0] =
109 __gen_field(values->CommandType, 29, 31) |
110 __gen_field(values->CommandSubType, 27, 28) |
111 __gen_field(values->_3DCommandOpcode, 24, 26) |
112 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
113 __gen_field(values->DwordLength, 0, 7) |
114 0;
115
116 dw[1] =
117 __gen_field(values->VSURBStartingAddress, 25, 29) |
118 __gen_field(values->VSURBEntryAllocationSize, 16, 24) |
119 __gen_field(values->VSNumberofURBEntries, 0, 15) |
120 0;
121
122 }
123
124 #define GEN7_MI_STORE_REGISTER_MEM_length 0x00000003
125 #define GEN7_MI_STORE_REGISTER_MEM_length_bias 0x00000002
126 #define GEN7_MI_STORE_REGISTER_MEM_header \
127 .CommandType = 0, \
128 .MICommandOpcode = 36, \
129 .DwordLength = 1
130
131 struct GEN7_MI_STORE_REGISTER_MEM {
132 uint32_t CommandType;
133 uint32_t MICommandOpcode;
134 uint32_t UseGlobalGTT;
135 uint32_t DwordLength;
136 uint32_t RegisterAddress;
137 __gen_address_type MemoryAddress;
138 };
139
140 static inline void
141 GEN7_MI_STORE_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
142 const struct GEN7_MI_STORE_REGISTER_MEM * restrict values)
143 {
144 uint32_t *dw = (uint32_t * restrict) dst;
145
146 dw[0] =
147 __gen_field(values->CommandType, 29, 31) |
148 __gen_field(values->MICommandOpcode, 23, 28) |
149 __gen_field(values->UseGlobalGTT, 22, 22) |
150 __gen_field(values->DwordLength, 0, 7) |
151 0;
152
153 dw[1] =
154 __gen_offset(values->RegisterAddress, 2, 22) |
155 0;
156
157 uint32_t dw2 =
158 0;
159
160 dw[2] =
161 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
162
163 }
164
165 #define GEN7_PIPELINE_SELECT_length 0x00000001
166 #define GEN7_PIPELINE_SELECT_length_bias 0x00000001
167 #define GEN7_PIPELINE_SELECT_header \
168 .CommandType = 3, \
169 .CommandSubType = 1, \
170 ._3DCommandOpcode = 1, \
171 ._3DCommandSubOpcode = 4
172
173 struct GEN7_PIPELINE_SELECT {
174 uint32_t CommandType;
175 uint32_t CommandSubType;
176 uint32_t _3DCommandOpcode;
177 uint32_t _3DCommandSubOpcode;
178 #define _3D 0
179 #define Media 1
180 #define GPGPU 2
181 uint32_t PipelineSelection;
182 };
183
184 static inline void
185 GEN7_PIPELINE_SELECT_pack(__gen_user_data *data, void * restrict dst,
186 const struct GEN7_PIPELINE_SELECT * restrict values)
187 {
188 uint32_t *dw = (uint32_t * restrict) dst;
189
190 dw[0] =
191 __gen_field(values->CommandType, 29, 31) |
192 __gen_field(values->CommandSubType, 27, 28) |
193 __gen_field(values->_3DCommandOpcode, 24, 26) |
194 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
195 __gen_field(values->PipelineSelection, 0, 1) |
196 0;
197
198 }
199
200 #define GEN7_STATE_BASE_ADDRESS_length 0x0000000a
201 #define GEN7_STATE_BASE_ADDRESS_length_bias 0x00000002
202 #define GEN7_STATE_BASE_ADDRESS_header \
203 .CommandType = 3, \
204 .CommandSubType = 0, \
205 ._3DCommandOpcode = 1, \
206 ._3DCommandSubOpcode = 1, \
207 .DwordLength = 8
208
209 struct GEN7_STATE_BASE_ADDRESS {
210 uint32_t CommandType;
211 uint32_t CommandSubType;
212 uint32_t _3DCommandOpcode;
213 uint32_t _3DCommandSubOpcode;
214 uint32_t DwordLength;
215 __gen_address_type GeneralStateBaseAddress;
216 uint32_t GeneralStateMemoryObjectControlState;
217 uint32_t StatelessDataPortAccessMemoryObjectControlState;
218 uint32_t StatelessDataPortAccessForceWriteThru;
219 uint32_t GeneralStateBaseAddressModifyEnable;
220 __gen_address_type SurfaceStateBaseAddress;
221 uint32_t SurfaceStateMemoryObjectControlState;
222 uint32_t SurfaceStateBaseAddressModifyEnable;
223 __gen_address_type DynamicStateBaseAddress;
224 uint32_t DynamicStateMemoryObjectControlState;
225 uint32_t DynamicStateBaseAddressModifyEnable;
226 __gen_address_type IndirectObjectBaseAddress;
227 uint32_t IndirectObjectMemoryObjectControlState;
228 uint32_t IndirectObjectBaseAddressModifyEnable;
229 __gen_address_type InstructionBaseAddress;
230 uint32_t InstructionMemoryObjectControlState;
231 uint32_t InstructionBaseAddressModifyEnable;
232 __gen_address_type GeneralStateAccessUpperBound;
233 uint32_t GeneralStateAccessUpperBoundModifyEnable;
234 __gen_address_type DynamicStateAccessUpperBound;
235 uint32_t DynamicStateAccessUpperBoundModifyEnable;
236 __gen_address_type IndirectObjectAccessUpperBound;
237 uint32_t IndirectObjectAccessUpperBoundModifyEnable;
238 __gen_address_type InstructionAccessUpperBound;
239 uint32_t InstructionAccessUpperBoundModifyEnable;
240 };
241
242 static inline void
243 GEN7_STATE_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
244 const struct GEN7_STATE_BASE_ADDRESS * restrict values)
245 {
246 uint32_t *dw = (uint32_t * restrict) dst;
247
248 dw[0] =
249 __gen_field(values->CommandType, 29, 31) |
250 __gen_field(values->CommandSubType, 27, 28) |
251 __gen_field(values->_3DCommandOpcode, 24, 26) |
252 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
253 __gen_field(values->DwordLength, 0, 7) |
254 0;
255
256 uint32_t dw1 =
257 /* Struct GeneralStateMemoryObjectControlState: found MEMORY_OBJECT_CONTROL_STATE */
258 /* Struct StatelessDataPortAccessMemoryObjectControlState: found MEMORY_OBJECT_CONTROL_STATE */
259 __gen_field(values->StatelessDataPortAccessForceWriteThru, 3, 3) |
260 __gen_field(values->GeneralStateBaseAddressModifyEnable, 0, 0) |
261 0;
262
263 dw[1] =
264 __gen_combine_address(data, &dw[1], values->GeneralStateBaseAddress, dw1);
265
266 uint32_t dw2 =
267 /* Struct SurfaceStateMemoryObjectControlState: found MEMORY_OBJECT_CONTROL_STATE */
268 __gen_field(values->SurfaceStateBaseAddressModifyEnable, 0, 0) |
269 0;
270
271 dw[2] =
272 __gen_combine_address(data, &dw[2], values->SurfaceStateBaseAddress, dw2);
273
274 uint32_t dw3 =
275 /* Struct DynamicStateMemoryObjectControlState: found MEMORY_OBJECT_CONTROL_STATE */
276 __gen_field(values->DynamicStateBaseAddressModifyEnable, 0, 0) |
277 0;
278
279 dw[3] =
280 __gen_combine_address(data, &dw[3], values->DynamicStateBaseAddress, dw3);
281
282 uint32_t dw4 =
283 /* Struct IndirectObjectMemoryObjectControlState: found MEMORY_OBJECT_CONTROL_STATE */
284 __gen_field(values->IndirectObjectBaseAddressModifyEnable, 0, 0) |
285 0;
286
287 dw[4] =
288 __gen_combine_address(data, &dw[4], values->IndirectObjectBaseAddress, dw4);
289
290 uint32_t dw5 =
291 /* Struct InstructionMemoryObjectControlState: found MEMORY_OBJECT_CONTROL_STATE */
292 __gen_field(values->InstructionBaseAddressModifyEnable, 0, 0) |
293 0;
294
295 dw[5] =
296 __gen_combine_address(data, &dw[5], values->InstructionBaseAddress, dw5);
297
298 uint32_t dw6 =
299 __gen_field(values->GeneralStateAccessUpperBoundModifyEnable, 0, 0) |
300 0;
301
302 dw[6] =
303 __gen_combine_address(data, &dw[6], values->GeneralStateAccessUpperBound, dw6);
304
305 uint32_t dw7 =
306 __gen_field(values->DynamicStateAccessUpperBoundModifyEnable, 0, 0) |
307 0;
308
309 dw[7] =
310 __gen_combine_address(data, &dw[7], values->DynamicStateAccessUpperBound, dw7);
311
312 uint32_t dw8 =
313 __gen_field(values->IndirectObjectAccessUpperBoundModifyEnable, 0, 0) |
314 0;
315
316 dw[8] =
317 __gen_combine_address(data, &dw[8], values->IndirectObjectAccessUpperBound, dw8);
318
319 uint32_t dw9 =
320 __gen_field(values->InstructionAccessUpperBoundModifyEnable, 0, 0) |
321 0;
322
323 dw[9] =
324 __gen_combine_address(data, &dw[9], values->InstructionAccessUpperBound, dw9);
325
326 }
327
328 #define GEN7_STATE_PREFETCH_length 0x00000002
329 #define GEN7_STATE_PREFETCH_length_bias 0x00000002
330 #define GEN7_STATE_PREFETCH_header \
331 .CommandType = 3, \
332 .CommandSubType = 0, \
333 ._3DCommandOpcode = 0, \
334 ._3DCommandSubOpcode = 3, \
335 .DwordLength = 0
336
337 struct GEN7_STATE_PREFETCH {
338 uint32_t CommandType;
339 uint32_t CommandSubType;
340 uint32_t _3DCommandOpcode;
341 uint32_t _3DCommandSubOpcode;
342 uint32_t DwordLength;
343 __gen_address_type PrefetchPointer;
344 uint32_t PrefetchCount;
345 };
346
347 static inline void
348 GEN7_STATE_PREFETCH_pack(__gen_user_data *data, void * restrict dst,
349 const struct GEN7_STATE_PREFETCH * restrict values)
350 {
351 uint32_t *dw = (uint32_t * restrict) dst;
352
353 dw[0] =
354 __gen_field(values->CommandType, 29, 31) |
355 __gen_field(values->CommandSubType, 27, 28) |
356 __gen_field(values->_3DCommandOpcode, 24, 26) |
357 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
358 __gen_field(values->DwordLength, 0, 7) |
359 0;
360
361 uint32_t dw1 =
362 __gen_field(values->PrefetchCount, 0, 2) |
363 0;
364
365 dw[1] =
366 __gen_combine_address(data, &dw[1], values->PrefetchPointer, dw1);
367
368 }
369
370 #define GEN7_STATE_SIP_length 0x00000002
371 #define GEN7_STATE_SIP_length_bias 0x00000002
372 #define GEN7_STATE_SIP_header \
373 .CommandType = 3, \
374 .CommandSubType = 0, \
375 ._3DCommandOpcode = 1, \
376 ._3DCommandSubOpcode = 2, \
377 .DwordLength = 0
378
379 struct GEN7_STATE_SIP {
380 uint32_t CommandType;
381 uint32_t CommandSubType;
382 uint32_t _3DCommandOpcode;
383 uint32_t _3DCommandSubOpcode;
384 uint32_t DwordLength;
385 uint32_t SystemInstructionPointer;
386 };
387
388 static inline void
389 GEN7_STATE_SIP_pack(__gen_user_data *data, void * restrict dst,
390 const struct GEN7_STATE_SIP * restrict values)
391 {
392 uint32_t *dw = (uint32_t * restrict) dst;
393
394 dw[0] =
395 __gen_field(values->CommandType, 29, 31) |
396 __gen_field(values->CommandSubType, 27, 28) |
397 __gen_field(values->_3DCommandOpcode, 24, 26) |
398 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
399 __gen_field(values->DwordLength, 0, 7) |
400 0;
401
402 dw[1] =
403 __gen_offset(values->SystemInstructionPointer, 4, 31) |
404 0;
405
406 }
407
408 #define GEN7_SWTESS_BASE_ADDRESS_length 0x00000002
409 #define GEN7_SWTESS_BASE_ADDRESS_length_bias 0x00000002
410 #define GEN7_SWTESS_BASE_ADDRESS_header \
411 .CommandType = 3, \
412 .CommandSubType = 0, \
413 ._3DCommandOpcode = 1, \
414 ._3DCommandSubOpcode = 3, \
415 .DwordLength = 0
416
417 struct GEN7_SWTESS_BASE_ADDRESS {
418 uint32_t CommandType;
419 uint32_t CommandSubType;
420 uint32_t _3DCommandOpcode;
421 uint32_t _3DCommandSubOpcode;
422 uint32_t DwordLength;
423 __gen_address_type SWTessellationBaseAddress;
424 uint32_t SWTessellationMemoryObjectControlState;
425 };
426
427 static inline void
428 GEN7_SWTESS_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
429 const struct GEN7_SWTESS_BASE_ADDRESS * restrict values)
430 {
431 uint32_t *dw = (uint32_t * restrict) dst;
432
433 dw[0] =
434 __gen_field(values->CommandType, 29, 31) |
435 __gen_field(values->CommandSubType, 27, 28) |
436 __gen_field(values->_3DCommandOpcode, 24, 26) |
437 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
438 __gen_field(values->DwordLength, 0, 7) |
439 0;
440
441 uint32_t dw1 =
442 /* Struct SWTessellationMemoryObjectControlState: found MEMORY_OBJECT_CONTROL_STATE */
443 0;
444
445 dw[1] =
446 __gen_combine_address(data, &dw[1], values->SWTessellationBaseAddress, dw1);
447
448 }
449
450 #define GEN7_3DPRIMITIVE_length 0x00000007
451 #define GEN7_3DPRIMITIVE_length_bias 0x00000002
452 #define GEN7_3DPRIMITIVE_header \
453 .CommandType = 3, \
454 .CommandSubType = 3, \
455 ._3DCommandOpcode = 3, \
456 ._3DCommandSubOpcode = 0, \
457 .DwordLength = 5
458
459 struct GEN7_3DPRIMITIVE {
460 uint32_t CommandType;
461 uint32_t CommandSubType;
462 uint32_t _3DCommandOpcode;
463 uint32_t _3DCommandSubOpcode;
464 uint32_t IndirectParameterEnable;
465 uint32_t PredicateEnable;
466 uint32_t DwordLength;
467 uint32_t EndOffsetEnable;
468 #define SEQUENTIAL 0
469 #define RANDOM 1
470 uint32_t VertexAccessType;
471 uint32_t PrimitiveTopologyType;
472 uint32_t VertexCountPerInstance;
473 uint32_t StartVertexLocation;
474 uint32_t InstanceCount;
475 uint32_t StartInstanceLocation;
476 uint32_t BaseVertexLocation;
477 };
478
479 static inline void
480 GEN7_3DPRIMITIVE_pack(__gen_user_data *data, void * restrict dst,
481 const struct GEN7_3DPRIMITIVE * restrict values)
482 {
483 uint32_t *dw = (uint32_t * restrict) dst;
484
485 dw[0] =
486 __gen_field(values->CommandType, 29, 31) |
487 __gen_field(values->CommandSubType, 27, 28) |
488 __gen_field(values->_3DCommandOpcode, 24, 26) |
489 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
490 __gen_field(values->IndirectParameterEnable, 10, 10) |
491 __gen_field(values->PredicateEnable, 8, 8) |
492 __gen_field(values->DwordLength, 0, 7) |
493 0;
494
495 dw[1] =
496 __gen_field(values->EndOffsetEnable, 9, 9) |
497 __gen_field(values->VertexAccessType, 8, 8) |
498 __gen_field(values->PrimitiveTopologyType, 0, 5) |
499 0;
500
501 dw[2] =
502 __gen_field(values->VertexCountPerInstance, 0, 31) |
503 0;
504
505 dw[3] =
506 __gen_field(values->StartVertexLocation, 0, 31) |
507 0;
508
509 dw[4] =
510 __gen_field(values->InstanceCount, 0, 31) |
511 0;
512
513 dw[5] =
514 __gen_field(values->StartInstanceLocation, 0, 31) |
515 0;
516
517 dw[6] =
518 __gen_field(values->BaseVertexLocation, 0, 31) |
519 0;
520
521 }
522
523 #define GEN7_3DSTATE_AA_LINE_PARAMETERS_length 0x00000003
524 #define GEN7_3DSTATE_AA_LINE_PARAMETERS_length_bias 0x00000002
525 #define GEN7_3DSTATE_AA_LINE_PARAMETERS_header \
526 .CommandType = 3, \
527 .CommandSubType = 3, \
528 ._3DCommandOpcode = 1, \
529 ._3DCommandSubOpcode = 10, \
530 .DwordLength = 1
531
532 struct GEN7_3DSTATE_AA_LINE_PARAMETERS {
533 uint32_t CommandType;
534 uint32_t CommandSubType;
535 uint32_t _3DCommandOpcode;
536 uint32_t _3DCommandSubOpcode;
537 uint32_t DwordLength;
538 uint32_t AACoverageBias;
539 uint32_t AACoverageSlope;
540 uint32_t AACoverageEndCapBias;
541 uint32_t AACoverageEndCapSlope;
542 };
543
544 static inline void
545 GEN7_3DSTATE_AA_LINE_PARAMETERS_pack(__gen_user_data *data, void * restrict dst,
546 const struct GEN7_3DSTATE_AA_LINE_PARAMETERS * restrict values)
547 {
548 uint32_t *dw = (uint32_t * restrict) dst;
549
550 dw[0] =
551 __gen_field(values->CommandType, 29, 31) |
552 __gen_field(values->CommandSubType, 27, 28) |
553 __gen_field(values->_3DCommandOpcode, 24, 26) |
554 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
555 __gen_field(values->DwordLength, 0, 7) |
556 0;
557
558 dw[1] =
559 __gen_field(values->AACoverageBias, 16, 23) |
560 __gen_field(values->AACoverageSlope, 0, 7) |
561 0;
562
563 dw[2] =
564 __gen_field(values->AACoverageEndCapBias, 16, 23) |
565 __gen_field(values->AACoverageEndCapSlope, 0, 7) |
566 0;
567
568 }
569
570 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_length 0x00000002
571 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_length_bias 0x00000002
572 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_header\
573 .CommandType = 3, \
574 .CommandSubType = 3, \
575 ._3DCommandOpcode = 0, \
576 ._3DCommandSubOpcode = 40, \
577 .DwordLength = 0
578
579 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS {
580 uint32_t CommandType;
581 uint32_t CommandSubType;
582 uint32_t _3DCommandOpcode;
583 uint32_t _3DCommandSubOpcode;
584 uint32_t DwordLength;
585 uint32_t PointertoDSBindingTable;
586 };
587
588 static inline void
589 GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
590 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS * restrict values)
591 {
592 uint32_t *dw = (uint32_t * restrict) dst;
593
594 dw[0] =
595 __gen_field(values->CommandType, 29, 31) |
596 __gen_field(values->CommandSubType, 27, 28) |
597 __gen_field(values->_3DCommandOpcode, 24, 26) |
598 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
599 __gen_field(values->DwordLength, 0, 7) |
600 0;
601
602 dw[1] =
603 __gen_offset(values->PointertoDSBindingTable, 5, 15) |
604 0;
605
606 }
607
608 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_length 0x00000002
609 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_length_bias 0x00000002
610 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_header\
611 .CommandType = 3, \
612 .CommandSubType = 3, \
613 ._3DCommandOpcode = 0, \
614 ._3DCommandSubOpcode = 41, \
615 .DwordLength = 0
616
617 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS {
618 uint32_t CommandType;
619 uint32_t CommandSubType;
620 uint32_t _3DCommandOpcode;
621 uint32_t _3DCommandSubOpcode;
622 uint32_t DwordLength;
623 uint32_t PointertoGSBindingTable;
624 };
625
626 static inline void
627 GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
628 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS * restrict values)
629 {
630 uint32_t *dw = (uint32_t * restrict) dst;
631
632 dw[0] =
633 __gen_field(values->CommandType, 29, 31) |
634 __gen_field(values->CommandSubType, 27, 28) |
635 __gen_field(values->_3DCommandOpcode, 24, 26) |
636 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
637 __gen_field(values->DwordLength, 0, 7) |
638 0;
639
640 dw[1] =
641 __gen_offset(values->PointertoGSBindingTable, 5, 15) |
642 0;
643
644 }
645
646 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_length 0x00000002
647 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_length_bias 0x00000002
648 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_header\
649 .CommandType = 3, \
650 .CommandSubType = 3, \
651 ._3DCommandOpcode = 0, \
652 ._3DCommandSubOpcode = 39, \
653 .DwordLength = 0
654
655 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS {
656 uint32_t CommandType;
657 uint32_t CommandSubType;
658 uint32_t _3DCommandOpcode;
659 uint32_t _3DCommandSubOpcode;
660 uint32_t DwordLength;
661 uint32_t PointertoHSBindingTable;
662 };
663
664 static inline void
665 GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
666 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS * restrict values)
667 {
668 uint32_t *dw = (uint32_t * restrict) dst;
669
670 dw[0] =
671 __gen_field(values->CommandType, 29, 31) |
672 __gen_field(values->CommandSubType, 27, 28) |
673 __gen_field(values->_3DCommandOpcode, 24, 26) |
674 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
675 __gen_field(values->DwordLength, 0, 7) |
676 0;
677
678 dw[1] =
679 __gen_offset(values->PointertoHSBindingTable, 5, 15) |
680 0;
681
682 }
683
684 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_length 0x00000002
685 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_length_bias 0x00000002
686 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_header\
687 .CommandType = 3, \
688 .CommandSubType = 3, \
689 ._3DCommandOpcode = 0, \
690 ._3DCommandSubOpcode = 42, \
691 .DwordLength = 0
692
693 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS {
694 uint32_t CommandType;
695 uint32_t CommandSubType;
696 uint32_t _3DCommandOpcode;
697 uint32_t _3DCommandSubOpcode;
698 uint32_t DwordLength;
699 uint32_t PointertoPSBindingTable;
700 };
701
702 static inline void
703 GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
704 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS * restrict values)
705 {
706 uint32_t *dw = (uint32_t * restrict) dst;
707
708 dw[0] =
709 __gen_field(values->CommandType, 29, 31) |
710 __gen_field(values->CommandSubType, 27, 28) |
711 __gen_field(values->_3DCommandOpcode, 24, 26) |
712 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
713 __gen_field(values->DwordLength, 0, 7) |
714 0;
715
716 dw[1] =
717 __gen_offset(values->PointertoPSBindingTable, 5, 15) |
718 0;
719
720 }
721
722 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_length 0x00000002
723 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_length_bias 0x00000002
724 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_header\
725 .CommandType = 3, \
726 .CommandSubType = 3, \
727 ._3DCommandOpcode = 0, \
728 ._3DCommandSubOpcode = 38, \
729 .DwordLength = 0
730
731 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS {
732 uint32_t CommandType;
733 uint32_t CommandSubType;
734 uint32_t _3DCommandOpcode;
735 uint32_t _3DCommandSubOpcode;
736 uint32_t DwordLength;
737 uint32_t PointertoVSBindingTable;
738 };
739
740 static inline void
741 GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
742 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS * restrict values)
743 {
744 uint32_t *dw = (uint32_t * restrict) dst;
745
746 dw[0] =
747 __gen_field(values->CommandType, 29, 31) |
748 __gen_field(values->CommandSubType, 27, 28) |
749 __gen_field(values->_3DCommandOpcode, 24, 26) |
750 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
751 __gen_field(values->DwordLength, 0, 7) |
752 0;
753
754 dw[1] =
755 __gen_offset(values->PointertoVSBindingTable, 5, 15) |
756 0;
757
758 }
759
760 #define GEN7_3DSTATE_BLEND_STATE_POINTERS_length 0x00000002
761 #define GEN7_3DSTATE_BLEND_STATE_POINTERS_length_bias 0x00000002
762 #define GEN7_3DSTATE_BLEND_STATE_POINTERS_header\
763 .CommandType = 3, \
764 .CommandSubType = 3, \
765 ._3DCommandOpcode = 0, \
766 ._3DCommandSubOpcode = 36, \
767 .DwordLength = 0
768
769 struct GEN7_3DSTATE_BLEND_STATE_POINTERS {
770 uint32_t CommandType;
771 uint32_t CommandSubType;
772 uint32_t _3DCommandOpcode;
773 uint32_t _3DCommandSubOpcode;
774 uint32_t DwordLength;
775 uint32_t BlendStatePointer;
776 };
777
778 static inline void
779 GEN7_3DSTATE_BLEND_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
780 const struct GEN7_3DSTATE_BLEND_STATE_POINTERS * restrict values)
781 {
782 uint32_t *dw = (uint32_t * restrict) dst;
783
784 dw[0] =
785 __gen_field(values->CommandType, 29, 31) |
786 __gen_field(values->CommandSubType, 27, 28) |
787 __gen_field(values->_3DCommandOpcode, 24, 26) |
788 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
789 __gen_field(values->DwordLength, 0, 7) |
790 0;
791
792 dw[1] =
793 __gen_offset(values->BlendStatePointer, 6, 31) |
794 0;
795
796 }
797
798 #define GEN7_3DSTATE_CC_STATE_POINTERS_length 0x00000002
799 #define GEN7_3DSTATE_CC_STATE_POINTERS_length_bias 0x00000002
800 #define GEN7_3DSTATE_CC_STATE_POINTERS_header \
801 .CommandType = 3, \
802 .CommandSubType = 3, \
803 ._3DCommandOpcode = 0, \
804 ._3DCommandSubOpcode = 14, \
805 .DwordLength = 0
806
807 struct GEN7_3DSTATE_CC_STATE_POINTERS {
808 uint32_t CommandType;
809 uint32_t CommandSubType;
810 uint32_t _3DCommandOpcode;
811 uint32_t _3DCommandSubOpcode;
812 uint32_t DwordLength;
813 uint32_t ColorCalcStatePointer;
814 };
815
816 static inline void
817 GEN7_3DSTATE_CC_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
818 const struct GEN7_3DSTATE_CC_STATE_POINTERS * restrict values)
819 {
820 uint32_t *dw = (uint32_t * restrict) dst;
821
822 dw[0] =
823 __gen_field(values->CommandType, 29, 31) |
824 __gen_field(values->CommandSubType, 27, 28) |
825 __gen_field(values->_3DCommandOpcode, 24, 26) |
826 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
827 __gen_field(values->DwordLength, 0, 7) |
828 0;
829
830 dw[1] =
831 __gen_offset(values->ColorCalcStatePointer, 6, 31) |
832 0;
833
834 }
835
836 #define GEN7_3DSTATE_CHROMA_KEY_length 0x00000004
837 #define GEN7_3DSTATE_CHROMA_KEY_length_bias 0x00000002
838 #define GEN7_3DSTATE_CHROMA_KEY_header \
839 .CommandType = 3, \
840 .CommandSubType = 3, \
841 ._3DCommandOpcode = 1, \
842 ._3DCommandSubOpcode = 4, \
843 .DwordLength = 2
844
845 struct GEN7_3DSTATE_CHROMA_KEY {
846 uint32_t CommandType;
847 uint32_t CommandSubType;
848 uint32_t _3DCommandOpcode;
849 uint32_t _3DCommandSubOpcode;
850 uint32_t DwordLength;
851 uint32_t ChromaKeyTableIndex;
852 uint32_t ChromaKeyLowValue;
853 uint32_t ChromaKeyHighValue;
854 };
855
856 static inline void
857 GEN7_3DSTATE_CHROMA_KEY_pack(__gen_user_data *data, void * restrict dst,
858 const struct GEN7_3DSTATE_CHROMA_KEY * restrict values)
859 {
860 uint32_t *dw = (uint32_t * restrict) dst;
861
862 dw[0] =
863 __gen_field(values->CommandType, 29, 31) |
864 __gen_field(values->CommandSubType, 27, 28) |
865 __gen_field(values->_3DCommandOpcode, 24, 26) |
866 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
867 __gen_field(values->DwordLength, 0, 7) |
868 0;
869
870 dw[1] =
871 __gen_field(values->ChromaKeyTableIndex, 30, 31) |
872 0;
873
874 dw[2] =
875 __gen_field(values->ChromaKeyLowValue, 0, 31) |
876 0;
877
878 dw[3] =
879 __gen_field(values->ChromaKeyHighValue, 0, 31) |
880 0;
881
882 }
883
884 #define GEN7_3DSTATE_CLEAR_PARAMS_length 0x00000003
885 #define GEN7_3DSTATE_CLEAR_PARAMS_length_bias 0x00000002
886 #define GEN7_3DSTATE_CLEAR_PARAMS_header \
887 .CommandType = 3, \
888 .CommandSubType = 3, \
889 ._3DCommandOpcode = 0, \
890 ._3DCommandSubOpcode = 4, \
891 .DwordLength = 1
892
893 struct GEN7_3DSTATE_CLEAR_PARAMS {
894 uint32_t CommandType;
895 uint32_t CommandSubType;
896 uint32_t _3DCommandOpcode;
897 uint32_t _3DCommandSubOpcode;
898 uint32_t DwordLength;
899 uint32_t DepthClearValue;
900 uint32_t DepthClearValueValid;
901 };
902
903 static inline void
904 GEN7_3DSTATE_CLEAR_PARAMS_pack(__gen_user_data *data, void * restrict dst,
905 const struct GEN7_3DSTATE_CLEAR_PARAMS * restrict values)
906 {
907 uint32_t *dw = (uint32_t * restrict) dst;
908
909 dw[0] =
910 __gen_field(values->CommandType, 29, 31) |
911 __gen_field(values->CommandSubType, 27, 28) |
912 __gen_field(values->_3DCommandOpcode, 24, 26) |
913 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
914 __gen_field(values->DwordLength, 0, 7) |
915 0;
916
917 dw[1] =
918 __gen_field(values->DepthClearValue, 0, 31) |
919 0;
920
921 dw[2] =
922 __gen_field(values->DepthClearValueValid, 0, 0) |
923 0;
924
925 }
926
927 #define GEN7_3DSTATE_CLIP_length 0x00000004
928 #define GEN7_3DSTATE_CLIP_length_bias 0x00000002
929 #define GEN7_3DSTATE_CLIP_header \
930 .CommandType = 3, \
931 .CommandSubType = 3, \
932 ._3DCommandOpcode = 0, \
933 ._3DCommandSubOpcode = 18, \
934 .DwordLength = 2
935
936 struct GEN7_3DSTATE_CLIP {
937 uint32_t CommandType;
938 uint32_t CommandSubType;
939 uint32_t _3DCommandOpcode;
940 uint32_t _3DCommandSubOpcode;
941 uint32_t DwordLength;
942 uint32_t FrontWinding;
943 uint32_t VertexSubPixelPrecisionSelect;
944 uint32_t EarlyCullEnable;
945 #define CULLMODE_BOTH 0
946 #define CULLMODE_NONE 1
947 #define CULLMODE_FRONT 2
948 #define CULLMODE_BACK 3
949 uint32_t CullMode;
950 uint32_t ClipperStatisticsEnable;
951 uint32_t UserClipDistanceCullTestEnableBitmask;
952 uint32_t ClipEnable;
953 #define APIMODE_OGL 0
954 uint32_t APIMode;
955 uint32_t ViewportXYClipTestEnable;
956 uint32_t ViewportZClipTestEnable;
957 uint32_t GuardbandClipTestEnable;
958 uint32_t UserClipDistanceClipTestEnableBitmask;
959 #define CLIPMODE_NORMAL 0
960 #define CLIPMODE_REJECT_ALL 3
961 #define CLIPMODE_ACCEPT_ALL 4
962 uint32_t ClipMode;
963 uint32_t PerspectiveDivideDisable;
964 uint32_t NonPerspectiveBarycentricEnable;
965 #define Vertex0 0
966 #define Vertex1 1
967 #define Vertex2 2
968 uint32_t TriangleStripListProvokingVertexSelect;
969 #define Vertex0 0
970 #define Vertex1 1
971 uint32_t LineStripListProvokingVertexSelect;
972 #define Vertex0 0
973 #define Vertex1 1
974 #define Vertex2 2
975 uint32_t TriangleFanProvokingVertexSelect;
976 uint32_t MinimumPointWidth;
977 uint32_t MaximumPointWidth;
978 uint32_t ForceZeroRTAIndexEnable;
979 uint32_t MaximumVPIndex;
980 };
981
982 static inline void
983 GEN7_3DSTATE_CLIP_pack(__gen_user_data *data, void * restrict dst,
984 const struct GEN7_3DSTATE_CLIP * restrict values)
985 {
986 uint32_t *dw = (uint32_t * restrict) dst;
987
988 dw[0] =
989 __gen_field(values->CommandType, 29, 31) |
990 __gen_field(values->CommandSubType, 27, 28) |
991 __gen_field(values->_3DCommandOpcode, 24, 26) |
992 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
993 __gen_field(values->DwordLength, 0, 7) |
994 0;
995
996 dw[1] =
997 __gen_field(values->FrontWinding, 20, 20) |
998 __gen_field(values->VertexSubPixelPrecisionSelect, 19, 19) |
999 __gen_field(values->EarlyCullEnable, 18, 18) |
1000 __gen_field(values->CullMode, 16, 17) |
1001 __gen_field(values->ClipperStatisticsEnable, 10, 10) |
1002 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
1003 0;
1004
1005 dw[2] =
1006 __gen_field(values->ClipEnable, 31, 31) |
1007 __gen_field(values->APIMode, 30, 30) |
1008 __gen_field(values->ViewportXYClipTestEnable, 28, 28) |
1009 __gen_field(values->ViewportZClipTestEnable, 27, 27) |
1010 __gen_field(values->GuardbandClipTestEnable, 26, 26) |
1011 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 16, 23) |
1012 __gen_field(values->ClipMode, 13, 15) |
1013 __gen_field(values->PerspectiveDivideDisable, 9, 9) |
1014 __gen_field(values->NonPerspectiveBarycentricEnable, 8, 8) |
1015 __gen_field(values->TriangleStripListProvokingVertexSelect, 4, 5) |
1016 __gen_field(values->LineStripListProvokingVertexSelect, 2, 3) |
1017 __gen_field(values->TriangleFanProvokingVertexSelect, 0, 1) |
1018 0;
1019
1020 dw[3] =
1021 __gen_field(values->MinimumPointWidth, 17, 27) |
1022 __gen_field(values->MaximumPointWidth, 6, 16) |
1023 __gen_field(values->ForceZeroRTAIndexEnable, 5, 5) |
1024 __gen_field(values->MaximumVPIndex, 0, 3) |
1025 0;
1026
1027 }
1028
1029 #define GEN7_3DSTATE_CONSTANT_DS_length 0x00000007
1030 #define GEN7_3DSTATE_CONSTANT_DS_length_bias 0x00000002
1031 #define GEN7_3DSTATE_CONSTANT_DS_header \
1032 .CommandType = 3, \
1033 .CommandSubType = 3, \
1034 ._3DCommandOpcode = 0, \
1035 ._3DCommandSubOpcode = 26, \
1036 .DwordLength = 5
1037
1038 struct GEN7_3DSTATE_CONSTANT_DS {
1039 uint32_t CommandType;
1040 uint32_t CommandSubType;
1041 uint32_t _3DCommandOpcode;
1042 uint32_t _3DCommandSubOpcode;
1043 uint32_t DwordLength;
1044 uint32_t ConstantBody;
1045 };
1046
1047 static inline void
1048 GEN7_3DSTATE_CONSTANT_DS_pack(__gen_user_data *data, void * restrict dst,
1049 const struct GEN7_3DSTATE_CONSTANT_DS * restrict values)
1050 {
1051 uint32_t *dw = (uint32_t * restrict) dst;
1052
1053 dw[0] =
1054 __gen_field(values->CommandType, 29, 31) |
1055 __gen_field(values->CommandSubType, 27, 28) |
1056 __gen_field(values->_3DCommandOpcode, 24, 26) |
1057 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1058 __gen_field(values->DwordLength, 0, 7) |
1059 0;
1060
1061 dw[1] =
1062 /* Struct ConstantBody: found 3DSTATE_CONSTANT(Body) */
1063 0;
1064
1065 }
1066
1067 #define GEN7_3DSTATE_CONSTANT_GS_length 0x00000007
1068 #define GEN7_3DSTATE_CONSTANT_GS_length_bias 0x00000002
1069 #define GEN7_3DSTATE_CONSTANT_GS_header \
1070 .CommandType = 3, \
1071 .CommandSubType = 3, \
1072 ._3DCommandOpcode = 0, \
1073 ._3DCommandSubOpcode = 22, \
1074 .DwordLength = 5
1075
1076 struct GEN7_3DSTATE_CONSTANT_GS {
1077 uint32_t CommandType;
1078 uint32_t CommandSubType;
1079 uint32_t _3DCommandOpcode;
1080 uint32_t _3DCommandSubOpcode;
1081 uint32_t DwordLength;
1082 uint32_t ConstantBody;
1083 };
1084
1085 static inline void
1086 GEN7_3DSTATE_CONSTANT_GS_pack(__gen_user_data *data, void * restrict dst,
1087 const struct GEN7_3DSTATE_CONSTANT_GS * restrict values)
1088 {
1089 uint32_t *dw = (uint32_t * restrict) dst;
1090
1091 dw[0] =
1092 __gen_field(values->CommandType, 29, 31) |
1093 __gen_field(values->CommandSubType, 27, 28) |
1094 __gen_field(values->_3DCommandOpcode, 24, 26) |
1095 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1096 __gen_field(values->DwordLength, 0, 7) |
1097 0;
1098
1099 dw[1] =
1100 /* Struct ConstantBody: found 3DSTATE_CONSTANT(Body) */
1101 0;
1102
1103 }
1104
1105 #define GEN7_3DSTATE_CONSTANT_HS_length 0x00000007
1106 #define GEN7_3DSTATE_CONSTANT_HS_length_bias 0x00000002
1107 #define GEN7_3DSTATE_CONSTANT_HS_header \
1108 .CommandType = 3, \
1109 .CommandSubType = 3, \
1110 ._3DCommandOpcode = 0, \
1111 ._3DCommandSubOpcode = 25, \
1112 .DwordLength = 5
1113
1114 struct GEN7_3DSTATE_CONSTANT_HS {
1115 uint32_t CommandType;
1116 uint32_t CommandSubType;
1117 uint32_t _3DCommandOpcode;
1118 uint32_t _3DCommandSubOpcode;
1119 uint32_t DwordLength;
1120 uint32_t ConstantBody;
1121 };
1122
1123 static inline void
1124 GEN7_3DSTATE_CONSTANT_HS_pack(__gen_user_data *data, void * restrict dst,
1125 const struct GEN7_3DSTATE_CONSTANT_HS * restrict values)
1126 {
1127 uint32_t *dw = (uint32_t * restrict) dst;
1128
1129 dw[0] =
1130 __gen_field(values->CommandType, 29, 31) |
1131 __gen_field(values->CommandSubType, 27, 28) |
1132 __gen_field(values->_3DCommandOpcode, 24, 26) |
1133 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1134 __gen_field(values->DwordLength, 0, 7) |
1135 0;
1136
1137 dw[1] =
1138 /* Struct ConstantBody: found 3DSTATE_CONSTANT(Body) */
1139 0;
1140
1141 }
1142
1143 #define GEN7_3DSTATE_CONSTANT_PS_length 0x00000007
1144 #define GEN7_3DSTATE_CONSTANT_PS_length_bias 0x00000002
1145 #define GEN7_3DSTATE_CONSTANT_PS_header \
1146 .CommandType = 3, \
1147 .CommandSubType = 3, \
1148 ._3DCommandOpcode = 0, \
1149 ._3DCommandSubOpcode = 23, \
1150 .DwordLength = 5
1151
1152 struct GEN7_3DSTATE_CONSTANT_PS {
1153 uint32_t CommandType;
1154 uint32_t CommandSubType;
1155 uint32_t _3DCommandOpcode;
1156 uint32_t _3DCommandSubOpcode;
1157 uint32_t DwordLength;
1158 uint32_t ConstantBody;
1159 };
1160
1161 static inline void
1162 GEN7_3DSTATE_CONSTANT_PS_pack(__gen_user_data *data, void * restrict dst,
1163 const struct GEN7_3DSTATE_CONSTANT_PS * restrict values)
1164 {
1165 uint32_t *dw = (uint32_t * restrict) dst;
1166
1167 dw[0] =
1168 __gen_field(values->CommandType, 29, 31) |
1169 __gen_field(values->CommandSubType, 27, 28) |
1170 __gen_field(values->_3DCommandOpcode, 24, 26) |
1171 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1172 __gen_field(values->DwordLength, 0, 7) |
1173 0;
1174
1175 dw[1] =
1176 /* Struct ConstantBody: found 3DSTATE_CONSTANT(Body) */
1177 0;
1178
1179 }
1180
1181 #define GEN7_3DSTATE_CONSTANT_VS_length 0x00000007
1182 #define GEN7_3DSTATE_CONSTANT_VS_length_bias 0x00000002
1183 #define GEN7_3DSTATE_CONSTANT_VS_header \
1184 .CommandType = 3, \
1185 .CommandSubType = 3, \
1186 ._3DCommandOpcode = 0, \
1187 ._3DCommandSubOpcode = 21, \
1188 .DwordLength = 5
1189
1190 struct GEN7_3DSTATE_CONSTANT_VS {
1191 uint32_t CommandType;
1192 uint32_t CommandSubType;
1193 uint32_t _3DCommandOpcode;
1194 uint32_t _3DCommandSubOpcode;
1195 uint32_t DwordLength;
1196 uint32_t ConstantBody;
1197 };
1198
1199 static inline void
1200 GEN7_3DSTATE_CONSTANT_VS_pack(__gen_user_data *data, void * restrict dst,
1201 const struct GEN7_3DSTATE_CONSTANT_VS * restrict values)
1202 {
1203 uint32_t *dw = (uint32_t * restrict) dst;
1204
1205 dw[0] =
1206 __gen_field(values->CommandType, 29, 31) |
1207 __gen_field(values->CommandSubType, 27, 28) |
1208 __gen_field(values->_3DCommandOpcode, 24, 26) |
1209 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1210 __gen_field(values->DwordLength, 0, 7) |
1211 0;
1212
1213 dw[1] =
1214 /* Struct ConstantBody: found 3DSTATE_CONSTANT(Body) */
1215 0;
1216
1217 }
1218
1219 #define GEN7_3DSTATE_DEPTH_BUFFER_length 0x00000007
1220 #define GEN7_3DSTATE_DEPTH_BUFFER_length_bias 0x00000002
1221 #define GEN7_3DSTATE_DEPTH_BUFFER_header \
1222 .CommandType = 3, \
1223 .CommandSubType = 3, \
1224 ._3DCommandOpcode = 0, \
1225 ._3DCommandSubOpcode = 5, \
1226 .DwordLength = 5
1227
1228 struct GEN7_3DSTATE_DEPTH_BUFFER {
1229 uint32_t CommandType;
1230 uint32_t CommandSubType;
1231 uint32_t _3DCommandOpcode;
1232 uint32_t _3DCommandSubOpcode;
1233 uint32_t DwordLength;
1234 #define SURFTYPE_1D 0
1235 #define SURFTYPE_2D 1
1236 #define SURFTYPE_3D 2
1237 #define SURFTYPE_CUBE 3
1238 #define SURFTYPE_NULL 7
1239 uint32_t SurfaceType;
1240 uint32_t DepthWriteEnable;
1241 uint32_t StencilWriteEnable;
1242 uint32_t HierarchicalDepthBufferEnable;
1243 #define D32_FLOAT 1
1244 #define D24_UNORM_X8_UINT 3
1245 #define D16_UNORM 5
1246 uint32_t SurfaceFormat;
1247 uint32_t SurfacePitch;
1248 __gen_address_type SurfaceBaseAddress;
1249 uint32_t Height;
1250 uint32_t Width;
1251 uint32_t LOD;
1252 #define SURFTYPE_CUBEmustbezero 0
1253 uint32_t Depth;
1254 uint32_t MinimumArrayElement;
1255 uint32_t DepthBufferObjectControlState;
1256 uint32_t DepthCoordinateOffsetY;
1257 uint32_t DepthCoordinateOffsetX;
1258 uint32_t RenderTargetViewExtent;
1259 };
1260
1261 static inline void
1262 GEN7_3DSTATE_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
1263 const struct GEN7_3DSTATE_DEPTH_BUFFER * restrict values)
1264 {
1265 uint32_t *dw = (uint32_t * restrict) dst;
1266
1267 dw[0] =
1268 __gen_field(values->CommandType, 29, 31) |
1269 __gen_field(values->CommandSubType, 27, 28) |
1270 __gen_field(values->_3DCommandOpcode, 24, 26) |
1271 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1272 __gen_field(values->DwordLength, 0, 7) |
1273 0;
1274
1275 dw[1] =
1276 __gen_field(values->SurfaceType, 29, 31) |
1277 __gen_field(values->DepthWriteEnable, 28, 28) |
1278 __gen_field(values->StencilWriteEnable, 27, 27) |
1279 __gen_field(values->HierarchicalDepthBufferEnable, 22, 22) |
1280 __gen_field(values->SurfaceFormat, 18, 20) |
1281 __gen_field(values->SurfacePitch, 0, 17) |
1282 0;
1283
1284 uint32_t dw2 =
1285 0;
1286
1287 dw[2] =
1288 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
1289
1290 dw[3] =
1291 __gen_field(values->Height, 18, 31) |
1292 __gen_field(values->Width, 4, 17) |
1293 __gen_field(values->LOD, 0, 3) |
1294 0;
1295
1296 dw[4] =
1297 __gen_field(values->Depth, 21, 31) |
1298 __gen_field(values->MinimumArrayElement, 10, 20) |
1299 /* Struct DepthBufferObjectControlState: found MEMORY_OBJECT_CONTROL_STATE */
1300 0;
1301
1302 dw[5] =
1303 __gen_field(values->DepthCoordinateOffsetY, 16, 31) |
1304 __gen_field(values->DepthCoordinateOffsetX, 0, 15) |
1305 0;
1306
1307 dw[6] =
1308 __gen_field(values->RenderTargetViewExtent, 21, 31) |
1309 0;
1310
1311 }
1312
1313 #define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_length 0x00000002
1314 #define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_length_bias 0x00000002
1315 #define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_header\
1316 .CommandType = 3, \
1317 .CommandSubType = 3, \
1318 ._3DCommandOpcode = 0, \
1319 ._3DCommandSubOpcode = 37, \
1320 .DwordLength = 0
1321
1322 struct GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS {
1323 uint32_t CommandType;
1324 uint32_t CommandSubType;
1325 uint32_t _3DCommandOpcode;
1326 uint32_t _3DCommandSubOpcode;
1327 uint32_t DwordLength;
1328 uint32_t PointertoDEPTH_STENCIL_STATE;
1329 };
1330
1331 static inline void
1332 GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
1333 const struct GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS * restrict values)
1334 {
1335 uint32_t *dw = (uint32_t * restrict) dst;
1336
1337 dw[0] =
1338 __gen_field(values->CommandType, 29, 31) |
1339 __gen_field(values->CommandSubType, 27, 28) |
1340 __gen_field(values->_3DCommandOpcode, 24, 26) |
1341 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1342 __gen_field(values->DwordLength, 0, 7) |
1343 0;
1344
1345 dw[1] =
1346 __gen_offset(values->PointertoDEPTH_STENCIL_STATE, 6, 31) |
1347 0;
1348
1349 }
1350
1351 #define GEN7_3DSTATE_DRAWING_RECTANGLE_length 0x00000004
1352 #define GEN7_3DSTATE_DRAWING_RECTANGLE_length_bias 0x00000002
1353 #define GEN7_3DSTATE_DRAWING_RECTANGLE_header \
1354 .CommandType = 3, \
1355 .CommandSubType = 3, \
1356 ._3DCommandOpcode = 1, \
1357 ._3DCommandSubOpcode = 0, \
1358 .DwordLength = 2
1359
1360 struct GEN7_3DSTATE_DRAWING_RECTANGLE {
1361 uint32_t CommandType;
1362 uint32_t CommandSubType;
1363 uint32_t _3DCommandOpcode;
1364 uint32_t _3DCommandSubOpcode;
1365 uint32_t DwordLength;
1366 uint32_t ClippedDrawingRectangleYMin;
1367 uint32_t ClippedDrawingRectangleXMin;
1368 uint32_t ClippedDrawingRectangleYMax;
1369 uint32_t ClippedDrawingRectangleXMax;
1370 uint32_t DrawingRectangleOriginY;
1371 uint32_t DrawingRectangleOriginX;
1372 };
1373
1374 static inline void
1375 GEN7_3DSTATE_DRAWING_RECTANGLE_pack(__gen_user_data *data, void * restrict dst,
1376 const struct GEN7_3DSTATE_DRAWING_RECTANGLE * restrict values)
1377 {
1378 uint32_t *dw = (uint32_t * restrict) dst;
1379
1380 dw[0] =
1381 __gen_field(values->CommandType, 29, 31) |
1382 __gen_field(values->CommandSubType, 27, 28) |
1383 __gen_field(values->_3DCommandOpcode, 24, 26) |
1384 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1385 __gen_field(values->DwordLength, 0, 7) |
1386 0;
1387
1388 dw[1] =
1389 __gen_field(values->ClippedDrawingRectangleYMin, 16, 31) |
1390 __gen_field(values->ClippedDrawingRectangleXMin, 0, 15) |
1391 0;
1392
1393 dw[2] =
1394 __gen_field(values->ClippedDrawingRectangleYMax, 16, 31) |
1395 __gen_field(values->ClippedDrawingRectangleXMax, 0, 15) |
1396 0;
1397
1398 dw[3] =
1399 __gen_field(values->DrawingRectangleOriginY, 16, 31) |
1400 __gen_field(values->DrawingRectangleOriginX, 0, 15) |
1401 0;
1402
1403 }
1404
1405 #define GEN7_3DSTATE_DS_length 0x00000006
1406 #define GEN7_3DSTATE_DS_length_bias 0x00000002
1407 #define GEN7_3DSTATE_DS_header \
1408 .CommandType = 3, \
1409 .CommandSubType = 3, \
1410 ._3DCommandOpcode = 0, \
1411 ._3DCommandSubOpcode = 29, \
1412 .DwordLength = 4
1413
1414 struct GEN7_3DSTATE_DS {
1415 uint32_t CommandType;
1416 uint32_t CommandSubType;
1417 uint32_t _3DCommandOpcode;
1418 uint32_t _3DCommandSubOpcode;
1419 uint32_t DwordLength;
1420 uint32_t KernelStartPointer;
1421 #define Multiple 0
1422 #define Single 1
1423 uint32_t SingleDomainPointDispatch;
1424 #define Dmask 0
1425 #define Vmask 1
1426 uint32_t VectorMaskEnable;
1427 #define NoSamplers 0
1428 #define _14Samplers 1
1429 #define _58Samplers 2
1430 #define _912Samplers 3
1431 #define _1316Samplers 4
1432 uint32_t SamplerCount;
1433 uint32_t BindingTableEntryCount;
1434 #define IEEE754 0
1435 #define Alternate 1
1436 uint32_t FloatingPointMode;
1437 uint32_t IllegalOpcodeExceptionEnable;
1438 uint32_t SoftwareExceptionEnable;
1439 uint32_t ScratchSpaceBasePointer;
1440 uint32_t PerThreadScratchSpace;
1441 uint32_t DispatchGRFStartRegisterForURBData;
1442 uint32_t PatchURBEntryReadLength;
1443 uint32_t PatchURBEntryReadOffset;
1444 uint32_t MaximumNumberofThreads;
1445 uint32_t StatisticsEnable;
1446 uint32_t ComputeWCoordinateEnable;
1447 uint32_t DSCacheDisable;
1448 uint32_t DSFunctionEnable;
1449 };
1450
1451 static inline void
1452 GEN7_3DSTATE_DS_pack(__gen_user_data *data, void * restrict dst,
1453 const struct GEN7_3DSTATE_DS * restrict values)
1454 {
1455 uint32_t *dw = (uint32_t * restrict) dst;
1456
1457 dw[0] =
1458 __gen_field(values->CommandType, 29, 31) |
1459 __gen_field(values->CommandSubType, 27, 28) |
1460 __gen_field(values->_3DCommandOpcode, 24, 26) |
1461 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1462 __gen_field(values->DwordLength, 0, 7) |
1463 0;
1464
1465 dw[1] =
1466 __gen_offset(values->KernelStartPointer, 6, 31) |
1467 0;
1468
1469 dw[2] =
1470 __gen_field(values->SingleDomainPointDispatch, 31, 31) |
1471 __gen_field(values->VectorMaskEnable, 30, 30) |
1472 __gen_field(values->SamplerCount, 27, 29) |
1473 __gen_field(values->BindingTableEntryCount, 18, 25) |
1474 __gen_field(values->FloatingPointMode, 16, 16) |
1475 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
1476 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
1477 0;
1478
1479 dw[3] =
1480 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
1481 __gen_field(values->PerThreadScratchSpace, 0, 3) |
1482 0;
1483
1484 dw[4] =
1485 __gen_field(values->DispatchGRFStartRegisterForURBData, 20, 24) |
1486 __gen_field(values->PatchURBEntryReadLength, 11, 17) |
1487 __gen_field(values->PatchURBEntryReadOffset, 4, 9) |
1488 0;
1489
1490 dw[5] =
1491 __gen_field(values->MaximumNumberofThreads, 25, 31) |
1492 __gen_field(values->StatisticsEnable, 10, 10) |
1493 __gen_field(values->ComputeWCoordinateEnable, 2, 2) |
1494 __gen_field(values->DSCacheDisable, 1, 1) |
1495 __gen_field(values->DSFunctionEnable, 0, 0) |
1496 0;
1497
1498 }
1499
1500 #define GEN7_3DSTATE_GS_length 0x00000007
1501 #define GEN7_3DSTATE_GS_length_bias 0x00000002
1502 #define GEN7_3DSTATE_GS_header \
1503 .CommandType = 3, \
1504 .CommandSubType = 3, \
1505 ._3DCommandOpcode = 0, \
1506 ._3DCommandSubOpcode = 17, \
1507 .DwordLength = 5
1508
1509 struct GEN7_3DSTATE_GS {
1510 uint32_t CommandType;
1511 uint32_t CommandSubType;
1512 uint32_t _3DCommandOpcode;
1513 uint32_t _3DCommandSubOpcode;
1514 uint32_t DwordLength;
1515 uint32_t KernelStartPointer;
1516 uint32_t SingleProgramFlowSPF;
1517 #define Dmask 0
1518 #define Vmask 1
1519 uint32_t VectorMaskEnableVME;
1520 #define NoSamplers 0
1521 #define _14Samplers 1
1522 #define _58Samplers 2
1523 #define _912Samplers 3
1524 #define _1316Samplers 4
1525 uint32_t SamplerCount;
1526 uint32_t BindingTableEntryCount;
1527 #define NormalPriority 0
1528 #define HighPriority 1
1529 uint32_t ThreadPriority;
1530 #define IEEE754 0
1531 #define alternate 1
1532 uint32_t FloatingPointMode;
1533 uint32_t IllegalOpcodeExceptionEnable;
1534 uint32_t MaskStackExceptionEnable;
1535 uint32_t SoftwareExceptionEnable;
1536 uint32_t ScratchSpaceBasePointer;
1537 uint32_t PerThreadScratchSpace;
1538 uint32_t OutputVertexSize;
1539 uint32_t OutputTopology;
1540 uint32_t VertexURBEntryReadLength;
1541 uint32_t IncludeVertexHandles;
1542 uint32_t VertexURBEntryReadOffset;
1543 uint32_t DispatchGRFStartRegisterforURBData;
1544 uint32_t MaximumNumberofThreads;
1545 #define GSCTL_CUT 0
1546 #define GSCTL_SID 1
1547 uint32_t ControlDataFormat;
1548 uint32_t ControlDataHeaderSize;
1549 uint32_t InstanceControl;
1550 uint32_t DefaultStreamID;
1551 #define SINGLE 0
1552 #define DUAL_INSTANCE 1
1553 #define DUAL_OBJECT 2
1554 uint32_t DispatchMode;
1555 uint32_t GSStatisticsEnable;
1556 uint32_t GSInvocationsIncrementValue;
1557 uint32_t IncludePrimitiveID;
1558 uint32_t Hint;
1559 uint32_t ReorderEnable;
1560 uint32_t DiscardAdjacency;
1561 uint32_t GSEnable;
1562 uint32_t SemaphoreHandle;
1563 };
1564
1565 static inline void
1566 GEN7_3DSTATE_GS_pack(__gen_user_data *data, void * restrict dst,
1567 const struct GEN7_3DSTATE_GS * restrict values)
1568 {
1569 uint32_t *dw = (uint32_t * restrict) dst;
1570
1571 dw[0] =
1572 __gen_field(values->CommandType, 29, 31) |
1573 __gen_field(values->CommandSubType, 27, 28) |
1574 __gen_field(values->_3DCommandOpcode, 24, 26) |
1575 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1576 __gen_field(values->DwordLength, 0, 7) |
1577 0;
1578
1579 dw[1] =
1580 __gen_offset(values->KernelStartPointer, 6, 31) |
1581 0;
1582
1583 dw[2] =
1584 __gen_field(values->SingleProgramFlowSPF, 31, 31) |
1585 __gen_field(values->VectorMaskEnableVME, 30, 30) |
1586 __gen_field(values->SamplerCount, 27, 29) |
1587 __gen_field(values->BindingTableEntryCount, 18, 25) |
1588 __gen_field(values->ThreadPriority, 17, 17) |
1589 __gen_field(values->FloatingPointMode, 16, 16) |
1590 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
1591 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
1592 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
1593 0;
1594
1595 dw[3] =
1596 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
1597 __gen_field(values->PerThreadScratchSpace, 0, 3) |
1598 0;
1599
1600 dw[4] =
1601 __gen_field(values->OutputVertexSize, 23, 28) |
1602 __gen_field(values->OutputTopology, 17, 22) |
1603 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
1604 __gen_field(values->IncludeVertexHandles, 10, 10) |
1605 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
1606 __gen_field(values->DispatchGRFStartRegisterforURBData, 0, 3) |
1607 0;
1608
1609 dw[5] =
1610 __gen_field(values->MaximumNumberofThreads, 25, 31) |
1611 __gen_field(values->ControlDataFormat, 24, 24) |
1612 __gen_field(values->ControlDataHeaderSize, 20, 23) |
1613 __gen_field(values->InstanceControl, 15, 19) |
1614 __gen_field(values->DefaultStreamID, 13, 14) |
1615 __gen_field(values->DispatchMode, 11, 12) |
1616 __gen_field(values->GSStatisticsEnable, 10, 10) |
1617 __gen_field(values->GSInvocationsIncrementValue, 5, 9) |
1618 __gen_field(values->IncludePrimitiveID, 4, 4) |
1619 __gen_field(values->Hint, 3, 3) |
1620 __gen_field(values->ReorderEnable, 2, 2) |
1621 __gen_field(values->DiscardAdjacency, 1, 1) |
1622 __gen_field(values->GSEnable, 0, 0) |
1623 0;
1624
1625 dw[6] =
1626 __gen_offset(values->SemaphoreHandle, 0, 11) |
1627 0;
1628
1629 }
1630
1631 #define GEN7_3DSTATE_HIER_DEPTH_BUFFER_length 0x00000003
1632 #define GEN7_3DSTATE_HIER_DEPTH_BUFFER_length_bias 0x00000002
1633 #define GEN7_3DSTATE_HIER_DEPTH_BUFFER_header \
1634 .CommandType = 3, \
1635 .CommandSubType = 3, \
1636 ._3DCommandOpcode = 0, \
1637 ._3DCommandSubOpcode = 7, \
1638 .DwordLength = 1
1639
1640 struct GEN7_3DSTATE_HIER_DEPTH_BUFFER {
1641 uint32_t CommandType;
1642 uint32_t CommandSubType;
1643 uint32_t _3DCommandOpcode;
1644 uint32_t _3DCommandSubOpcode;
1645 uint32_t DwordLength;
1646 uint32_t HierarchicalDepthBufferObjectControlState;
1647 uint32_t SurfacePitch;
1648 __gen_address_type SurfaceBaseAddress;
1649 };
1650
1651 static inline void
1652 GEN7_3DSTATE_HIER_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
1653 const struct GEN7_3DSTATE_HIER_DEPTH_BUFFER * restrict values)
1654 {
1655 uint32_t *dw = (uint32_t * restrict) dst;
1656
1657 dw[0] =
1658 __gen_field(values->CommandType, 29, 31) |
1659 __gen_field(values->CommandSubType, 27, 28) |
1660 __gen_field(values->_3DCommandOpcode, 24, 26) |
1661 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1662 __gen_field(values->DwordLength, 0, 7) |
1663 0;
1664
1665 dw[1] =
1666 /* Struct HierarchicalDepthBufferObjectControlState: found MEMORY_OBJECT_CONTROL_STATE */
1667 __gen_field(values->SurfacePitch, 0, 16) |
1668 0;
1669
1670 uint32_t dw2 =
1671 0;
1672
1673 dw[2] =
1674 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
1675
1676 }
1677
1678 #define GEN7_3DSTATE_HS_length 0x00000007
1679 #define GEN7_3DSTATE_HS_length_bias 0x00000002
1680 #define GEN7_3DSTATE_HS_header \
1681 .CommandType = 3, \
1682 .CommandSubType = 3, \
1683 ._3DCommandOpcode = 0, \
1684 ._3DCommandSubOpcode = 27, \
1685 .DwordLength = 5
1686
1687 struct GEN7_3DSTATE_HS {
1688 uint32_t CommandType;
1689 uint32_t CommandSubType;
1690 uint32_t _3DCommandOpcode;
1691 uint32_t _3DCommandSubOpcode;
1692 uint32_t DwordLength;
1693 #define NoSamplers 0
1694 #define _14Samplers 1
1695 #define _58Samplers 2
1696 #define _912Samplers 3
1697 #define _1316Samplers 4
1698 uint32_t SamplerCount;
1699 uint32_t BindingTableEntryCount;
1700 #define IEEE754 0
1701 #define alternate 1
1702 uint32_t FloatingPointMode;
1703 uint32_t IllegalOpcodeExceptionEnable;
1704 uint32_t SoftwareExceptionEnable;
1705 uint32_t MaximumNumberofThreads;
1706 uint32_t Enable;
1707 uint32_t StatisticsEnable;
1708 uint32_t InstanceCount;
1709 uint32_t KernelStartPointer;
1710 uint32_t ScratchSpaceBasePointer;
1711 uint32_t PerThreadScratchSpace;
1712 uint32_t SingleProgramFlow;
1713 #define Dmask 0
1714 #define Vmask 1
1715 uint32_t VectorMaskEnable;
1716 uint32_t IncludeVertexHandles;
1717 uint32_t DispatchGRFStartRegisterForURBData;
1718 uint32_t VertexURBEntryReadLength;
1719 uint32_t VertexURBEntryReadOffset;
1720 uint32_t SemaphoreHandle;
1721 };
1722
1723 static inline void
1724 GEN7_3DSTATE_HS_pack(__gen_user_data *data, void * restrict dst,
1725 const struct GEN7_3DSTATE_HS * restrict values)
1726 {
1727 uint32_t *dw = (uint32_t * restrict) dst;
1728
1729 dw[0] =
1730 __gen_field(values->CommandType, 29, 31) |
1731 __gen_field(values->CommandSubType, 27, 28) |
1732 __gen_field(values->_3DCommandOpcode, 24, 26) |
1733 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1734 __gen_field(values->DwordLength, 0, 7) |
1735 0;
1736
1737 dw[1] =
1738 __gen_field(values->SamplerCount, 27, 29) |
1739 __gen_field(values->BindingTableEntryCount, 18, 25) |
1740 __gen_field(values->FloatingPointMode, 16, 16) |
1741 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
1742 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
1743 __gen_field(values->MaximumNumberofThreads, 0, 6) |
1744 0;
1745
1746 dw[2] =
1747 __gen_field(values->Enable, 31, 31) |
1748 __gen_field(values->StatisticsEnable, 29, 29) |
1749 __gen_field(values->InstanceCount, 0, 3) |
1750 0;
1751
1752 dw[3] =
1753 __gen_offset(values->KernelStartPointer, 6, 31) |
1754 0;
1755
1756 dw[4] =
1757 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
1758 __gen_field(values->PerThreadScratchSpace, 0, 3) |
1759 0;
1760
1761 dw[5] =
1762 __gen_field(values->SingleProgramFlow, 27, 27) |
1763 __gen_field(values->VectorMaskEnable, 26, 26) |
1764 __gen_field(values->IncludeVertexHandles, 24, 24) |
1765 __gen_field(values->DispatchGRFStartRegisterForURBData, 19, 23) |
1766 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
1767 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
1768 0;
1769
1770 dw[6] =
1771 __gen_offset(values->SemaphoreHandle, 0, 11) |
1772 0;
1773
1774 }
1775
1776 #define GEN7_3DSTATE_INDEX_BUFFER_length 0x00000003
1777 #define GEN7_3DSTATE_INDEX_BUFFER_length_bias 0x00000002
1778 #define GEN7_3DSTATE_INDEX_BUFFER_header \
1779 .CommandType = 3, \
1780 .CommandSubType = 3, \
1781 ._3DCommandOpcode = 0, \
1782 ._3DCommandSubOpcode = 10, \
1783 .DwordLength = 1
1784
1785 struct GEN7_3DSTATE_INDEX_BUFFER {
1786 uint32_t CommandType;
1787 uint32_t CommandSubType;
1788 uint32_t _3DCommandOpcode;
1789 uint32_t _3DCommandSubOpcode;
1790 uint32_t MemoryObjectControlState;
1791 uint32_t CutIndexEnable;
1792 #define INDEX_BYTE 0
1793 #define INDEX_WORD 1
1794 #define INDEX_DWORD 2
1795 uint32_t IndexFormat;
1796 uint32_t DwordLength;
1797 __gen_address_type BufferStartingAddress;
1798 __gen_address_type BufferEndingAddress;
1799 };
1800
1801 static inline void
1802 GEN7_3DSTATE_INDEX_BUFFER_pack(__gen_user_data *data, void * restrict dst,
1803 const struct GEN7_3DSTATE_INDEX_BUFFER * restrict values)
1804 {
1805 uint32_t *dw = (uint32_t * restrict) dst;
1806
1807 dw[0] =
1808 __gen_field(values->CommandType, 29, 31) |
1809 __gen_field(values->CommandSubType, 27, 28) |
1810 __gen_field(values->_3DCommandOpcode, 24, 26) |
1811 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1812 /* Struct MemoryObjectControlState: found MEMORY_OBJECT_CONTROL_STATE */
1813 __gen_field(values->CutIndexEnable, 10, 10) |
1814 __gen_field(values->IndexFormat, 8, 9) |
1815 __gen_field(values->DwordLength, 0, 7) |
1816 0;
1817
1818 uint32_t dw1 =
1819 0;
1820
1821 dw[1] =
1822 __gen_combine_address(data, &dw[1], values->BufferStartingAddress, dw1);
1823
1824 uint32_t dw2 =
1825 0;
1826
1827 dw[2] =
1828 __gen_combine_address(data, &dw[2], values->BufferEndingAddress, dw2);
1829
1830 }
1831
1832 #define GEN7_3DSTATE_LINE_STIPPLE_length 0x00000003
1833 #define GEN7_3DSTATE_LINE_STIPPLE_length_bias 0x00000002
1834 #define GEN7_3DSTATE_LINE_STIPPLE_header \
1835 .CommandType = 3, \
1836 .CommandSubType = 3, \
1837 ._3DCommandOpcode = 1, \
1838 ._3DCommandSubOpcode = 8, \
1839 .DwordLength = 1
1840
1841 struct GEN7_3DSTATE_LINE_STIPPLE {
1842 uint32_t CommandType;
1843 uint32_t CommandSubType;
1844 uint32_t _3DCommandOpcode;
1845 uint32_t _3DCommandSubOpcode;
1846 uint32_t DwordLength;
1847 uint32_t ModifyEnableCurrentRepeatCounterCurrentStippleIndex;
1848 uint32_t CurrentRepeatCounter;
1849 uint32_t CurrentStippleIndex;
1850 uint32_t LineStipplePattern;
1851 uint32_t LineStippleInverseRepeatCount;
1852 uint32_t LineStippleRepeatCount;
1853 };
1854
1855 static inline void
1856 GEN7_3DSTATE_LINE_STIPPLE_pack(__gen_user_data *data, void * restrict dst,
1857 const struct GEN7_3DSTATE_LINE_STIPPLE * restrict values)
1858 {
1859 uint32_t *dw = (uint32_t * restrict) dst;
1860
1861 dw[0] =
1862 __gen_field(values->CommandType, 29, 31) |
1863 __gen_field(values->CommandSubType, 27, 28) |
1864 __gen_field(values->_3DCommandOpcode, 24, 26) |
1865 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1866 __gen_field(values->DwordLength, 0, 7) |
1867 0;
1868
1869 dw[1] =
1870 __gen_field(values->ModifyEnableCurrentRepeatCounterCurrentStippleIndex, 31, 31) |
1871 __gen_field(values->CurrentRepeatCounter, 21, 29) |
1872 __gen_field(values->CurrentStippleIndex, 16, 19) |
1873 __gen_field(values->LineStipplePattern, 0, 15) |
1874 0;
1875
1876 dw[2] =
1877 __gen_field(values->LineStippleInverseRepeatCount, 15, 31) |
1878 __gen_field(values->LineStippleRepeatCount, 0, 8) |
1879 0;
1880
1881 }
1882
1883 #define GEN7_3DSTATE_MONOFILTER_SIZE_length 0x00000002
1884 #define GEN7_3DSTATE_MONOFILTER_SIZE_length_bias 0x00000002
1885 #define GEN7_3DSTATE_MONOFILTER_SIZE_header \
1886 .CommandType = 3, \
1887 .CommandSubType = 3, \
1888 ._3DCommandOpcode = 1, \
1889 ._3DCommandSubOpcode = 17, \
1890 .DwordLength = 0
1891
1892 struct GEN7_3DSTATE_MONOFILTER_SIZE {
1893 uint32_t CommandType;
1894 uint32_t CommandSubType;
1895 uint32_t _3DCommandOpcode;
1896 uint32_t _3DCommandSubOpcode;
1897 uint32_t DwordLength;
1898 uint32_t MonochromeFilterWidth;
1899 uint32_t MonochromeFilterHeight;
1900 };
1901
1902 static inline void
1903 GEN7_3DSTATE_MONOFILTER_SIZE_pack(__gen_user_data *data, void * restrict dst,
1904 const struct GEN7_3DSTATE_MONOFILTER_SIZE * restrict values)
1905 {
1906 uint32_t *dw = (uint32_t * restrict) dst;
1907
1908 dw[0] =
1909 __gen_field(values->CommandType, 29, 31) |
1910 __gen_field(values->CommandSubType, 27, 28) |
1911 __gen_field(values->_3DCommandOpcode, 24, 26) |
1912 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1913 __gen_field(values->DwordLength, 0, 7) |
1914 0;
1915
1916 dw[1] =
1917 __gen_field(values->MonochromeFilterWidth, 3, 5) |
1918 __gen_field(values->MonochromeFilterHeight, 0, 2) |
1919 0;
1920
1921 }
1922
1923 #define GEN7_3DSTATE_MULTISAMPLE_length 0x00000004
1924 #define GEN7_3DSTATE_MULTISAMPLE_length_bias 0x00000002
1925 #define GEN7_3DSTATE_MULTISAMPLE_header \
1926 .CommandType = 3, \
1927 .CommandSubType = 3, \
1928 ._3DCommandOpcode = 1, \
1929 ._3DCommandSubOpcode = 13, \
1930 .DwordLength = 2
1931
1932 struct GEN7_3DSTATE_MULTISAMPLE {
1933 uint32_t CommandType;
1934 uint32_t CommandSubType;
1935 uint32_t _3DCommandOpcode;
1936 uint32_t _3DCommandSubOpcode;
1937 uint32_t DwordLength;
1938 #define PIXLOC_CENTER 0
1939 #define PIXLOC_UL_CORNER 1
1940 uint32_t PixelLocation;
1941 #define NUMSAMPLES_1 0
1942 #define NUMSAMPLES_4 2
1943 #define NUMSAMPLES_8 3
1944 uint32_t NumberofMultisamples;
1945 uint32_t Sample3XOffset;
1946 uint32_t Sample3YOffset;
1947 uint32_t Sample2XOffset;
1948 uint32_t Sample2YOffset;
1949 uint32_t Sample1XOffset;
1950 uint32_t Sample1YOffset;
1951 uint32_t Sample0XOffset;
1952 uint32_t Sample0YOffset;
1953 uint32_t Sample7XOffset;
1954 uint32_t Sample7YOffset;
1955 uint32_t Sample6XOffset;
1956 uint32_t Sample6YOffset;
1957 uint32_t Sample5XOffset;
1958 uint32_t Sample5YOffset;
1959 uint32_t Sample4XOffset;
1960 uint32_t Sample4YOffset;
1961 };
1962
1963 static inline void
1964 GEN7_3DSTATE_MULTISAMPLE_pack(__gen_user_data *data, void * restrict dst,
1965 const struct GEN7_3DSTATE_MULTISAMPLE * restrict values)
1966 {
1967 uint32_t *dw = (uint32_t * restrict) dst;
1968
1969 dw[0] =
1970 __gen_field(values->CommandType, 29, 31) |
1971 __gen_field(values->CommandSubType, 27, 28) |
1972 __gen_field(values->_3DCommandOpcode, 24, 26) |
1973 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1974 __gen_field(values->DwordLength, 0, 7) |
1975 0;
1976
1977 dw[1] =
1978 __gen_field(values->PixelLocation, 4, 4) |
1979 __gen_field(values->NumberofMultisamples, 1, 3) |
1980 0;
1981
1982 dw[2] =
1983 __gen_field(values->Sample3XOffset, 28, 31) |
1984 __gen_field(values->Sample3YOffset, 24, 27) |
1985 __gen_field(values->Sample2XOffset, 20, 23) |
1986 __gen_field(values->Sample2YOffset, 16, 19) |
1987 __gen_field(values->Sample1XOffset, 12, 15) |
1988 __gen_field(values->Sample1YOffset, 8, 11) |
1989 __gen_field(values->Sample0XOffset, 4, 7) |
1990 __gen_field(values->Sample0YOffset, 0, 3) |
1991 0;
1992
1993 dw[3] =
1994 __gen_field(values->Sample7XOffset, 28, 31) |
1995 __gen_field(values->Sample7YOffset, 24, 27) |
1996 __gen_field(values->Sample6XOffset, 20, 23) |
1997 __gen_field(values->Sample6YOffset, 16, 19) |
1998 __gen_field(values->Sample5XOffset, 12, 15) |
1999 __gen_field(values->Sample5YOffset, 8, 11) |
2000 __gen_field(values->Sample4XOffset, 4, 7) |
2001 __gen_field(values->Sample4YOffset, 0, 3) |
2002 0;
2003
2004 }
2005
2006 #define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_length 0x00000002
2007 #define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_length_bias 0x00000002
2008 #define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_header \
2009 .CommandType = 3, \
2010 .CommandSubType = 3, \
2011 ._3DCommandOpcode = 1, \
2012 ._3DCommandSubOpcode = 6, \
2013 .DwordLength = 0
2014
2015 struct GEN7_3DSTATE_POLY_STIPPLE_OFFSET {
2016 uint32_t CommandType;
2017 uint32_t CommandSubType;
2018 uint32_t _3DCommandOpcode;
2019 uint32_t _3DCommandSubOpcode;
2020 uint32_t DwordLength;
2021 uint32_t PolygonStippleXOffset;
2022 uint32_t PolygonStippleYOffset;
2023 };
2024
2025 static inline void
2026 GEN7_3DSTATE_POLY_STIPPLE_OFFSET_pack(__gen_user_data *data, void * restrict dst,
2027 const struct GEN7_3DSTATE_POLY_STIPPLE_OFFSET * restrict values)
2028 {
2029 uint32_t *dw = (uint32_t * restrict) dst;
2030
2031 dw[0] =
2032 __gen_field(values->CommandType, 29, 31) |
2033 __gen_field(values->CommandSubType, 27, 28) |
2034 __gen_field(values->_3DCommandOpcode, 24, 26) |
2035 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2036 __gen_field(values->DwordLength, 0, 7) |
2037 0;
2038
2039 dw[1] =
2040 __gen_field(values->PolygonStippleXOffset, 8, 12) |
2041 __gen_field(values->PolygonStippleYOffset, 0, 4) |
2042 0;
2043
2044 }
2045
2046 #define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_length 0x00000021
2047 #define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_length_bias 0x00000002
2048 #define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_header\
2049 .CommandType = 3, \
2050 .CommandSubType = 3, \
2051 ._3DCommandOpcode = 1, \
2052 ._3DCommandSubOpcode = 7, \
2053 .DwordLength = 31
2054
2055 struct GEN7_3DSTATE_POLY_STIPPLE_PATTERN {
2056 uint32_t CommandType;
2057 uint32_t CommandSubType;
2058 uint32_t _3DCommandOpcode;
2059 uint32_t _3DCommandSubOpcode;
2060 uint32_t DwordLength;
2061 uint32_t PatternRow;
2062 };
2063
2064 static inline void
2065 GEN7_3DSTATE_POLY_STIPPLE_PATTERN_pack(__gen_user_data *data, void * restrict dst,
2066 const struct GEN7_3DSTATE_POLY_STIPPLE_PATTERN * restrict values)
2067 {
2068 uint32_t *dw = (uint32_t * restrict) dst;
2069
2070 dw[0] =
2071 __gen_field(values->CommandType, 29, 31) |
2072 __gen_field(values->CommandSubType, 27, 28) |
2073 __gen_field(values->_3DCommandOpcode, 24, 26) |
2074 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2075 __gen_field(values->DwordLength, 0, 7) |
2076 0;
2077
2078 dw[1] =
2079 __gen_field(values->PatternRow, 0, 31) |
2080 0;
2081
2082 }
2083
2084 #define GEN7_3DSTATE_PS_length 0x00000008
2085 #define GEN7_3DSTATE_PS_length_bias 0x00000002
2086 #define GEN7_3DSTATE_PS_header \
2087 .CommandType = 3, \
2088 .CommandSubType = 3, \
2089 ._3DCommandOpcode = 0, \
2090 ._3DCommandSubOpcode = 32, \
2091 .DwordLength = 6
2092
2093 struct GEN7_3DSTATE_PS {
2094 uint32_t CommandType;
2095 uint32_t CommandSubType;
2096 uint32_t _3DCommandOpcode;
2097 uint32_t _3DCommandSubOpcode;
2098 uint32_t DwordLength;
2099 uint32_t KernelStartPointer0;
2100 #define Multiple 0
2101 #define Single 1
2102 uint32_t SingleProgramFlowSPF;
2103 #define Dmask 0
2104 #define Vmask 1
2105 uint32_t VectorMaskEnableVME;
2106 uint32_t SamplerCount;
2107 #define FTZ 0
2108 #define RET 1
2109 uint32_t DenormalMode;
2110 uint32_t BindingTableEntryCount;
2111 #define IEEE745 0
2112 #define Alt 1
2113 uint32_t FloatingPointMode;
2114 #define RTNE 0
2115 #define RU 1
2116 #define RD 2
2117 #define RTZ 3
2118 uint32_t RoundingMode;
2119 uint32_t IllegalOpcodeExceptionEnable;
2120 uint32_t MaskStackExceptionEnable;
2121 uint32_t SoftwareExceptionEnable;
2122 uint32_t ScratchSpaceBasePointer;
2123 uint32_t PerThreadScratchSpace;
2124 uint32_t MaximumNumberofThreads;
2125 uint32_t PushConstantEnable;
2126 uint32_t AttributeEnable;
2127 uint32_t oMaskPresenttoRenderTarget;
2128 uint32_t RenderTargetFastClearEnable;
2129 uint32_t DualSourceBlendEnable;
2130 uint32_t RenderTargetResolveEnable;
2131 #define POSOFFSET_NONE 0
2132 #define POSOFFSET_CENTROID 2
2133 #define POSOFFSET_SAMPLE 3
2134 uint32_t PositionXYOffsetSelect;
2135 uint32_t _32PixelDispatchEnable;
2136 uint32_t _16PixelDispatchEnable;
2137 uint32_t _8PixelDispatchEnable;
2138 uint32_t DispatchGRFStartRegisterforConstantSetupData0;
2139 uint32_t DispatchGRFStartRegisterforConstantSetupData1;
2140 uint32_t DispatchGRFStartRegisterforConstantSetupData2;
2141 uint32_t KernelStartPointer1;
2142 uint32_t KernelStartPointer2;
2143 };
2144
2145 static inline void
2146 GEN7_3DSTATE_PS_pack(__gen_user_data *data, void * restrict dst,
2147 const struct GEN7_3DSTATE_PS * restrict values)
2148 {
2149 uint32_t *dw = (uint32_t * restrict) dst;
2150
2151 dw[0] =
2152 __gen_field(values->CommandType, 29, 31) |
2153 __gen_field(values->CommandSubType, 27, 28) |
2154 __gen_field(values->_3DCommandOpcode, 24, 26) |
2155 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2156 __gen_field(values->DwordLength, 0, 7) |
2157 0;
2158
2159 dw[1] =
2160 __gen_offset(values->KernelStartPointer0, 6, 31) |
2161 0;
2162
2163 dw[2] =
2164 __gen_field(values->SingleProgramFlowSPF, 31, 31) |
2165 __gen_field(values->VectorMaskEnableVME, 30, 30) |
2166 __gen_field(values->SamplerCount, 27, 29) |
2167 __gen_field(values->DenormalMode, 26, 26) |
2168 __gen_field(values->BindingTableEntryCount, 18, 25) |
2169 __gen_field(values->FloatingPointMode, 16, 16) |
2170 __gen_field(values->RoundingMode, 14, 15) |
2171 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2172 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
2173 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
2174 0;
2175
2176 dw[3] =
2177 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
2178 __gen_field(values->PerThreadScratchSpace, 0, 3) |
2179 0;
2180
2181 dw[4] =
2182 __gen_field(values->MaximumNumberofThreads, 24, 31) |
2183 __gen_field(values->PushConstantEnable, 11, 11) |
2184 __gen_field(values->AttributeEnable, 10, 10) |
2185 __gen_field(values->oMaskPresenttoRenderTarget, 9, 9) |
2186 __gen_field(values->RenderTargetFastClearEnable, 8, 8) |
2187 __gen_field(values->DualSourceBlendEnable, 7, 7) |
2188 __gen_field(values->RenderTargetResolveEnable, 6, 6) |
2189 __gen_field(values->PositionXYOffsetSelect, 3, 4) |
2190 __gen_field(values->_32PixelDispatchEnable, 2, 2) |
2191 __gen_field(values->_16PixelDispatchEnable, 1, 1) |
2192 __gen_field(values->_8PixelDispatchEnable, 0, 0) |
2193 0;
2194
2195 dw[5] =
2196 __gen_field(values->DispatchGRFStartRegisterforConstantSetupData0, 16, 22) |
2197 __gen_field(values->DispatchGRFStartRegisterforConstantSetupData1, 8, 14) |
2198 __gen_field(values->DispatchGRFStartRegisterforConstantSetupData2, 0, 6) |
2199 0;
2200
2201 dw[6] =
2202 __gen_offset(values->KernelStartPointer1, 6, 31) |
2203 0;
2204
2205 dw[7] =
2206 __gen_offset(values->KernelStartPointer2, 6, 31) |
2207 0;
2208
2209 }
2210
2211 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length 0x00000002
2212 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length_bias 0x00000002
2213 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_header\
2214 .CommandType = 3, \
2215 .CommandSubType = 3, \
2216 ._3DCommandOpcode = 1, \
2217 ._3DCommandSubOpcode = 20, \
2218 .DwordLength = 0
2219
2220 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS {
2221 uint32_t CommandType;
2222 uint32_t CommandSubType;
2223 uint32_t _3DCommandOpcode;
2224 uint32_t _3DCommandSubOpcode;
2225 uint32_t DwordLength;
2226 #define _0KB 0
2227 uint32_t ConstantBufferOffset;
2228 #define _0KB 0
2229 uint32_t ConstantBufferSize;
2230 };
2231
2232 static inline void
2233 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_pack(__gen_user_data *data, void * restrict dst,
2234 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS * restrict values)
2235 {
2236 uint32_t *dw = (uint32_t * restrict) dst;
2237
2238 dw[0] =
2239 __gen_field(values->CommandType, 29, 31) |
2240 __gen_field(values->CommandSubType, 27, 28) |
2241 __gen_field(values->_3DCommandOpcode, 24, 26) |
2242 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2243 __gen_field(values->DwordLength, 0, 7) |
2244 0;
2245
2246 dw[1] =
2247 __gen_field(values->ConstantBufferOffset, 16, 19) |
2248 __gen_field(values->ConstantBufferSize, 0, 4) |
2249 0;
2250
2251 }
2252
2253 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length 0x00000002
2254 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length_bias 0x00000002
2255 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_header\
2256 .CommandType = 3, \
2257 .CommandSubType = 3, \
2258 ._3DCommandOpcode = 1, \
2259 ._3DCommandSubOpcode = 21, \
2260 .DwordLength = 0
2261
2262 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS {
2263 uint32_t CommandType;
2264 uint32_t CommandSubType;
2265 uint32_t _3DCommandOpcode;
2266 uint32_t _3DCommandSubOpcode;
2267 uint32_t DwordLength;
2268 #define _0KB 0
2269 uint32_t ConstantBufferOffset;
2270 #define _0KB 0
2271 uint32_t ConstantBufferSize;
2272 };
2273
2274 static inline void
2275 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_pack(__gen_user_data *data, void * restrict dst,
2276 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS * restrict values)
2277 {
2278 uint32_t *dw = (uint32_t * restrict) dst;
2279
2280 dw[0] =
2281 __gen_field(values->CommandType, 29, 31) |
2282 __gen_field(values->CommandSubType, 27, 28) |
2283 __gen_field(values->_3DCommandOpcode, 24, 26) |
2284 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2285 __gen_field(values->DwordLength, 0, 7) |
2286 0;
2287
2288 dw[1] =
2289 __gen_field(values->ConstantBufferOffset, 16, 19) |
2290 __gen_field(values->ConstantBufferSize, 0, 4) |
2291 0;
2292
2293 }
2294
2295 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length 0x00000002
2296 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length_bias 0x00000002
2297 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_header\
2298 .CommandType = 3, \
2299 .CommandSubType = 3, \
2300 ._3DCommandOpcode = 1, \
2301 ._3DCommandSubOpcode = 19, \
2302 .DwordLength = 0
2303
2304 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS {
2305 uint32_t CommandType;
2306 uint32_t CommandSubType;
2307 uint32_t _3DCommandOpcode;
2308 uint32_t _3DCommandSubOpcode;
2309 uint32_t DwordLength;
2310 #define _0KB 0
2311 uint32_t ConstantBufferOffset;
2312 #define _0KB 0
2313 uint32_t ConstantBufferSize;
2314 };
2315
2316 static inline void
2317 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_pack(__gen_user_data *data, void * restrict dst,
2318 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS * restrict values)
2319 {
2320 uint32_t *dw = (uint32_t * restrict) dst;
2321
2322 dw[0] =
2323 __gen_field(values->CommandType, 29, 31) |
2324 __gen_field(values->CommandSubType, 27, 28) |
2325 __gen_field(values->_3DCommandOpcode, 24, 26) |
2326 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2327 __gen_field(values->DwordLength, 0, 7) |
2328 0;
2329
2330 dw[1] =
2331 __gen_field(values->ConstantBufferOffset, 16, 19) |
2332 __gen_field(values->ConstantBufferSize, 0, 4) |
2333 0;
2334
2335 }
2336
2337 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length 0x00000002
2338 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length_bias 0x00000002
2339 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_header\
2340 .CommandType = 3, \
2341 .CommandSubType = 3, \
2342 ._3DCommandOpcode = 1, \
2343 ._3DCommandSubOpcode = 22, \
2344 .DwordLength = 0
2345
2346 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS {
2347 uint32_t CommandType;
2348 uint32_t CommandSubType;
2349 uint32_t _3DCommandOpcode;
2350 uint32_t _3DCommandSubOpcode;
2351 uint32_t DwordLength;
2352 #define _0KB 0
2353 uint32_t ConstantBufferOffset;
2354 #define _0KB 0
2355 uint32_t ConstantBufferSize;
2356 };
2357
2358 static inline void
2359 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_pack(__gen_user_data *data, void * restrict dst,
2360 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS * restrict values)
2361 {
2362 uint32_t *dw = (uint32_t * restrict) dst;
2363
2364 dw[0] =
2365 __gen_field(values->CommandType, 29, 31) |
2366 __gen_field(values->CommandSubType, 27, 28) |
2367 __gen_field(values->_3DCommandOpcode, 24, 26) |
2368 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2369 __gen_field(values->DwordLength, 0, 7) |
2370 0;
2371
2372 dw[1] =
2373 __gen_field(values->ConstantBufferOffset, 16, 19) |
2374 __gen_field(values->ConstantBufferSize, 0, 4) |
2375 0;
2376
2377 }
2378
2379 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length 0x00000002
2380 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length_bias 0x00000002
2381 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_header\
2382 .CommandType = 3, \
2383 .CommandSubType = 3, \
2384 ._3DCommandOpcode = 1, \
2385 ._3DCommandSubOpcode = 18, \
2386 .DwordLength = 0
2387
2388 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS {
2389 uint32_t CommandType;
2390 uint32_t CommandSubType;
2391 uint32_t _3DCommandOpcode;
2392 uint32_t _3DCommandSubOpcode;
2393 uint32_t DwordLength;
2394 #define _0KB 0
2395 uint32_t ConstantBufferOffset;
2396 #define _0KB 0
2397 uint32_t ConstantBufferSize;
2398 };
2399
2400 static inline void
2401 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_pack(__gen_user_data *data, void * restrict dst,
2402 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS * restrict values)
2403 {
2404 uint32_t *dw = (uint32_t * restrict) dst;
2405
2406 dw[0] =
2407 __gen_field(values->CommandType, 29, 31) |
2408 __gen_field(values->CommandSubType, 27, 28) |
2409 __gen_field(values->_3DCommandOpcode, 24, 26) |
2410 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2411 __gen_field(values->DwordLength, 0, 7) |
2412 0;
2413
2414 dw[1] =
2415 __gen_field(values->ConstantBufferOffset, 16, 19) |
2416 __gen_field(values->ConstantBufferSize, 0, 4) |
2417 0;
2418
2419 }
2420
2421 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_length_bias 0x00000002
2422 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_header\
2423 .CommandType = 3, \
2424 .CommandSubType = 3, \
2425 ._3DCommandOpcode = 1, \
2426 ._3DCommandSubOpcode = 2
2427
2428 struct GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0 {
2429 uint32_t CommandType;
2430 uint32_t CommandSubType;
2431 uint32_t _3DCommandOpcode;
2432 uint32_t _3DCommandSubOpcode;
2433 uint32_t DwordLength;
2434 /* variable length fields follow */
2435 };
2436
2437 static inline void
2438 GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_pack(__gen_user_data *data, void * restrict dst,
2439 const struct GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0 * restrict values)
2440 {
2441 uint32_t *dw = (uint32_t * restrict) dst;
2442
2443 dw[0] =
2444 __gen_field(values->CommandType, 29, 31) |
2445 __gen_field(values->CommandSubType, 27, 28) |
2446 __gen_field(values->_3DCommandOpcode, 24, 26) |
2447 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2448 __gen_field(values->DwordLength, 0, 7) |
2449 0;
2450
2451 /* variable length fields follow */
2452 }
2453
2454 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_length_bias 0x00000002
2455 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_header\
2456 .CommandType = 3, \
2457 .CommandSubType = 3, \
2458 ._3DCommandOpcode = 1, \
2459 ._3DCommandSubOpcode = 12
2460
2461 struct GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1 {
2462 uint32_t CommandType;
2463 uint32_t CommandSubType;
2464 uint32_t _3DCommandOpcode;
2465 uint32_t _3DCommandSubOpcode;
2466 uint32_t DwordLength;
2467 /* variable length fields follow */
2468 };
2469
2470 static inline void
2471 GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_pack(__gen_user_data *data, void * restrict dst,
2472 const struct GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1 * restrict values)
2473 {
2474 uint32_t *dw = (uint32_t * restrict) dst;
2475
2476 dw[0] =
2477 __gen_field(values->CommandType, 29, 31) |
2478 __gen_field(values->CommandSubType, 27, 28) |
2479 __gen_field(values->_3DCommandOpcode, 24, 26) |
2480 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2481 __gen_field(values->DwordLength, 0, 7) |
2482 0;
2483
2484 /* variable length fields follow */
2485 }
2486
2487 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_length 0x00000002
2488 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_length_bias 0x00000002
2489 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_header\
2490 .CommandType = 3, \
2491 .CommandSubType = 3, \
2492 ._3DCommandOpcode = 0, \
2493 ._3DCommandSubOpcode = 45, \
2494 .DwordLength = 0
2495
2496 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS {
2497 uint32_t CommandType;
2498 uint32_t CommandSubType;
2499 uint32_t _3DCommandOpcode;
2500 uint32_t _3DCommandSubOpcode;
2501 uint32_t DwordLength;
2502 uint32_t PointertoDSSamplerState;
2503 };
2504
2505 static inline void
2506 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
2507 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS * restrict values)
2508 {
2509 uint32_t *dw = (uint32_t * restrict) dst;
2510
2511 dw[0] =
2512 __gen_field(values->CommandType, 29, 31) |
2513 __gen_field(values->CommandSubType, 27, 28) |
2514 __gen_field(values->_3DCommandOpcode, 24, 26) |
2515 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2516 __gen_field(values->DwordLength, 0, 7) |
2517 0;
2518
2519 dw[1] =
2520 __gen_offset(values->PointertoDSSamplerState, 5, 31) |
2521 0;
2522
2523 }
2524
2525 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_length 0x00000002
2526 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_length_bias 0x00000002
2527 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_header\
2528 .CommandType = 3, \
2529 .CommandSubType = 3, \
2530 ._3DCommandOpcode = 0, \
2531 ._3DCommandSubOpcode = 46, \
2532 .DwordLength = 0
2533
2534 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS {
2535 uint32_t CommandType;
2536 uint32_t CommandSubType;
2537 uint32_t _3DCommandOpcode;
2538 uint32_t _3DCommandSubOpcode;
2539 uint32_t DwordLength;
2540 uint32_t PointertoGSSamplerState;
2541 };
2542
2543 static inline void
2544 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
2545 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS * restrict values)
2546 {
2547 uint32_t *dw = (uint32_t * restrict) dst;
2548
2549 dw[0] =
2550 __gen_field(values->CommandType, 29, 31) |
2551 __gen_field(values->CommandSubType, 27, 28) |
2552 __gen_field(values->_3DCommandOpcode, 24, 26) |
2553 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2554 __gen_field(values->DwordLength, 0, 7) |
2555 0;
2556
2557 dw[1] =
2558 __gen_offset(values->PointertoGSSamplerState, 5, 31) |
2559 0;
2560
2561 }
2562
2563 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_length 0x00000002
2564 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_length_bias 0x00000002
2565 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_header\
2566 .CommandType = 3, \
2567 .CommandSubType = 3, \
2568 ._3DCommandOpcode = 0, \
2569 ._3DCommandSubOpcode = 44, \
2570 .DwordLength = 0
2571
2572 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS {
2573 uint32_t CommandType;
2574 uint32_t CommandSubType;
2575 uint32_t _3DCommandOpcode;
2576 uint32_t _3DCommandSubOpcode;
2577 uint32_t DwordLength;
2578 uint32_t PointertoHSSamplerState;
2579 };
2580
2581 static inline void
2582 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
2583 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS * restrict values)
2584 {
2585 uint32_t *dw = (uint32_t * restrict) dst;
2586
2587 dw[0] =
2588 __gen_field(values->CommandType, 29, 31) |
2589 __gen_field(values->CommandSubType, 27, 28) |
2590 __gen_field(values->_3DCommandOpcode, 24, 26) |
2591 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2592 __gen_field(values->DwordLength, 0, 7) |
2593 0;
2594
2595 dw[1] =
2596 __gen_offset(values->PointertoHSSamplerState, 5, 31) |
2597 0;
2598
2599 }
2600
2601 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_length 0x00000002
2602 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_length_bias 0x00000002
2603 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_header\
2604 .CommandType = 3, \
2605 .CommandSubType = 3, \
2606 ._3DCommandOpcode = 0, \
2607 ._3DCommandSubOpcode = 47, \
2608 .DwordLength = 0
2609
2610 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS {
2611 uint32_t CommandType;
2612 uint32_t CommandSubType;
2613 uint32_t _3DCommandOpcode;
2614 uint32_t _3DCommandSubOpcode;
2615 uint32_t DwordLength;
2616 uint32_t PointertoPSSamplerState;
2617 };
2618
2619 static inline void
2620 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
2621 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS * restrict values)
2622 {
2623 uint32_t *dw = (uint32_t * restrict) dst;
2624
2625 dw[0] =
2626 __gen_field(values->CommandType, 29, 31) |
2627 __gen_field(values->CommandSubType, 27, 28) |
2628 __gen_field(values->_3DCommandOpcode, 24, 26) |
2629 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2630 __gen_field(values->DwordLength, 0, 7) |
2631 0;
2632
2633 dw[1] =
2634 __gen_offset(values->PointertoPSSamplerState, 5, 31) |
2635 0;
2636
2637 }
2638
2639 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_length 0x00000002
2640 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_length_bias 0x00000002
2641 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_header\
2642 .CommandType = 3, \
2643 .CommandSubType = 3, \
2644 ._3DCommandOpcode = 0, \
2645 ._3DCommandSubOpcode = 43, \
2646 .DwordLength = 0
2647
2648 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS {
2649 uint32_t CommandType;
2650 uint32_t CommandSubType;
2651 uint32_t _3DCommandOpcode;
2652 uint32_t _3DCommandSubOpcode;
2653 uint32_t DwordLength;
2654 uint32_t PointertoVSSamplerState;
2655 };
2656
2657 static inline void
2658 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
2659 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS * restrict values)
2660 {
2661 uint32_t *dw = (uint32_t * restrict) dst;
2662
2663 dw[0] =
2664 __gen_field(values->CommandType, 29, 31) |
2665 __gen_field(values->CommandSubType, 27, 28) |
2666 __gen_field(values->_3DCommandOpcode, 24, 26) |
2667 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2668 __gen_field(values->DwordLength, 0, 7) |
2669 0;
2670
2671 dw[1] =
2672 __gen_offset(values->PointertoVSSamplerState, 5, 31) |
2673 0;
2674
2675 }
2676
2677 #define GEN7_3DSTATE_SAMPLE_MASK_length 0x00000002
2678 #define GEN7_3DSTATE_SAMPLE_MASK_length_bias 0x00000002
2679 #define GEN7_3DSTATE_SAMPLE_MASK_header \
2680 .CommandType = 3, \
2681 .CommandSubType = 3, \
2682 ._3DCommandOpcode = 0, \
2683 ._3DCommandSubOpcode = 24, \
2684 .DwordLength = 0
2685
2686 struct GEN7_3DSTATE_SAMPLE_MASK {
2687 uint32_t CommandType;
2688 uint32_t CommandSubType;
2689 uint32_t _3DCommandOpcode;
2690 uint32_t _3DCommandSubOpcode;
2691 uint32_t DwordLength;
2692 uint32_t SampleMask;
2693 };
2694
2695 static inline void
2696 GEN7_3DSTATE_SAMPLE_MASK_pack(__gen_user_data *data, void * restrict dst,
2697 const struct GEN7_3DSTATE_SAMPLE_MASK * restrict values)
2698 {
2699 uint32_t *dw = (uint32_t * restrict) dst;
2700
2701 dw[0] =
2702 __gen_field(values->CommandType, 29, 31) |
2703 __gen_field(values->CommandSubType, 27, 28) |
2704 __gen_field(values->_3DCommandOpcode, 24, 26) |
2705 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2706 __gen_field(values->DwordLength, 0, 7) |
2707 0;
2708
2709 dw[1] =
2710 __gen_field(values->SampleMask, 0, 7) |
2711 0;
2712
2713 }
2714
2715 #define GEN7_3DSTATE_SBE_length 0x0000000e
2716 #define GEN7_3DSTATE_SBE_length_bias 0x00000002
2717 #define GEN7_3DSTATE_SBE_header \
2718 .CommandType = 3, \
2719 .CommandSubType = 3, \
2720 ._3DCommandOpcode = 0, \
2721 ._3DCommandSubOpcode = 31, \
2722 .DwordLength = 12
2723
2724 struct GEN7_3DSTATE_SBE {
2725 uint32_t CommandType;
2726 uint32_t CommandSubType;
2727 uint32_t _3DCommandOpcode;
2728 uint32_t _3DCommandSubOpcode;
2729 uint32_t DwordLength;
2730 #define SWIZ_0_15 0
2731 #define SWIZ_16_31 1
2732 uint32_t AttributeSwizzleControlMode;
2733 uint32_t NumberofSFOutputAttributes;
2734 uint32_t AttributeSwizzleEnable;
2735 #define UPPERLEFT 0
2736 #define LOWERLEFT 1
2737 uint32_t PointSpriteTextureCoordinateOrigin;
2738 uint32_t VertexURBEntryReadLength;
2739 uint32_t VertexURBEntryReadOffset;
2740 uint32_t Attribute2n1ComponentOverrideW;
2741 uint32_t Attribute2n1ComponentOverrideZ;
2742 uint32_t Attribute2n1ComponentOverrideY;
2743 uint32_t Attribute2n1ComponentOverrideX;
2744 #define CONST_0000 0
2745 #define CONST_0001_FLOAT 1
2746 #define CONST_1111_FLOAT 2
2747 #define PRIM_ID 3
2748 uint32_t Attribute2n1ConstantSource;
2749 #define INPUTATTR 0
2750 #define INPUTATTR_FACING 1
2751 #define INPUTATTR_W 2
2752 #define INPUTATTR_FACING_W 3
2753 uint32_t Attribute2n1SwizzleSelect;
2754 uint32_t Attribute2n1SourceAttribute;
2755 uint32_t Attribute2nComponentOverrideW;
2756 uint32_t Attribute2nComponentOverrideZ;
2757 uint32_t Attribute2nComponentOverrideY;
2758 uint32_t Attribute2nComponentOverrideX;
2759 #define CONST_0000 0
2760 #define CONST_0001_FLOAT 1
2761 #define CONST_1111_FLOAT 2
2762 #define PRIM_ID 3
2763 uint32_t Attribute2nConstantSource;
2764 #define INPUTATTR 0
2765 #define INPUTATTR_FACING 1
2766 #define INPUTATTR_W 2
2767 #define INPUTATTR_FACING_W 3
2768 uint32_t Attribute2nSwizzleSelect;
2769 uint32_t Attribute2nSourceAttribute;
2770 uint32_t PointSpriteTextureCoordinateEnable;
2771 uint32_t ConstantInterpolationEnable310;
2772 uint32_t Attribute7WrapShortestEnables;
2773 uint32_t Attribute6WrapShortestEnables;
2774 uint32_t Attribute5WrapShortestEnables;
2775 uint32_t Attribute4WrapShortestEnables;
2776 uint32_t Attribute3WrapShortestEnables;
2777 uint32_t Attribute2WrapShortestEnables;
2778 uint32_t Attribute1WrapShortestEnables;
2779 uint32_t Attribute0WrapShortestEnables;
2780 uint32_t Attribute15WrapShortestEnables;
2781 uint32_t Attribute14WrapShortestEnables;
2782 uint32_t Attribute13WrapShortestEnables;
2783 uint32_t Attribute12WrapShortestEnables;
2784 uint32_t Attribute11WrapShortestEnables;
2785 uint32_t Attribute10WrapShortestEnables;
2786 uint32_t Attribute9WrapShortestEnables;
2787 uint32_t Attribute8WrapShortestEnables;
2788 };
2789
2790 static inline void
2791 GEN7_3DSTATE_SBE_pack(__gen_user_data *data, void * restrict dst,
2792 const struct GEN7_3DSTATE_SBE * restrict values)
2793 {
2794 uint32_t *dw = (uint32_t * restrict) dst;
2795
2796 dw[0] =
2797 __gen_field(values->CommandType, 29, 31) |
2798 __gen_field(values->CommandSubType, 27, 28) |
2799 __gen_field(values->_3DCommandOpcode, 24, 26) |
2800 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2801 __gen_field(values->DwordLength, 0, 7) |
2802 0;
2803
2804 dw[1] =
2805 __gen_field(values->AttributeSwizzleControlMode, 28, 28) |
2806 __gen_field(values->NumberofSFOutputAttributes, 22, 27) |
2807 __gen_field(values->AttributeSwizzleEnable, 21, 21) |
2808 __gen_field(values->PointSpriteTextureCoordinateOrigin, 20, 20) |
2809 __gen_field(values->VertexURBEntryReadLength, 11, 15) |
2810 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
2811 0;
2812
2813 dw[2] =
2814 __gen_field(values->Attribute2n1ComponentOverrideW, 31, 31) |
2815 __gen_field(values->Attribute2n1ComponentOverrideZ, 30, 30) |
2816 __gen_field(values->Attribute2n1ComponentOverrideY, 29, 29) |
2817 __gen_field(values->Attribute2n1ComponentOverrideX, 28, 28) |
2818 __gen_field(values->Attribute2n1ConstantSource, 25, 26) |
2819 __gen_field(values->Attribute2n1SwizzleSelect, 22, 23) |
2820 __gen_field(values->Attribute2n1SourceAttribute, 16, 20) |
2821 __gen_field(values->Attribute2nComponentOverrideW, 15, 15) |
2822 __gen_field(values->Attribute2nComponentOverrideZ, 14, 14) |
2823 __gen_field(values->Attribute2nComponentOverrideY, 13, 13) |
2824 __gen_field(values->Attribute2nComponentOverrideX, 12, 12) |
2825 __gen_field(values->Attribute2nConstantSource, 9, 10) |
2826 __gen_field(values->Attribute2nSwizzleSelect, 6, 7) |
2827 __gen_field(values->Attribute2nSourceAttribute, 0, 4) |
2828 0;
2829
2830 dw[10] =
2831 __gen_field(values->PointSpriteTextureCoordinateEnable, 0, 31) |
2832 0;
2833
2834 dw[11] =
2835 __gen_field(values->ConstantInterpolationEnable310, 0, 31) |
2836 0;
2837
2838 dw[12] =
2839 __gen_field(values->Attribute7WrapShortestEnables, 28, 31) |
2840 __gen_field(values->Attribute6WrapShortestEnables, 24, 27) |
2841 __gen_field(values->Attribute5WrapShortestEnables, 20, 23) |
2842 __gen_field(values->Attribute4WrapShortestEnables, 16, 19) |
2843 __gen_field(values->Attribute3WrapShortestEnables, 12, 15) |
2844 __gen_field(values->Attribute2WrapShortestEnables, 8, 11) |
2845 __gen_field(values->Attribute1WrapShortestEnables, 4, 7) |
2846 __gen_field(values->Attribute0WrapShortestEnables, 0, 3) |
2847 0;
2848
2849 dw[13] =
2850 __gen_field(values->Attribute15WrapShortestEnables, 28, 31) |
2851 __gen_field(values->Attribute14WrapShortestEnables, 24, 27) |
2852 __gen_field(values->Attribute13WrapShortestEnables, 20, 23) |
2853 __gen_field(values->Attribute12WrapShortestEnables, 16, 19) |
2854 __gen_field(values->Attribute11WrapShortestEnables, 12, 15) |
2855 __gen_field(values->Attribute10WrapShortestEnables, 8, 11) |
2856 __gen_field(values->Attribute9WrapShortestEnables, 4, 7) |
2857 __gen_field(values->Attribute8WrapShortestEnables, 0, 3) |
2858 0;
2859
2860 }
2861
2862 #define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_length 0x00000002
2863 #define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_length_bias 0x00000002
2864 #define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_header\
2865 .CommandType = 3, \
2866 .CommandSubType = 3, \
2867 ._3DCommandOpcode = 0, \
2868 ._3DCommandSubOpcode = 15, \
2869 .DwordLength = 0
2870
2871 struct GEN7_3DSTATE_SCISSOR_STATE_POINTERS {
2872 uint32_t CommandType;
2873 uint32_t CommandSubType;
2874 uint32_t _3DCommandOpcode;
2875 uint32_t _3DCommandSubOpcode;
2876 uint32_t DwordLength;
2877 uint32_t ScissorRectPointer;
2878 };
2879
2880 static inline void
2881 GEN7_3DSTATE_SCISSOR_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
2882 const struct GEN7_3DSTATE_SCISSOR_STATE_POINTERS * restrict values)
2883 {
2884 uint32_t *dw = (uint32_t * restrict) dst;
2885
2886 dw[0] =
2887 __gen_field(values->CommandType, 29, 31) |
2888 __gen_field(values->CommandSubType, 27, 28) |
2889 __gen_field(values->_3DCommandOpcode, 24, 26) |
2890 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2891 __gen_field(values->DwordLength, 0, 7) |
2892 0;
2893
2894 dw[1] =
2895 __gen_offset(values->ScissorRectPointer, 5, 31) |
2896 0;
2897
2898 }
2899
2900 #define GEN7_3DSTATE_SF_length 0x00000007
2901 #define GEN7_3DSTATE_SF_length_bias 0x00000002
2902 #define GEN7_3DSTATE_SF_header \
2903 .CommandType = 3, \
2904 .CommandSubType = 3, \
2905 ._3DCommandOpcode = 0, \
2906 ._3DCommandSubOpcode = 19, \
2907 .DwordLength = 5
2908
2909 struct GEN7_3DSTATE_SF {
2910 uint32_t CommandType;
2911 uint32_t CommandSubType;
2912 uint32_t _3DCommandOpcode;
2913 uint32_t _3DCommandSubOpcode;
2914 uint32_t DwordLength;
2915 #define D32_FLOAT_S8X24_UINT 0
2916 #define D32_FLOAT 1
2917 #define D24_UNORM_S8_UINT 2
2918 #define D24_UNORM_X8_UINT 3
2919 #define D16_UNORM 5
2920 uint32_t DepthBufferSurfaceFormat;
2921 uint32_t LegacyGlobalDepthBiasEnable;
2922 uint32_t StatisticsEnable;
2923 uint32_t GlobalDepthOffsetEnableSolid;
2924 uint32_t GlobalDepthOffsetEnableWireframe;
2925 uint32_t GlobalDepthOffsetEnablePoint;
2926 #define RASTER_SOLID 0
2927 #define RASTER_WIREFRAME 1
2928 #define RASTER_POINT 2
2929 uint32_t FrontFaceFillMode;
2930 #define RASTER_SOLID 0
2931 #define RASTER_WIREFRAME 1
2932 #define RASTER_POINT 2
2933 uint32_t BackFaceFillMode;
2934 uint32_t ViewTransformEnable;
2935 uint32_t FrontWinding;
2936 uint32_t AntiAliasingEnable;
2937 #define CULLMODE_BOTH 0
2938 #define CULLMODE_NONE 1
2939 #define CULLMODE_FRONT 2
2940 #define CULLMODE_BACK 3
2941 uint32_t CullMode;
2942 uint32_t LineWidth;
2943 uint32_t LineEndCapAntialiasingRegionWidth;
2944 uint32_t ScissorRectangleEnable;
2945 uint32_t MultisampleRasterizationMode;
2946 uint32_t LastPixelEnable;
2947 #define Vertex0 0
2948 #define Vertex1 1
2949 #define Vertex2 2
2950 uint32_t TriangleStripListProvokingVertexSelect;
2951 uint32_t LineStripListProvokingVertexSelect;
2952 #define Vertex0 0
2953 #define Vertex1 1
2954 #define Vertex2 2
2955 uint32_t TriangleFanProvokingVertexSelect;
2956 #define AALINEDISTANCE_TRUE 1
2957 uint32_t AALineDistanceMode;
2958 uint32_t VertexSubPixelPrecisionSelect;
2959 uint32_t UsePointWidthState;
2960 uint32_t PointWidth;
2961 uint32_t GlobalDepthOffsetConstant;
2962 uint32_t GlobalDepthOffsetScale;
2963 uint32_t GlobalDepthOffsetClamp;
2964 };
2965
2966 static inline void
2967 GEN7_3DSTATE_SF_pack(__gen_user_data *data, void * restrict dst,
2968 const struct GEN7_3DSTATE_SF * restrict values)
2969 {
2970 uint32_t *dw = (uint32_t * restrict) dst;
2971
2972 dw[0] =
2973 __gen_field(values->CommandType, 29, 31) |
2974 __gen_field(values->CommandSubType, 27, 28) |
2975 __gen_field(values->_3DCommandOpcode, 24, 26) |
2976 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2977 __gen_field(values->DwordLength, 0, 7) |
2978 0;
2979
2980 dw[1] =
2981 __gen_field(values->DepthBufferSurfaceFormat, 12, 14) |
2982 __gen_field(values->LegacyGlobalDepthBiasEnable, 11, 11) |
2983 __gen_field(values->StatisticsEnable, 10, 10) |
2984 __gen_field(values->GlobalDepthOffsetEnableSolid, 9, 9) |
2985 __gen_field(values->GlobalDepthOffsetEnableWireframe, 8, 8) |
2986 __gen_field(values->GlobalDepthOffsetEnablePoint, 7, 7) |
2987 __gen_field(values->FrontFaceFillMode, 5, 6) |
2988 __gen_field(values->BackFaceFillMode, 3, 4) |
2989 __gen_field(values->ViewTransformEnable, 1, 1) |
2990 __gen_field(values->FrontWinding, 0, 0) |
2991 0;
2992
2993 dw[2] =
2994 __gen_field(values->AntiAliasingEnable, 31, 31) |
2995 __gen_field(values->CullMode, 29, 30) |
2996 __gen_field(values->LineWidth, 18, 27) |
2997 __gen_field(values->LineEndCapAntialiasingRegionWidth, 16, 17) |
2998 __gen_field(values->ScissorRectangleEnable, 11, 11) |
2999 __gen_field(values->MultisampleRasterizationMode, 8, 9) |
3000 0;
3001
3002 dw[3] =
3003 __gen_field(values->LastPixelEnable, 31, 31) |
3004 __gen_field(values->TriangleStripListProvokingVertexSelect, 29, 30) |
3005 __gen_field(values->LineStripListProvokingVertexSelect, 27, 28) |
3006 __gen_field(values->TriangleFanProvokingVertexSelect, 25, 26) |
3007 __gen_field(values->AALineDistanceMode, 14, 14) |
3008 __gen_field(values->VertexSubPixelPrecisionSelect, 12, 12) |
3009 __gen_field(values->UsePointWidthState, 11, 11) |
3010 __gen_field(values->PointWidth, 0, 10) |
3011 0;
3012
3013 dw[4] =
3014 __gen_field(values->GlobalDepthOffsetConstant, 0, 31) |
3015 0;
3016
3017 dw[5] =
3018 __gen_field(values->GlobalDepthOffsetScale, 0, 31) |
3019 0;
3020
3021 dw[6] =
3022 __gen_field(values->GlobalDepthOffsetClamp, 0, 31) |
3023 0;
3024
3025 }
3026
3027 #define GEN7_3DSTATE_SO_BUFFER_length 0x00000004
3028 #define GEN7_3DSTATE_SO_BUFFER_length_bias 0x00000002
3029 #define GEN7_3DSTATE_SO_BUFFER_header \
3030 .CommandType = 3, \
3031 .CommandSubType = 3, \
3032 ._3DCommandOpcode = 1, \
3033 ._3DCommandSubOpcode = 24, \
3034 .DwordLength = 2
3035
3036 struct GEN7_3DSTATE_SO_BUFFER {
3037 uint32_t CommandType;
3038 uint32_t CommandSubType;
3039 uint32_t _3DCommandOpcode;
3040 uint32_t _3DCommandSubOpcode;
3041 uint32_t DwordLength;
3042 uint32_t SOBufferIndex;
3043 uint32_t SOBufferObjectControlState;
3044 uint32_t SurfacePitch;
3045 __gen_address_type SurfaceBaseAddress;
3046 __gen_address_type SurfaceEndAddress;
3047 };
3048
3049 static inline void
3050 GEN7_3DSTATE_SO_BUFFER_pack(__gen_user_data *data, void * restrict dst,
3051 const struct GEN7_3DSTATE_SO_BUFFER * restrict values)
3052 {
3053 uint32_t *dw = (uint32_t * restrict) dst;
3054
3055 dw[0] =
3056 __gen_field(values->CommandType, 29, 31) |
3057 __gen_field(values->CommandSubType, 27, 28) |
3058 __gen_field(values->_3DCommandOpcode, 24, 26) |
3059 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3060 __gen_field(values->DwordLength, 0, 7) |
3061 0;
3062
3063 dw[1] =
3064 __gen_field(values->SOBufferIndex, 29, 30) |
3065 /* Struct SOBufferObjectControlState: found MEMORY_OBJECT_CONTROL_STATE */
3066 __gen_field(values->SurfacePitch, 0, 11) |
3067 0;
3068
3069 uint32_t dw2 =
3070 0;
3071
3072 dw[2] =
3073 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
3074
3075 uint32_t dw3 =
3076 0;
3077
3078 dw[3] =
3079 __gen_combine_address(data, &dw[3], values->SurfaceEndAddress, dw3);
3080
3081 }
3082
3083 #define GEN7_3DSTATE_SO_DECL_LIST_length_bias 0x00000002
3084 #define GEN7_3DSTATE_SO_DECL_LIST_header \
3085 .CommandType = 3, \
3086 .CommandSubType = 3, \
3087 ._3DCommandOpcode = 1, \
3088 ._3DCommandSubOpcode = 23
3089
3090 struct GEN7_3DSTATE_SO_DECL_LIST {
3091 uint32_t CommandType;
3092 uint32_t CommandSubType;
3093 uint32_t _3DCommandOpcode;
3094 uint32_t _3DCommandSubOpcode;
3095 uint32_t DwordLength;
3096 uint32_t StreamtoBufferSelects3;
3097 uint32_t StreamtoBufferSelects2;
3098 uint32_t StreamtoBufferSelects1;
3099 uint32_t StreamtoBufferSelects0;
3100 uint32_t NumEntries3;
3101 uint32_t NumEntries2;
3102 uint32_t NumEntries1;
3103 uint32_t NumEntries0;
3104 /* variable length fields follow */
3105 };
3106
3107 static inline void
3108 GEN7_3DSTATE_SO_DECL_LIST_pack(__gen_user_data *data, void * restrict dst,
3109 const struct GEN7_3DSTATE_SO_DECL_LIST * restrict values)
3110 {
3111 uint32_t *dw = (uint32_t * restrict) dst;
3112
3113 dw[0] =
3114 __gen_field(values->CommandType, 29, 31) |
3115 __gen_field(values->CommandSubType, 27, 28) |
3116 __gen_field(values->_3DCommandOpcode, 24, 26) |
3117 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3118 __gen_field(values->DwordLength, 0, 8) |
3119 0;
3120
3121 dw[1] =
3122 __gen_field(values->StreamtoBufferSelects3, 12, 15) |
3123 __gen_field(values->StreamtoBufferSelects2, 8, 11) |
3124 __gen_field(values->StreamtoBufferSelects1, 4, 7) |
3125 __gen_field(values->StreamtoBufferSelects0, 0, 3) |
3126 0;
3127
3128 dw[2] =
3129 __gen_field(values->NumEntries3, 24, 31) |
3130 __gen_field(values->NumEntries2, 16, 23) |
3131 __gen_field(values->NumEntries1, 8, 15) |
3132 __gen_field(values->NumEntries0, 0, 7) |
3133 0;
3134
3135 /* variable length fields follow */
3136 }
3137
3138 #define GEN7_3DSTATE_STENCIL_BUFFER_length 0x00000003
3139 #define GEN7_3DSTATE_STENCIL_BUFFER_length_bias 0x00000002
3140 #define GEN7_3DSTATE_STENCIL_BUFFER_header \
3141 .CommandType = 3, \
3142 .CommandSubType = 3, \
3143 ._3DCommandOpcode = 0, \
3144 ._3DCommandSubOpcode = 6, \
3145 .DwordLength = 1
3146
3147 struct GEN7_3DSTATE_STENCIL_BUFFER {
3148 uint32_t CommandType;
3149 uint32_t CommandSubType;
3150 uint32_t _3DCommandOpcode;
3151 uint32_t _3DCommandSubOpcode;
3152 uint32_t DwordLength;
3153 uint32_t StencilBufferObjectControlState;
3154 uint32_t SurfacePitch;
3155 __gen_address_type SurfaceBaseAddress;
3156 };
3157
3158 static inline void
3159 GEN7_3DSTATE_STENCIL_BUFFER_pack(__gen_user_data *data, void * restrict dst,
3160 const struct GEN7_3DSTATE_STENCIL_BUFFER * restrict values)
3161 {
3162 uint32_t *dw = (uint32_t * restrict) dst;
3163
3164 dw[0] =
3165 __gen_field(values->CommandType, 29, 31) |
3166 __gen_field(values->CommandSubType, 27, 28) |
3167 __gen_field(values->_3DCommandOpcode, 24, 26) |
3168 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3169 __gen_field(values->DwordLength, 0, 7) |
3170 0;
3171
3172 dw[1] =
3173 /* Struct StencilBufferObjectControlState: found MEMORY_OBJECT_CONTROL_STATE */
3174 __gen_field(values->SurfacePitch, 0, 16) |
3175 0;
3176
3177 uint32_t dw2 =
3178 0;
3179
3180 dw[2] =
3181 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
3182
3183 }
3184
3185 #define GEN7_3DSTATE_STREAMOUT_length 0x00000003
3186 #define GEN7_3DSTATE_STREAMOUT_length_bias 0x00000002
3187 #define GEN7_3DSTATE_STREAMOUT_header \
3188 .CommandType = 3, \
3189 .CommandSubType = 3, \
3190 ._3DCommandOpcode = 0, \
3191 ._3DCommandSubOpcode = 30, \
3192 .DwordLength = 1
3193
3194 struct GEN7_3DSTATE_STREAMOUT {
3195 uint32_t CommandType;
3196 uint32_t CommandSubType;
3197 uint32_t _3DCommandOpcode;
3198 uint32_t _3DCommandSubOpcode;
3199 uint32_t DwordLength;
3200 uint32_t SOFunctionEnable;
3201 uint32_t RenderingDisable;
3202 uint32_t RenderStreamSelect;
3203 #define LEADING 0
3204 #define TRAILING 1
3205 uint32_t ReorderMode;
3206 uint32_t SOStatisticsEnable;
3207 uint32_t SOBufferEnable3;
3208 uint32_t SOBufferEnable2;
3209 uint32_t SOBufferEnable1;
3210 uint32_t SOBufferEnable0;
3211 uint32_t Stream3VertexReadOffset;
3212 uint32_t Stream3VertexReadLength;
3213 uint32_t Stream2VertexReadOffset;
3214 uint32_t Stream2VertexReadLength;
3215 uint32_t Stream1VertexReadOffset;
3216 uint32_t Stream1VertexReadLength;
3217 uint32_t Stream0VertexReadOffset;
3218 uint32_t Stream0VertexReadLength;
3219 };
3220
3221 static inline void
3222 GEN7_3DSTATE_STREAMOUT_pack(__gen_user_data *data, void * restrict dst,
3223 const struct GEN7_3DSTATE_STREAMOUT * restrict values)
3224 {
3225 uint32_t *dw = (uint32_t * restrict) dst;
3226
3227 dw[0] =
3228 __gen_field(values->CommandType, 29, 31) |
3229 __gen_field(values->CommandSubType, 27, 28) |
3230 __gen_field(values->_3DCommandOpcode, 24, 26) |
3231 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3232 __gen_field(values->DwordLength, 0, 7) |
3233 0;
3234
3235 dw[1] =
3236 __gen_field(values->SOFunctionEnable, 31, 31) |
3237 __gen_field(values->RenderingDisable, 30, 30) |
3238 __gen_field(values->RenderStreamSelect, 27, 28) |
3239 __gen_field(values->ReorderMode, 26, 26) |
3240 __gen_field(values->SOStatisticsEnable, 25, 25) |
3241 __gen_field(values->SOBufferEnable3, 11, 11) |
3242 __gen_field(values->SOBufferEnable2, 10, 10) |
3243 __gen_field(values->SOBufferEnable1, 9, 9) |
3244 __gen_field(values->SOBufferEnable0, 8, 8) |
3245 0;
3246
3247 dw[2] =
3248 __gen_field(values->Stream3VertexReadOffset, 29, 29) |
3249 __gen_field(values->Stream3VertexReadLength, 24, 28) |
3250 __gen_field(values->Stream2VertexReadOffset, 21, 21) |
3251 __gen_field(values->Stream2VertexReadLength, 16, 20) |
3252 __gen_field(values->Stream1VertexReadOffset, 13, 13) |
3253 __gen_field(values->Stream1VertexReadLength, 8, 12) |
3254 __gen_field(values->Stream0VertexReadOffset, 5, 5) |
3255 __gen_field(values->Stream0VertexReadLength, 0, 4) |
3256 0;
3257
3258 }
3259
3260 #define GEN7_3DSTATE_TE_length 0x00000004
3261 #define GEN7_3DSTATE_TE_length_bias 0x00000002
3262 #define GEN7_3DSTATE_TE_header \
3263 .CommandType = 3, \
3264 .CommandSubType = 3, \
3265 ._3DCommandOpcode = 0, \
3266 ._3DCommandSubOpcode = 28, \
3267 .DwordLength = 2
3268
3269 struct GEN7_3DSTATE_TE {
3270 uint32_t CommandType;
3271 uint32_t CommandSubType;
3272 uint32_t _3DCommandOpcode;
3273 uint32_t _3DCommandSubOpcode;
3274 uint32_t DwordLength;
3275 #define INTEGER 0
3276 #define ODD_FRACTIONAL 1
3277 #define EVEN_FRACTIONAL 2
3278 uint32_t Partitioning;
3279 #define POINT 0
3280 #define LINE 1
3281 #define TRI_CW 2
3282 #define TRI_CCW 3
3283 uint32_t OutputTopology;
3284 #define QUAD 0
3285 #define TRI 1
3286 #define ISOLINE 2
3287 uint32_t TEDomain;
3288 #define HW_TESS 0
3289 #define SW_TESS 1
3290 uint32_t TEMode;
3291 uint32_t TEEnable;
3292 float MaximumTessellationFactorOdd;
3293 float MaximumTessellationFactorNotOdd;
3294 };
3295
3296 static inline void
3297 GEN7_3DSTATE_TE_pack(__gen_user_data *data, void * restrict dst,
3298 const struct GEN7_3DSTATE_TE * restrict values)
3299 {
3300 uint32_t *dw = (uint32_t * restrict) dst;
3301
3302 dw[0] =
3303 __gen_field(values->CommandType, 29, 31) |
3304 __gen_field(values->CommandSubType, 27, 28) |
3305 __gen_field(values->_3DCommandOpcode, 24, 26) |
3306 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3307 __gen_field(values->DwordLength, 0, 7) |
3308 0;
3309
3310 dw[1] =
3311 __gen_field(values->Partitioning, 12, 13) |
3312 __gen_field(values->OutputTopology, 8, 9) |
3313 __gen_field(values->TEDomain, 4, 5) |
3314 __gen_field(values->TEMode, 1, 2) |
3315 __gen_field(values->TEEnable, 0, 0) |
3316 0;
3317
3318 dw[2] =
3319 __gen_float(values->MaximumTessellationFactorOdd) |
3320 0;
3321
3322 dw[3] =
3323 __gen_float(values->MaximumTessellationFactorNotOdd) |
3324 0;
3325
3326 }
3327
3328 #define GEN7_3DSTATE_URB_DS_length 0x00000002
3329 #define GEN7_3DSTATE_URB_DS_length_bias 0x00000002
3330 #define GEN7_3DSTATE_URB_DS_header \
3331 .CommandType = 3, \
3332 .CommandSubType = 3, \
3333 ._3DCommandOpcode = 0, \
3334 ._3DCommandSubOpcode = 50, \
3335 .DwordLength = 0
3336
3337 struct GEN7_3DSTATE_URB_DS {
3338 uint32_t CommandType;
3339 uint32_t CommandSubType;
3340 uint32_t _3DCommandOpcode;
3341 uint32_t _3DCommandSubOpcode;
3342 uint32_t DwordLength;
3343 uint32_t DSURBStartingAddress;
3344 uint32_t DSURBEntryAllocationSize;
3345 uint32_t DSNumberofURBEntries;
3346 };
3347
3348 static inline void
3349 GEN7_3DSTATE_URB_DS_pack(__gen_user_data *data, void * restrict dst,
3350 const struct GEN7_3DSTATE_URB_DS * restrict values)
3351 {
3352 uint32_t *dw = (uint32_t * restrict) dst;
3353
3354 dw[0] =
3355 __gen_field(values->CommandType, 29, 31) |
3356 __gen_field(values->CommandSubType, 27, 28) |
3357 __gen_field(values->_3DCommandOpcode, 24, 26) |
3358 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3359 __gen_field(values->DwordLength, 0, 7) |
3360 0;
3361
3362 dw[1] =
3363 __gen_field(values->DSURBStartingAddress, 25, 29) |
3364 __gen_field(values->DSURBEntryAllocationSize, 16, 24) |
3365 __gen_field(values->DSNumberofURBEntries, 0, 15) |
3366 0;
3367
3368 }
3369
3370 #define GEN7_3DSTATE_URB_GS_length 0x00000002
3371 #define GEN7_3DSTATE_URB_GS_length_bias 0x00000002
3372 #define GEN7_3DSTATE_URB_GS_header \
3373 .CommandType = 3, \
3374 .CommandSubType = 3, \
3375 ._3DCommandOpcode = 0, \
3376 ._3DCommandSubOpcode = 51, \
3377 .DwordLength = 0
3378
3379 struct GEN7_3DSTATE_URB_GS {
3380 uint32_t CommandType;
3381 uint32_t CommandSubType;
3382 uint32_t _3DCommandOpcode;
3383 uint32_t _3DCommandSubOpcode;
3384 uint32_t DwordLength;
3385 uint32_t GSURBStartingAddress;
3386 uint32_t GSURBEntryAllocationSize;
3387 uint32_t GSNumberofURBEntries;
3388 };
3389
3390 static inline void
3391 GEN7_3DSTATE_URB_GS_pack(__gen_user_data *data, void * restrict dst,
3392 const struct GEN7_3DSTATE_URB_GS * restrict values)
3393 {
3394 uint32_t *dw = (uint32_t * restrict) dst;
3395
3396 dw[0] =
3397 __gen_field(values->CommandType, 29, 31) |
3398 __gen_field(values->CommandSubType, 27, 28) |
3399 __gen_field(values->_3DCommandOpcode, 24, 26) |
3400 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3401 __gen_field(values->DwordLength, 0, 7) |
3402 0;
3403
3404 dw[1] =
3405 __gen_field(values->GSURBStartingAddress, 25, 29) |
3406 __gen_field(values->GSURBEntryAllocationSize, 16, 24) |
3407 __gen_field(values->GSNumberofURBEntries, 0, 15) |
3408 0;
3409
3410 }
3411
3412 #define GEN7_3DSTATE_URB_HS_length 0x00000002
3413 #define GEN7_3DSTATE_URB_HS_length_bias 0x00000002
3414 #define GEN7_3DSTATE_URB_HS_header \
3415 .CommandType = 3, \
3416 .CommandSubType = 3, \
3417 ._3DCommandOpcode = 0, \
3418 ._3DCommandSubOpcode = 49, \
3419 .DwordLength = 0
3420
3421 struct GEN7_3DSTATE_URB_HS {
3422 uint32_t CommandType;
3423 uint32_t CommandSubType;
3424 uint32_t _3DCommandOpcode;
3425 uint32_t _3DCommandSubOpcode;
3426 uint32_t DwordLength;
3427 uint32_t HSURBStartingAddress;
3428 uint32_t HSURBEntryAllocationSize;
3429 uint32_t HSNumberofURBEntries;
3430 };
3431
3432 static inline void
3433 GEN7_3DSTATE_URB_HS_pack(__gen_user_data *data, void * restrict dst,
3434 const struct GEN7_3DSTATE_URB_HS * restrict values)
3435 {
3436 uint32_t *dw = (uint32_t * restrict) dst;
3437
3438 dw[0] =
3439 __gen_field(values->CommandType, 29, 31) |
3440 __gen_field(values->CommandSubType, 27, 28) |
3441 __gen_field(values->_3DCommandOpcode, 24, 26) |
3442 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3443 __gen_field(values->DwordLength, 0, 7) |
3444 0;
3445
3446 dw[1] =
3447 __gen_field(values->HSURBStartingAddress, 25, 29) |
3448 __gen_field(values->HSURBEntryAllocationSize, 16, 24) |
3449 __gen_field(values->HSNumberofURBEntries, 0, 15) |
3450 0;
3451
3452 }
3453
3454 #define GEN7_3DSTATE_VERTEX_BUFFERS_length_bias 0x00000002
3455 #define GEN7_3DSTATE_VERTEX_BUFFERS_header \
3456 .CommandType = 3, \
3457 .CommandSubType = 3, \
3458 ._3DCommandOpcode = 0, \
3459 ._3DCommandSubOpcode = 8
3460
3461 struct GEN7_3DSTATE_VERTEX_BUFFERS {
3462 uint32_t CommandType;
3463 uint32_t CommandSubType;
3464 uint32_t _3DCommandOpcode;
3465 uint32_t _3DCommandSubOpcode;
3466 uint32_t DwordLength;
3467 /* variable length fields follow */
3468 };
3469
3470 static inline void
3471 GEN7_3DSTATE_VERTEX_BUFFERS_pack(__gen_user_data *data, void * restrict dst,
3472 const struct GEN7_3DSTATE_VERTEX_BUFFERS * restrict values)
3473 {
3474 uint32_t *dw = (uint32_t * restrict) dst;
3475
3476 dw[0] =
3477 __gen_field(values->CommandType, 29, 31) |
3478 __gen_field(values->CommandSubType, 27, 28) |
3479 __gen_field(values->_3DCommandOpcode, 24, 26) |
3480 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3481 __gen_field(values->DwordLength, 0, 7) |
3482 0;
3483
3484 /* variable length fields follow */
3485 }
3486
3487 #define GEN7_3DSTATE_VERTEX_ELEMENTS_length_bias 0x00000002
3488 #define GEN7_3DSTATE_VERTEX_ELEMENTS_header \
3489 .CommandType = 3, \
3490 .CommandSubType = 3, \
3491 ._3DCommandOpcode = 0, \
3492 ._3DCommandSubOpcode = 9
3493
3494 struct GEN7_3DSTATE_VERTEX_ELEMENTS {
3495 uint32_t CommandType;
3496 uint32_t CommandSubType;
3497 uint32_t _3DCommandOpcode;
3498 uint32_t _3DCommandSubOpcode;
3499 uint32_t DwordLength;
3500 /* variable length fields follow */
3501 };
3502
3503 static inline void
3504 GEN7_3DSTATE_VERTEX_ELEMENTS_pack(__gen_user_data *data, void * restrict dst,
3505 const struct GEN7_3DSTATE_VERTEX_ELEMENTS * restrict values)
3506 {
3507 uint32_t *dw = (uint32_t * restrict) dst;
3508
3509 dw[0] =
3510 __gen_field(values->CommandType, 29, 31) |
3511 __gen_field(values->CommandSubType, 27, 28) |
3512 __gen_field(values->_3DCommandOpcode, 24, 26) |
3513 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3514 __gen_field(values->DwordLength, 0, 7) |
3515 0;
3516
3517 /* variable length fields follow */
3518 }
3519
3520 #define GEN7_3DSTATE_VF_STATISTICS_length 0x00000001
3521 #define GEN7_3DSTATE_VF_STATISTICS_length_bias 0x00000001
3522 #define GEN7_3DSTATE_VF_STATISTICS_header \
3523 .CommandType = 3, \
3524 .CommandSubType = 1, \
3525 ._3DCommandOpcode = 0, \
3526 ._3DCommandSubOpcode = 11
3527
3528 struct GEN7_3DSTATE_VF_STATISTICS {
3529 uint32_t CommandType;
3530 uint32_t CommandSubType;
3531 uint32_t _3DCommandOpcode;
3532 uint32_t _3DCommandSubOpcode;
3533 uint32_t StatisticsEnable;
3534 };
3535
3536 static inline void
3537 GEN7_3DSTATE_VF_STATISTICS_pack(__gen_user_data *data, void * restrict dst,
3538 const struct GEN7_3DSTATE_VF_STATISTICS * restrict values)
3539 {
3540 uint32_t *dw = (uint32_t * restrict) dst;
3541
3542 dw[0] =
3543 __gen_field(values->CommandType, 29, 31) |
3544 __gen_field(values->CommandSubType, 27, 28) |
3545 __gen_field(values->_3DCommandOpcode, 24, 26) |
3546 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3547 __gen_field(values->StatisticsEnable, 0, 0) |
3548 0;
3549
3550 }
3551
3552 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length 0x00000002
3553 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length_bias 0x00000002
3554 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_header\
3555 .CommandType = 3, \
3556 .CommandSubType = 3, \
3557 ._3DCommandOpcode = 0, \
3558 ._3DCommandSubOpcode = 35, \
3559 .DwordLength = 0
3560
3561 struct GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC {
3562 uint32_t CommandType;
3563 uint32_t CommandSubType;
3564 uint32_t _3DCommandOpcode;
3565 uint32_t _3DCommandSubOpcode;
3566 uint32_t DwordLength;
3567 uint32_t CCViewportPointer;
3568 };
3569
3570 static inline void
3571 GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_pack(__gen_user_data *data, void * restrict dst,
3572 const struct GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC * restrict values)
3573 {
3574 uint32_t *dw = (uint32_t * restrict) dst;
3575
3576 dw[0] =
3577 __gen_field(values->CommandType, 29, 31) |
3578 __gen_field(values->CommandSubType, 27, 28) |
3579 __gen_field(values->_3DCommandOpcode, 24, 26) |
3580 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3581 __gen_field(values->DwordLength, 0, 7) |
3582 0;
3583
3584 dw[1] =
3585 __gen_offset(values->CCViewportPointer, 5, 31) |
3586 0;
3587
3588 }
3589
3590 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length 0x00000002
3591 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length_bias 0x00000002
3592 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_header\
3593 .CommandType = 3, \
3594 .CommandSubType = 3, \
3595 ._3DCommandOpcode = 0, \
3596 ._3DCommandSubOpcode = 33, \
3597 .DwordLength = 0
3598
3599 struct GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP {
3600 uint32_t CommandType;
3601 uint32_t CommandSubType;
3602 uint32_t _3DCommandOpcode;
3603 uint32_t _3DCommandSubOpcode;
3604 uint32_t DwordLength;
3605 uint32_t SFClipViewportPointer;
3606 };
3607
3608 static inline void
3609 GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_pack(__gen_user_data *data, void * restrict dst,
3610 const struct GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP * restrict values)
3611 {
3612 uint32_t *dw = (uint32_t * restrict) dst;
3613
3614 dw[0] =
3615 __gen_field(values->CommandType, 29, 31) |
3616 __gen_field(values->CommandSubType, 27, 28) |
3617 __gen_field(values->_3DCommandOpcode, 24, 26) |
3618 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3619 __gen_field(values->DwordLength, 0, 7) |
3620 0;
3621
3622 dw[1] =
3623 __gen_offset(values->SFClipViewportPointer, 6, 31) |
3624 0;
3625
3626 }
3627
3628 #define GEN7_3DSTATE_VS_length 0x00000006
3629 #define GEN7_3DSTATE_VS_length_bias 0x00000002
3630 #define GEN7_3DSTATE_VS_header \
3631 .CommandType = 3, \
3632 .CommandSubType = 3, \
3633 ._3DCommandOpcode = 0, \
3634 ._3DCommandSubOpcode = 16, \
3635 .DwordLength = 4
3636
3637 struct GEN7_3DSTATE_VS {
3638 uint32_t CommandType;
3639 uint32_t CommandSubType;
3640 uint32_t _3DCommandOpcode;
3641 uint32_t _3DCommandSubOpcode;
3642 uint32_t DwordLength;
3643 uint32_t KernelStartPointer;
3644 #define Multiple 0
3645 #define Single 1
3646 uint32_t SingleVertexDispatch;
3647 #define Dmask 0
3648 #define Vmask 1
3649 uint32_t VectorMaskEnableVME;
3650 #define NoSamplers 0
3651 #define _14Samplers 1
3652 #define _58Samplers 2
3653 #define _912Samplers 3
3654 #define _1316Samplers 4
3655 uint32_t SamplerCount;
3656 uint32_t BindingTableEntryCount;
3657 #define IEEE754 0
3658 #define Alternate 1
3659 uint32_t FloatingPointMode;
3660 uint32_t IllegalOpcodeExceptionEnable;
3661 uint32_t SoftwareExceptionEnable;
3662 uint32_t ScratchSpaceBaseOffset;
3663 uint32_t PerThreadScratchSpace;
3664 uint32_t DispatchGRFStartRegisterforURBData;
3665 uint32_t VertexURBEntryReadLength;
3666 uint32_t VertexURBEntryReadOffset;
3667 uint32_t MaximumNumberofThreads;
3668 uint32_t StatisticsEnable;
3669 uint32_t VertexCacheDisable;
3670 uint32_t VSFunctionEnable;
3671 };
3672
3673 static inline void
3674 GEN7_3DSTATE_VS_pack(__gen_user_data *data, void * restrict dst,
3675 const struct GEN7_3DSTATE_VS * restrict values)
3676 {
3677 uint32_t *dw = (uint32_t * restrict) dst;
3678
3679 dw[0] =
3680 __gen_field(values->CommandType, 29, 31) |
3681 __gen_field(values->CommandSubType, 27, 28) |
3682 __gen_field(values->_3DCommandOpcode, 24, 26) |
3683 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3684 __gen_field(values->DwordLength, 0, 7) |
3685 0;
3686
3687 dw[1] =
3688 __gen_offset(values->KernelStartPointer, 6, 31) |
3689 0;
3690
3691 dw[2] =
3692 __gen_field(values->SingleVertexDispatch, 31, 31) |
3693 __gen_field(values->VectorMaskEnableVME, 30, 30) |
3694 __gen_field(values->SamplerCount, 27, 29) |
3695 __gen_field(values->BindingTableEntryCount, 18, 25) |
3696 __gen_field(values->FloatingPointMode, 16, 16) |
3697 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
3698 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
3699 0;
3700
3701 dw[3] =
3702 __gen_offset(values->ScratchSpaceBaseOffset, 10, 31) |
3703 __gen_field(values->PerThreadScratchSpace, 0, 3) |
3704 0;
3705
3706 dw[4] =
3707 __gen_field(values->DispatchGRFStartRegisterforURBData, 20, 24) |
3708 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
3709 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
3710 0;
3711
3712 dw[5] =
3713 __gen_field(values->MaximumNumberofThreads, 25, 31) |
3714 __gen_field(values->StatisticsEnable, 10, 10) |
3715 __gen_field(values->VertexCacheDisable, 1, 1) |
3716 __gen_field(values->VSFunctionEnable, 0, 0) |
3717 0;
3718
3719 }
3720
3721 #define GEN7_3DSTATE_WM_length 0x00000003
3722 #define GEN7_3DSTATE_WM_length_bias 0x00000002
3723 #define GEN7_3DSTATE_WM_header \
3724 .CommandType = 3, \
3725 .CommandSubType = 3, \
3726 ._3DCommandOpcode = 0, \
3727 ._3DCommandSubOpcode = 20, \
3728 .DwordLength = 1
3729
3730 struct GEN7_3DSTATE_WM {
3731 uint32_t CommandType;
3732 uint32_t CommandSubType;
3733 uint32_t _3DCommandOpcode;
3734 uint32_t _3DCommandSubOpcode;
3735 uint32_t DwordLength;
3736 uint32_t StatisticsEnable;
3737 uint32_t DepthBufferClear;
3738 uint32_t ThreadDispatchEnable;
3739 uint32_t DepthBufferResolveEnable;
3740 uint32_t HierarchicalDepthBufferResolveEnable;
3741 uint32_t LegacyDiamondLineRasterization;
3742 uint32_t PixelShaderKillPixel;
3743 #define PSCDEPTH_OFF 0
3744 #define PSCDEPTH_ON 1
3745 #define PSCDEPTH_ON_GE 2
3746 #define PSCDEPTH_ON_LE 3
3747 uint32_t PixelShaderComputedDepthMode;
3748 #define EDSC_NORMAL 0
3749 #define EDSC_PSEXEC 1
3750 #define EDSC_PREPS 2
3751 uint32_t EarlyDepthStencilControl;
3752 uint32_t PixelShaderUsesSourceDepth;
3753 uint32_t PixelShaderUsesSourceW;
3754 #define INTERP_PIXEL 0
3755 #define INTERP_CENTROID 2
3756 #define INTERP_SAMPLE 3
3757 uint32_t PositionZWInterpolationMode;
3758 uint32_t BarycentricInterpolationMode;
3759 uint32_t PixelShaderUsesInputCoverageMask;
3760 uint32_t LineEndCapAntialiasingRegionWidth;
3761 uint32_t LineAntialiasingRegionWidth;
3762 uint32_t PolygonStippleEnable;
3763 uint32_t LineStippleEnable;
3764 #define RASTRULE_UPPER_LEFT 0
3765 #define RASTRULE_UPPER_RIGHT 1
3766 uint32_t PointRasterizationRule;
3767 #define MSRASTMODE_OFF_PIXEL 0
3768 #define MSRASTMODE_OFF_PATTERN 1
3769 #define MSRASTMODE_ON_PIXEL 2
3770 #define MSRASTMODE_ON_PATTERN 3
3771 uint32_t MultisampleRasterizationMode;
3772 #define MSDISPMODE_PERSAMPLE 0
3773 #define MSDISPMODE_PERPIXEL 1
3774 uint32_t MultisampleDispatchMode;
3775 };
3776
3777 static inline void
3778 GEN7_3DSTATE_WM_pack(__gen_user_data *data, void * restrict dst,
3779 const struct GEN7_3DSTATE_WM * restrict values)
3780 {
3781 uint32_t *dw = (uint32_t * restrict) dst;
3782
3783 dw[0] =
3784 __gen_field(values->CommandType, 29, 31) |
3785 __gen_field(values->CommandSubType, 27, 28) |
3786 __gen_field(values->_3DCommandOpcode, 24, 26) |
3787 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3788 __gen_field(values->DwordLength, 0, 7) |
3789 0;
3790
3791 dw[1] =
3792 __gen_field(values->StatisticsEnable, 31, 31) |
3793 __gen_field(values->DepthBufferClear, 30, 30) |
3794 __gen_field(values->ThreadDispatchEnable, 29, 29) |
3795 __gen_field(values->DepthBufferResolveEnable, 28, 28) |
3796 __gen_field(values->HierarchicalDepthBufferResolveEnable, 27, 27) |
3797 __gen_field(values->LegacyDiamondLineRasterization, 26, 26) |
3798 __gen_field(values->PixelShaderKillPixel, 25, 25) |
3799 __gen_field(values->PixelShaderComputedDepthMode, 23, 24) |
3800 __gen_field(values->EarlyDepthStencilControl, 21, 22) |
3801 __gen_field(values->PixelShaderUsesSourceDepth, 20, 20) |
3802 __gen_field(values->PixelShaderUsesSourceW, 19, 19) |
3803 __gen_field(values->PositionZWInterpolationMode, 17, 18) |
3804 __gen_field(values->BarycentricInterpolationMode, 11, 16) |
3805 __gen_field(values->PixelShaderUsesInputCoverageMask, 10, 10) |
3806 __gen_field(values->LineEndCapAntialiasingRegionWidth, 8, 9) |
3807 __gen_field(values->LineAntialiasingRegionWidth, 6, 7) |
3808 __gen_field(values->PolygonStippleEnable, 4, 4) |
3809 __gen_field(values->LineStippleEnable, 3, 3) |
3810 __gen_field(values->PointRasterizationRule, 2, 2) |
3811 __gen_field(values->MultisampleRasterizationMode, 0, 1) |
3812 0;
3813
3814 dw[2] =
3815 __gen_field(values->MultisampleDispatchMode, 31, 31) |
3816 0;
3817
3818 }
3819
3820 #define GEN7_GPGPU_OBJECT_length 0x00000008
3821 #define GEN7_GPGPU_OBJECT_length_bias 0x00000002
3822 #define GEN7_GPGPU_OBJECT_header \
3823 .CommandType = 3, \
3824 .Pipeline = 2, \
3825 .MediaCommandOpcode = 1, \
3826 .SubOpcode = 4, \
3827 .DwordLength = 6
3828
3829 struct GEN7_GPGPU_OBJECT {
3830 uint32_t CommandType;
3831 uint32_t Pipeline;
3832 uint32_t MediaCommandOpcode;
3833 uint32_t SubOpcode;
3834 uint32_t PredicateEnable;
3835 uint32_t DwordLength;
3836 uint32_t SharedLocalMemoryFixedOffset;
3837 uint32_t InterfaceDescriptorOffset;
3838 uint32_t SharedLocalMemoryOffset;
3839 uint32_t EndofThreadGroup;
3840 #define HalfSlice1 2
3841 #define HalfSlice0 1
3842 #define EitherHalfSlice 0
3843 uint32_t HalfSliceDestinationSelect;
3844 uint32_t IndirectDataLength;
3845 uint32_t IndirectDataStartAddress;
3846 uint32_t ThreadGroupIDX;
3847 uint32_t ThreadGroupIDY;
3848 uint32_t ThreadGroupIDZ;
3849 uint32_t ExecutionMask;
3850 };
3851
3852 static inline void
3853 GEN7_GPGPU_OBJECT_pack(__gen_user_data *data, void * restrict dst,
3854 const struct GEN7_GPGPU_OBJECT * restrict values)
3855 {
3856 uint32_t *dw = (uint32_t * restrict) dst;
3857
3858 dw[0] =
3859 __gen_field(values->CommandType, 29, 31) |
3860 __gen_field(values->Pipeline, 27, 28) |
3861 __gen_field(values->MediaCommandOpcode, 24, 26) |
3862 __gen_field(values->SubOpcode, 16, 23) |
3863 __gen_field(values->PredicateEnable, 8, 8) |
3864 __gen_field(values->DwordLength, 0, 7) |
3865 0;
3866
3867 dw[1] =
3868 __gen_field(values->SharedLocalMemoryFixedOffset, 7, 7) |
3869 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
3870 0;
3871
3872 dw[2] =
3873 __gen_field(values->SharedLocalMemoryOffset, 28, 31) |
3874 __gen_field(values->EndofThreadGroup, 24, 24) |
3875 __gen_field(values->HalfSliceDestinationSelect, 17, 18) |
3876 __gen_field(values->IndirectDataLength, 0, 16) |
3877 0;
3878
3879 dw[3] =
3880 __gen_offset(values->IndirectDataStartAddress, 0, 31) |
3881 0;
3882
3883 dw[4] =
3884 __gen_field(values->ThreadGroupIDX, 0, 31) |
3885 0;
3886
3887 dw[5] =
3888 __gen_field(values->ThreadGroupIDY, 0, 31) |
3889 0;
3890
3891 dw[6] =
3892 __gen_field(values->ThreadGroupIDZ, 0, 31) |
3893 0;
3894
3895 dw[7] =
3896 __gen_field(values->ExecutionMask, 0, 31) |
3897 0;
3898
3899 }
3900
3901 #define GEN7_GPGPU_WALKER_length 0x0000000b
3902 #define GEN7_GPGPU_WALKER_length_bias 0x00000002
3903 #define GEN7_GPGPU_WALKER_header \
3904 .CommandType = 3, \
3905 .Pipeline = 2, \
3906 .MediaCommandOpcode = 1, \
3907 .SubOpcodeA = 5, \
3908 .DwordLength = 9
3909
3910 struct GEN7_GPGPU_WALKER {
3911 uint32_t CommandType;
3912 uint32_t Pipeline;
3913 uint32_t MediaCommandOpcode;
3914 uint32_t SubOpcodeA;
3915 uint32_t IndirectParameterEnable;
3916 uint32_t PredicateEnable;
3917 uint32_t DwordLength;
3918 uint32_t InterfaceDescriptorOffset;
3919 #define SIMD8 0
3920 #define SIMD16 1
3921 #define SIMD32 2
3922 uint32_t SIMDSize;
3923 uint32_t ThreadDepthCounterMaximum;
3924 uint32_t ThreadHeightCounterMaximum;
3925 uint32_t ThreadWidthCounterMaximum;
3926 uint32_t ThreadGroupIDStartingX;
3927 uint32_t ThreadGroupIDXDimension;
3928 uint32_t ThreadGroupIDStartingY;
3929 uint32_t ThreadGroupIDYDimension;
3930 uint32_t ThreadGroupIDStartingZ;
3931 uint32_t ThreadGroupIDZDimension;
3932 uint32_t RightExecutionMask;
3933 uint32_t BottomExecutionMask;
3934 };
3935
3936 static inline void
3937 GEN7_GPGPU_WALKER_pack(__gen_user_data *data, void * restrict dst,
3938 const struct GEN7_GPGPU_WALKER * restrict values)
3939 {
3940 uint32_t *dw = (uint32_t * restrict) dst;
3941
3942 dw[0] =
3943 __gen_field(values->CommandType, 29, 31) |
3944 __gen_field(values->Pipeline, 27, 28) |
3945 __gen_field(values->MediaCommandOpcode, 24, 26) |
3946 __gen_field(values->SubOpcodeA, 16, 23) |
3947 __gen_field(values->IndirectParameterEnable, 10, 10) |
3948 __gen_field(values->PredicateEnable, 8, 8) |
3949 __gen_field(values->DwordLength, 0, 7) |
3950 0;
3951
3952 dw[1] =
3953 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
3954 0;
3955
3956 dw[2] =
3957 __gen_field(values->SIMDSize, 30, 31) |
3958 __gen_field(values->ThreadDepthCounterMaximum, 16, 21) |
3959 __gen_field(values->ThreadHeightCounterMaximum, 8, 13) |
3960 __gen_field(values->ThreadWidthCounterMaximum, 0, 5) |
3961 0;
3962
3963 dw[3] =
3964 __gen_field(values->ThreadGroupIDStartingX, 0, 31) |
3965 0;
3966
3967 dw[4] =
3968 __gen_field(values->ThreadGroupIDXDimension, 0, 31) |
3969 0;
3970
3971 dw[5] =
3972 __gen_field(values->ThreadGroupIDStartingY, 0, 31) |
3973 0;
3974
3975 dw[6] =
3976 __gen_field(values->ThreadGroupIDYDimension, 0, 31) |
3977 0;
3978
3979 dw[7] =
3980 __gen_field(values->ThreadGroupIDStartingZ, 0, 31) |
3981 0;
3982
3983 dw[8] =
3984 __gen_field(values->ThreadGroupIDZDimension, 0, 31) |
3985 0;
3986
3987 dw[9] =
3988 __gen_field(values->RightExecutionMask, 0, 31) |
3989 0;
3990
3991 dw[10] =
3992 __gen_field(values->BottomExecutionMask, 0, 31) |
3993 0;
3994
3995 }
3996
3997 #define GEN7_MEDIA_CURBE_LOAD_length 0x00000004
3998 #define GEN7_MEDIA_CURBE_LOAD_length_bias 0x00000002
3999 #define GEN7_MEDIA_CURBE_LOAD_header \
4000 .CommandType = 3, \
4001 .Pipeline = 2, \
4002 .MediaCommandOpcode = 0, \
4003 .SubOpcode = 1, \
4004 .DwordLength = 2
4005
4006 struct GEN7_MEDIA_CURBE_LOAD {
4007 uint32_t CommandType;
4008 uint32_t Pipeline;
4009 uint32_t MediaCommandOpcode;
4010 uint32_t SubOpcode;
4011 uint32_t DwordLength;
4012 uint32_t CURBETotalDataLength;
4013 uint32_t CURBEDataStartAddress;
4014 };
4015
4016 static inline void
4017 GEN7_MEDIA_CURBE_LOAD_pack(__gen_user_data *data, void * restrict dst,
4018 const struct GEN7_MEDIA_CURBE_LOAD * restrict values)
4019 {
4020 uint32_t *dw = (uint32_t * restrict) dst;
4021
4022 dw[0] =
4023 __gen_field(values->CommandType, 29, 31) |
4024 __gen_field(values->Pipeline, 27, 28) |
4025 __gen_field(values->MediaCommandOpcode, 24, 26) |
4026 __gen_field(values->SubOpcode, 16, 23) |
4027 __gen_field(values->DwordLength, 0, 15) |
4028 0;
4029
4030 dw[1] =
4031 0;
4032
4033 dw[2] =
4034 __gen_field(values->CURBETotalDataLength, 0, 16) |
4035 0;
4036
4037 dw[3] =
4038 __gen_field(values->CURBEDataStartAddress, 0, 31) |
4039 0;
4040
4041 }
4042
4043 #define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 0x00000004
4044 #define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length_bias 0x00000002
4045 #define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_header\
4046 .CommandType = 3, \
4047 .Pipeline = 2, \
4048 .MediaCommandOpcode = 0, \
4049 .SubOpcode = 2, \
4050 .DwordLength = 2
4051
4052 struct GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD {
4053 uint32_t CommandType;
4054 uint32_t Pipeline;
4055 uint32_t MediaCommandOpcode;
4056 uint32_t SubOpcode;
4057 uint32_t DwordLength;
4058 uint32_t InterfaceDescriptorTotalLength;
4059 uint32_t InterfaceDescriptorDataStartAddress;
4060 };
4061
4062 static inline void
4063 GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_pack(__gen_user_data *data, void * restrict dst,
4064 const struct GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD * restrict values)
4065 {
4066 uint32_t *dw = (uint32_t * restrict) dst;
4067
4068 dw[0] =
4069 __gen_field(values->CommandType, 29, 31) |
4070 __gen_field(values->Pipeline, 27, 28) |
4071 __gen_field(values->MediaCommandOpcode, 24, 26) |
4072 __gen_field(values->SubOpcode, 16, 23) |
4073 __gen_field(values->DwordLength, 0, 15) |
4074 0;
4075
4076 dw[1] =
4077 0;
4078
4079 dw[2] =
4080 __gen_field(values->InterfaceDescriptorTotalLength, 0, 16) |
4081 0;
4082
4083 dw[3] =
4084 __gen_offset(values->InterfaceDescriptorDataStartAddress, 0, 31) |
4085 0;
4086
4087 }
4088
4089 #define GEN7_MEDIA_OBJECT_length_bias 0x00000002
4090 #define GEN7_MEDIA_OBJECT_header \
4091 .CommandType = 3, \
4092 .MediaCommandPipeline = 2, \
4093 .MediaCommandOpcode = 1, \
4094 .MediaCommandSubOpcode = 0
4095
4096 struct GEN7_MEDIA_OBJECT {
4097 uint32_t CommandType;
4098 uint32_t MediaCommandPipeline;
4099 uint32_t MediaCommandOpcode;
4100 uint32_t MediaCommandSubOpcode;
4101 uint32_t DwordLength;
4102 uint32_t InterfaceDescriptorOffset;
4103 uint32_t ChildrenPresent;
4104 #define Nothreadsynchronization 0
4105 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
4106 uint32_t ThreadSynchronization;
4107 #define Notusingscoreboard 0
4108 #define Usingscoreboard 1
4109 uint32_t UseScoreboard;
4110 #define HalfSlice1 2
4111 #define HalfSlice0 1
4112 #define Eitherhalfslice 0
4113 uint32_t HalfSliceDestinationSelect;
4114 uint32_t IndirectDataLength;
4115 __gen_address_type IndirectDataStartAddress;
4116 uint32_t ScoredboardY;
4117 uint32_t ScoreboardX;
4118 uint32_t ScoreboardColor;
4119 uint32_t ScoreboardMask;
4120 /* variable length fields follow */
4121 };
4122
4123 static inline void
4124 GEN7_MEDIA_OBJECT_pack(__gen_user_data *data, void * restrict dst,
4125 const struct GEN7_MEDIA_OBJECT * restrict values)
4126 {
4127 uint32_t *dw = (uint32_t * restrict) dst;
4128
4129 dw[0] =
4130 __gen_field(values->CommandType, 29, 31) |
4131 __gen_field(values->MediaCommandPipeline, 27, 28) |
4132 __gen_field(values->MediaCommandOpcode, 24, 26) |
4133 __gen_field(values->MediaCommandSubOpcode, 16, 23) |
4134 __gen_field(values->DwordLength, 0, 15) |
4135 0;
4136
4137 dw[1] =
4138 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
4139 0;
4140
4141 dw[2] =
4142 __gen_field(values->ChildrenPresent, 31, 31) |
4143 __gen_field(values->ThreadSynchronization, 24, 24) |
4144 __gen_field(values->UseScoreboard, 21, 21) |
4145 __gen_field(values->HalfSliceDestinationSelect, 17, 18) |
4146 __gen_field(values->IndirectDataLength, 0, 16) |
4147 0;
4148
4149 uint32_t dw3 =
4150 0;
4151
4152 dw[3] =
4153 __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, dw3);
4154
4155 dw[4] =
4156 __gen_field(values->ScoredboardY, 16, 24) |
4157 __gen_field(values->ScoreboardX, 0, 8) |
4158 0;
4159
4160 dw[5] =
4161 __gen_field(values->ScoreboardColor, 16, 19) |
4162 __gen_field(values->ScoreboardMask, 0, 7) |
4163 0;
4164
4165 /* variable length fields follow */
4166 }
4167
4168 #define GEN7_MEDIA_OBJECT_PRT_length 0x00000010
4169 #define GEN7_MEDIA_OBJECT_PRT_length_bias 0x00000002
4170 #define GEN7_MEDIA_OBJECT_PRT_header \
4171 .CommandType = 3, \
4172 .Pipeline = 2, \
4173 .MediaCommandOpcode = 1, \
4174 .SubOpcode = 2, \
4175 .DwordLength = 14
4176
4177 struct GEN7_MEDIA_OBJECT_PRT {
4178 uint32_t CommandType;
4179 uint32_t Pipeline;
4180 uint32_t MediaCommandOpcode;
4181 uint32_t SubOpcode;
4182 uint32_t DwordLength;
4183 uint32_t InterfaceDescriptorOffset;
4184 uint32_t ChildrenPresent;
4185 uint32_t PRT_FenceNeeded;
4186 #define Rootthreadqueue 0
4187 #define VFEstateflush 1
4188 uint32_t PRT_FenceType;
4189 uint32_t InlineData;
4190 };
4191
4192 static inline void
4193 GEN7_MEDIA_OBJECT_PRT_pack(__gen_user_data *data, void * restrict dst,
4194 const struct GEN7_MEDIA_OBJECT_PRT * restrict values)
4195 {
4196 uint32_t *dw = (uint32_t * restrict) dst;
4197
4198 dw[0] =
4199 __gen_field(values->CommandType, 29, 31) |
4200 __gen_field(values->Pipeline, 27, 28) |
4201 __gen_field(values->MediaCommandOpcode, 24, 26) |
4202 __gen_field(values->SubOpcode, 16, 23) |
4203 __gen_field(values->DwordLength, 0, 15) |
4204 0;
4205
4206 dw[1] =
4207 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
4208 0;
4209
4210 dw[2] =
4211 __gen_field(values->ChildrenPresent, 31, 31) |
4212 __gen_field(values->PRT_FenceNeeded, 23, 23) |
4213 __gen_field(values->PRT_FenceType, 22, 22) |
4214 0;
4215
4216 dw[3] =
4217 0;
4218
4219 dw[4] =
4220 __gen_field(values->InlineData, 0, 31) |
4221 0;
4222
4223 }
4224
4225 #define GEN7_MEDIA_OBJECT_WALKER_length_bias 0x00000002
4226 #define GEN7_MEDIA_OBJECT_WALKER_header \
4227 .CommandType = 3, \
4228 .Pipeline = 2, \
4229 .MediaCommandOpcode = 1, \
4230 .SubOpcode = 3
4231
4232 struct GEN7_MEDIA_OBJECT_WALKER {
4233 uint32_t CommandType;
4234 uint32_t Pipeline;
4235 uint32_t MediaCommandOpcode;
4236 uint32_t SubOpcode;
4237 uint32_t DwordLength;
4238 uint32_t InterfaceDescriptorOffset;
4239 uint32_t ChildrenPresent;
4240 #define Nothreadsynchronization 0
4241 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
4242 uint32_t ThreadSynchronization;
4243 #define Notusingscoreboard 0
4244 #define Usingscoreboard 1
4245 uint32_t UseScoreboard;
4246 uint32_t IndirectDataLength;
4247 uint32_t IndirectDataStartAddress;
4248 uint32_t ScoreboardMask;
4249 uint32_t DualMode;
4250 uint32_t Repel;
4251 uint32_t ColorCountMinusOne;
4252 uint32_t MiddleLoopExtraSteps;
4253 uint32_t LocalMidLoopUnitY;
4254 uint32_t MidLoopUnitX;
4255 uint32_t GlobalLoopExecCount;
4256 uint32_t LocalLoopExecCount;
4257 uint32_t BlockResolutionY;
4258 uint32_t BlockResolutionX;
4259 uint32_t LocalStartY;
4260 uint32_t LocalStartX;
4261 uint32_t LocalEndY;
4262 uint32_t LocalEndX;
4263 uint32_t LocalOuterLoopStrideY;
4264 uint32_t LocalOuterLoopStrideX;
4265 uint32_t LocalInnerLoopUnitY;
4266 uint32_t LocalInnerLoopUnitX;
4267 uint32_t GlobalResolutionY;
4268 uint32_t GlobalResolutionX;
4269 uint32_t GlobalStartY;
4270 uint32_t GlobalStartX;
4271 uint32_t GlobalOuterLoopStrideY;
4272 uint32_t GlobalOuterLoopStrideX;
4273 uint32_t GlobalInnerLoopUnitY;
4274 uint32_t GlobalInnerLoopUnitX;
4275 /* variable length fields follow */
4276 };
4277
4278 static inline void
4279 GEN7_MEDIA_OBJECT_WALKER_pack(__gen_user_data *data, void * restrict dst,
4280 const struct GEN7_MEDIA_OBJECT_WALKER * restrict values)
4281 {
4282 uint32_t *dw = (uint32_t * restrict) dst;
4283
4284 dw[0] =
4285 __gen_field(values->CommandType, 29, 31) |
4286 __gen_field(values->Pipeline, 27, 28) |
4287 __gen_field(values->MediaCommandOpcode, 24, 26) |
4288 __gen_field(values->SubOpcode, 16, 23) |
4289 __gen_field(values->DwordLength, 0, 15) |
4290 0;
4291
4292 dw[1] =
4293 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
4294 0;
4295
4296 dw[2] =
4297 __gen_field(values->ChildrenPresent, 31, 31) |
4298 __gen_field(values->ThreadSynchronization, 24, 24) |
4299 __gen_field(values->UseScoreboard, 21, 21) |
4300 __gen_field(values->IndirectDataLength, 0, 16) |
4301 0;
4302
4303 dw[3] =
4304 __gen_offset(values->IndirectDataStartAddress, 0, 31) |
4305 0;
4306
4307 dw[4] =
4308 0;
4309
4310 dw[5] =
4311 __gen_field(values->ScoreboardMask, 0, 7) |
4312 0;
4313
4314 dw[6] =
4315 __gen_field(values->DualMode, 31, 31) |
4316 __gen_field(values->Repel, 30, 30) |
4317 __gen_field(values->ColorCountMinusOne, 24, 27) |
4318 __gen_field(values->MiddleLoopExtraSteps, 16, 20) |
4319 __gen_field(values->LocalMidLoopUnitY, 12, 13) |
4320 __gen_field(values->MidLoopUnitX, 8, 9) |
4321 0;
4322
4323 dw[7] =
4324 __gen_field(values->GlobalLoopExecCount, 16, 25) |
4325 __gen_field(values->LocalLoopExecCount, 0, 9) |
4326 0;
4327
4328 dw[8] =
4329 __gen_field(values->BlockResolutionY, 16, 24) |
4330 __gen_field(values->BlockResolutionX, 0, 8) |
4331 0;
4332
4333 dw[9] =
4334 __gen_field(values->LocalStartY, 16, 24) |
4335 __gen_field(values->LocalStartX, 0, 8) |
4336 0;
4337
4338 dw[10] =
4339 __gen_field(values->LocalEndY, 16, 24) |
4340 __gen_field(values->LocalEndX, 0, 8) |
4341 0;
4342
4343 dw[11] =
4344 __gen_field(values->LocalOuterLoopStrideY, 16, 25) |
4345 __gen_field(values->LocalOuterLoopStrideX, 0, 9) |
4346 0;
4347
4348 dw[12] =
4349 __gen_field(values->LocalInnerLoopUnitY, 16, 25) |
4350 __gen_field(values->LocalInnerLoopUnitX, 0, 9) |
4351 0;
4352
4353 dw[13] =
4354 __gen_field(values->GlobalResolutionY, 16, 24) |
4355 __gen_field(values->GlobalResolutionX, 0, 8) |
4356 0;
4357
4358 dw[14] =
4359 __gen_field(values->GlobalStartY, 16, 25) |
4360 __gen_field(values->GlobalStartX, 0, 9) |
4361 0;
4362
4363 dw[15] =
4364 __gen_field(values->GlobalOuterLoopStrideY, 16, 25) |
4365 __gen_field(values->GlobalOuterLoopStrideX, 0, 9) |
4366 0;
4367
4368 dw[16] =
4369 __gen_field(values->GlobalInnerLoopUnitY, 16, 25) |
4370 __gen_field(values->GlobalInnerLoopUnitX, 0, 9) |
4371 0;
4372
4373 /* variable length fields follow */
4374 }
4375
4376 #define GEN7_MEDIA_STATE_FLUSH_length 0x00000002
4377 #define GEN7_MEDIA_STATE_FLUSH_length_bias 0x00000002
4378 #define GEN7_MEDIA_STATE_FLUSH_header \
4379 .CommandType = 3, \
4380 .Pipeline = 2, \
4381 .MediaCommandOpcode = 0, \
4382 .SubOpcode = 4, \
4383 .DwordLength = 0
4384
4385 struct GEN7_MEDIA_STATE_FLUSH {
4386 uint32_t CommandType;
4387 uint32_t Pipeline;
4388 uint32_t MediaCommandOpcode;
4389 uint32_t SubOpcode;
4390 uint32_t DwordLength;
4391 uint32_t WatermarkRequired;
4392 uint32_t InterfaceDescriptorOffset;
4393 };
4394
4395 static inline void
4396 GEN7_MEDIA_STATE_FLUSH_pack(__gen_user_data *data, void * restrict dst,
4397 const struct GEN7_MEDIA_STATE_FLUSH * restrict values)
4398 {
4399 uint32_t *dw = (uint32_t * restrict) dst;
4400
4401 dw[0] =
4402 __gen_field(values->CommandType, 29, 31) |
4403 __gen_field(values->Pipeline, 27, 28) |
4404 __gen_field(values->MediaCommandOpcode, 24, 26) |
4405 __gen_field(values->SubOpcode, 16, 23) |
4406 __gen_field(values->DwordLength, 0, 15) |
4407 0;
4408
4409 dw[1] =
4410 __gen_field(values->WatermarkRequired, 6, 6) |
4411 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
4412 0;
4413
4414 }
4415
4416 #define GEN7_MEDIA_VFE_STATE_length 0x00000008
4417 #define GEN7_MEDIA_VFE_STATE_length_bias 0x00000002
4418 #define GEN7_MEDIA_VFE_STATE_header \
4419 .CommandType = 3, \
4420 .Pipeline = 2, \
4421 .MediaCommandOpcode = 0, \
4422 .SubOpcode = 0, \
4423 .DwordLength = 6
4424
4425 struct GEN7_MEDIA_VFE_STATE {
4426 uint32_t CommandType;
4427 uint32_t Pipeline;
4428 uint32_t MediaCommandOpcode;
4429 uint32_t SubOpcode;
4430 uint32_t DwordLength;
4431 uint32_t ScratchSpaceBasePointer;
4432 uint32_t PerThreadScratchSpace;
4433 uint32_t MaximumNumberofThreads;
4434 uint32_t NumberofURBEntries;
4435 #define Maintainingtheexistingtimestampstate 0
4436 #define Resettingrelativetimerandlatchingtheglobaltimestamp 1
4437 uint32_t ResetGatewayTimer;
4438 #define MaintainingOpenGatewayForwardMsgCloseGatewayprotocollegacymode 0
4439 #define BypassingOpenGatewayCloseGatewayprotocol 1
4440 uint32_t BypassGatewayControl;
4441 #define NoMMIOreadwriteallowed 0
4442 #define MMIOreadwritetoanyaddress 2
4443 uint32_t GatewayMMIOAccessControl;
4444 uint32_t GPGPUMode;
4445 uint32_t URBEntryAllocationSize;
4446 uint32_t CURBEAllocationSize;
4447 #define Scoreboarddisabled 0
4448 #define Scoreboardenabled 1
4449 uint32_t ScoreboardEnable;
4450 #define StallingScoreboard 0
4451 #define NonStallingScoreboard 1
4452 uint32_t ScoreboardType;
4453 uint32_t ScoreboardMask;
4454 uint32_t Scoreboard3DeltaY;
4455 uint32_t Scoreboard3DeltaX;
4456 uint32_t Scoreboard2DeltaY;
4457 uint32_t Scoreboard2DeltaX;
4458 uint32_t Scoreboard1DeltaY;
4459 uint32_t Scoreboard1DeltaX;
4460 uint32_t Scoreboard0DeltaY;
4461 uint32_t Scoreboard0DeltaX;
4462 uint32_t Scoreboard7DeltaY;
4463 uint32_t Scoreboard7DeltaX;
4464 uint32_t Scoreboard6DeltaY;
4465 uint32_t Scoreboard6DeltaX;
4466 uint32_t Scoreboard5DeltaY;
4467 uint32_t Scoreboard5DeltaX;
4468 uint32_t Scoreboard4DeltaY;
4469 uint32_t Scoreboard4DeltaX;
4470 };
4471
4472 static inline void
4473 GEN7_MEDIA_VFE_STATE_pack(__gen_user_data *data, void * restrict dst,
4474 const struct GEN7_MEDIA_VFE_STATE * restrict values)
4475 {
4476 uint32_t *dw = (uint32_t * restrict) dst;
4477
4478 dw[0] =
4479 __gen_field(values->CommandType, 29, 31) |
4480 __gen_field(values->Pipeline, 27, 28) |
4481 __gen_field(values->MediaCommandOpcode, 24, 26) |
4482 __gen_field(values->SubOpcode, 16, 23) |
4483 __gen_field(values->DwordLength, 0, 15) |
4484 0;
4485
4486 dw[1] =
4487 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
4488 __gen_field(values->PerThreadScratchSpace, 0, 3) |
4489 0;
4490
4491 dw[2] =
4492 __gen_field(values->MaximumNumberofThreads, 16, 31) |
4493 __gen_field(values->NumberofURBEntries, 8, 15) |
4494 __gen_field(values->ResetGatewayTimer, 7, 7) |
4495 __gen_field(values->BypassGatewayControl, 6, 6) |
4496 __gen_field(values->GatewayMMIOAccessControl, 3, 4) |
4497 __gen_field(values->GPGPUMode, 2, 2) |
4498 0;
4499
4500 dw[3] =
4501 0;
4502
4503 dw[4] =
4504 __gen_field(values->URBEntryAllocationSize, 16, 31) |
4505 __gen_field(values->CURBEAllocationSize, 0, 15) |
4506 0;
4507
4508 dw[5] =
4509 __gen_field(values->ScoreboardEnable, 31, 31) |
4510 __gen_field(values->ScoreboardType, 30, 30) |
4511 __gen_field(values->ScoreboardMask, 0, 7) |
4512 0;
4513
4514 dw[6] =
4515 __gen_field(values->Scoreboard3DeltaY, 28, 31) |
4516 __gen_field(values->Scoreboard3DeltaX, 24, 27) |
4517 __gen_field(values->Scoreboard2DeltaY, 20, 23) |
4518 __gen_field(values->Scoreboard2DeltaX, 16, 19) |
4519 __gen_field(values->Scoreboard1DeltaY, 12, 15) |
4520 __gen_field(values->Scoreboard1DeltaX, 8, 11) |
4521 __gen_field(values->Scoreboard0DeltaY, 4, 7) |
4522 __gen_field(values->Scoreboard0DeltaX, 0, 3) |
4523 0;
4524
4525 dw[7] =
4526 __gen_field(values->Scoreboard7DeltaY, 28, 31) |
4527 __gen_field(values->Scoreboard7DeltaX, 24, 27) |
4528 __gen_field(values->Scoreboard6DeltaY, 20, 23) |
4529 __gen_field(values->Scoreboard6DeltaX, 16, 19) |
4530 __gen_field(values->Scoreboard5DeltaY, 12, 15) |
4531 __gen_field(values->Scoreboard5DeltaX, 8, 11) |
4532 __gen_field(values->Scoreboard4DeltaY, 4, 7) |
4533 __gen_field(values->Scoreboard4DeltaX, 0, 3) |
4534 0;
4535
4536 }
4537
4538 #define GEN7_MI_ARB_CHECK_length 0x00000001
4539 #define GEN7_MI_ARB_CHECK_length_bias 0x00000001
4540 #define GEN7_MI_ARB_CHECK_header \
4541 .CommandType = 0, \
4542 .MICommandOpcode = 5
4543
4544 struct GEN7_MI_ARB_CHECK {
4545 uint32_t CommandType;
4546 uint32_t MICommandOpcode;
4547 };
4548
4549 static inline void
4550 GEN7_MI_ARB_CHECK_pack(__gen_user_data *data, void * restrict dst,
4551 const struct GEN7_MI_ARB_CHECK * restrict values)
4552 {
4553 uint32_t *dw = (uint32_t * restrict) dst;
4554
4555 dw[0] =
4556 __gen_field(values->CommandType, 29, 31) |
4557 __gen_field(values->MICommandOpcode, 23, 28) |
4558 0;
4559
4560 }
4561
4562 #define GEN7_MI_ARB_ON_OFF_length 0x00000001
4563 #define GEN7_MI_ARB_ON_OFF_length_bias 0x00000001
4564 #define GEN7_MI_ARB_ON_OFF_header \
4565 .CommandType = 0, \
4566 .MICommandOpcode = 8
4567
4568 struct GEN7_MI_ARB_ON_OFF {
4569 uint32_t CommandType;
4570 uint32_t MICommandOpcode;
4571 uint32_t ArbitrationEnable;
4572 };
4573
4574 static inline void
4575 GEN7_MI_ARB_ON_OFF_pack(__gen_user_data *data, void * restrict dst,
4576 const struct GEN7_MI_ARB_ON_OFF * restrict values)
4577 {
4578 uint32_t *dw = (uint32_t * restrict) dst;
4579
4580 dw[0] =
4581 __gen_field(values->CommandType, 29, 31) |
4582 __gen_field(values->MICommandOpcode, 23, 28) |
4583 __gen_field(values->ArbitrationEnable, 0, 0) |
4584 0;
4585
4586 }
4587
4588 #define GEN7_MI_BATCH_BUFFER_END_length 0x00000001
4589 #define GEN7_MI_BATCH_BUFFER_END_length_bias 0x00000001
4590 #define GEN7_MI_BATCH_BUFFER_END_header \
4591 .CommandType = 0, \
4592 .MICommandOpcode = 10
4593
4594 struct GEN7_MI_BATCH_BUFFER_END {
4595 uint32_t CommandType;
4596 uint32_t MICommandOpcode;
4597 };
4598
4599 static inline void
4600 GEN7_MI_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
4601 const struct GEN7_MI_BATCH_BUFFER_END * restrict values)
4602 {
4603 uint32_t *dw = (uint32_t * restrict) dst;
4604
4605 dw[0] =
4606 __gen_field(values->CommandType, 29, 31) |
4607 __gen_field(values->MICommandOpcode, 23, 28) |
4608 0;
4609
4610 }
4611
4612 #define GEN7_MI_BATCH_BUFFER_START_length 0x00000002
4613 #define GEN7_MI_BATCH_BUFFER_START_length_bias 0x00000002
4614 #define GEN7_MI_BATCH_BUFFER_START_header \
4615 .CommandType = 0, \
4616 .MICommandOpcode = 49, \
4617 .DwordLength = 0
4618
4619 struct GEN7_MI_BATCH_BUFFER_START {
4620 uint32_t CommandType;
4621 uint32_t MICommandOpcode;
4622 uint32_t ClearCommandBufferEnable;
4623 #define ASI_GGTT 0
4624 #define ASI_PPGTT 1
4625 uint32_t AddressSpaceIndicator;
4626 uint32_t DwordLength;
4627 __gen_address_type BatchBufferStartAddress;
4628 };
4629
4630 static inline void
4631 GEN7_MI_BATCH_BUFFER_START_pack(__gen_user_data *data, void * restrict dst,
4632 const struct GEN7_MI_BATCH_BUFFER_START * restrict values)
4633 {
4634 uint32_t *dw = (uint32_t * restrict) dst;
4635
4636 dw[0] =
4637 __gen_field(values->CommandType, 29, 31) |
4638 __gen_field(values->MICommandOpcode, 23, 28) |
4639 __gen_field(values->ClearCommandBufferEnable, 11, 11) |
4640 __gen_field(values->AddressSpaceIndicator, 8, 8) |
4641 __gen_field(values->DwordLength, 0, 7) |
4642 0;
4643
4644 uint32_t dw1 =
4645 0;
4646
4647 dw[1] =
4648 __gen_combine_address(data, &dw[1], values->BatchBufferStartAddress, dw1);
4649
4650 }
4651
4652 #define GEN7_MI_CLFLUSH_length_bias 0x00000002
4653 #define GEN7_MI_CLFLUSH_header \
4654 .CommandType = 0, \
4655 .MICommandOpcode = 39
4656
4657 struct GEN7_MI_CLFLUSH {
4658 uint32_t CommandType;
4659 uint32_t MICommandOpcode;
4660 #define PerProcessGraphicsAddress 0
4661 #define GlobalGraphicsAddress 1
4662 uint32_t UseGlobalGTT;
4663 uint32_t DwordLength;
4664 __gen_address_type PageBaseAddress;
4665 uint32_t StartingCachelineOffset;
4666 __gen_address_type PageBaseAddressHigh;
4667 /* variable length fields follow */
4668 };
4669
4670 static inline void
4671 GEN7_MI_CLFLUSH_pack(__gen_user_data *data, void * restrict dst,
4672 const struct GEN7_MI_CLFLUSH * restrict values)
4673 {
4674 uint32_t *dw = (uint32_t * restrict) dst;
4675
4676 dw[0] =
4677 __gen_field(values->CommandType, 29, 31) |
4678 __gen_field(values->MICommandOpcode, 23, 28) |
4679 __gen_field(values->UseGlobalGTT, 22, 22) |
4680 __gen_field(values->DwordLength, 0, 9) |
4681 0;
4682
4683 uint32_t dw1 =
4684 __gen_field(values->StartingCachelineOffset, 6, 11) |
4685 0;
4686
4687 dw[1] =
4688 __gen_combine_address(data, &dw[1], values->PageBaseAddress, dw1);
4689
4690 uint32_t dw2 =
4691 0;
4692
4693 dw[2] =
4694 __gen_combine_address(data, &dw[2], values->PageBaseAddressHigh, dw2);
4695
4696 /* variable length fields follow */
4697 }
4698
4699 #define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_length 0x00000002
4700 #define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_length_bias 0x00000002
4701 #define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_header\
4702 .CommandType = 0, \
4703 .MICommandOpcode = 54, \
4704 .UseGlobalGTT = 0, \
4705 .CompareSemaphore = 0, \
4706 .DwordLength = 0
4707
4708 struct GEN7_MI_CONDITIONAL_BATCH_BUFFER_END {
4709 uint32_t CommandType;
4710 uint32_t MICommandOpcode;
4711 uint32_t UseGlobalGTT;
4712 uint32_t CompareSemaphore;
4713 uint32_t DwordLength;
4714 uint32_t CompareDataDword;
4715 __gen_address_type CompareAddress;
4716 };
4717
4718 static inline void
4719 GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
4720 const struct GEN7_MI_CONDITIONAL_BATCH_BUFFER_END * restrict values)
4721 {
4722 uint32_t *dw = (uint32_t * restrict) dst;
4723
4724 dw[0] =
4725 __gen_field(values->CommandType, 29, 31) |
4726 __gen_field(values->MICommandOpcode, 23, 28) |
4727 __gen_field(values->UseGlobalGTT, 22, 22) |
4728 __gen_field(values->CompareSemaphore, 21, 21) |
4729 __gen_field(values->DwordLength, 0, 7) |
4730 0;
4731
4732 dw[1] =
4733 __gen_field(values->CompareDataDword, 0, 31) |
4734 0;
4735
4736 uint32_t dw2 =
4737 0;
4738
4739 dw[2] =
4740 __gen_combine_address(data, &dw[2], values->CompareAddress, dw2);
4741
4742 }
4743
4744 #define GEN7_MI_FLUSH_length 0x00000001
4745 #define GEN7_MI_FLUSH_length_bias 0x00000001
4746 #define GEN7_MI_FLUSH_header \
4747 .CommandType = 0, \
4748 .MICommandOpcode = 4
4749
4750 struct GEN7_MI_FLUSH {
4751 uint32_t CommandType;
4752 uint32_t MICommandOpcode;
4753 uint32_t IndirectStatePointersDisable;
4754 uint32_t GenericMediaStateClear;
4755 #define DontReset 0
4756 #define Reset 1
4757 uint32_t GlobalSnapshotCountReset;
4758 #define Flush 0
4759 #define DontFlush 1
4760 uint32_t RenderCacheFlushInhibit;
4761 #define DontInvalidate 0
4762 #define Invalidate 1
4763 uint32_t StateInstructionCacheInvalidate;
4764 };
4765
4766 static inline void
4767 GEN7_MI_FLUSH_pack(__gen_user_data *data, void * restrict dst,
4768 const struct GEN7_MI_FLUSH * restrict values)
4769 {
4770 uint32_t *dw = (uint32_t * restrict) dst;
4771
4772 dw[0] =
4773 __gen_field(values->CommandType, 29, 31) |
4774 __gen_field(values->MICommandOpcode, 23, 28) |
4775 __gen_field(values->IndirectStatePointersDisable, 5, 5) |
4776 __gen_field(values->GenericMediaStateClear, 4, 4) |
4777 __gen_field(values->GlobalSnapshotCountReset, 3, 3) |
4778 __gen_field(values->RenderCacheFlushInhibit, 2, 2) |
4779 __gen_field(values->StateInstructionCacheInvalidate, 1, 1) |
4780 0;
4781
4782 }
4783
4784 #define GEN7_MI_LOAD_REGISTER_IMM_length 0x00000003
4785 #define GEN7_MI_LOAD_REGISTER_IMM_length_bias 0x00000002
4786 #define GEN7_MI_LOAD_REGISTER_IMM_header \
4787 .CommandType = 0, \
4788 .MICommandOpcode = 34, \
4789 .DwordLength = 1
4790
4791 struct GEN7_MI_LOAD_REGISTER_IMM {
4792 uint32_t CommandType;
4793 uint32_t MICommandOpcode;
4794 uint32_t ByteWriteDisables;
4795 uint32_t DwordLength;
4796 uint32_t RegisterOffset;
4797 uint32_t DataDWord;
4798 };
4799
4800 static inline void
4801 GEN7_MI_LOAD_REGISTER_IMM_pack(__gen_user_data *data, void * restrict dst,
4802 const struct GEN7_MI_LOAD_REGISTER_IMM * restrict values)
4803 {
4804 uint32_t *dw = (uint32_t * restrict) dst;
4805
4806 dw[0] =
4807 __gen_field(values->CommandType, 29, 31) |
4808 __gen_field(values->MICommandOpcode, 23, 28) |
4809 __gen_field(values->ByteWriteDisables, 8, 11) |
4810 __gen_field(values->DwordLength, 0, 7) |
4811 0;
4812
4813 dw[1] =
4814 __gen_offset(values->RegisterOffset, 2, 22) |
4815 0;
4816
4817 dw[2] =
4818 __gen_field(values->DataDWord, 0, 31) |
4819 0;
4820
4821 }
4822
4823 #define GEN7_MI_LOAD_REGISTER_MEM_length 0x00000003
4824 #define GEN7_MI_LOAD_REGISTER_MEM_length_bias 0x00000002
4825 #define GEN7_MI_LOAD_REGISTER_MEM_header \
4826 .CommandType = 0, \
4827 .MICommandOpcode = 41, \
4828 .DwordLength = 1
4829
4830 struct GEN7_MI_LOAD_REGISTER_MEM {
4831 uint32_t CommandType;
4832 uint32_t MICommandOpcode;
4833 uint32_t UseGlobalGTT;
4834 uint32_t AsyncModeEnable;
4835 uint32_t DwordLength;
4836 uint32_t RegisterAddress;
4837 __gen_address_type MemoryAddress;
4838 };
4839
4840 static inline void
4841 GEN7_MI_LOAD_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
4842 const struct GEN7_MI_LOAD_REGISTER_MEM * restrict values)
4843 {
4844 uint32_t *dw = (uint32_t * restrict) dst;
4845
4846 dw[0] =
4847 __gen_field(values->CommandType, 29, 31) |
4848 __gen_field(values->MICommandOpcode, 23, 28) |
4849 __gen_field(values->UseGlobalGTT, 22, 22) |
4850 __gen_field(values->AsyncModeEnable, 21, 21) |
4851 __gen_field(values->DwordLength, 0, 7) |
4852 0;
4853
4854 dw[1] =
4855 __gen_offset(values->RegisterAddress, 2, 22) |
4856 0;
4857
4858 uint32_t dw2 =
4859 0;
4860
4861 dw[2] =
4862 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
4863
4864 }
4865
4866 #define GEN7_MI_NOOP_length 0x00000001
4867 #define GEN7_MI_NOOP_length_bias 0x00000001
4868 #define GEN7_MI_NOOP_header \
4869 .CommandType = 0, \
4870 .MICommandOpcode = 0
4871
4872 struct GEN7_MI_NOOP {
4873 uint32_t CommandType;
4874 uint32_t MICommandOpcode;
4875 uint32_t IdentificationNumberRegisterWriteEnable;
4876 uint32_t IdentificationNumber;
4877 };
4878
4879 static inline void
4880 GEN7_MI_NOOP_pack(__gen_user_data *data, void * restrict dst,
4881 const struct GEN7_MI_NOOP * restrict values)
4882 {
4883 uint32_t *dw = (uint32_t * restrict) dst;
4884
4885 dw[0] =
4886 __gen_field(values->CommandType, 29, 31) |
4887 __gen_field(values->MICommandOpcode, 23, 28) |
4888 __gen_field(values->IdentificationNumberRegisterWriteEnable, 22, 22) |
4889 __gen_field(values->IdentificationNumber, 0, 21) |
4890 0;
4891
4892 }
4893
4894 #define GEN7_MI_PREDICATE_length 0x00000001
4895 #define GEN7_MI_PREDICATE_length_bias 0x00000001
4896 #define GEN7_MI_PREDICATE_header \
4897 .CommandType = 0, \
4898 .MICommandOpcode = 12
4899
4900 struct GEN7_MI_PREDICATE {
4901 uint32_t CommandType;
4902 uint32_t MICommandOpcode;
4903 #define KEEP 0
4904 #define LOAD 2
4905 #define LOADINV 3
4906 uint32_t LoadOperation;
4907 #define COMBINE_SET 0
4908 #define COMBINE_AND 1
4909 #define COMBINE_OR 2
4910 #define COMBINE_XOR 3
4911 uint32_t CombineOperation;
4912 #define COMPARE_SRCS_EQUAL 2
4913 #define COMPARE_DELTAS_EQUAL 3
4914 uint32_t CompareOperation;
4915 };
4916
4917 static inline void
4918 GEN7_MI_PREDICATE_pack(__gen_user_data *data, void * restrict dst,
4919 const struct GEN7_MI_PREDICATE * restrict values)
4920 {
4921 uint32_t *dw = (uint32_t * restrict) dst;
4922
4923 dw[0] =
4924 __gen_field(values->CommandType, 29, 31) |
4925 __gen_field(values->MICommandOpcode, 23, 28) |
4926 __gen_field(values->LoadOperation, 6, 7) |
4927 __gen_field(values->CombineOperation, 3, 4) |
4928 __gen_field(values->CompareOperation, 0, 1) |
4929 0;
4930
4931 }
4932
4933 #define GEN7_MI_REPORT_HEAD_length 0x00000001
4934 #define GEN7_MI_REPORT_HEAD_length_bias 0x00000001
4935 #define GEN7_MI_REPORT_HEAD_header \
4936 .CommandType = 0, \
4937 .MICommandOpcode = 7
4938
4939 struct GEN7_MI_REPORT_HEAD {
4940 uint32_t CommandType;
4941 uint32_t MICommandOpcode;
4942 };
4943
4944 static inline void
4945 GEN7_MI_REPORT_HEAD_pack(__gen_user_data *data, void * restrict dst,
4946 const struct GEN7_MI_REPORT_HEAD * restrict values)
4947 {
4948 uint32_t *dw = (uint32_t * restrict) dst;
4949
4950 dw[0] =
4951 __gen_field(values->CommandType, 29, 31) |
4952 __gen_field(values->MICommandOpcode, 23, 28) |
4953 0;
4954
4955 }
4956
4957 #define GEN7_MI_SEMAPHORE_MBOX_length 0x00000003
4958 #define GEN7_MI_SEMAPHORE_MBOX_length_bias 0x00000002
4959 #define GEN7_MI_SEMAPHORE_MBOX_header \
4960 .CommandType = 0, \
4961 .MICommandOpcode = 22, \
4962 .DwordLength = 1
4963
4964 struct GEN7_MI_SEMAPHORE_MBOX {
4965 uint32_t CommandType;
4966 uint32_t MICommandOpcode;
4967 #define RVSYNC 0
4968 #define RBSYNC 2
4969 #define UseGeneralRegisterSelect 3
4970 uint32_t RegisterSelect;
4971 uint32_t DwordLength;
4972 uint32_t SemaphoreDataDword;
4973 };
4974
4975 static inline void
4976 GEN7_MI_SEMAPHORE_MBOX_pack(__gen_user_data *data, void * restrict dst,
4977 const struct GEN7_MI_SEMAPHORE_MBOX * restrict values)
4978 {
4979 uint32_t *dw = (uint32_t * restrict) dst;
4980
4981 dw[0] =
4982 __gen_field(values->CommandType, 29, 31) |
4983 __gen_field(values->MICommandOpcode, 23, 28) |
4984 __gen_field(values->RegisterSelect, 16, 17) |
4985 __gen_field(values->DwordLength, 0, 7) |
4986 0;
4987
4988 dw[1] =
4989 __gen_field(values->SemaphoreDataDword, 0, 31) |
4990 0;
4991
4992 dw[2] =
4993 0;
4994
4995 }
4996
4997 #define GEN7_MI_SET_CONTEXT_length 0x00000002
4998 #define GEN7_MI_SET_CONTEXT_length_bias 0x00000002
4999 #define GEN7_MI_SET_CONTEXT_header \
5000 .CommandType = 0, \
5001 .MICommandOpcode = 24, \
5002 .DwordLength = 0
5003
5004 struct GEN7_MI_SET_CONTEXT {
5005 uint32_t CommandType;
5006 uint32_t MICommandOpcode;
5007 uint32_t DwordLength;
5008 __gen_address_type LogicalContextAddress;
5009 uint32_t ReservedMustbe1;
5010 uint32_t ExtendedStateSaveEnable;
5011 uint32_t ExtendedStateRestoreEnable;
5012 uint32_t ForceRestore;
5013 uint32_t RestoreInhibit;
5014 };
5015
5016 static inline void
5017 GEN7_MI_SET_CONTEXT_pack(__gen_user_data *data, void * restrict dst,
5018 const struct GEN7_MI_SET_CONTEXT * restrict values)
5019 {
5020 uint32_t *dw = (uint32_t * restrict) dst;
5021
5022 dw[0] =
5023 __gen_field(values->CommandType, 29, 31) |
5024 __gen_field(values->MICommandOpcode, 23, 28) |
5025 __gen_field(values->DwordLength, 0, 7) |
5026 0;
5027
5028 uint32_t dw1 =
5029 __gen_field(values->ReservedMustbe1, 8, 8) |
5030 __gen_field(values->ExtendedStateSaveEnable, 3, 3) |
5031 __gen_field(values->ExtendedStateRestoreEnable, 2, 2) |
5032 __gen_field(values->ForceRestore, 1, 1) |
5033 __gen_field(values->RestoreInhibit, 0, 0) |
5034 0;
5035
5036 dw[1] =
5037 __gen_combine_address(data, &dw[1], values->LogicalContextAddress, dw1);
5038
5039 }
5040
5041 #define GEN7_MI_STORE_DATA_IMM_length 0x00000004
5042 #define GEN7_MI_STORE_DATA_IMM_length_bias 0x00000002
5043 #define GEN7_MI_STORE_DATA_IMM_header \
5044 .CommandType = 0, \
5045 .MICommandOpcode = 32, \
5046 .DwordLength = 2
5047
5048 struct GEN7_MI_STORE_DATA_IMM {
5049 uint32_t CommandType;
5050 uint32_t MICommandOpcode;
5051 uint32_t UseGlobalGTT;
5052 uint32_t DwordLength;
5053 uint32_t Address;
5054 uint32_t CoreModeEnable;
5055 uint32_t DataDWord0;
5056 uint32_t DataDWord1;
5057 };
5058
5059 static inline void
5060 GEN7_MI_STORE_DATA_IMM_pack(__gen_user_data *data, void * restrict dst,
5061 const struct GEN7_MI_STORE_DATA_IMM * restrict values)
5062 {
5063 uint32_t *dw = (uint32_t * restrict) dst;
5064
5065 dw[0] =
5066 __gen_field(values->CommandType, 29, 31) |
5067 __gen_field(values->MICommandOpcode, 23, 28) |
5068 __gen_field(values->UseGlobalGTT, 22, 22) |
5069 __gen_field(values->DwordLength, 0, 5) |
5070 0;
5071
5072 dw[1] =
5073 0;
5074
5075 dw[2] =
5076 __gen_field(values->Address, 2, 31) |
5077 __gen_field(values->CoreModeEnable, 0, 0) |
5078 0;
5079
5080 dw[3] =
5081 __gen_field(values->DataDWord0, 0, 31) |
5082 0;
5083
5084 dw[4] =
5085 __gen_field(values->DataDWord1, 0, 31) |
5086 0;
5087
5088 }
5089
5090 #define GEN7_MI_STORE_DATA_INDEX_length 0x00000003
5091 #define GEN7_MI_STORE_DATA_INDEX_length_bias 0x00000002
5092 #define GEN7_MI_STORE_DATA_INDEX_header \
5093 .CommandType = 0, \
5094 .MICommandOpcode = 33, \
5095 .DwordLength = 1
5096
5097 struct GEN7_MI_STORE_DATA_INDEX {
5098 uint32_t CommandType;
5099 uint32_t MICommandOpcode;
5100 uint32_t DwordLength;
5101 uint32_t Offset;
5102 uint32_t DataDWord0;
5103 uint32_t DataDWord1;
5104 };
5105
5106 static inline void
5107 GEN7_MI_STORE_DATA_INDEX_pack(__gen_user_data *data, void * restrict dst,
5108 const struct GEN7_MI_STORE_DATA_INDEX * restrict values)
5109 {
5110 uint32_t *dw = (uint32_t * restrict) dst;
5111
5112 dw[0] =
5113 __gen_field(values->CommandType, 29, 31) |
5114 __gen_field(values->MICommandOpcode, 23, 28) |
5115 __gen_field(values->DwordLength, 0, 7) |
5116 0;
5117
5118 dw[1] =
5119 __gen_field(values->Offset, 2, 11) |
5120 0;
5121
5122 dw[2] =
5123 __gen_field(values->DataDWord0, 0, 31) |
5124 0;
5125
5126 dw[3] =
5127 __gen_field(values->DataDWord1, 0, 31) |
5128 0;
5129
5130 }
5131
5132 #define GEN7_MI_SUSPEND_FLUSH_length 0x00000001
5133 #define GEN7_MI_SUSPEND_FLUSH_length_bias 0x00000001
5134 #define GEN7_MI_SUSPEND_FLUSH_header \
5135 .CommandType = 0, \
5136 .MICommandOpcode = 11
5137
5138 struct GEN7_MI_SUSPEND_FLUSH {
5139 uint32_t CommandType;
5140 uint32_t MICommandOpcode;
5141 uint32_t SuspendFlush;
5142 };
5143
5144 static inline void
5145 GEN7_MI_SUSPEND_FLUSH_pack(__gen_user_data *data, void * restrict dst,
5146 const struct GEN7_MI_SUSPEND_FLUSH * restrict values)
5147 {
5148 uint32_t *dw = (uint32_t * restrict) dst;
5149
5150 dw[0] =
5151 __gen_field(values->CommandType, 29, 31) |
5152 __gen_field(values->MICommandOpcode, 23, 28) |
5153 __gen_field(values->SuspendFlush, 0, 0) |
5154 0;
5155
5156 }
5157
5158 #define GEN7_MI_TOPOLOGY_FILTER_length 0x00000001
5159 #define GEN7_MI_TOPOLOGY_FILTER_length_bias 0x00000001
5160 #define GEN7_MI_TOPOLOGY_FILTER_header \
5161 .CommandType = 0, \
5162 .MICommandOpcode = 13
5163
5164 struct GEN7_MI_TOPOLOGY_FILTER {
5165 uint32_t CommandType;
5166 uint32_t MICommandOpcode;
5167 uint32_t TopologyFilterValue;
5168 };
5169
5170 static inline void
5171 GEN7_MI_TOPOLOGY_FILTER_pack(__gen_user_data *data, void * restrict dst,
5172 const struct GEN7_MI_TOPOLOGY_FILTER * restrict values)
5173 {
5174 uint32_t *dw = (uint32_t * restrict) dst;
5175
5176 dw[0] =
5177 __gen_field(values->CommandType, 29, 31) |
5178 __gen_field(values->MICommandOpcode, 23, 28) |
5179 __gen_field(values->TopologyFilterValue, 0, 5) |
5180 0;
5181
5182 }
5183
5184 #define GEN7_MI_UPDATE_GTT_length_bias 0x00000002
5185 #define GEN7_MI_UPDATE_GTT_header \
5186 .CommandType = 0, \
5187 .MICommandOpcode = 35
5188
5189 struct GEN7_MI_UPDATE_GTT {
5190 uint32_t CommandType;
5191 uint32_t MICommandOpcode;
5192 #define PerProcessGraphicsAddress 0
5193 #define GlobalGraphicsAddress 1
5194 uint32_t UseGlobalGTT;
5195 uint32_t DwordLength;
5196 __gen_address_type EntryAddress;
5197 /* variable length fields follow */
5198 };
5199
5200 static inline void
5201 GEN7_MI_UPDATE_GTT_pack(__gen_user_data *data, void * restrict dst,
5202 const struct GEN7_MI_UPDATE_GTT * restrict values)
5203 {
5204 uint32_t *dw = (uint32_t * restrict) dst;
5205
5206 dw[0] =
5207 __gen_field(values->CommandType, 29, 31) |
5208 __gen_field(values->MICommandOpcode, 23, 28) |
5209 __gen_field(values->UseGlobalGTT, 22, 22) |
5210 __gen_field(values->DwordLength, 0, 7) |
5211 0;
5212
5213 uint32_t dw1 =
5214 0;
5215
5216 dw[1] =
5217 __gen_combine_address(data, &dw[1], values->EntryAddress, dw1);
5218
5219 /* variable length fields follow */
5220 }
5221
5222 #define GEN7_MI_URB_CLEAR_length 0x00000002
5223 #define GEN7_MI_URB_CLEAR_length_bias 0x00000002
5224 #define GEN7_MI_URB_CLEAR_header \
5225 .CommandType = 0, \
5226 .MICommandOpcode = 25, \
5227 .DwordLength = 0
5228
5229 struct GEN7_MI_URB_CLEAR {
5230 uint32_t CommandType;
5231 uint32_t MICommandOpcode;
5232 uint32_t DwordLength;
5233 uint32_t URBClearLength;
5234 uint32_t URBAddress;
5235 };
5236
5237 static inline void
5238 GEN7_MI_URB_CLEAR_pack(__gen_user_data *data, void * restrict dst,
5239 const struct GEN7_MI_URB_CLEAR * restrict values)
5240 {
5241 uint32_t *dw = (uint32_t * restrict) dst;
5242
5243 dw[0] =
5244 __gen_field(values->CommandType, 29, 31) |
5245 __gen_field(values->MICommandOpcode, 23, 28) |
5246 __gen_field(values->DwordLength, 0, 7) |
5247 0;
5248
5249 dw[1] =
5250 __gen_field(values->URBClearLength, 16, 28) |
5251 __gen_offset(values->URBAddress, 0, 13) |
5252 0;
5253
5254 }
5255
5256 #define GEN7_MI_USER_INTERRUPT_length 0x00000001
5257 #define GEN7_MI_USER_INTERRUPT_length_bias 0x00000001
5258 #define GEN7_MI_USER_INTERRUPT_header \
5259 .CommandType = 0, \
5260 .MICommandOpcode = 2
5261
5262 struct GEN7_MI_USER_INTERRUPT {
5263 uint32_t CommandType;
5264 uint32_t MICommandOpcode;
5265 };
5266
5267 static inline void
5268 GEN7_MI_USER_INTERRUPT_pack(__gen_user_data *data, void * restrict dst,
5269 const struct GEN7_MI_USER_INTERRUPT * restrict values)
5270 {
5271 uint32_t *dw = (uint32_t * restrict) dst;
5272
5273 dw[0] =
5274 __gen_field(values->CommandType, 29, 31) |
5275 __gen_field(values->MICommandOpcode, 23, 28) |
5276 0;
5277
5278 }
5279
5280 #define GEN7_MI_WAIT_FOR_EVENT_length 0x00000001
5281 #define GEN7_MI_WAIT_FOR_EVENT_length_bias 0x00000001
5282 #define GEN7_MI_WAIT_FOR_EVENT_header \
5283 .CommandType = 0, \
5284 .MICommandOpcode = 3
5285
5286 struct GEN7_MI_WAIT_FOR_EVENT {
5287 uint32_t CommandType;
5288 uint32_t MICommandOpcode;
5289 uint32_t DisplayPipeCHorizontalBlankWaitEnable;
5290 uint32_t DisplayPipeCVerticalBlankWaitEnable;
5291 uint32_t DisplaySpriteCFlipPendingWaitEnable;
5292 #define Notenabled 0
5293 uint32_t ConditionCodeWaitSelect;
5294 uint32_t DisplayPlaneCFlipPendingWaitEnable;
5295 uint32_t DisplayPipeCScanLineWaitEnable;
5296 uint32_t DisplayPipeBHorizontalBlankWaitEnable;
5297 uint32_t DisplayPipeBVerticalBlankWaitEnable;
5298 uint32_t DisplaySpriteBFlipPendingWaitEnable;
5299 uint32_t DisplayPlaneBFlipPendingWaitEnable;
5300 uint32_t DisplayPipeBScanLineWaitEnable;
5301 uint32_t DisplayPipeAHorizontalBlankWaitEnable;
5302 uint32_t DisplayPipeAVerticalBlankWaitEnable;
5303 uint32_t DisplaySpriteAFlipPendingWaitEnable;
5304 uint32_t DisplayPlaneAFlipPendingWaitEnable;
5305 uint32_t DisplayPipeAScanLineWaitEnable;
5306 };
5307
5308 static inline void
5309 GEN7_MI_WAIT_FOR_EVENT_pack(__gen_user_data *data, void * restrict dst,
5310 const struct GEN7_MI_WAIT_FOR_EVENT * restrict values)
5311 {
5312 uint32_t *dw = (uint32_t * restrict) dst;
5313
5314 dw[0] =
5315 __gen_field(values->CommandType, 29, 31) |
5316 __gen_field(values->MICommandOpcode, 23, 28) |
5317 __gen_field(values->DisplayPipeCHorizontalBlankWaitEnable, 22, 22) |
5318 __gen_field(values->DisplayPipeCVerticalBlankWaitEnable, 21, 21) |
5319 __gen_field(values->DisplaySpriteCFlipPendingWaitEnable, 20, 20) |
5320 __gen_field(values->ConditionCodeWaitSelect, 16, 19) |
5321 __gen_field(values->DisplayPlaneCFlipPendingWaitEnable, 15, 15) |
5322 __gen_field(values->DisplayPipeCScanLineWaitEnable, 14, 14) |
5323 __gen_field(values->DisplayPipeBHorizontalBlankWaitEnable, 13, 13) |
5324 __gen_field(values->DisplayPipeBVerticalBlankWaitEnable, 11, 11) |
5325 __gen_field(values->DisplaySpriteBFlipPendingWaitEnable, 10, 10) |
5326 __gen_field(values->DisplayPlaneBFlipPendingWaitEnable, 9, 9) |
5327 __gen_field(values->DisplayPipeBScanLineWaitEnable, 8, 8) |
5328 __gen_field(values->DisplayPipeAHorizontalBlankWaitEnable, 5, 5) |
5329 __gen_field(values->DisplayPipeAVerticalBlankWaitEnable, 3, 3) |
5330 __gen_field(values->DisplaySpriteAFlipPendingWaitEnable, 2, 2) |
5331 __gen_field(values->DisplayPlaneAFlipPendingWaitEnable, 1, 1) |
5332 __gen_field(values->DisplayPipeAScanLineWaitEnable, 0, 0) |
5333 0;
5334
5335 }
5336
5337 #define GEN7_PIPE_CONTROL_length 0x00000005
5338 #define GEN7_PIPE_CONTROL_length_bias 0x00000002
5339 #define GEN7_PIPE_CONTROL_header \
5340 .CommandType = 3, \
5341 .CommandSubType = 3, \
5342 ._3DCommandOpcode = 2, \
5343 ._3DCommandSubOpcode = 0, \
5344 .DwordLength = 3
5345
5346 struct GEN7_PIPE_CONTROL {
5347 uint32_t CommandType;
5348 uint32_t CommandSubType;
5349 uint32_t _3DCommandOpcode;
5350 uint32_t _3DCommandSubOpcode;
5351 uint32_t DwordLength;
5352 #define DAT_PPGTT 0
5353 #define DAT_GGTT 1
5354 uint32_t DestinationAddressType;
5355 #define NoLRIOperation 0
5356 #define MMIOWriteImmediateData 1
5357 uint32_t LRIPostSyncOperation;
5358 uint32_t StoreDataIndex;
5359 uint32_t CommandStreamerStallEnable;
5360 #define DontReset 0
5361 #define Reset 1
5362 uint32_t GlobalSnapshotCountReset;
5363 uint32_t TLBInvalidate;
5364 uint32_t GenericMediaStateClear;
5365 #define NoWrite 0
5366 #define WriteImmediateData 1
5367 #define WritePSDepthCount 2
5368 #define WriteTimestamp 3
5369 uint32_t PostSyncOperation;
5370 uint32_t DepthStallEnable;
5371 #define DisableFlush 0
5372 #define EnableFlush 1
5373 uint32_t RenderTargetCacheFlushEnable;
5374 uint32_t InstructionCacheInvalidateEnable;
5375 uint32_t TextureCacheInvalidationEnable;
5376 uint32_t IndirectStatePointersDisable;
5377 uint32_t NotifyEnable;
5378 uint32_t PipeControlFlushEnable;
5379 uint32_t DCFlushEnable;
5380 uint32_t VFCacheInvalidationEnable;
5381 uint32_t ConstantCacheInvalidationEnable;
5382 uint32_t StateCacheInvalidationEnable;
5383 uint32_t StallAtPixelScoreboard;
5384 #define FlushDisabled 0
5385 #define FlushEnabled 1
5386 uint32_t DepthCacheFlushEnable;
5387 __gen_address_type Address;
5388 uint32_t ImmediateData;
5389 uint32_t ImmediateData0;
5390 };
5391
5392 static inline void
5393 GEN7_PIPE_CONTROL_pack(__gen_user_data *data, void * restrict dst,
5394 const struct GEN7_PIPE_CONTROL * restrict values)
5395 {
5396 uint32_t *dw = (uint32_t * restrict) dst;
5397
5398 dw[0] =
5399 __gen_field(values->CommandType, 29, 31) |
5400 __gen_field(values->CommandSubType, 27, 28) |
5401 __gen_field(values->_3DCommandOpcode, 24, 26) |
5402 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5403 __gen_field(values->DwordLength, 0, 7) |
5404 0;
5405
5406 dw[1] =
5407 __gen_field(values->DestinationAddressType, 24, 24) |
5408 __gen_field(values->LRIPostSyncOperation, 23, 23) |
5409 __gen_field(values->StoreDataIndex, 21, 21) |
5410 __gen_field(values->CommandStreamerStallEnable, 20, 20) |
5411 __gen_field(values->GlobalSnapshotCountReset, 19, 19) |
5412 __gen_field(values->TLBInvalidate, 18, 18) |
5413 __gen_field(values->GenericMediaStateClear, 16, 16) |
5414 __gen_field(values->PostSyncOperation, 14, 15) |
5415 __gen_field(values->DepthStallEnable, 13, 13) |
5416 __gen_field(values->RenderTargetCacheFlushEnable, 12, 12) |
5417 __gen_field(values->InstructionCacheInvalidateEnable, 11, 11) |
5418 __gen_field(values->TextureCacheInvalidationEnable, 10, 10) |
5419 __gen_field(values->IndirectStatePointersDisable, 9, 9) |
5420 __gen_field(values->NotifyEnable, 8, 8) |
5421 __gen_field(values->PipeControlFlushEnable, 7, 7) |
5422 __gen_field(values->DCFlushEnable, 5, 5) |
5423 __gen_field(values->VFCacheInvalidationEnable, 4, 4) |
5424 __gen_field(values->ConstantCacheInvalidationEnable, 3, 3) |
5425 __gen_field(values->StateCacheInvalidationEnable, 2, 2) |
5426 __gen_field(values->StallAtPixelScoreboard, 1, 1) |
5427 __gen_field(values->DepthCacheFlushEnable, 0, 0) |
5428 0;
5429
5430 uint32_t dw2 =
5431 0;
5432
5433 dw[2] =
5434 __gen_combine_address(data, &dw[2], values->Address, dw2);
5435
5436 dw[3] =
5437 __gen_field(values->ImmediateData, 0, 31) |
5438 0;
5439
5440 dw[4] =
5441 __gen_field(values->ImmediateData, 0, 31) |
5442 0;
5443
5444 }
5445
5446 struct GEN7_3DSTATE_CONSTANT_BODY {
5447 uint32_t ConstantBuffer1ReadLength;
5448 uint32_t ConstantBuffer0ReadLength;
5449 uint32_t ConstantBuffer3ReadLength;
5450 uint32_t ConstantBuffer2ReadLength;
5451 __gen_address_type PointerToConstantBuffer0;
5452 uint32_t ConstantBufferObjectControlState;
5453 __gen_address_type PointerToConstantBuffer1;
5454 __gen_address_type PointerToConstantBuffer2;
5455 __gen_address_type PointerToConstantBuffer3;
5456 };
5457
5458 static inline void
5459 GEN7_3DSTATE_CONSTANT_BODY_pack(__gen_user_data *data, void * restrict dst,
5460 const struct GEN7_3DSTATE_CONSTANT_BODY * restrict values)
5461 {
5462 uint32_t *dw = (uint32_t * restrict) dst;
5463
5464 dw[0] =
5465 __gen_field(values->ConstantBuffer1ReadLength, 16, 31) |
5466 __gen_field(values->ConstantBuffer0ReadLength, 0, 15) |
5467 0;
5468
5469 dw[1] =
5470 __gen_field(values->ConstantBuffer3ReadLength, 16, 31) |
5471 __gen_field(values->ConstantBuffer2ReadLength, 0, 15) |
5472 0;
5473
5474 uint32_t dw2 =
5475 /* Struct ConstantBufferObjectControlState: found MEMORY_OBJECT_CONTROL_STATE */
5476 0;
5477
5478 dw[2] =
5479 __gen_combine_address(data, &dw[2], values->PointerToConstantBuffer0, dw2);
5480
5481 uint32_t dw3 =
5482 0;
5483
5484 dw[3] =
5485 __gen_combine_address(data, &dw[3], values->PointerToConstantBuffer1, dw3);
5486
5487 uint32_t dw4 =
5488 0;
5489
5490 dw[4] =
5491 __gen_combine_address(data, &dw[4], values->PointerToConstantBuffer2, dw4);
5492
5493 uint32_t dw5 =
5494 0;
5495
5496 dw[5] =
5497 __gen_combine_address(data, &dw[5], values->PointerToConstantBuffer3, dw5);
5498
5499 }
5500
5501 struct GEN7_VERTEX_BUFFER_STATE {
5502 uint32_t VertexBufferIndex;
5503 #define VERTEXDATA 0
5504 #define INSTANCEDATA 1
5505 uint32_t BufferAccessType;
5506 uint32_t VertexBufferMemoryObjectControlState;
5507 uint32_t AddressModifyEnable;
5508 uint32_t NullVertexBuffer;
5509 uint32_t VertexFetchInvalidate;
5510 uint32_t BufferPitch;
5511 __gen_address_type BufferStartingAddress;
5512 __gen_address_type EndAddress;
5513 uint32_t InstanceDataStepRate;
5514 };
5515
5516 static inline void
5517 GEN7_VERTEX_BUFFER_STATE_pack(__gen_user_data *data, void * restrict dst,
5518 const struct GEN7_VERTEX_BUFFER_STATE * restrict values)
5519 {
5520 uint32_t *dw = (uint32_t * restrict) dst;
5521
5522 dw[0] =
5523 __gen_field(values->VertexBufferIndex, 26, 31) |
5524 __gen_field(values->BufferAccessType, 20, 20) |
5525 /* Struct VertexBufferMemoryObjectControlState: found MEMORY_OBJECT_CONTROL_STATE */
5526 __gen_field(values->AddressModifyEnable, 14, 14) |
5527 __gen_field(values->NullVertexBuffer, 13, 13) |
5528 __gen_field(values->VertexFetchInvalidate, 12, 12) |
5529 __gen_field(values->BufferPitch, 0, 11) |
5530 0;
5531
5532 uint32_t dw1 =
5533 0;
5534
5535 dw[1] =
5536 __gen_combine_address(data, &dw[1], values->BufferStartingAddress, dw1);
5537
5538 uint32_t dw2 =
5539 0;
5540
5541 dw[2] =
5542 __gen_combine_address(data, &dw[2], values->EndAddress, dw2);
5543
5544 dw[3] =
5545 __gen_field(values->InstanceDataStepRate, 0, 31) |
5546 0;
5547
5548 }
5549
5550 struct GEN7_VERTEX_ELEMENT_STATE {
5551 uint32_t VertexBufferIndex;
5552 uint32_t Valid;
5553 uint32_t SourceElementFormat;
5554 uint32_t EdgeFlagEnable;
5555 uint32_t SourceElementOffset;
5556 uint32_t Component0Control;
5557 uint32_t Component1Control;
5558 uint32_t Component2Control;
5559 uint32_t Component3Control;
5560 };
5561
5562 static inline void
5563 GEN7_VERTEX_ELEMENT_STATE_pack(__gen_user_data *data, void * restrict dst,
5564 const struct GEN7_VERTEX_ELEMENT_STATE * restrict values)
5565 {
5566 uint32_t *dw = (uint32_t * restrict) dst;
5567
5568 dw[0] =
5569 __gen_field(values->VertexBufferIndex, 26, 31) |
5570 __gen_field(values->Valid, 25, 25) |
5571 __gen_field(values->SourceElementFormat, 16, 24) |
5572 __gen_field(values->EdgeFlagEnable, 15, 15) |
5573 __gen_field(values->SourceElementOffset, 0, 11) |
5574 0;
5575
5576 dw[1] =
5577 __gen_field(values->Component0Control, 28, 30) |
5578 __gen_field(values->Component1Control, 24, 26) |
5579 __gen_field(values->Component2Control, 20, 22) |
5580 __gen_field(values->Component3Control, 16, 18) |
5581 0;
5582
5583 }
5584
5585 struct GEN7_SO_DECL_ENTRY {
5586 uint32_t Stream3Decl;
5587 uint32_t Stream2Decl;
5588 uint32_t Stream1Decl;
5589 uint32_t Stream0Decl;
5590 };
5591
5592 static inline void
5593 GEN7_SO_DECL_ENTRY_pack(__gen_user_data *data, void * restrict dst,
5594 const struct GEN7_SO_DECL_ENTRY * restrict values)
5595 {
5596 uint32_t *dw = (uint32_t * restrict) dst;
5597
5598 dw[0] =
5599 /* Struct Stream3Decl: found SO_DECL */
5600 /* Struct Stream2Decl: found SO_DECL */
5601 /* Struct Stream1Decl: found SO_DECL */
5602 /* Struct Stream0Decl: found SO_DECL */
5603 0;
5604
5605 }
5606
5607 struct GEN7_SO_DECL {
5608 uint32_t OutputBufferSlot;
5609 uint32_t HoleFlag;
5610 uint32_t RegisterIndex;
5611 uint32_t ComponentMask;
5612 };
5613
5614 static inline void
5615 GEN7_SO_DECL_pack(__gen_user_data *data, void * restrict dst,
5616 const struct GEN7_SO_DECL * restrict values)
5617 {
5618 uint32_t *dw = (uint32_t * restrict) dst;
5619
5620 dw[0] =
5621 __gen_field(values->OutputBufferSlot, 12, 13) |
5622 __gen_field(values->HoleFlag, 11, 11) |
5623 __gen_field(values->RegisterIndex, 4, 9) |
5624 __gen_field(values->ComponentMask, 0, 3) |
5625 0;
5626
5627 }
5628
5629 struct GEN7_SCISSOR_RECT {
5630 uint32_t ScissorRectangleYMin;
5631 uint32_t ScissorRectangleXMin;
5632 uint32_t ScissorRectangleYMax;
5633 uint32_t ScissorRectangleXMax;
5634 };
5635
5636 static inline void
5637 GEN7_SCISSOR_RECT_pack(__gen_user_data *data, void * restrict dst,
5638 const struct GEN7_SCISSOR_RECT * restrict values)
5639 {
5640 uint32_t *dw = (uint32_t * restrict) dst;
5641
5642 dw[0] =
5643 __gen_field(values->ScissorRectangleYMin, 16, 31) |
5644 __gen_field(values->ScissorRectangleXMin, 0, 15) |
5645 0;
5646
5647 dw[1] =
5648 __gen_field(values->ScissorRectangleYMax, 16, 31) |
5649 __gen_field(values->ScissorRectangleXMax, 0, 15) |
5650 0;
5651
5652 }
5653
5654 struct GEN7_SF_CLIP_VIEWPORT {
5655 float ViewportMatrixElementm00;
5656 float ViewportMatrixElementm11;
5657 float ViewportMatrixElementm22;
5658 float ViewportMatrixElementm30;
5659 float ViewportMatrixElementm31;
5660 float ViewportMatrixElementm32;
5661 float XMinClipGuardband;
5662 float XMaxClipGuardband;
5663 float YMinClipGuardband;
5664 float YMaxClipGuardband;
5665 };
5666
5667 static inline void
5668 GEN7_SF_CLIP_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
5669 const struct GEN7_SF_CLIP_VIEWPORT * restrict values)
5670 {
5671 uint32_t *dw = (uint32_t * restrict) dst;
5672
5673 dw[0] =
5674 __gen_float(values->ViewportMatrixElementm00) |
5675 0;
5676
5677 dw[1] =
5678 __gen_float(values->ViewportMatrixElementm11) |
5679 0;
5680
5681 dw[2] =
5682 __gen_float(values->ViewportMatrixElementm22) |
5683 0;
5684
5685 dw[3] =
5686 __gen_float(values->ViewportMatrixElementm30) |
5687 0;
5688
5689 dw[4] =
5690 __gen_float(values->ViewportMatrixElementm31) |
5691 0;
5692
5693 dw[5] =
5694 __gen_float(values->ViewportMatrixElementm32) |
5695 0;
5696
5697 dw[6] =
5698 0;
5699
5700 dw[7] =
5701 0;
5702
5703 dw[8] =
5704 __gen_float(values->XMinClipGuardband) |
5705 0;
5706
5707 dw[9] =
5708 __gen_float(values->XMaxClipGuardband) |
5709 0;
5710
5711 dw[10] =
5712 __gen_float(values->YMinClipGuardband) |
5713 0;
5714
5715 dw[11] =
5716 __gen_float(values->YMaxClipGuardband) |
5717 0;
5718
5719 dw[12] =
5720 0;
5721
5722 }
5723
5724 struct GEN7_BLEND_STATE {
5725 uint32_t ColorBufferBlendEnable;
5726 uint32_t IndependentAlphaBlendEnable;
5727 #define BLENDFUNCTION_ADD 0
5728 #define BLENDFUNCTION_SUBTRACT 1
5729 #define BLENDFUNCTION_REVERSE_SUBTRACT 2
5730 #define BLENDFUNCTION_MIN 3
5731 #define BLENDFUNCTION_MAX 4
5732 uint32_t AlphaBlendFunction;
5733 #define BLENDFACTOR_ONE 1
5734 #define BLENDFACTOR_SRC_COLOR 2
5735 #define BLENDFACTOR_SRC_ALPHA 3
5736 #define BLENDFACTOR_DST_ALPHA 4
5737 #define BLENDFACTOR_DST_COLOR 5
5738 #define BLENDFACTOR_SRC_ALPHA_SATURATE 6
5739 #define BLENDFACTOR_CONST_COLOR 7
5740 #define BLENDFACTOR_CONST_ALPHA 8
5741 #define BLENDFACTOR_SRC1_COLOR 9
5742 #define BLENDFACTOR_SRC1_ALPHA 10
5743 #define BLENDFACTOR_ZERO 17
5744 #define BLENDFACTOR_INV_SRC_COLOR 18
5745 #define BLENDFACTOR_INV_SRC_ALPHA 19
5746 #define BLENDFACTOR_INV_DST_ALPHA 20
5747 #define BLENDFACTOR_INV_DST_COLOR 21
5748 #define BLENDFACTOR_INV_CONST_COLOR 23
5749 #define BLENDFACTOR_INV_CONST_ALPHA 24
5750 #define BLENDFACTOR_INV_SRC1_COLOR 25
5751 #define BLENDFACTOR_INV_SRC1_ALPHA 26
5752 uint32_t SourceAlphaBlendFactor;
5753 uint32_t DestinationAlphaBlendFactor;
5754 #define BLENDFUNCTION_ADD 0
5755 #define BLENDFUNCTION_SUBTRACT 1
5756 #define BLENDFUNCTION_REVERSE_SUBTRACT 2
5757 #define BLENDFUNCTION_MIN 3
5758 #define BLENDFUNCTION_MAX 4
5759 uint32_t ColorBlendFunction;
5760 uint32_t SourceBlendFactor;
5761 uint32_t DestinationBlendFactor;
5762 uint32_t AlphaToCoverageEnable;
5763 uint32_t AlphaToOneEnable;
5764 uint32_t AlphaToCoverageDitherEnable;
5765 uint32_t WriteDisableAlpha;
5766 uint32_t WriteDisableRed;
5767 uint32_t WriteDisableGreen;
5768 uint32_t WriteDisableBlue;
5769 uint32_t LogicOpEnable;
5770 #define LOGICOP_CLEAR 0
5771 #define LOGICOP_NOR 1
5772 #define LOGICOP_AND_INVERTED 2
5773 #define LOGICOP_COPY_INVERTED 3
5774 #define LOGICOP_AND_REVERSE 4
5775 #define LOGICOP_INVERT 5
5776 #define LOGICOP_XOR 6
5777 #define LOGICOP_NAND 7
5778 #define LOGICOP_AND 8
5779 #define LOGICOP_EQUIV 9
5780 #define LOGICOP_NOOP 10
5781 #define LOGICOP_OR_INVERTED 11
5782 #define LOGICOP_COPY 12
5783 #define LOGICOP_OR_REVERSE 13
5784 #define LOGICOP_OR 14
5785 #define LOGICOP_SET 15
5786 uint32_t LogicOpFunction;
5787 uint32_t AlphaTestEnable;
5788 #define COMPAREFUNCTION_ALWAYS 0
5789 #define COMPAREFUNCTION_NEVER 1
5790 #define COMPAREFUNCTION_LESS 2
5791 #define COMPAREFUNCTION_EQUAL 3
5792 #define COMPAREFUNCTION_LEQUAL 4
5793 #define COMPAREFUNCTION_GREATER 5
5794 #define COMPAREFUNCTION_NOTEQUAL 6
5795 #define COMPAREFUNCTION_GEQUAL 7
5796 uint32_t AlphaTestFunction;
5797 uint32_t ColorDitherEnable;
5798 uint32_t XDitherOffset;
5799 uint32_t YDitherOffset;
5800 #define COLORCLAMP_UNORM 0
5801 #define COLORCLAMP_SNORM 1
5802 #define COLORCLAMP_RTFORMAT 2
5803 uint32_t ColorClampRange;
5804 uint32_t PreBlendColorClampEnable;
5805 uint32_t PostBlendColorClampEnable;
5806 };
5807
5808 static inline void
5809 GEN7_BLEND_STATE_pack(__gen_user_data *data, void * restrict dst,
5810 const struct GEN7_BLEND_STATE * restrict values)
5811 {
5812 uint32_t *dw = (uint32_t * restrict) dst;
5813
5814 dw[0] =
5815 __gen_field(values->ColorBufferBlendEnable, 31, 31) |
5816 __gen_field(values->IndependentAlphaBlendEnable, 30, 30) |
5817 __gen_field(values->AlphaBlendFunction, 26, 28) |
5818 __gen_field(values->SourceAlphaBlendFactor, 20, 24) |
5819 __gen_field(values->DestinationAlphaBlendFactor, 15, 19) |
5820 __gen_field(values->ColorBlendFunction, 11, 13) |
5821 __gen_field(values->SourceBlendFactor, 5, 9) |
5822 __gen_field(values->DestinationBlendFactor, 0, 4) |
5823 0;
5824
5825 dw[1] =
5826 __gen_field(values->AlphaToCoverageEnable, 31, 31) |
5827 __gen_field(values->AlphaToOneEnable, 30, 30) |
5828 __gen_field(values->AlphaToCoverageDitherEnable, 29, 29) |
5829 __gen_field(values->WriteDisableAlpha, 27, 27) |
5830 __gen_field(values->WriteDisableRed, 26, 26) |
5831 __gen_field(values->WriteDisableGreen, 25, 25) |
5832 __gen_field(values->WriteDisableBlue, 24, 24) |
5833 __gen_field(values->LogicOpEnable, 22, 22) |
5834 __gen_field(values->LogicOpFunction, 18, 21) |
5835 __gen_field(values->AlphaTestEnable, 16, 16) |
5836 __gen_field(values->AlphaTestFunction, 13, 15) |
5837 __gen_field(values->ColorDitherEnable, 12, 12) |
5838 __gen_field(values->XDitherOffset, 10, 11) |
5839 __gen_field(values->YDitherOffset, 8, 9) |
5840 __gen_field(values->ColorClampRange, 2, 3) |
5841 __gen_field(values->PreBlendColorClampEnable, 1, 1) |
5842 __gen_field(values->PostBlendColorClampEnable, 0, 0) |
5843 0;
5844
5845 }
5846
5847 struct GEN7_CC_VIEWPORT {
5848 float MinimumDepth;
5849 float MaximumDepth;
5850 };
5851
5852 static inline void
5853 GEN7_CC_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
5854 const struct GEN7_CC_VIEWPORT * restrict values)
5855 {
5856 uint32_t *dw = (uint32_t * restrict) dst;
5857
5858 dw[0] =
5859 __gen_float(values->MinimumDepth) |
5860 0;
5861
5862 dw[1] =
5863 __gen_float(values->MaximumDepth) |
5864 0;
5865
5866 }
5867
5868 struct GEN7_COLOR_CALC_STATE {
5869 uint32_t StencilReferenceValue;
5870 uint32_t BackFaceStencilReferenceValue;
5871 #define Cancelled 0
5872 #define NotCancelled 1
5873 uint32_t RoundDisableFunctionDisable;
5874 #define ALPHATEST_UNORM8 0
5875 #define ALPHATEST_FLOAT32 1
5876 uint32_t AlphaTestFormat;
5877 uint32_t AlphaReferenceValueAsUNORM8;
5878 float AlphaReferenceValueAsFLOAT32;
5879 float BlendConstantColorRed;
5880 float BlendConstantColorGreen;
5881 float BlendConstantColorBlue;
5882 float BlendConstantColorAlpha;
5883 };
5884
5885 static inline void
5886 GEN7_COLOR_CALC_STATE_pack(__gen_user_data *data, void * restrict dst,
5887 const struct GEN7_COLOR_CALC_STATE * restrict values)
5888 {
5889 uint32_t *dw = (uint32_t * restrict) dst;
5890
5891 dw[0] =
5892 __gen_field(values->StencilReferenceValue, 24, 31) |
5893 __gen_field(values->BackFaceStencilReferenceValue, 16, 23) |
5894 __gen_field(values->RoundDisableFunctionDisable, 15, 15) |
5895 __gen_field(values->AlphaTestFormat, 0, 0) |
5896 0;
5897
5898 dw[1] =
5899 __gen_field(values->AlphaReferenceValueAsUNORM8, 0, 31) |
5900 __gen_float(values->AlphaReferenceValueAsFLOAT32) |
5901 0;
5902
5903 dw[2] =
5904 __gen_float(values->BlendConstantColorRed) |
5905 0;
5906
5907 dw[3] =
5908 __gen_float(values->BlendConstantColorGreen) |
5909 0;
5910
5911 dw[4] =
5912 __gen_float(values->BlendConstantColorBlue) |
5913 0;
5914
5915 dw[5] =
5916 __gen_float(values->BlendConstantColorAlpha) |
5917 0;
5918
5919 }
5920
5921 struct GEN7_DEPTH_STENCIL_STATE {
5922 uint32_t StencilTestEnable;
5923 #define COMPAREFUNCTION_ALWAYS 0
5924 #define COMPAREFUNCTION_NEVER 1
5925 #define COMPAREFUNCTION_LESS 2
5926 #define COMPAREFUNCTION_EQUAL 3
5927 #define COMPAREFUNCTION_LEQUAL 4
5928 #define COMPAREFUNCTION_GREATER 5
5929 #define COMPAREFUNCTION_NOTEQUAL 6
5930 #define COMPAREFUNCTION_GEQUAL 7
5931 uint32_t StencilTestFunction;
5932 #define STENCILOP_KEEP 0
5933 #define STENCILOP_ZERO 1
5934 #define STENCILOP_REPLACE 2
5935 #define STENCILOP_INCRSAT 3
5936 #define STENCILOP_DECRSAT 4
5937 #define STENCILOP_INCR 5
5938 #define STENCILOP_DECR 6
5939 #define STENCILOP_INVERT 7
5940 uint32_t StencilFailOp;
5941 uint32_t StencilPassDepthFailOp;
5942 uint32_t StencilPassDepthPassOp;
5943 uint32_t StencilBufferWriteEnable;
5944 uint32_t DoubleSidedStencilEnable;
5945 #define COMPAREFUNCTION_ALWAYS 0
5946 #define COMPAREFUNCTION_NEVER 1
5947 #define COMPAREFUNCTION_LESS 2
5948 #define COMPAREFUNCTION_EQUAL 3
5949 #define COMPAREFUNCTION_LEQUAL 4
5950 #define COMPAREFUNCTION_GREATER 5
5951 #define COMPAREFUNCTION_NOTEQUAL 6
5952 #define COMPAREFUNCTION_GEQUAL 7
5953 uint32_t BackFaceStencilTestFunction;
5954 #define STENCILOP_KEEP 0
5955 #define STENCILOP_ZERO 1
5956 #define STENCILOP_REPLACE 2
5957 #define STENCILOP_INCRSAT 3
5958 #define STENCILOP_DECRSAT 4
5959 #define STENCILOP_INCR 5
5960 #define STENCILOP_DECR 6
5961 #define STENCILOP_INVERT 7
5962 uint32_t BackfaceStencilFailOp;
5963 uint32_t BackfaceStencilPassDepthFailOp;
5964 uint32_t BackfaceStencilPassDepthPassOp;
5965 uint32_t StencilTestMask;
5966 uint32_t StencilWriteMask;
5967 uint32_t BackfaceStencilTestMask;
5968 uint32_t BackfaceStencilWriteMask;
5969 uint32_t DepthTestEnable;
5970 #define COMPAREFUNCTION_ALWAYS 0
5971 #define COMPAREFUNCTION_NEVER 1
5972 #define COMPAREFUNCTION_LESS 2
5973 #define COMPAREFUNCTION_EQUAL 3
5974 #define COMPAREFUNCTION_LEQUAL 4
5975 #define COMPAREFUNCTION_GREATER 5
5976 #define COMPAREFUNCTION_NOTEQUAL 6
5977 #define COMPAREFUNCTION_GEQUAL 7
5978 uint32_t DepthTestFunction;
5979 uint32_t DepthBufferWriteEnable;
5980 };
5981
5982 static inline void
5983 GEN7_DEPTH_STENCIL_STATE_pack(__gen_user_data *data, void * restrict dst,
5984 const struct GEN7_DEPTH_STENCIL_STATE * restrict values)
5985 {
5986 uint32_t *dw = (uint32_t * restrict) dst;
5987
5988 dw[0] =
5989 __gen_field(values->StencilTestEnable, 31, 31) |
5990 __gen_field(values->StencilTestFunction, 28, 30) |
5991 __gen_field(values->StencilFailOp, 25, 27) |
5992 __gen_field(values->StencilPassDepthFailOp, 22, 24) |
5993 __gen_field(values->StencilPassDepthPassOp, 19, 21) |
5994 __gen_field(values->StencilBufferWriteEnable, 18, 18) |
5995 __gen_field(values->DoubleSidedStencilEnable, 15, 15) |
5996 __gen_field(values->BackFaceStencilTestFunction, 12, 14) |
5997 __gen_field(values->BackfaceStencilFailOp, 9, 11) |
5998 __gen_field(values->BackfaceStencilPassDepthFailOp, 6, 8) |
5999 __gen_field(values->BackfaceStencilPassDepthPassOp, 3, 5) |
6000 0;
6001
6002 dw[1] =
6003 __gen_field(values->StencilTestMask, 24, 31) |
6004 __gen_field(values->StencilWriteMask, 16, 23) |
6005 __gen_field(values->BackfaceStencilTestMask, 8, 15) |
6006 __gen_field(values->BackfaceStencilWriteMask, 0, 7) |
6007 0;
6008
6009 dw[2] =
6010 __gen_field(values->DepthTestEnable, 31, 31) |
6011 __gen_field(values->DepthTestFunction, 27, 29) |
6012 __gen_field(values->DepthBufferWriteEnable, 26, 26) |
6013 0;
6014
6015 }
6016
6017 struct GEN7_MEMORY_OBJECT_CONTROL_STATE {
6018 uint32_t GraphicsDataTypeGFDT;
6019 uint32_t LLCCacheabilityControlLLCCC;
6020 uint32_t L3CacheabilityControlL3CC;
6021 };
6022
6023 static inline void
6024 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(__gen_user_data *data, void * restrict dst,
6025 const struct GEN7_MEMORY_OBJECT_CONTROL_STATE * restrict values)
6026 {
6027 uint32_t *dw = (uint32_t * restrict) dst;
6028
6029 dw[0] =
6030 __gen_field(values->GraphicsDataTypeGFDT, 2, 2) |
6031 __gen_field(values->LLCCacheabilityControlLLCCC, 1, 1) |
6032 __gen_field(values->L3CacheabilityControlL3CC, 0, 0) |
6033 0;
6034
6035 }
6036
6037 struct GEN7_INTERFACE_DESCRIPTOR_DATA {
6038 uint32_t KernelStartPointer;
6039 #define Multiple 0
6040 #define Single 1
6041 uint32_t SingleProgramFlow;
6042 #define NormalPriority 0
6043 #define HighPriority 1
6044 uint32_t ThreadPriority;
6045 #define IEEE754 0
6046 #define Alternate 1
6047 uint32_t FloatingPointMode;
6048 uint32_t IllegalOpcodeExceptionEnable;
6049 uint32_t MaskStackExceptionEnable;
6050 uint32_t SoftwareExceptionEnable;
6051 uint32_t SamplerStatePointer;
6052 #define Nosamplersused 0
6053 #define Between1and4samplersused 1
6054 #define Between5and8samplersused 2
6055 #define Between9and12samplersused 3
6056 #define Between13and16samplersused 4
6057 uint32_t SamplerCount;
6058 uint32_t BindingTablePointer;
6059 uint32_t BindingTableEntryCount;
6060 uint32_t ConstantURBEntryReadLength;
6061 uint32_t ConstantURBEntryReadOffset;
6062 #define RTNE 0
6063 #define RU 1
6064 #define RD 2
6065 #define RTZ 3
6066 uint32_t RoundingMode;
6067 uint32_t BarrierEnable;
6068 uint32_t SharedLocalMemorySize;
6069 uint32_t NumberofThreadsinGPGPUThreadGroup;
6070 };
6071
6072 static inline void
6073 GEN7_INTERFACE_DESCRIPTOR_DATA_pack(__gen_user_data *data, void * restrict dst,
6074 const struct GEN7_INTERFACE_DESCRIPTOR_DATA * restrict values)
6075 {
6076 uint32_t *dw = (uint32_t * restrict) dst;
6077
6078 dw[0] =
6079 __gen_offset(values->KernelStartPointer, 6, 31) |
6080 0;
6081
6082 dw[1] =
6083 __gen_field(values->SingleProgramFlow, 18, 18) |
6084 __gen_field(values->ThreadPriority, 17, 17) |
6085 __gen_field(values->FloatingPointMode, 16, 16) |
6086 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
6087 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
6088 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
6089 0;
6090
6091 dw[2] =
6092 __gen_offset(values->SamplerStatePointer, 5, 31) |
6093 __gen_field(values->SamplerCount, 2, 4) |
6094 0;
6095
6096 dw[3] =
6097 __gen_offset(values->BindingTablePointer, 5, 15) |
6098 __gen_field(values->BindingTableEntryCount, 0, 4) |
6099 0;
6100
6101 dw[4] =
6102 __gen_field(values->ConstantURBEntryReadLength, 16, 31) |
6103 __gen_field(values->ConstantURBEntryReadOffset, 0, 15) |
6104 0;
6105
6106 dw[5] =
6107 __gen_field(values->RoundingMode, 22, 23) |
6108 __gen_field(values->BarrierEnable, 21, 21) |
6109 __gen_field(values->SharedLocalMemorySize, 16, 20) |
6110 __gen_field(values->NumberofThreadsinGPGPUThreadGroup, 0, 7) |
6111 0;
6112
6113 dw[6] =
6114 0;
6115
6116 dw[7] =
6117 0;
6118
6119 }
6120
6121 struct GEN7_PALETTE_ENTRY {
6122 uint32_t Alpha;
6123 uint32_t Red;
6124 uint32_t Green;
6125 uint32_t Blue;
6126 };
6127
6128 static inline void
6129 GEN7_PALETTE_ENTRY_pack(__gen_user_data *data, void * restrict dst,
6130 const struct GEN7_PALETTE_ENTRY * restrict values)
6131 {
6132 uint32_t *dw = (uint32_t * restrict) dst;
6133
6134 dw[0] =
6135 __gen_field(values->Alpha, 24, 31) |
6136 __gen_field(values->Red, 16, 23) |
6137 __gen_field(values->Green, 8, 15) |
6138 __gen_field(values->Blue, 0, 7) |
6139 0;
6140
6141 }
6142
6143 struct GEN7_SAMPLER_BORDER_COLOR_STATE {
6144 uint32_t BorderColorRedDX100GL;
6145 uint32_t BorderColorAlpha;
6146 uint32_t BorderColorBlue;
6147 uint32_t BorderColorGreen;
6148 uint32_t BorderColorRedDX9;
6149 uint32_t BorderColorGreen0;
6150 uint32_t BorderColorBlue0;
6151 uint32_t BorderColorAlpha0;
6152 };
6153
6154 static inline void
6155 GEN7_SAMPLER_BORDER_COLOR_STATE_pack(__gen_user_data *data, void * restrict dst,
6156 const struct GEN7_SAMPLER_BORDER_COLOR_STATE * restrict values)
6157 {
6158 uint32_t *dw = (uint32_t * restrict) dst;
6159
6160 dw[0] =
6161 __gen_field(values->BorderColorRedDX100GL, 0, 31) |
6162 __gen_field(values->BorderColorAlpha, 24, 31) |
6163 __gen_field(values->BorderColorBlue, 16, 23) |
6164 __gen_field(values->BorderColorGreen, 8, 15) |
6165 __gen_field(values->BorderColorRedDX9, 0, 7) |
6166 0;
6167
6168 dw[1] =
6169 __gen_field(values->BorderColorGreen, 0, 31) |
6170 0;
6171
6172 dw[2] =
6173 __gen_field(values->BorderColorBlue, 0, 31) |
6174 0;
6175
6176 dw[3] =
6177 __gen_field(values->BorderColorAlpha, 0, 31) |
6178 0;
6179
6180 }
6181
6182 struct GEN7_SAMPLER_STATE {
6183 uint32_t SamplerDisable;
6184 #define DX10OGL 0
6185 #define DX9 1
6186 uint32_t TextureBorderColorMode;
6187 #define OGL 1
6188 uint32_t LODPreClampEnable;
6189 uint32_t BaseMipLevel;
6190 #define MIPFILTER_NONE 0
6191 #define MIPFILTER_NEAREST 1
6192 #define MIPFILTER_LINEAR 3
6193 uint32_t MipModeFilter;
6194 #define MAPFILTER_NEAREST 0
6195 #define MAPFILTER_LINEAR 1
6196 #define MAPFILTER_ANISOTROPIC 2
6197 #define MAPFILTER_MONO 6
6198 uint32_t MagModeFilter;
6199 #define MAPFILTER_NEAREST 0
6200 #define MAPFILTER_LINEAR 1
6201 #define MAPFILTER_ANISOTROPIC 2
6202 #define MAPFILTER_MONO 6
6203 uint32_t MinModeFilter;
6204 uint32_t TextureLODBias;
6205 #define LEGACY 0
6206 #define EWAApproximation 1
6207 uint32_t AnisotropicAlgorithm;
6208 uint32_t MinLOD;
6209 uint32_t MaxLOD;
6210 #define PREFILTEROPALWAYS 0
6211 #define PREFILTEROPNEVER 1
6212 #define PREFILTEROPLESS 2
6213 #define PREFILTEROPEQUAL 3
6214 #define PREFILTEROPLEQUAL 4
6215 #define PREFILTEROPGREATER 5
6216 #define PREFILTEROPNOTEQUAL 6
6217 #define PREFILTEROPGEQUAL 7
6218 uint32_t ShadowFunction;
6219 #define PROGRAMMED 0
6220 #define OVERRIDE 1
6221 uint32_t CubeSurfaceControlMode;
6222 uint32_t BorderColorPointer;
6223 uint32_t ChromaKeyEnable;
6224 uint32_t ChromaKeyIndex;
6225 #define KEYFILTER_KILL_ON_ANY_MATCH 0
6226 #define KEYFILTER_REPLACE_BLACK 1
6227 uint32_t ChromaKeyMode;
6228 #define RATIO21 0
6229 #define RATIO41 1
6230 #define RATIO61 2
6231 #define RATIO81 3
6232 #define RATIO101 4
6233 #define RATIO121 5
6234 #define RATIO141 6
6235 #define RATIO161 7
6236 uint32_t MaximumAnisotropy;
6237 uint32_t RAddressMinFilterRoundingEnable;
6238 uint32_t RAddressMagFilterRoundingEnable;
6239 uint32_t VAddressMinFilterRoundingEnable;
6240 uint32_t VAddressMagFilterRoundingEnable;
6241 uint32_t UAddressMinFilterRoundingEnable;
6242 uint32_t UAddressMagFilterRoundingEnable;
6243 #define FULL 0
6244 #define MED 2
6245 #define LOW 3
6246 uint32_t TrilinearFilterQuality;
6247 uint32_t NonnormalizedCoordinateEnable;
6248 uint32_t TCXAddressControlMode;
6249 uint32_t TCYAddressControlMode;
6250 uint32_t TCZAddressControlMode;
6251 };
6252
6253 static inline void
6254 GEN7_SAMPLER_STATE_pack(__gen_user_data *data, void * restrict dst,
6255 const struct GEN7_SAMPLER_STATE * restrict values)
6256 {
6257 uint32_t *dw = (uint32_t * restrict) dst;
6258
6259 dw[0] =
6260 __gen_field(values->SamplerDisable, 31, 31) |
6261 __gen_field(values->TextureBorderColorMode, 29, 29) |
6262 __gen_field(values->LODPreClampEnable, 28, 28) |
6263 __gen_field(values->BaseMipLevel, 22, 26) |
6264 __gen_field(values->MipModeFilter, 20, 21) |
6265 __gen_field(values->MagModeFilter, 17, 19) |
6266 __gen_field(values->MinModeFilter, 14, 16) |
6267 __gen_field(values->TextureLODBias, 1, 13) |
6268 __gen_field(values->AnisotropicAlgorithm, 0, 0) |
6269 0;
6270
6271 dw[1] =
6272 __gen_field(values->MinLOD, 20, 31) |
6273 __gen_field(values->MaxLOD, 8, 19) |
6274 __gen_field(values->ShadowFunction, 1, 3) |
6275 __gen_field(values->CubeSurfaceControlMode, 0, 0) |
6276 0;
6277
6278 dw[2] =
6279 __gen_offset(values->BorderColorPointer, 5, 31) |
6280 0;
6281
6282 dw[3] =
6283 __gen_field(values->ChromaKeyEnable, 25, 25) |
6284 __gen_field(values->ChromaKeyIndex, 23, 24) |
6285 __gen_field(values->ChromaKeyMode, 22, 22) |
6286 __gen_field(values->MaximumAnisotropy, 19, 21) |
6287 __gen_field(values->RAddressMinFilterRoundingEnable, 13, 13) |
6288 __gen_field(values->RAddressMagFilterRoundingEnable, 14, 14) |
6289 __gen_field(values->VAddressMinFilterRoundingEnable, 15, 15) |
6290 __gen_field(values->VAddressMagFilterRoundingEnable, 16, 16) |
6291 __gen_field(values->UAddressMinFilterRoundingEnable, 17, 17) |
6292 __gen_field(values->UAddressMagFilterRoundingEnable, 18, 18) |
6293 __gen_field(values->TrilinearFilterQuality, 11, 12) |
6294 __gen_field(values->NonnormalizedCoordinateEnable, 10, 10) |
6295 __gen_field(values->TCXAddressControlMode, 6, 8) |
6296 __gen_field(values->TCYAddressControlMode, 3, 5) |
6297 __gen_field(values->TCZAddressControlMode, 0, 2) |
6298 0;
6299
6300 }
6301
6302 /* Enum 3D_Prim_Topo_Type */
6303 #define _3DPRIM_POINTLIST 1
6304 #define _3DPRIM_LINELIST 2
6305 #define _3DPRIM_LINESTRIP 3
6306 #define _3DPRIM_TRILIST 4
6307 #define _3DPRIM_TRISTRIP 5
6308 #define _3DPRIM_TRIFAN 6
6309 #define _3DPRIM_QUADLIST 7
6310 #define _3DPRIM_QUADSTRIP 8
6311 #define _3DPRIM_LINELIST_ADJ 9
6312 #define _3DPRIM_LISTSTRIP_ADJ 10
6313 #define _3DPRIM_TRILIST_ADJ 11
6314 #define _3DPRIM_TRISTRIP_ADJ 12
6315 #define _3DPRIM_TRISTRIP_REVERSE 13
6316 #define _3DPRIM_POLYGON 14
6317 #define _3DPRIM_RECTLIST 15
6318 #define _3DPRIM_LINELOOP 16
6319 #define _3DPRIM_POINTLIST_BF 17
6320 #define _3DPRIM_LINESTRIP_CONT 18
6321 #define _3DPRIM_LINESTRIP_BF 19
6322 #define _3DPRIM_LINESTRIP_CONT_BF 20
6323 #define _3DPRIM_TRIFAN_NOSTIPPLE 22
6324 #define _3DPRIM_PATCHLIST_1 32
6325 #define _3DPRIM_PATCHLIST_2 33
6326 #define _3DPRIM_PATCHLIST_3 34
6327 #define _3DPRIM_PATCHLIST_4 35
6328 #define _3DPRIM_PATCHLIST_5 36
6329 #define _3DPRIM_PATCHLIST_6 37
6330 #define _3DPRIM_PATCHLIST_7 38
6331 #define _3DPRIM_PATCHLIST_8 39
6332 #define _3DPRIM_PATCHLIST_9 40
6333 #define _3DPRIM_PATCHLIST_10 41
6334 #define _3DPRIM_PATCHLIST_11 42
6335 #define _3DPRIM_PATCHLIST_12 43
6336 #define _3DPRIM_PATCHLIST_13 44
6337 #define _3DPRIM_PATCHLIST_14 45
6338 #define _3DPRIM_PATCHLIST_15 46
6339 #define _3DPRIM_PATCHLIST_16 47
6340 #define _3DPRIM_PATCHLIST_17 48
6341 #define _3DPRIM_PATCHLIST_18 49
6342 #define _3DPRIM_PATCHLIST_19 50
6343 #define _3DPRIM_PATCHLIST_20 51
6344 #define _3DPRIM_PATCHLIST_21 52
6345 #define _3DPRIM_PATCHLIST_22 53
6346 #define _3DPRIM_PATCHLIST_23 54
6347 #define _3DPRIM_PATCHLIST_24 55
6348 #define _3DPRIM_PATCHLIST_25 56
6349 #define _3DPRIM_PATCHLIST_26 57
6350 #define _3DPRIM_PATCHLIST_27 58
6351 #define _3DPRIM_PATCHLIST_28 59
6352 #define _3DPRIM_PATCHLIST_29 60
6353 #define _3DPRIM_PATCHLIST_30 61
6354 #define _3DPRIM_PATCHLIST_31 62
6355 #define _3DPRIM_PATCHLIST_32 63
6356
6357 /* Enum 3D_Vertex_Component_Control */
6358 #define VFCOMP_NOSTORE 0
6359 #define VFCOMP_STORE_SRC 1
6360 #define VFCOMP_STORE_0 2
6361 #define VFCOMP_STORE_1_FP 3
6362 #define VFCOMP_STORE_1_INT 4
6363 #define VFCOMP_STORE_VID 5
6364 #define VFCOMP_STORE_IID 6
6365 #define VFCOMP_STORE_PID 7
6366
6367 /* Enum 3D_Compare_Function */
6368 #define COMPAREFUNCTION_ALWAYS 0
6369 #define COMPAREFUNCTION_NEVER 1
6370 #define COMPAREFUNCTION_LESS 2
6371 #define COMPAREFUNCTION_EQUAL 3
6372 #define COMPAREFUNCTION_LEQUAL 4
6373 #define COMPAREFUNCTION_GREATER 5
6374 #define COMPAREFUNCTION_NOTEQUAL 6
6375 #define COMPAREFUNCTION_GEQUAL 7
6376
6377 /* Enum SURFACE_FORMAT */
6378 #define R32G32B32A32_FLOAT 0
6379 #define R32G32B32A32_SINT 1
6380 #define R32G32B32A32_UINT 2
6381 #define R32G32B32A32_UNORM 3
6382 #define R32G32B32A32_SNORM 4
6383 #define R64G64_FLOAT 5
6384 #define R32G32B32X32_FLOAT 6
6385 #define R32G32B32A32_SSCALED 7
6386 #define R32G32B32A32_USCALED 8
6387 #define R32G32B32A32_SFIXED 32
6388 #define R64G64_PASSTHRU 33
6389 #define R32G32B32_FLOAT 64
6390 #define R32G32B32_SINT 65
6391 #define R32G32B32_UINT 66
6392 #define R32G32B32_UNORM 67
6393 #define R32G32B32_SNORM 68
6394 #define R32G32B32_SSCALED 69
6395 #define R32G32B32_USCALED 70
6396 #define R32G32B32_SFIXED 80
6397 #define R16G16B16A16_UNORM 128
6398 #define R16G16B16A16_SNORM 129
6399 #define R16G16B16A16_SINT 130
6400 #define R16G16B16A16_UINT 131
6401 #define R16G16B16A16_FLOAT 132
6402 #define R32G32_FLOAT 133
6403 #define R32G32_SINT 134
6404 #define R32G32_UINT 135
6405 #define R32_FLOAT_X8X24_TYPELESS 136
6406 #define X32_TYPELESS_G8X24_UINT 137
6407 #define L32A32_FLOAT 138
6408 #define R32G32_UNORM 139
6409 #define R32G32_SNORM 140
6410 #define R64_FLOAT 141
6411 #define R16G16B16X16_UNORM 142
6412 #define R16G16B16X16_FLOAT 143
6413 #define A32X32_FLOAT 144
6414 #define L32X32_FLOAT 145
6415 #define I32X32_FLOAT 146
6416 #define R16G16B16A16_SSCALED 147
6417 #define R16G16B16A16_USCALED 148
6418 #define R32G32_SSCALED 149
6419 #define R32G32_USCALED 150
6420 #define R32G32_SFIXED 160
6421 #define R64_PASSTHRU 161
6422 #define B8G8R8A8_UNORM 192
6423 #define B8G8R8A8_UNORM_SRGB 193
6424 #define R10G10B10A2_UNORM 194
6425 #define R10G10B10A2_UNORM_SRGB 195
6426 #define R10G10B10A2_UINT 196
6427 #define R10G10B10_SNORM_A2_UNORM 197
6428 #define R8G8B8A8_UNORM 199
6429 #define R8G8B8A8_UNORM_SRGB 200
6430 #define R8G8B8A8_SNORM 201
6431 #define R8G8B8A8_SINT 202
6432 #define R8G8B8A8_UINT 203
6433 #define R16G16_UNORM 204
6434 #define R16G16_SNORM 205
6435 #define R16G16_SINT 206
6436 #define R16G16_UINT 207
6437 #define R16G16_FLOAT 208
6438 #define B10G10R10A2_UNORM 209
6439 #define B10G10R10A2_UNORM_SRGB 210
6440 #define R11G11B10_FLOAT 211
6441 #define R32_SINT 214
6442 #define R32_UINT 215
6443 #define R32_FLOAT 216
6444 #define R24_UNORM_X8_TYPELESS 217
6445 #define X24_TYPELESS_G8_UINT 218
6446 #define L32_UNORM 221
6447 #define A32_UNORM 222
6448 #define L16A16_UNORM 223
6449 #define I24X8_UNORM 224
6450 #define L24X8_UNORM 225
6451 #define A24X8_UNORM 226
6452 #define I32_FLOAT 227
6453 #define L32_FLOAT 228
6454 #define A32_FLOAT 229
6455 #define X8B8_UNORM_G8R8_SNORM 230
6456 #define A8X8_UNORM_G8R8_SNORM 231
6457 #define B8X8_UNORM_G8R8_SNORM 232
6458 #define B8G8R8X8_UNORM 233
6459 #define B8G8R8X8_UNORM_SRGB 234
6460 #define R8G8B8X8_UNORM 235
6461 #define R8G8B8X8_UNORM_SRGB 236
6462 #define R9G9B9E5_SHAREDEXP 237
6463 #define B10G10R10X2_UNORM 238
6464 #define L16A16_FLOAT 240
6465 #define R32_UNORM 241
6466 #define R32_SNORM 242
6467 #define R10G10B10X2_USCALED 243
6468 #define R8G8B8A8_SSCALED 244
6469 #define R8G8B8A8_USCALED 245
6470 #define R16G16_SSCALED 246
6471 #define R16G16_USCALED 247
6472 #define R32_SSCALED 248
6473 #define R32_USCALED 249
6474 #define B5G6R5_UNORM 256
6475 #define B5G6R5_UNORM_SRGB 257
6476 #define B5G5R5A1_UNORM 258
6477 #define B5G5R5A1_UNORM_SRGB 259
6478 #define B4G4R4A4_UNORM 260
6479 #define B4G4R4A4_UNORM_SRGB 261
6480 #define R8G8_UNORM 262
6481 #define R8G8_SNORM 263
6482 #define R8G8_SINT 264
6483 #define R8G8_UINT 265
6484 #define R16_UNORM 266
6485 #define R16_SNORM 267
6486 #define R16_SINT 268
6487 #define R16_UINT 269
6488 #define R16_FLOAT 270
6489 #define A8P8_UNORM_PALETTE0 271
6490 #define A8P8_UNORM_PALETTE1 272
6491 #define I16_UNORM 273
6492 #define L16_UNORM 274
6493 #define A16_UNORM 275
6494 #define L8A8_UNORM 276
6495 #define I16_FLOAT 277
6496 #define L16_FLOAT 278
6497 #define A16_FLOAT 279
6498 #define L8A8_UNORM_SRGB 280
6499 #define R5G5_SNORM_B6_UNORM 281
6500 #define B5G5R5X1_UNORM 282
6501 #define B5G5R5X1_UNORM_SRGB 283
6502 #define R8G8_SSCALED 284
6503 #define R8G8_USCALED 285
6504 #define R16_SSCALED 286
6505 #define R16_USCALED 287
6506 #define P8A8_UNORM_PALETTE0 290
6507 #define P8A8_UNORM_PALETTE1 291
6508 #define A1B5G5R5_UNORM 292
6509 #define A4B4G4R4_UNORM 293
6510 #define L8A8_UINT 294
6511 #define L8A8_SINT 295
6512 #define R8_UNORM 320
6513 #define R8_SNORM 321
6514 #define R8_SINT 322
6515 #define R8_UINT 323
6516 #define A8_UNORM 324
6517 #define I8_UNORM 325
6518 #define L8_UNORM 326
6519 #define P4A4_UNORM_PALETTE0 327
6520 #define A4P4_UNORM_PALETTE0 328
6521 #define R8_SSCALED 329
6522 #define R8_USCALED 330
6523 #define P8_UNORM_PALETTE0 331
6524 #define L8_UNORM_SRGB 332
6525 #define P8_UNORM_PALETTE1 333
6526 #define P4A4_UNORM_PALETTE1 334
6527 #define A4P4_UNORM_PALETTE1 335
6528 #define Y8_UNORM 336
6529 #define L8_UINT 338
6530 #define L8_SINT 339
6531 #define I8_UINT 340
6532 #define I8_SINT 341
6533 #define DXT1_RGB_SRGB 384
6534 #define R1_UNORM 385
6535 #define YCRCB_NORMAL 386
6536 #define YCRCB_SWAPUVY 387
6537 #define P2_UNORM_PALETTE0 388
6538 #define P2_UNORM_PALETTE1 389
6539 #define BC1_UNORM 390
6540 #define BC2_UNORM 391
6541 #define BC3_UNORM 392
6542 #define BC4_UNORM 393
6543 #define BC5_UNORM 394
6544 #define BC1_UNORM_SRGB 395
6545 #define BC2_UNORM_SRGB 396
6546 #define BC3_UNORM_SRGB 397
6547 #define MONO8 398
6548 #define YCRCB_SWAPUV 399
6549 #define YCRCB_SWAPY 400
6550 #define DXT1_RGB 401
6551 #define FXT1 402
6552 #define R8G8B8_UNORM 403
6553 #define R8G8B8_SNORM 404
6554 #define R8G8B8_SSCALED 405
6555 #define R8G8B8_USCALED 406
6556 #define R64G64B64A64_FLOAT 407
6557 #define R64G64B64_FLOAT 408
6558 #define BC4_SNORM 409
6559 #define BC5_SNORM 410
6560 #define R16G16B16_FLOAT 411
6561 #define R16G16B16_UNORM 412
6562 #define R16G16B16_SNORM 413
6563 #define R16G16B16_SSCALED 414
6564 #define R16G16B16_USCALED 415
6565 #define BC6H_SF16 417
6566 #define BC7_UNORM 418
6567 #define BC7_UNORM_SRGB 419
6568 #define BC6H_UF16 420
6569 #define PLANAR_420_8 421
6570 #define R8G8B8_UNORM_SRGB 424
6571 #define ETC1_RGB8 425
6572 #define ETC2_RGB8 426
6573 #define EAC_R11 427
6574 #define EAC_RG11 428
6575 #define EAC_SIGNED_R11 429
6576 #define EAC_SIGNED_RG11 430
6577 #define ETC2_SRGB8 431
6578 #define R16G16B16_UINT 432
6579 #define R16G16B16_SINT 433
6580 #define R32_SFIXED 434
6581 #define R10G10B10A2_SNORM 435
6582 #define R10G10B10A2_USCALED 436
6583 #define R10G10B10A2_SSCALED 437
6584 #define R10G10B10A2_SINT 438
6585 #define B10G10R10A2_SNORM 439
6586 #define B10G10R10A2_USCALED 440
6587 #define B10G10R10A2_SSCALED 441
6588 #define B10G10R10A2_UINT 442
6589 #define B10G10R10A2_SINT 443
6590 #define R64G64B64A64_PASSTHRU 444
6591 #define R64G64B64_PASSTHRU 445
6592 #define ETC2_RGB8_PTA 448
6593 #define ETC2_SRGB8_PTA 449
6594 #define ETC2_EAC_RGBA8 450
6595 #define ETC2_EAC_SRGB8_A8 451
6596 #define R8G8B8_UINT 456
6597 #define R8G8B8_SINT 457
6598 #define RAW 511
6599
6600 /* Enum Texture Coordinate Mode */
6601 #define TCM_WRAP 0
6602 #define TCM_MIRROR 1
6603 #define TCM_CLAMP 2
6604 #define TCM_CUBE 3
6605 #define TCM_CLAMP_BORDER 4
6606 #define TCM_MIRROR_ONCE 5
6607