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vk/headers: Handle MBO fields
[mesa.git] / src / vulkan / gen7_pack.h
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24
25 /* Instructions, enums and structures for IVB.
26 *
27 * This file has been generated, do not hand edit.
28 */
29
30 #pragma once
31
32 #include <stdio.h>
33 #include <assert.h>
34
35 #ifndef __gen_validate_value
36 #define __gen_validate_value(x)
37 #endif
38
39 #ifndef __gen_field_functions
40 #define __gen_field_functions
41
42 union __gen_value {
43 float f;
44 uint32_t dw;
45 };
46
47 static inline uint64_t
48 __gen_mbo(uint32_t start, uint32_t end)
49 {
50 return (~0ul >> (64 - (end - start + 1))) << start;
51 }
52
53 static inline uint64_t
54 __gen_field(uint64_t v, uint32_t start, uint32_t end)
55 {
56 __gen_validate_value(v);
57 #if DEBUG
58 if (end - start + 1 < 64)
59 assert(v < 1ul << (end - start + 1));
60 #endif
61
62 return v << start;
63 }
64
65 static inline uint64_t
66 __gen_offset(uint64_t v, uint32_t start, uint32_t end)
67 {
68 __gen_validate_value(v);
69 #if DEBUG
70 uint64_t mask = (~0ul >> (64 - (end - start + 1))) << start;
71
72 assert((v & ~mask) == 0);
73 #endif
74
75 return v;
76 }
77
78 static inline uint32_t
79 __gen_float(float v)
80 {
81 __gen_validate_value(v);
82 return ((union __gen_value) { .f = (v) }).dw;
83 }
84
85 #ifndef __gen_address_type
86 #error #define __gen_address_type before including this file
87 #endif
88
89 #ifndef __gen_user_data
90 #error #define __gen_combine_address before including this file
91 #endif
92
93 #endif
94
95 #define GEN7_3DSTATE_URB_VS_length 0x00000002
96 #define GEN7_3DSTATE_URB_VS_length_bias 0x00000002
97 #define GEN7_3DSTATE_URB_VS_header \
98 .CommandType = 3, \
99 .CommandSubType = 3, \
100 ._3DCommandOpcode = 0, \
101 ._3DCommandSubOpcode = 48, \
102 .DwordLength = 0
103
104 struct GEN7_3DSTATE_URB_VS {
105 uint32_t CommandType;
106 uint32_t CommandSubType;
107 uint32_t _3DCommandOpcode;
108 uint32_t _3DCommandSubOpcode;
109 uint32_t DwordLength;
110 uint32_t VSURBStartingAddress;
111 uint32_t VSURBEntryAllocationSize;
112 uint32_t VSNumberofURBEntries;
113 };
114
115 static inline void
116 GEN7_3DSTATE_URB_VS_pack(__gen_user_data *data, void * restrict dst,
117 const struct GEN7_3DSTATE_URB_VS * restrict values)
118 {
119 uint32_t *dw = (uint32_t * restrict) dst;
120
121 dw[0] =
122 __gen_field(values->CommandType, 29, 31) |
123 __gen_field(values->CommandSubType, 27, 28) |
124 __gen_field(values->_3DCommandOpcode, 24, 26) |
125 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
126 __gen_field(values->DwordLength, 0, 7) |
127 0;
128
129 dw[1] =
130 __gen_field(values->VSURBStartingAddress, 25, 29) |
131 __gen_field(values->VSURBEntryAllocationSize, 16, 24) |
132 __gen_field(values->VSNumberofURBEntries, 0, 15) |
133 0;
134
135 }
136
137 #define GEN7_MI_STORE_REGISTER_MEM_length 0x00000003
138 #define GEN7_MI_STORE_REGISTER_MEM_length_bias 0x00000002
139 #define GEN7_MI_STORE_REGISTER_MEM_header \
140 .CommandType = 0, \
141 .MICommandOpcode = 36, \
142 .DwordLength = 1
143
144 struct GEN7_MI_STORE_REGISTER_MEM {
145 uint32_t CommandType;
146 uint32_t MICommandOpcode;
147 uint32_t UseGlobalGTT;
148 uint32_t DwordLength;
149 uint32_t RegisterAddress;
150 __gen_address_type MemoryAddress;
151 };
152
153 static inline void
154 GEN7_MI_STORE_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
155 const struct GEN7_MI_STORE_REGISTER_MEM * restrict values)
156 {
157 uint32_t *dw = (uint32_t * restrict) dst;
158
159 dw[0] =
160 __gen_field(values->CommandType, 29, 31) |
161 __gen_field(values->MICommandOpcode, 23, 28) |
162 __gen_field(values->UseGlobalGTT, 22, 22) |
163 __gen_field(values->DwordLength, 0, 7) |
164 0;
165
166 dw[1] =
167 __gen_offset(values->RegisterAddress, 2, 22) |
168 0;
169
170 uint32_t dw2 =
171 0;
172
173 dw[2] =
174 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
175
176 }
177
178 #define GEN7_PIPELINE_SELECT_length 0x00000001
179 #define GEN7_PIPELINE_SELECT_length_bias 0x00000001
180 #define GEN7_PIPELINE_SELECT_header \
181 .CommandType = 3, \
182 .CommandSubType = 1, \
183 ._3DCommandOpcode = 1, \
184 ._3DCommandSubOpcode = 4
185
186 struct GEN7_PIPELINE_SELECT {
187 uint32_t CommandType;
188 uint32_t CommandSubType;
189 uint32_t _3DCommandOpcode;
190 uint32_t _3DCommandSubOpcode;
191 #define _3D 0
192 #define Media 1
193 #define GPGPU 2
194 uint32_t PipelineSelection;
195 };
196
197 static inline void
198 GEN7_PIPELINE_SELECT_pack(__gen_user_data *data, void * restrict dst,
199 const struct GEN7_PIPELINE_SELECT * restrict values)
200 {
201 uint32_t *dw = (uint32_t * restrict) dst;
202
203 dw[0] =
204 __gen_field(values->CommandType, 29, 31) |
205 __gen_field(values->CommandSubType, 27, 28) |
206 __gen_field(values->_3DCommandOpcode, 24, 26) |
207 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
208 __gen_field(values->PipelineSelection, 0, 1) |
209 0;
210
211 }
212
213 #define GEN7_STATE_BASE_ADDRESS_length 0x0000000a
214 #define GEN7_STATE_BASE_ADDRESS_length_bias 0x00000002
215 #define GEN7_STATE_BASE_ADDRESS_header \
216 .CommandType = 3, \
217 .CommandSubType = 0, \
218 ._3DCommandOpcode = 1, \
219 ._3DCommandSubOpcode = 1, \
220 .DwordLength = 8
221
222 struct GEN7_MEMORY_OBJECT_CONTROL_STATE {
223 uint32_t GraphicsDataTypeGFDT;
224 uint32_t LLCCacheabilityControlLLCCC;
225 uint32_t L3CacheabilityControlL3CC;
226 };
227
228 static inline void
229 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(__gen_user_data *data, void * restrict dst,
230 const struct GEN7_MEMORY_OBJECT_CONTROL_STATE * restrict values)
231 {
232 uint32_t *dw = (uint32_t * restrict) dst;
233
234 dw[0] =
235 __gen_field(values->GraphicsDataTypeGFDT, 2, 2) |
236 __gen_field(values->LLCCacheabilityControlLLCCC, 1, 1) |
237 __gen_field(values->L3CacheabilityControlL3CC, 0, 0) |
238 0;
239
240 }
241
242 struct GEN7_STATE_BASE_ADDRESS {
243 uint32_t CommandType;
244 uint32_t CommandSubType;
245 uint32_t _3DCommandOpcode;
246 uint32_t _3DCommandSubOpcode;
247 uint32_t DwordLength;
248 __gen_address_type GeneralStateBaseAddress;
249 struct GEN7_MEMORY_OBJECT_CONTROL_STATE GeneralStateMemoryObjectControlState;
250 struct GEN7_MEMORY_OBJECT_CONTROL_STATE StatelessDataPortAccessMemoryObjectControlState;
251 uint32_t StatelessDataPortAccessForceWriteThru;
252 uint32_t GeneralStateBaseAddressModifyEnable;
253 __gen_address_type SurfaceStateBaseAddress;
254 struct GEN7_MEMORY_OBJECT_CONTROL_STATE SurfaceStateMemoryObjectControlState;
255 uint32_t SurfaceStateBaseAddressModifyEnable;
256 __gen_address_type DynamicStateBaseAddress;
257 struct GEN7_MEMORY_OBJECT_CONTROL_STATE DynamicStateMemoryObjectControlState;
258 uint32_t DynamicStateBaseAddressModifyEnable;
259 __gen_address_type IndirectObjectBaseAddress;
260 struct GEN7_MEMORY_OBJECT_CONTROL_STATE IndirectObjectMemoryObjectControlState;
261 uint32_t IndirectObjectBaseAddressModifyEnable;
262 __gen_address_type InstructionBaseAddress;
263 struct GEN7_MEMORY_OBJECT_CONTROL_STATE InstructionMemoryObjectControlState;
264 uint32_t InstructionBaseAddressModifyEnable;
265 __gen_address_type GeneralStateAccessUpperBound;
266 uint32_t GeneralStateAccessUpperBoundModifyEnable;
267 __gen_address_type DynamicStateAccessUpperBound;
268 uint32_t DynamicStateAccessUpperBoundModifyEnable;
269 __gen_address_type IndirectObjectAccessUpperBound;
270 uint32_t IndirectObjectAccessUpperBoundModifyEnable;
271 __gen_address_type InstructionAccessUpperBound;
272 uint32_t InstructionAccessUpperBoundModifyEnable;
273 };
274
275 static inline void
276 GEN7_STATE_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
277 const struct GEN7_STATE_BASE_ADDRESS * restrict values)
278 {
279 uint32_t *dw = (uint32_t * restrict) dst;
280
281 dw[0] =
282 __gen_field(values->CommandType, 29, 31) |
283 __gen_field(values->CommandSubType, 27, 28) |
284 __gen_field(values->_3DCommandOpcode, 24, 26) |
285 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
286 __gen_field(values->DwordLength, 0, 7) |
287 0;
288
289 uint32_t dw_GeneralStateMemoryObjectControlState;
290 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_GeneralStateMemoryObjectControlState, &values->GeneralStateMemoryObjectControlState);
291 uint32_t dw_StatelessDataPortAccessMemoryObjectControlState;
292 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StatelessDataPortAccessMemoryObjectControlState, &values->StatelessDataPortAccessMemoryObjectControlState);
293 uint32_t dw1 =
294 __gen_field(dw_GeneralStateMemoryObjectControlState, 8, 11) |
295 __gen_field(dw_StatelessDataPortAccessMemoryObjectControlState, 4, 7) |
296 __gen_field(values->StatelessDataPortAccessForceWriteThru, 3, 3) |
297 __gen_field(values->GeneralStateBaseAddressModifyEnable, 0, 0) |
298 0;
299
300 dw[1] =
301 __gen_combine_address(data, &dw[1], values->GeneralStateBaseAddress, dw1);
302
303 uint32_t dw_SurfaceStateMemoryObjectControlState;
304 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceStateMemoryObjectControlState, &values->SurfaceStateMemoryObjectControlState);
305 uint32_t dw2 =
306 __gen_field(dw_SurfaceStateMemoryObjectControlState, 8, 11) |
307 __gen_field(values->SurfaceStateBaseAddressModifyEnable, 0, 0) |
308 0;
309
310 dw[2] =
311 __gen_combine_address(data, &dw[2], values->SurfaceStateBaseAddress, dw2);
312
313 uint32_t dw_DynamicStateMemoryObjectControlState;
314 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DynamicStateMemoryObjectControlState, &values->DynamicStateMemoryObjectControlState);
315 uint32_t dw3 =
316 __gen_field(dw_DynamicStateMemoryObjectControlState, 8, 11) |
317 __gen_field(values->DynamicStateBaseAddressModifyEnable, 0, 0) |
318 0;
319
320 dw[3] =
321 __gen_combine_address(data, &dw[3], values->DynamicStateBaseAddress, dw3);
322
323 uint32_t dw_IndirectObjectMemoryObjectControlState;
324 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_IndirectObjectMemoryObjectControlState, &values->IndirectObjectMemoryObjectControlState);
325 uint32_t dw4 =
326 __gen_field(dw_IndirectObjectMemoryObjectControlState, 8, 11) |
327 __gen_field(values->IndirectObjectBaseAddressModifyEnable, 0, 0) |
328 0;
329
330 dw[4] =
331 __gen_combine_address(data, &dw[4], values->IndirectObjectBaseAddress, dw4);
332
333 uint32_t dw_InstructionMemoryObjectControlState;
334 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_InstructionMemoryObjectControlState, &values->InstructionMemoryObjectControlState);
335 uint32_t dw5 =
336 __gen_field(dw_InstructionMemoryObjectControlState, 8, 11) |
337 __gen_field(values->InstructionBaseAddressModifyEnable, 0, 0) |
338 0;
339
340 dw[5] =
341 __gen_combine_address(data, &dw[5], values->InstructionBaseAddress, dw5);
342
343 uint32_t dw6 =
344 __gen_field(values->GeneralStateAccessUpperBoundModifyEnable, 0, 0) |
345 0;
346
347 dw[6] =
348 __gen_combine_address(data, &dw[6], values->GeneralStateAccessUpperBound, dw6);
349
350 uint32_t dw7 =
351 __gen_field(values->DynamicStateAccessUpperBoundModifyEnable, 0, 0) |
352 0;
353
354 dw[7] =
355 __gen_combine_address(data, &dw[7], values->DynamicStateAccessUpperBound, dw7);
356
357 uint32_t dw8 =
358 __gen_field(values->IndirectObjectAccessUpperBoundModifyEnable, 0, 0) |
359 0;
360
361 dw[8] =
362 __gen_combine_address(data, &dw[8], values->IndirectObjectAccessUpperBound, dw8);
363
364 uint32_t dw9 =
365 __gen_field(values->InstructionAccessUpperBoundModifyEnable, 0, 0) |
366 0;
367
368 dw[9] =
369 __gen_combine_address(data, &dw[9], values->InstructionAccessUpperBound, dw9);
370
371 }
372
373 #define GEN7_STATE_PREFETCH_length 0x00000002
374 #define GEN7_STATE_PREFETCH_length_bias 0x00000002
375 #define GEN7_STATE_PREFETCH_header \
376 .CommandType = 3, \
377 .CommandSubType = 0, \
378 ._3DCommandOpcode = 0, \
379 ._3DCommandSubOpcode = 3, \
380 .DwordLength = 0
381
382 struct GEN7_STATE_PREFETCH {
383 uint32_t CommandType;
384 uint32_t CommandSubType;
385 uint32_t _3DCommandOpcode;
386 uint32_t _3DCommandSubOpcode;
387 uint32_t DwordLength;
388 __gen_address_type PrefetchPointer;
389 uint32_t PrefetchCount;
390 };
391
392 static inline void
393 GEN7_STATE_PREFETCH_pack(__gen_user_data *data, void * restrict dst,
394 const struct GEN7_STATE_PREFETCH * restrict values)
395 {
396 uint32_t *dw = (uint32_t * restrict) dst;
397
398 dw[0] =
399 __gen_field(values->CommandType, 29, 31) |
400 __gen_field(values->CommandSubType, 27, 28) |
401 __gen_field(values->_3DCommandOpcode, 24, 26) |
402 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
403 __gen_field(values->DwordLength, 0, 7) |
404 0;
405
406 uint32_t dw1 =
407 __gen_field(values->PrefetchCount, 0, 2) |
408 0;
409
410 dw[1] =
411 __gen_combine_address(data, &dw[1], values->PrefetchPointer, dw1);
412
413 }
414
415 #define GEN7_STATE_SIP_length 0x00000002
416 #define GEN7_STATE_SIP_length_bias 0x00000002
417 #define GEN7_STATE_SIP_header \
418 .CommandType = 3, \
419 .CommandSubType = 0, \
420 ._3DCommandOpcode = 1, \
421 ._3DCommandSubOpcode = 2, \
422 .DwordLength = 0
423
424 struct GEN7_STATE_SIP {
425 uint32_t CommandType;
426 uint32_t CommandSubType;
427 uint32_t _3DCommandOpcode;
428 uint32_t _3DCommandSubOpcode;
429 uint32_t DwordLength;
430 uint32_t SystemInstructionPointer;
431 };
432
433 static inline void
434 GEN7_STATE_SIP_pack(__gen_user_data *data, void * restrict dst,
435 const struct GEN7_STATE_SIP * restrict values)
436 {
437 uint32_t *dw = (uint32_t * restrict) dst;
438
439 dw[0] =
440 __gen_field(values->CommandType, 29, 31) |
441 __gen_field(values->CommandSubType, 27, 28) |
442 __gen_field(values->_3DCommandOpcode, 24, 26) |
443 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
444 __gen_field(values->DwordLength, 0, 7) |
445 0;
446
447 dw[1] =
448 __gen_offset(values->SystemInstructionPointer, 4, 31) |
449 0;
450
451 }
452
453 #define GEN7_SWTESS_BASE_ADDRESS_length 0x00000002
454 #define GEN7_SWTESS_BASE_ADDRESS_length_bias 0x00000002
455 #define GEN7_SWTESS_BASE_ADDRESS_header \
456 .CommandType = 3, \
457 .CommandSubType = 0, \
458 ._3DCommandOpcode = 1, \
459 ._3DCommandSubOpcode = 3, \
460 .DwordLength = 0
461
462 struct GEN7_SWTESS_BASE_ADDRESS {
463 uint32_t CommandType;
464 uint32_t CommandSubType;
465 uint32_t _3DCommandOpcode;
466 uint32_t _3DCommandSubOpcode;
467 uint32_t DwordLength;
468 __gen_address_type SWTessellationBaseAddress;
469 struct GEN7_MEMORY_OBJECT_CONTROL_STATE SWTessellationMemoryObjectControlState;
470 };
471
472 static inline void
473 GEN7_SWTESS_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
474 const struct GEN7_SWTESS_BASE_ADDRESS * restrict values)
475 {
476 uint32_t *dw = (uint32_t * restrict) dst;
477
478 dw[0] =
479 __gen_field(values->CommandType, 29, 31) |
480 __gen_field(values->CommandSubType, 27, 28) |
481 __gen_field(values->_3DCommandOpcode, 24, 26) |
482 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
483 __gen_field(values->DwordLength, 0, 7) |
484 0;
485
486 uint32_t dw_SWTessellationMemoryObjectControlState;
487 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SWTessellationMemoryObjectControlState, &values->SWTessellationMemoryObjectControlState);
488 uint32_t dw1 =
489 __gen_field(dw_SWTessellationMemoryObjectControlState, 8, 11) |
490 0;
491
492 dw[1] =
493 __gen_combine_address(data, &dw[1], values->SWTessellationBaseAddress, dw1);
494
495 }
496
497 #define GEN7_3DPRIMITIVE_length 0x00000007
498 #define GEN7_3DPRIMITIVE_length_bias 0x00000002
499 #define GEN7_3DPRIMITIVE_header \
500 .CommandType = 3, \
501 .CommandSubType = 3, \
502 ._3DCommandOpcode = 3, \
503 ._3DCommandSubOpcode = 0, \
504 .DwordLength = 5
505
506 struct GEN7_3DPRIMITIVE {
507 uint32_t CommandType;
508 uint32_t CommandSubType;
509 uint32_t _3DCommandOpcode;
510 uint32_t _3DCommandSubOpcode;
511 uint32_t IndirectParameterEnable;
512 uint32_t PredicateEnable;
513 uint32_t DwordLength;
514 uint32_t EndOffsetEnable;
515 #define SEQUENTIAL 0
516 #define RANDOM 1
517 uint32_t VertexAccessType;
518 uint32_t PrimitiveTopologyType;
519 uint32_t VertexCountPerInstance;
520 uint32_t StartVertexLocation;
521 uint32_t InstanceCount;
522 uint32_t StartInstanceLocation;
523 uint32_t BaseVertexLocation;
524 };
525
526 static inline void
527 GEN7_3DPRIMITIVE_pack(__gen_user_data *data, void * restrict dst,
528 const struct GEN7_3DPRIMITIVE * restrict values)
529 {
530 uint32_t *dw = (uint32_t * restrict) dst;
531
532 dw[0] =
533 __gen_field(values->CommandType, 29, 31) |
534 __gen_field(values->CommandSubType, 27, 28) |
535 __gen_field(values->_3DCommandOpcode, 24, 26) |
536 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
537 __gen_field(values->IndirectParameterEnable, 10, 10) |
538 __gen_field(values->PredicateEnable, 8, 8) |
539 __gen_field(values->DwordLength, 0, 7) |
540 0;
541
542 dw[1] =
543 __gen_field(values->EndOffsetEnable, 9, 9) |
544 __gen_field(values->VertexAccessType, 8, 8) |
545 __gen_field(values->PrimitiveTopologyType, 0, 5) |
546 0;
547
548 dw[2] =
549 __gen_field(values->VertexCountPerInstance, 0, 31) |
550 0;
551
552 dw[3] =
553 __gen_field(values->StartVertexLocation, 0, 31) |
554 0;
555
556 dw[4] =
557 __gen_field(values->InstanceCount, 0, 31) |
558 0;
559
560 dw[5] =
561 __gen_field(values->StartInstanceLocation, 0, 31) |
562 0;
563
564 dw[6] =
565 __gen_field(values->BaseVertexLocation, 0, 31) |
566 0;
567
568 }
569
570 #define GEN7_3DSTATE_AA_LINE_PARAMETERS_length 0x00000003
571 #define GEN7_3DSTATE_AA_LINE_PARAMETERS_length_bias 0x00000002
572 #define GEN7_3DSTATE_AA_LINE_PARAMETERS_header \
573 .CommandType = 3, \
574 .CommandSubType = 3, \
575 ._3DCommandOpcode = 1, \
576 ._3DCommandSubOpcode = 10, \
577 .DwordLength = 1
578
579 struct GEN7_3DSTATE_AA_LINE_PARAMETERS {
580 uint32_t CommandType;
581 uint32_t CommandSubType;
582 uint32_t _3DCommandOpcode;
583 uint32_t _3DCommandSubOpcode;
584 uint32_t DwordLength;
585 float AACoverageBias;
586 float AACoverageSlope;
587 float AACoverageEndCapBias;
588 float AACoverageEndCapSlope;
589 };
590
591 static inline void
592 GEN7_3DSTATE_AA_LINE_PARAMETERS_pack(__gen_user_data *data, void * restrict dst,
593 const struct GEN7_3DSTATE_AA_LINE_PARAMETERS * restrict values)
594 {
595 uint32_t *dw = (uint32_t * restrict) dst;
596
597 dw[0] =
598 __gen_field(values->CommandType, 29, 31) |
599 __gen_field(values->CommandSubType, 27, 28) |
600 __gen_field(values->_3DCommandOpcode, 24, 26) |
601 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
602 __gen_field(values->DwordLength, 0, 7) |
603 0;
604
605 dw[1] =
606 __gen_field(values->AACoverageBias * (1 << 8), 16, 23) |
607 __gen_field(values->AACoverageSlope * (1 << 8), 0, 7) |
608 0;
609
610 dw[2] =
611 __gen_field(values->AACoverageEndCapBias * (1 << 8), 16, 23) |
612 __gen_field(values->AACoverageEndCapSlope * (1 << 8), 0, 7) |
613 0;
614
615 }
616
617 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_length 0x00000002
618 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_length_bias 0x00000002
619 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_header\
620 .CommandType = 3, \
621 .CommandSubType = 3, \
622 ._3DCommandOpcode = 0, \
623 ._3DCommandSubOpcode = 40, \
624 .DwordLength = 0
625
626 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS {
627 uint32_t CommandType;
628 uint32_t CommandSubType;
629 uint32_t _3DCommandOpcode;
630 uint32_t _3DCommandSubOpcode;
631 uint32_t DwordLength;
632 uint32_t PointertoDSBindingTable;
633 };
634
635 static inline void
636 GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
637 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS * restrict values)
638 {
639 uint32_t *dw = (uint32_t * restrict) dst;
640
641 dw[0] =
642 __gen_field(values->CommandType, 29, 31) |
643 __gen_field(values->CommandSubType, 27, 28) |
644 __gen_field(values->_3DCommandOpcode, 24, 26) |
645 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
646 __gen_field(values->DwordLength, 0, 7) |
647 0;
648
649 dw[1] =
650 __gen_offset(values->PointertoDSBindingTable, 5, 15) |
651 0;
652
653 }
654
655 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_length 0x00000002
656 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_length_bias 0x00000002
657 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_header\
658 .CommandType = 3, \
659 .CommandSubType = 3, \
660 ._3DCommandOpcode = 0, \
661 ._3DCommandSubOpcode = 41, \
662 .DwordLength = 0
663
664 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS {
665 uint32_t CommandType;
666 uint32_t CommandSubType;
667 uint32_t _3DCommandOpcode;
668 uint32_t _3DCommandSubOpcode;
669 uint32_t DwordLength;
670 uint32_t PointertoGSBindingTable;
671 };
672
673 static inline void
674 GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
675 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS * restrict values)
676 {
677 uint32_t *dw = (uint32_t * restrict) dst;
678
679 dw[0] =
680 __gen_field(values->CommandType, 29, 31) |
681 __gen_field(values->CommandSubType, 27, 28) |
682 __gen_field(values->_3DCommandOpcode, 24, 26) |
683 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
684 __gen_field(values->DwordLength, 0, 7) |
685 0;
686
687 dw[1] =
688 __gen_offset(values->PointertoGSBindingTable, 5, 15) |
689 0;
690
691 }
692
693 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_length 0x00000002
694 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_length_bias 0x00000002
695 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_header\
696 .CommandType = 3, \
697 .CommandSubType = 3, \
698 ._3DCommandOpcode = 0, \
699 ._3DCommandSubOpcode = 39, \
700 .DwordLength = 0
701
702 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS {
703 uint32_t CommandType;
704 uint32_t CommandSubType;
705 uint32_t _3DCommandOpcode;
706 uint32_t _3DCommandSubOpcode;
707 uint32_t DwordLength;
708 uint32_t PointertoHSBindingTable;
709 };
710
711 static inline void
712 GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
713 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS * restrict values)
714 {
715 uint32_t *dw = (uint32_t * restrict) dst;
716
717 dw[0] =
718 __gen_field(values->CommandType, 29, 31) |
719 __gen_field(values->CommandSubType, 27, 28) |
720 __gen_field(values->_3DCommandOpcode, 24, 26) |
721 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
722 __gen_field(values->DwordLength, 0, 7) |
723 0;
724
725 dw[1] =
726 __gen_offset(values->PointertoHSBindingTable, 5, 15) |
727 0;
728
729 }
730
731 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_length 0x00000002
732 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_length_bias 0x00000002
733 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_header\
734 .CommandType = 3, \
735 .CommandSubType = 3, \
736 ._3DCommandOpcode = 0, \
737 ._3DCommandSubOpcode = 42, \
738 .DwordLength = 0
739
740 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS {
741 uint32_t CommandType;
742 uint32_t CommandSubType;
743 uint32_t _3DCommandOpcode;
744 uint32_t _3DCommandSubOpcode;
745 uint32_t DwordLength;
746 uint32_t PointertoPSBindingTable;
747 };
748
749 static inline void
750 GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
751 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS * restrict values)
752 {
753 uint32_t *dw = (uint32_t * restrict) dst;
754
755 dw[0] =
756 __gen_field(values->CommandType, 29, 31) |
757 __gen_field(values->CommandSubType, 27, 28) |
758 __gen_field(values->_3DCommandOpcode, 24, 26) |
759 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
760 __gen_field(values->DwordLength, 0, 7) |
761 0;
762
763 dw[1] =
764 __gen_offset(values->PointertoPSBindingTable, 5, 15) |
765 0;
766
767 }
768
769 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_length 0x00000002
770 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_length_bias 0x00000002
771 #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_header\
772 .CommandType = 3, \
773 .CommandSubType = 3, \
774 ._3DCommandOpcode = 0, \
775 ._3DCommandSubOpcode = 38, \
776 .DwordLength = 0
777
778 struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS {
779 uint32_t CommandType;
780 uint32_t CommandSubType;
781 uint32_t _3DCommandOpcode;
782 uint32_t _3DCommandSubOpcode;
783 uint32_t DwordLength;
784 uint32_t PointertoVSBindingTable;
785 };
786
787 static inline void
788 GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
789 const struct GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS * restrict values)
790 {
791 uint32_t *dw = (uint32_t * restrict) dst;
792
793 dw[0] =
794 __gen_field(values->CommandType, 29, 31) |
795 __gen_field(values->CommandSubType, 27, 28) |
796 __gen_field(values->_3DCommandOpcode, 24, 26) |
797 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
798 __gen_field(values->DwordLength, 0, 7) |
799 0;
800
801 dw[1] =
802 __gen_offset(values->PointertoVSBindingTable, 5, 15) |
803 0;
804
805 }
806
807 #define GEN7_3DSTATE_BLEND_STATE_POINTERS_length 0x00000002
808 #define GEN7_3DSTATE_BLEND_STATE_POINTERS_length_bias 0x00000002
809 #define GEN7_3DSTATE_BLEND_STATE_POINTERS_header\
810 .CommandType = 3, \
811 .CommandSubType = 3, \
812 ._3DCommandOpcode = 0, \
813 ._3DCommandSubOpcode = 36, \
814 .DwordLength = 0
815
816 struct GEN7_3DSTATE_BLEND_STATE_POINTERS {
817 uint32_t CommandType;
818 uint32_t CommandSubType;
819 uint32_t _3DCommandOpcode;
820 uint32_t _3DCommandSubOpcode;
821 uint32_t DwordLength;
822 uint32_t BlendStatePointer;
823 };
824
825 static inline void
826 GEN7_3DSTATE_BLEND_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
827 const struct GEN7_3DSTATE_BLEND_STATE_POINTERS * restrict values)
828 {
829 uint32_t *dw = (uint32_t * restrict) dst;
830
831 dw[0] =
832 __gen_field(values->CommandType, 29, 31) |
833 __gen_field(values->CommandSubType, 27, 28) |
834 __gen_field(values->_3DCommandOpcode, 24, 26) |
835 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
836 __gen_field(values->DwordLength, 0, 7) |
837 0;
838
839 dw[1] =
840 __gen_offset(values->BlendStatePointer, 6, 31) |
841 __gen_mbo(0, 0) |
842 0;
843
844 }
845
846 #define GEN7_3DSTATE_CC_STATE_POINTERS_length 0x00000002
847 #define GEN7_3DSTATE_CC_STATE_POINTERS_length_bias 0x00000002
848 #define GEN7_3DSTATE_CC_STATE_POINTERS_header \
849 .CommandType = 3, \
850 .CommandSubType = 3, \
851 ._3DCommandOpcode = 0, \
852 ._3DCommandSubOpcode = 14, \
853 .DwordLength = 0
854
855 struct GEN7_3DSTATE_CC_STATE_POINTERS {
856 uint32_t CommandType;
857 uint32_t CommandSubType;
858 uint32_t _3DCommandOpcode;
859 uint32_t _3DCommandSubOpcode;
860 uint32_t DwordLength;
861 uint32_t ColorCalcStatePointer;
862 };
863
864 static inline void
865 GEN7_3DSTATE_CC_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
866 const struct GEN7_3DSTATE_CC_STATE_POINTERS * restrict values)
867 {
868 uint32_t *dw = (uint32_t * restrict) dst;
869
870 dw[0] =
871 __gen_field(values->CommandType, 29, 31) |
872 __gen_field(values->CommandSubType, 27, 28) |
873 __gen_field(values->_3DCommandOpcode, 24, 26) |
874 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
875 __gen_field(values->DwordLength, 0, 7) |
876 0;
877
878 dw[1] =
879 __gen_offset(values->ColorCalcStatePointer, 6, 31) |
880 __gen_mbo(0, 0) |
881 0;
882
883 }
884
885 #define GEN7_3DSTATE_CHROMA_KEY_length 0x00000004
886 #define GEN7_3DSTATE_CHROMA_KEY_length_bias 0x00000002
887 #define GEN7_3DSTATE_CHROMA_KEY_header \
888 .CommandType = 3, \
889 .CommandSubType = 3, \
890 ._3DCommandOpcode = 1, \
891 ._3DCommandSubOpcode = 4, \
892 .DwordLength = 2
893
894 struct GEN7_3DSTATE_CHROMA_KEY {
895 uint32_t CommandType;
896 uint32_t CommandSubType;
897 uint32_t _3DCommandOpcode;
898 uint32_t _3DCommandSubOpcode;
899 uint32_t DwordLength;
900 uint32_t ChromaKeyTableIndex;
901 uint32_t ChromaKeyLowValue;
902 uint32_t ChromaKeyHighValue;
903 };
904
905 static inline void
906 GEN7_3DSTATE_CHROMA_KEY_pack(__gen_user_data *data, void * restrict dst,
907 const struct GEN7_3DSTATE_CHROMA_KEY * restrict values)
908 {
909 uint32_t *dw = (uint32_t * restrict) dst;
910
911 dw[0] =
912 __gen_field(values->CommandType, 29, 31) |
913 __gen_field(values->CommandSubType, 27, 28) |
914 __gen_field(values->_3DCommandOpcode, 24, 26) |
915 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
916 __gen_field(values->DwordLength, 0, 7) |
917 0;
918
919 dw[1] =
920 __gen_field(values->ChromaKeyTableIndex, 30, 31) |
921 0;
922
923 dw[2] =
924 __gen_field(values->ChromaKeyLowValue, 0, 31) |
925 0;
926
927 dw[3] =
928 __gen_field(values->ChromaKeyHighValue, 0, 31) |
929 0;
930
931 }
932
933 #define GEN7_3DSTATE_CLEAR_PARAMS_length 0x00000003
934 #define GEN7_3DSTATE_CLEAR_PARAMS_length_bias 0x00000002
935 #define GEN7_3DSTATE_CLEAR_PARAMS_header \
936 .CommandType = 3, \
937 .CommandSubType = 3, \
938 ._3DCommandOpcode = 0, \
939 ._3DCommandSubOpcode = 4, \
940 .DwordLength = 1
941
942 struct GEN7_3DSTATE_CLEAR_PARAMS {
943 uint32_t CommandType;
944 uint32_t CommandSubType;
945 uint32_t _3DCommandOpcode;
946 uint32_t _3DCommandSubOpcode;
947 uint32_t DwordLength;
948 uint32_t DepthClearValue;
949 uint32_t DepthClearValueValid;
950 };
951
952 static inline void
953 GEN7_3DSTATE_CLEAR_PARAMS_pack(__gen_user_data *data, void * restrict dst,
954 const struct GEN7_3DSTATE_CLEAR_PARAMS * restrict values)
955 {
956 uint32_t *dw = (uint32_t * restrict) dst;
957
958 dw[0] =
959 __gen_field(values->CommandType, 29, 31) |
960 __gen_field(values->CommandSubType, 27, 28) |
961 __gen_field(values->_3DCommandOpcode, 24, 26) |
962 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
963 __gen_field(values->DwordLength, 0, 7) |
964 0;
965
966 dw[1] =
967 __gen_field(values->DepthClearValue, 0, 31) |
968 0;
969
970 dw[2] =
971 __gen_field(values->DepthClearValueValid, 0, 0) |
972 0;
973
974 }
975
976 #define GEN7_3DSTATE_CLIP_length 0x00000004
977 #define GEN7_3DSTATE_CLIP_length_bias 0x00000002
978 #define GEN7_3DSTATE_CLIP_header \
979 .CommandType = 3, \
980 .CommandSubType = 3, \
981 ._3DCommandOpcode = 0, \
982 ._3DCommandSubOpcode = 18, \
983 .DwordLength = 2
984
985 struct GEN7_3DSTATE_CLIP {
986 uint32_t CommandType;
987 uint32_t CommandSubType;
988 uint32_t _3DCommandOpcode;
989 uint32_t _3DCommandSubOpcode;
990 uint32_t DwordLength;
991 uint32_t FrontWinding;
992 uint32_t VertexSubPixelPrecisionSelect;
993 uint32_t EarlyCullEnable;
994 #define CULLMODE_BOTH 0
995 #define CULLMODE_NONE 1
996 #define CULLMODE_FRONT 2
997 #define CULLMODE_BACK 3
998 uint32_t CullMode;
999 uint32_t ClipperStatisticsEnable;
1000 uint32_t UserClipDistanceCullTestEnableBitmask;
1001 uint32_t ClipEnable;
1002 #define APIMODE_OGL 0
1003 uint32_t APIMode;
1004 uint32_t ViewportXYClipTestEnable;
1005 uint32_t ViewportZClipTestEnable;
1006 uint32_t GuardbandClipTestEnable;
1007 uint32_t UserClipDistanceClipTestEnableBitmask;
1008 #define CLIPMODE_NORMAL 0
1009 #define CLIPMODE_REJECT_ALL 3
1010 #define CLIPMODE_ACCEPT_ALL 4
1011 uint32_t ClipMode;
1012 uint32_t PerspectiveDivideDisable;
1013 uint32_t NonPerspectiveBarycentricEnable;
1014 #define Vertex0 0
1015 #define Vertex1 1
1016 #define Vertex2 2
1017 uint32_t TriangleStripListProvokingVertexSelect;
1018 #define Vertex0 0
1019 #define Vertex1 1
1020 uint32_t LineStripListProvokingVertexSelect;
1021 #define Vertex0 0
1022 #define Vertex1 1
1023 #define Vertex2 2
1024 uint32_t TriangleFanProvokingVertexSelect;
1025 float MinimumPointWidth;
1026 float MaximumPointWidth;
1027 uint32_t ForceZeroRTAIndexEnable;
1028 uint32_t MaximumVPIndex;
1029 };
1030
1031 static inline void
1032 GEN7_3DSTATE_CLIP_pack(__gen_user_data *data, void * restrict dst,
1033 const struct GEN7_3DSTATE_CLIP * restrict values)
1034 {
1035 uint32_t *dw = (uint32_t * restrict) dst;
1036
1037 dw[0] =
1038 __gen_field(values->CommandType, 29, 31) |
1039 __gen_field(values->CommandSubType, 27, 28) |
1040 __gen_field(values->_3DCommandOpcode, 24, 26) |
1041 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1042 __gen_field(values->DwordLength, 0, 7) |
1043 0;
1044
1045 dw[1] =
1046 __gen_field(values->FrontWinding, 20, 20) |
1047 __gen_field(values->VertexSubPixelPrecisionSelect, 19, 19) |
1048 __gen_field(values->EarlyCullEnable, 18, 18) |
1049 __gen_field(values->CullMode, 16, 17) |
1050 __gen_field(values->ClipperStatisticsEnable, 10, 10) |
1051 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
1052 0;
1053
1054 dw[2] =
1055 __gen_field(values->ClipEnable, 31, 31) |
1056 __gen_field(values->APIMode, 30, 30) |
1057 __gen_field(values->ViewportXYClipTestEnable, 28, 28) |
1058 __gen_field(values->ViewportZClipTestEnable, 27, 27) |
1059 __gen_field(values->GuardbandClipTestEnable, 26, 26) |
1060 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 16, 23) |
1061 __gen_field(values->ClipMode, 13, 15) |
1062 __gen_field(values->PerspectiveDivideDisable, 9, 9) |
1063 __gen_field(values->NonPerspectiveBarycentricEnable, 8, 8) |
1064 __gen_field(values->TriangleStripListProvokingVertexSelect, 4, 5) |
1065 __gen_field(values->LineStripListProvokingVertexSelect, 2, 3) |
1066 __gen_field(values->TriangleFanProvokingVertexSelect, 0, 1) |
1067 0;
1068
1069 dw[3] =
1070 __gen_field(values->MinimumPointWidth * (1 << 3), 17, 27) |
1071 __gen_field(values->MaximumPointWidth * (1 << 3), 6, 16) |
1072 __gen_field(values->ForceZeroRTAIndexEnable, 5, 5) |
1073 __gen_field(values->MaximumVPIndex, 0, 3) |
1074 0;
1075
1076 }
1077
1078 #define GEN7_3DSTATE_CONSTANT_DS_length 0x00000007
1079 #define GEN7_3DSTATE_CONSTANT_DS_length_bias 0x00000002
1080 #define GEN7_3DSTATE_CONSTANT_DS_header \
1081 .CommandType = 3, \
1082 .CommandSubType = 3, \
1083 ._3DCommandOpcode = 0, \
1084 ._3DCommandSubOpcode = 26, \
1085 .DwordLength = 5
1086
1087 struct GEN7_3DSTATE_CONSTANT_BODY {
1088 uint32_t ConstantBuffer1ReadLength;
1089 uint32_t ConstantBuffer0ReadLength;
1090 uint32_t ConstantBuffer3ReadLength;
1091 uint32_t ConstantBuffer2ReadLength;
1092 __gen_address_type PointerToConstantBuffer0;
1093 struct GEN7_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
1094 __gen_address_type PointerToConstantBuffer1;
1095 __gen_address_type PointerToConstantBuffer2;
1096 __gen_address_type PointerToConstantBuffer3;
1097 };
1098
1099 static inline void
1100 GEN7_3DSTATE_CONSTANT_BODY_pack(__gen_user_data *data, void * restrict dst,
1101 const struct GEN7_3DSTATE_CONSTANT_BODY * restrict values)
1102 {
1103 uint32_t *dw = (uint32_t * restrict) dst;
1104
1105 dw[0] =
1106 __gen_field(values->ConstantBuffer1ReadLength, 16, 31) |
1107 __gen_field(values->ConstantBuffer0ReadLength, 0, 15) |
1108 0;
1109
1110 dw[1] =
1111 __gen_field(values->ConstantBuffer3ReadLength, 16, 31) |
1112 __gen_field(values->ConstantBuffer2ReadLength, 0, 15) |
1113 0;
1114
1115 uint32_t dw_ConstantBufferObjectControlState;
1116 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
1117 uint32_t dw2 =
1118 __gen_field(dw_ConstantBufferObjectControlState, 0, 4) |
1119 0;
1120
1121 dw[2] =
1122 __gen_combine_address(data, &dw[2], values->PointerToConstantBuffer0, dw2);
1123
1124 uint32_t dw3 =
1125 0;
1126
1127 dw[3] =
1128 __gen_combine_address(data, &dw[3], values->PointerToConstantBuffer1, dw3);
1129
1130 uint32_t dw4 =
1131 0;
1132
1133 dw[4] =
1134 __gen_combine_address(data, &dw[4], values->PointerToConstantBuffer2, dw4);
1135
1136 uint32_t dw5 =
1137 0;
1138
1139 dw[5] =
1140 __gen_combine_address(data, &dw[5], values->PointerToConstantBuffer3, dw5);
1141
1142 }
1143
1144 struct GEN7_3DSTATE_CONSTANT_DS {
1145 uint32_t CommandType;
1146 uint32_t CommandSubType;
1147 uint32_t _3DCommandOpcode;
1148 uint32_t _3DCommandSubOpcode;
1149 uint32_t DwordLength;
1150 struct GEN7_3DSTATE_CONSTANT_BODY ConstantBody;
1151 };
1152
1153 static inline void
1154 GEN7_3DSTATE_CONSTANT_DS_pack(__gen_user_data *data, void * restrict dst,
1155 const struct GEN7_3DSTATE_CONSTANT_DS * restrict values)
1156 {
1157 uint32_t *dw = (uint32_t * restrict) dst;
1158
1159 dw[0] =
1160 __gen_field(values->CommandType, 29, 31) |
1161 __gen_field(values->CommandSubType, 27, 28) |
1162 __gen_field(values->_3DCommandOpcode, 24, 26) |
1163 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1164 __gen_field(values->DwordLength, 0, 7) |
1165 0;
1166
1167 GEN7_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1168 }
1169
1170 #define GEN7_3DSTATE_CONSTANT_GS_length 0x00000007
1171 #define GEN7_3DSTATE_CONSTANT_GS_length_bias 0x00000002
1172 #define GEN7_3DSTATE_CONSTANT_GS_header \
1173 .CommandType = 3, \
1174 .CommandSubType = 3, \
1175 ._3DCommandOpcode = 0, \
1176 ._3DCommandSubOpcode = 22, \
1177 .DwordLength = 5
1178
1179 struct GEN7_3DSTATE_CONSTANT_GS {
1180 uint32_t CommandType;
1181 uint32_t CommandSubType;
1182 uint32_t _3DCommandOpcode;
1183 uint32_t _3DCommandSubOpcode;
1184 uint32_t DwordLength;
1185 struct GEN7_3DSTATE_CONSTANT_BODY ConstantBody;
1186 };
1187
1188 static inline void
1189 GEN7_3DSTATE_CONSTANT_GS_pack(__gen_user_data *data, void * restrict dst,
1190 const struct GEN7_3DSTATE_CONSTANT_GS * restrict values)
1191 {
1192 uint32_t *dw = (uint32_t * restrict) dst;
1193
1194 dw[0] =
1195 __gen_field(values->CommandType, 29, 31) |
1196 __gen_field(values->CommandSubType, 27, 28) |
1197 __gen_field(values->_3DCommandOpcode, 24, 26) |
1198 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1199 __gen_field(values->DwordLength, 0, 7) |
1200 0;
1201
1202 GEN7_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1203 }
1204
1205 #define GEN7_3DSTATE_CONSTANT_HS_length 0x00000007
1206 #define GEN7_3DSTATE_CONSTANT_HS_length_bias 0x00000002
1207 #define GEN7_3DSTATE_CONSTANT_HS_header \
1208 .CommandType = 3, \
1209 .CommandSubType = 3, \
1210 ._3DCommandOpcode = 0, \
1211 ._3DCommandSubOpcode = 25, \
1212 .DwordLength = 5
1213
1214 struct GEN7_3DSTATE_CONSTANT_HS {
1215 uint32_t CommandType;
1216 uint32_t CommandSubType;
1217 uint32_t _3DCommandOpcode;
1218 uint32_t _3DCommandSubOpcode;
1219 uint32_t DwordLength;
1220 struct GEN7_3DSTATE_CONSTANT_BODY ConstantBody;
1221 };
1222
1223 static inline void
1224 GEN7_3DSTATE_CONSTANT_HS_pack(__gen_user_data *data, void * restrict dst,
1225 const struct GEN7_3DSTATE_CONSTANT_HS * restrict values)
1226 {
1227 uint32_t *dw = (uint32_t * restrict) dst;
1228
1229 dw[0] =
1230 __gen_field(values->CommandType, 29, 31) |
1231 __gen_field(values->CommandSubType, 27, 28) |
1232 __gen_field(values->_3DCommandOpcode, 24, 26) |
1233 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1234 __gen_field(values->DwordLength, 0, 7) |
1235 0;
1236
1237 GEN7_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1238 }
1239
1240 #define GEN7_3DSTATE_CONSTANT_PS_length 0x00000007
1241 #define GEN7_3DSTATE_CONSTANT_PS_length_bias 0x00000002
1242 #define GEN7_3DSTATE_CONSTANT_PS_header \
1243 .CommandType = 3, \
1244 .CommandSubType = 3, \
1245 ._3DCommandOpcode = 0, \
1246 ._3DCommandSubOpcode = 23, \
1247 .DwordLength = 5
1248
1249 struct GEN7_3DSTATE_CONSTANT_PS {
1250 uint32_t CommandType;
1251 uint32_t CommandSubType;
1252 uint32_t _3DCommandOpcode;
1253 uint32_t _3DCommandSubOpcode;
1254 uint32_t DwordLength;
1255 struct GEN7_3DSTATE_CONSTANT_BODY ConstantBody;
1256 };
1257
1258 static inline void
1259 GEN7_3DSTATE_CONSTANT_PS_pack(__gen_user_data *data, void * restrict dst,
1260 const struct GEN7_3DSTATE_CONSTANT_PS * restrict values)
1261 {
1262 uint32_t *dw = (uint32_t * restrict) dst;
1263
1264 dw[0] =
1265 __gen_field(values->CommandType, 29, 31) |
1266 __gen_field(values->CommandSubType, 27, 28) |
1267 __gen_field(values->_3DCommandOpcode, 24, 26) |
1268 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1269 __gen_field(values->DwordLength, 0, 7) |
1270 0;
1271
1272 GEN7_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1273 }
1274
1275 #define GEN7_3DSTATE_CONSTANT_VS_length 0x00000007
1276 #define GEN7_3DSTATE_CONSTANT_VS_length_bias 0x00000002
1277 #define GEN7_3DSTATE_CONSTANT_VS_header \
1278 .CommandType = 3, \
1279 .CommandSubType = 3, \
1280 ._3DCommandOpcode = 0, \
1281 ._3DCommandSubOpcode = 21, \
1282 .DwordLength = 5
1283
1284 struct GEN7_3DSTATE_CONSTANT_VS {
1285 uint32_t CommandType;
1286 uint32_t CommandSubType;
1287 uint32_t _3DCommandOpcode;
1288 uint32_t _3DCommandSubOpcode;
1289 uint32_t DwordLength;
1290 struct GEN7_3DSTATE_CONSTANT_BODY ConstantBody;
1291 };
1292
1293 static inline void
1294 GEN7_3DSTATE_CONSTANT_VS_pack(__gen_user_data *data, void * restrict dst,
1295 const struct GEN7_3DSTATE_CONSTANT_VS * restrict values)
1296 {
1297 uint32_t *dw = (uint32_t * restrict) dst;
1298
1299 dw[0] =
1300 __gen_field(values->CommandType, 29, 31) |
1301 __gen_field(values->CommandSubType, 27, 28) |
1302 __gen_field(values->_3DCommandOpcode, 24, 26) |
1303 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1304 __gen_field(values->DwordLength, 0, 7) |
1305 0;
1306
1307 GEN7_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1308 }
1309
1310 #define GEN7_3DSTATE_DEPTH_BUFFER_length 0x00000007
1311 #define GEN7_3DSTATE_DEPTH_BUFFER_length_bias 0x00000002
1312 #define GEN7_3DSTATE_DEPTH_BUFFER_header \
1313 .CommandType = 3, \
1314 .CommandSubType = 3, \
1315 ._3DCommandOpcode = 0, \
1316 ._3DCommandSubOpcode = 5, \
1317 .DwordLength = 5
1318
1319 struct GEN7_3DSTATE_DEPTH_BUFFER {
1320 uint32_t CommandType;
1321 uint32_t CommandSubType;
1322 uint32_t _3DCommandOpcode;
1323 uint32_t _3DCommandSubOpcode;
1324 uint32_t DwordLength;
1325 #define SURFTYPE_1D 0
1326 #define SURFTYPE_2D 1
1327 #define SURFTYPE_3D 2
1328 #define SURFTYPE_CUBE 3
1329 #define SURFTYPE_NULL 7
1330 uint32_t SurfaceType;
1331 uint32_t DepthWriteEnable;
1332 uint32_t StencilWriteEnable;
1333 uint32_t HierarchicalDepthBufferEnable;
1334 #define D32_FLOAT 1
1335 #define D24_UNORM_X8_UINT 3
1336 #define D16_UNORM 5
1337 uint32_t SurfaceFormat;
1338 uint32_t SurfacePitch;
1339 __gen_address_type SurfaceBaseAddress;
1340 uint32_t Height;
1341 uint32_t Width;
1342 uint32_t LOD;
1343 #define SURFTYPE_CUBEmustbezero 0
1344 uint32_t Depth;
1345 uint32_t MinimumArrayElement;
1346 struct GEN7_MEMORY_OBJECT_CONTROL_STATE DepthBufferObjectControlState;
1347 uint32_t DepthCoordinateOffsetY;
1348 uint32_t DepthCoordinateOffsetX;
1349 uint32_t RenderTargetViewExtent;
1350 };
1351
1352 static inline void
1353 GEN7_3DSTATE_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
1354 const struct GEN7_3DSTATE_DEPTH_BUFFER * restrict values)
1355 {
1356 uint32_t *dw = (uint32_t * restrict) dst;
1357
1358 dw[0] =
1359 __gen_field(values->CommandType, 29, 31) |
1360 __gen_field(values->CommandSubType, 27, 28) |
1361 __gen_field(values->_3DCommandOpcode, 24, 26) |
1362 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1363 __gen_field(values->DwordLength, 0, 7) |
1364 0;
1365
1366 dw[1] =
1367 __gen_field(values->SurfaceType, 29, 31) |
1368 __gen_field(values->DepthWriteEnable, 28, 28) |
1369 __gen_field(values->StencilWriteEnable, 27, 27) |
1370 __gen_field(values->HierarchicalDepthBufferEnable, 22, 22) |
1371 __gen_field(values->SurfaceFormat, 18, 20) |
1372 __gen_field(values->SurfacePitch, 0, 17) |
1373 0;
1374
1375 uint32_t dw2 =
1376 0;
1377
1378 dw[2] =
1379 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
1380
1381 dw[3] =
1382 __gen_field(values->Height, 18, 31) |
1383 __gen_field(values->Width, 4, 17) |
1384 __gen_field(values->LOD, 0, 3) |
1385 0;
1386
1387 uint32_t dw_DepthBufferObjectControlState;
1388 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DepthBufferObjectControlState, &values->DepthBufferObjectControlState);
1389 dw[4] =
1390 __gen_field(values->Depth, 21, 31) |
1391 __gen_field(values->MinimumArrayElement, 10, 20) |
1392 __gen_field(dw_DepthBufferObjectControlState, 0, 3) |
1393 0;
1394
1395 dw[5] =
1396 __gen_field(values->DepthCoordinateOffsetY, 16, 31) |
1397 __gen_field(values->DepthCoordinateOffsetX, 0, 15) |
1398 0;
1399
1400 dw[6] =
1401 __gen_field(values->RenderTargetViewExtent, 21, 31) |
1402 0;
1403
1404 }
1405
1406 #define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_length 0x00000002
1407 #define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_length_bias 0x00000002
1408 #define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_header\
1409 .CommandType = 3, \
1410 .CommandSubType = 3, \
1411 ._3DCommandOpcode = 0, \
1412 ._3DCommandSubOpcode = 37, \
1413 .DwordLength = 0
1414
1415 struct GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS {
1416 uint32_t CommandType;
1417 uint32_t CommandSubType;
1418 uint32_t _3DCommandOpcode;
1419 uint32_t _3DCommandSubOpcode;
1420 uint32_t DwordLength;
1421 uint32_t PointertoDEPTH_STENCIL_STATE;
1422 };
1423
1424 static inline void
1425 GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
1426 const struct GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS * restrict values)
1427 {
1428 uint32_t *dw = (uint32_t * restrict) dst;
1429
1430 dw[0] =
1431 __gen_field(values->CommandType, 29, 31) |
1432 __gen_field(values->CommandSubType, 27, 28) |
1433 __gen_field(values->_3DCommandOpcode, 24, 26) |
1434 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1435 __gen_field(values->DwordLength, 0, 7) |
1436 0;
1437
1438 dw[1] =
1439 __gen_offset(values->PointertoDEPTH_STENCIL_STATE, 6, 31) |
1440 __gen_mbo(0, 0) |
1441 0;
1442
1443 }
1444
1445 #define GEN7_3DSTATE_DRAWING_RECTANGLE_length 0x00000004
1446 #define GEN7_3DSTATE_DRAWING_RECTANGLE_length_bias 0x00000002
1447 #define GEN7_3DSTATE_DRAWING_RECTANGLE_header \
1448 .CommandType = 3, \
1449 .CommandSubType = 3, \
1450 ._3DCommandOpcode = 1, \
1451 ._3DCommandSubOpcode = 0, \
1452 .DwordLength = 2
1453
1454 struct GEN7_3DSTATE_DRAWING_RECTANGLE {
1455 uint32_t CommandType;
1456 uint32_t CommandSubType;
1457 uint32_t _3DCommandOpcode;
1458 uint32_t _3DCommandSubOpcode;
1459 uint32_t DwordLength;
1460 uint32_t ClippedDrawingRectangleYMin;
1461 uint32_t ClippedDrawingRectangleXMin;
1462 uint32_t ClippedDrawingRectangleYMax;
1463 uint32_t ClippedDrawingRectangleXMax;
1464 uint32_t DrawingRectangleOriginY;
1465 uint32_t DrawingRectangleOriginX;
1466 };
1467
1468 static inline void
1469 GEN7_3DSTATE_DRAWING_RECTANGLE_pack(__gen_user_data *data, void * restrict dst,
1470 const struct GEN7_3DSTATE_DRAWING_RECTANGLE * restrict values)
1471 {
1472 uint32_t *dw = (uint32_t * restrict) dst;
1473
1474 dw[0] =
1475 __gen_field(values->CommandType, 29, 31) |
1476 __gen_field(values->CommandSubType, 27, 28) |
1477 __gen_field(values->_3DCommandOpcode, 24, 26) |
1478 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1479 __gen_field(values->DwordLength, 0, 7) |
1480 0;
1481
1482 dw[1] =
1483 __gen_field(values->ClippedDrawingRectangleYMin, 16, 31) |
1484 __gen_field(values->ClippedDrawingRectangleXMin, 0, 15) |
1485 0;
1486
1487 dw[2] =
1488 __gen_field(values->ClippedDrawingRectangleYMax, 16, 31) |
1489 __gen_field(values->ClippedDrawingRectangleXMax, 0, 15) |
1490 0;
1491
1492 dw[3] =
1493 __gen_field(values->DrawingRectangleOriginY, 16, 31) |
1494 __gen_field(values->DrawingRectangleOriginX, 0, 15) |
1495 0;
1496
1497 }
1498
1499 #define GEN7_3DSTATE_DS_length 0x00000006
1500 #define GEN7_3DSTATE_DS_length_bias 0x00000002
1501 #define GEN7_3DSTATE_DS_header \
1502 .CommandType = 3, \
1503 .CommandSubType = 3, \
1504 ._3DCommandOpcode = 0, \
1505 ._3DCommandSubOpcode = 29, \
1506 .DwordLength = 4
1507
1508 struct GEN7_3DSTATE_DS {
1509 uint32_t CommandType;
1510 uint32_t CommandSubType;
1511 uint32_t _3DCommandOpcode;
1512 uint32_t _3DCommandSubOpcode;
1513 uint32_t DwordLength;
1514 uint32_t KernelStartPointer;
1515 #define Multiple 0
1516 #define Single 1
1517 uint32_t SingleDomainPointDispatch;
1518 #define Dmask 0
1519 #define Vmask 1
1520 uint32_t VectorMaskEnable;
1521 #define NoSamplers 0
1522 #define _14Samplers 1
1523 #define _58Samplers 2
1524 #define _912Samplers 3
1525 #define _1316Samplers 4
1526 uint32_t SamplerCount;
1527 uint32_t BindingTableEntryCount;
1528 #define IEEE754 0
1529 #define Alternate 1
1530 uint32_t FloatingPointMode;
1531 uint32_t IllegalOpcodeExceptionEnable;
1532 uint32_t SoftwareExceptionEnable;
1533 uint32_t ScratchSpaceBasePointer;
1534 uint32_t PerThreadScratchSpace;
1535 uint32_t DispatchGRFStartRegisterForURBData;
1536 uint32_t PatchURBEntryReadLength;
1537 uint32_t PatchURBEntryReadOffset;
1538 uint32_t MaximumNumberofThreads;
1539 uint32_t StatisticsEnable;
1540 uint32_t ComputeWCoordinateEnable;
1541 uint32_t DSCacheDisable;
1542 uint32_t DSFunctionEnable;
1543 };
1544
1545 static inline void
1546 GEN7_3DSTATE_DS_pack(__gen_user_data *data, void * restrict dst,
1547 const struct GEN7_3DSTATE_DS * restrict values)
1548 {
1549 uint32_t *dw = (uint32_t * restrict) dst;
1550
1551 dw[0] =
1552 __gen_field(values->CommandType, 29, 31) |
1553 __gen_field(values->CommandSubType, 27, 28) |
1554 __gen_field(values->_3DCommandOpcode, 24, 26) |
1555 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1556 __gen_field(values->DwordLength, 0, 7) |
1557 0;
1558
1559 dw[1] =
1560 __gen_offset(values->KernelStartPointer, 6, 31) |
1561 0;
1562
1563 dw[2] =
1564 __gen_field(values->SingleDomainPointDispatch, 31, 31) |
1565 __gen_field(values->VectorMaskEnable, 30, 30) |
1566 __gen_field(values->SamplerCount, 27, 29) |
1567 __gen_field(values->BindingTableEntryCount, 18, 25) |
1568 __gen_field(values->FloatingPointMode, 16, 16) |
1569 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
1570 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
1571 0;
1572
1573 dw[3] =
1574 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
1575 __gen_field(values->PerThreadScratchSpace, 0, 3) |
1576 0;
1577
1578 dw[4] =
1579 __gen_field(values->DispatchGRFStartRegisterForURBData, 20, 24) |
1580 __gen_field(values->PatchURBEntryReadLength, 11, 17) |
1581 __gen_field(values->PatchURBEntryReadOffset, 4, 9) |
1582 0;
1583
1584 dw[5] =
1585 __gen_field(values->MaximumNumberofThreads, 25, 31) |
1586 __gen_field(values->StatisticsEnable, 10, 10) |
1587 __gen_field(values->ComputeWCoordinateEnable, 2, 2) |
1588 __gen_field(values->DSCacheDisable, 1, 1) |
1589 __gen_field(values->DSFunctionEnable, 0, 0) |
1590 0;
1591
1592 }
1593
1594 #define GEN7_3DSTATE_GS_length 0x00000007
1595 #define GEN7_3DSTATE_GS_length_bias 0x00000002
1596 #define GEN7_3DSTATE_GS_header \
1597 .CommandType = 3, \
1598 .CommandSubType = 3, \
1599 ._3DCommandOpcode = 0, \
1600 ._3DCommandSubOpcode = 17, \
1601 .DwordLength = 5
1602
1603 struct GEN7_3DSTATE_GS {
1604 uint32_t CommandType;
1605 uint32_t CommandSubType;
1606 uint32_t _3DCommandOpcode;
1607 uint32_t _3DCommandSubOpcode;
1608 uint32_t DwordLength;
1609 uint32_t KernelStartPointer;
1610 uint32_t SingleProgramFlowSPF;
1611 #define Dmask 0
1612 #define Vmask 1
1613 uint32_t VectorMaskEnableVME;
1614 #define NoSamplers 0
1615 #define _14Samplers 1
1616 #define _58Samplers 2
1617 #define _912Samplers 3
1618 #define _1316Samplers 4
1619 uint32_t SamplerCount;
1620 uint32_t BindingTableEntryCount;
1621 #define NormalPriority 0
1622 #define HighPriority 1
1623 uint32_t ThreadPriority;
1624 #define IEEE754 0
1625 #define alternate 1
1626 uint32_t FloatingPointMode;
1627 uint32_t IllegalOpcodeExceptionEnable;
1628 uint32_t MaskStackExceptionEnable;
1629 uint32_t SoftwareExceptionEnable;
1630 uint32_t ScratchSpaceBasePointer;
1631 uint32_t PerThreadScratchSpace;
1632 uint32_t OutputVertexSize;
1633 uint32_t OutputTopology;
1634 uint32_t VertexURBEntryReadLength;
1635 uint32_t IncludeVertexHandles;
1636 uint32_t VertexURBEntryReadOffset;
1637 uint32_t DispatchGRFStartRegisterforURBData;
1638 uint32_t MaximumNumberofThreads;
1639 #define GSCTL_CUT 0
1640 #define GSCTL_SID 1
1641 uint32_t ControlDataFormat;
1642 uint32_t ControlDataHeaderSize;
1643 uint32_t InstanceControl;
1644 uint32_t DefaultStreamID;
1645 #define SINGLE 0
1646 #define DUAL_INSTANCE 1
1647 #define DUAL_OBJECT 2
1648 uint32_t DispatchMode;
1649 uint32_t GSStatisticsEnable;
1650 uint32_t GSInvocationsIncrementValue;
1651 uint32_t IncludePrimitiveID;
1652 uint32_t Hint;
1653 uint32_t ReorderEnable;
1654 uint32_t DiscardAdjacency;
1655 uint32_t GSEnable;
1656 uint32_t SemaphoreHandle;
1657 };
1658
1659 static inline void
1660 GEN7_3DSTATE_GS_pack(__gen_user_data *data, void * restrict dst,
1661 const struct GEN7_3DSTATE_GS * restrict values)
1662 {
1663 uint32_t *dw = (uint32_t * restrict) dst;
1664
1665 dw[0] =
1666 __gen_field(values->CommandType, 29, 31) |
1667 __gen_field(values->CommandSubType, 27, 28) |
1668 __gen_field(values->_3DCommandOpcode, 24, 26) |
1669 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1670 __gen_field(values->DwordLength, 0, 7) |
1671 0;
1672
1673 dw[1] =
1674 __gen_offset(values->KernelStartPointer, 6, 31) |
1675 0;
1676
1677 dw[2] =
1678 __gen_field(values->SingleProgramFlowSPF, 31, 31) |
1679 __gen_field(values->VectorMaskEnableVME, 30, 30) |
1680 __gen_field(values->SamplerCount, 27, 29) |
1681 __gen_field(values->BindingTableEntryCount, 18, 25) |
1682 __gen_field(values->ThreadPriority, 17, 17) |
1683 __gen_field(values->FloatingPointMode, 16, 16) |
1684 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
1685 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
1686 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
1687 0;
1688
1689 dw[3] =
1690 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
1691 __gen_field(values->PerThreadScratchSpace, 0, 3) |
1692 0;
1693
1694 dw[4] =
1695 __gen_field(values->OutputVertexSize, 23, 28) |
1696 __gen_field(values->OutputTopology, 17, 22) |
1697 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
1698 __gen_field(values->IncludeVertexHandles, 10, 10) |
1699 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
1700 __gen_field(values->DispatchGRFStartRegisterforURBData, 0, 3) |
1701 0;
1702
1703 dw[5] =
1704 __gen_field(values->MaximumNumberofThreads, 25, 31) |
1705 __gen_field(values->ControlDataFormat, 24, 24) |
1706 __gen_field(values->ControlDataHeaderSize, 20, 23) |
1707 __gen_field(values->InstanceControl, 15, 19) |
1708 __gen_field(values->DefaultStreamID, 13, 14) |
1709 __gen_field(values->DispatchMode, 11, 12) |
1710 __gen_field(values->GSStatisticsEnable, 10, 10) |
1711 __gen_field(values->GSInvocationsIncrementValue, 5, 9) |
1712 __gen_field(values->IncludePrimitiveID, 4, 4) |
1713 __gen_field(values->Hint, 3, 3) |
1714 __gen_field(values->ReorderEnable, 2, 2) |
1715 __gen_field(values->DiscardAdjacency, 1, 1) |
1716 __gen_field(values->GSEnable, 0, 0) |
1717 0;
1718
1719 dw[6] =
1720 __gen_offset(values->SemaphoreHandle, 0, 11) |
1721 0;
1722
1723 }
1724
1725 #define GEN7_3DSTATE_HIER_DEPTH_BUFFER_length 0x00000003
1726 #define GEN7_3DSTATE_HIER_DEPTH_BUFFER_length_bias 0x00000002
1727 #define GEN7_3DSTATE_HIER_DEPTH_BUFFER_header \
1728 .CommandType = 3, \
1729 .CommandSubType = 3, \
1730 ._3DCommandOpcode = 0, \
1731 ._3DCommandSubOpcode = 7, \
1732 .DwordLength = 1
1733
1734 struct GEN7_3DSTATE_HIER_DEPTH_BUFFER {
1735 uint32_t CommandType;
1736 uint32_t CommandSubType;
1737 uint32_t _3DCommandOpcode;
1738 uint32_t _3DCommandSubOpcode;
1739 uint32_t DwordLength;
1740 struct GEN7_MEMORY_OBJECT_CONTROL_STATE HierarchicalDepthBufferObjectControlState;
1741 uint32_t SurfacePitch;
1742 __gen_address_type SurfaceBaseAddress;
1743 };
1744
1745 static inline void
1746 GEN7_3DSTATE_HIER_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
1747 const struct GEN7_3DSTATE_HIER_DEPTH_BUFFER * restrict values)
1748 {
1749 uint32_t *dw = (uint32_t * restrict) dst;
1750
1751 dw[0] =
1752 __gen_field(values->CommandType, 29, 31) |
1753 __gen_field(values->CommandSubType, 27, 28) |
1754 __gen_field(values->_3DCommandOpcode, 24, 26) |
1755 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1756 __gen_field(values->DwordLength, 0, 7) |
1757 0;
1758
1759 uint32_t dw_HierarchicalDepthBufferObjectControlState;
1760 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_HierarchicalDepthBufferObjectControlState, &values->HierarchicalDepthBufferObjectControlState);
1761 dw[1] =
1762 __gen_field(dw_HierarchicalDepthBufferObjectControlState, 25, 28) |
1763 __gen_field(values->SurfacePitch, 0, 16) |
1764 0;
1765
1766 uint32_t dw2 =
1767 0;
1768
1769 dw[2] =
1770 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
1771
1772 }
1773
1774 #define GEN7_3DSTATE_HS_length 0x00000007
1775 #define GEN7_3DSTATE_HS_length_bias 0x00000002
1776 #define GEN7_3DSTATE_HS_header \
1777 .CommandType = 3, \
1778 .CommandSubType = 3, \
1779 ._3DCommandOpcode = 0, \
1780 ._3DCommandSubOpcode = 27, \
1781 .DwordLength = 5
1782
1783 struct GEN7_3DSTATE_HS {
1784 uint32_t CommandType;
1785 uint32_t CommandSubType;
1786 uint32_t _3DCommandOpcode;
1787 uint32_t _3DCommandSubOpcode;
1788 uint32_t DwordLength;
1789 #define NoSamplers 0
1790 #define _14Samplers 1
1791 #define _58Samplers 2
1792 #define _912Samplers 3
1793 #define _1316Samplers 4
1794 uint32_t SamplerCount;
1795 uint32_t BindingTableEntryCount;
1796 #define IEEE754 0
1797 #define alternate 1
1798 uint32_t FloatingPointMode;
1799 uint32_t IllegalOpcodeExceptionEnable;
1800 uint32_t SoftwareExceptionEnable;
1801 uint32_t MaximumNumberofThreads;
1802 uint32_t Enable;
1803 uint32_t StatisticsEnable;
1804 uint32_t InstanceCount;
1805 uint32_t KernelStartPointer;
1806 uint32_t ScratchSpaceBasePointer;
1807 uint32_t PerThreadScratchSpace;
1808 uint32_t SingleProgramFlow;
1809 #define Dmask 0
1810 #define Vmask 1
1811 uint32_t VectorMaskEnable;
1812 uint32_t IncludeVertexHandles;
1813 uint32_t DispatchGRFStartRegisterForURBData;
1814 uint32_t VertexURBEntryReadLength;
1815 uint32_t VertexURBEntryReadOffset;
1816 uint32_t SemaphoreHandle;
1817 };
1818
1819 static inline void
1820 GEN7_3DSTATE_HS_pack(__gen_user_data *data, void * restrict dst,
1821 const struct GEN7_3DSTATE_HS * restrict values)
1822 {
1823 uint32_t *dw = (uint32_t * restrict) dst;
1824
1825 dw[0] =
1826 __gen_field(values->CommandType, 29, 31) |
1827 __gen_field(values->CommandSubType, 27, 28) |
1828 __gen_field(values->_3DCommandOpcode, 24, 26) |
1829 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1830 __gen_field(values->DwordLength, 0, 7) |
1831 0;
1832
1833 dw[1] =
1834 __gen_field(values->SamplerCount, 27, 29) |
1835 __gen_field(values->BindingTableEntryCount, 18, 25) |
1836 __gen_field(values->FloatingPointMode, 16, 16) |
1837 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
1838 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
1839 __gen_field(values->MaximumNumberofThreads, 0, 6) |
1840 0;
1841
1842 dw[2] =
1843 __gen_field(values->Enable, 31, 31) |
1844 __gen_field(values->StatisticsEnable, 29, 29) |
1845 __gen_field(values->InstanceCount, 0, 3) |
1846 0;
1847
1848 dw[3] =
1849 __gen_offset(values->KernelStartPointer, 6, 31) |
1850 0;
1851
1852 dw[4] =
1853 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
1854 __gen_field(values->PerThreadScratchSpace, 0, 3) |
1855 0;
1856
1857 dw[5] =
1858 __gen_field(values->SingleProgramFlow, 27, 27) |
1859 __gen_field(values->VectorMaskEnable, 26, 26) |
1860 __gen_field(values->IncludeVertexHandles, 24, 24) |
1861 __gen_field(values->DispatchGRFStartRegisterForURBData, 19, 23) |
1862 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
1863 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
1864 0;
1865
1866 dw[6] =
1867 __gen_offset(values->SemaphoreHandle, 0, 11) |
1868 0;
1869
1870 }
1871
1872 #define GEN7_3DSTATE_INDEX_BUFFER_length 0x00000003
1873 #define GEN7_3DSTATE_INDEX_BUFFER_length_bias 0x00000002
1874 #define GEN7_3DSTATE_INDEX_BUFFER_header \
1875 .CommandType = 3, \
1876 .CommandSubType = 3, \
1877 ._3DCommandOpcode = 0, \
1878 ._3DCommandSubOpcode = 10, \
1879 .DwordLength = 1
1880
1881 struct GEN7_3DSTATE_INDEX_BUFFER {
1882 uint32_t CommandType;
1883 uint32_t CommandSubType;
1884 uint32_t _3DCommandOpcode;
1885 uint32_t _3DCommandSubOpcode;
1886 struct GEN7_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
1887 uint32_t CutIndexEnable;
1888 #define INDEX_BYTE 0
1889 #define INDEX_WORD 1
1890 #define INDEX_DWORD 2
1891 uint32_t IndexFormat;
1892 uint32_t DwordLength;
1893 __gen_address_type BufferStartingAddress;
1894 __gen_address_type BufferEndingAddress;
1895 };
1896
1897 static inline void
1898 GEN7_3DSTATE_INDEX_BUFFER_pack(__gen_user_data *data, void * restrict dst,
1899 const struct GEN7_3DSTATE_INDEX_BUFFER * restrict values)
1900 {
1901 uint32_t *dw = (uint32_t * restrict) dst;
1902
1903 uint32_t dw_MemoryObjectControlState;
1904 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
1905 dw[0] =
1906 __gen_field(values->CommandType, 29, 31) |
1907 __gen_field(values->CommandSubType, 27, 28) |
1908 __gen_field(values->_3DCommandOpcode, 24, 26) |
1909 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1910 __gen_field(dw_MemoryObjectControlState, 12, 15) |
1911 __gen_field(values->CutIndexEnable, 10, 10) |
1912 __gen_field(values->IndexFormat, 8, 9) |
1913 __gen_field(values->DwordLength, 0, 7) |
1914 0;
1915
1916 uint32_t dw1 =
1917 0;
1918
1919 dw[1] =
1920 __gen_combine_address(data, &dw[1], values->BufferStartingAddress, dw1);
1921
1922 uint32_t dw2 =
1923 0;
1924
1925 dw[2] =
1926 __gen_combine_address(data, &dw[2], values->BufferEndingAddress, dw2);
1927
1928 }
1929
1930 #define GEN7_3DSTATE_LINE_STIPPLE_length 0x00000003
1931 #define GEN7_3DSTATE_LINE_STIPPLE_length_bias 0x00000002
1932 #define GEN7_3DSTATE_LINE_STIPPLE_header \
1933 .CommandType = 3, \
1934 .CommandSubType = 3, \
1935 ._3DCommandOpcode = 1, \
1936 ._3DCommandSubOpcode = 8, \
1937 .DwordLength = 1
1938
1939 struct GEN7_3DSTATE_LINE_STIPPLE {
1940 uint32_t CommandType;
1941 uint32_t CommandSubType;
1942 uint32_t _3DCommandOpcode;
1943 uint32_t _3DCommandSubOpcode;
1944 uint32_t DwordLength;
1945 uint32_t ModifyEnableCurrentRepeatCounterCurrentStippleIndex;
1946 uint32_t CurrentRepeatCounter;
1947 uint32_t CurrentStippleIndex;
1948 uint32_t LineStipplePattern;
1949 float LineStippleInverseRepeatCount;
1950 uint32_t LineStippleRepeatCount;
1951 };
1952
1953 static inline void
1954 GEN7_3DSTATE_LINE_STIPPLE_pack(__gen_user_data *data, void * restrict dst,
1955 const struct GEN7_3DSTATE_LINE_STIPPLE * restrict values)
1956 {
1957 uint32_t *dw = (uint32_t * restrict) dst;
1958
1959 dw[0] =
1960 __gen_field(values->CommandType, 29, 31) |
1961 __gen_field(values->CommandSubType, 27, 28) |
1962 __gen_field(values->_3DCommandOpcode, 24, 26) |
1963 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1964 __gen_field(values->DwordLength, 0, 7) |
1965 0;
1966
1967 dw[1] =
1968 __gen_field(values->ModifyEnableCurrentRepeatCounterCurrentStippleIndex, 31, 31) |
1969 __gen_field(values->CurrentRepeatCounter, 21, 29) |
1970 __gen_field(values->CurrentStippleIndex, 16, 19) |
1971 __gen_field(values->LineStipplePattern, 0, 15) |
1972 0;
1973
1974 dw[2] =
1975 __gen_field(values->LineStippleInverseRepeatCount * (1 << 16), 15, 31) |
1976 __gen_field(values->LineStippleRepeatCount, 0, 8) |
1977 0;
1978
1979 }
1980
1981 #define GEN7_3DSTATE_MONOFILTER_SIZE_length 0x00000002
1982 #define GEN7_3DSTATE_MONOFILTER_SIZE_length_bias 0x00000002
1983 #define GEN7_3DSTATE_MONOFILTER_SIZE_header \
1984 .CommandType = 3, \
1985 .CommandSubType = 3, \
1986 ._3DCommandOpcode = 1, \
1987 ._3DCommandSubOpcode = 17, \
1988 .DwordLength = 0
1989
1990 struct GEN7_3DSTATE_MONOFILTER_SIZE {
1991 uint32_t CommandType;
1992 uint32_t CommandSubType;
1993 uint32_t _3DCommandOpcode;
1994 uint32_t _3DCommandSubOpcode;
1995 uint32_t DwordLength;
1996 uint32_t MonochromeFilterWidth;
1997 uint32_t MonochromeFilterHeight;
1998 };
1999
2000 static inline void
2001 GEN7_3DSTATE_MONOFILTER_SIZE_pack(__gen_user_data *data, void * restrict dst,
2002 const struct GEN7_3DSTATE_MONOFILTER_SIZE * restrict values)
2003 {
2004 uint32_t *dw = (uint32_t * restrict) dst;
2005
2006 dw[0] =
2007 __gen_field(values->CommandType, 29, 31) |
2008 __gen_field(values->CommandSubType, 27, 28) |
2009 __gen_field(values->_3DCommandOpcode, 24, 26) |
2010 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2011 __gen_field(values->DwordLength, 0, 7) |
2012 0;
2013
2014 dw[1] =
2015 __gen_field(values->MonochromeFilterWidth, 3, 5) |
2016 __gen_field(values->MonochromeFilterHeight, 0, 2) |
2017 0;
2018
2019 }
2020
2021 #define GEN7_3DSTATE_MULTISAMPLE_length 0x00000004
2022 #define GEN7_3DSTATE_MULTISAMPLE_length_bias 0x00000002
2023 #define GEN7_3DSTATE_MULTISAMPLE_header \
2024 .CommandType = 3, \
2025 .CommandSubType = 3, \
2026 ._3DCommandOpcode = 1, \
2027 ._3DCommandSubOpcode = 13, \
2028 .DwordLength = 2
2029
2030 struct GEN7_3DSTATE_MULTISAMPLE {
2031 uint32_t CommandType;
2032 uint32_t CommandSubType;
2033 uint32_t _3DCommandOpcode;
2034 uint32_t _3DCommandSubOpcode;
2035 uint32_t DwordLength;
2036 #define PIXLOC_CENTER 0
2037 #define PIXLOC_UL_CORNER 1
2038 uint32_t PixelLocation;
2039 #define NUMSAMPLES_1 0
2040 #define NUMSAMPLES_4 2
2041 #define NUMSAMPLES_8 3
2042 uint32_t NumberofMultisamples;
2043 float Sample3XOffset;
2044 float Sample3YOffset;
2045 float Sample2XOffset;
2046 float Sample2YOffset;
2047 float Sample1XOffset;
2048 float Sample1YOffset;
2049 float Sample0XOffset;
2050 float Sample0YOffset;
2051 float Sample7XOffset;
2052 float Sample7YOffset;
2053 float Sample6XOffset;
2054 float Sample6YOffset;
2055 float Sample5XOffset;
2056 float Sample5YOffset;
2057 float Sample4XOffset;
2058 float Sample4YOffset;
2059 };
2060
2061 static inline void
2062 GEN7_3DSTATE_MULTISAMPLE_pack(__gen_user_data *data, void * restrict dst,
2063 const struct GEN7_3DSTATE_MULTISAMPLE * restrict values)
2064 {
2065 uint32_t *dw = (uint32_t * restrict) dst;
2066
2067 dw[0] =
2068 __gen_field(values->CommandType, 29, 31) |
2069 __gen_field(values->CommandSubType, 27, 28) |
2070 __gen_field(values->_3DCommandOpcode, 24, 26) |
2071 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2072 __gen_field(values->DwordLength, 0, 7) |
2073 0;
2074
2075 dw[1] =
2076 __gen_field(values->PixelLocation, 4, 4) |
2077 __gen_field(values->NumberofMultisamples, 1, 3) |
2078 0;
2079
2080 dw[2] =
2081 __gen_field(values->Sample3XOffset * (1 << 4), 28, 31) |
2082 __gen_field(values->Sample3YOffset * (1 << 4), 24, 27) |
2083 __gen_field(values->Sample2XOffset * (1 << 4), 20, 23) |
2084 __gen_field(values->Sample2YOffset * (1 << 4), 16, 19) |
2085 __gen_field(values->Sample1XOffset * (1 << 4), 12, 15) |
2086 __gen_field(values->Sample1YOffset * (1 << 4), 8, 11) |
2087 __gen_field(values->Sample0XOffset * (1 << 4), 4, 7) |
2088 __gen_field(values->Sample0YOffset * (1 << 4), 0, 3) |
2089 0;
2090
2091 dw[3] =
2092 __gen_field(values->Sample7XOffset * (1 << 4), 28, 31) |
2093 __gen_field(values->Sample7YOffset * (1 << 4), 24, 27) |
2094 __gen_field(values->Sample6XOffset * (1 << 4), 20, 23) |
2095 __gen_field(values->Sample6YOffset * (1 << 4), 16, 19) |
2096 __gen_field(values->Sample5XOffset * (1 << 4), 12, 15) |
2097 __gen_field(values->Sample5YOffset * (1 << 4), 8, 11) |
2098 __gen_field(values->Sample4XOffset * (1 << 4), 4, 7) |
2099 __gen_field(values->Sample4YOffset * (1 << 4), 0, 3) |
2100 0;
2101
2102 }
2103
2104 #define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_length 0x00000002
2105 #define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_length_bias 0x00000002
2106 #define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_header \
2107 .CommandType = 3, \
2108 .CommandSubType = 3, \
2109 ._3DCommandOpcode = 1, \
2110 ._3DCommandSubOpcode = 6, \
2111 .DwordLength = 0
2112
2113 struct GEN7_3DSTATE_POLY_STIPPLE_OFFSET {
2114 uint32_t CommandType;
2115 uint32_t CommandSubType;
2116 uint32_t _3DCommandOpcode;
2117 uint32_t _3DCommandSubOpcode;
2118 uint32_t DwordLength;
2119 uint32_t PolygonStippleXOffset;
2120 uint32_t PolygonStippleYOffset;
2121 };
2122
2123 static inline void
2124 GEN7_3DSTATE_POLY_STIPPLE_OFFSET_pack(__gen_user_data *data, void * restrict dst,
2125 const struct GEN7_3DSTATE_POLY_STIPPLE_OFFSET * restrict values)
2126 {
2127 uint32_t *dw = (uint32_t * restrict) dst;
2128
2129 dw[0] =
2130 __gen_field(values->CommandType, 29, 31) |
2131 __gen_field(values->CommandSubType, 27, 28) |
2132 __gen_field(values->_3DCommandOpcode, 24, 26) |
2133 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2134 __gen_field(values->DwordLength, 0, 7) |
2135 0;
2136
2137 dw[1] =
2138 __gen_field(values->PolygonStippleXOffset, 8, 12) |
2139 __gen_field(values->PolygonStippleYOffset, 0, 4) |
2140 0;
2141
2142 }
2143
2144 #define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_length 0x00000021
2145 #define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_length_bias 0x00000002
2146 #define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_header\
2147 .CommandType = 3, \
2148 .CommandSubType = 3, \
2149 ._3DCommandOpcode = 1, \
2150 ._3DCommandSubOpcode = 7, \
2151 .DwordLength = 31
2152
2153 struct GEN7_3DSTATE_POLY_STIPPLE_PATTERN {
2154 uint32_t CommandType;
2155 uint32_t CommandSubType;
2156 uint32_t _3DCommandOpcode;
2157 uint32_t _3DCommandSubOpcode;
2158 uint32_t DwordLength;
2159 uint32_t PatternRow;
2160 };
2161
2162 static inline void
2163 GEN7_3DSTATE_POLY_STIPPLE_PATTERN_pack(__gen_user_data *data, void * restrict dst,
2164 const struct GEN7_3DSTATE_POLY_STIPPLE_PATTERN * restrict values)
2165 {
2166 uint32_t *dw = (uint32_t * restrict) dst;
2167
2168 dw[0] =
2169 __gen_field(values->CommandType, 29, 31) |
2170 __gen_field(values->CommandSubType, 27, 28) |
2171 __gen_field(values->_3DCommandOpcode, 24, 26) |
2172 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2173 __gen_field(values->DwordLength, 0, 7) |
2174 0;
2175
2176 dw[1] =
2177 __gen_field(values->PatternRow, 0, 31) |
2178 0;
2179
2180 }
2181
2182 #define GEN7_3DSTATE_PS_length 0x00000008
2183 #define GEN7_3DSTATE_PS_length_bias 0x00000002
2184 #define GEN7_3DSTATE_PS_header \
2185 .CommandType = 3, \
2186 .CommandSubType = 3, \
2187 ._3DCommandOpcode = 0, \
2188 ._3DCommandSubOpcode = 32, \
2189 .DwordLength = 6
2190
2191 struct GEN7_3DSTATE_PS {
2192 uint32_t CommandType;
2193 uint32_t CommandSubType;
2194 uint32_t _3DCommandOpcode;
2195 uint32_t _3DCommandSubOpcode;
2196 uint32_t DwordLength;
2197 uint32_t KernelStartPointer0;
2198 #define Multiple 0
2199 #define Single 1
2200 uint32_t SingleProgramFlowSPF;
2201 #define Dmask 0
2202 #define Vmask 1
2203 uint32_t VectorMaskEnableVME;
2204 uint32_t SamplerCount;
2205 #define FTZ 0
2206 #define RET 1
2207 uint32_t DenormalMode;
2208 uint32_t BindingTableEntryCount;
2209 #define IEEE745 0
2210 #define Alt 1
2211 uint32_t FloatingPointMode;
2212 #define RTNE 0
2213 #define RU 1
2214 #define RD 2
2215 #define RTZ 3
2216 uint32_t RoundingMode;
2217 uint32_t IllegalOpcodeExceptionEnable;
2218 uint32_t MaskStackExceptionEnable;
2219 uint32_t SoftwareExceptionEnable;
2220 uint32_t ScratchSpaceBasePointer;
2221 uint32_t PerThreadScratchSpace;
2222 uint32_t MaximumNumberofThreads;
2223 uint32_t PushConstantEnable;
2224 uint32_t AttributeEnable;
2225 uint32_t oMaskPresenttoRenderTarget;
2226 uint32_t RenderTargetFastClearEnable;
2227 uint32_t DualSourceBlendEnable;
2228 uint32_t RenderTargetResolveEnable;
2229 #define POSOFFSET_NONE 0
2230 #define POSOFFSET_CENTROID 2
2231 #define POSOFFSET_SAMPLE 3
2232 uint32_t PositionXYOffsetSelect;
2233 uint32_t _32PixelDispatchEnable;
2234 uint32_t _16PixelDispatchEnable;
2235 uint32_t _8PixelDispatchEnable;
2236 uint32_t DispatchGRFStartRegisterforConstantSetupData0;
2237 uint32_t DispatchGRFStartRegisterforConstantSetupData1;
2238 uint32_t DispatchGRFStartRegisterforConstantSetupData2;
2239 uint32_t KernelStartPointer1;
2240 uint32_t KernelStartPointer2;
2241 };
2242
2243 static inline void
2244 GEN7_3DSTATE_PS_pack(__gen_user_data *data, void * restrict dst,
2245 const struct GEN7_3DSTATE_PS * restrict values)
2246 {
2247 uint32_t *dw = (uint32_t * restrict) dst;
2248
2249 dw[0] =
2250 __gen_field(values->CommandType, 29, 31) |
2251 __gen_field(values->CommandSubType, 27, 28) |
2252 __gen_field(values->_3DCommandOpcode, 24, 26) |
2253 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2254 __gen_field(values->DwordLength, 0, 7) |
2255 0;
2256
2257 dw[1] =
2258 __gen_offset(values->KernelStartPointer0, 6, 31) |
2259 0;
2260
2261 dw[2] =
2262 __gen_field(values->SingleProgramFlowSPF, 31, 31) |
2263 __gen_field(values->VectorMaskEnableVME, 30, 30) |
2264 __gen_field(values->SamplerCount, 27, 29) |
2265 __gen_field(values->DenormalMode, 26, 26) |
2266 __gen_field(values->BindingTableEntryCount, 18, 25) |
2267 __gen_field(values->FloatingPointMode, 16, 16) |
2268 __gen_field(values->RoundingMode, 14, 15) |
2269 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2270 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
2271 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
2272 0;
2273
2274 dw[3] =
2275 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
2276 __gen_field(values->PerThreadScratchSpace, 0, 3) |
2277 0;
2278
2279 dw[4] =
2280 __gen_field(values->MaximumNumberofThreads, 24, 31) |
2281 __gen_field(values->PushConstantEnable, 11, 11) |
2282 __gen_field(values->AttributeEnable, 10, 10) |
2283 __gen_field(values->oMaskPresenttoRenderTarget, 9, 9) |
2284 __gen_field(values->RenderTargetFastClearEnable, 8, 8) |
2285 __gen_field(values->DualSourceBlendEnable, 7, 7) |
2286 __gen_field(values->RenderTargetResolveEnable, 6, 6) |
2287 __gen_field(values->PositionXYOffsetSelect, 3, 4) |
2288 __gen_field(values->_32PixelDispatchEnable, 2, 2) |
2289 __gen_field(values->_16PixelDispatchEnable, 1, 1) |
2290 __gen_field(values->_8PixelDispatchEnable, 0, 0) |
2291 0;
2292
2293 dw[5] =
2294 __gen_field(values->DispatchGRFStartRegisterforConstantSetupData0, 16, 22) |
2295 __gen_field(values->DispatchGRFStartRegisterforConstantSetupData1, 8, 14) |
2296 __gen_field(values->DispatchGRFStartRegisterforConstantSetupData2, 0, 6) |
2297 0;
2298
2299 dw[6] =
2300 __gen_offset(values->KernelStartPointer1, 6, 31) |
2301 0;
2302
2303 dw[7] =
2304 __gen_offset(values->KernelStartPointer2, 6, 31) |
2305 0;
2306
2307 }
2308
2309 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length 0x00000002
2310 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length_bias 0x00000002
2311 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_header\
2312 .CommandType = 3, \
2313 .CommandSubType = 3, \
2314 ._3DCommandOpcode = 1, \
2315 ._3DCommandSubOpcode = 20, \
2316 .DwordLength = 0
2317
2318 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS {
2319 uint32_t CommandType;
2320 uint32_t CommandSubType;
2321 uint32_t _3DCommandOpcode;
2322 uint32_t _3DCommandSubOpcode;
2323 uint32_t DwordLength;
2324 #define _0KB 0
2325 uint32_t ConstantBufferOffset;
2326 #define _0KB 0
2327 uint32_t ConstantBufferSize;
2328 };
2329
2330 static inline void
2331 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_pack(__gen_user_data *data, void * restrict dst,
2332 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS * restrict values)
2333 {
2334 uint32_t *dw = (uint32_t * restrict) dst;
2335
2336 dw[0] =
2337 __gen_field(values->CommandType, 29, 31) |
2338 __gen_field(values->CommandSubType, 27, 28) |
2339 __gen_field(values->_3DCommandOpcode, 24, 26) |
2340 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2341 __gen_field(values->DwordLength, 0, 7) |
2342 0;
2343
2344 dw[1] =
2345 __gen_field(values->ConstantBufferOffset, 16, 19) |
2346 __gen_field(values->ConstantBufferSize, 0, 4) |
2347 0;
2348
2349 }
2350
2351 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length 0x00000002
2352 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length_bias 0x00000002
2353 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_header\
2354 .CommandType = 3, \
2355 .CommandSubType = 3, \
2356 ._3DCommandOpcode = 1, \
2357 ._3DCommandSubOpcode = 21, \
2358 .DwordLength = 0
2359
2360 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS {
2361 uint32_t CommandType;
2362 uint32_t CommandSubType;
2363 uint32_t _3DCommandOpcode;
2364 uint32_t _3DCommandSubOpcode;
2365 uint32_t DwordLength;
2366 #define _0KB 0
2367 uint32_t ConstantBufferOffset;
2368 #define _0KB 0
2369 uint32_t ConstantBufferSize;
2370 };
2371
2372 static inline void
2373 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_pack(__gen_user_data *data, void * restrict dst,
2374 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS * restrict values)
2375 {
2376 uint32_t *dw = (uint32_t * restrict) dst;
2377
2378 dw[0] =
2379 __gen_field(values->CommandType, 29, 31) |
2380 __gen_field(values->CommandSubType, 27, 28) |
2381 __gen_field(values->_3DCommandOpcode, 24, 26) |
2382 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2383 __gen_field(values->DwordLength, 0, 7) |
2384 0;
2385
2386 dw[1] =
2387 __gen_field(values->ConstantBufferOffset, 16, 19) |
2388 __gen_field(values->ConstantBufferSize, 0, 4) |
2389 0;
2390
2391 }
2392
2393 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length 0x00000002
2394 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length_bias 0x00000002
2395 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_header\
2396 .CommandType = 3, \
2397 .CommandSubType = 3, \
2398 ._3DCommandOpcode = 1, \
2399 ._3DCommandSubOpcode = 19, \
2400 .DwordLength = 0
2401
2402 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS {
2403 uint32_t CommandType;
2404 uint32_t CommandSubType;
2405 uint32_t _3DCommandOpcode;
2406 uint32_t _3DCommandSubOpcode;
2407 uint32_t DwordLength;
2408 #define _0KB 0
2409 uint32_t ConstantBufferOffset;
2410 #define _0KB 0
2411 uint32_t ConstantBufferSize;
2412 };
2413
2414 static inline void
2415 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_pack(__gen_user_data *data, void * restrict dst,
2416 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS * restrict values)
2417 {
2418 uint32_t *dw = (uint32_t * restrict) dst;
2419
2420 dw[0] =
2421 __gen_field(values->CommandType, 29, 31) |
2422 __gen_field(values->CommandSubType, 27, 28) |
2423 __gen_field(values->_3DCommandOpcode, 24, 26) |
2424 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2425 __gen_field(values->DwordLength, 0, 7) |
2426 0;
2427
2428 dw[1] =
2429 __gen_field(values->ConstantBufferOffset, 16, 19) |
2430 __gen_field(values->ConstantBufferSize, 0, 4) |
2431 0;
2432
2433 }
2434
2435 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length 0x00000002
2436 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length_bias 0x00000002
2437 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_header\
2438 .CommandType = 3, \
2439 .CommandSubType = 3, \
2440 ._3DCommandOpcode = 1, \
2441 ._3DCommandSubOpcode = 22, \
2442 .DwordLength = 0
2443
2444 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS {
2445 uint32_t CommandType;
2446 uint32_t CommandSubType;
2447 uint32_t _3DCommandOpcode;
2448 uint32_t _3DCommandSubOpcode;
2449 uint32_t DwordLength;
2450 #define _0KB 0
2451 uint32_t ConstantBufferOffset;
2452 #define _0KB 0
2453 uint32_t ConstantBufferSize;
2454 };
2455
2456 static inline void
2457 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_pack(__gen_user_data *data, void * restrict dst,
2458 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS * restrict values)
2459 {
2460 uint32_t *dw = (uint32_t * restrict) dst;
2461
2462 dw[0] =
2463 __gen_field(values->CommandType, 29, 31) |
2464 __gen_field(values->CommandSubType, 27, 28) |
2465 __gen_field(values->_3DCommandOpcode, 24, 26) |
2466 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2467 __gen_field(values->DwordLength, 0, 7) |
2468 0;
2469
2470 dw[1] =
2471 __gen_field(values->ConstantBufferOffset, 16, 19) |
2472 __gen_field(values->ConstantBufferSize, 0, 4) |
2473 0;
2474
2475 }
2476
2477 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length 0x00000002
2478 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length_bias 0x00000002
2479 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_header\
2480 .CommandType = 3, \
2481 .CommandSubType = 3, \
2482 ._3DCommandOpcode = 1, \
2483 ._3DCommandSubOpcode = 18, \
2484 .DwordLength = 0
2485
2486 struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS {
2487 uint32_t CommandType;
2488 uint32_t CommandSubType;
2489 uint32_t _3DCommandOpcode;
2490 uint32_t _3DCommandSubOpcode;
2491 uint32_t DwordLength;
2492 #define _0KB 0
2493 uint32_t ConstantBufferOffset;
2494 #define _0KB 0
2495 uint32_t ConstantBufferSize;
2496 };
2497
2498 static inline void
2499 GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_pack(__gen_user_data *data, void * restrict dst,
2500 const struct GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS * restrict values)
2501 {
2502 uint32_t *dw = (uint32_t * restrict) dst;
2503
2504 dw[0] =
2505 __gen_field(values->CommandType, 29, 31) |
2506 __gen_field(values->CommandSubType, 27, 28) |
2507 __gen_field(values->_3DCommandOpcode, 24, 26) |
2508 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2509 __gen_field(values->DwordLength, 0, 7) |
2510 0;
2511
2512 dw[1] =
2513 __gen_field(values->ConstantBufferOffset, 16, 19) |
2514 __gen_field(values->ConstantBufferSize, 0, 4) |
2515 0;
2516
2517 }
2518
2519 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_length_bias 0x00000002
2520 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_header\
2521 .CommandType = 3, \
2522 .CommandSubType = 3, \
2523 ._3DCommandOpcode = 1, \
2524 ._3DCommandSubOpcode = 2
2525
2526 struct GEN7_PALETTE_ENTRY {
2527 uint32_t Alpha;
2528 uint32_t Red;
2529 uint32_t Green;
2530 uint32_t Blue;
2531 };
2532
2533 static inline void
2534 GEN7_PALETTE_ENTRY_pack(__gen_user_data *data, void * restrict dst,
2535 const struct GEN7_PALETTE_ENTRY * restrict values)
2536 {
2537 uint32_t *dw = (uint32_t * restrict) dst;
2538
2539 dw[0] =
2540 __gen_field(values->Alpha, 24, 31) |
2541 __gen_field(values->Red, 16, 23) |
2542 __gen_field(values->Green, 8, 15) |
2543 __gen_field(values->Blue, 0, 7) |
2544 0;
2545
2546 }
2547
2548 struct GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0 {
2549 uint32_t CommandType;
2550 uint32_t CommandSubType;
2551 uint32_t _3DCommandOpcode;
2552 uint32_t _3DCommandSubOpcode;
2553 uint32_t DwordLength;
2554 /* variable length fields follow */
2555 };
2556
2557 static inline void
2558 GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_pack(__gen_user_data *data, void * restrict dst,
2559 const struct GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0 * restrict values)
2560 {
2561 uint32_t *dw = (uint32_t * restrict) dst;
2562
2563 dw[0] =
2564 __gen_field(values->CommandType, 29, 31) |
2565 __gen_field(values->CommandSubType, 27, 28) |
2566 __gen_field(values->_3DCommandOpcode, 24, 26) |
2567 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2568 __gen_field(values->DwordLength, 0, 7) |
2569 0;
2570
2571 /* variable length fields follow */
2572 }
2573
2574 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_length_bias 0x00000002
2575 #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_header\
2576 .CommandType = 3, \
2577 .CommandSubType = 3, \
2578 ._3DCommandOpcode = 1, \
2579 ._3DCommandSubOpcode = 12
2580
2581 struct GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1 {
2582 uint32_t CommandType;
2583 uint32_t CommandSubType;
2584 uint32_t _3DCommandOpcode;
2585 uint32_t _3DCommandSubOpcode;
2586 uint32_t DwordLength;
2587 /* variable length fields follow */
2588 };
2589
2590 static inline void
2591 GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_pack(__gen_user_data *data, void * restrict dst,
2592 const struct GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1 * restrict values)
2593 {
2594 uint32_t *dw = (uint32_t * restrict) dst;
2595
2596 dw[0] =
2597 __gen_field(values->CommandType, 29, 31) |
2598 __gen_field(values->CommandSubType, 27, 28) |
2599 __gen_field(values->_3DCommandOpcode, 24, 26) |
2600 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2601 __gen_field(values->DwordLength, 0, 7) |
2602 0;
2603
2604 /* variable length fields follow */
2605 }
2606
2607 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_length 0x00000002
2608 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_length_bias 0x00000002
2609 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_header\
2610 .CommandType = 3, \
2611 .CommandSubType = 3, \
2612 ._3DCommandOpcode = 0, \
2613 ._3DCommandSubOpcode = 45, \
2614 .DwordLength = 0
2615
2616 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS {
2617 uint32_t CommandType;
2618 uint32_t CommandSubType;
2619 uint32_t _3DCommandOpcode;
2620 uint32_t _3DCommandSubOpcode;
2621 uint32_t DwordLength;
2622 uint32_t PointertoDSSamplerState;
2623 };
2624
2625 static inline void
2626 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
2627 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS * restrict values)
2628 {
2629 uint32_t *dw = (uint32_t * restrict) dst;
2630
2631 dw[0] =
2632 __gen_field(values->CommandType, 29, 31) |
2633 __gen_field(values->CommandSubType, 27, 28) |
2634 __gen_field(values->_3DCommandOpcode, 24, 26) |
2635 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2636 __gen_field(values->DwordLength, 0, 7) |
2637 0;
2638
2639 dw[1] =
2640 __gen_offset(values->PointertoDSSamplerState, 5, 31) |
2641 0;
2642
2643 }
2644
2645 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_length 0x00000002
2646 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_length_bias 0x00000002
2647 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_header\
2648 .CommandType = 3, \
2649 .CommandSubType = 3, \
2650 ._3DCommandOpcode = 0, \
2651 ._3DCommandSubOpcode = 46, \
2652 .DwordLength = 0
2653
2654 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS {
2655 uint32_t CommandType;
2656 uint32_t CommandSubType;
2657 uint32_t _3DCommandOpcode;
2658 uint32_t _3DCommandSubOpcode;
2659 uint32_t DwordLength;
2660 uint32_t PointertoGSSamplerState;
2661 };
2662
2663 static inline void
2664 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
2665 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS * restrict values)
2666 {
2667 uint32_t *dw = (uint32_t * restrict) dst;
2668
2669 dw[0] =
2670 __gen_field(values->CommandType, 29, 31) |
2671 __gen_field(values->CommandSubType, 27, 28) |
2672 __gen_field(values->_3DCommandOpcode, 24, 26) |
2673 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2674 __gen_field(values->DwordLength, 0, 7) |
2675 0;
2676
2677 dw[1] =
2678 __gen_offset(values->PointertoGSSamplerState, 5, 31) |
2679 0;
2680
2681 }
2682
2683 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_length 0x00000002
2684 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_length_bias 0x00000002
2685 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_header\
2686 .CommandType = 3, \
2687 .CommandSubType = 3, \
2688 ._3DCommandOpcode = 0, \
2689 ._3DCommandSubOpcode = 44, \
2690 .DwordLength = 0
2691
2692 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS {
2693 uint32_t CommandType;
2694 uint32_t CommandSubType;
2695 uint32_t _3DCommandOpcode;
2696 uint32_t _3DCommandSubOpcode;
2697 uint32_t DwordLength;
2698 uint32_t PointertoHSSamplerState;
2699 };
2700
2701 static inline void
2702 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
2703 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS * restrict values)
2704 {
2705 uint32_t *dw = (uint32_t * restrict) dst;
2706
2707 dw[0] =
2708 __gen_field(values->CommandType, 29, 31) |
2709 __gen_field(values->CommandSubType, 27, 28) |
2710 __gen_field(values->_3DCommandOpcode, 24, 26) |
2711 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2712 __gen_field(values->DwordLength, 0, 7) |
2713 0;
2714
2715 dw[1] =
2716 __gen_offset(values->PointertoHSSamplerState, 5, 31) |
2717 0;
2718
2719 }
2720
2721 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_length 0x00000002
2722 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_length_bias 0x00000002
2723 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_header\
2724 .CommandType = 3, \
2725 .CommandSubType = 3, \
2726 ._3DCommandOpcode = 0, \
2727 ._3DCommandSubOpcode = 47, \
2728 .DwordLength = 0
2729
2730 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS {
2731 uint32_t CommandType;
2732 uint32_t CommandSubType;
2733 uint32_t _3DCommandOpcode;
2734 uint32_t _3DCommandSubOpcode;
2735 uint32_t DwordLength;
2736 uint32_t PointertoPSSamplerState;
2737 };
2738
2739 static inline void
2740 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
2741 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS * restrict values)
2742 {
2743 uint32_t *dw = (uint32_t * restrict) dst;
2744
2745 dw[0] =
2746 __gen_field(values->CommandType, 29, 31) |
2747 __gen_field(values->CommandSubType, 27, 28) |
2748 __gen_field(values->_3DCommandOpcode, 24, 26) |
2749 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2750 __gen_field(values->DwordLength, 0, 7) |
2751 0;
2752
2753 dw[1] =
2754 __gen_offset(values->PointertoPSSamplerState, 5, 31) |
2755 0;
2756
2757 }
2758
2759 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_length 0x00000002
2760 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_length_bias 0x00000002
2761 #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_header\
2762 .CommandType = 3, \
2763 .CommandSubType = 3, \
2764 ._3DCommandOpcode = 0, \
2765 ._3DCommandSubOpcode = 43, \
2766 .DwordLength = 0
2767
2768 struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS {
2769 uint32_t CommandType;
2770 uint32_t CommandSubType;
2771 uint32_t _3DCommandOpcode;
2772 uint32_t _3DCommandSubOpcode;
2773 uint32_t DwordLength;
2774 uint32_t PointertoVSSamplerState;
2775 };
2776
2777 static inline void
2778 GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
2779 const struct GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS * restrict values)
2780 {
2781 uint32_t *dw = (uint32_t * restrict) dst;
2782
2783 dw[0] =
2784 __gen_field(values->CommandType, 29, 31) |
2785 __gen_field(values->CommandSubType, 27, 28) |
2786 __gen_field(values->_3DCommandOpcode, 24, 26) |
2787 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2788 __gen_field(values->DwordLength, 0, 7) |
2789 0;
2790
2791 dw[1] =
2792 __gen_offset(values->PointertoVSSamplerState, 5, 31) |
2793 0;
2794
2795 }
2796
2797 #define GEN7_3DSTATE_SAMPLE_MASK_length 0x00000002
2798 #define GEN7_3DSTATE_SAMPLE_MASK_length_bias 0x00000002
2799 #define GEN7_3DSTATE_SAMPLE_MASK_header \
2800 .CommandType = 3, \
2801 .CommandSubType = 3, \
2802 ._3DCommandOpcode = 0, \
2803 ._3DCommandSubOpcode = 24, \
2804 .DwordLength = 0
2805
2806 struct GEN7_3DSTATE_SAMPLE_MASK {
2807 uint32_t CommandType;
2808 uint32_t CommandSubType;
2809 uint32_t _3DCommandOpcode;
2810 uint32_t _3DCommandSubOpcode;
2811 uint32_t DwordLength;
2812 uint32_t SampleMask;
2813 };
2814
2815 static inline void
2816 GEN7_3DSTATE_SAMPLE_MASK_pack(__gen_user_data *data, void * restrict dst,
2817 const struct GEN7_3DSTATE_SAMPLE_MASK * restrict values)
2818 {
2819 uint32_t *dw = (uint32_t * restrict) dst;
2820
2821 dw[0] =
2822 __gen_field(values->CommandType, 29, 31) |
2823 __gen_field(values->CommandSubType, 27, 28) |
2824 __gen_field(values->_3DCommandOpcode, 24, 26) |
2825 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2826 __gen_field(values->DwordLength, 0, 7) |
2827 0;
2828
2829 dw[1] =
2830 __gen_field(values->SampleMask, 0, 7) |
2831 0;
2832
2833 }
2834
2835 #define GEN7_3DSTATE_SBE_length 0x0000000e
2836 #define GEN7_3DSTATE_SBE_length_bias 0x00000002
2837 #define GEN7_3DSTATE_SBE_header \
2838 .CommandType = 3, \
2839 .CommandSubType = 3, \
2840 ._3DCommandOpcode = 0, \
2841 ._3DCommandSubOpcode = 31, \
2842 .DwordLength = 12
2843
2844 struct GEN7_3DSTATE_SBE {
2845 uint32_t CommandType;
2846 uint32_t CommandSubType;
2847 uint32_t _3DCommandOpcode;
2848 uint32_t _3DCommandSubOpcode;
2849 uint32_t DwordLength;
2850 #define SWIZ_0_15 0
2851 #define SWIZ_16_31 1
2852 uint32_t AttributeSwizzleControlMode;
2853 uint32_t NumberofSFOutputAttributes;
2854 uint32_t AttributeSwizzleEnable;
2855 #define UPPERLEFT 0
2856 #define LOWERLEFT 1
2857 uint32_t PointSpriteTextureCoordinateOrigin;
2858 uint32_t VertexURBEntryReadLength;
2859 uint32_t VertexURBEntryReadOffset;
2860 uint32_t Attribute2n1ComponentOverrideW;
2861 uint32_t Attribute2n1ComponentOverrideZ;
2862 uint32_t Attribute2n1ComponentOverrideY;
2863 uint32_t Attribute2n1ComponentOverrideX;
2864 #define CONST_0000 0
2865 #define CONST_0001_FLOAT 1
2866 #define CONST_1111_FLOAT 2
2867 #define PRIM_ID 3
2868 uint32_t Attribute2n1ConstantSource;
2869 #define INPUTATTR 0
2870 #define INPUTATTR_FACING 1
2871 #define INPUTATTR_W 2
2872 #define INPUTATTR_FACING_W 3
2873 uint32_t Attribute2n1SwizzleSelect;
2874 uint32_t Attribute2n1SourceAttribute;
2875 uint32_t Attribute2nComponentOverrideW;
2876 uint32_t Attribute2nComponentOverrideZ;
2877 uint32_t Attribute2nComponentOverrideY;
2878 uint32_t Attribute2nComponentOverrideX;
2879 #define CONST_0000 0
2880 #define CONST_0001_FLOAT 1
2881 #define CONST_1111_FLOAT 2
2882 #define PRIM_ID 3
2883 uint32_t Attribute2nConstantSource;
2884 #define INPUTATTR 0
2885 #define INPUTATTR_FACING 1
2886 #define INPUTATTR_W 2
2887 #define INPUTATTR_FACING_W 3
2888 uint32_t Attribute2nSwizzleSelect;
2889 uint32_t Attribute2nSourceAttribute;
2890 uint32_t PointSpriteTextureCoordinateEnable;
2891 uint32_t ConstantInterpolationEnable310;
2892 uint32_t Attribute7WrapShortestEnables;
2893 uint32_t Attribute6WrapShortestEnables;
2894 uint32_t Attribute5WrapShortestEnables;
2895 uint32_t Attribute4WrapShortestEnables;
2896 uint32_t Attribute3WrapShortestEnables;
2897 uint32_t Attribute2WrapShortestEnables;
2898 uint32_t Attribute1WrapShortestEnables;
2899 uint32_t Attribute0WrapShortestEnables;
2900 uint32_t Attribute15WrapShortestEnables;
2901 uint32_t Attribute14WrapShortestEnables;
2902 uint32_t Attribute13WrapShortestEnables;
2903 uint32_t Attribute12WrapShortestEnables;
2904 uint32_t Attribute11WrapShortestEnables;
2905 uint32_t Attribute10WrapShortestEnables;
2906 uint32_t Attribute9WrapShortestEnables;
2907 uint32_t Attribute8WrapShortestEnables;
2908 };
2909
2910 static inline void
2911 GEN7_3DSTATE_SBE_pack(__gen_user_data *data, void * restrict dst,
2912 const struct GEN7_3DSTATE_SBE * restrict values)
2913 {
2914 uint32_t *dw = (uint32_t * restrict) dst;
2915
2916 dw[0] =
2917 __gen_field(values->CommandType, 29, 31) |
2918 __gen_field(values->CommandSubType, 27, 28) |
2919 __gen_field(values->_3DCommandOpcode, 24, 26) |
2920 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2921 __gen_field(values->DwordLength, 0, 7) |
2922 0;
2923
2924 dw[1] =
2925 __gen_field(values->AttributeSwizzleControlMode, 28, 28) |
2926 __gen_field(values->NumberofSFOutputAttributes, 22, 27) |
2927 __gen_field(values->AttributeSwizzleEnable, 21, 21) |
2928 __gen_field(values->PointSpriteTextureCoordinateOrigin, 20, 20) |
2929 __gen_field(values->VertexURBEntryReadLength, 11, 15) |
2930 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
2931 0;
2932
2933 dw[2] =
2934 __gen_field(values->Attribute2n1ComponentOverrideW, 31, 31) |
2935 __gen_field(values->Attribute2n1ComponentOverrideZ, 30, 30) |
2936 __gen_field(values->Attribute2n1ComponentOverrideY, 29, 29) |
2937 __gen_field(values->Attribute2n1ComponentOverrideX, 28, 28) |
2938 __gen_field(values->Attribute2n1ConstantSource, 25, 26) |
2939 __gen_field(values->Attribute2n1SwizzleSelect, 22, 23) |
2940 __gen_field(values->Attribute2n1SourceAttribute, 16, 20) |
2941 __gen_field(values->Attribute2nComponentOverrideW, 15, 15) |
2942 __gen_field(values->Attribute2nComponentOverrideZ, 14, 14) |
2943 __gen_field(values->Attribute2nComponentOverrideY, 13, 13) |
2944 __gen_field(values->Attribute2nComponentOverrideX, 12, 12) |
2945 __gen_field(values->Attribute2nConstantSource, 9, 10) |
2946 __gen_field(values->Attribute2nSwizzleSelect, 6, 7) |
2947 __gen_field(values->Attribute2nSourceAttribute, 0, 4) |
2948 0;
2949
2950 dw[10] =
2951 __gen_field(values->PointSpriteTextureCoordinateEnable, 0, 31) |
2952 0;
2953
2954 dw[11] =
2955 __gen_field(values->ConstantInterpolationEnable310, 0, 31) |
2956 0;
2957
2958 dw[12] =
2959 __gen_field(values->Attribute7WrapShortestEnables, 28, 31) |
2960 __gen_field(values->Attribute6WrapShortestEnables, 24, 27) |
2961 __gen_field(values->Attribute5WrapShortestEnables, 20, 23) |
2962 __gen_field(values->Attribute4WrapShortestEnables, 16, 19) |
2963 __gen_field(values->Attribute3WrapShortestEnables, 12, 15) |
2964 __gen_field(values->Attribute2WrapShortestEnables, 8, 11) |
2965 __gen_field(values->Attribute1WrapShortestEnables, 4, 7) |
2966 __gen_field(values->Attribute0WrapShortestEnables, 0, 3) |
2967 0;
2968
2969 dw[13] =
2970 __gen_field(values->Attribute15WrapShortestEnables, 28, 31) |
2971 __gen_field(values->Attribute14WrapShortestEnables, 24, 27) |
2972 __gen_field(values->Attribute13WrapShortestEnables, 20, 23) |
2973 __gen_field(values->Attribute12WrapShortestEnables, 16, 19) |
2974 __gen_field(values->Attribute11WrapShortestEnables, 12, 15) |
2975 __gen_field(values->Attribute10WrapShortestEnables, 8, 11) |
2976 __gen_field(values->Attribute9WrapShortestEnables, 4, 7) |
2977 __gen_field(values->Attribute8WrapShortestEnables, 0, 3) |
2978 0;
2979
2980 }
2981
2982 #define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_length 0x00000002
2983 #define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_length_bias 0x00000002
2984 #define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_header\
2985 .CommandType = 3, \
2986 .CommandSubType = 3, \
2987 ._3DCommandOpcode = 0, \
2988 ._3DCommandSubOpcode = 15, \
2989 .DwordLength = 0
2990
2991 struct GEN7_3DSTATE_SCISSOR_STATE_POINTERS {
2992 uint32_t CommandType;
2993 uint32_t CommandSubType;
2994 uint32_t _3DCommandOpcode;
2995 uint32_t _3DCommandSubOpcode;
2996 uint32_t DwordLength;
2997 uint32_t ScissorRectPointer;
2998 };
2999
3000 static inline void
3001 GEN7_3DSTATE_SCISSOR_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
3002 const struct GEN7_3DSTATE_SCISSOR_STATE_POINTERS * restrict values)
3003 {
3004 uint32_t *dw = (uint32_t * restrict) dst;
3005
3006 dw[0] =
3007 __gen_field(values->CommandType, 29, 31) |
3008 __gen_field(values->CommandSubType, 27, 28) |
3009 __gen_field(values->_3DCommandOpcode, 24, 26) |
3010 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3011 __gen_field(values->DwordLength, 0, 7) |
3012 0;
3013
3014 dw[1] =
3015 __gen_offset(values->ScissorRectPointer, 5, 31) |
3016 0;
3017
3018 }
3019
3020 #define GEN7_3DSTATE_SF_length 0x00000007
3021 #define GEN7_3DSTATE_SF_length_bias 0x00000002
3022 #define GEN7_3DSTATE_SF_header \
3023 .CommandType = 3, \
3024 .CommandSubType = 3, \
3025 ._3DCommandOpcode = 0, \
3026 ._3DCommandSubOpcode = 19, \
3027 .DwordLength = 5
3028
3029 struct GEN7_3DSTATE_SF {
3030 uint32_t CommandType;
3031 uint32_t CommandSubType;
3032 uint32_t _3DCommandOpcode;
3033 uint32_t _3DCommandSubOpcode;
3034 uint32_t DwordLength;
3035 #define D32_FLOAT_S8X24_UINT 0
3036 #define D32_FLOAT 1
3037 #define D24_UNORM_S8_UINT 2
3038 #define D24_UNORM_X8_UINT 3
3039 #define D16_UNORM 5
3040 uint32_t DepthBufferSurfaceFormat;
3041 uint32_t LegacyGlobalDepthBiasEnable;
3042 uint32_t StatisticsEnable;
3043 uint32_t GlobalDepthOffsetEnableSolid;
3044 uint32_t GlobalDepthOffsetEnableWireframe;
3045 uint32_t GlobalDepthOffsetEnablePoint;
3046 #define RASTER_SOLID 0
3047 #define RASTER_WIREFRAME 1
3048 #define RASTER_POINT 2
3049 uint32_t FrontFaceFillMode;
3050 #define RASTER_SOLID 0
3051 #define RASTER_WIREFRAME 1
3052 #define RASTER_POINT 2
3053 uint32_t BackFaceFillMode;
3054 uint32_t ViewTransformEnable;
3055 uint32_t FrontWinding;
3056 uint32_t AntiAliasingEnable;
3057 #define CULLMODE_BOTH 0
3058 #define CULLMODE_NONE 1
3059 #define CULLMODE_FRONT 2
3060 #define CULLMODE_BACK 3
3061 uint32_t CullMode;
3062 float LineWidth;
3063 uint32_t LineEndCapAntialiasingRegionWidth;
3064 uint32_t ScissorRectangleEnable;
3065 uint32_t MultisampleRasterizationMode;
3066 uint32_t LastPixelEnable;
3067 #define Vertex0 0
3068 #define Vertex1 1
3069 #define Vertex2 2
3070 uint32_t TriangleStripListProvokingVertexSelect;
3071 uint32_t LineStripListProvokingVertexSelect;
3072 #define Vertex0 0
3073 #define Vertex1 1
3074 #define Vertex2 2
3075 uint32_t TriangleFanProvokingVertexSelect;
3076 #define AALINEDISTANCE_TRUE 1
3077 uint32_t AALineDistanceMode;
3078 uint32_t VertexSubPixelPrecisionSelect;
3079 uint32_t UsePointWidthState;
3080 float PointWidth;
3081 uint32_t GlobalDepthOffsetConstant;
3082 uint32_t GlobalDepthOffsetScale;
3083 uint32_t GlobalDepthOffsetClamp;
3084 };
3085
3086 static inline void
3087 GEN7_3DSTATE_SF_pack(__gen_user_data *data, void * restrict dst,
3088 const struct GEN7_3DSTATE_SF * restrict values)
3089 {
3090 uint32_t *dw = (uint32_t * restrict) dst;
3091
3092 dw[0] =
3093 __gen_field(values->CommandType, 29, 31) |
3094 __gen_field(values->CommandSubType, 27, 28) |
3095 __gen_field(values->_3DCommandOpcode, 24, 26) |
3096 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3097 __gen_field(values->DwordLength, 0, 7) |
3098 0;
3099
3100 dw[1] =
3101 __gen_field(values->DepthBufferSurfaceFormat, 12, 14) |
3102 __gen_field(values->LegacyGlobalDepthBiasEnable, 11, 11) |
3103 __gen_field(values->StatisticsEnable, 10, 10) |
3104 __gen_field(values->GlobalDepthOffsetEnableSolid, 9, 9) |
3105 __gen_field(values->GlobalDepthOffsetEnableWireframe, 8, 8) |
3106 __gen_field(values->GlobalDepthOffsetEnablePoint, 7, 7) |
3107 __gen_field(values->FrontFaceFillMode, 5, 6) |
3108 __gen_field(values->BackFaceFillMode, 3, 4) |
3109 __gen_field(values->ViewTransformEnable, 1, 1) |
3110 __gen_field(values->FrontWinding, 0, 0) |
3111 0;
3112
3113 dw[2] =
3114 __gen_field(values->AntiAliasingEnable, 31, 31) |
3115 __gen_field(values->CullMode, 29, 30) |
3116 __gen_field(values->LineWidth * (1 << 7), 18, 27) |
3117 __gen_field(values->LineEndCapAntialiasingRegionWidth, 16, 17) |
3118 __gen_field(values->ScissorRectangleEnable, 11, 11) |
3119 __gen_field(values->MultisampleRasterizationMode, 8, 9) |
3120 0;
3121
3122 dw[3] =
3123 __gen_field(values->LastPixelEnable, 31, 31) |
3124 __gen_field(values->TriangleStripListProvokingVertexSelect, 29, 30) |
3125 __gen_field(values->LineStripListProvokingVertexSelect, 27, 28) |
3126 __gen_field(values->TriangleFanProvokingVertexSelect, 25, 26) |
3127 __gen_field(values->AALineDistanceMode, 14, 14) |
3128 __gen_field(values->VertexSubPixelPrecisionSelect, 12, 12) |
3129 __gen_field(values->UsePointWidthState, 11, 11) |
3130 __gen_field(values->PointWidth * (1 << 3), 0, 10) |
3131 0;
3132
3133 dw[4] =
3134 __gen_field(values->GlobalDepthOffsetConstant, 0, 31) |
3135 0;
3136
3137 dw[5] =
3138 __gen_field(values->GlobalDepthOffsetScale, 0, 31) |
3139 0;
3140
3141 dw[6] =
3142 __gen_field(values->GlobalDepthOffsetClamp, 0, 31) |
3143 0;
3144
3145 }
3146
3147 #define GEN7_3DSTATE_SO_BUFFER_length 0x00000004
3148 #define GEN7_3DSTATE_SO_BUFFER_length_bias 0x00000002
3149 #define GEN7_3DSTATE_SO_BUFFER_header \
3150 .CommandType = 3, \
3151 .CommandSubType = 3, \
3152 ._3DCommandOpcode = 1, \
3153 ._3DCommandSubOpcode = 24, \
3154 .DwordLength = 2
3155
3156 struct GEN7_3DSTATE_SO_BUFFER {
3157 uint32_t CommandType;
3158 uint32_t CommandSubType;
3159 uint32_t _3DCommandOpcode;
3160 uint32_t _3DCommandSubOpcode;
3161 uint32_t DwordLength;
3162 uint32_t SOBufferIndex;
3163 struct GEN7_MEMORY_OBJECT_CONTROL_STATE SOBufferObjectControlState;
3164 uint32_t SurfacePitch;
3165 __gen_address_type SurfaceBaseAddress;
3166 __gen_address_type SurfaceEndAddress;
3167 };
3168
3169 static inline void
3170 GEN7_3DSTATE_SO_BUFFER_pack(__gen_user_data *data, void * restrict dst,
3171 const struct GEN7_3DSTATE_SO_BUFFER * restrict values)
3172 {
3173 uint32_t *dw = (uint32_t * restrict) dst;
3174
3175 dw[0] =
3176 __gen_field(values->CommandType, 29, 31) |
3177 __gen_field(values->CommandSubType, 27, 28) |
3178 __gen_field(values->_3DCommandOpcode, 24, 26) |
3179 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3180 __gen_field(values->DwordLength, 0, 7) |
3181 0;
3182
3183 uint32_t dw_SOBufferObjectControlState;
3184 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SOBufferObjectControlState, &values->SOBufferObjectControlState);
3185 dw[1] =
3186 __gen_field(values->SOBufferIndex, 29, 30) |
3187 __gen_field(dw_SOBufferObjectControlState, 25, 28) |
3188 __gen_field(values->SurfacePitch, 0, 11) |
3189 0;
3190
3191 uint32_t dw2 =
3192 0;
3193
3194 dw[2] =
3195 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
3196
3197 uint32_t dw3 =
3198 0;
3199
3200 dw[3] =
3201 __gen_combine_address(data, &dw[3], values->SurfaceEndAddress, dw3);
3202
3203 }
3204
3205 #define GEN7_3DSTATE_SO_DECL_LIST_length_bias 0x00000002
3206 #define GEN7_3DSTATE_SO_DECL_LIST_header \
3207 .CommandType = 3, \
3208 .CommandSubType = 3, \
3209 ._3DCommandOpcode = 1, \
3210 ._3DCommandSubOpcode = 23
3211
3212 struct GEN7_SO_DECL {
3213 uint32_t OutputBufferSlot;
3214 uint32_t HoleFlag;
3215 uint32_t RegisterIndex;
3216 uint32_t ComponentMask;
3217 };
3218
3219 static inline void
3220 GEN7_SO_DECL_pack(__gen_user_data *data, void * restrict dst,
3221 const struct GEN7_SO_DECL * restrict values)
3222 {
3223 uint32_t *dw = (uint32_t * restrict) dst;
3224
3225 dw[0] =
3226 __gen_field(values->OutputBufferSlot, 12, 13) |
3227 __gen_field(values->HoleFlag, 11, 11) |
3228 __gen_field(values->RegisterIndex, 4, 9) |
3229 __gen_field(values->ComponentMask, 0, 3) |
3230 0;
3231
3232 }
3233
3234 struct GEN7_SO_DECL_ENTRY {
3235 struct GEN7_SO_DECL Stream3Decl;
3236 struct GEN7_SO_DECL Stream2Decl;
3237 struct GEN7_SO_DECL Stream1Decl;
3238 struct GEN7_SO_DECL Stream0Decl;
3239 };
3240
3241 static inline void
3242 GEN7_SO_DECL_ENTRY_pack(__gen_user_data *data, void * restrict dst,
3243 const struct GEN7_SO_DECL_ENTRY * restrict values)
3244 {
3245 uint32_t *dw = (uint32_t * restrict) dst;
3246
3247 uint32_t dw_Stream3Decl;
3248 GEN7_SO_DECL_pack(data, &dw_Stream3Decl, &values->Stream3Decl);
3249 uint32_t dw_Stream2Decl;
3250 GEN7_SO_DECL_pack(data, &dw_Stream2Decl, &values->Stream2Decl);
3251 uint32_t dw_Stream1Decl;
3252 GEN7_SO_DECL_pack(data, &dw_Stream1Decl, &values->Stream1Decl);
3253 uint32_t dw_Stream0Decl;
3254 GEN7_SO_DECL_pack(data, &dw_Stream0Decl, &values->Stream0Decl);
3255 uint64_t qw0 =
3256 __gen_field(dw_Stream3Decl, 48, 63) |
3257 __gen_field(dw_Stream2Decl, 32, 47) |
3258 __gen_field(dw_Stream1Decl, 16, 31) |
3259 __gen_field(dw_Stream0Decl, 0, 15) |
3260 0;
3261
3262 dw[0] = qw0;
3263 dw[1] = qw0 >> 32;
3264
3265 }
3266
3267 struct GEN7_3DSTATE_SO_DECL_LIST {
3268 uint32_t CommandType;
3269 uint32_t CommandSubType;
3270 uint32_t _3DCommandOpcode;
3271 uint32_t _3DCommandSubOpcode;
3272 uint32_t DwordLength;
3273 uint32_t StreamtoBufferSelects3;
3274 uint32_t StreamtoBufferSelects2;
3275 uint32_t StreamtoBufferSelects1;
3276 uint32_t StreamtoBufferSelects0;
3277 uint32_t NumEntries3;
3278 uint32_t NumEntries2;
3279 uint32_t NumEntries1;
3280 uint32_t NumEntries0;
3281 /* variable length fields follow */
3282 };
3283
3284 static inline void
3285 GEN7_3DSTATE_SO_DECL_LIST_pack(__gen_user_data *data, void * restrict dst,
3286 const struct GEN7_3DSTATE_SO_DECL_LIST * restrict values)
3287 {
3288 uint32_t *dw = (uint32_t * restrict) dst;
3289
3290 dw[0] =
3291 __gen_field(values->CommandType, 29, 31) |
3292 __gen_field(values->CommandSubType, 27, 28) |
3293 __gen_field(values->_3DCommandOpcode, 24, 26) |
3294 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3295 __gen_field(values->DwordLength, 0, 8) |
3296 0;
3297
3298 dw[1] =
3299 __gen_field(values->StreamtoBufferSelects3, 12, 15) |
3300 __gen_field(values->StreamtoBufferSelects2, 8, 11) |
3301 __gen_field(values->StreamtoBufferSelects1, 4, 7) |
3302 __gen_field(values->StreamtoBufferSelects0, 0, 3) |
3303 0;
3304
3305 dw[2] =
3306 __gen_field(values->NumEntries3, 24, 31) |
3307 __gen_field(values->NumEntries2, 16, 23) |
3308 __gen_field(values->NumEntries1, 8, 15) |
3309 __gen_field(values->NumEntries0, 0, 7) |
3310 0;
3311
3312 /* variable length fields follow */
3313 }
3314
3315 #define GEN7_3DSTATE_STENCIL_BUFFER_length 0x00000003
3316 #define GEN7_3DSTATE_STENCIL_BUFFER_length_bias 0x00000002
3317 #define GEN7_3DSTATE_STENCIL_BUFFER_header \
3318 .CommandType = 3, \
3319 .CommandSubType = 3, \
3320 ._3DCommandOpcode = 0, \
3321 ._3DCommandSubOpcode = 6, \
3322 .DwordLength = 1
3323
3324 struct GEN7_3DSTATE_STENCIL_BUFFER {
3325 uint32_t CommandType;
3326 uint32_t CommandSubType;
3327 uint32_t _3DCommandOpcode;
3328 uint32_t _3DCommandSubOpcode;
3329 uint32_t DwordLength;
3330 struct GEN7_MEMORY_OBJECT_CONTROL_STATE StencilBufferObjectControlState;
3331 uint32_t SurfacePitch;
3332 __gen_address_type SurfaceBaseAddress;
3333 };
3334
3335 static inline void
3336 GEN7_3DSTATE_STENCIL_BUFFER_pack(__gen_user_data *data, void * restrict dst,
3337 const struct GEN7_3DSTATE_STENCIL_BUFFER * restrict values)
3338 {
3339 uint32_t *dw = (uint32_t * restrict) dst;
3340
3341 dw[0] =
3342 __gen_field(values->CommandType, 29, 31) |
3343 __gen_field(values->CommandSubType, 27, 28) |
3344 __gen_field(values->_3DCommandOpcode, 24, 26) |
3345 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3346 __gen_field(values->DwordLength, 0, 7) |
3347 0;
3348
3349 uint32_t dw_StencilBufferObjectControlState;
3350 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StencilBufferObjectControlState, &values->StencilBufferObjectControlState);
3351 dw[1] =
3352 __gen_field(dw_StencilBufferObjectControlState, 25, 28) |
3353 __gen_field(values->SurfacePitch, 0, 16) |
3354 0;
3355
3356 uint32_t dw2 =
3357 0;
3358
3359 dw[2] =
3360 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
3361
3362 }
3363
3364 #define GEN7_3DSTATE_STREAMOUT_length 0x00000003
3365 #define GEN7_3DSTATE_STREAMOUT_length_bias 0x00000002
3366 #define GEN7_3DSTATE_STREAMOUT_header \
3367 .CommandType = 3, \
3368 .CommandSubType = 3, \
3369 ._3DCommandOpcode = 0, \
3370 ._3DCommandSubOpcode = 30, \
3371 .DwordLength = 1
3372
3373 struct GEN7_3DSTATE_STREAMOUT {
3374 uint32_t CommandType;
3375 uint32_t CommandSubType;
3376 uint32_t _3DCommandOpcode;
3377 uint32_t _3DCommandSubOpcode;
3378 uint32_t DwordLength;
3379 uint32_t SOFunctionEnable;
3380 uint32_t RenderingDisable;
3381 uint32_t RenderStreamSelect;
3382 #define LEADING 0
3383 #define TRAILING 1
3384 uint32_t ReorderMode;
3385 uint32_t SOStatisticsEnable;
3386 uint32_t SOBufferEnable3;
3387 uint32_t SOBufferEnable2;
3388 uint32_t SOBufferEnable1;
3389 uint32_t SOBufferEnable0;
3390 uint32_t Stream3VertexReadOffset;
3391 uint32_t Stream3VertexReadLength;
3392 uint32_t Stream2VertexReadOffset;
3393 uint32_t Stream2VertexReadLength;
3394 uint32_t Stream1VertexReadOffset;
3395 uint32_t Stream1VertexReadLength;
3396 uint32_t Stream0VertexReadOffset;
3397 uint32_t Stream0VertexReadLength;
3398 };
3399
3400 static inline void
3401 GEN7_3DSTATE_STREAMOUT_pack(__gen_user_data *data, void * restrict dst,
3402 const struct GEN7_3DSTATE_STREAMOUT * restrict values)
3403 {
3404 uint32_t *dw = (uint32_t * restrict) dst;
3405
3406 dw[0] =
3407 __gen_field(values->CommandType, 29, 31) |
3408 __gen_field(values->CommandSubType, 27, 28) |
3409 __gen_field(values->_3DCommandOpcode, 24, 26) |
3410 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3411 __gen_field(values->DwordLength, 0, 7) |
3412 0;
3413
3414 dw[1] =
3415 __gen_field(values->SOFunctionEnable, 31, 31) |
3416 __gen_field(values->RenderingDisable, 30, 30) |
3417 __gen_field(values->RenderStreamSelect, 27, 28) |
3418 __gen_field(values->ReorderMode, 26, 26) |
3419 __gen_field(values->SOStatisticsEnable, 25, 25) |
3420 __gen_field(values->SOBufferEnable3, 11, 11) |
3421 __gen_field(values->SOBufferEnable2, 10, 10) |
3422 __gen_field(values->SOBufferEnable1, 9, 9) |
3423 __gen_field(values->SOBufferEnable0, 8, 8) |
3424 0;
3425
3426 dw[2] =
3427 __gen_field(values->Stream3VertexReadOffset, 29, 29) |
3428 __gen_field(values->Stream3VertexReadLength, 24, 28) |
3429 __gen_field(values->Stream2VertexReadOffset, 21, 21) |
3430 __gen_field(values->Stream2VertexReadLength, 16, 20) |
3431 __gen_field(values->Stream1VertexReadOffset, 13, 13) |
3432 __gen_field(values->Stream1VertexReadLength, 8, 12) |
3433 __gen_field(values->Stream0VertexReadOffset, 5, 5) |
3434 __gen_field(values->Stream0VertexReadLength, 0, 4) |
3435 0;
3436
3437 }
3438
3439 #define GEN7_3DSTATE_TE_length 0x00000004
3440 #define GEN7_3DSTATE_TE_length_bias 0x00000002
3441 #define GEN7_3DSTATE_TE_header \
3442 .CommandType = 3, \
3443 .CommandSubType = 3, \
3444 ._3DCommandOpcode = 0, \
3445 ._3DCommandSubOpcode = 28, \
3446 .DwordLength = 2
3447
3448 struct GEN7_3DSTATE_TE {
3449 uint32_t CommandType;
3450 uint32_t CommandSubType;
3451 uint32_t _3DCommandOpcode;
3452 uint32_t _3DCommandSubOpcode;
3453 uint32_t DwordLength;
3454 #define INTEGER 0
3455 #define ODD_FRACTIONAL 1
3456 #define EVEN_FRACTIONAL 2
3457 uint32_t Partitioning;
3458 #define POINT 0
3459 #define LINE 1
3460 #define TRI_CW 2
3461 #define TRI_CCW 3
3462 uint32_t OutputTopology;
3463 #define QUAD 0
3464 #define TRI 1
3465 #define ISOLINE 2
3466 uint32_t TEDomain;
3467 #define HW_TESS 0
3468 #define SW_TESS 1
3469 uint32_t TEMode;
3470 uint32_t TEEnable;
3471 float MaximumTessellationFactorOdd;
3472 float MaximumTessellationFactorNotOdd;
3473 };
3474
3475 static inline void
3476 GEN7_3DSTATE_TE_pack(__gen_user_data *data, void * restrict dst,
3477 const struct GEN7_3DSTATE_TE * restrict values)
3478 {
3479 uint32_t *dw = (uint32_t * restrict) dst;
3480
3481 dw[0] =
3482 __gen_field(values->CommandType, 29, 31) |
3483 __gen_field(values->CommandSubType, 27, 28) |
3484 __gen_field(values->_3DCommandOpcode, 24, 26) |
3485 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3486 __gen_field(values->DwordLength, 0, 7) |
3487 0;
3488
3489 dw[1] =
3490 __gen_field(values->Partitioning, 12, 13) |
3491 __gen_field(values->OutputTopology, 8, 9) |
3492 __gen_field(values->TEDomain, 4, 5) |
3493 __gen_field(values->TEMode, 1, 2) |
3494 __gen_field(values->TEEnable, 0, 0) |
3495 0;
3496
3497 dw[2] =
3498 __gen_float(values->MaximumTessellationFactorOdd) |
3499 0;
3500
3501 dw[3] =
3502 __gen_float(values->MaximumTessellationFactorNotOdd) |
3503 0;
3504
3505 }
3506
3507 #define GEN7_3DSTATE_URB_DS_length 0x00000002
3508 #define GEN7_3DSTATE_URB_DS_length_bias 0x00000002
3509 #define GEN7_3DSTATE_URB_DS_header \
3510 .CommandType = 3, \
3511 .CommandSubType = 3, \
3512 ._3DCommandOpcode = 0, \
3513 ._3DCommandSubOpcode = 50, \
3514 .DwordLength = 0
3515
3516 struct GEN7_3DSTATE_URB_DS {
3517 uint32_t CommandType;
3518 uint32_t CommandSubType;
3519 uint32_t _3DCommandOpcode;
3520 uint32_t _3DCommandSubOpcode;
3521 uint32_t DwordLength;
3522 uint32_t DSURBStartingAddress;
3523 uint32_t DSURBEntryAllocationSize;
3524 uint32_t DSNumberofURBEntries;
3525 };
3526
3527 static inline void
3528 GEN7_3DSTATE_URB_DS_pack(__gen_user_data *data, void * restrict dst,
3529 const struct GEN7_3DSTATE_URB_DS * restrict values)
3530 {
3531 uint32_t *dw = (uint32_t * restrict) dst;
3532
3533 dw[0] =
3534 __gen_field(values->CommandType, 29, 31) |
3535 __gen_field(values->CommandSubType, 27, 28) |
3536 __gen_field(values->_3DCommandOpcode, 24, 26) |
3537 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3538 __gen_field(values->DwordLength, 0, 7) |
3539 0;
3540
3541 dw[1] =
3542 __gen_field(values->DSURBStartingAddress, 25, 29) |
3543 __gen_field(values->DSURBEntryAllocationSize, 16, 24) |
3544 __gen_field(values->DSNumberofURBEntries, 0, 15) |
3545 0;
3546
3547 }
3548
3549 #define GEN7_3DSTATE_URB_GS_length 0x00000002
3550 #define GEN7_3DSTATE_URB_GS_length_bias 0x00000002
3551 #define GEN7_3DSTATE_URB_GS_header \
3552 .CommandType = 3, \
3553 .CommandSubType = 3, \
3554 ._3DCommandOpcode = 0, \
3555 ._3DCommandSubOpcode = 51, \
3556 .DwordLength = 0
3557
3558 struct GEN7_3DSTATE_URB_GS {
3559 uint32_t CommandType;
3560 uint32_t CommandSubType;
3561 uint32_t _3DCommandOpcode;
3562 uint32_t _3DCommandSubOpcode;
3563 uint32_t DwordLength;
3564 uint32_t GSURBStartingAddress;
3565 uint32_t GSURBEntryAllocationSize;
3566 uint32_t GSNumberofURBEntries;
3567 };
3568
3569 static inline void
3570 GEN7_3DSTATE_URB_GS_pack(__gen_user_data *data, void * restrict dst,
3571 const struct GEN7_3DSTATE_URB_GS * restrict values)
3572 {
3573 uint32_t *dw = (uint32_t * restrict) dst;
3574
3575 dw[0] =
3576 __gen_field(values->CommandType, 29, 31) |
3577 __gen_field(values->CommandSubType, 27, 28) |
3578 __gen_field(values->_3DCommandOpcode, 24, 26) |
3579 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3580 __gen_field(values->DwordLength, 0, 7) |
3581 0;
3582
3583 dw[1] =
3584 __gen_field(values->GSURBStartingAddress, 25, 29) |
3585 __gen_field(values->GSURBEntryAllocationSize, 16, 24) |
3586 __gen_field(values->GSNumberofURBEntries, 0, 15) |
3587 0;
3588
3589 }
3590
3591 #define GEN7_3DSTATE_URB_HS_length 0x00000002
3592 #define GEN7_3DSTATE_URB_HS_length_bias 0x00000002
3593 #define GEN7_3DSTATE_URB_HS_header \
3594 .CommandType = 3, \
3595 .CommandSubType = 3, \
3596 ._3DCommandOpcode = 0, \
3597 ._3DCommandSubOpcode = 49, \
3598 .DwordLength = 0
3599
3600 struct GEN7_3DSTATE_URB_HS {
3601 uint32_t CommandType;
3602 uint32_t CommandSubType;
3603 uint32_t _3DCommandOpcode;
3604 uint32_t _3DCommandSubOpcode;
3605 uint32_t DwordLength;
3606 uint32_t HSURBStartingAddress;
3607 uint32_t HSURBEntryAllocationSize;
3608 uint32_t HSNumberofURBEntries;
3609 };
3610
3611 static inline void
3612 GEN7_3DSTATE_URB_HS_pack(__gen_user_data *data, void * restrict dst,
3613 const struct GEN7_3DSTATE_URB_HS * restrict values)
3614 {
3615 uint32_t *dw = (uint32_t * restrict) dst;
3616
3617 dw[0] =
3618 __gen_field(values->CommandType, 29, 31) |
3619 __gen_field(values->CommandSubType, 27, 28) |
3620 __gen_field(values->_3DCommandOpcode, 24, 26) |
3621 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3622 __gen_field(values->DwordLength, 0, 7) |
3623 0;
3624
3625 dw[1] =
3626 __gen_field(values->HSURBStartingAddress, 25, 29) |
3627 __gen_field(values->HSURBEntryAllocationSize, 16, 24) |
3628 __gen_field(values->HSNumberofURBEntries, 0, 15) |
3629 0;
3630
3631 }
3632
3633 #define GEN7_3DSTATE_VERTEX_BUFFERS_length_bias 0x00000002
3634 #define GEN7_3DSTATE_VERTEX_BUFFERS_header \
3635 .CommandType = 3, \
3636 .CommandSubType = 3, \
3637 ._3DCommandOpcode = 0, \
3638 ._3DCommandSubOpcode = 8
3639
3640 struct GEN7_VERTEX_BUFFER_STATE {
3641 uint32_t VertexBufferIndex;
3642 #define VERTEXDATA 0
3643 #define INSTANCEDATA 1
3644 uint32_t BufferAccessType;
3645 struct GEN7_MEMORY_OBJECT_CONTROL_STATE VertexBufferMemoryObjectControlState;
3646 uint32_t AddressModifyEnable;
3647 uint32_t NullVertexBuffer;
3648 uint32_t VertexFetchInvalidate;
3649 uint32_t BufferPitch;
3650 __gen_address_type BufferStartingAddress;
3651 __gen_address_type EndAddress;
3652 uint32_t InstanceDataStepRate;
3653 };
3654
3655 static inline void
3656 GEN7_VERTEX_BUFFER_STATE_pack(__gen_user_data *data, void * restrict dst,
3657 const struct GEN7_VERTEX_BUFFER_STATE * restrict values)
3658 {
3659 uint32_t *dw = (uint32_t * restrict) dst;
3660
3661 uint32_t dw_VertexBufferMemoryObjectControlState;
3662 GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_VertexBufferMemoryObjectControlState, &values->VertexBufferMemoryObjectControlState);
3663 dw[0] =
3664 __gen_field(values->VertexBufferIndex, 26, 31) |
3665 __gen_field(values->BufferAccessType, 20, 20) |
3666 __gen_field(dw_VertexBufferMemoryObjectControlState, 16, 19) |
3667 __gen_field(values->AddressModifyEnable, 14, 14) |
3668 __gen_field(values->NullVertexBuffer, 13, 13) |
3669 __gen_field(values->VertexFetchInvalidate, 12, 12) |
3670 __gen_field(values->BufferPitch, 0, 11) |
3671 0;
3672
3673 uint32_t dw1 =
3674 0;
3675
3676 dw[1] =
3677 __gen_combine_address(data, &dw[1], values->BufferStartingAddress, dw1);
3678
3679 uint32_t dw2 =
3680 0;
3681
3682 dw[2] =
3683 __gen_combine_address(data, &dw[2], values->EndAddress, dw2);
3684
3685 dw[3] =
3686 __gen_field(values->InstanceDataStepRate, 0, 31) |
3687 0;
3688
3689 }
3690
3691 struct GEN7_3DSTATE_VERTEX_BUFFERS {
3692 uint32_t CommandType;
3693 uint32_t CommandSubType;
3694 uint32_t _3DCommandOpcode;
3695 uint32_t _3DCommandSubOpcode;
3696 uint32_t DwordLength;
3697 /* variable length fields follow */
3698 };
3699
3700 static inline void
3701 GEN7_3DSTATE_VERTEX_BUFFERS_pack(__gen_user_data *data, void * restrict dst,
3702 const struct GEN7_3DSTATE_VERTEX_BUFFERS * restrict values)
3703 {
3704 uint32_t *dw = (uint32_t * restrict) dst;
3705
3706 dw[0] =
3707 __gen_field(values->CommandType, 29, 31) |
3708 __gen_field(values->CommandSubType, 27, 28) |
3709 __gen_field(values->_3DCommandOpcode, 24, 26) |
3710 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3711 __gen_field(values->DwordLength, 0, 7) |
3712 0;
3713
3714 /* variable length fields follow */
3715 }
3716
3717 #define GEN7_3DSTATE_VERTEX_ELEMENTS_length_bias 0x00000002
3718 #define GEN7_3DSTATE_VERTEX_ELEMENTS_header \
3719 .CommandType = 3, \
3720 .CommandSubType = 3, \
3721 ._3DCommandOpcode = 0, \
3722 ._3DCommandSubOpcode = 9
3723
3724 struct GEN7_VERTEX_ELEMENT_STATE {
3725 uint32_t VertexBufferIndex;
3726 uint32_t Valid;
3727 uint32_t SourceElementFormat;
3728 uint32_t EdgeFlagEnable;
3729 uint32_t SourceElementOffset;
3730 uint32_t Component0Control;
3731 uint32_t Component1Control;
3732 uint32_t Component2Control;
3733 uint32_t Component3Control;
3734 };
3735
3736 static inline void
3737 GEN7_VERTEX_ELEMENT_STATE_pack(__gen_user_data *data, void * restrict dst,
3738 const struct GEN7_VERTEX_ELEMENT_STATE * restrict values)
3739 {
3740 uint32_t *dw = (uint32_t * restrict) dst;
3741
3742 dw[0] =
3743 __gen_field(values->VertexBufferIndex, 26, 31) |
3744 __gen_field(values->Valid, 25, 25) |
3745 __gen_field(values->SourceElementFormat, 16, 24) |
3746 __gen_field(values->EdgeFlagEnable, 15, 15) |
3747 __gen_field(values->SourceElementOffset, 0, 11) |
3748 0;
3749
3750 dw[1] =
3751 __gen_field(values->Component0Control, 28, 30) |
3752 __gen_field(values->Component1Control, 24, 26) |
3753 __gen_field(values->Component2Control, 20, 22) |
3754 __gen_field(values->Component3Control, 16, 18) |
3755 0;
3756
3757 }
3758
3759 struct GEN7_3DSTATE_VERTEX_ELEMENTS {
3760 uint32_t CommandType;
3761 uint32_t CommandSubType;
3762 uint32_t _3DCommandOpcode;
3763 uint32_t _3DCommandSubOpcode;
3764 uint32_t DwordLength;
3765 /* variable length fields follow */
3766 };
3767
3768 static inline void
3769 GEN7_3DSTATE_VERTEX_ELEMENTS_pack(__gen_user_data *data, void * restrict dst,
3770 const struct GEN7_3DSTATE_VERTEX_ELEMENTS * restrict values)
3771 {
3772 uint32_t *dw = (uint32_t * restrict) dst;
3773
3774 dw[0] =
3775 __gen_field(values->CommandType, 29, 31) |
3776 __gen_field(values->CommandSubType, 27, 28) |
3777 __gen_field(values->_3DCommandOpcode, 24, 26) |
3778 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3779 __gen_field(values->DwordLength, 0, 7) |
3780 0;
3781
3782 /* variable length fields follow */
3783 }
3784
3785 #define GEN7_3DSTATE_VF_STATISTICS_length 0x00000001
3786 #define GEN7_3DSTATE_VF_STATISTICS_length_bias 0x00000001
3787 #define GEN7_3DSTATE_VF_STATISTICS_header \
3788 .CommandType = 3, \
3789 .CommandSubType = 1, \
3790 ._3DCommandOpcode = 0, \
3791 ._3DCommandSubOpcode = 11
3792
3793 struct GEN7_3DSTATE_VF_STATISTICS {
3794 uint32_t CommandType;
3795 uint32_t CommandSubType;
3796 uint32_t _3DCommandOpcode;
3797 uint32_t _3DCommandSubOpcode;
3798 uint32_t StatisticsEnable;
3799 };
3800
3801 static inline void
3802 GEN7_3DSTATE_VF_STATISTICS_pack(__gen_user_data *data, void * restrict dst,
3803 const struct GEN7_3DSTATE_VF_STATISTICS * restrict values)
3804 {
3805 uint32_t *dw = (uint32_t * restrict) dst;
3806
3807 dw[0] =
3808 __gen_field(values->CommandType, 29, 31) |
3809 __gen_field(values->CommandSubType, 27, 28) |
3810 __gen_field(values->_3DCommandOpcode, 24, 26) |
3811 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3812 __gen_field(values->StatisticsEnable, 0, 0) |
3813 0;
3814
3815 }
3816
3817 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length 0x00000002
3818 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length_bias 0x00000002
3819 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_header\
3820 .CommandType = 3, \
3821 .CommandSubType = 3, \
3822 ._3DCommandOpcode = 0, \
3823 ._3DCommandSubOpcode = 35, \
3824 .DwordLength = 0
3825
3826 struct GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC {
3827 uint32_t CommandType;
3828 uint32_t CommandSubType;
3829 uint32_t _3DCommandOpcode;
3830 uint32_t _3DCommandSubOpcode;
3831 uint32_t DwordLength;
3832 uint32_t CCViewportPointer;
3833 };
3834
3835 static inline void
3836 GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_pack(__gen_user_data *data, void * restrict dst,
3837 const struct GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC * restrict values)
3838 {
3839 uint32_t *dw = (uint32_t * restrict) dst;
3840
3841 dw[0] =
3842 __gen_field(values->CommandType, 29, 31) |
3843 __gen_field(values->CommandSubType, 27, 28) |
3844 __gen_field(values->_3DCommandOpcode, 24, 26) |
3845 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3846 __gen_field(values->DwordLength, 0, 7) |
3847 0;
3848
3849 dw[1] =
3850 __gen_offset(values->CCViewportPointer, 5, 31) |
3851 0;
3852
3853 }
3854
3855 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length 0x00000002
3856 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length_bias 0x00000002
3857 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_header\
3858 .CommandType = 3, \
3859 .CommandSubType = 3, \
3860 ._3DCommandOpcode = 0, \
3861 ._3DCommandSubOpcode = 33, \
3862 .DwordLength = 0
3863
3864 struct GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP {
3865 uint32_t CommandType;
3866 uint32_t CommandSubType;
3867 uint32_t _3DCommandOpcode;
3868 uint32_t _3DCommandSubOpcode;
3869 uint32_t DwordLength;
3870 uint32_t SFClipViewportPointer;
3871 };
3872
3873 static inline void
3874 GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_pack(__gen_user_data *data, void * restrict dst,
3875 const struct GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP * restrict values)
3876 {
3877 uint32_t *dw = (uint32_t * restrict) dst;
3878
3879 dw[0] =
3880 __gen_field(values->CommandType, 29, 31) |
3881 __gen_field(values->CommandSubType, 27, 28) |
3882 __gen_field(values->_3DCommandOpcode, 24, 26) |
3883 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3884 __gen_field(values->DwordLength, 0, 7) |
3885 0;
3886
3887 dw[1] =
3888 __gen_offset(values->SFClipViewportPointer, 6, 31) |
3889 0;
3890
3891 }
3892
3893 #define GEN7_3DSTATE_VS_length 0x00000006
3894 #define GEN7_3DSTATE_VS_length_bias 0x00000002
3895 #define GEN7_3DSTATE_VS_header \
3896 .CommandType = 3, \
3897 .CommandSubType = 3, \
3898 ._3DCommandOpcode = 0, \
3899 ._3DCommandSubOpcode = 16, \
3900 .DwordLength = 4
3901
3902 struct GEN7_3DSTATE_VS {
3903 uint32_t CommandType;
3904 uint32_t CommandSubType;
3905 uint32_t _3DCommandOpcode;
3906 uint32_t _3DCommandSubOpcode;
3907 uint32_t DwordLength;
3908 uint32_t KernelStartPointer;
3909 #define Multiple 0
3910 #define Single 1
3911 uint32_t SingleVertexDispatch;
3912 #define Dmask 0
3913 #define Vmask 1
3914 uint32_t VectorMaskEnableVME;
3915 #define NoSamplers 0
3916 #define _14Samplers 1
3917 #define _58Samplers 2
3918 #define _912Samplers 3
3919 #define _1316Samplers 4
3920 uint32_t SamplerCount;
3921 uint32_t BindingTableEntryCount;
3922 #define IEEE754 0
3923 #define Alternate 1
3924 uint32_t FloatingPointMode;
3925 uint32_t IllegalOpcodeExceptionEnable;
3926 uint32_t SoftwareExceptionEnable;
3927 uint32_t ScratchSpaceBaseOffset;
3928 uint32_t PerThreadScratchSpace;
3929 uint32_t DispatchGRFStartRegisterforURBData;
3930 uint32_t VertexURBEntryReadLength;
3931 uint32_t VertexURBEntryReadOffset;
3932 uint32_t MaximumNumberofThreads;
3933 uint32_t StatisticsEnable;
3934 uint32_t VertexCacheDisable;
3935 uint32_t VSFunctionEnable;
3936 };
3937
3938 static inline void
3939 GEN7_3DSTATE_VS_pack(__gen_user_data *data, void * restrict dst,
3940 const struct GEN7_3DSTATE_VS * restrict values)
3941 {
3942 uint32_t *dw = (uint32_t * restrict) dst;
3943
3944 dw[0] =
3945 __gen_field(values->CommandType, 29, 31) |
3946 __gen_field(values->CommandSubType, 27, 28) |
3947 __gen_field(values->_3DCommandOpcode, 24, 26) |
3948 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3949 __gen_field(values->DwordLength, 0, 7) |
3950 0;
3951
3952 dw[1] =
3953 __gen_offset(values->KernelStartPointer, 6, 31) |
3954 0;
3955
3956 dw[2] =
3957 __gen_field(values->SingleVertexDispatch, 31, 31) |
3958 __gen_field(values->VectorMaskEnableVME, 30, 30) |
3959 __gen_field(values->SamplerCount, 27, 29) |
3960 __gen_field(values->BindingTableEntryCount, 18, 25) |
3961 __gen_field(values->FloatingPointMode, 16, 16) |
3962 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
3963 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
3964 0;
3965
3966 dw[3] =
3967 __gen_offset(values->ScratchSpaceBaseOffset, 10, 31) |
3968 __gen_field(values->PerThreadScratchSpace, 0, 3) |
3969 0;
3970
3971 dw[4] =
3972 __gen_field(values->DispatchGRFStartRegisterforURBData, 20, 24) |
3973 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
3974 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
3975 0;
3976
3977 dw[5] =
3978 __gen_field(values->MaximumNumberofThreads, 25, 31) |
3979 __gen_field(values->StatisticsEnable, 10, 10) |
3980 __gen_field(values->VertexCacheDisable, 1, 1) |
3981 __gen_field(values->VSFunctionEnable, 0, 0) |
3982 0;
3983
3984 }
3985
3986 #define GEN7_3DSTATE_WM_length 0x00000003
3987 #define GEN7_3DSTATE_WM_length_bias 0x00000002
3988 #define GEN7_3DSTATE_WM_header \
3989 .CommandType = 3, \
3990 .CommandSubType = 3, \
3991 ._3DCommandOpcode = 0, \
3992 ._3DCommandSubOpcode = 20, \
3993 .DwordLength = 1
3994
3995 struct GEN7_3DSTATE_WM {
3996 uint32_t CommandType;
3997 uint32_t CommandSubType;
3998 uint32_t _3DCommandOpcode;
3999 uint32_t _3DCommandSubOpcode;
4000 uint32_t DwordLength;
4001 uint32_t StatisticsEnable;
4002 uint32_t DepthBufferClear;
4003 uint32_t ThreadDispatchEnable;
4004 uint32_t DepthBufferResolveEnable;
4005 uint32_t HierarchicalDepthBufferResolveEnable;
4006 uint32_t LegacyDiamondLineRasterization;
4007 uint32_t PixelShaderKillPixel;
4008 #define PSCDEPTH_OFF 0
4009 #define PSCDEPTH_ON 1
4010 #define PSCDEPTH_ON_GE 2
4011 #define PSCDEPTH_ON_LE 3
4012 uint32_t PixelShaderComputedDepthMode;
4013 #define EDSC_NORMAL 0
4014 #define EDSC_PSEXEC 1
4015 #define EDSC_PREPS 2
4016 uint32_t EarlyDepthStencilControl;
4017 uint32_t PixelShaderUsesSourceDepth;
4018 uint32_t PixelShaderUsesSourceW;
4019 #define INTERP_PIXEL 0
4020 #define INTERP_CENTROID 2
4021 #define INTERP_SAMPLE 3
4022 uint32_t PositionZWInterpolationMode;
4023 uint32_t BarycentricInterpolationMode;
4024 uint32_t PixelShaderUsesInputCoverageMask;
4025 uint32_t LineEndCapAntialiasingRegionWidth;
4026 uint32_t LineAntialiasingRegionWidth;
4027 uint32_t PolygonStippleEnable;
4028 uint32_t LineStippleEnable;
4029 #define RASTRULE_UPPER_LEFT 0
4030 #define RASTRULE_UPPER_RIGHT 1
4031 uint32_t PointRasterizationRule;
4032 #define MSRASTMODE_OFF_PIXEL 0
4033 #define MSRASTMODE_OFF_PATTERN 1
4034 #define MSRASTMODE_ON_PIXEL 2
4035 #define MSRASTMODE_ON_PATTERN 3
4036 uint32_t MultisampleRasterizationMode;
4037 #define MSDISPMODE_PERSAMPLE 0
4038 #define MSDISPMODE_PERPIXEL 1
4039 uint32_t MultisampleDispatchMode;
4040 };
4041
4042 static inline void
4043 GEN7_3DSTATE_WM_pack(__gen_user_data *data, void * restrict dst,
4044 const struct GEN7_3DSTATE_WM * restrict values)
4045 {
4046 uint32_t *dw = (uint32_t * restrict) dst;
4047
4048 dw[0] =
4049 __gen_field(values->CommandType, 29, 31) |
4050 __gen_field(values->CommandSubType, 27, 28) |
4051 __gen_field(values->_3DCommandOpcode, 24, 26) |
4052 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4053 __gen_field(values->DwordLength, 0, 7) |
4054 0;
4055
4056 dw[1] =
4057 __gen_field(values->StatisticsEnable, 31, 31) |
4058 __gen_field(values->DepthBufferClear, 30, 30) |
4059 __gen_field(values->ThreadDispatchEnable, 29, 29) |
4060 __gen_field(values->DepthBufferResolveEnable, 28, 28) |
4061 __gen_field(values->HierarchicalDepthBufferResolveEnable, 27, 27) |
4062 __gen_field(values->LegacyDiamondLineRasterization, 26, 26) |
4063 __gen_field(values->PixelShaderKillPixel, 25, 25) |
4064 __gen_field(values->PixelShaderComputedDepthMode, 23, 24) |
4065 __gen_field(values->EarlyDepthStencilControl, 21, 22) |
4066 __gen_field(values->PixelShaderUsesSourceDepth, 20, 20) |
4067 __gen_field(values->PixelShaderUsesSourceW, 19, 19) |
4068 __gen_field(values->PositionZWInterpolationMode, 17, 18) |
4069 __gen_field(values->BarycentricInterpolationMode, 11, 16) |
4070 __gen_field(values->PixelShaderUsesInputCoverageMask, 10, 10) |
4071 __gen_field(values->LineEndCapAntialiasingRegionWidth, 8, 9) |
4072 __gen_field(values->LineAntialiasingRegionWidth, 6, 7) |
4073 __gen_field(values->PolygonStippleEnable, 4, 4) |
4074 __gen_field(values->LineStippleEnable, 3, 3) |
4075 __gen_field(values->PointRasterizationRule, 2, 2) |
4076 __gen_field(values->MultisampleRasterizationMode, 0, 1) |
4077 0;
4078
4079 dw[2] =
4080 __gen_field(values->MultisampleDispatchMode, 31, 31) |
4081 0;
4082
4083 }
4084
4085 #define GEN7_GPGPU_OBJECT_length 0x00000008
4086 #define GEN7_GPGPU_OBJECT_length_bias 0x00000002
4087 #define GEN7_GPGPU_OBJECT_header \
4088 .CommandType = 3, \
4089 .Pipeline = 2, \
4090 .MediaCommandOpcode = 1, \
4091 .SubOpcode = 4, \
4092 .DwordLength = 6
4093
4094 struct GEN7_GPGPU_OBJECT {
4095 uint32_t CommandType;
4096 uint32_t Pipeline;
4097 uint32_t MediaCommandOpcode;
4098 uint32_t SubOpcode;
4099 uint32_t PredicateEnable;
4100 uint32_t DwordLength;
4101 uint32_t SharedLocalMemoryFixedOffset;
4102 uint32_t InterfaceDescriptorOffset;
4103 uint32_t SharedLocalMemoryOffset;
4104 uint32_t EndofThreadGroup;
4105 #define HalfSlice1 2
4106 #define HalfSlice0 1
4107 #define EitherHalfSlice 0
4108 uint32_t HalfSliceDestinationSelect;
4109 uint32_t IndirectDataLength;
4110 uint32_t IndirectDataStartAddress;
4111 uint32_t ThreadGroupIDX;
4112 uint32_t ThreadGroupIDY;
4113 uint32_t ThreadGroupIDZ;
4114 uint32_t ExecutionMask;
4115 };
4116
4117 static inline void
4118 GEN7_GPGPU_OBJECT_pack(__gen_user_data *data, void * restrict dst,
4119 const struct GEN7_GPGPU_OBJECT * restrict values)
4120 {
4121 uint32_t *dw = (uint32_t * restrict) dst;
4122
4123 dw[0] =
4124 __gen_field(values->CommandType, 29, 31) |
4125 __gen_field(values->Pipeline, 27, 28) |
4126 __gen_field(values->MediaCommandOpcode, 24, 26) |
4127 __gen_field(values->SubOpcode, 16, 23) |
4128 __gen_field(values->PredicateEnable, 8, 8) |
4129 __gen_field(values->DwordLength, 0, 7) |
4130 0;
4131
4132 dw[1] =
4133 __gen_field(values->SharedLocalMemoryFixedOffset, 7, 7) |
4134 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
4135 0;
4136
4137 dw[2] =
4138 __gen_field(values->SharedLocalMemoryOffset, 28, 31) |
4139 __gen_field(values->EndofThreadGroup, 24, 24) |
4140 __gen_field(values->HalfSliceDestinationSelect, 17, 18) |
4141 __gen_field(values->IndirectDataLength, 0, 16) |
4142 0;
4143
4144 dw[3] =
4145 __gen_offset(values->IndirectDataStartAddress, 0, 31) |
4146 0;
4147
4148 dw[4] =
4149 __gen_field(values->ThreadGroupIDX, 0, 31) |
4150 0;
4151
4152 dw[5] =
4153 __gen_field(values->ThreadGroupIDY, 0, 31) |
4154 0;
4155
4156 dw[6] =
4157 __gen_field(values->ThreadGroupIDZ, 0, 31) |
4158 0;
4159
4160 dw[7] =
4161 __gen_field(values->ExecutionMask, 0, 31) |
4162 0;
4163
4164 }
4165
4166 #define GEN7_GPGPU_WALKER_length 0x0000000b
4167 #define GEN7_GPGPU_WALKER_length_bias 0x00000002
4168 #define GEN7_GPGPU_WALKER_header \
4169 .CommandType = 3, \
4170 .Pipeline = 2, \
4171 .MediaCommandOpcode = 1, \
4172 .SubOpcodeA = 5, \
4173 .DwordLength = 9
4174
4175 struct GEN7_GPGPU_WALKER {
4176 uint32_t CommandType;
4177 uint32_t Pipeline;
4178 uint32_t MediaCommandOpcode;
4179 uint32_t SubOpcodeA;
4180 uint32_t IndirectParameterEnable;
4181 uint32_t PredicateEnable;
4182 uint32_t DwordLength;
4183 uint32_t InterfaceDescriptorOffset;
4184 #define SIMD8 0
4185 #define SIMD16 1
4186 #define SIMD32 2
4187 uint32_t SIMDSize;
4188 uint32_t ThreadDepthCounterMaximum;
4189 uint32_t ThreadHeightCounterMaximum;
4190 uint32_t ThreadWidthCounterMaximum;
4191 uint32_t ThreadGroupIDStartingX;
4192 uint32_t ThreadGroupIDXDimension;
4193 uint32_t ThreadGroupIDStartingY;
4194 uint32_t ThreadGroupIDYDimension;
4195 uint32_t ThreadGroupIDStartingZ;
4196 uint32_t ThreadGroupIDZDimension;
4197 uint32_t RightExecutionMask;
4198 uint32_t BottomExecutionMask;
4199 };
4200
4201 static inline void
4202 GEN7_GPGPU_WALKER_pack(__gen_user_data *data, void * restrict dst,
4203 const struct GEN7_GPGPU_WALKER * restrict values)
4204 {
4205 uint32_t *dw = (uint32_t * restrict) dst;
4206
4207 dw[0] =
4208 __gen_field(values->CommandType, 29, 31) |
4209 __gen_field(values->Pipeline, 27, 28) |
4210 __gen_field(values->MediaCommandOpcode, 24, 26) |
4211 __gen_field(values->SubOpcodeA, 16, 23) |
4212 __gen_field(values->IndirectParameterEnable, 10, 10) |
4213 __gen_field(values->PredicateEnable, 8, 8) |
4214 __gen_field(values->DwordLength, 0, 7) |
4215 0;
4216
4217 dw[1] =
4218 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
4219 0;
4220
4221 dw[2] =
4222 __gen_field(values->SIMDSize, 30, 31) |
4223 __gen_field(values->ThreadDepthCounterMaximum, 16, 21) |
4224 __gen_field(values->ThreadHeightCounterMaximum, 8, 13) |
4225 __gen_field(values->ThreadWidthCounterMaximum, 0, 5) |
4226 0;
4227
4228 dw[3] =
4229 __gen_field(values->ThreadGroupIDStartingX, 0, 31) |
4230 0;
4231
4232 dw[4] =
4233 __gen_field(values->ThreadGroupIDXDimension, 0, 31) |
4234 0;
4235
4236 dw[5] =
4237 __gen_field(values->ThreadGroupIDStartingY, 0, 31) |
4238 0;
4239
4240 dw[6] =
4241 __gen_field(values->ThreadGroupIDYDimension, 0, 31) |
4242 0;
4243
4244 dw[7] =
4245 __gen_field(values->ThreadGroupIDStartingZ, 0, 31) |
4246 0;
4247
4248 dw[8] =
4249 __gen_field(values->ThreadGroupIDZDimension, 0, 31) |
4250 0;
4251
4252 dw[9] =
4253 __gen_field(values->RightExecutionMask, 0, 31) |
4254 0;
4255
4256 dw[10] =
4257 __gen_field(values->BottomExecutionMask, 0, 31) |
4258 0;
4259
4260 }
4261
4262 #define GEN7_MEDIA_CURBE_LOAD_length 0x00000004
4263 #define GEN7_MEDIA_CURBE_LOAD_length_bias 0x00000002
4264 #define GEN7_MEDIA_CURBE_LOAD_header \
4265 .CommandType = 3, \
4266 .Pipeline = 2, \
4267 .MediaCommandOpcode = 0, \
4268 .SubOpcode = 1, \
4269 .DwordLength = 2
4270
4271 struct GEN7_MEDIA_CURBE_LOAD {
4272 uint32_t CommandType;
4273 uint32_t Pipeline;
4274 uint32_t MediaCommandOpcode;
4275 uint32_t SubOpcode;
4276 uint32_t DwordLength;
4277 uint32_t CURBETotalDataLength;
4278 uint32_t CURBEDataStartAddress;
4279 };
4280
4281 static inline void
4282 GEN7_MEDIA_CURBE_LOAD_pack(__gen_user_data *data, void * restrict dst,
4283 const struct GEN7_MEDIA_CURBE_LOAD * restrict values)
4284 {
4285 uint32_t *dw = (uint32_t * restrict) dst;
4286
4287 dw[0] =
4288 __gen_field(values->CommandType, 29, 31) |
4289 __gen_field(values->Pipeline, 27, 28) |
4290 __gen_field(values->MediaCommandOpcode, 24, 26) |
4291 __gen_field(values->SubOpcode, 16, 23) |
4292 __gen_field(values->DwordLength, 0, 15) |
4293 0;
4294
4295 dw[1] =
4296 0;
4297
4298 dw[2] =
4299 __gen_field(values->CURBETotalDataLength, 0, 16) |
4300 0;
4301
4302 dw[3] =
4303 __gen_field(values->CURBEDataStartAddress, 0, 31) |
4304 0;
4305
4306 }
4307
4308 #define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 0x00000004
4309 #define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length_bias 0x00000002
4310 #define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_header\
4311 .CommandType = 3, \
4312 .Pipeline = 2, \
4313 .MediaCommandOpcode = 0, \
4314 .SubOpcode = 2, \
4315 .DwordLength = 2
4316
4317 struct GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD {
4318 uint32_t CommandType;
4319 uint32_t Pipeline;
4320 uint32_t MediaCommandOpcode;
4321 uint32_t SubOpcode;
4322 uint32_t DwordLength;
4323 uint32_t InterfaceDescriptorTotalLength;
4324 uint32_t InterfaceDescriptorDataStartAddress;
4325 };
4326
4327 static inline void
4328 GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_pack(__gen_user_data *data, void * restrict dst,
4329 const struct GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD * restrict values)
4330 {
4331 uint32_t *dw = (uint32_t * restrict) dst;
4332
4333 dw[0] =
4334 __gen_field(values->CommandType, 29, 31) |
4335 __gen_field(values->Pipeline, 27, 28) |
4336 __gen_field(values->MediaCommandOpcode, 24, 26) |
4337 __gen_field(values->SubOpcode, 16, 23) |
4338 __gen_field(values->DwordLength, 0, 15) |
4339 0;
4340
4341 dw[1] =
4342 0;
4343
4344 dw[2] =
4345 __gen_field(values->InterfaceDescriptorTotalLength, 0, 16) |
4346 0;
4347
4348 dw[3] =
4349 __gen_offset(values->InterfaceDescriptorDataStartAddress, 0, 31) |
4350 0;
4351
4352 }
4353
4354 #define GEN7_MEDIA_OBJECT_length_bias 0x00000002
4355 #define GEN7_MEDIA_OBJECT_header \
4356 .CommandType = 3, \
4357 .MediaCommandPipeline = 2, \
4358 .MediaCommandOpcode = 1, \
4359 .MediaCommandSubOpcode = 0
4360
4361 struct GEN7_MEDIA_OBJECT {
4362 uint32_t CommandType;
4363 uint32_t MediaCommandPipeline;
4364 uint32_t MediaCommandOpcode;
4365 uint32_t MediaCommandSubOpcode;
4366 uint32_t DwordLength;
4367 uint32_t InterfaceDescriptorOffset;
4368 uint32_t ChildrenPresent;
4369 #define Nothreadsynchronization 0
4370 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
4371 uint32_t ThreadSynchronization;
4372 #define Notusingscoreboard 0
4373 #define Usingscoreboard 1
4374 uint32_t UseScoreboard;
4375 #define HalfSlice1 2
4376 #define HalfSlice0 1
4377 #define Eitherhalfslice 0
4378 uint32_t HalfSliceDestinationSelect;
4379 uint32_t IndirectDataLength;
4380 __gen_address_type IndirectDataStartAddress;
4381 uint32_t ScoredboardY;
4382 uint32_t ScoreboardX;
4383 uint32_t ScoreboardColor;
4384 uint32_t ScoreboardMask;
4385 /* variable length fields follow */
4386 };
4387
4388 static inline void
4389 GEN7_MEDIA_OBJECT_pack(__gen_user_data *data, void * restrict dst,
4390 const struct GEN7_MEDIA_OBJECT * restrict values)
4391 {
4392 uint32_t *dw = (uint32_t * restrict) dst;
4393
4394 dw[0] =
4395 __gen_field(values->CommandType, 29, 31) |
4396 __gen_field(values->MediaCommandPipeline, 27, 28) |
4397 __gen_field(values->MediaCommandOpcode, 24, 26) |
4398 __gen_field(values->MediaCommandSubOpcode, 16, 23) |
4399 __gen_field(values->DwordLength, 0, 15) |
4400 0;
4401
4402 dw[1] =
4403 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
4404 0;
4405
4406 dw[2] =
4407 __gen_field(values->ChildrenPresent, 31, 31) |
4408 __gen_field(values->ThreadSynchronization, 24, 24) |
4409 __gen_field(values->UseScoreboard, 21, 21) |
4410 __gen_field(values->HalfSliceDestinationSelect, 17, 18) |
4411 __gen_field(values->IndirectDataLength, 0, 16) |
4412 0;
4413
4414 uint32_t dw3 =
4415 0;
4416
4417 dw[3] =
4418 __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, dw3);
4419
4420 dw[4] =
4421 __gen_field(values->ScoredboardY, 16, 24) |
4422 __gen_field(values->ScoreboardX, 0, 8) |
4423 0;
4424
4425 dw[5] =
4426 __gen_field(values->ScoreboardColor, 16, 19) |
4427 __gen_field(values->ScoreboardMask, 0, 7) |
4428 0;
4429
4430 /* variable length fields follow */
4431 }
4432
4433 #define GEN7_MEDIA_OBJECT_PRT_length 0x00000010
4434 #define GEN7_MEDIA_OBJECT_PRT_length_bias 0x00000002
4435 #define GEN7_MEDIA_OBJECT_PRT_header \
4436 .CommandType = 3, \
4437 .Pipeline = 2, \
4438 .MediaCommandOpcode = 1, \
4439 .SubOpcode = 2, \
4440 .DwordLength = 14
4441
4442 struct GEN7_MEDIA_OBJECT_PRT {
4443 uint32_t CommandType;
4444 uint32_t Pipeline;
4445 uint32_t MediaCommandOpcode;
4446 uint32_t SubOpcode;
4447 uint32_t DwordLength;
4448 uint32_t InterfaceDescriptorOffset;
4449 uint32_t ChildrenPresent;
4450 uint32_t PRT_FenceNeeded;
4451 #define Rootthreadqueue 0
4452 #define VFEstateflush 1
4453 uint32_t PRT_FenceType;
4454 uint32_t InlineData;
4455 };
4456
4457 static inline void
4458 GEN7_MEDIA_OBJECT_PRT_pack(__gen_user_data *data, void * restrict dst,
4459 const struct GEN7_MEDIA_OBJECT_PRT * restrict values)
4460 {
4461 uint32_t *dw = (uint32_t * restrict) dst;
4462
4463 dw[0] =
4464 __gen_field(values->CommandType, 29, 31) |
4465 __gen_field(values->Pipeline, 27, 28) |
4466 __gen_field(values->MediaCommandOpcode, 24, 26) |
4467 __gen_field(values->SubOpcode, 16, 23) |
4468 __gen_field(values->DwordLength, 0, 15) |
4469 0;
4470
4471 dw[1] =
4472 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
4473 0;
4474
4475 dw[2] =
4476 __gen_field(values->ChildrenPresent, 31, 31) |
4477 __gen_field(values->PRT_FenceNeeded, 23, 23) |
4478 __gen_field(values->PRT_FenceType, 22, 22) |
4479 0;
4480
4481 dw[3] =
4482 0;
4483
4484 dw[4] =
4485 __gen_field(values->InlineData, 0, 31) |
4486 0;
4487
4488 }
4489
4490 #define GEN7_MEDIA_OBJECT_WALKER_length_bias 0x00000002
4491 #define GEN7_MEDIA_OBJECT_WALKER_header \
4492 .CommandType = 3, \
4493 .Pipeline = 2, \
4494 .MediaCommandOpcode = 1, \
4495 .SubOpcode = 3
4496
4497 struct GEN7_MEDIA_OBJECT_WALKER {
4498 uint32_t CommandType;
4499 uint32_t Pipeline;
4500 uint32_t MediaCommandOpcode;
4501 uint32_t SubOpcode;
4502 uint32_t DwordLength;
4503 uint32_t InterfaceDescriptorOffset;
4504 uint32_t ChildrenPresent;
4505 #define Nothreadsynchronization 0
4506 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
4507 uint32_t ThreadSynchronization;
4508 #define Notusingscoreboard 0
4509 #define Usingscoreboard 1
4510 uint32_t UseScoreboard;
4511 uint32_t IndirectDataLength;
4512 uint32_t IndirectDataStartAddress;
4513 uint32_t ScoreboardMask;
4514 uint32_t DualMode;
4515 uint32_t Repel;
4516 uint32_t ColorCountMinusOne;
4517 uint32_t MiddleLoopExtraSteps;
4518 uint32_t LocalMidLoopUnitY;
4519 uint32_t MidLoopUnitX;
4520 uint32_t GlobalLoopExecCount;
4521 uint32_t LocalLoopExecCount;
4522 uint32_t BlockResolutionY;
4523 uint32_t BlockResolutionX;
4524 uint32_t LocalStartY;
4525 uint32_t LocalStartX;
4526 uint32_t LocalEndY;
4527 uint32_t LocalEndX;
4528 uint32_t LocalOuterLoopStrideY;
4529 uint32_t LocalOuterLoopStrideX;
4530 uint32_t LocalInnerLoopUnitY;
4531 uint32_t LocalInnerLoopUnitX;
4532 uint32_t GlobalResolutionY;
4533 uint32_t GlobalResolutionX;
4534 uint32_t GlobalStartY;
4535 uint32_t GlobalStartX;
4536 uint32_t GlobalOuterLoopStrideY;
4537 uint32_t GlobalOuterLoopStrideX;
4538 uint32_t GlobalInnerLoopUnitY;
4539 uint32_t GlobalInnerLoopUnitX;
4540 /* variable length fields follow */
4541 };
4542
4543 static inline void
4544 GEN7_MEDIA_OBJECT_WALKER_pack(__gen_user_data *data, void * restrict dst,
4545 const struct GEN7_MEDIA_OBJECT_WALKER * restrict values)
4546 {
4547 uint32_t *dw = (uint32_t * restrict) dst;
4548
4549 dw[0] =
4550 __gen_field(values->CommandType, 29, 31) |
4551 __gen_field(values->Pipeline, 27, 28) |
4552 __gen_field(values->MediaCommandOpcode, 24, 26) |
4553 __gen_field(values->SubOpcode, 16, 23) |
4554 __gen_field(values->DwordLength, 0, 15) |
4555 0;
4556
4557 dw[1] =
4558 __gen_field(values->InterfaceDescriptorOffset, 0, 4) |
4559 0;
4560
4561 dw[2] =
4562 __gen_field(values->ChildrenPresent, 31, 31) |
4563 __gen_field(values->ThreadSynchronization, 24, 24) |
4564 __gen_field(values->UseScoreboard, 21, 21) |
4565 __gen_field(values->IndirectDataLength, 0, 16) |
4566 0;
4567
4568 dw[3] =
4569 __gen_offset(values->IndirectDataStartAddress, 0, 31) |
4570 0;
4571
4572 dw[4] =
4573 0;
4574
4575 dw[5] =
4576 __gen_field(values->ScoreboardMask, 0, 7) |
4577 0;
4578
4579 dw[6] =
4580 __gen_field(values->DualMode, 31, 31) |
4581 __gen_field(values->Repel, 30, 30) |
4582 __gen_field(values->ColorCountMinusOne, 24, 27) |
4583 __gen_field(values->MiddleLoopExtraSteps, 16, 20) |
4584 __gen_field(values->LocalMidLoopUnitY, 12, 13) |
4585 __gen_field(values->MidLoopUnitX, 8, 9) |
4586 0;
4587
4588 dw[7] =
4589 __gen_field(values->GlobalLoopExecCount, 16, 25) |
4590 __gen_field(values->LocalLoopExecCount, 0, 9) |
4591 0;
4592
4593 dw[8] =
4594 __gen_field(values->BlockResolutionY, 16, 24) |
4595 __gen_field(values->BlockResolutionX, 0, 8) |
4596 0;
4597
4598 dw[9] =
4599 __gen_field(values->LocalStartY, 16, 24) |
4600 __gen_field(values->LocalStartX, 0, 8) |
4601 0;
4602
4603 dw[10] =
4604 __gen_field(values->LocalEndY, 16, 24) |
4605 __gen_field(values->LocalEndX, 0, 8) |
4606 0;
4607
4608 dw[11] =
4609 __gen_field(values->LocalOuterLoopStrideY, 16, 25) |
4610 __gen_field(values->LocalOuterLoopStrideX, 0, 9) |
4611 0;
4612
4613 dw[12] =
4614 __gen_field(values->LocalInnerLoopUnitY, 16, 25) |
4615 __gen_field(values->LocalInnerLoopUnitX, 0, 9) |
4616 0;
4617
4618 dw[13] =
4619 __gen_field(values->GlobalResolutionY, 16, 24) |
4620 __gen_field(values->GlobalResolutionX, 0, 8) |
4621 0;
4622
4623 dw[14] =
4624 __gen_field(values->GlobalStartY, 16, 25) |
4625 __gen_field(values->GlobalStartX, 0, 9) |
4626 0;
4627
4628 dw[15] =
4629 __gen_field(values->GlobalOuterLoopStrideY, 16, 25) |
4630 __gen_field(values->GlobalOuterLoopStrideX, 0, 9) |
4631 0;
4632
4633 dw[16] =
4634 __gen_field(values->GlobalInnerLoopUnitY, 16, 25) |
4635 __gen_field(values->GlobalInnerLoopUnitX, 0, 9) |
4636 0;
4637
4638 /* variable length fields follow */
4639 }
4640
4641 #define GEN7_MEDIA_STATE_FLUSH_length 0x00000002
4642 #define GEN7_MEDIA_STATE_FLUSH_length_bias 0x00000002
4643 #define GEN7_MEDIA_STATE_FLUSH_header \
4644 .CommandType = 3, \
4645 .Pipeline = 2, \
4646 .MediaCommandOpcode = 0, \
4647 .SubOpcode = 4, \
4648 .DwordLength = 0
4649
4650 struct GEN7_MEDIA_STATE_FLUSH {
4651 uint32_t CommandType;
4652 uint32_t Pipeline;
4653 uint32_t MediaCommandOpcode;
4654 uint32_t SubOpcode;
4655 uint32_t DwordLength;
4656 uint32_t WatermarkRequired;
4657 uint32_t InterfaceDescriptorOffset;
4658 };
4659
4660 static inline void
4661 GEN7_MEDIA_STATE_FLUSH_pack(__gen_user_data *data, void * restrict dst,
4662 const struct GEN7_MEDIA_STATE_FLUSH * restrict values)
4663 {
4664 uint32_t *dw = (uint32_t * restrict) dst;
4665
4666 dw[0] =
4667 __gen_field(values->CommandType, 29, 31) |
4668 __gen_field(values->Pipeline, 27, 28) |
4669 __gen_field(values->MediaCommandOpcode, 24, 26) |
4670 __gen_field(values->SubOpcode, 16, 23) |
4671 __gen_field(values->DwordLength, 0, 15) |
4672 0;
4673
4674 dw[1] =
4675 __gen_field(values->WatermarkRequired, 6, 6) |
4676 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
4677 0;
4678
4679 }
4680
4681 #define GEN7_MEDIA_VFE_STATE_length 0x00000008
4682 #define GEN7_MEDIA_VFE_STATE_length_bias 0x00000002
4683 #define GEN7_MEDIA_VFE_STATE_header \
4684 .CommandType = 3, \
4685 .Pipeline = 2, \
4686 .MediaCommandOpcode = 0, \
4687 .SubOpcode = 0, \
4688 .DwordLength = 6
4689
4690 struct GEN7_MEDIA_VFE_STATE {
4691 uint32_t CommandType;
4692 uint32_t Pipeline;
4693 uint32_t MediaCommandOpcode;
4694 uint32_t SubOpcode;
4695 uint32_t DwordLength;
4696 uint32_t ScratchSpaceBasePointer;
4697 uint32_t PerThreadScratchSpace;
4698 uint32_t MaximumNumberofThreads;
4699 uint32_t NumberofURBEntries;
4700 #define Maintainingtheexistingtimestampstate 0
4701 #define Resettingrelativetimerandlatchingtheglobaltimestamp 1
4702 uint32_t ResetGatewayTimer;
4703 #define MaintainingOpenGatewayForwardMsgCloseGatewayprotocollegacymode 0
4704 #define BypassingOpenGatewayCloseGatewayprotocol 1
4705 uint32_t BypassGatewayControl;
4706 #define NoMMIOreadwriteallowed 0
4707 #define MMIOreadwritetoanyaddress 2
4708 uint32_t GatewayMMIOAccessControl;
4709 uint32_t GPGPUMode;
4710 uint32_t URBEntryAllocationSize;
4711 uint32_t CURBEAllocationSize;
4712 #define Scoreboarddisabled 0
4713 #define Scoreboardenabled 1
4714 uint32_t ScoreboardEnable;
4715 #define StallingScoreboard 0
4716 #define NonStallingScoreboard 1
4717 uint32_t ScoreboardType;
4718 uint32_t ScoreboardMask;
4719 uint32_t Scoreboard3DeltaY;
4720 uint32_t Scoreboard3DeltaX;
4721 uint32_t Scoreboard2DeltaY;
4722 uint32_t Scoreboard2DeltaX;
4723 uint32_t Scoreboard1DeltaY;
4724 uint32_t Scoreboard1DeltaX;
4725 uint32_t Scoreboard0DeltaY;
4726 uint32_t Scoreboard0DeltaX;
4727 uint32_t Scoreboard7DeltaY;
4728 uint32_t Scoreboard7DeltaX;
4729 uint32_t Scoreboard6DeltaY;
4730 uint32_t Scoreboard6DeltaX;
4731 uint32_t Scoreboard5DeltaY;
4732 uint32_t Scoreboard5DeltaX;
4733 uint32_t Scoreboard4DeltaY;
4734 uint32_t Scoreboard4DeltaX;
4735 };
4736
4737 static inline void
4738 GEN7_MEDIA_VFE_STATE_pack(__gen_user_data *data, void * restrict dst,
4739 const struct GEN7_MEDIA_VFE_STATE * restrict values)
4740 {
4741 uint32_t *dw = (uint32_t * restrict) dst;
4742
4743 dw[0] =
4744 __gen_field(values->CommandType, 29, 31) |
4745 __gen_field(values->Pipeline, 27, 28) |
4746 __gen_field(values->MediaCommandOpcode, 24, 26) |
4747 __gen_field(values->SubOpcode, 16, 23) |
4748 __gen_field(values->DwordLength, 0, 15) |
4749 0;
4750
4751 dw[1] =
4752 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
4753 __gen_field(values->PerThreadScratchSpace, 0, 3) |
4754 0;
4755
4756 dw[2] =
4757 __gen_field(values->MaximumNumberofThreads, 16, 31) |
4758 __gen_field(values->NumberofURBEntries, 8, 15) |
4759 __gen_field(values->ResetGatewayTimer, 7, 7) |
4760 __gen_field(values->BypassGatewayControl, 6, 6) |
4761 __gen_field(values->GatewayMMIOAccessControl, 3, 4) |
4762 __gen_field(values->GPGPUMode, 2, 2) |
4763 0;
4764
4765 dw[3] =
4766 0;
4767
4768 dw[4] =
4769 __gen_field(values->URBEntryAllocationSize, 16, 31) |
4770 __gen_field(values->CURBEAllocationSize, 0, 15) |
4771 0;
4772
4773 dw[5] =
4774 __gen_field(values->ScoreboardEnable, 31, 31) |
4775 __gen_field(values->ScoreboardType, 30, 30) |
4776 __gen_field(values->ScoreboardMask, 0, 7) |
4777 0;
4778
4779 dw[6] =
4780 __gen_field(values->Scoreboard3DeltaY, 28, 31) |
4781 __gen_field(values->Scoreboard3DeltaX, 24, 27) |
4782 __gen_field(values->Scoreboard2DeltaY, 20, 23) |
4783 __gen_field(values->Scoreboard2DeltaX, 16, 19) |
4784 __gen_field(values->Scoreboard1DeltaY, 12, 15) |
4785 __gen_field(values->Scoreboard1DeltaX, 8, 11) |
4786 __gen_field(values->Scoreboard0DeltaY, 4, 7) |
4787 __gen_field(values->Scoreboard0DeltaX, 0, 3) |
4788 0;
4789
4790 dw[7] =
4791 __gen_field(values->Scoreboard7DeltaY, 28, 31) |
4792 __gen_field(values->Scoreboard7DeltaX, 24, 27) |
4793 __gen_field(values->Scoreboard6DeltaY, 20, 23) |
4794 __gen_field(values->Scoreboard6DeltaX, 16, 19) |
4795 __gen_field(values->Scoreboard5DeltaY, 12, 15) |
4796 __gen_field(values->Scoreboard5DeltaX, 8, 11) |
4797 __gen_field(values->Scoreboard4DeltaY, 4, 7) |
4798 __gen_field(values->Scoreboard4DeltaX, 0, 3) |
4799 0;
4800
4801 }
4802
4803 #define GEN7_MI_ARB_CHECK_length 0x00000001
4804 #define GEN7_MI_ARB_CHECK_length_bias 0x00000001
4805 #define GEN7_MI_ARB_CHECK_header \
4806 .CommandType = 0, \
4807 .MICommandOpcode = 5
4808
4809 struct GEN7_MI_ARB_CHECK {
4810 uint32_t CommandType;
4811 uint32_t MICommandOpcode;
4812 };
4813
4814 static inline void
4815 GEN7_MI_ARB_CHECK_pack(__gen_user_data *data, void * restrict dst,
4816 const struct GEN7_MI_ARB_CHECK * restrict values)
4817 {
4818 uint32_t *dw = (uint32_t * restrict) dst;
4819
4820 dw[0] =
4821 __gen_field(values->CommandType, 29, 31) |
4822 __gen_field(values->MICommandOpcode, 23, 28) |
4823 0;
4824
4825 }
4826
4827 #define GEN7_MI_ARB_ON_OFF_length 0x00000001
4828 #define GEN7_MI_ARB_ON_OFF_length_bias 0x00000001
4829 #define GEN7_MI_ARB_ON_OFF_header \
4830 .CommandType = 0, \
4831 .MICommandOpcode = 8
4832
4833 struct GEN7_MI_ARB_ON_OFF {
4834 uint32_t CommandType;
4835 uint32_t MICommandOpcode;
4836 uint32_t ArbitrationEnable;
4837 };
4838
4839 static inline void
4840 GEN7_MI_ARB_ON_OFF_pack(__gen_user_data *data, void * restrict dst,
4841 const struct GEN7_MI_ARB_ON_OFF * restrict values)
4842 {
4843 uint32_t *dw = (uint32_t * restrict) dst;
4844
4845 dw[0] =
4846 __gen_field(values->CommandType, 29, 31) |
4847 __gen_field(values->MICommandOpcode, 23, 28) |
4848 __gen_field(values->ArbitrationEnable, 0, 0) |
4849 0;
4850
4851 }
4852
4853 #define GEN7_MI_BATCH_BUFFER_END_length 0x00000001
4854 #define GEN7_MI_BATCH_BUFFER_END_length_bias 0x00000001
4855 #define GEN7_MI_BATCH_BUFFER_END_header \
4856 .CommandType = 0, \
4857 .MICommandOpcode = 10
4858
4859 struct GEN7_MI_BATCH_BUFFER_END {
4860 uint32_t CommandType;
4861 uint32_t MICommandOpcode;
4862 };
4863
4864 static inline void
4865 GEN7_MI_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
4866 const struct GEN7_MI_BATCH_BUFFER_END * restrict values)
4867 {
4868 uint32_t *dw = (uint32_t * restrict) dst;
4869
4870 dw[0] =
4871 __gen_field(values->CommandType, 29, 31) |
4872 __gen_field(values->MICommandOpcode, 23, 28) |
4873 0;
4874
4875 }
4876
4877 #define GEN7_MI_BATCH_BUFFER_START_length 0x00000002
4878 #define GEN7_MI_BATCH_BUFFER_START_length_bias 0x00000002
4879 #define GEN7_MI_BATCH_BUFFER_START_header \
4880 .CommandType = 0, \
4881 .MICommandOpcode = 49, \
4882 .DwordLength = 0
4883
4884 struct GEN7_MI_BATCH_BUFFER_START {
4885 uint32_t CommandType;
4886 uint32_t MICommandOpcode;
4887 uint32_t ClearCommandBufferEnable;
4888 #define ASI_GGTT 0
4889 #define ASI_PPGTT 1
4890 uint32_t AddressSpaceIndicator;
4891 uint32_t DwordLength;
4892 __gen_address_type BatchBufferStartAddress;
4893 };
4894
4895 static inline void
4896 GEN7_MI_BATCH_BUFFER_START_pack(__gen_user_data *data, void * restrict dst,
4897 const struct GEN7_MI_BATCH_BUFFER_START * restrict values)
4898 {
4899 uint32_t *dw = (uint32_t * restrict) dst;
4900
4901 dw[0] =
4902 __gen_field(values->CommandType, 29, 31) |
4903 __gen_field(values->MICommandOpcode, 23, 28) |
4904 __gen_field(values->ClearCommandBufferEnable, 11, 11) |
4905 __gen_field(values->AddressSpaceIndicator, 8, 8) |
4906 __gen_field(values->DwordLength, 0, 7) |
4907 0;
4908
4909 uint32_t dw1 =
4910 0;
4911
4912 dw[1] =
4913 __gen_combine_address(data, &dw[1], values->BatchBufferStartAddress, dw1);
4914
4915 }
4916
4917 #define GEN7_MI_CLFLUSH_length_bias 0x00000002
4918 #define GEN7_MI_CLFLUSH_header \
4919 .CommandType = 0, \
4920 .MICommandOpcode = 39
4921
4922 struct GEN7_MI_CLFLUSH {
4923 uint32_t CommandType;
4924 uint32_t MICommandOpcode;
4925 #define PerProcessGraphicsAddress 0
4926 #define GlobalGraphicsAddress 1
4927 uint32_t UseGlobalGTT;
4928 uint32_t DwordLength;
4929 __gen_address_type PageBaseAddress;
4930 uint32_t StartingCachelineOffset;
4931 __gen_address_type PageBaseAddressHigh;
4932 /* variable length fields follow */
4933 };
4934
4935 static inline void
4936 GEN7_MI_CLFLUSH_pack(__gen_user_data *data, void * restrict dst,
4937 const struct GEN7_MI_CLFLUSH * restrict values)
4938 {
4939 uint32_t *dw = (uint32_t * restrict) dst;
4940
4941 dw[0] =
4942 __gen_field(values->CommandType, 29, 31) |
4943 __gen_field(values->MICommandOpcode, 23, 28) |
4944 __gen_field(values->UseGlobalGTT, 22, 22) |
4945 __gen_field(values->DwordLength, 0, 9) |
4946 0;
4947
4948 uint32_t dw1 =
4949 __gen_field(values->StartingCachelineOffset, 6, 11) |
4950 0;
4951
4952 dw[1] =
4953 __gen_combine_address(data, &dw[1], values->PageBaseAddress, dw1);
4954
4955 uint32_t dw2 =
4956 0;
4957
4958 dw[2] =
4959 __gen_combine_address(data, &dw[2], values->PageBaseAddressHigh, dw2);
4960
4961 /* variable length fields follow */
4962 }
4963
4964 #define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_length 0x00000002
4965 #define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_length_bias 0x00000002
4966 #define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_header\
4967 .CommandType = 0, \
4968 .MICommandOpcode = 54, \
4969 .UseGlobalGTT = 0, \
4970 .CompareSemaphore = 0, \
4971 .DwordLength = 0
4972
4973 struct GEN7_MI_CONDITIONAL_BATCH_BUFFER_END {
4974 uint32_t CommandType;
4975 uint32_t MICommandOpcode;
4976 uint32_t UseGlobalGTT;
4977 uint32_t CompareSemaphore;
4978 uint32_t DwordLength;
4979 uint32_t CompareDataDword;
4980 __gen_address_type CompareAddress;
4981 };
4982
4983 static inline void
4984 GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
4985 const struct GEN7_MI_CONDITIONAL_BATCH_BUFFER_END * restrict values)
4986 {
4987 uint32_t *dw = (uint32_t * restrict) dst;
4988
4989 dw[0] =
4990 __gen_field(values->CommandType, 29, 31) |
4991 __gen_field(values->MICommandOpcode, 23, 28) |
4992 __gen_field(values->UseGlobalGTT, 22, 22) |
4993 __gen_field(values->CompareSemaphore, 21, 21) |
4994 __gen_field(values->DwordLength, 0, 7) |
4995 0;
4996
4997 dw[1] =
4998 __gen_field(values->CompareDataDword, 0, 31) |
4999 0;
5000
5001 uint32_t dw2 =
5002 0;
5003
5004 dw[2] =
5005 __gen_combine_address(data, &dw[2], values->CompareAddress, dw2);
5006
5007 }
5008
5009 #define GEN7_MI_FLUSH_length 0x00000001
5010 #define GEN7_MI_FLUSH_length_bias 0x00000001
5011 #define GEN7_MI_FLUSH_header \
5012 .CommandType = 0, \
5013 .MICommandOpcode = 4
5014
5015 struct GEN7_MI_FLUSH {
5016 uint32_t CommandType;
5017 uint32_t MICommandOpcode;
5018 uint32_t IndirectStatePointersDisable;
5019 uint32_t GenericMediaStateClear;
5020 #define DontReset 0
5021 #define Reset 1
5022 uint32_t GlobalSnapshotCountReset;
5023 #define Flush 0
5024 #define DontFlush 1
5025 uint32_t RenderCacheFlushInhibit;
5026 #define DontInvalidate 0
5027 #define Invalidate 1
5028 uint32_t StateInstructionCacheInvalidate;
5029 };
5030
5031 static inline void
5032 GEN7_MI_FLUSH_pack(__gen_user_data *data, void * restrict dst,
5033 const struct GEN7_MI_FLUSH * restrict values)
5034 {
5035 uint32_t *dw = (uint32_t * restrict) dst;
5036
5037 dw[0] =
5038 __gen_field(values->CommandType, 29, 31) |
5039 __gen_field(values->MICommandOpcode, 23, 28) |
5040 __gen_field(values->IndirectStatePointersDisable, 5, 5) |
5041 __gen_field(values->GenericMediaStateClear, 4, 4) |
5042 __gen_field(values->GlobalSnapshotCountReset, 3, 3) |
5043 __gen_field(values->RenderCacheFlushInhibit, 2, 2) |
5044 __gen_field(values->StateInstructionCacheInvalidate, 1, 1) |
5045 0;
5046
5047 }
5048
5049 #define GEN7_MI_LOAD_REGISTER_IMM_length 0x00000003
5050 #define GEN7_MI_LOAD_REGISTER_IMM_length_bias 0x00000002
5051 #define GEN7_MI_LOAD_REGISTER_IMM_header \
5052 .CommandType = 0, \
5053 .MICommandOpcode = 34, \
5054 .DwordLength = 1
5055
5056 struct GEN7_MI_LOAD_REGISTER_IMM {
5057 uint32_t CommandType;
5058 uint32_t MICommandOpcode;
5059 uint32_t ByteWriteDisables;
5060 uint32_t DwordLength;
5061 uint32_t RegisterOffset;
5062 uint32_t DataDWord;
5063 };
5064
5065 static inline void
5066 GEN7_MI_LOAD_REGISTER_IMM_pack(__gen_user_data *data, void * restrict dst,
5067 const struct GEN7_MI_LOAD_REGISTER_IMM * restrict values)
5068 {
5069 uint32_t *dw = (uint32_t * restrict) dst;
5070
5071 dw[0] =
5072 __gen_field(values->CommandType, 29, 31) |
5073 __gen_field(values->MICommandOpcode, 23, 28) |
5074 __gen_field(values->ByteWriteDisables, 8, 11) |
5075 __gen_field(values->DwordLength, 0, 7) |
5076 0;
5077
5078 dw[1] =
5079 __gen_offset(values->RegisterOffset, 2, 22) |
5080 0;
5081
5082 dw[2] =
5083 __gen_field(values->DataDWord, 0, 31) |
5084 0;
5085
5086 }
5087
5088 #define GEN7_MI_LOAD_REGISTER_MEM_length 0x00000003
5089 #define GEN7_MI_LOAD_REGISTER_MEM_length_bias 0x00000002
5090 #define GEN7_MI_LOAD_REGISTER_MEM_header \
5091 .CommandType = 0, \
5092 .MICommandOpcode = 41, \
5093 .DwordLength = 1
5094
5095 struct GEN7_MI_LOAD_REGISTER_MEM {
5096 uint32_t CommandType;
5097 uint32_t MICommandOpcode;
5098 uint32_t UseGlobalGTT;
5099 uint32_t AsyncModeEnable;
5100 uint32_t DwordLength;
5101 uint32_t RegisterAddress;
5102 __gen_address_type MemoryAddress;
5103 };
5104
5105 static inline void
5106 GEN7_MI_LOAD_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
5107 const struct GEN7_MI_LOAD_REGISTER_MEM * restrict values)
5108 {
5109 uint32_t *dw = (uint32_t * restrict) dst;
5110
5111 dw[0] =
5112 __gen_field(values->CommandType, 29, 31) |
5113 __gen_field(values->MICommandOpcode, 23, 28) |
5114 __gen_field(values->UseGlobalGTT, 22, 22) |
5115 __gen_field(values->AsyncModeEnable, 21, 21) |
5116 __gen_field(values->DwordLength, 0, 7) |
5117 0;
5118
5119 dw[1] =
5120 __gen_offset(values->RegisterAddress, 2, 22) |
5121 0;
5122
5123 uint32_t dw2 =
5124 0;
5125
5126 dw[2] =
5127 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
5128
5129 }
5130
5131 #define GEN7_MI_NOOP_length 0x00000001
5132 #define GEN7_MI_NOOP_length_bias 0x00000001
5133 #define GEN7_MI_NOOP_header \
5134 .CommandType = 0, \
5135 .MICommandOpcode = 0
5136
5137 struct GEN7_MI_NOOP {
5138 uint32_t CommandType;
5139 uint32_t MICommandOpcode;
5140 uint32_t IdentificationNumberRegisterWriteEnable;
5141 uint32_t IdentificationNumber;
5142 };
5143
5144 static inline void
5145 GEN7_MI_NOOP_pack(__gen_user_data *data, void * restrict dst,
5146 const struct GEN7_MI_NOOP * restrict values)
5147 {
5148 uint32_t *dw = (uint32_t * restrict) dst;
5149
5150 dw[0] =
5151 __gen_field(values->CommandType, 29, 31) |
5152 __gen_field(values->MICommandOpcode, 23, 28) |
5153 __gen_field(values->IdentificationNumberRegisterWriteEnable, 22, 22) |
5154 __gen_field(values->IdentificationNumber, 0, 21) |
5155 0;
5156
5157 }
5158
5159 #define GEN7_MI_PREDICATE_length 0x00000001
5160 #define GEN7_MI_PREDICATE_length_bias 0x00000001
5161 #define GEN7_MI_PREDICATE_header \
5162 .CommandType = 0, \
5163 .MICommandOpcode = 12
5164
5165 struct GEN7_MI_PREDICATE {
5166 uint32_t CommandType;
5167 uint32_t MICommandOpcode;
5168 #define KEEP 0
5169 #define LOAD 2
5170 #define LOADINV 3
5171 uint32_t LoadOperation;
5172 #define COMBINE_SET 0
5173 #define COMBINE_AND 1
5174 #define COMBINE_OR 2
5175 #define COMBINE_XOR 3
5176 uint32_t CombineOperation;
5177 #define COMPARE_SRCS_EQUAL 2
5178 #define COMPARE_DELTAS_EQUAL 3
5179 uint32_t CompareOperation;
5180 };
5181
5182 static inline void
5183 GEN7_MI_PREDICATE_pack(__gen_user_data *data, void * restrict dst,
5184 const struct GEN7_MI_PREDICATE * restrict values)
5185 {
5186 uint32_t *dw = (uint32_t * restrict) dst;
5187
5188 dw[0] =
5189 __gen_field(values->CommandType, 29, 31) |
5190 __gen_field(values->MICommandOpcode, 23, 28) |
5191 __gen_field(values->LoadOperation, 6, 7) |
5192 __gen_field(values->CombineOperation, 3, 4) |
5193 __gen_field(values->CompareOperation, 0, 1) |
5194 0;
5195
5196 }
5197
5198 #define GEN7_MI_REPORT_HEAD_length 0x00000001
5199 #define GEN7_MI_REPORT_HEAD_length_bias 0x00000001
5200 #define GEN7_MI_REPORT_HEAD_header \
5201 .CommandType = 0, \
5202 .MICommandOpcode = 7
5203
5204 struct GEN7_MI_REPORT_HEAD {
5205 uint32_t CommandType;
5206 uint32_t MICommandOpcode;
5207 };
5208
5209 static inline void
5210 GEN7_MI_REPORT_HEAD_pack(__gen_user_data *data, void * restrict dst,
5211 const struct GEN7_MI_REPORT_HEAD * restrict values)
5212 {
5213 uint32_t *dw = (uint32_t * restrict) dst;
5214
5215 dw[0] =
5216 __gen_field(values->CommandType, 29, 31) |
5217 __gen_field(values->MICommandOpcode, 23, 28) |
5218 0;
5219
5220 }
5221
5222 #define GEN7_MI_SEMAPHORE_MBOX_length 0x00000003
5223 #define GEN7_MI_SEMAPHORE_MBOX_length_bias 0x00000002
5224 #define GEN7_MI_SEMAPHORE_MBOX_header \
5225 .CommandType = 0, \
5226 .MICommandOpcode = 22, \
5227 .DwordLength = 1
5228
5229 struct GEN7_MI_SEMAPHORE_MBOX {
5230 uint32_t CommandType;
5231 uint32_t MICommandOpcode;
5232 #define RVSYNC 0
5233 #define RBSYNC 2
5234 #define UseGeneralRegisterSelect 3
5235 uint32_t RegisterSelect;
5236 uint32_t DwordLength;
5237 uint32_t SemaphoreDataDword;
5238 };
5239
5240 static inline void
5241 GEN7_MI_SEMAPHORE_MBOX_pack(__gen_user_data *data, void * restrict dst,
5242 const struct GEN7_MI_SEMAPHORE_MBOX * restrict values)
5243 {
5244 uint32_t *dw = (uint32_t * restrict) dst;
5245
5246 dw[0] =
5247 __gen_field(values->CommandType, 29, 31) |
5248 __gen_field(values->MICommandOpcode, 23, 28) |
5249 __gen_field(values->RegisterSelect, 16, 17) |
5250 __gen_field(values->DwordLength, 0, 7) |
5251 0;
5252
5253 dw[1] =
5254 __gen_field(values->SemaphoreDataDword, 0, 31) |
5255 0;
5256
5257 dw[2] =
5258 0;
5259
5260 }
5261
5262 #define GEN7_MI_SET_CONTEXT_length 0x00000002
5263 #define GEN7_MI_SET_CONTEXT_length_bias 0x00000002
5264 #define GEN7_MI_SET_CONTEXT_header \
5265 .CommandType = 0, \
5266 .MICommandOpcode = 24, \
5267 .DwordLength = 0
5268
5269 struct GEN7_MI_SET_CONTEXT {
5270 uint32_t CommandType;
5271 uint32_t MICommandOpcode;
5272 uint32_t DwordLength;
5273 __gen_address_type LogicalContextAddress;
5274 uint32_t ReservedMustbe1;
5275 uint32_t ExtendedStateSaveEnable;
5276 uint32_t ExtendedStateRestoreEnable;
5277 uint32_t ForceRestore;
5278 uint32_t RestoreInhibit;
5279 };
5280
5281 static inline void
5282 GEN7_MI_SET_CONTEXT_pack(__gen_user_data *data, void * restrict dst,
5283 const struct GEN7_MI_SET_CONTEXT * restrict values)
5284 {
5285 uint32_t *dw = (uint32_t * restrict) dst;
5286
5287 dw[0] =
5288 __gen_field(values->CommandType, 29, 31) |
5289 __gen_field(values->MICommandOpcode, 23, 28) |
5290 __gen_field(values->DwordLength, 0, 7) |
5291 0;
5292
5293 uint32_t dw1 =
5294 __gen_field(values->ReservedMustbe1, 8, 8) |
5295 __gen_field(values->ExtendedStateSaveEnable, 3, 3) |
5296 __gen_field(values->ExtendedStateRestoreEnable, 2, 2) |
5297 __gen_field(values->ForceRestore, 1, 1) |
5298 __gen_field(values->RestoreInhibit, 0, 0) |
5299 0;
5300
5301 dw[1] =
5302 __gen_combine_address(data, &dw[1], values->LogicalContextAddress, dw1);
5303
5304 }
5305
5306 #define GEN7_MI_STORE_DATA_IMM_length 0x00000004
5307 #define GEN7_MI_STORE_DATA_IMM_length_bias 0x00000002
5308 #define GEN7_MI_STORE_DATA_IMM_header \
5309 .CommandType = 0, \
5310 .MICommandOpcode = 32, \
5311 .DwordLength = 2
5312
5313 struct GEN7_MI_STORE_DATA_IMM {
5314 uint32_t CommandType;
5315 uint32_t MICommandOpcode;
5316 uint32_t UseGlobalGTT;
5317 uint32_t DwordLength;
5318 uint32_t Address;
5319 uint32_t CoreModeEnable;
5320 uint32_t DataDWord0;
5321 uint32_t DataDWord1;
5322 };
5323
5324 static inline void
5325 GEN7_MI_STORE_DATA_IMM_pack(__gen_user_data *data, void * restrict dst,
5326 const struct GEN7_MI_STORE_DATA_IMM * restrict values)
5327 {
5328 uint32_t *dw = (uint32_t * restrict) dst;
5329
5330 dw[0] =
5331 __gen_field(values->CommandType, 29, 31) |
5332 __gen_field(values->MICommandOpcode, 23, 28) |
5333 __gen_field(values->UseGlobalGTT, 22, 22) |
5334 __gen_field(values->DwordLength, 0, 5) |
5335 0;
5336
5337 dw[1] =
5338 0;
5339
5340 dw[2] =
5341 __gen_field(values->Address, 2, 31) |
5342 __gen_field(values->CoreModeEnable, 0, 0) |
5343 0;
5344
5345 dw[3] =
5346 __gen_field(values->DataDWord0, 0, 31) |
5347 0;
5348
5349 dw[4] =
5350 __gen_field(values->DataDWord1, 0, 31) |
5351 0;
5352
5353 }
5354
5355 #define GEN7_MI_STORE_DATA_INDEX_length 0x00000003
5356 #define GEN7_MI_STORE_DATA_INDEX_length_bias 0x00000002
5357 #define GEN7_MI_STORE_DATA_INDEX_header \
5358 .CommandType = 0, \
5359 .MICommandOpcode = 33, \
5360 .DwordLength = 1
5361
5362 struct GEN7_MI_STORE_DATA_INDEX {
5363 uint32_t CommandType;
5364 uint32_t MICommandOpcode;
5365 uint32_t DwordLength;
5366 uint32_t Offset;
5367 uint32_t DataDWord0;
5368 uint32_t DataDWord1;
5369 };
5370
5371 static inline void
5372 GEN7_MI_STORE_DATA_INDEX_pack(__gen_user_data *data, void * restrict dst,
5373 const struct GEN7_MI_STORE_DATA_INDEX * restrict values)
5374 {
5375 uint32_t *dw = (uint32_t * restrict) dst;
5376
5377 dw[0] =
5378 __gen_field(values->CommandType, 29, 31) |
5379 __gen_field(values->MICommandOpcode, 23, 28) |
5380 __gen_field(values->DwordLength, 0, 7) |
5381 0;
5382
5383 dw[1] =
5384 __gen_field(values->Offset, 2, 11) |
5385 0;
5386
5387 dw[2] =
5388 __gen_field(values->DataDWord0, 0, 31) |
5389 0;
5390
5391 dw[3] =
5392 __gen_field(values->DataDWord1, 0, 31) |
5393 0;
5394
5395 }
5396
5397 #define GEN7_MI_SUSPEND_FLUSH_length 0x00000001
5398 #define GEN7_MI_SUSPEND_FLUSH_length_bias 0x00000001
5399 #define GEN7_MI_SUSPEND_FLUSH_header \
5400 .CommandType = 0, \
5401 .MICommandOpcode = 11
5402
5403 struct GEN7_MI_SUSPEND_FLUSH {
5404 uint32_t CommandType;
5405 uint32_t MICommandOpcode;
5406 uint32_t SuspendFlush;
5407 };
5408
5409 static inline void
5410 GEN7_MI_SUSPEND_FLUSH_pack(__gen_user_data *data, void * restrict dst,
5411 const struct GEN7_MI_SUSPEND_FLUSH * restrict values)
5412 {
5413 uint32_t *dw = (uint32_t * restrict) dst;
5414
5415 dw[0] =
5416 __gen_field(values->CommandType, 29, 31) |
5417 __gen_field(values->MICommandOpcode, 23, 28) |
5418 __gen_field(values->SuspendFlush, 0, 0) |
5419 0;
5420
5421 }
5422
5423 #define GEN7_MI_TOPOLOGY_FILTER_length 0x00000001
5424 #define GEN7_MI_TOPOLOGY_FILTER_length_bias 0x00000001
5425 #define GEN7_MI_TOPOLOGY_FILTER_header \
5426 .CommandType = 0, \
5427 .MICommandOpcode = 13
5428
5429 struct GEN7_MI_TOPOLOGY_FILTER {
5430 uint32_t CommandType;
5431 uint32_t MICommandOpcode;
5432 uint32_t TopologyFilterValue;
5433 };
5434
5435 static inline void
5436 GEN7_MI_TOPOLOGY_FILTER_pack(__gen_user_data *data, void * restrict dst,
5437 const struct GEN7_MI_TOPOLOGY_FILTER * restrict values)
5438 {
5439 uint32_t *dw = (uint32_t * restrict) dst;
5440
5441 dw[0] =
5442 __gen_field(values->CommandType, 29, 31) |
5443 __gen_field(values->MICommandOpcode, 23, 28) |
5444 __gen_field(values->TopologyFilterValue, 0, 5) |
5445 0;
5446
5447 }
5448
5449 #define GEN7_MI_UPDATE_GTT_length_bias 0x00000002
5450 #define GEN7_MI_UPDATE_GTT_header \
5451 .CommandType = 0, \
5452 .MICommandOpcode = 35
5453
5454 struct GEN7_MI_UPDATE_GTT {
5455 uint32_t CommandType;
5456 uint32_t MICommandOpcode;
5457 #define PerProcessGraphicsAddress 0
5458 #define GlobalGraphicsAddress 1
5459 uint32_t UseGlobalGTT;
5460 uint32_t DwordLength;
5461 __gen_address_type EntryAddress;
5462 /* variable length fields follow */
5463 };
5464
5465 static inline void
5466 GEN7_MI_UPDATE_GTT_pack(__gen_user_data *data, void * restrict dst,
5467 const struct GEN7_MI_UPDATE_GTT * restrict values)
5468 {
5469 uint32_t *dw = (uint32_t * restrict) dst;
5470
5471 dw[0] =
5472 __gen_field(values->CommandType, 29, 31) |
5473 __gen_field(values->MICommandOpcode, 23, 28) |
5474 __gen_field(values->UseGlobalGTT, 22, 22) |
5475 __gen_field(values->DwordLength, 0, 7) |
5476 0;
5477
5478 uint32_t dw1 =
5479 0;
5480
5481 dw[1] =
5482 __gen_combine_address(data, &dw[1], values->EntryAddress, dw1);
5483
5484 /* variable length fields follow */
5485 }
5486
5487 #define GEN7_MI_URB_CLEAR_length 0x00000002
5488 #define GEN7_MI_URB_CLEAR_length_bias 0x00000002
5489 #define GEN7_MI_URB_CLEAR_header \
5490 .CommandType = 0, \
5491 .MICommandOpcode = 25, \
5492 .DwordLength = 0
5493
5494 struct GEN7_MI_URB_CLEAR {
5495 uint32_t CommandType;
5496 uint32_t MICommandOpcode;
5497 uint32_t DwordLength;
5498 uint32_t URBClearLength;
5499 uint32_t URBAddress;
5500 };
5501
5502 static inline void
5503 GEN7_MI_URB_CLEAR_pack(__gen_user_data *data, void * restrict dst,
5504 const struct GEN7_MI_URB_CLEAR * restrict values)
5505 {
5506 uint32_t *dw = (uint32_t * restrict) dst;
5507
5508 dw[0] =
5509 __gen_field(values->CommandType, 29, 31) |
5510 __gen_field(values->MICommandOpcode, 23, 28) |
5511 __gen_field(values->DwordLength, 0, 7) |
5512 0;
5513
5514 dw[1] =
5515 __gen_field(values->URBClearLength, 16, 28) |
5516 __gen_offset(values->URBAddress, 0, 13) |
5517 0;
5518
5519 }
5520
5521 #define GEN7_MI_USER_INTERRUPT_length 0x00000001
5522 #define GEN7_MI_USER_INTERRUPT_length_bias 0x00000001
5523 #define GEN7_MI_USER_INTERRUPT_header \
5524 .CommandType = 0, \
5525 .MICommandOpcode = 2
5526
5527 struct GEN7_MI_USER_INTERRUPT {
5528 uint32_t CommandType;
5529 uint32_t MICommandOpcode;
5530 };
5531
5532 static inline void
5533 GEN7_MI_USER_INTERRUPT_pack(__gen_user_data *data, void * restrict dst,
5534 const struct GEN7_MI_USER_INTERRUPT * restrict values)
5535 {
5536 uint32_t *dw = (uint32_t * restrict) dst;
5537
5538 dw[0] =
5539 __gen_field(values->CommandType, 29, 31) |
5540 __gen_field(values->MICommandOpcode, 23, 28) |
5541 0;
5542
5543 }
5544
5545 #define GEN7_MI_WAIT_FOR_EVENT_length 0x00000001
5546 #define GEN7_MI_WAIT_FOR_EVENT_length_bias 0x00000001
5547 #define GEN7_MI_WAIT_FOR_EVENT_header \
5548 .CommandType = 0, \
5549 .MICommandOpcode = 3
5550
5551 struct GEN7_MI_WAIT_FOR_EVENT {
5552 uint32_t CommandType;
5553 uint32_t MICommandOpcode;
5554 uint32_t DisplayPipeCHorizontalBlankWaitEnable;
5555 uint32_t DisplayPipeCVerticalBlankWaitEnable;
5556 uint32_t DisplaySpriteCFlipPendingWaitEnable;
5557 #define Notenabled 0
5558 uint32_t ConditionCodeWaitSelect;
5559 uint32_t DisplayPlaneCFlipPendingWaitEnable;
5560 uint32_t DisplayPipeCScanLineWaitEnable;
5561 uint32_t DisplayPipeBHorizontalBlankWaitEnable;
5562 uint32_t DisplayPipeBVerticalBlankWaitEnable;
5563 uint32_t DisplaySpriteBFlipPendingWaitEnable;
5564 uint32_t DisplayPlaneBFlipPendingWaitEnable;
5565 uint32_t DisplayPipeBScanLineWaitEnable;
5566 uint32_t DisplayPipeAHorizontalBlankWaitEnable;
5567 uint32_t DisplayPipeAVerticalBlankWaitEnable;
5568 uint32_t DisplaySpriteAFlipPendingWaitEnable;
5569 uint32_t DisplayPlaneAFlipPendingWaitEnable;
5570 uint32_t DisplayPipeAScanLineWaitEnable;
5571 };
5572
5573 static inline void
5574 GEN7_MI_WAIT_FOR_EVENT_pack(__gen_user_data *data, void * restrict dst,
5575 const struct GEN7_MI_WAIT_FOR_EVENT * restrict values)
5576 {
5577 uint32_t *dw = (uint32_t * restrict) dst;
5578
5579 dw[0] =
5580 __gen_field(values->CommandType, 29, 31) |
5581 __gen_field(values->MICommandOpcode, 23, 28) |
5582 __gen_field(values->DisplayPipeCHorizontalBlankWaitEnable, 22, 22) |
5583 __gen_field(values->DisplayPipeCVerticalBlankWaitEnable, 21, 21) |
5584 __gen_field(values->DisplaySpriteCFlipPendingWaitEnable, 20, 20) |
5585 __gen_field(values->ConditionCodeWaitSelect, 16, 19) |
5586 __gen_field(values->DisplayPlaneCFlipPendingWaitEnable, 15, 15) |
5587 __gen_field(values->DisplayPipeCScanLineWaitEnable, 14, 14) |
5588 __gen_field(values->DisplayPipeBHorizontalBlankWaitEnable, 13, 13) |
5589 __gen_field(values->DisplayPipeBVerticalBlankWaitEnable, 11, 11) |
5590 __gen_field(values->DisplaySpriteBFlipPendingWaitEnable, 10, 10) |
5591 __gen_field(values->DisplayPlaneBFlipPendingWaitEnable, 9, 9) |
5592 __gen_field(values->DisplayPipeBScanLineWaitEnable, 8, 8) |
5593 __gen_field(values->DisplayPipeAHorizontalBlankWaitEnable, 5, 5) |
5594 __gen_field(values->DisplayPipeAVerticalBlankWaitEnable, 3, 3) |
5595 __gen_field(values->DisplaySpriteAFlipPendingWaitEnable, 2, 2) |
5596 __gen_field(values->DisplayPlaneAFlipPendingWaitEnable, 1, 1) |
5597 __gen_field(values->DisplayPipeAScanLineWaitEnable, 0, 0) |
5598 0;
5599
5600 }
5601
5602 #define GEN7_PIPE_CONTROL_length 0x00000005
5603 #define GEN7_PIPE_CONTROL_length_bias 0x00000002
5604 #define GEN7_PIPE_CONTROL_header \
5605 .CommandType = 3, \
5606 .CommandSubType = 3, \
5607 ._3DCommandOpcode = 2, \
5608 ._3DCommandSubOpcode = 0, \
5609 .DwordLength = 3
5610
5611 struct GEN7_PIPE_CONTROL {
5612 uint32_t CommandType;
5613 uint32_t CommandSubType;
5614 uint32_t _3DCommandOpcode;
5615 uint32_t _3DCommandSubOpcode;
5616 uint32_t DwordLength;
5617 #define DAT_PPGTT 0
5618 #define DAT_GGTT 1
5619 uint32_t DestinationAddressType;
5620 #define NoLRIOperation 0
5621 #define MMIOWriteImmediateData 1
5622 uint32_t LRIPostSyncOperation;
5623 uint32_t StoreDataIndex;
5624 uint32_t CommandStreamerStallEnable;
5625 #define DontReset 0
5626 #define Reset 1
5627 uint32_t GlobalSnapshotCountReset;
5628 uint32_t TLBInvalidate;
5629 uint32_t GenericMediaStateClear;
5630 #define NoWrite 0
5631 #define WriteImmediateData 1
5632 #define WritePSDepthCount 2
5633 #define WriteTimestamp 3
5634 uint32_t PostSyncOperation;
5635 uint32_t DepthStallEnable;
5636 #define DisableFlush 0
5637 #define EnableFlush 1
5638 uint32_t RenderTargetCacheFlushEnable;
5639 uint32_t InstructionCacheInvalidateEnable;
5640 uint32_t TextureCacheInvalidationEnable;
5641 uint32_t IndirectStatePointersDisable;
5642 uint32_t NotifyEnable;
5643 uint32_t PipeControlFlushEnable;
5644 uint32_t DCFlushEnable;
5645 uint32_t VFCacheInvalidationEnable;
5646 uint32_t ConstantCacheInvalidationEnable;
5647 uint32_t StateCacheInvalidationEnable;
5648 uint32_t StallAtPixelScoreboard;
5649 #define FlushDisabled 0
5650 #define FlushEnabled 1
5651 uint32_t DepthCacheFlushEnable;
5652 __gen_address_type Address;
5653 uint32_t ImmediateData;
5654 uint32_t ImmediateData0;
5655 };
5656
5657 static inline void
5658 GEN7_PIPE_CONTROL_pack(__gen_user_data *data, void * restrict dst,
5659 const struct GEN7_PIPE_CONTROL * restrict values)
5660 {
5661 uint32_t *dw = (uint32_t * restrict) dst;
5662
5663 dw[0] =
5664 __gen_field(values->CommandType, 29, 31) |
5665 __gen_field(values->CommandSubType, 27, 28) |
5666 __gen_field(values->_3DCommandOpcode, 24, 26) |
5667 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5668 __gen_field(values->DwordLength, 0, 7) |
5669 0;
5670
5671 dw[1] =
5672 __gen_field(values->DestinationAddressType, 24, 24) |
5673 __gen_field(values->LRIPostSyncOperation, 23, 23) |
5674 __gen_field(values->StoreDataIndex, 21, 21) |
5675 __gen_field(values->CommandStreamerStallEnable, 20, 20) |
5676 __gen_field(values->GlobalSnapshotCountReset, 19, 19) |
5677 __gen_field(values->TLBInvalidate, 18, 18) |
5678 __gen_field(values->GenericMediaStateClear, 16, 16) |
5679 __gen_field(values->PostSyncOperation, 14, 15) |
5680 __gen_field(values->DepthStallEnable, 13, 13) |
5681 __gen_field(values->RenderTargetCacheFlushEnable, 12, 12) |
5682 __gen_field(values->InstructionCacheInvalidateEnable, 11, 11) |
5683 __gen_field(values->TextureCacheInvalidationEnable, 10, 10) |
5684 __gen_field(values->IndirectStatePointersDisable, 9, 9) |
5685 __gen_field(values->NotifyEnable, 8, 8) |
5686 __gen_field(values->PipeControlFlushEnable, 7, 7) |
5687 __gen_field(values->DCFlushEnable, 5, 5) |
5688 __gen_field(values->VFCacheInvalidationEnable, 4, 4) |
5689 __gen_field(values->ConstantCacheInvalidationEnable, 3, 3) |
5690 __gen_field(values->StateCacheInvalidationEnable, 2, 2) |
5691 __gen_field(values->StallAtPixelScoreboard, 1, 1) |
5692 __gen_field(values->DepthCacheFlushEnable, 0, 0) |
5693 0;
5694
5695 uint32_t dw2 =
5696 0;
5697
5698 dw[2] =
5699 __gen_combine_address(data, &dw[2], values->Address, dw2);
5700
5701 dw[3] =
5702 __gen_field(values->ImmediateData, 0, 31) |
5703 0;
5704
5705 dw[4] =
5706 __gen_field(values->ImmediateData, 0, 31) |
5707 0;
5708
5709 }
5710
5711 #define GEN7_3DSTATE_CONSTANT_BODY_length 0x00000006
5712
5713 #define GEN7_VERTEX_BUFFER_STATE_length 0x00000004
5714
5715 #define GEN7_VERTEX_ELEMENT_STATE_length 0x00000002
5716
5717 #define GEN7_SO_DECL_ENTRY_length 0x00000002
5718
5719 #define GEN7_SO_DECL_length 0x00000001
5720
5721 #define GEN7_SCISSOR_RECT_length 0x00000002
5722
5723 struct GEN7_SCISSOR_RECT {
5724 uint32_t ScissorRectangleYMin;
5725 uint32_t ScissorRectangleXMin;
5726 uint32_t ScissorRectangleYMax;
5727 uint32_t ScissorRectangleXMax;
5728 };
5729
5730 static inline void
5731 GEN7_SCISSOR_RECT_pack(__gen_user_data *data, void * restrict dst,
5732 const struct GEN7_SCISSOR_RECT * restrict values)
5733 {
5734 uint32_t *dw = (uint32_t * restrict) dst;
5735
5736 dw[0] =
5737 __gen_field(values->ScissorRectangleYMin, 16, 31) |
5738 __gen_field(values->ScissorRectangleXMin, 0, 15) |
5739 0;
5740
5741 dw[1] =
5742 __gen_field(values->ScissorRectangleYMax, 16, 31) |
5743 __gen_field(values->ScissorRectangleXMax, 0, 15) |
5744 0;
5745
5746 }
5747
5748 #define GEN7_SF_CLIP_VIEWPORT_length 0x00000010
5749
5750 struct GEN7_SF_CLIP_VIEWPORT {
5751 float ViewportMatrixElementm00;
5752 float ViewportMatrixElementm11;
5753 float ViewportMatrixElementm22;
5754 float ViewportMatrixElementm30;
5755 float ViewportMatrixElementm31;
5756 float ViewportMatrixElementm32;
5757 float XMinClipGuardband;
5758 float XMaxClipGuardband;
5759 float YMinClipGuardband;
5760 float YMaxClipGuardband;
5761 };
5762
5763 static inline void
5764 GEN7_SF_CLIP_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
5765 const struct GEN7_SF_CLIP_VIEWPORT * restrict values)
5766 {
5767 uint32_t *dw = (uint32_t * restrict) dst;
5768
5769 dw[0] =
5770 __gen_float(values->ViewportMatrixElementm00) |
5771 0;
5772
5773 dw[1] =
5774 __gen_float(values->ViewportMatrixElementm11) |
5775 0;
5776
5777 dw[2] =
5778 __gen_float(values->ViewportMatrixElementm22) |
5779 0;
5780
5781 dw[3] =
5782 __gen_float(values->ViewportMatrixElementm30) |
5783 0;
5784
5785 dw[4] =
5786 __gen_float(values->ViewportMatrixElementm31) |
5787 0;
5788
5789 dw[5] =
5790 __gen_float(values->ViewportMatrixElementm32) |
5791 0;
5792
5793 dw[6] =
5794 0;
5795
5796 dw[7] =
5797 0;
5798
5799 dw[8] =
5800 __gen_float(values->XMinClipGuardband) |
5801 0;
5802
5803 dw[9] =
5804 __gen_float(values->XMaxClipGuardband) |
5805 0;
5806
5807 dw[10] =
5808 __gen_float(values->YMinClipGuardband) |
5809 0;
5810
5811 dw[11] =
5812 __gen_float(values->YMaxClipGuardband) |
5813 0;
5814
5815 dw[12] =
5816 0;
5817
5818 }
5819
5820 #define GEN7_BLEND_STATE_length 0x00000002
5821
5822 struct GEN7_BLEND_STATE {
5823 uint32_t ColorBufferBlendEnable;
5824 uint32_t IndependentAlphaBlendEnable;
5825 #define BLENDFUNCTION_ADD 0
5826 #define BLENDFUNCTION_SUBTRACT 1
5827 #define BLENDFUNCTION_REVERSE_SUBTRACT 2
5828 #define BLENDFUNCTION_MIN 3
5829 #define BLENDFUNCTION_MAX 4
5830 uint32_t AlphaBlendFunction;
5831 #define BLENDFACTOR_ONE 1
5832 #define BLENDFACTOR_SRC_COLOR 2
5833 #define BLENDFACTOR_SRC_ALPHA 3
5834 #define BLENDFACTOR_DST_ALPHA 4
5835 #define BLENDFACTOR_DST_COLOR 5
5836 #define BLENDFACTOR_SRC_ALPHA_SATURATE 6
5837 #define BLENDFACTOR_CONST_COLOR 7
5838 #define BLENDFACTOR_CONST_ALPHA 8
5839 #define BLENDFACTOR_SRC1_COLOR 9
5840 #define BLENDFACTOR_SRC1_ALPHA 10
5841 #define BLENDFACTOR_ZERO 17
5842 #define BLENDFACTOR_INV_SRC_COLOR 18
5843 #define BLENDFACTOR_INV_SRC_ALPHA 19
5844 #define BLENDFACTOR_INV_DST_ALPHA 20
5845 #define BLENDFACTOR_INV_DST_COLOR 21
5846 #define BLENDFACTOR_INV_CONST_COLOR 23
5847 #define BLENDFACTOR_INV_CONST_ALPHA 24
5848 #define BLENDFACTOR_INV_SRC1_COLOR 25
5849 #define BLENDFACTOR_INV_SRC1_ALPHA 26
5850 uint32_t SourceAlphaBlendFactor;
5851 uint32_t DestinationAlphaBlendFactor;
5852 #define BLENDFUNCTION_ADD 0
5853 #define BLENDFUNCTION_SUBTRACT 1
5854 #define BLENDFUNCTION_REVERSE_SUBTRACT 2
5855 #define BLENDFUNCTION_MIN 3
5856 #define BLENDFUNCTION_MAX 4
5857 uint32_t ColorBlendFunction;
5858 uint32_t SourceBlendFactor;
5859 uint32_t DestinationBlendFactor;
5860 uint32_t AlphaToCoverageEnable;
5861 uint32_t AlphaToOneEnable;
5862 uint32_t AlphaToCoverageDitherEnable;
5863 uint32_t WriteDisableAlpha;
5864 uint32_t WriteDisableRed;
5865 uint32_t WriteDisableGreen;
5866 uint32_t WriteDisableBlue;
5867 uint32_t LogicOpEnable;
5868 #define LOGICOP_CLEAR 0
5869 #define LOGICOP_NOR 1
5870 #define LOGICOP_AND_INVERTED 2
5871 #define LOGICOP_COPY_INVERTED 3
5872 #define LOGICOP_AND_REVERSE 4
5873 #define LOGICOP_INVERT 5
5874 #define LOGICOP_XOR 6
5875 #define LOGICOP_NAND 7
5876 #define LOGICOP_AND 8
5877 #define LOGICOP_EQUIV 9
5878 #define LOGICOP_NOOP 10
5879 #define LOGICOP_OR_INVERTED 11
5880 #define LOGICOP_COPY 12
5881 #define LOGICOP_OR_REVERSE 13
5882 #define LOGICOP_OR 14
5883 #define LOGICOP_SET 15
5884 uint32_t LogicOpFunction;
5885 uint32_t AlphaTestEnable;
5886 #define COMPAREFUNCTION_ALWAYS 0
5887 #define COMPAREFUNCTION_NEVER 1
5888 #define COMPAREFUNCTION_LESS 2
5889 #define COMPAREFUNCTION_EQUAL 3
5890 #define COMPAREFUNCTION_LEQUAL 4
5891 #define COMPAREFUNCTION_GREATER 5
5892 #define COMPAREFUNCTION_NOTEQUAL 6
5893 #define COMPAREFUNCTION_GEQUAL 7
5894 uint32_t AlphaTestFunction;
5895 uint32_t ColorDitherEnable;
5896 uint32_t XDitherOffset;
5897 uint32_t YDitherOffset;
5898 #define COLORCLAMP_UNORM 0
5899 #define COLORCLAMP_SNORM 1
5900 #define COLORCLAMP_RTFORMAT 2
5901 uint32_t ColorClampRange;
5902 uint32_t PreBlendColorClampEnable;
5903 uint32_t PostBlendColorClampEnable;
5904 };
5905
5906 static inline void
5907 GEN7_BLEND_STATE_pack(__gen_user_data *data, void * restrict dst,
5908 const struct GEN7_BLEND_STATE * restrict values)
5909 {
5910 uint32_t *dw = (uint32_t * restrict) dst;
5911
5912 dw[0] =
5913 __gen_field(values->ColorBufferBlendEnable, 31, 31) |
5914 __gen_field(values->IndependentAlphaBlendEnable, 30, 30) |
5915 __gen_field(values->AlphaBlendFunction, 26, 28) |
5916 __gen_field(values->SourceAlphaBlendFactor, 20, 24) |
5917 __gen_field(values->DestinationAlphaBlendFactor, 15, 19) |
5918 __gen_field(values->ColorBlendFunction, 11, 13) |
5919 __gen_field(values->SourceBlendFactor, 5, 9) |
5920 __gen_field(values->DestinationBlendFactor, 0, 4) |
5921 0;
5922
5923 dw[1] =
5924 __gen_field(values->AlphaToCoverageEnable, 31, 31) |
5925 __gen_field(values->AlphaToOneEnable, 30, 30) |
5926 __gen_field(values->AlphaToCoverageDitherEnable, 29, 29) |
5927 __gen_field(values->WriteDisableAlpha, 27, 27) |
5928 __gen_field(values->WriteDisableRed, 26, 26) |
5929 __gen_field(values->WriteDisableGreen, 25, 25) |
5930 __gen_field(values->WriteDisableBlue, 24, 24) |
5931 __gen_field(values->LogicOpEnable, 22, 22) |
5932 __gen_field(values->LogicOpFunction, 18, 21) |
5933 __gen_field(values->AlphaTestEnable, 16, 16) |
5934 __gen_field(values->AlphaTestFunction, 13, 15) |
5935 __gen_field(values->ColorDitherEnable, 12, 12) |
5936 __gen_field(values->XDitherOffset, 10, 11) |
5937 __gen_field(values->YDitherOffset, 8, 9) |
5938 __gen_field(values->ColorClampRange, 2, 3) |
5939 __gen_field(values->PreBlendColorClampEnable, 1, 1) |
5940 __gen_field(values->PostBlendColorClampEnable, 0, 0) |
5941 0;
5942
5943 }
5944
5945 #define GEN7_CC_VIEWPORT_length 0x00000002
5946
5947 struct GEN7_CC_VIEWPORT {
5948 float MinimumDepth;
5949 float MaximumDepth;
5950 };
5951
5952 static inline void
5953 GEN7_CC_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
5954 const struct GEN7_CC_VIEWPORT * restrict values)
5955 {
5956 uint32_t *dw = (uint32_t * restrict) dst;
5957
5958 dw[0] =
5959 __gen_float(values->MinimumDepth) |
5960 0;
5961
5962 dw[1] =
5963 __gen_float(values->MaximumDepth) |
5964 0;
5965
5966 }
5967
5968 #define GEN7_COLOR_CALC_STATE_length 0x00000006
5969
5970 struct GEN7_COLOR_CALC_STATE {
5971 uint32_t StencilReferenceValue;
5972 uint32_t BackFaceStencilReferenceValue;
5973 #define Cancelled 0
5974 #define NotCancelled 1
5975 uint32_t RoundDisableFunctionDisable;
5976 #define ALPHATEST_UNORM8 0
5977 #define ALPHATEST_FLOAT32 1
5978 uint32_t AlphaTestFormat;
5979 uint32_t AlphaReferenceValueAsUNORM8;
5980 float AlphaReferenceValueAsFLOAT32;
5981 float BlendConstantColorRed;
5982 float BlendConstantColorGreen;
5983 float BlendConstantColorBlue;
5984 float BlendConstantColorAlpha;
5985 };
5986
5987 static inline void
5988 GEN7_COLOR_CALC_STATE_pack(__gen_user_data *data, void * restrict dst,
5989 const struct GEN7_COLOR_CALC_STATE * restrict values)
5990 {
5991 uint32_t *dw = (uint32_t * restrict) dst;
5992
5993 dw[0] =
5994 __gen_field(values->StencilReferenceValue, 24, 31) |
5995 __gen_field(values->BackFaceStencilReferenceValue, 16, 23) |
5996 __gen_field(values->RoundDisableFunctionDisable, 15, 15) |
5997 __gen_field(values->AlphaTestFormat, 0, 0) |
5998 0;
5999
6000 dw[1] =
6001 __gen_field(values->AlphaReferenceValueAsUNORM8, 0, 31) |
6002 __gen_float(values->AlphaReferenceValueAsFLOAT32) |
6003 0;
6004
6005 dw[2] =
6006 __gen_float(values->BlendConstantColorRed) |
6007 0;
6008
6009 dw[3] =
6010 __gen_float(values->BlendConstantColorGreen) |
6011 0;
6012
6013 dw[4] =
6014 __gen_float(values->BlendConstantColorBlue) |
6015 0;
6016
6017 dw[5] =
6018 __gen_float(values->BlendConstantColorAlpha) |
6019 0;
6020
6021 }
6022
6023 #define GEN7_DEPTH_STENCIL_STATE_length 0x00000003
6024
6025 struct GEN7_DEPTH_STENCIL_STATE {
6026 uint32_t StencilTestEnable;
6027 #define COMPAREFUNCTION_ALWAYS 0
6028 #define COMPAREFUNCTION_NEVER 1
6029 #define COMPAREFUNCTION_LESS 2
6030 #define COMPAREFUNCTION_EQUAL 3
6031 #define COMPAREFUNCTION_LEQUAL 4
6032 #define COMPAREFUNCTION_GREATER 5
6033 #define COMPAREFUNCTION_NOTEQUAL 6
6034 #define COMPAREFUNCTION_GEQUAL 7
6035 uint32_t StencilTestFunction;
6036 #define STENCILOP_KEEP 0
6037 #define STENCILOP_ZERO 1
6038 #define STENCILOP_REPLACE 2
6039 #define STENCILOP_INCRSAT 3
6040 #define STENCILOP_DECRSAT 4
6041 #define STENCILOP_INCR 5
6042 #define STENCILOP_DECR 6
6043 #define STENCILOP_INVERT 7
6044 uint32_t StencilFailOp;
6045 uint32_t StencilPassDepthFailOp;
6046 uint32_t StencilPassDepthPassOp;
6047 uint32_t StencilBufferWriteEnable;
6048 uint32_t DoubleSidedStencilEnable;
6049 #define COMPAREFUNCTION_ALWAYS 0
6050 #define COMPAREFUNCTION_NEVER 1
6051 #define COMPAREFUNCTION_LESS 2
6052 #define COMPAREFUNCTION_EQUAL 3
6053 #define COMPAREFUNCTION_LEQUAL 4
6054 #define COMPAREFUNCTION_GREATER 5
6055 #define COMPAREFUNCTION_NOTEQUAL 6
6056 #define COMPAREFUNCTION_GEQUAL 7
6057 uint32_t BackFaceStencilTestFunction;
6058 #define STENCILOP_KEEP 0
6059 #define STENCILOP_ZERO 1
6060 #define STENCILOP_REPLACE 2
6061 #define STENCILOP_INCRSAT 3
6062 #define STENCILOP_DECRSAT 4
6063 #define STENCILOP_INCR 5
6064 #define STENCILOP_DECR 6
6065 #define STENCILOP_INVERT 7
6066 uint32_t BackfaceStencilFailOp;
6067 uint32_t BackfaceStencilPassDepthFailOp;
6068 uint32_t BackfaceStencilPassDepthPassOp;
6069 uint32_t StencilTestMask;
6070 uint32_t StencilWriteMask;
6071 uint32_t BackfaceStencilTestMask;
6072 uint32_t BackfaceStencilWriteMask;
6073 uint32_t DepthTestEnable;
6074 #define COMPAREFUNCTION_ALWAYS 0
6075 #define COMPAREFUNCTION_NEVER 1
6076 #define COMPAREFUNCTION_LESS 2
6077 #define COMPAREFUNCTION_EQUAL 3
6078 #define COMPAREFUNCTION_LEQUAL 4
6079 #define COMPAREFUNCTION_GREATER 5
6080 #define COMPAREFUNCTION_NOTEQUAL 6
6081 #define COMPAREFUNCTION_GEQUAL 7
6082 uint32_t DepthTestFunction;
6083 uint32_t DepthBufferWriteEnable;
6084 };
6085
6086 static inline void
6087 GEN7_DEPTH_STENCIL_STATE_pack(__gen_user_data *data, void * restrict dst,
6088 const struct GEN7_DEPTH_STENCIL_STATE * restrict values)
6089 {
6090 uint32_t *dw = (uint32_t * restrict) dst;
6091
6092 dw[0] =
6093 __gen_field(values->StencilTestEnable, 31, 31) |
6094 __gen_field(values->StencilTestFunction, 28, 30) |
6095 __gen_field(values->StencilFailOp, 25, 27) |
6096 __gen_field(values->StencilPassDepthFailOp, 22, 24) |
6097 __gen_field(values->StencilPassDepthPassOp, 19, 21) |
6098 __gen_field(values->StencilBufferWriteEnable, 18, 18) |
6099 __gen_field(values->DoubleSidedStencilEnable, 15, 15) |
6100 __gen_field(values->BackFaceStencilTestFunction, 12, 14) |
6101 __gen_field(values->BackfaceStencilFailOp, 9, 11) |
6102 __gen_field(values->BackfaceStencilPassDepthFailOp, 6, 8) |
6103 __gen_field(values->BackfaceStencilPassDepthPassOp, 3, 5) |
6104 0;
6105
6106 dw[1] =
6107 __gen_field(values->StencilTestMask, 24, 31) |
6108 __gen_field(values->StencilWriteMask, 16, 23) |
6109 __gen_field(values->BackfaceStencilTestMask, 8, 15) |
6110 __gen_field(values->BackfaceStencilWriteMask, 0, 7) |
6111 0;
6112
6113 dw[2] =
6114 __gen_field(values->DepthTestEnable, 31, 31) |
6115 __gen_field(values->DepthTestFunction, 27, 29) |
6116 __gen_field(values->DepthBufferWriteEnable, 26, 26) |
6117 0;
6118
6119 }
6120
6121 #define GEN7_MEMORY_OBJECT_CONTROL_STATE_length 0x00000001
6122
6123 #define GEN7_INTERFACE_DESCRIPTOR_DATA_length 0x00000008
6124
6125 struct GEN7_INTERFACE_DESCRIPTOR_DATA {
6126 uint32_t KernelStartPointer;
6127 #define Multiple 0
6128 #define Single 1
6129 uint32_t SingleProgramFlow;
6130 #define NormalPriority 0
6131 #define HighPriority 1
6132 uint32_t ThreadPriority;
6133 #define IEEE754 0
6134 #define Alternate 1
6135 uint32_t FloatingPointMode;
6136 uint32_t IllegalOpcodeExceptionEnable;
6137 uint32_t MaskStackExceptionEnable;
6138 uint32_t SoftwareExceptionEnable;
6139 uint32_t SamplerStatePointer;
6140 #define Nosamplersused 0
6141 #define Between1and4samplersused 1
6142 #define Between5and8samplersused 2
6143 #define Between9and12samplersused 3
6144 #define Between13and16samplersused 4
6145 uint32_t SamplerCount;
6146 uint32_t BindingTablePointer;
6147 uint32_t BindingTableEntryCount;
6148 uint32_t ConstantURBEntryReadLength;
6149 uint32_t ConstantURBEntryReadOffset;
6150 #define RTNE 0
6151 #define RU 1
6152 #define RD 2
6153 #define RTZ 3
6154 uint32_t RoundingMode;
6155 uint32_t BarrierEnable;
6156 uint32_t SharedLocalMemorySize;
6157 uint32_t NumberofThreadsinGPGPUThreadGroup;
6158 };
6159
6160 static inline void
6161 GEN7_INTERFACE_DESCRIPTOR_DATA_pack(__gen_user_data *data, void * restrict dst,
6162 const struct GEN7_INTERFACE_DESCRIPTOR_DATA * restrict values)
6163 {
6164 uint32_t *dw = (uint32_t * restrict) dst;
6165
6166 dw[0] =
6167 __gen_offset(values->KernelStartPointer, 6, 31) |
6168 0;
6169
6170 dw[1] =
6171 __gen_field(values->SingleProgramFlow, 18, 18) |
6172 __gen_field(values->ThreadPriority, 17, 17) |
6173 __gen_field(values->FloatingPointMode, 16, 16) |
6174 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
6175 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
6176 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
6177 0;
6178
6179 dw[2] =
6180 __gen_offset(values->SamplerStatePointer, 5, 31) |
6181 __gen_field(values->SamplerCount, 2, 4) |
6182 0;
6183
6184 dw[3] =
6185 __gen_offset(values->BindingTablePointer, 5, 15) |
6186 __gen_field(values->BindingTableEntryCount, 0, 4) |
6187 0;
6188
6189 dw[4] =
6190 __gen_field(values->ConstantURBEntryReadLength, 16, 31) |
6191 __gen_field(values->ConstantURBEntryReadOffset, 0, 15) |
6192 0;
6193
6194 dw[5] =
6195 __gen_field(values->RoundingMode, 22, 23) |
6196 __gen_field(values->BarrierEnable, 21, 21) |
6197 __gen_field(values->SharedLocalMemorySize, 16, 20) |
6198 __gen_field(values->NumberofThreadsinGPGPUThreadGroup, 0, 7) |
6199 0;
6200
6201 dw[6] =
6202 0;
6203
6204 dw[7] =
6205 0;
6206
6207 }
6208
6209 #define GEN7_PALETTE_ENTRY_length 0x00000001
6210
6211 #define GEN7_BINDING_TABLE_STATE_length 0x00000001
6212
6213 struct GEN7_BINDING_TABLE_STATE {
6214 uint32_t SurfaceStatePointer;
6215 };
6216
6217 static inline void
6218 GEN7_BINDING_TABLE_STATE_pack(__gen_user_data *data, void * restrict dst,
6219 const struct GEN7_BINDING_TABLE_STATE * restrict values)
6220 {
6221 uint32_t *dw = (uint32_t * restrict) dst;
6222
6223 dw[0] =
6224 __gen_offset(values->SurfaceStatePointer, 5, 31) |
6225 0;
6226
6227 }
6228
6229 #define GEN7_RENDER_SURFACE_STATE_length 0x00000008
6230
6231 struct GEN7_RENDER_SURFACE_STATE {
6232 #define SURFTYPE_1D 0
6233 #define SURFTYPE_2D 1
6234 #define SURFTYPE_3D 2
6235 #define SURFTYPE_CUBE 3
6236 #define SURFTYPE_BUFFER 4
6237 #define SURFTYPE_STRBUF 5
6238 #define SURFTYPE_NULL 7
6239 uint32_t SurfaceType;
6240 uint32_t SurfaceArray;
6241 uint32_t SurfaceFormat;
6242 uint32_t SurfaceVerticalAlignment;
6243 #define HALIGN_4 0
6244 #define HALIGN_8 1
6245 uint32_t SurfaceHorizontalAlignment;
6246 uint32_t TiledSurface;
6247 #define TILEWALK_XMAJOR 0
6248 #define TILEWALK_YMAJOR 1
6249 uint32_t TileWalk;
6250 uint32_t VerticalLineStride;
6251 uint32_t VerticalLineStrideOffset;
6252 #define ARYSPC_FULL 0
6253 #define ARYSPC_LOD0 1
6254 uint32_t SurfaceArraySpacing;
6255 uint32_t RenderCacheReadWriteMode;
6256 #define NORMAL_MODE 0
6257 #define PROGRESSIVE_FRAME 2
6258 #define INTERLACED_FRAME 3
6259 uint32_t MediaBoundaryPixelMode;
6260 uint32_t CubeFaceEnables;
6261 uint32_t SurfaceBaseAddress;
6262 uint32_t Height;
6263 uint32_t Width;
6264 uint32_t Depth;
6265 uint32_t SurfacePitch;
6266 #define RTROTATE_0DEG 0
6267 #define RTROTATE_90DEG 1
6268 #define RTROTATE_270DEG 3
6269 uint32_t RenderTargetRotation;
6270 uint32_t MinimumArrayElement;
6271 uint32_t RenderTargetViewExtent;
6272 #define MSFMT_MSS 0
6273 #define MSFMT_DEPTH_STENCIL 1
6274 uint32_t MultisampledSurfaceStorageFormat;
6275 #define MULTISAMPLECOUNT_1 0
6276 #define MULTISAMPLECOUNT_4 2
6277 #define MULTISAMPLECOUNT_8 3
6278 uint32_t NumberofMultisamples;
6279 uint32_t MultisamplePositionPaletteIndex;
6280 uint32_t MinimumArrayElement0;
6281 uint32_t XOffset;
6282 uint32_t YOffset;
6283 uint32_t SurfaceObjectControlState;
6284 uint32_t SurfaceMinLOD;
6285 uint32_t MIPCountLOD;
6286 uint32_t MCSBaseAddress;
6287 uint32_t MCSSurfacePitch;
6288 uint32_t AppendCounterAddress;
6289 uint32_t AppendCounterEnable;
6290 uint32_t MCSEnable;
6291 uint32_t ReservedMBZ;
6292 uint32_t XOffsetforUVPlane;
6293 uint32_t YOffsetforUVPlane;
6294 #define CC_ZERO 0
6295 #define CC_ONE 1
6296 uint32_t RedClearColor;
6297 #define CC_ZERO 0
6298 #define CC_ONE 1
6299 uint32_t GreenClearColor;
6300 #define CC_ZERO 0
6301 #define CC_ONE 1
6302 uint32_t BlueClearColor;
6303 #define CC_ZERO 0
6304 #define CC_ONE 1
6305 uint32_t AlphaClearColor;
6306 uint32_t ResourceMinLOD;
6307 };
6308
6309 static inline void
6310 GEN7_RENDER_SURFACE_STATE_pack(__gen_user_data *data, void * restrict dst,
6311 const struct GEN7_RENDER_SURFACE_STATE * restrict values)
6312 {
6313 uint32_t *dw = (uint32_t * restrict) dst;
6314
6315 dw[0] =
6316 __gen_field(values->SurfaceType, 29, 31) |
6317 __gen_field(values->SurfaceArray, 28, 28) |
6318 __gen_field(values->SurfaceFormat, 18, 26) |
6319 __gen_field(values->SurfaceVerticalAlignment, 16, 17) |
6320 __gen_field(values->SurfaceHorizontalAlignment, 15, 15) |
6321 __gen_field(values->TiledSurface, 14, 14) |
6322 __gen_field(values->TileWalk, 13, 13) |
6323 __gen_field(values->VerticalLineStride, 12, 12) |
6324 __gen_field(values->VerticalLineStrideOffset, 11, 11) |
6325 __gen_field(values->SurfaceArraySpacing, 10, 10) |
6326 __gen_field(values->RenderCacheReadWriteMode, 8, 8) |
6327 __gen_field(values->MediaBoundaryPixelMode, 6, 7) |
6328 __gen_field(values->CubeFaceEnables, 0, 5) |
6329 0;
6330
6331 dw[1] =
6332 __gen_field(values->SurfaceBaseAddress, 0, 31) |
6333 0;
6334
6335 dw[2] =
6336 __gen_field(values->Height, 16, 29) |
6337 __gen_field(values->Width, 0, 13) |
6338 0;
6339
6340 dw[3] =
6341 __gen_field(values->Depth, 21, 31) |
6342 __gen_field(values->SurfacePitch, 0, 17) |
6343 0;
6344
6345 dw[4] =
6346 __gen_field(values->RenderTargetRotation, 29, 30) |
6347 __gen_field(values->MinimumArrayElement, 18, 28) |
6348 __gen_field(values->RenderTargetViewExtent, 7, 17) |
6349 __gen_field(values->MultisampledSurfaceStorageFormat, 6, 6) |
6350 __gen_field(values->NumberofMultisamples, 3, 5) |
6351 __gen_field(values->MultisamplePositionPaletteIndex, 0, 2) |
6352 __gen_field(values->MinimumArrayElement, 0, 26) |
6353 0;
6354
6355 dw[5] =
6356 __gen_field(values->XOffset, 25, 31) |
6357 __gen_field(values->YOffset, 20, 23) |
6358 __gen_field(values->SurfaceObjectControlState, 16, 19) |
6359 __gen_field(values->SurfaceMinLOD, 4, 7) |
6360 __gen_field(values->MIPCountLOD, 0, 3) |
6361 0;
6362
6363 dw[6] =
6364 __gen_field(values->MCSBaseAddress, 12, 31) |
6365 __gen_field(values->MCSSurfacePitch, 3, 11) |
6366 __gen_field(values->AppendCounterAddress, 6, 31) |
6367 __gen_field(values->AppendCounterEnable, 1, 1) |
6368 __gen_field(values->MCSEnable, 0, 0) |
6369 __gen_field(values->ReservedMBZ, 30, 31) |
6370 __gen_field(values->XOffsetforUVPlane, 16, 29) |
6371 __gen_field(values->YOffsetforUVPlane, 0, 13) |
6372 0;
6373
6374 dw[7] =
6375 __gen_field(values->RedClearColor, 31, 31) |
6376 __gen_field(values->GreenClearColor, 30, 30) |
6377 __gen_field(values->BlueClearColor, 29, 29) |
6378 __gen_field(values->AlphaClearColor, 28, 28) |
6379 __gen_field(values->ResourceMinLOD, 0, 11) |
6380 0;
6381
6382 }
6383
6384 #define GEN7_SAMPLER_BORDER_COLOR_STATE_length 0x00000004
6385
6386 struct GEN7_SAMPLER_BORDER_COLOR_STATE {
6387 uint32_t BorderColorRedDX100GL;
6388 uint32_t BorderColorAlpha;
6389 uint32_t BorderColorBlue;
6390 uint32_t BorderColorGreen;
6391 uint32_t BorderColorRedDX9;
6392 uint32_t BorderColorGreen0;
6393 uint32_t BorderColorBlue0;
6394 uint32_t BorderColorAlpha0;
6395 };
6396
6397 static inline void
6398 GEN7_SAMPLER_BORDER_COLOR_STATE_pack(__gen_user_data *data, void * restrict dst,
6399 const struct GEN7_SAMPLER_BORDER_COLOR_STATE * restrict values)
6400 {
6401 uint32_t *dw = (uint32_t * restrict) dst;
6402
6403 dw[0] =
6404 __gen_field(values->BorderColorRedDX100GL, 0, 31) |
6405 __gen_field(values->BorderColorAlpha, 24, 31) |
6406 __gen_field(values->BorderColorBlue, 16, 23) |
6407 __gen_field(values->BorderColorGreen, 8, 15) |
6408 __gen_field(values->BorderColorRedDX9, 0, 7) |
6409 0;
6410
6411 dw[1] =
6412 __gen_field(values->BorderColorGreen, 0, 31) |
6413 0;
6414
6415 dw[2] =
6416 __gen_field(values->BorderColorBlue, 0, 31) |
6417 0;
6418
6419 dw[3] =
6420 __gen_field(values->BorderColorAlpha, 0, 31) |
6421 0;
6422
6423 }
6424
6425 #define GEN7_SAMPLER_STATE_length 0x00000004
6426
6427 struct GEN7_SAMPLER_STATE {
6428 uint32_t SamplerDisable;
6429 #define DX10OGL 0
6430 #define DX9 1
6431 uint32_t TextureBorderColorMode;
6432 #define OGL 1
6433 uint32_t LODPreClampEnable;
6434 float BaseMipLevel;
6435 #define MIPFILTER_NONE 0
6436 #define MIPFILTER_NEAREST 1
6437 #define MIPFILTER_LINEAR 3
6438 uint32_t MipModeFilter;
6439 #define MAPFILTER_NEAREST 0
6440 #define MAPFILTER_LINEAR 1
6441 #define MAPFILTER_ANISOTROPIC 2
6442 #define MAPFILTER_MONO 6
6443 uint32_t MagModeFilter;
6444 #define MAPFILTER_NEAREST 0
6445 #define MAPFILTER_LINEAR 1
6446 #define MAPFILTER_ANISOTROPIC 2
6447 #define MAPFILTER_MONO 6
6448 uint32_t MinModeFilter;
6449 uint32_t TextureLODBias;
6450 #define LEGACY 0
6451 #define EWAApproximation 1
6452 uint32_t AnisotropicAlgorithm;
6453 float MinLOD;
6454 float MaxLOD;
6455 #define PREFILTEROPALWAYS 0
6456 #define PREFILTEROPNEVER 1
6457 #define PREFILTEROPLESS 2
6458 #define PREFILTEROPEQUAL 3
6459 #define PREFILTEROPLEQUAL 4
6460 #define PREFILTEROPGREATER 5
6461 #define PREFILTEROPNOTEQUAL 6
6462 #define PREFILTEROPGEQUAL 7
6463 uint32_t ShadowFunction;
6464 #define PROGRAMMED 0
6465 #define OVERRIDE 1
6466 uint32_t CubeSurfaceControlMode;
6467 uint32_t BorderColorPointer;
6468 uint32_t ChromaKeyEnable;
6469 uint32_t ChromaKeyIndex;
6470 #define KEYFILTER_KILL_ON_ANY_MATCH 0
6471 #define KEYFILTER_REPLACE_BLACK 1
6472 uint32_t ChromaKeyMode;
6473 #define RATIO21 0
6474 #define RATIO41 1
6475 #define RATIO61 2
6476 #define RATIO81 3
6477 #define RATIO101 4
6478 #define RATIO121 5
6479 #define RATIO141 6
6480 #define RATIO161 7
6481 uint32_t MaximumAnisotropy;
6482 uint32_t RAddressMinFilterRoundingEnable;
6483 uint32_t RAddressMagFilterRoundingEnable;
6484 uint32_t VAddressMinFilterRoundingEnable;
6485 uint32_t VAddressMagFilterRoundingEnable;
6486 uint32_t UAddressMinFilterRoundingEnable;
6487 uint32_t UAddressMagFilterRoundingEnable;
6488 #define FULL 0
6489 #define MED 2
6490 #define LOW 3
6491 uint32_t TrilinearFilterQuality;
6492 uint32_t NonnormalizedCoordinateEnable;
6493 uint32_t TCXAddressControlMode;
6494 uint32_t TCYAddressControlMode;
6495 uint32_t TCZAddressControlMode;
6496 };
6497
6498 static inline void
6499 GEN7_SAMPLER_STATE_pack(__gen_user_data *data, void * restrict dst,
6500 const struct GEN7_SAMPLER_STATE * restrict values)
6501 {
6502 uint32_t *dw = (uint32_t * restrict) dst;
6503
6504 dw[0] =
6505 __gen_field(values->SamplerDisable, 31, 31) |
6506 __gen_field(values->TextureBorderColorMode, 29, 29) |
6507 __gen_field(values->LODPreClampEnable, 28, 28) |
6508 __gen_field(values->BaseMipLevel * (1 << 1), 22, 26) |
6509 __gen_field(values->MipModeFilter, 20, 21) |
6510 __gen_field(values->MagModeFilter, 17, 19) |
6511 __gen_field(values->MinModeFilter, 14, 16) |
6512 __gen_field(values->TextureLODBias, 1, 13) |
6513 __gen_field(values->AnisotropicAlgorithm, 0, 0) |
6514 0;
6515
6516 dw[1] =
6517 __gen_field(values->MinLOD * (1 << 8), 20, 31) |
6518 __gen_field(values->MaxLOD * (1 << 8), 8, 19) |
6519 __gen_field(values->ShadowFunction, 1, 3) |
6520 __gen_field(values->CubeSurfaceControlMode, 0, 0) |
6521 0;
6522
6523 dw[2] =
6524 __gen_offset(values->BorderColorPointer, 5, 31) |
6525 0;
6526
6527 dw[3] =
6528 __gen_field(values->ChromaKeyEnable, 25, 25) |
6529 __gen_field(values->ChromaKeyIndex, 23, 24) |
6530 __gen_field(values->ChromaKeyMode, 22, 22) |
6531 __gen_field(values->MaximumAnisotropy, 19, 21) |
6532 __gen_field(values->RAddressMinFilterRoundingEnable, 13, 13) |
6533 __gen_field(values->RAddressMagFilterRoundingEnable, 14, 14) |
6534 __gen_field(values->VAddressMinFilterRoundingEnable, 15, 15) |
6535 __gen_field(values->VAddressMagFilterRoundingEnable, 16, 16) |
6536 __gen_field(values->UAddressMinFilterRoundingEnable, 17, 17) |
6537 __gen_field(values->UAddressMagFilterRoundingEnable, 18, 18) |
6538 __gen_field(values->TrilinearFilterQuality, 11, 12) |
6539 __gen_field(values->NonnormalizedCoordinateEnable, 10, 10) |
6540 __gen_field(values->TCXAddressControlMode, 6, 8) |
6541 __gen_field(values->TCYAddressControlMode, 3, 5) |
6542 __gen_field(values->TCZAddressControlMode, 0, 2) |
6543 0;
6544
6545 }
6546
6547 /* Enum 3D_Prim_Topo_Type */
6548 #define _3DPRIM_POINTLIST 1
6549 #define _3DPRIM_LINELIST 2
6550 #define _3DPRIM_LINESTRIP 3
6551 #define _3DPRIM_TRILIST 4
6552 #define _3DPRIM_TRISTRIP 5
6553 #define _3DPRIM_TRIFAN 6
6554 #define _3DPRIM_QUADLIST 7
6555 #define _3DPRIM_QUADSTRIP 8
6556 #define _3DPRIM_LINELIST_ADJ 9
6557 #define _3DPRIM_LISTSTRIP_ADJ 10
6558 #define _3DPRIM_TRILIST_ADJ 11
6559 #define _3DPRIM_TRISTRIP_ADJ 12
6560 #define _3DPRIM_TRISTRIP_REVERSE 13
6561 #define _3DPRIM_POLYGON 14
6562 #define _3DPRIM_RECTLIST 15
6563 #define _3DPRIM_LINELOOP 16
6564 #define _3DPRIM_POINTLIST_BF 17
6565 #define _3DPRIM_LINESTRIP_CONT 18
6566 #define _3DPRIM_LINESTRIP_BF 19
6567 #define _3DPRIM_LINESTRIP_CONT_BF 20
6568 #define _3DPRIM_TRIFAN_NOSTIPPLE 22
6569 #define _3DPRIM_PATCHLIST_1 32
6570 #define _3DPRIM_PATCHLIST_2 33
6571 #define _3DPRIM_PATCHLIST_3 34
6572 #define _3DPRIM_PATCHLIST_4 35
6573 #define _3DPRIM_PATCHLIST_5 36
6574 #define _3DPRIM_PATCHLIST_6 37
6575 #define _3DPRIM_PATCHLIST_7 38
6576 #define _3DPRIM_PATCHLIST_8 39
6577 #define _3DPRIM_PATCHLIST_9 40
6578 #define _3DPRIM_PATCHLIST_10 41
6579 #define _3DPRIM_PATCHLIST_11 42
6580 #define _3DPRIM_PATCHLIST_12 43
6581 #define _3DPRIM_PATCHLIST_13 44
6582 #define _3DPRIM_PATCHLIST_14 45
6583 #define _3DPRIM_PATCHLIST_15 46
6584 #define _3DPRIM_PATCHLIST_16 47
6585 #define _3DPRIM_PATCHLIST_17 48
6586 #define _3DPRIM_PATCHLIST_18 49
6587 #define _3DPRIM_PATCHLIST_19 50
6588 #define _3DPRIM_PATCHLIST_20 51
6589 #define _3DPRIM_PATCHLIST_21 52
6590 #define _3DPRIM_PATCHLIST_22 53
6591 #define _3DPRIM_PATCHLIST_23 54
6592 #define _3DPRIM_PATCHLIST_24 55
6593 #define _3DPRIM_PATCHLIST_25 56
6594 #define _3DPRIM_PATCHLIST_26 57
6595 #define _3DPRIM_PATCHLIST_27 58
6596 #define _3DPRIM_PATCHLIST_28 59
6597 #define _3DPRIM_PATCHLIST_29 60
6598 #define _3DPRIM_PATCHLIST_30 61
6599 #define _3DPRIM_PATCHLIST_31 62
6600 #define _3DPRIM_PATCHLIST_32 63
6601
6602 /* Enum 3D_Vertex_Component_Control */
6603 #define VFCOMP_NOSTORE 0
6604 #define VFCOMP_STORE_SRC 1
6605 #define VFCOMP_STORE_0 2
6606 #define VFCOMP_STORE_1_FP 3
6607 #define VFCOMP_STORE_1_INT 4
6608 #define VFCOMP_STORE_VID 5
6609 #define VFCOMP_STORE_IID 6
6610 #define VFCOMP_STORE_PID 7
6611
6612 /* Enum 3D_Compare_Function */
6613 #define COMPAREFUNCTION_ALWAYS 0
6614 #define COMPAREFUNCTION_NEVER 1
6615 #define COMPAREFUNCTION_LESS 2
6616 #define COMPAREFUNCTION_EQUAL 3
6617 #define COMPAREFUNCTION_LEQUAL 4
6618 #define COMPAREFUNCTION_GREATER 5
6619 #define COMPAREFUNCTION_NOTEQUAL 6
6620 #define COMPAREFUNCTION_GEQUAL 7
6621
6622 /* Enum SURFACE_FORMAT */
6623 #define R32G32B32A32_FLOAT 0
6624 #define R32G32B32A32_SINT 1
6625 #define R32G32B32A32_UINT 2
6626 #define R32G32B32A32_UNORM 3
6627 #define R32G32B32A32_SNORM 4
6628 #define R64G64_FLOAT 5
6629 #define R32G32B32X32_FLOAT 6
6630 #define R32G32B32A32_SSCALED 7
6631 #define R32G32B32A32_USCALED 8
6632 #define R32G32B32A32_SFIXED 32
6633 #define R64G64_PASSTHRU 33
6634 #define R32G32B32_FLOAT 64
6635 #define R32G32B32_SINT 65
6636 #define R32G32B32_UINT 66
6637 #define R32G32B32_UNORM 67
6638 #define R32G32B32_SNORM 68
6639 #define R32G32B32_SSCALED 69
6640 #define R32G32B32_USCALED 70
6641 #define R32G32B32_SFIXED 80
6642 #define R16G16B16A16_UNORM 128
6643 #define R16G16B16A16_SNORM 129
6644 #define R16G16B16A16_SINT 130
6645 #define R16G16B16A16_UINT 131
6646 #define R16G16B16A16_FLOAT 132
6647 #define R32G32_FLOAT 133
6648 #define R32G32_SINT 134
6649 #define R32G32_UINT 135
6650 #define R32_FLOAT_X8X24_TYPELESS 136
6651 #define X32_TYPELESS_G8X24_UINT 137
6652 #define L32A32_FLOAT 138
6653 #define R32G32_UNORM 139
6654 #define R32G32_SNORM 140
6655 #define R64_FLOAT 141
6656 #define R16G16B16X16_UNORM 142
6657 #define R16G16B16X16_FLOAT 143
6658 #define A32X32_FLOAT 144
6659 #define L32X32_FLOAT 145
6660 #define I32X32_FLOAT 146
6661 #define R16G16B16A16_SSCALED 147
6662 #define R16G16B16A16_USCALED 148
6663 #define R32G32_SSCALED 149
6664 #define R32G32_USCALED 150
6665 #define R32G32_SFIXED 160
6666 #define R64_PASSTHRU 161
6667 #define B8G8R8A8_UNORM 192
6668 #define B8G8R8A8_UNORM_SRGB 193
6669 #define R10G10B10A2_UNORM 194
6670 #define R10G10B10A2_UNORM_SRGB 195
6671 #define R10G10B10A2_UINT 196
6672 #define R10G10B10_SNORM_A2_UNORM 197
6673 #define R8G8B8A8_UNORM 199
6674 #define R8G8B8A8_UNORM_SRGB 200
6675 #define R8G8B8A8_SNORM 201
6676 #define R8G8B8A8_SINT 202
6677 #define R8G8B8A8_UINT 203
6678 #define R16G16_UNORM 204
6679 #define R16G16_SNORM 205
6680 #define R16G16_SINT 206
6681 #define R16G16_UINT 207
6682 #define R16G16_FLOAT 208
6683 #define B10G10R10A2_UNORM 209
6684 #define B10G10R10A2_UNORM_SRGB 210
6685 #define R11G11B10_FLOAT 211
6686 #define R32_SINT 214
6687 #define R32_UINT 215
6688 #define R32_FLOAT 216
6689 #define R24_UNORM_X8_TYPELESS 217
6690 #define X24_TYPELESS_G8_UINT 218
6691 #define L32_UNORM 221
6692 #define A32_UNORM 222
6693 #define L16A16_UNORM 223
6694 #define I24X8_UNORM 224
6695 #define L24X8_UNORM 225
6696 #define A24X8_UNORM 226
6697 #define I32_FLOAT 227
6698 #define L32_FLOAT 228
6699 #define A32_FLOAT 229
6700 #define X8B8_UNORM_G8R8_SNORM 230
6701 #define A8X8_UNORM_G8R8_SNORM 231
6702 #define B8X8_UNORM_G8R8_SNORM 232
6703 #define B8G8R8X8_UNORM 233
6704 #define B8G8R8X8_UNORM_SRGB 234
6705 #define R8G8B8X8_UNORM 235
6706 #define R8G8B8X8_UNORM_SRGB 236
6707 #define R9G9B9E5_SHAREDEXP 237
6708 #define B10G10R10X2_UNORM 238
6709 #define L16A16_FLOAT 240
6710 #define R32_UNORM 241
6711 #define R32_SNORM 242
6712 #define R10G10B10X2_USCALED 243
6713 #define R8G8B8A8_SSCALED 244
6714 #define R8G8B8A8_USCALED 245
6715 #define R16G16_SSCALED 246
6716 #define R16G16_USCALED 247
6717 #define R32_SSCALED 248
6718 #define R32_USCALED 249
6719 #define B5G6R5_UNORM 256
6720 #define B5G6R5_UNORM_SRGB 257
6721 #define B5G5R5A1_UNORM 258
6722 #define B5G5R5A1_UNORM_SRGB 259
6723 #define B4G4R4A4_UNORM 260
6724 #define B4G4R4A4_UNORM_SRGB 261
6725 #define R8G8_UNORM 262
6726 #define R8G8_SNORM 263
6727 #define R8G8_SINT 264
6728 #define R8G8_UINT 265
6729 #define R16_UNORM 266
6730 #define R16_SNORM 267
6731 #define R16_SINT 268
6732 #define R16_UINT 269
6733 #define R16_FLOAT 270
6734 #define A8P8_UNORM_PALETTE0 271
6735 #define A8P8_UNORM_PALETTE1 272
6736 #define I16_UNORM 273
6737 #define L16_UNORM 274
6738 #define A16_UNORM 275
6739 #define L8A8_UNORM 276
6740 #define I16_FLOAT 277
6741 #define L16_FLOAT 278
6742 #define A16_FLOAT 279
6743 #define L8A8_UNORM_SRGB 280
6744 #define R5G5_SNORM_B6_UNORM 281
6745 #define B5G5R5X1_UNORM 282
6746 #define B5G5R5X1_UNORM_SRGB 283
6747 #define R8G8_SSCALED 284
6748 #define R8G8_USCALED 285
6749 #define R16_SSCALED 286
6750 #define R16_USCALED 287
6751 #define P8A8_UNORM_PALETTE0 290
6752 #define P8A8_UNORM_PALETTE1 291
6753 #define A1B5G5R5_UNORM 292
6754 #define A4B4G4R4_UNORM 293
6755 #define L8A8_UINT 294
6756 #define L8A8_SINT 295
6757 #define R8_UNORM 320
6758 #define R8_SNORM 321
6759 #define R8_SINT 322
6760 #define R8_UINT 323
6761 #define A8_UNORM 324
6762 #define I8_UNORM 325
6763 #define L8_UNORM 326
6764 #define P4A4_UNORM_PALETTE0 327
6765 #define A4P4_UNORM_PALETTE0 328
6766 #define R8_SSCALED 329
6767 #define R8_USCALED 330
6768 #define P8_UNORM_PALETTE0 331
6769 #define L8_UNORM_SRGB 332
6770 #define P8_UNORM_PALETTE1 333
6771 #define P4A4_UNORM_PALETTE1 334
6772 #define A4P4_UNORM_PALETTE1 335
6773 #define Y8_UNORM 336
6774 #define L8_UINT 338
6775 #define L8_SINT 339
6776 #define I8_UINT 340
6777 #define I8_SINT 341
6778 #define DXT1_RGB_SRGB 384
6779 #define R1_UNORM 385
6780 #define YCRCB_NORMAL 386
6781 #define YCRCB_SWAPUVY 387
6782 #define P2_UNORM_PALETTE0 388
6783 #define P2_UNORM_PALETTE1 389
6784 #define BC1_UNORM 390
6785 #define BC2_UNORM 391
6786 #define BC3_UNORM 392
6787 #define BC4_UNORM 393
6788 #define BC5_UNORM 394
6789 #define BC1_UNORM_SRGB 395
6790 #define BC2_UNORM_SRGB 396
6791 #define BC3_UNORM_SRGB 397
6792 #define MONO8 398
6793 #define YCRCB_SWAPUV 399
6794 #define YCRCB_SWAPY 400
6795 #define DXT1_RGB 401
6796 #define FXT1 402
6797 #define R8G8B8_UNORM 403
6798 #define R8G8B8_SNORM 404
6799 #define R8G8B8_SSCALED 405
6800 #define R8G8B8_USCALED 406
6801 #define R64G64B64A64_FLOAT 407
6802 #define R64G64B64_FLOAT 408
6803 #define BC4_SNORM 409
6804 #define BC5_SNORM 410
6805 #define R16G16B16_FLOAT 411
6806 #define R16G16B16_UNORM 412
6807 #define R16G16B16_SNORM 413
6808 #define R16G16B16_SSCALED 414
6809 #define R16G16B16_USCALED 415
6810 #define BC6H_SF16 417
6811 #define BC7_UNORM 418
6812 #define BC7_UNORM_SRGB 419
6813 #define BC6H_UF16 420
6814 #define PLANAR_420_8 421
6815 #define R8G8B8_UNORM_SRGB 424
6816 #define ETC1_RGB8 425
6817 #define ETC2_RGB8 426
6818 #define EAC_R11 427
6819 #define EAC_RG11 428
6820 #define EAC_SIGNED_R11 429
6821 #define EAC_SIGNED_RG11 430
6822 #define ETC2_SRGB8 431
6823 #define R16G16B16_UINT 432
6824 #define R16G16B16_SINT 433
6825 #define R32_SFIXED 434
6826 #define R10G10B10A2_SNORM 435
6827 #define R10G10B10A2_USCALED 436
6828 #define R10G10B10A2_SSCALED 437
6829 #define R10G10B10A2_SINT 438
6830 #define B10G10R10A2_SNORM 439
6831 #define B10G10R10A2_USCALED 440
6832 #define B10G10R10A2_SSCALED 441
6833 #define B10G10R10A2_UINT 442
6834 #define B10G10R10A2_SINT 443
6835 #define R64G64B64A64_PASSTHRU 444
6836 #define R64G64B64_PASSTHRU 445
6837 #define ETC2_RGB8_PTA 448
6838 #define ETC2_SRGB8_PTA 449
6839 #define ETC2_EAC_RGBA8 450
6840 #define ETC2_EAC_SRGB8_A8 451
6841 #define R8G8B8_UINT 456
6842 #define R8G8B8_SINT 457
6843 #define RAW 511
6844
6845 /* Enum Texture Coordinate Mode */
6846 #define TCM_WRAP 0
6847 #define TCM_MIRROR 1
6848 #define TCM_CLAMP 2
6849 #define TCM_CUBE 3
6850 #define TCM_CLAMP_BORDER 4
6851 #define TCM_MIRROR_ONCE 5
6852