src/vulkan/gen7_state.c

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <assert.h>
  25 #include <stdbool.h>
  26 #include <string.h>
  27 #include <unistd.h>
  28 #include <fcntl.h>
  29
  30 #include "anv_private.h"
  31
  32 #include "gen7_pack.h"
  33 #include "gen75_pack.h"
  34
  35 #include "genX_state_util.h"
  36
  37 VkResult
  38 genX(init_device_state)(struct anv_device *device)
  39 {
  40    struct anv_batch batch;
  41
  42    uint32_t cmds[64];
  43    batch.start = batch.next = cmds;
  44    batch.end = (void *) cmds + sizeof(cmds);
  45
  46    anv_batch_emit(&batch, GEN7_PIPELINE_SELECT,
  47                   .PipelineSelection = GPGPU);
  48
  49    anv_batch_emit(&batch, GENX(3DSTATE_VF_STATISTICS),
  50                   .StatisticsEnable = true);
  51    anv_batch_emit(&batch, GENX(3DSTATE_HS), .Enable = false);
  52    anv_batch_emit(&batch, GENX(3DSTATE_TE), .TEEnable = false);
  53    anv_batch_emit(&batch, GENX(3DSTATE_DS), .DSFunctionEnable = false);
  54    anv_batch_emit(&batch, GENX(3DSTATE_STREAMOUT), .SOFunctionEnable = false);
  55    anv_batch_emit(&batch, GEN7_3DSTATE_AA_LINE_PARAMETERS);
  56    anv_batch_emit(&batch, GENX(MI_BATCH_BUFFER_END));
  57
  58    assert(batch.next <= batch.end);
  59
  60    return anv_device_submit_simple_batch(device, &batch);
  61 }
  62
  63 GENX_FUNC(GEN7, GEN75) void
  64 genX(fill_buffer_surface_state)(void *state, enum isl_format format,
  65                                 uint32_t offset, uint32_t range,
  66                                 uint32_t stride)
  67 {
  68    uint32_t num_elements = range / stride;
  69
  70    struct GENX(RENDER_SURFACE_STATE) surface_state = {
  71       .SurfaceType                              = SURFTYPE_BUFFER,
  72       .SurfaceFormat                            = format,
  73       .SurfaceVerticalAlignment                 = VALIGN_4,
  74       .SurfaceHorizontalAlignment               = HALIGN_4,
  75       .TiledSurface                             = false,
  76       .RenderCacheReadWriteMode                 = false,
  77       .SurfaceObjectControlState                = GENX(MOCS),
  78       .Height                                   = ((num_elements - 1) >> 7) & 0x3fff,
  79       .Width                                    = (num_elements - 1) & 0x7f,
  80       .Depth                                    = ((num_elements - 1) >> 21) & 0x3f,
  81       .SurfacePitch                             = stride - 1,
  82 #  if (ANV_IS_HASWELL)
  83       .ShaderChannelSelectRed                   = SCS_RED,
  84       .ShaderChannelSelectGreen                 = SCS_GREEN,
  85       .ShaderChannelSelectBlue                  = SCS_BLUE,
  86       .ShaderChannelSelectAlpha                 = SCS_ALPHA,
  87 #  endif
  88       .SurfaceBaseAddress                       = { NULL, offset },
  89    };
  90
  91    GENX(RENDER_SURFACE_STATE_pack)(NULL, state, &surface_state);
  92 }
  93
  94 VkResult genX(CreateSampler)(
  95     VkDevice                                    _device,
  96     const VkSamplerCreateInfo*                  pCreateInfo,
  97     const VkAllocationCallbacks*                pAllocator,
  98     VkSampler*                                  pSampler)
  99 {
 100    ANV_FROM_HANDLE(anv_device, device, _device);
 101    struct anv_sampler *sampler;
 102
 103    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO);
 104
 105    sampler = anv_alloc2(&device->alloc, pAllocator, sizeof(*sampler), 8,
 106                         VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
 107    if (!sampler)
 108       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
 109
 110    struct GEN7_SAMPLER_STATE sampler_state = {
 111       .SamplerDisable = false,
 112       .TextureBorderColorMode = DX10OGL,
 113       .LODPreClampEnable = CLAMP_ENABLE_OGL,
 114       .BaseMipLevel = 0.0,
 115       .MipModeFilter = vk_to_gen_mipmap_mode[pCreateInfo->mipmapMode],
 116       .MagModeFilter = vk_to_gen_tex_filter(pCreateInfo->magFilter,
 117                                             pCreateInfo->anisotropyEnable),
 118       .MinModeFilter = vk_to_gen_tex_filter(pCreateInfo->minFilter,
 119                                             pCreateInfo->anisotropyEnable),
 120       .TextureLODBias = pCreateInfo->mipLodBias * 256,
 121       .AnisotropicAlgorithm = EWAApproximation,
 122       .MinLOD = pCreateInfo->minLod,
 123       .MaxLOD = pCreateInfo->maxLod,
 124       .ChromaKeyEnable = 0,
 125       .ChromaKeyIndex = 0,
 126       .ChromaKeyMode = 0,
 127       .ShadowFunction = vk_to_gen_compare_op[pCreateInfo->compareOp],
 128       .CubeSurfaceControlMode = OVERRIDE,
 129
 130       .BorderColorPointer =
 131          device->border_colors.offset +
 132          pCreateInfo->borderColor * sizeof(float) * 4,
 133
 134       .MaximumAnisotropy = vk_to_gen_max_anisotropy(pCreateInfo->maxAnisotropy),
 135       .RAddressMinFilterRoundingEnable = 0,
 136       .RAddressMagFilterRoundingEnable = 0,
 137       .VAddressMinFilterRoundingEnable = 0,
 138       .VAddressMagFilterRoundingEnable = 0,
 139       .UAddressMinFilterRoundingEnable = 0,
 140       .UAddressMagFilterRoundingEnable = 0,
 141       .TrilinearFilterQuality = 0,
 142       .NonnormalizedCoordinateEnable = pCreateInfo->unnormalizedCoordinates,
 143       .TCXAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressModeU],
 144       .TCYAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressModeV],
 145       .TCZAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressModeW],
 146    };
 147
 148    GEN7_SAMPLER_STATE_pack(NULL, sampler->state, &sampler_state);
 149
 150    *pSampler = anv_sampler_to_handle(sampler);
 151
 152    return VK_SUCCESS;
 153 }
 154
 155 static const uint8_t anv_halign[] = {
 156     [4] = HALIGN_4,
 157     [8] = HALIGN_8,
 158 };
 159
 160 static const uint8_t anv_valign[] = {
 161     [2] = VALIGN_2,
 162     [4] = VALIGN_4,
 163 };
 164
 165 void
 166 genX(fill_image_surface_state)(struct anv_device *device, void *state_map,
 167                                struct anv_image_view *iview,
 168                                const VkImageViewCreateInfo *pCreateInfo,
 169                                VkImageUsageFlagBits usage)
 170 {
 171    if (pCreateInfo->viewType != VK_IMAGE_VIEW_TYPE_2D)
 172       anv_finishme("non-2D image views");
 173
 174    assert(usage & (VK_IMAGE_USAGE_SAMPLED_BIT |
 175                    VK_IMAGE_USAGE_STORAGE_BIT |
 176                    VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT));
 177    assert(util_is_power_of_two(usage));
 178
 179    ANV_FROM_HANDLE(anv_image, image, pCreateInfo->image);
 180    const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
 181    bool is_storage = (usage == VK_IMAGE_USAGE_STORAGE_BIT);
 182    struct anv_surface *surface =
 183       anv_image_get_surface_for_aspect_mask(image, range->aspectMask);
 184
 185    uint32_t depth = 1;
 186    if (range->layerCount > 1) {
 187       depth = range->layerCount;
 188    } else if (image->extent.depth > 1) {
 189       depth = image->extent.depth;
 190    }
 191
 192    const struct isl_extent3d image_align_sa =
 193       isl_surf_get_image_alignment_sa(&surface->isl);
 194
 195    struct GENX(RENDER_SURFACE_STATE) template = {
 196       .SurfaceType = anv_surftype(image, pCreateInfo->viewType,
 197                                   usage == VK_IMAGE_USAGE_STORAGE_BIT),
 198       .SurfaceArray = image->array_size > 1,
 199       .SurfaceFormat = anv_surface_format(device, iview->format, is_storage),
 200       .SurfaceVerticalAlignment = anv_valign[image_align_sa.height],
 201       .SurfaceHorizontalAlignment = anv_halign[image_align_sa.width],
 202
 203       /* From bspec (DevSNB, DevIVB): "Set Tile Walk to TILEWALK_XMAJOR if
 204        * Tiled Surface is False."
 205        */
 206       .TiledSurface = surface->isl.tiling != ISL_TILING_LINEAR,
 207       .TileWalk = surface->isl.tiling == ISL_TILING_Y0 ?
 208                   TILEWALK_YMAJOR : TILEWALK_XMAJOR,
 209
 210       .VerticalLineStride = 0,
 211       .VerticalLineStrideOffset = 0,
 212
 213       .RenderCacheReadWriteMode = 0, /* TEMPLATE */
 214
 215       .Height = image->extent.height - 1,
 216       .Width = image->extent.width - 1,
 217       .Depth = depth - 1,
 218       .SurfacePitch = surface->isl.row_pitch - 1,
 219       .MinimumArrayElement = range->baseArrayLayer,
 220       .NumberofMultisamples = MULTISAMPLECOUNT_1,
 221       .XOffset = 0,
 222       .YOffset = 0,
 223
 224       .SurfaceObjectControlState = GENX(MOCS),
 225
 226       .MIPCountLOD = 0, /* TEMPLATE */
 227       .SurfaceMinLOD = 0, /* TEMPLATE */
 228
 229       .MCSEnable = false,
 230 #  if (ANV_IS_HASWELL)
 231       .ShaderChannelSelectRed = vk_to_gen_swizzle[iview->swizzle.r],
 232       .ShaderChannelSelectGreen = vk_to_gen_swizzle[iview->swizzle.g],
 233       .ShaderChannelSelectBlue = vk_to_gen_swizzle[iview->swizzle.b],
 234       .ShaderChannelSelectAlpha = vk_to_gen_swizzle[iview->swizzle.a],
 235 #  else /* XXX: Seriously? */
 236       .RedClearColor = 0,
 237       .GreenClearColor = 0,
 238       .BlueClearColor = 0,
 239       .AlphaClearColor = 0,
 240 #  endif
 241       .ResourceMinLOD = 0.0,
 242       .SurfaceBaseAddress = { NULL, iview->offset },
 243    };
 244
 245    if (usage == VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT) {
 246       /* For render target surfaces, the hardware interprets field
 247        * MIPCount/LOD as LOD. The Broadwell PRM says:
 248        *
 249        *    MIPCountLOD defines the LOD that will be rendered into.
 250        *    SurfaceMinLOD is ignored.
 251        */
 252       template.MIPCountLOD = range->baseMipLevel;
 253       template.SurfaceMinLOD = 0;
 254    } else {
 255       /* For non render target surfaces, the hardware interprets field
 256        * MIPCount/LOD as MIPCount.  The range of levels accessible by the
 257        * sampler engine is [SurfaceMinLOD, SurfaceMinLOD + MIPCountLOD].
 258        */
 259       template.SurfaceMinLOD = range->baseMipLevel;
 260       template.MIPCountLOD = MAX2(range->levelCount, 1) - 1;
 261    }
 262
 263    GENX(RENDER_SURFACE_STATE_pack)(NULL, state_map, &template);
 264 }