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Merge remote-tracking branch 'mesa-public/master' into vulkan
[mesa.git] / src / vulkan / gen8_pack.h
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24
25 /* Instructions, enums and structures for BDW.
26 *
27 * This file has been generated, do not hand edit.
28 */
29
30 #pragma once
31
32 #include <stdio.h>
33 #include <assert.h>
34
35 #ifndef __gen_validate_value
36 #define __gen_validate_value(x)
37 #endif
38
39 #ifndef __gen_field_functions
40 #define __gen_field_functions
41
42 union __gen_value {
43 float f;
44 uint32_t dw;
45 };
46
47 static inline uint64_t
48 __gen_mbo(uint32_t start, uint32_t end)
49 {
50 return (~0ul >> (64 - (end - start + 1))) << start;
51 }
52
53 static inline uint64_t
54 __gen_field(uint64_t v, uint32_t start, uint32_t end)
55 {
56 __gen_validate_value(v);
57 #if DEBUG
58 if (end - start + 1 < 64)
59 assert(v < 1ul << (end - start + 1));
60 #endif
61
62 return v << start;
63 }
64
65 static inline uint64_t
66 __gen_offset(uint64_t v, uint32_t start, uint32_t end)
67 {
68 __gen_validate_value(v);
69 #if DEBUG
70 uint64_t mask = (~0ul >> (64 - (end - start + 1))) << start;
71
72 assert((v & ~mask) == 0);
73 #endif
74
75 return v;
76 }
77
78 static inline uint32_t
79 __gen_float(float v)
80 {
81 __gen_validate_value(v);
82 return ((union __gen_value) { .f = (v) }).dw;
83 }
84
85 #ifndef __gen_address_type
86 #error #define __gen_address_type before including this file
87 #endif
88
89 #ifndef __gen_user_data
90 #error #define __gen_combine_address before including this file
91 #endif
92
93 #endif
94
95 #define GEN8_3DSTATE_URB_VS_length_bias 0x00000002
96 #define GEN8_3DSTATE_URB_VS_header \
97 .CommandType = 3, \
98 .CommandSubType = 3, \
99 ._3DCommandOpcode = 0, \
100 ._3DCommandSubOpcode = 48, \
101 .DwordLength = 0
102
103 #define GEN8_3DSTATE_URB_VS_length 0x00000002
104
105 struct GEN8_3DSTATE_URB_VS {
106 uint32_t CommandType;
107 uint32_t CommandSubType;
108 uint32_t _3DCommandOpcode;
109 uint32_t _3DCommandSubOpcode;
110 uint32_t DwordLength;
111 uint32_t VSURBStartingAddress;
112 uint32_t VSURBEntryAllocationSize;
113 uint32_t VSNumberofURBEntries;
114 };
115
116 static inline void
117 GEN8_3DSTATE_URB_VS_pack(__gen_user_data *data, void * restrict dst,
118 const struct GEN8_3DSTATE_URB_VS * restrict values)
119 {
120 uint32_t *dw = (uint32_t * restrict) dst;
121
122 dw[0] =
123 __gen_field(values->CommandType, 29, 31) |
124 __gen_field(values->CommandSubType, 27, 28) |
125 __gen_field(values->_3DCommandOpcode, 24, 26) |
126 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
127 __gen_field(values->DwordLength, 0, 7) |
128 0;
129
130 dw[1] =
131 __gen_field(values->VSURBStartingAddress, 25, 31) |
132 __gen_field(values->VSURBEntryAllocationSize, 16, 24) |
133 __gen_field(values->VSNumberofURBEntries, 0, 15) |
134 0;
135
136 }
137
138 #define GEN8_3DSTATE_VS_length_bias 0x00000002
139 #define GEN8_3DSTATE_VS_header \
140 .CommandType = 3, \
141 .CommandSubType = 3, \
142 ._3DCommandOpcode = 0, \
143 ._3DCommandSubOpcode = 16, \
144 .DwordLength = 7
145
146 #define GEN8_3DSTATE_VS_length 0x00000009
147
148 struct GEN8_3DSTATE_VS {
149 uint32_t CommandType;
150 uint32_t CommandSubType;
151 uint32_t _3DCommandOpcode;
152 uint32_t _3DCommandSubOpcode;
153 uint32_t DwordLength;
154 uint64_t KernelStartPointer;
155 #define Multiple 0
156 #define Single 1
157 uint32_t SingleVertexDispatch;
158 #define Dmask 0
159 #define Vmask 1
160 uint32_t VectorMaskEnable;
161 #define NoSamplers 0
162 #define _14Samplers 1
163 #define _58Samplers 2
164 #define _912Samplers 3
165 #define _1316Samplers 4
166 uint32_t SamplerCount;
167 uint32_t BindingTableEntryCount;
168 #define Normal 0
169 #define High 1
170 uint32_t ThreadDispatchPriority;
171 #define IEEE754 0
172 #define Alternate 1
173 uint32_t FloatingPointMode;
174 bool IllegalOpcodeExceptionEnable;
175 bool AccessesUAV;
176 bool SoftwareExceptionEnable;
177 uint64_t ScratchSpaceBasePointer;
178 uint32_t PerThreadScratchSpace;
179 uint32_t DispatchGRFStartRegisterForURBData;
180 uint32_t VertexURBEntryReadLength;
181 uint32_t VertexURBEntryReadOffset;
182 uint32_t MaximumNumberofThreads;
183 bool StatisticsEnable;
184 bool SIMD8DispatchEnable;
185 bool VertexCacheDisable;
186 bool FunctionEnable;
187 uint32_t VertexURBEntryOutputReadOffset;
188 uint32_t VertexURBEntryOutputLength;
189 uint32_t UserClipDistanceClipTestEnableBitmask;
190 uint32_t UserClipDistanceCullTestEnableBitmask;
191 };
192
193 static inline void
194 GEN8_3DSTATE_VS_pack(__gen_user_data *data, void * restrict dst,
195 const struct GEN8_3DSTATE_VS * restrict values)
196 {
197 uint32_t *dw = (uint32_t * restrict) dst;
198
199 dw[0] =
200 __gen_field(values->CommandType, 29, 31) |
201 __gen_field(values->CommandSubType, 27, 28) |
202 __gen_field(values->_3DCommandOpcode, 24, 26) |
203 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
204 __gen_field(values->DwordLength, 0, 7) |
205 0;
206
207 uint64_t qw1 =
208 __gen_offset(values->KernelStartPointer, 6, 63) |
209 0;
210
211 dw[1] = qw1;
212 dw[2] = qw1 >> 32;
213
214 dw[3] =
215 __gen_field(values->SingleVertexDispatch, 31, 31) |
216 __gen_field(values->VectorMaskEnable, 30, 30) |
217 __gen_field(values->SamplerCount, 27, 29) |
218 __gen_field(values->BindingTableEntryCount, 18, 25) |
219 __gen_field(values->ThreadDispatchPriority, 17, 17) |
220 __gen_field(values->FloatingPointMode, 16, 16) |
221 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
222 __gen_field(values->AccessesUAV, 12, 12) |
223 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
224 0;
225
226 uint64_t qw4 =
227 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
228 __gen_field(values->PerThreadScratchSpace, 0, 3) |
229 0;
230
231 dw[4] = qw4;
232 dw[5] = qw4 >> 32;
233
234 dw[6] =
235 __gen_field(values->DispatchGRFStartRegisterForURBData, 20, 24) |
236 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
237 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
238 0;
239
240 dw[7] =
241 __gen_field(values->MaximumNumberofThreads, 23, 31) |
242 __gen_field(values->StatisticsEnable, 10, 10) |
243 __gen_field(values->SIMD8DispatchEnable, 2, 2) |
244 __gen_field(values->VertexCacheDisable, 1, 1) |
245 __gen_field(values->FunctionEnable, 0, 0) |
246 0;
247
248 dw[8] =
249 __gen_field(values->VertexURBEntryOutputReadOffset, 21, 26) |
250 __gen_field(values->VertexURBEntryOutputLength, 16, 20) |
251 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 8, 15) |
252 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
253 0;
254
255 }
256
257 #define GEN8_GPGPU_CSR_BASE_ADDRESS_length_bias 0x00000002
258 #define GEN8_GPGPU_CSR_BASE_ADDRESS_header \
259 .CommandType = 3, \
260 .CommandSubType = 0, \
261 ._3DCommandOpcode = 1, \
262 ._3DCommandSubOpcode = 4, \
263 .DwordLength = 1
264
265 #define GEN8_GPGPU_CSR_BASE_ADDRESS_length 0x00000003
266
267 struct GEN8_GPGPU_CSR_BASE_ADDRESS {
268 uint32_t CommandType;
269 uint32_t CommandSubType;
270 uint32_t _3DCommandOpcode;
271 uint32_t _3DCommandSubOpcode;
272 uint32_t DwordLength;
273 __gen_address_type GPGPUCSRBaseAddress;
274 };
275
276 static inline void
277 GEN8_GPGPU_CSR_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
278 const struct GEN8_GPGPU_CSR_BASE_ADDRESS * restrict values)
279 {
280 uint32_t *dw = (uint32_t * restrict) dst;
281
282 dw[0] =
283 __gen_field(values->CommandType, 29, 31) |
284 __gen_field(values->CommandSubType, 27, 28) |
285 __gen_field(values->_3DCommandOpcode, 24, 26) |
286 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
287 __gen_field(values->DwordLength, 0, 7) |
288 0;
289
290 uint32_t dw1 =
291 0;
292
293 uint64_t qw1 =
294 __gen_combine_address(data, &dw[1], values->GPGPUCSRBaseAddress, dw1);
295
296 dw[1] = qw1;
297 dw[2] = qw1 >> 32;
298
299 }
300
301 #define GEN8_MI_ATOMIC_length_bias 0x00000002
302 #define GEN8_MI_ATOMIC_header \
303 .CommandType = 0, \
304 .MICommandOpcode = 47
305
306 #define GEN8_MI_ATOMIC_length 0x00000003
307
308 struct GEN8_MI_ATOMIC {
309 uint32_t CommandType;
310 uint32_t MICommandOpcode;
311 #define PerProcessGraphicsAddress 0
312 #define GlobalGraphicsAddress 1
313 uint32_t MemoryType;
314 uint32_t PostSyncOperation;
315 #define DWORD 0
316 #define QWORD 1
317 #define OCTWORD 2
318 #define RESERVED 3
319 uint32_t DataSize;
320 uint32_t InlineData;
321 uint32_t CSSTALL;
322 uint32_t ReturnDataControl;
323 uint32_t ATOMICOPCODE;
324 uint32_t DwordLength;
325 __gen_address_type MemoryAddress;
326 uint32_t Operand1DataDword0;
327 uint32_t Operand2DataDword0;
328 uint32_t Operand1DataDword1;
329 uint32_t Operand2DataDword1;
330 uint32_t Operand1DataDword2;
331 uint32_t Operand2DataDword2;
332 uint32_t Operand1DataDword3;
333 uint32_t Operand2DataDword3;
334 };
335
336 static inline void
337 GEN8_MI_ATOMIC_pack(__gen_user_data *data, void * restrict dst,
338 const struct GEN8_MI_ATOMIC * restrict values)
339 {
340 uint32_t *dw = (uint32_t * restrict) dst;
341
342 dw[0] =
343 __gen_field(values->CommandType, 29, 31) |
344 __gen_field(values->MICommandOpcode, 23, 28) |
345 __gen_field(values->MemoryType, 22, 22) |
346 __gen_field(values->PostSyncOperation, 21, 21) |
347 __gen_field(values->DataSize, 19, 20) |
348 __gen_field(values->InlineData, 18, 18) |
349 __gen_field(values->CSSTALL, 17, 17) |
350 __gen_field(values->ReturnDataControl, 16, 16) |
351 __gen_field(values->ATOMICOPCODE, 8, 15) |
352 __gen_field(values->DwordLength, 0, 7) |
353 0;
354
355 uint32_t dw1 =
356 0;
357
358 uint64_t qw1 =
359 __gen_combine_address(data, &dw[1], values->MemoryAddress, dw1);
360
361 dw[1] = qw1;
362 dw[2] = qw1 >> 32;
363
364 dw[3] =
365 __gen_field(values->Operand1DataDword0, 0, 31) |
366 0;
367
368 dw[4] =
369 __gen_field(values->Operand2DataDword0, 0, 31) |
370 0;
371
372 dw[5] =
373 __gen_field(values->Operand1DataDword1, 0, 31) |
374 0;
375
376 dw[6] =
377 __gen_field(values->Operand2DataDword1, 0, 31) |
378 0;
379
380 dw[7] =
381 __gen_field(values->Operand1DataDword2, 0, 31) |
382 0;
383
384 dw[8] =
385 __gen_field(values->Operand2DataDword2, 0, 31) |
386 0;
387
388 dw[9] =
389 __gen_field(values->Operand1DataDword3, 0, 31) |
390 0;
391
392 dw[10] =
393 __gen_field(values->Operand2DataDword3, 0, 31) |
394 0;
395
396 }
397
398 #define GEN8_MI_LOAD_REGISTER_REG_length_bias 0x00000002
399 #define GEN8_MI_LOAD_REGISTER_REG_header \
400 .CommandType = 0, \
401 .MICommandOpcode = 42, \
402 .DwordLength = 1
403
404 #define GEN8_MI_LOAD_REGISTER_REG_length 0x00000003
405
406 struct GEN8_MI_LOAD_REGISTER_REG {
407 uint32_t CommandType;
408 uint32_t MICommandOpcode;
409 uint32_t DwordLength;
410 uint32_t SourceRegisterAddress;
411 uint32_t DestinationRegisterAddress;
412 };
413
414 static inline void
415 GEN8_MI_LOAD_REGISTER_REG_pack(__gen_user_data *data, void * restrict dst,
416 const struct GEN8_MI_LOAD_REGISTER_REG * restrict values)
417 {
418 uint32_t *dw = (uint32_t * restrict) dst;
419
420 dw[0] =
421 __gen_field(values->CommandType, 29, 31) |
422 __gen_field(values->MICommandOpcode, 23, 28) |
423 __gen_field(values->DwordLength, 0, 7) |
424 0;
425
426 dw[1] =
427 __gen_offset(values->SourceRegisterAddress, 2, 22) |
428 0;
429
430 dw[2] =
431 __gen_offset(values->DestinationRegisterAddress, 2, 22) |
432 0;
433
434 }
435
436 #define GEN8_MI_SEMAPHORE_SIGNAL_length_bias 0x00000002
437 #define GEN8_MI_SEMAPHORE_SIGNAL_header \
438 .CommandType = 0, \
439 .MICommandOpcode = 27, \
440 .DwordLength = 0
441
442 #define GEN8_MI_SEMAPHORE_SIGNAL_length 0x00000002
443
444 struct GEN8_MI_SEMAPHORE_SIGNAL {
445 uint32_t CommandType;
446 uint32_t MICommandOpcode;
447 uint32_t PostSyncOperation;
448 #define RCS 0
449 #define VCS0 1
450 #define BCS 2
451 #define VECS 3
452 #define VCS1 4
453 uint32_t TargetEngineSelect;
454 uint32_t DwordLength;
455 uint32_t TargetContextID;
456 };
457
458 static inline void
459 GEN8_MI_SEMAPHORE_SIGNAL_pack(__gen_user_data *data, void * restrict dst,
460 const struct GEN8_MI_SEMAPHORE_SIGNAL * restrict values)
461 {
462 uint32_t *dw = (uint32_t * restrict) dst;
463
464 dw[0] =
465 __gen_field(values->CommandType, 29, 31) |
466 __gen_field(values->MICommandOpcode, 23, 28) |
467 __gen_field(values->PostSyncOperation, 21, 21) |
468 __gen_field(values->TargetEngineSelect, 15, 17) |
469 __gen_field(values->DwordLength, 0, 7) |
470 0;
471
472 dw[1] =
473 __gen_field(values->TargetContextID, 0, 31) |
474 0;
475
476 }
477
478 #define GEN8_MI_SEMAPHORE_WAIT_length_bias 0x00000002
479 #define GEN8_MI_SEMAPHORE_WAIT_header \
480 .CommandType = 0, \
481 .MICommandOpcode = 28, \
482 .DwordLength = 2
483
484 #define GEN8_MI_SEMAPHORE_WAIT_length 0x00000004
485
486 struct GEN8_MI_SEMAPHORE_WAIT {
487 uint32_t CommandType;
488 uint32_t MICommandOpcode;
489 #define PerProcessGraphicsAddress 0
490 #define GlobalGraphicsAddress 1
491 uint32_t MemoryType;
492 #define PollingMode 1
493 #define SignalMode 0
494 uint32_t WaitMode;
495 #define SAD_GREATER_THAN_SDD 0
496 #define SAD_GREATER_THAN_OR_EQUAL_SDD 1
497 #define SAD_LESS_THAN_SDD 2
498 #define SAD_LESS_THAN_OR_EQUAL_SDD 3
499 #define SAD_EQUAL_SDD 4
500 #define SAD_NOT_EQUAL_SDD 5
501 uint32_t CompareOperation;
502 uint32_t DwordLength;
503 uint32_t SemaphoreDataDword;
504 __gen_address_type SemaphoreAddress;
505 };
506
507 static inline void
508 GEN8_MI_SEMAPHORE_WAIT_pack(__gen_user_data *data, void * restrict dst,
509 const struct GEN8_MI_SEMAPHORE_WAIT * restrict values)
510 {
511 uint32_t *dw = (uint32_t * restrict) dst;
512
513 dw[0] =
514 __gen_field(values->CommandType, 29, 31) |
515 __gen_field(values->MICommandOpcode, 23, 28) |
516 __gen_field(values->MemoryType, 22, 22) |
517 __gen_field(values->WaitMode, 15, 15) |
518 __gen_field(values->CompareOperation, 12, 14) |
519 __gen_field(values->DwordLength, 0, 7) |
520 0;
521
522 dw[1] =
523 __gen_field(values->SemaphoreDataDword, 0, 31) |
524 0;
525
526 uint32_t dw2 =
527 0;
528
529 uint64_t qw2 =
530 __gen_combine_address(data, &dw[2], values->SemaphoreAddress, dw2);
531
532 dw[2] = qw2;
533 dw[3] = qw2 >> 32;
534
535 }
536
537 #define GEN8_MI_STORE_REGISTER_MEM_length_bias 0x00000002
538 #define GEN8_MI_STORE_REGISTER_MEM_header \
539 .CommandType = 0, \
540 .MICommandOpcode = 36, \
541 .DwordLength = 2
542
543 #define GEN8_MI_STORE_REGISTER_MEM_length 0x00000004
544
545 struct GEN8_MI_STORE_REGISTER_MEM {
546 uint32_t CommandType;
547 uint32_t MICommandOpcode;
548 bool UseGlobalGTT;
549 uint32_t PredicateEnable;
550 uint32_t DwordLength;
551 uint32_t RegisterAddress;
552 __gen_address_type MemoryAddress;
553 };
554
555 static inline void
556 GEN8_MI_STORE_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
557 const struct GEN8_MI_STORE_REGISTER_MEM * restrict values)
558 {
559 uint32_t *dw = (uint32_t * restrict) dst;
560
561 dw[0] =
562 __gen_field(values->CommandType, 29, 31) |
563 __gen_field(values->MICommandOpcode, 23, 28) |
564 __gen_field(values->UseGlobalGTT, 22, 22) |
565 __gen_field(values->PredicateEnable, 21, 21) |
566 __gen_field(values->DwordLength, 0, 7) |
567 0;
568
569 dw[1] =
570 __gen_offset(values->RegisterAddress, 2, 22) |
571 0;
572
573 uint32_t dw2 =
574 0;
575
576 uint64_t qw2 =
577 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
578
579 dw[2] = qw2;
580 dw[3] = qw2 >> 32;
581
582 }
583
584 #define GEN8_PIPELINE_SELECT_length_bias 0x00000001
585 #define GEN8_PIPELINE_SELECT_header \
586 .CommandType = 3, \
587 .CommandSubType = 1, \
588 ._3DCommandOpcode = 1, \
589 ._3DCommandSubOpcode = 4
590
591 #define GEN8_PIPELINE_SELECT_length 0x00000001
592
593 struct GEN8_PIPELINE_SELECT {
594 uint32_t CommandType;
595 uint32_t CommandSubType;
596 uint32_t _3DCommandOpcode;
597 uint32_t _3DCommandSubOpcode;
598 #define _3D 0
599 #define Media 1
600 #define GPGPU 2
601 uint32_t PipelineSelection;
602 };
603
604 static inline void
605 GEN8_PIPELINE_SELECT_pack(__gen_user_data *data, void * restrict dst,
606 const struct GEN8_PIPELINE_SELECT * restrict values)
607 {
608 uint32_t *dw = (uint32_t * restrict) dst;
609
610 dw[0] =
611 __gen_field(values->CommandType, 29, 31) |
612 __gen_field(values->CommandSubType, 27, 28) |
613 __gen_field(values->_3DCommandOpcode, 24, 26) |
614 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
615 __gen_field(values->PipelineSelection, 0, 1) |
616 0;
617
618 }
619
620 #define GEN8_STATE_BASE_ADDRESS_length_bias 0x00000002
621 #define GEN8_STATE_BASE_ADDRESS_header \
622 .CommandType = 3, \
623 .CommandSubType = 0, \
624 ._3DCommandOpcode = 1, \
625 ._3DCommandSubOpcode = 1, \
626 .DwordLength = 14
627
628 #define GEN8_STATE_BASE_ADDRESS_length 0x00000010
629
630 #define GEN8_MEMORY_OBJECT_CONTROL_STATE_length 0x00000001
631
632 struct GEN8_MEMORY_OBJECT_CONTROL_STATE {
633 #define UCwithFenceifcoherentcycle 0
634 #define UCUncacheable 1
635 #define WT 2
636 #define WB 3
637 uint32_t MemoryTypeLLCeLLCCacheabilityControl;
638 #define eLLCOnlywheneDRAMispresentelsegetsallocatedinLLC 0
639 #define LLCOnly 1
640 #define LLCeLLCAllowed 2
641 #define L3DefertoPATforLLCeLLCselection 3
642 uint32_t TargetCache;
643 uint32_t AgeforQUADLRU;
644 };
645
646 static inline void
647 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(__gen_user_data *data, void * restrict dst,
648 const struct GEN8_MEMORY_OBJECT_CONTROL_STATE * restrict values)
649 {
650 uint32_t *dw = (uint32_t * restrict) dst;
651
652 dw[0] =
653 __gen_field(values->MemoryTypeLLCeLLCCacheabilityControl, 5, 6) |
654 __gen_field(values->TargetCache, 3, 4) |
655 __gen_field(values->AgeforQUADLRU, 0, 1) |
656 0;
657
658 }
659
660 struct GEN8_STATE_BASE_ADDRESS {
661 uint32_t CommandType;
662 uint32_t CommandSubType;
663 uint32_t _3DCommandOpcode;
664 uint32_t _3DCommandSubOpcode;
665 uint32_t DwordLength;
666 __gen_address_type GeneralStateBaseAddress;
667 struct GEN8_MEMORY_OBJECT_CONTROL_STATE GeneralStateMemoryObjectControlState;
668 bool GeneralStateBaseAddressModifyEnable;
669 struct GEN8_MEMORY_OBJECT_CONTROL_STATE StatelessDataPortAccessMemoryObjectControlState;
670 __gen_address_type SurfaceStateBaseAddress;
671 struct GEN8_MEMORY_OBJECT_CONTROL_STATE SurfaceStateMemoryObjectControlState;
672 bool SurfaceStateBaseAddressModifyEnable;
673 __gen_address_type DynamicStateBaseAddress;
674 struct GEN8_MEMORY_OBJECT_CONTROL_STATE DynamicStateMemoryObjectControlState;
675 bool DynamicStateBaseAddressModifyEnable;
676 __gen_address_type IndirectObjectBaseAddress;
677 struct GEN8_MEMORY_OBJECT_CONTROL_STATE IndirectObjectMemoryObjectControlState;
678 bool IndirectObjectBaseAddressModifyEnable;
679 __gen_address_type InstructionBaseAddress;
680 struct GEN8_MEMORY_OBJECT_CONTROL_STATE InstructionMemoryObjectControlState;
681 bool InstructionBaseAddressModifyEnable;
682 uint32_t GeneralStateBufferSize;
683 bool GeneralStateBufferSizeModifyEnable;
684 uint32_t DynamicStateBufferSize;
685 bool DynamicStateBufferSizeModifyEnable;
686 uint32_t IndirectObjectBufferSize;
687 bool IndirectObjectBufferSizeModifyEnable;
688 uint32_t InstructionBufferSize;
689 bool InstructionBuffersizeModifyEnable;
690 };
691
692 static inline void
693 GEN8_STATE_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
694 const struct GEN8_STATE_BASE_ADDRESS * restrict values)
695 {
696 uint32_t *dw = (uint32_t * restrict) dst;
697
698 dw[0] =
699 __gen_field(values->CommandType, 29, 31) |
700 __gen_field(values->CommandSubType, 27, 28) |
701 __gen_field(values->_3DCommandOpcode, 24, 26) |
702 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
703 __gen_field(values->DwordLength, 0, 7) |
704 0;
705
706 uint32_t dw_GeneralStateMemoryObjectControlState;
707 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_GeneralStateMemoryObjectControlState, &values->GeneralStateMemoryObjectControlState);
708 uint32_t dw1 =
709 __gen_field(dw_GeneralStateMemoryObjectControlState, 4, 10) |
710 __gen_field(values->GeneralStateBaseAddressModifyEnable, 0, 0) |
711 0;
712
713 uint64_t qw1 =
714 __gen_combine_address(data, &dw[1], values->GeneralStateBaseAddress, dw1);
715
716 dw[1] = qw1;
717 dw[2] = qw1 >> 32;
718
719 uint32_t dw_StatelessDataPortAccessMemoryObjectControlState;
720 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StatelessDataPortAccessMemoryObjectControlState, &values->StatelessDataPortAccessMemoryObjectControlState);
721 dw[3] =
722 __gen_field(dw_StatelessDataPortAccessMemoryObjectControlState, 16, 22) |
723 0;
724
725 uint32_t dw_SurfaceStateMemoryObjectControlState;
726 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceStateMemoryObjectControlState, &values->SurfaceStateMemoryObjectControlState);
727 uint32_t dw4 =
728 __gen_field(dw_SurfaceStateMemoryObjectControlState, 4, 10) |
729 __gen_field(values->SurfaceStateBaseAddressModifyEnable, 0, 0) |
730 0;
731
732 uint64_t qw4 =
733 __gen_combine_address(data, &dw[4], values->SurfaceStateBaseAddress, dw4);
734
735 dw[4] = qw4;
736 dw[5] = qw4 >> 32;
737
738 uint32_t dw_DynamicStateMemoryObjectControlState;
739 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DynamicStateMemoryObjectControlState, &values->DynamicStateMemoryObjectControlState);
740 uint32_t dw6 =
741 __gen_field(dw_DynamicStateMemoryObjectControlState, 4, 10) |
742 __gen_field(values->DynamicStateBaseAddressModifyEnable, 0, 0) |
743 0;
744
745 uint64_t qw6 =
746 __gen_combine_address(data, &dw[6], values->DynamicStateBaseAddress, dw6);
747
748 dw[6] = qw6;
749 dw[7] = qw6 >> 32;
750
751 uint32_t dw_IndirectObjectMemoryObjectControlState;
752 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_IndirectObjectMemoryObjectControlState, &values->IndirectObjectMemoryObjectControlState);
753 uint32_t dw8 =
754 __gen_field(dw_IndirectObjectMemoryObjectControlState, 4, 10) |
755 __gen_field(values->IndirectObjectBaseAddressModifyEnable, 0, 0) |
756 0;
757
758 uint64_t qw8 =
759 __gen_combine_address(data, &dw[8], values->IndirectObjectBaseAddress, dw8);
760
761 dw[8] = qw8;
762 dw[9] = qw8 >> 32;
763
764 uint32_t dw_InstructionMemoryObjectControlState;
765 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_InstructionMemoryObjectControlState, &values->InstructionMemoryObjectControlState);
766 uint32_t dw10 =
767 __gen_field(dw_InstructionMemoryObjectControlState, 4, 10) |
768 __gen_field(values->InstructionBaseAddressModifyEnable, 0, 0) |
769 0;
770
771 uint64_t qw10 =
772 __gen_combine_address(data, &dw[10], values->InstructionBaseAddress, dw10);
773
774 dw[10] = qw10;
775 dw[11] = qw10 >> 32;
776
777 dw[12] =
778 __gen_field(values->GeneralStateBufferSize, 12, 31) |
779 __gen_field(values->GeneralStateBufferSizeModifyEnable, 0, 0) |
780 0;
781
782 dw[13] =
783 __gen_field(values->DynamicStateBufferSize, 12, 31) |
784 __gen_field(values->DynamicStateBufferSizeModifyEnable, 0, 0) |
785 0;
786
787 dw[14] =
788 __gen_field(values->IndirectObjectBufferSize, 12, 31) |
789 __gen_field(values->IndirectObjectBufferSizeModifyEnable, 0, 0) |
790 0;
791
792 dw[15] =
793 __gen_field(values->InstructionBufferSize, 12, 31) |
794 __gen_field(values->InstructionBuffersizeModifyEnable, 0, 0) |
795 0;
796
797 }
798
799 #define GEN8_STATE_PREFETCH_length_bias 0x00000002
800 #define GEN8_STATE_PREFETCH_header \
801 .CommandType = 3, \
802 .CommandSubType = 0, \
803 ._3DCommandOpcode = 0, \
804 ._3DCommandSubOpcode = 3, \
805 .DwordLength = 0
806
807 #define GEN8_STATE_PREFETCH_length 0x00000002
808
809 struct GEN8_STATE_PREFETCH {
810 uint32_t CommandType;
811 uint32_t CommandSubType;
812 uint32_t _3DCommandOpcode;
813 uint32_t _3DCommandSubOpcode;
814 uint32_t DwordLength;
815 __gen_address_type PrefetchPointer;
816 uint32_t PrefetchCount;
817 };
818
819 static inline void
820 GEN8_STATE_PREFETCH_pack(__gen_user_data *data, void * restrict dst,
821 const struct GEN8_STATE_PREFETCH * restrict values)
822 {
823 uint32_t *dw = (uint32_t * restrict) dst;
824
825 dw[0] =
826 __gen_field(values->CommandType, 29, 31) |
827 __gen_field(values->CommandSubType, 27, 28) |
828 __gen_field(values->_3DCommandOpcode, 24, 26) |
829 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
830 __gen_field(values->DwordLength, 0, 7) |
831 0;
832
833 uint32_t dw1 =
834 __gen_field(values->PrefetchCount, 0, 2) |
835 0;
836
837 dw[1] =
838 __gen_combine_address(data, &dw[1], values->PrefetchPointer, dw1);
839
840 }
841
842 #define GEN8_STATE_SIP_length_bias 0x00000002
843 #define GEN8_STATE_SIP_header \
844 .CommandType = 3, \
845 .CommandSubType = 0, \
846 ._3DCommandOpcode = 1, \
847 ._3DCommandSubOpcode = 2, \
848 .DwordLength = 1
849
850 #define GEN8_STATE_SIP_length 0x00000003
851
852 struct GEN8_STATE_SIP {
853 uint32_t CommandType;
854 uint32_t CommandSubType;
855 uint32_t _3DCommandOpcode;
856 uint32_t _3DCommandSubOpcode;
857 uint32_t DwordLength;
858 uint64_t SystemInstructionPointer;
859 };
860
861 static inline void
862 GEN8_STATE_SIP_pack(__gen_user_data *data, void * restrict dst,
863 const struct GEN8_STATE_SIP * restrict values)
864 {
865 uint32_t *dw = (uint32_t * restrict) dst;
866
867 dw[0] =
868 __gen_field(values->CommandType, 29, 31) |
869 __gen_field(values->CommandSubType, 27, 28) |
870 __gen_field(values->_3DCommandOpcode, 24, 26) |
871 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
872 __gen_field(values->DwordLength, 0, 7) |
873 0;
874
875 uint64_t qw1 =
876 __gen_offset(values->SystemInstructionPointer, 4, 63) |
877 0;
878
879 dw[1] = qw1;
880 dw[2] = qw1 >> 32;
881
882 }
883
884 #define GEN8_SWTESS_BASE_ADDRESS_length_bias 0x00000002
885 #define GEN8_SWTESS_BASE_ADDRESS_header \
886 .CommandType = 3, \
887 .CommandSubType = 0, \
888 ._3DCommandOpcode = 1, \
889 ._3DCommandSubOpcode = 3, \
890 .DwordLength = 0
891
892 #define GEN8_SWTESS_BASE_ADDRESS_length 0x00000002
893
894 struct GEN8_SWTESS_BASE_ADDRESS {
895 uint32_t CommandType;
896 uint32_t CommandSubType;
897 uint32_t _3DCommandOpcode;
898 uint32_t _3DCommandSubOpcode;
899 uint32_t DwordLength;
900 __gen_address_type SWTessellationBaseAddress;
901 struct GEN8_MEMORY_OBJECT_CONTROL_STATE SWTessellationMemoryObjectControlState;
902 };
903
904 static inline void
905 GEN8_SWTESS_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
906 const struct GEN8_SWTESS_BASE_ADDRESS * restrict values)
907 {
908 uint32_t *dw = (uint32_t * restrict) dst;
909
910 dw[0] =
911 __gen_field(values->CommandType, 29, 31) |
912 __gen_field(values->CommandSubType, 27, 28) |
913 __gen_field(values->_3DCommandOpcode, 24, 26) |
914 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
915 __gen_field(values->DwordLength, 0, 7) |
916 0;
917
918 uint32_t dw_SWTessellationMemoryObjectControlState;
919 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SWTessellationMemoryObjectControlState, &values->SWTessellationMemoryObjectControlState);
920 uint32_t dw1 =
921 __gen_field(dw_SWTessellationMemoryObjectControlState, 8, 11) |
922 0;
923
924 uint64_t qw1 =
925 __gen_combine_address(data, &dw[1], values->SWTessellationBaseAddress, dw1);
926
927 dw[1] = qw1;
928 dw[2] = qw1 >> 32;
929
930 }
931
932 #define GEN8_3DPRIMITIVE_length_bias 0x00000002
933 #define GEN8_3DPRIMITIVE_header \
934 .CommandType = 3, \
935 .CommandSubType = 3, \
936 ._3DCommandOpcode = 3, \
937 ._3DCommandSubOpcode = 0, \
938 .DwordLength = 5
939
940 #define GEN8_3DPRIMITIVE_length 0x00000007
941
942 struct GEN8_3DPRIMITIVE {
943 uint32_t CommandType;
944 uint32_t CommandSubType;
945 uint32_t _3DCommandOpcode;
946 uint32_t _3DCommandSubOpcode;
947 bool IndirectParameterEnable;
948 uint32_t UAVCoherencyRequired;
949 bool PredicateEnable;
950 uint32_t DwordLength;
951 bool EndOffsetEnable;
952 #define SEQUENTIAL 0
953 #define RANDOM 1
954 uint32_t VertexAccessType;
955 uint32_t PrimitiveTopologyType;
956 uint32_t VertexCountPerInstance;
957 uint32_t StartVertexLocation;
958 uint32_t InstanceCount;
959 uint32_t StartInstanceLocation;
960 uint32_t BaseVertexLocation;
961 };
962
963 static inline void
964 GEN8_3DPRIMITIVE_pack(__gen_user_data *data, void * restrict dst,
965 const struct GEN8_3DPRIMITIVE * restrict values)
966 {
967 uint32_t *dw = (uint32_t * restrict) dst;
968
969 dw[0] =
970 __gen_field(values->CommandType, 29, 31) |
971 __gen_field(values->CommandSubType, 27, 28) |
972 __gen_field(values->_3DCommandOpcode, 24, 26) |
973 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
974 __gen_field(values->IndirectParameterEnable, 10, 10) |
975 __gen_field(values->UAVCoherencyRequired, 9, 9) |
976 __gen_field(values->PredicateEnable, 8, 8) |
977 __gen_field(values->DwordLength, 0, 7) |
978 0;
979
980 dw[1] =
981 __gen_field(values->EndOffsetEnable, 9, 9) |
982 __gen_field(values->VertexAccessType, 8, 8) |
983 __gen_field(values->PrimitiveTopologyType, 0, 5) |
984 0;
985
986 dw[2] =
987 __gen_field(values->VertexCountPerInstance, 0, 31) |
988 0;
989
990 dw[3] =
991 __gen_field(values->StartVertexLocation, 0, 31) |
992 0;
993
994 dw[4] =
995 __gen_field(values->InstanceCount, 0, 31) |
996 0;
997
998 dw[5] =
999 __gen_field(values->StartInstanceLocation, 0, 31) |
1000 0;
1001
1002 dw[6] =
1003 __gen_field(values->BaseVertexLocation, 0, 31) |
1004 0;
1005
1006 }
1007
1008 #define GEN8_3DSTATE_AA_LINE_PARAMETERS_length_bias 0x00000002
1009 #define GEN8_3DSTATE_AA_LINE_PARAMETERS_header \
1010 .CommandType = 3, \
1011 .CommandSubType = 3, \
1012 ._3DCommandOpcode = 1, \
1013 ._3DCommandSubOpcode = 10, \
1014 .DwordLength = 1
1015
1016 #define GEN8_3DSTATE_AA_LINE_PARAMETERS_length 0x00000003
1017
1018 struct GEN8_3DSTATE_AA_LINE_PARAMETERS {
1019 uint32_t CommandType;
1020 uint32_t CommandSubType;
1021 uint32_t _3DCommandOpcode;
1022 uint32_t _3DCommandSubOpcode;
1023 uint32_t DwordLength;
1024 float AAPointCoverageBias;
1025 float AACoverageBias;
1026 float AAPointCoverageSlope;
1027 float AACoverageSlope;
1028 float AAPointCoverageEndCapBias;
1029 float AACoverageEndCapBias;
1030 float AAPointCoverageEndCapSlope;
1031 float AACoverageEndCapSlope;
1032 };
1033
1034 static inline void
1035 GEN8_3DSTATE_AA_LINE_PARAMETERS_pack(__gen_user_data *data, void * restrict dst,
1036 const struct GEN8_3DSTATE_AA_LINE_PARAMETERS * restrict values)
1037 {
1038 uint32_t *dw = (uint32_t * restrict) dst;
1039
1040 dw[0] =
1041 __gen_field(values->CommandType, 29, 31) |
1042 __gen_field(values->CommandSubType, 27, 28) |
1043 __gen_field(values->_3DCommandOpcode, 24, 26) |
1044 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1045 __gen_field(values->DwordLength, 0, 7) |
1046 0;
1047
1048 dw[1] =
1049 __gen_field(values->AAPointCoverageBias * (1 << 8), 24, 31) |
1050 __gen_field(values->AACoverageBias * (1 << 8), 16, 23) |
1051 __gen_field(values->AAPointCoverageSlope * (1 << 8), 8, 15) |
1052 __gen_field(values->AACoverageSlope * (1 << 8), 0, 7) |
1053 0;
1054
1055 dw[2] =
1056 __gen_field(values->AAPointCoverageEndCapBias * (1 << 8), 24, 31) |
1057 __gen_field(values->AACoverageEndCapBias * (1 << 8), 16, 23) |
1058 __gen_field(values->AAPointCoverageEndCapSlope * (1 << 8), 8, 15) |
1059 __gen_field(values->AACoverageEndCapSlope * (1 << 8), 0, 7) |
1060 0;
1061
1062 }
1063
1064 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_length_bias 0x00000002
1065 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_header\
1066 .CommandType = 3, \
1067 .CommandSubType = 3, \
1068 ._3DCommandOpcode = 0, \
1069 ._3DCommandSubOpcode = 70
1070
1071 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_length 0x00000000
1072
1073 #define GEN8_BINDING_TABLE_EDIT_ENTRY_length 0x00000001
1074
1075 struct GEN8_BINDING_TABLE_EDIT_ENTRY {
1076 uint32_t BindingTableIndex;
1077 uint32_t SurfaceStatePointer;
1078 };
1079
1080 static inline void
1081 GEN8_BINDING_TABLE_EDIT_ENTRY_pack(__gen_user_data *data, void * restrict dst,
1082 const struct GEN8_BINDING_TABLE_EDIT_ENTRY * restrict values)
1083 {
1084 uint32_t *dw = (uint32_t * restrict) dst;
1085
1086 dw[0] =
1087 __gen_field(values->BindingTableIndex, 16, 23) |
1088 __gen_offset(values->SurfaceStatePointer, 0, 15) |
1089 0;
1090
1091 }
1092
1093 struct GEN8_3DSTATE_BINDING_TABLE_EDIT_DS {
1094 uint32_t CommandType;
1095 uint32_t CommandSubType;
1096 uint32_t _3DCommandOpcode;
1097 uint32_t _3DCommandSubOpcode;
1098 uint32_t DwordLength;
1099 uint32_t BindingTableBlockClear;
1100 #define AllCores 3
1101 #define Core1 2
1102 #define Core0 1
1103 uint32_t BindingTableEditTarget;
1104 /* variable length fields follow */
1105 };
1106
1107 static inline void
1108 GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_pack(__gen_user_data *data, void * restrict dst,
1109 const struct GEN8_3DSTATE_BINDING_TABLE_EDIT_DS * restrict values)
1110 {
1111 uint32_t *dw = (uint32_t * restrict) dst;
1112
1113 dw[0] =
1114 __gen_field(values->CommandType, 29, 31) |
1115 __gen_field(values->CommandSubType, 27, 28) |
1116 __gen_field(values->_3DCommandOpcode, 24, 26) |
1117 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1118 __gen_field(values->DwordLength, 0, 8) |
1119 0;
1120
1121 dw[1] =
1122 __gen_field(values->BindingTableBlockClear, 16, 31) |
1123 __gen_field(values->BindingTableEditTarget, 0, 1) |
1124 0;
1125
1126 /* variable length fields follow */
1127 }
1128
1129 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_length_bias 0x00000002
1130 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_header\
1131 .CommandType = 3, \
1132 .CommandSubType = 3, \
1133 ._3DCommandOpcode = 0, \
1134 ._3DCommandSubOpcode = 68
1135
1136 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_length 0x00000000
1137
1138 struct GEN8_3DSTATE_BINDING_TABLE_EDIT_GS {
1139 uint32_t CommandType;
1140 uint32_t CommandSubType;
1141 uint32_t _3DCommandOpcode;
1142 uint32_t _3DCommandSubOpcode;
1143 uint32_t DwordLength;
1144 uint32_t BindingTableBlockClear;
1145 #define AllCores 3
1146 #define Core1 2
1147 #define Core0 1
1148 uint32_t BindingTableEditTarget;
1149 /* variable length fields follow */
1150 };
1151
1152 static inline void
1153 GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_pack(__gen_user_data *data, void * restrict dst,
1154 const struct GEN8_3DSTATE_BINDING_TABLE_EDIT_GS * restrict values)
1155 {
1156 uint32_t *dw = (uint32_t * restrict) dst;
1157
1158 dw[0] =
1159 __gen_field(values->CommandType, 29, 31) |
1160 __gen_field(values->CommandSubType, 27, 28) |
1161 __gen_field(values->_3DCommandOpcode, 24, 26) |
1162 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1163 __gen_field(values->DwordLength, 0, 8) |
1164 0;
1165
1166 dw[1] =
1167 __gen_field(values->BindingTableBlockClear, 16, 31) |
1168 __gen_field(values->BindingTableEditTarget, 0, 1) |
1169 0;
1170
1171 /* variable length fields follow */
1172 }
1173
1174 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_length_bias 0x00000002
1175 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_header\
1176 .CommandType = 3, \
1177 .CommandSubType = 3, \
1178 ._3DCommandOpcode = 0, \
1179 ._3DCommandSubOpcode = 69
1180
1181 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_length 0x00000000
1182
1183 struct GEN8_3DSTATE_BINDING_TABLE_EDIT_HS {
1184 uint32_t CommandType;
1185 uint32_t CommandSubType;
1186 uint32_t _3DCommandOpcode;
1187 uint32_t _3DCommandSubOpcode;
1188 uint32_t DwordLength;
1189 uint32_t BindingTableBlockClear;
1190 #define AllCores 3
1191 #define Core1 2
1192 #define Core0 1
1193 uint32_t BindingTableEditTarget;
1194 /* variable length fields follow */
1195 };
1196
1197 static inline void
1198 GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_pack(__gen_user_data *data, void * restrict dst,
1199 const struct GEN8_3DSTATE_BINDING_TABLE_EDIT_HS * restrict values)
1200 {
1201 uint32_t *dw = (uint32_t * restrict) dst;
1202
1203 dw[0] =
1204 __gen_field(values->CommandType, 29, 31) |
1205 __gen_field(values->CommandSubType, 27, 28) |
1206 __gen_field(values->_3DCommandOpcode, 24, 26) |
1207 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1208 __gen_field(values->DwordLength, 0, 8) |
1209 0;
1210
1211 dw[1] =
1212 __gen_field(values->BindingTableBlockClear, 16, 31) |
1213 __gen_field(values->BindingTableEditTarget, 0, 1) |
1214 0;
1215
1216 /* variable length fields follow */
1217 }
1218
1219 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_length_bias 0x00000002
1220 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_header\
1221 .CommandType = 3, \
1222 .CommandSubType = 3, \
1223 ._3DCommandOpcode = 0, \
1224 ._3DCommandSubOpcode = 71
1225
1226 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_length 0x00000000
1227
1228 struct GEN8_3DSTATE_BINDING_TABLE_EDIT_PS {
1229 uint32_t CommandType;
1230 uint32_t CommandSubType;
1231 uint32_t _3DCommandOpcode;
1232 uint32_t _3DCommandSubOpcode;
1233 uint32_t DwordLength;
1234 uint32_t BindingTableBlockClear;
1235 #define AllCores 3
1236 #define Core1 2
1237 #define Core0 1
1238 uint32_t BindingTableEditTarget;
1239 /* variable length fields follow */
1240 };
1241
1242 static inline void
1243 GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_pack(__gen_user_data *data, void * restrict dst,
1244 const struct GEN8_3DSTATE_BINDING_TABLE_EDIT_PS * restrict values)
1245 {
1246 uint32_t *dw = (uint32_t * restrict) dst;
1247
1248 dw[0] =
1249 __gen_field(values->CommandType, 29, 31) |
1250 __gen_field(values->CommandSubType, 27, 28) |
1251 __gen_field(values->_3DCommandOpcode, 24, 26) |
1252 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1253 __gen_field(values->DwordLength, 0, 8) |
1254 0;
1255
1256 dw[1] =
1257 __gen_field(values->BindingTableBlockClear, 16, 31) |
1258 __gen_field(values->BindingTableEditTarget, 0, 1) |
1259 0;
1260
1261 /* variable length fields follow */
1262 }
1263
1264 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_length_bias 0x00000002
1265 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_header\
1266 .CommandType = 3, \
1267 .CommandSubType = 3, \
1268 ._3DCommandOpcode = 0, \
1269 ._3DCommandSubOpcode = 67
1270
1271 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_length 0x00000000
1272
1273 struct GEN8_3DSTATE_BINDING_TABLE_EDIT_VS {
1274 uint32_t CommandType;
1275 uint32_t CommandSubType;
1276 uint32_t _3DCommandOpcode;
1277 uint32_t _3DCommandSubOpcode;
1278 uint32_t DwordLength;
1279 uint32_t BindingTableBlockClear;
1280 #define AllCores 3
1281 #define Core1 2
1282 #define Core0 1
1283 uint32_t BindingTableEditTarget;
1284 /* variable length fields follow */
1285 };
1286
1287 static inline void
1288 GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_pack(__gen_user_data *data, void * restrict dst,
1289 const struct GEN8_3DSTATE_BINDING_TABLE_EDIT_VS * restrict values)
1290 {
1291 uint32_t *dw = (uint32_t * restrict) dst;
1292
1293 dw[0] =
1294 __gen_field(values->CommandType, 29, 31) |
1295 __gen_field(values->CommandSubType, 27, 28) |
1296 __gen_field(values->_3DCommandOpcode, 24, 26) |
1297 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1298 __gen_field(values->DwordLength, 0, 8) |
1299 0;
1300
1301 dw[1] =
1302 __gen_field(values->BindingTableBlockClear, 16, 31) |
1303 __gen_field(values->BindingTableEditTarget, 0, 1) |
1304 0;
1305
1306 /* variable length fields follow */
1307 }
1308
1309 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_length_bias 0x00000002
1310 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_header\
1311 .CommandType = 3, \
1312 .CommandSubType = 3, \
1313 ._3DCommandOpcode = 0, \
1314 ._3DCommandSubOpcode = 40, \
1315 .DwordLength = 0
1316
1317 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_length 0x00000002
1318
1319 struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS {
1320 uint32_t CommandType;
1321 uint32_t CommandSubType;
1322 uint32_t _3DCommandOpcode;
1323 uint32_t _3DCommandSubOpcode;
1324 uint32_t DwordLength;
1325 uint32_t PointertoDSBindingTable;
1326 };
1327
1328 static inline void
1329 GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
1330 const struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS * restrict values)
1331 {
1332 uint32_t *dw = (uint32_t * restrict) dst;
1333
1334 dw[0] =
1335 __gen_field(values->CommandType, 29, 31) |
1336 __gen_field(values->CommandSubType, 27, 28) |
1337 __gen_field(values->_3DCommandOpcode, 24, 26) |
1338 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1339 __gen_field(values->DwordLength, 0, 7) |
1340 0;
1341
1342 dw[1] =
1343 __gen_offset(values->PointertoDSBindingTable, 5, 15) |
1344 0;
1345
1346 }
1347
1348 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_length_bias 0x00000002
1349 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_header\
1350 .CommandType = 3, \
1351 .CommandSubType = 3, \
1352 ._3DCommandOpcode = 0, \
1353 ._3DCommandSubOpcode = 41, \
1354 .DwordLength = 0
1355
1356 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_length 0x00000002
1357
1358 struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS {
1359 uint32_t CommandType;
1360 uint32_t CommandSubType;
1361 uint32_t _3DCommandOpcode;
1362 uint32_t _3DCommandSubOpcode;
1363 uint32_t DwordLength;
1364 uint32_t PointertoGSBindingTable;
1365 };
1366
1367 static inline void
1368 GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
1369 const struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS * restrict values)
1370 {
1371 uint32_t *dw = (uint32_t * restrict) dst;
1372
1373 dw[0] =
1374 __gen_field(values->CommandType, 29, 31) |
1375 __gen_field(values->CommandSubType, 27, 28) |
1376 __gen_field(values->_3DCommandOpcode, 24, 26) |
1377 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1378 __gen_field(values->DwordLength, 0, 7) |
1379 0;
1380
1381 dw[1] =
1382 __gen_offset(values->PointertoGSBindingTable, 5, 15) |
1383 0;
1384
1385 }
1386
1387 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_length_bias 0x00000002
1388 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_header\
1389 .CommandType = 3, \
1390 .CommandSubType = 3, \
1391 ._3DCommandOpcode = 0, \
1392 ._3DCommandSubOpcode = 39, \
1393 .DwordLength = 0
1394
1395 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_length 0x00000002
1396
1397 struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS {
1398 uint32_t CommandType;
1399 uint32_t CommandSubType;
1400 uint32_t _3DCommandOpcode;
1401 uint32_t _3DCommandSubOpcode;
1402 uint32_t DwordLength;
1403 uint32_t PointertoHSBindingTable;
1404 };
1405
1406 static inline void
1407 GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
1408 const struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS * restrict values)
1409 {
1410 uint32_t *dw = (uint32_t * restrict) dst;
1411
1412 dw[0] =
1413 __gen_field(values->CommandType, 29, 31) |
1414 __gen_field(values->CommandSubType, 27, 28) |
1415 __gen_field(values->_3DCommandOpcode, 24, 26) |
1416 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1417 __gen_field(values->DwordLength, 0, 7) |
1418 0;
1419
1420 dw[1] =
1421 __gen_offset(values->PointertoHSBindingTable, 5, 15) |
1422 0;
1423
1424 }
1425
1426 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_length_bias 0x00000002
1427 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_header\
1428 .CommandType = 3, \
1429 .CommandSubType = 3, \
1430 ._3DCommandOpcode = 0, \
1431 ._3DCommandSubOpcode = 42, \
1432 .DwordLength = 0
1433
1434 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_length 0x00000002
1435
1436 struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS {
1437 uint32_t CommandType;
1438 uint32_t CommandSubType;
1439 uint32_t _3DCommandOpcode;
1440 uint32_t _3DCommandSubOpcode;
1441 uint32_t DwordLength;
1442 uint32_t PointertoPSBindingTable;
1443 };
1444
1445 static inline void
1446 GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
1447 const struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS * restrict values)
1448 {
1449 uint32_t *dw = (uint32_t * restrict) dst;
1450
1451 dw[0] =
1452 __gen_field(values->CommandType, 29, 31) |
1453 __gen_field(values->CommandSubType, 27, 28) |
1454 __gen_field(values->_3DCommandOpcode, 24, 26) |
1455 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1456 __gen_field(values->DwordLength, 0, 7) |
1457 0;
1458
1459 dw[1] =
1460 __gen_offset(values->PointertoPSBindingTable, 5, 15) |
1461 0;
1462
1463 }
1464
1465 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_length_bias 0x00000002
1466 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_header\
1467 .CommandType = 3, \
1468 .CommandSubType = 3, \
1469 ._3DCommandOpcode = 0, \
1470 ._3DCommandSubOpcode = 38, \
1471 .DwordLength = 0
1472
1473 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_length 0x00000002
1474
1475 struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS {
1476 uint32_t CommandType;
1477 uint32_t CommandSubType;
1478 uint32_t _3DCommandOpcode;
1479 uint32_t _3DCommandSubOpcode;
1480 uint32_t DwordLength;
1481 uint32_t PointertoVSBindingTable;
1482 };
1483
1484 static inline void
1485 GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
1486 const struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS * restrict values)
1487 {
1488 uint32_t *dw = (uint32_t * restrict) dst;
1489
1490 dw[0] =
1491 __gen_field(values->CommandType, 29, 31) |
1492 __gen_field(values->CommandSubType, 27, 28) |
1493 __gen_field(values->_3DCommandOpcode, 24, 26) |
1494 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1495 __gen_field(values->DwordLength, 0, 7) |
1496 0;
1497
1498 dw[1] =
1499 __gen_offset(values->PointertoVSBindingTable, 5, 15) |
1500 0;
1501
1502 }
1503
1504 #define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_length_bias 0x00000002
1505 #define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_header\
1506 .CommandType = 3, \
1507 .CommandSubType = 3, \
1508 ._3DCommandOpcode = 1, \
1509 ._3DCommandSubOpcode = 25, \
1510 .DwordLength = 2
1511
1512 #define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_length 0x00000004
1513
1514 struct GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC {
1515 uint32_t CommandType;
1516 uint32_t CommandSubType;
1517 uint32_t _3DCommandOpcode;
1518 uint32_t _3DCommandSubOpcode;
1519 uint32_t DwordLength;
1520 __gen_address_type BindingTablePoolBaseAddress;
1521 uint32_t BindingTablePoolEnable;
1522 struct GEN8_MEMORY_OBJECT_CONTROL_STATE SurfaceObjectControlState;
1523 #define NoValidData 0
1524 uint32_t BindingTablePoolBufferSize;
1525 };
1526
1527 static inline void
1528 GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_pack(__gen_user_data *data, void * restrict dst,
1529 const struct GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC * restrict values)
1530 {
1531 uint32_t *dw = (uint32_t * restrict) dst;
1532
1533 dw[0] =
1534 __gen_field(values->CommandType, 29, 31) |
1535 __gen_field(values->CommandSubType, 27, 28) |
1536 __gen_field(values->_3DCommandOpcode, 24, 26) |
1537 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1538 __gen_field(values->DwordLength, 0, 7) |
1539 0;
1540
1541 uint32_t dw_SurfaceObjectControlState;
1542 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceObjectControlState, &values->SurfaceObjectControlState);
1543 uint32_t dw1 =
1544 __gen_field(values->BindingTablePoolEnable, 11, 11) |
1545 __gen_field(dw_SurfaceObjectControlState, 0, 6) |
1546 0;
1547
1548 uint64_t qw1 =
1549 __gen_combine_address(data, &dw[1], values->BindingTablePoolBaseAddress, dw1);
1550
1551 dw[1] = qw1;
1552 dw[2] = qw1 >> 32;
1553
1554 dw[3] =
1555 __gen_field(values->BindingTablePoolBufferSize, 12, 31) |
1556 0;
1557
1558 }
1559
1560 #define GEN8_3DSTATE_BLEND_STATE_POINTERS_length_bias 0x00000002
1561 #define GEN8_3DSTATE_BLEND_STATE_POINTERS_header\
1562 .CommandType = 3, \
1563 .CommandSubType = 3, \
1564 ._3DCommandOpcode = 0, \
1565 ._3DCommandSubOpcode = 36, \
1566 .DwordLength = 0
1567
1568 #define GEN8_3DSTATE_BLEND_STATE_POINTERS_length 0x00000002
1569
1570 struct GEN8_3DSTATE_BLEND_STATE_POINTERS {
1571 uint32_t CommandType;
1572 uint32_t CommandSubType;
1573 uint32_t _3DCommandOpcode;
1574 uint32_t _3DCommandSubOpcode;
1575 uint32_t DwordLength;
1576 uint32_t BlendStatePointer;
1577 bool BlendStatePointerValid;
1578 };
1579
1580 static inline void
1581 GEN8_3DSTATE_BLEND_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
1582 const struct GEN8_3DSTATE_BLEND_STATE_POINTERS * restrict values)
1583 {
1584 uint32_t *dw = (uint32_t * restrict) dst;
1585
1586 dw[0] =
1587 __gen_field(values->CommandType, 29, 31) |
1588 __gen_field(values->CommandSubType, 27, 28) |
1589 __gen_field(values->_3DCommandOpcode, 24, 26) |
1590 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1591 __gen_field(values->DwordLength, 0, 7) |
1592 0;
1593
1594 dw[1] =
1595 __gen_offset(values->BlendStatePointer, 6, 31) |
1596 __gen_field(values->BlendStatePointerValid, 0, 0) |
1597 0;
1598
1599 }
1600
1601 #define GEN8_3DSTATE_CC_STATE_POINTERS_length_bias 0x00000002
1602 #define GEN8_3DSTATE_CC_STATE_POINTERS_header \
1603 .CommandType = 3, \
1604 .CommandSubType = 3, \
1605 ._3DCommandOpcode = 0, \
1606 ._3DCommandSubOpcode = 14, \
1607 .DwordLength = 0
1608
1609 #define GEN8_3DSTATE_CC_STATE_POINTERS_length 0x00000002
1610
1611 struct GEN8_3DSTATE_CC_STATE_POINTERS {
1612 uint32_t CommandType;
1613 uint32_t CommandSubType;
1614 uint32_t _3DCommandOpcode;
1615 uint32_t _3DCommandSubOpcode;
1616 uint32_t DwordLength;
1617 uint32_t ColorCalcStatePointer;
1618 bool ColorCalcStatePointerValid;
1619 };
1620
1621 static inline void
1622 GEN8_3DSTATE_CC_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
1623 const struct GEN8_3DSTATE_CC_STATE_POINTERS * restrict values)
1624 {
1625 uint32_t *dw = (uint32_t * restrict) dst;
1626
1627 dw[0] =
1628 __gen_field(values->CommandType, 29, 31) |
1629 __gen_field(values->CommandSubType, 27, 28) |
1630 __gen_field(values->_3DCommandOpcode, 24, 26) |
1631 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1632 __gen_field(values->DwordLength, 0, 7) |
1633 0;
1634
1635 dw[1] =
1636 __gen_offset(values->ColorCalcStatePointer, 6, 31) |
1637 __gen_field(values->ColorCalcStatePointerValid, 0, 0) |
1638 0;
1639
1640 }
1641
1642 #define GEN8_3DSTATE_CHROMA_KEY_length_bias 0x00000002
1643 #define GEN8_3DSTATE_CHROMA_KEY_header \
1644 .CommandType = 3, \
1645 .CommandSubType = 3, \
1646 ._3DCommandOpcode = 1, \
1647 ._3DCommandSubOpcode = 4, \
1648 .DwordLength = 2
1649
1650 #define GEN8_3DSTATE_CHROMA_KEY_length 0x00000004
1651
1652 struct GEN8_3DSTATE_CHROMA_KEY {
1653 uint32_t CommandType;
1654 uint32_t CommandSubType;
1655 uint32_t _3DCommandOpcode;
1656 uint32_t _3DCommandSubOpcode;
1657 uint32_t DwordLength;
1658 uint32_t ChromaKeyTableIndex;
1659 uint32_t ChromaKeyLowValue;
1660 uint32_t ChromaKeyHighValue;
1661 };
1662
1663 static inline void
1664 GEN8_3DSTATE_CHROMA_KEY_pack(__gen_user_data *data, void * restrict dst,
1665 const struct GEN8_3DSTATE_CHROMA_KEY * restrict values)
1666 {
1667 uint32_t *dw = (uint32_t * restrict) dst;
1668
1669 dw[0] =
1670 __gen_field(values->CommandType, 29, 31) |
1671 __gen_field(values->CommandSubType, 27, 28) |
1672 __gen_field(values->_3DCommandOpcode, 24, 26) |
1673 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1674 __gen_field(values->DwordLength, 0, 7) |
1675 0;
1676
1677 dw[1] =
1678 __gen_field(values->ChromaKeyTableIndex, 30, 31) |
1679 0;
1680
1681 dw[2] =
1682 __gen_field(values->ChromaKeyLowValue, 0, 31) |
1683 0;
1684
1685 dw[3] =
1686 __gen_field(values->ChromaKeyHighValue, 0, 31) |
1687 0;
1688
1689 }
1690
1691 #define GEN8_3DSTATE_CLEAR_PARAMS_length_bias 0x00000002
1692 #define GEN8_3DSTATE_CLEAR_PARAMS_header \
1693 .CommandType = 3, \
1694 .CommandSubType = 3, \
1695 ._3DCommandOpcode = 0, \
1696 ._3DCommandSubOpcode = 4, \
1697 .DwordLength = 1
1698
1699 #define GEN8_3DSTATE_CLEAR_PARAMS_length 0x00000003
1700
1701 struct GEN8_3DSTATE_CLEAR_PARAMS {
1702 uint32_t CommandType;
1703 uint32_t CommandSubType;
1704 uint32_t _3DCommandOpcode;
1705 uint32_t _3DCommandSubOpcode;
1706 uint32_t DwordLength;
1707 float DepthClearValue;
1708 bool DepthClearValueValid;
1709 };
1710
1711 static inline void
1712 GEN8_3DSTATE_CLEAR_PARAMS_pack(__gen_user_data *data, void * restrict dst,
1713 const struct GEN8_3DSTATE_CLEAR_PARAMS * restrict values)
1714 {
1715 uint32_t *dw = (uint32_t * restrict) dst;
1716
1717 dw[0] =
1718 __gen_field(values->CommandType, 29, 31) |
1719 __gen_field(values->CommandSubType, 27, 28) |
1720 __gen_field(values->_3DCommandOpcode, 24, 26) |
1721 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1722 __gen_field(values->DwordLength, 0, 7) |
1723 0;
1724
1725 dw[1] =
1726 __gen_float(values->DepthClearValue) |
1727 0;
1728
1729 dw[2] =
1730 __gen_field(values->DepthClearValueValid, 0, 0) |
1731 0;
1732
1733 }
1734
1735 #define GEN8_3DSTATE_CLIP_length_bias 0x00000002
1736 #define GEN8_3DSTATE_CLIP_header \
1737 .CommandType = 3, \
1738 .CommandSubType = 3, \
1739 ._3DCommandOpcode = 0, \
1740 ._3DCommandSubOpcode = 18, \
1741 .DwordLength = 2
1742
1743 #define GEN8_3DSTATE_CLIP_length 0x00000004
1744
1745 struct GEN8_3DSTATE_CLIP {
1746 uint32_t CommandType;
1747 uint32_t CommandSubType;
1748 uint32_t _3DCommandOpcode;
1749 uint32_t _3DCommandSubOpcode;
1750 uint32_t DwordLength;
1751 #define Normal 0
1752 #define Force 1
1753 bool ForceUserClipDistanceCullTestEnableBitmask;
1754 #define _8Bit 0
1755 #define _4Bit 1
1756 uint32_t VertexSubPixelPrecisionSelect;
1757 bool EarlyCullEnable;
1758 #define Normal 0
1759 #define Force 1
1760 bool ForceUserClipDistanceClipTestEnableBitmask;
1761 #define Normal 0
1762 #define Force 1
1763 bool ForceClipMode;
1764 bool ClipperStatisticsEnable;
1765 uint32_t UserClipDistanceCullTestEnableBitmask;
1766 bool ClipEnable;
1767 #define API_OGL 0
1768 uint32_t APIMode;
1769 bool ViewportXYClipTestEnable;
1770 bool GuardbandClipTestEnable;
1771 uint32_t UserClipDistanceClipTestEnableBitmask;
1772 #define NORMAL 0
1773 #define REJECT_ALL 3
1774 #define ACCEPT_ALL 4
1775 uint32_t ClipMode;
1776 bool PerspectiveDivideDisable;
1777 bool NonPerspectiveBarycentricEnable;
1778 uint32_t TriangleStripListProvokingVertexSelect;
1779 uint32_t LineStripListProvokingVertexSelect;
1780 uint32_t TriangleFanProvokingVertexSelect;
1781 float MinimumPointWidth;
1782 float MaximumPointWidth;
1783 bool ForceZeroRTAIndexEnable;
1784 uint32_t MaximumVPIndex;
1785 };
1786
1787 static inline void
1788 GEN8_3DSTATE_CLIP_pack(__gen_user_data *data, void * restrict dst,
1789 const struct GEN8_3DSTATE_CLIP * restrict values)
1790 {
1791 uint32_t *dw = (uint32_t * restrict) dst;
1792
1793 dw[0] =
1794 __gen_field(values->CommandType, 29, 31) |
1795 __gen_field(values->CommandSubType, 27, 28) |
1796 __gen_field(values->_3DCommandOpcode, 24, 26) |
1797 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1798 __gen_field(values->DwordLength, 0, 7) |
1799 0;
1800
1801 dw[1] =
1802 __gen_field(values->ForceUserClipDistanceCullTestEnableBitmask, 20, 20) |
1803 __gen_field(values->VertexSubPixelPrecisionSelect, 19, 19) |
1804 __gen_field(values->EarlyCullEnable, 18, 18) |
1805 __gen_field(values->ForceUserClipDistanceClipTestEnableBitmask, 17, 17) |
1806 __gen_field(values->ForceClipMode, 16, 16) |
1807 __gen_field(values->ClipperStatisticsEnable, 10, 10) |
1808 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
1809 0;
1810
1811 dw[2] =
1812 __gen_field(values->ClipEnable, 31, 31) |
1813 __gen_field(values->APIMode, 30, 30) |
1814 __gen_field(values->ViewportXYClipTestEnable, 28, 28) |
1815 __gen_field(values->GuardbandClipTestEnable, 26, 26) |
1816 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 16, 23) |
1817 __gen_field(values->ClipMode, 13, 15) |
1818 __gen_field(values->PerspectiveDivideDisable, 9, 9) |
1819 __gen_field(values->NonPerspectiveBarycentricEnable, 8, 8) |
1820 __gen_field(values->TriangleStripListProvokingVertexSelect, 4, 5) |
1821 __gen_field(values->LineStripListProvokingVertexSelect, 2, 3) |
1822 __gen_field(values->TriangleFanProvokingVertexSelect, 0, 1) |
1823 0;
1824
1825 dw[3] =
1826 __gen_field(values->MinimumPointWidth * (1 << 3), 17, 27) |
1827 __gen_field(values->MaximumPointWidth * (1 << 3), 6, 16) |
1828 __gen_field(values->ForceZeroRTAIndexEnable, 5, 5) |
1829 __gen_field(values->MaximumVPIndex, 0, 3) |
1830 0;
1831
1832 }
1833
1834 #define GEN8_3DSTATE_CONSTANT_DS_length_bias 0x00000002
1835 #define GEN8_3DSTATE_CONSTANT_DS_header \
1836 .CommandType = 3, \
1837 .CommandSubType = 3, \
1838 ._3DCommandOpcode = 0, \
1839 ._3DCommandSubOpcode = 26, \
1840 .DwordLength = 9
1841
1842 #define GEN8_3DSTATE_CONSTANT_DS_length 0x0000000b
1843
1844 #define GEN8_3DSTATE_CONSTANT_BODY_length 0x0000000a
1845
1846 struct GEN8_3DSTATE_CONSTANT_BODY {
1847 uint32_t ConstantBuffer1ReadLength;
1848 uint32_t ConstantBuffer0ReadLength;
1849 uint32_t ConstantBuffer3ReadLength;
1850 uint32_t ConstantBuffer2ReadLength;
1851 __gen_address_type PointerToConstantBuffer0;
1852 __gen_address_type PointerToConstantBuffer1;
1853 __gen_address_type PointerToConstantBuffer2;
1854 __gen_address_type PointerToConstantBuffer3;
1855 };
1856
1857 static inline void
1858 GEN8_3DSTATE_CONSTANT_BODY_pack(__gen_user_data *data, void * restrict dst,
1859 const struct GEN8_3DSTATE_CONSTANT_BODY * restrict values)
1860 {
1861 uint32_t *dw = (uint32_t * restrict) dst;
1862
1863 dw[0] =
1864 __gen_field(values->ConstantBuffer1ReadLength, 16, 31) |
1865 __gen_field(values->ConstantBuffer0ReadLength, 0, 15) |
1866 0;
1867
1868 dw[1] =
1869 __gen_field(values->ConstantBuffer3ReadLength, 16, 31) |
1870 __gen_field(values->ConstantBuffer2ReadLength, 0, 15) |
1871 0;
1872
1873 uint32_t dw2 =
1874 0;
1875
1876 uint64_t qw2 =
1877 __gen_combine_address(data, &dw[2], values->PointerToConstantBuffer0, dw2);
1878
1879 dw[2] = qw2;
1880 dw[3] = qw2 >> 32;
1881
1882 uint32_t dw4 =
1883 0;
1884
1885 uint64_t qw4 =
1886 __gen_combine_address(data, &dw[4], values->PointerToConstantBuffer1, dw4);
1887
1888 dw[4] = qw4;
1889 dw[5] = qw4 >> 32;
1890
1891 uint32_t dw6 =
1892 0;
1893
1894 uint64_t qw6 =
1895 __gen_combine_address(data, &dw[6], values->PointerToConstantBuffer2, dw6);
1896
1897 dw[6] = qw6;
1898 dw[7] = qw6 >> 32;
1899
1900 uint32_t dw8 =
1901 0;
1902
1903 uint64_t qw8 =
1904 __gen_combine_address(data, &dw[8], values->PointerToConstantBuffer3, dw8);
1905
1906 dw[8] = qw8;
1907 dw[9] = qw8 >> 32;
1908
1909 }
1910
1911 struct GEN8_3DSTATE_CONSTANT_DS {
1912 uint32_t CommandType;
1913 uint32_t CommandSubType;
1914 uint32_t _3DCommandOpcode;
1915 uint32_t _3DCommandSubOpcode;
1916 struct GEN8_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
1917 uint32_t DwordLength;
1918 struct GEN8_3DSTATE_CONSTANT_BODY ConstantBody;
1919 };
1920
1921 static inline void
1922 GEN8_3DSTATE_CONSTANT_DS_pack(__gen_user_data *data, void * restrict dst,
1923 const struct GEN8_3DSTATE_CONSTANT_DS * restrict values)
1924 {
1925 uint32_t *dw = (uint32_t * restrict) dst;
1926
1927 uint32_t dw_ConstantBufferObjectControlState;
1928 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
1929 dw[0] =
1930 __gen_field(values->CommandType, 29, 31) |
1931 __gen_field(values->CommandSubType, 27, 28) |
1932 __gen_field(values->_3DCommandOpcode, 24, 26) |
1933 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1934 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
1935 __gen_field(values->DwordLength, 0, 7) |
1936 0;
1937
1938 GEN8_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1939 }
1940
1941 #define GEN8_3DSTATE_CONSTANT_GS_length_bias 0x00000002
1942 #define GEN8_3DSTATE_CONSTANT_GS_header \
1943 .CommandType = 3, \
1944 .CommandSubType = 3, \
1945 ._3DCommandOpcode = 0, \
1946 ._3DCommandSubOpcode = 22, \
1947 .DwordLength = 9
1948
1949 #define GEN8_3DSTATE_CONSTANT_GS_length 0x0000000b
1950
1951 struct GEN8_3DSTATE_CONSTANT_GS {
1952 uint32_t CommandType;
1953 uint32_t CommandSubType;
1954 uint32_t _3DCommandOpcode;
1955 uint32_t _3DCommandSubOpcode;
1956 struct GEN8_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
1957 uint32_t DwordLength;
1958 struct GEN8_3DSTATE_CONSTANT_BODY ConstantBody;
1959 };
1960
1961 static inline void
1962 GEN8_3DSTATE_CONSTANT_GS_pack(__gen_user_data *data, void * restrict dst,
1963 const struct GEN8_3DSTATE_CONSTANT_GS * restrict values)
1964 {
1965 uint32_t *dw = (uint32_t * restrict) dst;
1966
1967 uint32_t dw_ConstantBufferObjectControlState;
1968 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
1969 dw[0] =
1970 __gen_field(values->CommandType, 29, 31) |
1971 __gen_field(values->CommandSubType, 27, 28) |
1972 __gen_field(values->_3DCommandOpcode, 24, 26) |
1973 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1974 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
1975 __gen_field(values->DwordLength, 0, 7) |
1976 0;
1977
1978 GEN8_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1979 }
1980
1981 #define GEN8_3DSTATE_CONSTANT_HS_length_bias 0x00000002
1982 #define GEN8_3DSTATE_CONSTANT_HS_header \
1983 .CommandType = 3, \
1984 .CommandSubType = 3, \
1985 ._3DCommandOpcode = 0, \
1986 ._3DCommandSubOpcode = 25, \
1987 .DwordLength = 9
1988
1989 #define GEN8_3DSTATE_CONSTANT_HS_length 0x0000000b
1990
1991 struct GEN8_3DSTATE_CONSTANT_HS {
1992 uint32_t CommandType;
1993 uint32_t CommandSubType;
1994 uint32_t _3DCommandOpcode;
1995 uint32_t _3DCommandSubOpcode;
1996 struct GEN8_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
1997 uint32_t DwordLength;
1998 struct GEN8_3DSTATE_CONSTANT_BODY ConstantBody;
1999 };
2000
2001 static inline void
2002 GEN8_3DSTATE_CONSTANT_HS_pack(__gen_user_data *data, void * restrict dst,
2003 const struct GEN8_3DSTATE_CONSTANT_HS * restrict values)
2004 {
2005 uint32_t *dw = (uint32_t * restrict) dst;
2006
2007 uint32_t dw_ConstantBufferObjectControlState;
2008 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
2009 dw[0] =
2010 __gen_field(values->CommandType, 29, 31) |
2011 __gen_field(values->CommandSubType, 27, 28) |
2012 __gen_field(values->_3DCommandOpcode, 24, 26) |
2013 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2014 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
2015 __gen_field(values->DwordLength, 0, 7) |
2016 0;
2017
2018 GEN8_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
2019 }
2020
2021 #define GEN8_3DSTATE_CONSTANT_PS_length_bias 0x00000002
2022 #define GEN8_3DSTATE_CONSTANT_PS_header \
2023 .CommandType = 3, \
2024 .CommandSubType = 3, \
2025 ._3DCommandOpcode = 0, \
2026 ._3DCommandSubOpcode = 23, \
2027 .DwordLength = 9
2028
2029 #define GEN8_3DSTATE_CONSTANT_PS_length 0x0000000b
2030
2031 struct GEN8_3DSTATE_CONSTANT_PS {
2032 uint32_t CommandType;
2033 uint32_t CommandSubType;
2034 uint32_t _3DCommandOpcode;
2035 uint32_t _3DCommandSubOpcode;
2036 struct GEN8_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
2037 uint32_t DwordLength;
2038 struct GEN8_3DSTATE_CONSTANT_BODY ConstantBody;
2039 };
2040
2041 static inline void
2042 GEN8_3DSTATE_CONSTANT_PS_pack(__gen_user_data *data, void * restrict dst,
2043 const struct GEN8_3DSTATE_CONSTANT_PS * restrict values)
2044 {
2045 uint32_t *dw = (uint32_t * restrict) dst;
2046
2047 uint32_t dw_ConstantBufferObjectControlState;
2048 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
2049 dw[0] =
2050 __gen_field(values->CommandType, 29, 31) |
2051 __gen_field(values->CommandSubType, 27, 28) |
2052 __gen_field(values->_3DCommandOpcode, 24, 26) |
2053 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2054 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
2055 __gen_field(values->DwordLength, 0, 7) |
2056 0;
2057
2058 GEN8_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
2059 }
2060
2061 #define GEN8_3DSTATE_CONSTANT_VS_length_bias 0x00000002
2062 #define GEN8_3DSTATE_CONSTANT_VS_header \
2063 .CommandType = 3, \
2064 .CommandSubType = 3, \
2065 ._3DCommandOpcode = 0, \
2066 ._3DCommandSubOpcode = 21, \
2067 .DwordLength = 9
2068
2069 #define GEN8_3DSTATE_CONSTANT_VS_length 0x0000000b
2070
2071 struct GEN8_3DSTATE_CONSTANT_VS {
2072 uint32_t CommandType;
2073 uint32_t CommandSubType;
2074 uint32_t _3DCommandOpcode;
2075 uint32_t _3DCommandSubOpcode;
2076 struct GEN8_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
2077 uint32_t DwordLength;
2078 struct GEN8_3DSTATE_CONSTANT_BODY ConstantBody;
2079 };
2080
2081 static inline void
2082 GEN8_3DSTATE_CONSTANT_VS_pack(__gen_user_data *data, void * restrict dst,
2083 const struct GEN8_3DSTATE_CONSTANT_VS * restrict values)
2084 {
2085 uint32_t *dw = (uint32_t * restrict) dst;
2086
2087 uint32_t dw_ConstantBufferObjectControlState;
2088 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
2089 dw[0] =
2090 __gen_field(values->CommandType, 29, 31) |
2091 __gen_field(values->CommandSubType, 27, 28) |
2092 __gen_field(values->_3DCommandOpcode, 24, 26) |
2093 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2094 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
2095 __gen_field(values->DwordLength, 0, 7) |
2096 0;
2097
2098 GEN8_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
2099 }
2100
2101 #define GEN8_3DSTATE_DEPTH_BUFFER_length_bias 0x00000002
2102 #define GEN8_3DSTATE_DEPTH_BUFFER_header \
2103 .CommandType = 3, \
2104 .CommandSubType = 3, \
2105 ._3DCommandOpcode = 0, \
2106 ._3DCommandSubOpcode = 5, \
2107 .DwordLength = 6
2108
2109 #define GEN8_3DSTATE_DEPTH_BUFFER_length 0x00000008
2110
2111 struct GEN8_3DSTATE_DEPTH_BUFFER {
2112 uint32_t CommandType;
2113 uint32_t CommandSubType;
2114 uint32_t _3DCommandOpcode;
2115 uint32_t _3DCommandSubOpcode;
2116 uint32_t DwordLength;
2117 #define SURFTYPE_1D 0
2118 #define SURFTYPE_2D 1
2119 #define SURFTYPE_3D 2
2120 #define SURFTYPE_CUBE 3
2121 #define SURFTYPE_NULL 7
2122 uint32_t SurfaceType;
2123 bool DepthWriteEnable;
2124 bool StencilWriteEnable;
2125 bool HierarchicalDepthBufferEnable;
2126 #define D32_FLOAT 1
2127 #define D24_UNORM_X8_UINT 3
2128 #define D16_UNORM 5
2129 uint32_t SurfaceFormat;
2130 uint32_t SurfacePitch;
2131 __gen_address_type SurfaceBaseAddress;
2132 uint32_t Height;
2133 uint32_t Width;
2134 uint32_t LOD;
2135 uint32_t Depth;
2136 uint32_t MinimumArrayElement;
2137 struct GEN8_MEMORY_OBJECT_CONTROL_STATE DepthBufferObjectControlState;
2138 uint32_t RenderTargetViewExtent;
2139 uint32_t SurfaceQPitch;
2140 };
2141
2142 static inline void
2143 GEN8_3DSTATE_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
2144 const struct GEN8_3DSTATE_DEPTH_BUFFER * restrict values)
2145 {
2146 uint32_t *dw = (uint32_t * restrict) dst;
2147
2148 dw[0] =
2149 __gen_field(values->CommandType, 29, 31) |
2150 __gen_field(values->CommandSubType, 27, 28) |
2151 __gen_field(values->_3DCommandOpcode, 24, 26) |
2152 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2153 __gen_field(values->DwordLength, 0, 7) |
2154 0;
2155
2156 dw[1] =
2157 __gen_field(values->SurfaceType, 29, 31) |
2158 __gen_field(values->DepthWriteEnable, 28, 28) |
2159 __gen_field(values->StencilWriteEnable, 27, 27) |
2160 __gen_field(values->HierarchicalDepthBufferEnable, 22, 22) |
2161 __gen_field(values->SurfaceFormat, 18, 20) |
2162 __gen_field(values->SurfacePitch, 0, 17) |
2163 0;
2164
2165 uint32_t dw2 =
2166 0;
2167
2168 uint64_t qw2 =
2169 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
2170
2171 dw[2] = qw2;
2172 dw[3] = qw2 >> 32;
2173
2174 dw[4] =
2175 __gen_field(values->Height, 18, 31) |
2176 __gen_field(values->Width, 4, 17) |
2177 __gen_field(values->LOD, 0, 3) |
2178 0;
2179
2180 uint32_t dw_DepthBufferObjectControlState;
2181 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DepthBufferObjectControlState, &values->DepthBufferObjectControlState);
2182 dw[5] =
2183 __gen_field(values->Depth, 21, 31) |
2184 __gen_field(values->MinimumArrayElement, 10, 20) |
2185 __gen_field(dw_DepthBufferObjectControlState, 0, 6) |
2186 0;
2187
2188 dw[6] =
2189 0;
2190
2191 dw[7] =
2192 __gen_field(values->RenderTargetViewExtent, 21, 31) |
2193 __gen_field(values->SurfaceQPitch, 0, 14) |
2194 0;
2195
2196 }
2197
2198 #define GEN8_3DSTATE_DRAWING_RECTANGLE_length_bias 0x00000002
2199 #define GEN8_3DSTATE_DRAWING_RECTANGLE_header \
2200 .CommandType = 3, \
2201 .CommandSubType = 3, \
2202 ._3DCommandOpcode = 1, \
2203 ._3DCommandSubOpcode = 0, \
2204 .DwordLength = 2
2205
2206 #define GEN8_3DSTATE_DRAWING_RECTANGLE_length 0x00000004
2207
2208 struct GEN8_3DSTATE_DRAWING_RECTANGLE {
2209 uint32_t CommandType;
2210 uint32_t CommandSubType;
2211 uint32_t _3DCommandOpcode;
2212 uint32_t _3DCommandSubOpcode;
2213 #define Legacy 0
2214 #define Core0Enabled 1
2215 #define Core1Enabled 2
2216 uint32_t CoreModeSelect;
2217 uint32_t DwordLength;
2218 uint32_t ClippedDrawingRectangleYMin;
2219 uint32_t ClippedDrawingRectangleXMin;
2220 uint32_t ClippedDrawingRectangleYMax;
2221 uint32_t ClippedDrawingRectangleXMax;
2222 uint32_t DrawingRectangleOriginY;
2223 uint32_t DrawingRectangleOriginX;
2224 };
2225
2226 static inline void
2227 GEN8_3DSTATE_DRAWING_RECTANGLE_pack(__gen_user_data *data, void * restrict dst,
2228 const struct GEN8_3DSTATE_DRAWING_RECTANGLE * restrict values)
2229 {
2230 uint32_t *dw = (uint32_t * restrict) dst;
2231
2232 dw[0] =
2233 __gen_field(values->CommandType, 29, 31) |
2234 __gen_field(values->CommandSubType, 27, 28) |
2235 __gen_field(values->_3DCommandOpcode, 24, 26) |
2236 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2237 __gen_field(values->CoreModeSelect, 14, 15) |
2238 __gen_field(values->DwordLength, 0, 7) |
2239 0;
2240
2241 dw[1] =
2242 __gen_field(values->ClippedDrawingRectangleYMin, 16, 31) |
2243 __gen_field(values->ClippedDrawingRectangleXMin, 0, 15) |
2244 0;
2245
2246 dw[2] =
2247 __gen_field(values->ClippedDrawingRectangleYMax, 16, 31) |
2248 __gen_field(values->ClippedDrawingRectangleXMax, 0, 15) |
2249 0;
2250
2251 dw[3] =
2252 __gen_field(values->DrawingRectangleOriginY, 16, 31) |
2253 __gen_field(values->DrawingRectangleOriginX, 0, 15) |
2254 0;
2255
2256 }
2257
2258 #define GEN8_3DSTATE_DS_length_bias 0x00000002
2259 #define GEN8_3DSTATE_DS_header \
2260 .CommandType = 3, \
2261 .CommandSubType = 3, \
2262 ._3DCommandOpcode = 0, \
2263 ._3DCommandSubOpcode = 29, \
2264 .DwordLength = 7
2265
2266 #define GEN8_3DSTATE_DS_length 0x00000009
2267
2268 struct GEN8_3DSTATE_DS {
2269 uint32_t CommandType;
2270 uint32_t CommandSubType;
2271 uint32_t _3DCommandOpcode;
2272 uint32_t _3DCommandSubOpcode;
2273 uint32_t DwordLength;
2274 uint64_t KernelStartPointer;
2275 #define Multiple 0
2276 #define Single 1
2277 uint32_t SingleDomainPointDispatch;
2278 #define Dmask 0
2279 #define Vmask 1
2280 uint32_t VectorMaskEnable;
2281 #define NoSamplers 0
2282 #define _14Samplers 1
2283 #define _58Samplers 2
2284 #define _912Samplers 3
2285 #define _1316Samplers 4
2286 uint32_t SamplerCount;
2287 uint32_t BindingTableEntryCount;
2288 #define Normal 0
2289 #define High 1
2290 uint32_t ThreadDispatchPriority;
2291 #define IEEE754 0
2292 #define Alternate 1
2293 uint32_t FloatingPointMode;
2294 bool AccessesUAV;
2295 bool IllegalOpcodeExceptionEnable;
2296 bool SoftwareExceptionEnable;
2297 uint64_t ScratchSpaceBasePointer;
2298 uint32_t PerThreadScratchSpace;
2299 uint32_t DispatchGRFStartRegisterForURBData;
2300 uint32_t PatchURBEntryReadLength;
2301 uint32_t PatchURBEntryReadOffset;
2302 uint32_t MaximumNumberofThreads;
2303 bool StatisticsEnable;
2304 bool SIMD8DispatchEnable;
2305 bool ComputeWCoordinateEnable;
2306 bool CacheDisable;
2307 bool FunctionEnable;
2308 uint32_t VertexURBEntryOutputReadOffset;
2309 uint32_t VertexURBEntryOutputLength;
2310 uint32_t UserClipDistanceClipTestEnableBitmask;
2311 uint32_t UserClipDistanceCullTestEnableBitmask;
2312 };
2313
2314 static inline void
2315 GEN8_3DSTATE_DS_pack(__gen_user_data *data, void * restrict dst,
2316 const struct GEN8_3DSTATE_DS * restrict values)
2317 {
2318 uint32_t *dw = (uint32_t * restrict) dst;
2319
2320 dw[0] =
2321 __gen_field(values->CommandType, 29, 31) |
2322 __gen_field(values->CommandSubType, 27, 28) |
2323 __gen_field(values->_3DCommandOpcode, 24, 26) |
2324 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2325 __gen_field(values->DwordLength, 0, 7) |
2326 0;
2327
2328 uint64_t qw1 =
2329 __gen_offset(values->KernelStartPointer, 6, 63) |
2330 0;
2331
2332 dw[1] = qw1;
2333 dw[2] = qw1 >> 32;
2334
2335 dw[3] =
2336 __gen_field(values->SingleDomainPointDispatch, 31, 31) |
2337 __gen_field(values->VectorMaskEnable, 30, 30) |
2338 __gen_field(values->SamplerCount, 27, 29) |
2339 __gen_field(values->BindingTableEntryCount, 18, 25) |
2340 __gen_field(values->ThreadDispatchPriority, 17, 17) |
2341 __gen_field(values->FloatingPointMode, 16, 16) |
2342 __gen_field(values->AccessesUAV, 14, 14) |
2343 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2344 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
2345 0;
2346
2347 uint64_t qw4 =
2348 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
2349 __gen_field(values->PerThreadScratchSpace, 0, 3) |
2350 0;
2351
2352 dw[4] = qw4;
2353 dw[5] = qw4 >> 32;
2354
2355 dw[6] =
2356 __gen_field(values->DispatchGRFStartRegisterForURBData, 20, 24) |
2357 __gen_field(values->PatchURBEntryReadLength, 11, 17) |
2358 __gen_field(values->PatchURBEntryReadOffset, 4, 9) |
2359 0;
2360
2361 dw[7] =
2362 __gen_field(values->MaximumNumberofThreads, 21, 29) |
2363 __gen_field(values->StatisticsEnable, 10, 10) |
2364 __gen_field(values->SIMD8DispatchEnable, 3, 3) |
2365 __gen_field(values->ComputeWCoordinateEnable, 2, 2) |
2366 __gen_field(values->CacheDisable, 1, 1) |
2367 __gen_field(values->FunctionEnable, 0, 0) |
2368 0;
2369
2370 dw[8] =
2371 __gen_field(values->VertexURBEntryOutputReadOffset, 21, 26) |
2372 __gen_field(values->VertexURBEntryOutputLength, 16, 20) |
2373 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 8, 15) |
2374 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
2375 0;
2376
2377 }
2378
2379 #define GEN8_3DSTATE_GATHER_CONSTANT_DS_length_bias 0x00000002
2380 #define GEN8_3DSTATE_GATHER_CONSTANT_DS_header \
2381 .CommandType = 3, \
2382 .CommandSubType = 3, \
2383 ._3DCommandOpcode = 0, \
2384 ._3DCommandSubOpcode = 55
2385
2386 #define GEN8_3DSTATE_GATHER_CONSTANT_DS_length 0x00000000
2387
2388 #define GEN8_GATHER_CONSTANT_ENTRY_length 0x00000001
2389
2390 struct GEN8_GATHER_CONSTANT_ENTRY {
2391 uint32_t ConstantBufferOffset;
2392 uint32_t ChannelMask;
2393 uint32_t BindingTableIndexOffset;
2394 };
2395
2396 static inline void
2397 GEN8_GATHER_CONSTANT_ENTRY_pack(__gen_user_data *data, void * restrict dst,
2398 const struct GEN8_GATHER_CONSTANT_ENTRY * restrict values)
2399 {
2400 uint32_t *dw = (uint32_t * restrict) dst;
2401
2402 dw[0] =
2403 __gen_offset(values->ConstantBufferOffset, 8, 15) |
2404 __gen_field(values->ChannelMask, 4, 7) |
2405 __gen_field(values->BindingTableIndexOffset, 0, 3) |
2406 0;
2407
2408 }
2409
2410 struct GEN8_3DSTATE_GATHER_CONSTANT_DS {
2411 uint32_t CommandType;
2412 uint32_t CommandSubType;
2413 uint32_t _3DCommandOpcode;
2414 uint32_t _3DCommandSubOpcode;
2415 uint32_t DwordLength;
2416 uint32_t ConstantBufferValid;
2417 uint32_t ConstantBufferBindingTableBlock;
2418 uint32_t GatherBufferOffset;
2419 bool ConstantBufferDx9GenerateStall;
2420 /* variable length fields follow */
2421 };
2422
2423 static inline void
2424 GEN8_3DSTATE_GATHER_CONSTANT_DS_pack(__gen_user_data *data, void * restrict dst,
2425 const struct GEN8_3DSTATE_GATHER_CONSTANT_DS * restrict values)
2426 {
2427 uint32_t *dw = (uint32_t * restrict) dst;
2428
2429 dw[0] =
2430 __gen_field(values->CommandType, 29, 31) |
2431 __gen_field(values->CommandSubType, 27, 28) |
2432 __gen_field(values->_3DCommandOpcode, 24, 26) |
2433 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2434 __gen_field(values->DwordLength, 0, 7) |
2435 0;
2436
2437 dw[1] =
2438 __gen_field(values->ConstantBufferValid, 16, 31) |
2439 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2440 0;
2441
2442 dw[2] =
2443 __gen_offset(values->GatherBufferOffset, 6, 22) |
2444 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2445 0;
2446
2447 /* variable length fields follow */
2448 }
2449
2450 #define GEN8_3DSTATE_GATHER_CONSTANT_GS_length_bias 0x00000002
2451 #define GEN8_3DSTATE_GATHER_CONSTANT_GS_header \
2452 .CommandType = 3, \
2453 .CommandSubType = 3, \
2454 ._3DCommandOpcode = 0, \
2455 ._3DCommandSubOpcode = 53
2456
2457 #define GEN8_3DSTATE_GATHER_CONSTANT_GS_length 0x00000000
2458
2459 struct GEN8_3DSTATE_GATHER_CONSTANT_GS {
2460 uint32_t CommandType;
2461 uint32_t CommandSubType;
2462 uint32_t _3DCommandOpcode;
2463 uint32_t _3DCommandSubOpcode;
2464 uint32_t DwordLength;
2465 uint32_t ConstantBufferValid;
2466 uint32_t ConstantBufferBindingTableBlock;
2467 uint32_t GatherBufferOffset;
2468 bool ConstantBufferDx9GenerateStall;
2469 /* variable length fields follow */
2470 };
2471
2472 static inline void
2473 GEN8_3DSTATE_GATHER_CONSTANT_GS_pack(__gen_user_data *data, void * restrict dst,
2474 const struct GEN8_3DSTATE_GATHER_CONSTANT_GS * restrict values)
2475 {
2476 uint32_t *dw = (uint32_t * restrict) dst;
2477
2478 dw[0] =
2479 __gen_field(values->CommandType, 29, 31) |
2480 __gen_field(values->CommandSubType, 27, 28) |
2481 __gen_field(values->_3DCommandOpcode, 24, 26) |
2482 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2483 __gen_field(values->DwordLength, 0, 7) |
2484 0;
2485
2486 dw[1] =
2487 __gen_field(values->ConstantBufferValid, 16, 31) |
2488 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2489 0;
2490
2491 dw[2] =
2492 __gen_offset(values->GatherBufferOffset, 6, 22) |
2493 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2494 0;
2495
2496 /* variable length fields follow */
2497 }
2498
2499 #define GEN8_3DSTATE_GATHER_CONSTANT_HS_length_bias 0x00000002
2500 #define GEN8_3DSTATE_GATHER_CONSTANT_HS_header \
2501 .CommandType = 3, \
2502 .CommandSubType = 3, \
2503 ._3DCommandOpcode = 0, \
2504 ._3DCommandSubOpcode = 54
2505
2506 #define GEN8_3DSTATE_GATHER_CONSTANT_HS_length 0x00000000
2507
2508 struct GEN8_3DSTATE_GATHER_CONSTANT_HS {
2509 uint32_t CommandType;
2510 uint32_t CommandSubType;
2511 uint32_t _3DCommandOpcode;
2512 uint32_t _3DCommandSubOpcode;
2513 uint32_t DwordLength;
2514 uint32_t ConstantBufferValid;
2515 uint32_t ConstantBufferBindingTableBlock;
2516 uint32_t GatherBufferOffset;
2517 bool ConstantBufferDx9GenerateStall;
2518 /* variable length fields follow */
2519 };
2520
2521 static inline void
2522 GEN8_3DSTATE_GATHER_CONSTANT_HS_pack(__gen_user_data *data, void * restrict dst,
2523 const struct GEN8_3DSTATE_GATHER_CONSTANT_HS * restrict values)
2524 {
2525 uint32_t *dw = (uint32_t * restrict) dst;
2526
2527 dw[0] =
2528 __gen_field(values->CommandType, 29, 31) |
2529 __gen_field(values->CommandSubType, 27, 28) |
2530 __gen_field(values->_3DCommandOpcode, 24, 26) |
2531 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2532 __gen_field(values->DwordLength, 0, 7) |
2533 0;
2534
2535 dw[1] =
2536 __gen_field(values->ConstantBufferValid, 16, 31) |
2537 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2538 0;
2539
2540 dw[2] =
2541 __gen_offset(values->GatherBufferOffset, 6, 22) |
2542 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2543 0;
2544
2545 /* variable length fields follow */
2546 }
2547
2548 #define GEN8_3DSTATE_GATHER_CONSTANT_PS_length_bias 0x00000002
2549 #define GEN8_3DSTATE_GATHER_CONSTANT_PS_header \
2550 .CommandType = 3, \
2551 .CommandSubType = 3, \
2552 ._3DCommandOpcode = 0, \
2553 ._3DCommandSubOpcode = 56
2554
2555 #define GEN8_3DSTATE_GATHER_CONSTANT_PS_length 0x00000000
2556
2557 struct GEN8_3DSTATE_GATHER_CONSTANT_PS {
2558 uint32_t CommandType;
2559 uint32_t CommandSubType;
2560 uint32_t _3DCommandOpcode;
2561 uint32_t _3DCommandSubOpcode;
2562 uint32_t DwordLength;
2563 uint32_t ConstantBufferValid;
2564 uint32_t ConstantBufferBindingTableBlock;
2565 uint32_t GatherBufferOffset;
2566 bool ConstantBufferDx9GenerateStall;
2567 bool ConstantBufferDx9Enable;
2568 /* variable length fields follow */
2569 };
2570
2571 static inline void
2572 GEN8_3DSTATE_GATHER_CONSTANT_PS_pack(__gen_user_data *data, void * restrict dst,
2573 const struct GEN8_3DSTATE_GATHER_CONSTANT_PS * restrict values)
2574 {
2575 uint32_t *dw = (uint32_t * restrict) dst;
2576
2577 dw[0] =
2578 __gen_field(values->CommandType, 29, 31) |
2579 __gen_field(values->CommandSubType, 27, 28) |
2580 __gen_field(values->_3DCommandOpcode, 24, 26) |
2581 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2582 __gen_field(values->DwordLength, 0, 7) |
2583 0;
2584
2585 dw[1] =
2586 __gen_field(values->ConstantBufferValid, 16, 31) |
2587 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2588 0;
2589
2590 dw[2] =
2591 __gen_offset(values->GatherBufferOffset, 6, 22) |
2592 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2593 __gen_field(values->ConstantBufferDx9Enable, 4, 4) |
2594 0;
2595
2596 /* variable length fields follow */
2597 }
2598
2599 #define GEN8_3DSTATE_GATHER_CONSTANT_VS_length_bias 0x00000002
2600 #define GEN8_3DSTATE_GATHER_CONSTANT_VS_header \
2601 .CommandType = 3, \
2602 .CommandSubType = 3, \
2603 ._3DCommandOpcode = 0, \
2604 ._3DCommandSubOpcode = 52
2605
2606 #define GEN8_3DSTATE_GATHER_CONSTANT_VS_length 0x00000000
2607
2608 struct GEN8_3DSTATE_GATHER_CONSTANT_VS {
2609 uint32_t CommandType;
2610 uint32_t CommandSubType;
2611 uint32_t _3DCommandOpcode;
2612 uint32_t _3DCommandSubOpcode;
2613 uint32_t DwordLength;
2614 uint32_t ConstantBufferValid;
2615 uint32_t ConstantBufferBindingTableBlock;
2616 uint32_t GatherBufferOffset;
2617 bool ConstantBufferDx9GenerateStall;
2618 bool ConstantBufferDx9Enable;
2619 /* variable length fields follow */
2620 };
2621
2622 static inline void
2623 GEN8_3DSTATE_GATHER_CONSTANT_VS_pack(__gen_user_data *data, void * restrict dst,
2624 const struct GEN8_3DSTATE_GATHER_CONSTANT_VS * restrict values)
2625 {
2626 uint32_t *dw = (uint32_t * restrict) dst;
2627
2628 dw[0] =
2629 __gen_field(values->CommandType, 29, 31) |
2630 __gen_field(values->CommandSubType, 27, 28) |
2631 __gen_field(values->_3DCommandOpcode, 24, 26) |
2632 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2633 __gen_field(values->DwordLength, 0, 7) |
2634 0;
2635
2636 dw[1] =
2637 __gen_field(values->ConstantBufferValid, 16, 31) |
2638 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2639 0;
2640
2641 dw[2] =
2642 __gen_offset(values->GatherBufferOffset, 6, 22) |
2643 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2644 __gen_field(values->ConstantBufferDx9Enable, 4, 4) |
2645 0;
2646
2647 /* variable length fields follow */
2648 }
2649
2650 #define GEN8_3DSTATE_GATHER_POOL_ALLOC_length_bias 0x00000002
2651 #define GEN8_3DSTATE_GATHER_POOL_ALLOC_header \
2652 .CommandType = 3, \
2653 .CommandSubType = 3, \
2654 ._3DCommandOpcode = 1, \
2655 ._3DCommandSubOpcode = 26, \
2656 .DwordLength = 2
2657
2658 #define GEN8_3DSTATE_GATHER_POOL_ALLOC_length 0x00000004
2659
2660 struct GEN8_3DSTATE_GATHER_POOL_ALLOC {
2661 uint32_t CommandType;
2662 uint32_t CommandSubType;
2663 uint32_t _3DCommandOpcode;
2664 uint32_t _3DCommandSubOpcode;
2665 uint32_t DwordLength;
2666 __gen_address_type GatherPoolBaseAddress;
2667 bool GatherPoolEnable;
2668 struct GEN8_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
2669 uint32_t GatherPoolBufferSize;
2670 };
2671
2672 static inline void
2673 GEN8_3DSTATE_GATHER_POOL_ALLOC_pack(__gen_user_data *data, void * restrict dst,
2674 const struct GEN8_3DSTATE_GATHER_POOL_ALLOC * restrict values)
2675 {
2676 uint32_t *dw = (uint32_t * restrict) dst;
2677
2678 dw[0] =
2679 __gen_field(values->CommandType, 29, 31) |
2680 __gen_field(values->CommandSubType, 27, 28) |
2681 __gen_field(values->_3DCommandOpcode, 24, 26) |
2682 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2683 __gen_field(values->DwordLength, 0, 7) |
2684 0;
2685
2686 uint32_t dw_MemoryObjectControlState;
2687 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
2688 uint32_t dw1 =
2689 __gen_field(values->GatherPoolEnable, 11, 11) |
2690 __gen_field(dw_MemoryObjectControlState, 0, 6) |
2691 0;
2692
2693 uint64_t qw1 =
2694 __gen_combine_address(data, &dw[1], values->GatherPoolBaseAddress, dw1);
2695
2696 dw[1] = qw1;
2697 dw[2] = qw1 >> 32;
2698
2699 dw[3] =
2700 __gen_field(values->GatherPoolBufferSize, 12, 31) |
2701 0;
2702
2703 }
2704
2705 #define GEN8_3DSTATE_GS_length_bias 0x00000002
2706 #define GEN8_3DSTATE_GS_header \
2707 .CommandType = 3, \
2708 .CommandSubType = 3, \
2709 ._3DCommandOpcode = 0, \
2710 ._3DCommandSubOpcode = 17, \
2711 .DwordLength = 8
2712
2713 #define GEN8_3DSTATE_GS_length 0x0000000a
2714
2715 struct GEN8_3DSTATE_GS {
2716 uint32_t CommandType;
2717 uint32_t CommandSubType;
2718 uint32_t _3DCommandOpcode;
2719 uint32_t _3DCommandSubOpcode;
2720 uint32_t DwordLength;
2721 uint64_t KernelStartPointer;
2722 uint32_t SingleProgramFlow;
2723 #define Dmask 0
2724 #define Vmask 1
2725 uint32_t VectorMaskEnable;
2726 #define NoSamplers 0
2727 #define _14Samplers 1
2728 #define _58Samplers 2
2729 #define _912Samplers 3
2730 #define _1316Samplers 4
2731 uint32_t SamplerCount;
2732 uint32_t BindingTableEntryCount;
2733 #define Normal 0
2734 #define High 1
2735 uint32_t ThreadDispatchPriority;
2736 #define IEEE754 0
2737 #define Alternate 1
2738 uint32_t FloatingPointMode;
2739 bool IllegalOpcodeExceptionEnable;
2740 bool AccessesUAV;
2741 bool MaskStackExceptionEnable;
2742 bool SoftwareExceptionEnable;
2743 uint32_t ExpectedVertexCount;
2744 uint64_t ScratchSpaceBasePointer;
2745 uint32_t PerThreadScratchSpace;
2746 uint32_t OutputVertexSize;
2747 uint32_t OutputTopology;
2748 uint32_t VertexURBEntryReadLength;
2749 bool IncludeVertexHandles;
2750 uint32_t VertexURBEntryReadOffset;
2751 uint32_t DispatchGRFStartRegisterForURBData;
2752 uint32_t MaximumNumberofThreads;
2753 uint32_t ControlDataHeaderSize;
2754 uint32_t InstanceControl;
2755 uint32_t DefaultStreamId;
2756 #define DispatchModeSingle 0
2757 #define DispatchModeDualInstance 1
2758 #define DispatchModeDualObject 2
2759 #define DispatchModeSIMD8 3
2760 uint32_t DispatchMode;
2761 bool StatisticsEnable;
2762 uint32_t InvocationsIncrementValue;
2763 bool IncludePrimitiveID;
2764 uint32_t Hint;
2765 #define LEADING 0
2766 #define TRAILING 1
2767 uint32_t ReorderMode;
2768 bool DiscardAdjacency;
2769 bool Enable;
2770 #define CUT 0
2771 #define SID 1
2772 uint32_t ControlDataFormat;
2773 bool StaticOutput;
2774 uint32_t StaticOutputVertexCount;
2775 uint32_t VertexURBEntryOutputReadOffset;
2776 uint32_t VertexURBEntryOutputLength;
2777 uint32_t UserClipDistanceClipTestEnableBitmask;
2778 uint32_t UserClipDistanceCullTestEnableBitmask;
2779 };
2780
2781 static inline void
2782 GEN8_3DSTATE_GS_pack(__gen_user_data *data, void * restrict dst,
2783 const struct GEN8_3DSTATE_GS * restrict values)
2784 {
2785 uint32_t *dw = (uint32_t * restrict) dst;
2786
2787 dw[0] =
2788 __gen_field(values->CommandType, 29, 31) |
2789 __gen_field(values->CommandSubType, 27, 28) |
2790 __gen_field(values->_3DCommandOpcode, 24, 26) |
2791 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2792 __gen_field(values->DwordLength, 0, 7) |
2793 0;
2794
2795 uint64_t qw1 =
2796 __gen_offset(values->KernelStartPointer, 6, 63) |
2797 0;
2798
2799 dw[1] = qw1;
2800 dw[2] = qw1 >> 32;
2801
2802 dw[3] =
2803 __gen_field(values->SingleProgramFlow, 31, 31) |
2804 __gen_field(values->VectorMaskEnable, 30, 30) |
2805 __gen_field(values->SamplerCount, 27, 29) |
2806 __gen_field(values->BindingTableEntryCount, 18, 25) |
2807 __gen_field(values->ThreadDispatchPriority, 17, 17) |
2808 __gen_field(values->FloatingPointMode, 16, 16) |
2809 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2810 __gen_field(values->AccessesUAV, 12, 12) |
2811 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
2812 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
2813 __gen_field(values->ExpectedVertexCount, 0, 5) |
2814 0;
2815
2816 uint64_t qw4 =
2817 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
2818 __gen_field(values->PerThreadScratchSpace, 0, 3) |
2819 0;
2820
2821 dw[4] = qw4;
2822 dw[5] = qw4 >> 32;
2823
2824 dw[6] =
2825 __gen_field(values->OutputVertexSize, 23, 28) |
2826 __gen_field(values->OutputTopology, 17, 22) |
2827 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
2828 __gen_field(values->IncludeVertexHandles, 10, 10) |
2829 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
2830 __gen_field(values->DispatchGRFStartRegisterForURBData, 0, 3) |
2831 0;
2832
2833 dw[7] =
2834 __gen_field(values->MaximumNumberofThreads, 24, 31) |
2835 __gen_field(values->ControlDataHeaderSize, 20, 23) |
2836 __gen_field(values->InstanceControl, 15, 19) |
2837 __gen_field(values->DefaultStreamId, 13, 14) |
2838 __gen_field(values->DispatchMode, 11, 12) |
2839 __gen_field(values->StatisticsEnable, 10, 10) |
2840 __gen_field(values->InvocationsIncrementValue, 5, 9) |
2841 __gen_field(values->IncludePrimitiveID, 4, 4) |
2842 __gen_field(values->Hint, 3, 3) |
2843 __gen_field(values->ReorderMode, 2, 2) |
2844 __gen_field(values->DiscardAdjacency, 1, 1) |
2845 __gen_field(values->Enable, 0, 0) |
2846 0;
2847
2848 dw[8] =
2849 __gen_field(values->ControlDataFormat, 31, 31) |
2850 __gen_field(values->StaticOutput, 30, 30) |
2851 __gen_field(values->StaticOutputVertexCount, 16, 26) |
2852 0;
2853
2854 dw[9] =
2855 __gen_field(values->VertexURBEntryOutputReadOffset, 21, 26) |
2856 __gen_field(values->VertexURBEntryOutputLength, 16, 20) |
2857 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 8, 15) |
2858 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
2859 0;
2860
2861 }
2862
2863 #define GEN8_3DSTATE_HIER_DEPTH_BUFFER_length_bias 0x00000002
2864 #define GEN8_3DSTATE_HIER_DEPTH_BUFFER_header \
2865 .CommandType = 3, \
2866 .CommandSubType = 3, \
2867 ._3DCommandOpcode = 0, \
2868 ._3DCommandSubOpcode = 7, \
2869 .DwordLength = 3
2870
2871 #define GEN8_3DSTATE_HIER_DEPTH_BUFFER_length 0x00000005
2872
2873 struct GEN8_3DSTATE_HIER_DEPTH_BUFFER {
2874 uint32_t CommandType;
2875 uint32_t CommandSubType;
2876 uint32_t _3DCommandOpcode;
2877 uint32_t _3DCommandSubOpcode;
2878 uint32_t DwordLength;
2879 struct GEN8_MEMORY_OBJECT_CONTROL_STATE HierarchicalDepthBufferObjectControlState;
2880 uint32_t SurfacePitch;
2881 __gen_address_type SurfaceBaseAddress;
2882 uint32_t SurfaceQPitch;
2883 };
2884
2885 static inline void
2886 GEN8_3DSTATE_HIER_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
2887 const struct GEN8_3DSTATE_HIER_DEPTH_BUFFER * restrict values)
2888 {
2889 uint32_t *dw = (uint32_t * restrict) dst;
2890
2891 dw[0] =
2892 __gen_field(values->CommandType, 29, 31) |
2893 __gen_field(values->CommandSubType, 27, 28) |
2894 __gen_field(values->_3DCommandOpcode, 24, 26) |
2895 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2896 __gen_field(values->DwordLength, 0, 7) |
2897 0;
2898
2899 uint32_t dw_HierarchicalDepthBufferObjectControlState;
2900 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_HierarchicalDepthBufferObjectControlState, &values->HierarchicalDepthBufferObjectControlState);
2901 dw[1] =
2902 __gen_field(dw_HierarchicalDepthBufferObjectControlState, 25, 31) |
2903 __gen_field(values->SurfacePitch, 0, 16) |
2904 0;
2905
2906 uint32_t dw2 =
2907 0;
2908
2909 uint64_t qw2 =
2910 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
2911
2912 dw[2] = qw2;
2913 dw[3] = qw2 >> 32;
2914
2915 dw[4] =
2916 __gen_field(values->SurfaceQPitch, 0, 14) |
2917 0;
2918
2919 }
2920
2921 #define GEN8_3DSTATE_HS_length_bias 0x00000002
2922 #define GEN8_3DSTATE_HS_header \
2923 .CommandType = 3, \
2924 .CommandSubType = 3, \
2925 ._3DCommandOpcode = 0, \
2926 ._3DCommandSubOpcode = 27, \
2927 .DwordLength = 7
2928
2929 #define GEN8_3DSTATE_HS_length 0x00000009
2930
2931 struct GEN8_3DSTATE_HS {
2932 uint32_t CommandType;
2933 uint32_t CommandSubType;
2934 uint32_t _3DCommandOpcode;
2935 uint32_t _3DCommandSubOpcode;
2936 uint32_t DwordLength;
2937 #define NoSamplers 0
2938 #define _14Samplers 1
2939 #define _58Samplers 2
2940 #define _912Samplers 3
2941 #define _1316Samplers 4
2942 uint32_t SamplerCount;
2943 uint32_t BindingTableEntryCount;
2944 #define Normal 0
2945 #define High 1
2946 uint32_t ThreadDispatchPriority;
2947 #define IEEE754 0
2948 #define alternate 1
2949 uint32_t FloatingPointMode;
2950 bool IllegalOpcodeExceptionEnable;
2951 bool SoftwareExceptionEnable;
2952 bool Enable;
2953 bool StatisticsEnable;
2954 uint32_t MaximumNumberofThreads;
2955 uint32_t InstanceCount;
2956 uint64_t KernelStartPointer;
2957 uint64_t ScratchSpaceBasePointer;
2958 uint32_t PerThreadScratchSpace;
2959 bool SingleProgramFlow;
2960 #define Dmask 0
2961 #define Vmask 1
2962 uint32_t VectorMaskEnable;
2963 bool AccessesUAV;
2964 bool IncludeVertexHandles;
2965 uint32_t DispatchGRFStartRegisterForURBData;
2966 uint32_t VertexURBEntryReadLength;
2967 uint32_t VertexURBEntryReadOffset;
2968 };
2969
2970 static inline void
2971 GEN8_3DSTATE_HS_pack(__gen_user_data *data, void * restrict dst,
2972 const struct GEN8_3DSTATE_HS * restrict values)
2973 {
2974 uint32_t *dw = (uint32_t * restrict) dst;
2975
2976 dw[0] =
2977 __gen_field(values->CommandType, 29, 31) |
2978 __gen_field(values->CommandSubType, 27, 28) |
2979 __gen_field(values->_3DCommandOpcode, 24, 26) |
2980 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2981 __gen_field(values->DwordLength, 0, 7) |
2982 0;
2983
2984 dw[1] =
2985 __gen_field(values->SamplerCount, 27, 29) |
2986 __gen_field(values->BindingTableEntryCount, 18, 25) |
2987 __gen_field(values->ThreadDispatchPriority, 17, 17) |
2988 __gen_field(values->FloatingPointMode, 16, 16) |
2989 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2990 __gen_field(values->SoftwareExceptionEnable, 12, 12) |
2991 0;
2992
2993 dw[2] =
2994 __gen_field(values->Enable, 31, 31) |
2995 __gen_field(values->StatisticsEnable, 29, 29) |
2996 __gen_field(values->MaximumNumberofThreads, 8, 16) |
2997 __gen_field(values->InstanceCount, 0, 3) |
2998 0;
2999
3000 uint64_t qw3 =
3001 __gen_offset(values->KernelStartPointer, 6, 63) |
3002 0;
3003
3004 dw[3] = qw3;
3005 dw[4] = qw3 >> 32;
3006
3007 uint64_t qw5 =
3008 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
3009 __gen_field(values->PerThreadScratchSpace, 0, 3) |
3010 0;
3011
3012 dw[5] = qw5;
3013 dw[6] = qw5 >> 32;
3014
3015 dw[7] =
3016 __gen_field(values->SingleProgramFlow, 27, 27) |
3017 __gen_field(values->VectorMaskEnable, 26, 26) |
3018 __gen_field(values->AccessesUAV, 25, 25) |
3019 __gen_field(values->IncludeVertexHandles, 24, 24) |
3020 __gen_field(values->DispatchGRFStartRegisterForURBData, 19, 23) |
3021 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
3022 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
3023 0;
3024
3025 dw[8] =
3026 0;
3027
3028 }
3029
3030 #define GEN8_3DSTATE_INDEX_BUFFER_length_bias 0x00000002
3031 #define GEN8_3DSTATE_INDEX_BUFFER_header \
3032 .CommandType = 3, \
3033 .CommandSubType = 3, \
3034 ._3DCommandOpcode = 0, \
3035 ._3DCommandSubOpcode = 10, \
3036 .DwordLength = 3
3037
3038 #define GEN8_3DSTATE_INDEX_BUFFER_length 0x00000005
3039
3040 struct GEN8_3DSTATE_INDEX_BUFFER {
3041 uint32_t CommandType;
3042 uint32_t CommandSubType;
3043 uint32_t _3DCommandOpcode;
3044 uint32_t _3DCommandSubOpcode;
3045 uint32_t DwordLength;
3046 #define INDEX_BYTE 0
3047 #define INDEX_WORD 1
3048 #define INDEX_DWORD 2
3049 uint32_t IndexFormat;
3050 struct GEN8_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
3051 __gen_address_type BufferStartingAddress;
3052 uint32_t BufferSize;
3053 };
3054
3055 static inline void
3056 GEN8_3DSTATE_INDEX_BUFFER_pack(__gen_user_data *data, void * restrict dst,
3057 const struct GEN8_3DSTATE_INDEX_BUFFER * restrict values)
3058 {
3059 uint32_t *dw = (uint32_t * restrict) dst;
3060
3061 dw[0] =
3062 __gen_field(values->CommandType, 29, 31) |
3063 __gen_field(values->CommandSubType, 27, 28) |
3064 __gen_field(values->_3DCommandOpcode, 24, 26) |
3065 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3066 __gen_field(values->DwordLength, 0, 7) |
3067 0;
3068
3069 uint32_t dw_MemoryObjectControlState;
3070 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
3071 dw[1] =
3072 __gen_field(values->IndexFormat, 8, 9) |
3073 __gen_field(dw_MemoryObjectControlState, 0, 6) |
3074 0;
3075
3076 uint32_t dw2 =
3077 0;
3078
3079 uint64_t qw2 =
3080 __gen_combine_address(data, &dw[2], values->BufferStartingAddress, dw2);
3081
3082 dw[2] = qw2;
3083 dw[3] = qw2 >> 32;
3084
3085 dw[4] =
3086 __gen_field(values->BufferSize, 0, 31) |
3087 0;
3088
3089 }
3090
3091 #define GEN8_3DSTATE_LINE_STIPPLE_length_bias 0x00000002
3092 #define GEN8_3DSTATE_LINE_STIPPLE_header \
3093 .CommandType = 3, \
3094 .CommandSubType = 3, \
3095 ._3DCommandOpcode = 1, \
3096 ._3DCommandSubOpcode = 8, \
3097 .DwordLength = 1
3098
3099 #define GEN8_3DSTATE_LINE_STIPPLE_length 0x00000003
3100
3101 struct GEN8_3DSTATE_LINE_STIPPLE {
3102 uint32_t CommandType;
3103 uint32_t CommandSubType;
3104 uint32_t _3DCommandOpcode;
3105 uint32_t _3DCommandSubOpcode;
3106 uint32_t DwordLength;
3107 bool ModifyEnableCurrentRepeatCounterCurrentStippleIndex;
3108 uint32_t CurrentRepeatCounter;
3109 uint32_t CurrentStippleIndex;
3110 uint32_t LineStipplePattern;
3111 float LineStippleInverseRepeatCount;
3112 uint32_t LineStippleRepeatCount;
3113 };
3114
3115 static inline void
3116 GEN8_3DSTATE_LINE_STIPPLE_pack(__gen_user_data *data, void * restrict dst,
3117 const struct GEN8_3DSTATE_LINE_STIPPLE * restrict values)
3118 {
3119 uint32_t *dw = (uint32_t * restrict) dst;
3120
3121 dw[0] =
3122 __gen_field(values->CommandType, 29, 31) |
3123 __gen_field(values->CommandSubType, 27, 28) |
3124 __gen_field(values->_3DCommandOpcode, 24, 26) |
3125 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3126 __gen_field(values->DwordLength, 0, 7) |
3127 0;
3128
3129 dw[1] =
3130 __gen_field(values->ModifyEnableCurrentRepeatCounterCurrentStippleIndex, 31, 31) |
3131 __gen_field(values->CurrentRepeatCounter, 21, 29) |
3132 __gen_field(values->CurrentStippleIndex, 16, 19) |
3133 __gen_field(values->LineStipplePattern, 0, 15) |
3134 0;
3135
3136 dw[2] =
3137 __gen_field(values->LineStippleInverseRepeatCount * (1 << 16), 15, 31) |
3138 __gen_field(values->LineStippleRepeatCount, 0, 8) |
3139 0;
3140
3141 }
3142
3143 #define GEN8_3DSTATE_MONOFILTER_SIZE_length_bias 0x00000002
3144 #define GEN8_3DSTATE_MONOFILTER_SIZE_header \
3145 .CommandType = 3, \
3146 .CommandSubType = 3, \
3147 ._3DCommandOpcode = 1, \
3148 ._3DCommandSubOpcode = 17, \
3149 .DwordLength = 0
3150
3151 #define GEN8_3DSTATE_MONOFILTER_SIZE_length 0x00000002
3152
3153 struct GEN8_3DSTATE_MONOFILTER_SIZE {
3154 uint32_t CommandType;
3155 uint32_t CommandSubType;
3156 uint32_t _3DCommandOpcode;
3157 uint32_t _3DCommandSubOpcode;
3158 uint32_t DwordLength;
3159 uint32_t MonochromeFilterWidth;
3160 uint32_t MonochromeFilterHeight;
3161 };
3162
3163 static inline void
3164 GEN8_3DSTATE_MONOFILTER_SIZE_pack(__gen_user_data *data, void * restrict dst,
3165 const struct GEN8_3DSTATE_MONOFILTER_SIZE * restrict values)
3166 {
3167 uint32_t *dw = (uint32_t * restrict) dst;
3168
3169 dw[0] =
3170 __gen_field(values->CommandType, 29, 31) |
3171 __gen_field(values->CommandSubType, 27, 28) |
3172 __gen_field(values->_3DCommandOpcode, 24, 26) |
3173 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3174 __gen_field(values->DwordLength, 0, 7) |
3175 0;
3176
3177 dw[1] =
3178 __gen_field(values->MonochromeFilterWidth, 3, 5) |
3179 __gen_field(values->MonochromeFilterHeight, 0, 2) |
3180 0;
3181
3182 }
3183
3184 #define GEN8_3DSTATE_MULTISAMPLE_length_bias 0x00000002
3185 #define GEN8_3DSTATE_MULTISAMPLE_header \
3186 .CommandType = 3, \
3187 .CommandSubType = 3, \
3188 ._3DCommandOpcode = 0, \
3189 ._3DCommandSubOpcode = 13, \
3190 .DwordLength = 0
3191
3192 #define GEN8_3DSTATE_MULTISAMPLE_length 0x00000002
3193
3194 struct GEN8_3DSTATE_MULTISAMPLE {
3195 uint32_t CommandType;
3196 uint32_t CommandSubType;
3197 uint32_t _3DCommandOpcode;
3198 uint32_t _3DCommandSubOpcode;
3199 uint32_t DwordLength;
3200 uint32_t PixelPositionOffsetEnable;
3201 #define CENTER 0
3202 #define UL_CORNER 1
3203 uint32_t PixelLocation;
3204 uint32_t NumberofMultisamples;
3205 };
3206
3207 static inline void
3208 GEN8_3DSTATE_MULTISAMPLE_pack(__gen_user_data *data, void * restrict dst,
3209 const struct GEN8_3DSTATE_MULTISAMPLE * restrict values)
3210 {
3211 uint32_t *dw = (uint32_t * restrict) dst;
3212
3213 dw[0] =
3214 __gen_field(values->CommandType, 29, 31) |
3215 __gen_field(values->CommandSubType, 27, 28) |
3216 __gen_field(values->_3DCommandOpcode, 24, 26) |
3217 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3218 __gen_field(values->DwordLength, 0, 7) |
3219 0;
3220
3221 dw[1] =
3222 __gen_field(values->PixelPositionOffsetEnable, 5, 5) |
3223 __gen_field(values->PixelLocation, 4, 4) |
3224 __gen_field(values->NumberofMultisamples, 1, 3) |
3225 0;
3226
3227 }
3228
3229 #define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_length_bias 0x00000002
3230 #define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_header \
3231 .CommandType = 3, \
3232 .CommandSubType = 3, \
3233 ._3DCommandOpcode = 1, \
3234 ._3DCommandSubOpcode = 6, \
3235 .DwordLength = 0
3236
3237 #define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_length 0x00000002
3238
3239 struct GEN8_3DSTATE_POLY_STIPPLE_OFFSET {
3240 uint32_t CommandType;
3241 uint32_t CommandSubType;
3242 uint32_t _3DCommandOpcode;
3243 uint32_t _3DCommandSubOpcode;
3244 uint32_t DwordLength;
3245 uint32_t PolygonStippleXOffset;
3246 uint32_t PolygonStippleYOffset;
3247 };
3248
3249 static inline void
3250 GEN8_3DSTATE_POLY_STIPPLE_OFFSET_pack(__gen_user_data *data, void * restrict dst,
3251 const struct GEN8_3DSTATE_POLY_STIPPLE_OFFSET * restrict values)
3252 {
3253 uint32_t *dw = (uint32_t * restrict) dst;
3254
3255 dw[0] =
3256 __gen_field(values->CommandType, 29, 31) |
3257 __gen_field(values->CommandSubType, 27, 28) |
3258 __gen_field(values->_3DCommandOpcode, 24, 26) |
3259 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3260 __gen_field(values->DwordLength, 0, 7) |
3261 0;
3262
3263 dw[1] =
3264 __gen_field(values->PolygonStippleXOffset, 8, 12) |
3265 __gen_field(values->PolygonStippleYOffset, 0, 4) |
3266 0;
3267
3268 }
3269
3270 #define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_length_bias 0x00000002
3271 #define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_header\
3272 .CommandType = 3, \
3273 .CommandSubType = 3, \
3274 ._3DCommandOpcode = 1, \
3275 ._3DCommandSubOpcode = 7, \
3276 .DwordLength = 31
3277
3278 #define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_length 0x00000021
3279
3280 struct GEN8_3DSTATE_POLY_STIPPLE_PATTERN {
3281 uint32_t CommandType;
3282 uint32_t CommandSubType;
3283 uint32_t _3DCommandOpcode;
3284 uint32_t _3DCommandSubOpcode;
3285 uint32_t DwordLength;
3286 uint32_t PatternRow[32];
3287 };
3288
3289 static inline void
3290 GEN8_3DSTATE_POLY_STIPPLE_PATTERN_pack(__gen_user_data *data, void * restrict dst,
3291 const struct GEN8_3DSTATE_POLY_STIPPLE_PATTERN * restrict values)
3292 {
3293 uint32_t *dw = (uint32_t * restrict) dst;
3294
3295 dw[0] =
3296 __gen_field(values->CommandType, 29, 31) |
3297 __gen_field(values->CommandSubType, 27, 28) |
3298 __gen_field(values->_3DCommandOpcode, 24, 26) |
3299 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3300 __gen_field(values->DwordLength, 0, 7) |
3301 0;
3302
3303 for (uint32_t i = 0, j = 1; i < 32; i += 1, j++) {
3304 dw[j] =
3305 __gen_field(values->PatternRow[i + 0], 0, 31) |
3306 0;
3307 }
3308
3309 }
3310
3311 #define GEN8_3DSTATE_PS_length_bias 0x00000002
3312 #define GEN8_3DSTATE_PS_header \
3313 .CommandType = 3, \
3314 .CommandSubType = 3, \
3315 ._3DCommandOpcode = 0, \
3316 ._3DCommandSubOpcode = 32, \
3317 .DwordLength = 10
3318
3319 #define GEN8_3DSTATE_PS_length 0x0000000c
3320
3321 struct GEN8_3DSTATE_PS {
3322 uint32_t CommandType;
3323 uint32_t CommandSubType;
3324 uint32_t _3DCommandOpcode;
3325 uint32_t _3DCommandSubOpcode;
3326 uint32_t DwordLength;
3327 uint64_t KernelStartPointer0;
3328 #define Multiple 0
3329 #define Single 1
3330 uint32_t SingleProgramFlow;
3331 #define Dmask 0
3332 #define Vmask 1
3333 uint32_t VectorMaskEnable;
3334 #define NoSamplers 0
3335 #define _14Samplers 1
3336 #define _58Samplers 2
3337 #define _912Samplers 3
3338 #define _1316Samplers 4
3339 uint32_t SamplerCount;
3340 #define FlushedtoZero 0
3341 #define Retained 1
3342 uint32_t SinglePrecisionDenormalMode;
3343 uint32_t BindingTableEntryCount;
3344 #define Normal 0
3345 #define High 1
3346 uint32_t ThreadDispatchPriority;
3347 #define IEEE754 0
3348 #define Alternate 1
3349 uint32_t FloatingPointMode;
3350 #define RTNE 0
3351 #define RU 1
3352 #define RD 2
3353 #define RTZ 3
3354 uint32_t RoundingMode;
3355 bool IllegalOpcodeExceptionEnable;
3356 bool MaskStackExceptionEnable;
3357 bool SoftwareExceptionEnable;
3358 uint64_t ScratchSpaceBasePointer;
3359 uint32_t PerThreadScratchSpace;
3360 uint32_t MaximumNumberofThreadsPerPSD;
3361 bool PushConstantEnable;
3362 bool RenderTargetFastClearEnable;
3363 bool RenderTargetResolveEnable;
3364 #define POSOFFSET_NONE 0
3365 #define POSOFFSET_CENTROID 2
3366 #define POSOFFSET_SAMPLE 3
3367 uint32_t PositionXYOffsetSelect;
3368 bool _32PixelDispatchEnable;
3369 bool _16PixelDispatchEnable;
3370 bool _8PixelDispatchEnable;
3371 uint32_t DispatchGRFStartRegisterForConstantSetupData0;
3372 uint32_t DispatchGRFStartRegisterForConstantSetupData1;
3373 uint32_t DispatchGRFStartRegisterForConstantSetupData2;
3374 uint64_t KernelStartPointer1;
3375 uint64_t KernelStartPointer2;
3376 };
3377
3378 static inline void
3379 GEN8_3DSTATE_PS_pack(__gen_user_data *data, void * restrict dst,
3380 const struct GEN8_3DSTATE_PS * restrict values)
3381 {
3382 uint32_t *dw = (uint32_t * restrict) dst;
3383
3384 dw[0] =
3385 __gen_field(values->CommandType, 29, 31) |
3386 __gen_field(values->CommandSubType, 27, 28) |
3387 __gen_field(values->_3DCommandOpcode, 24, 26) |
3388 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3389 __gen_field(values->DwordLength, 0, 7) |
3390 0;
3391
3392 uint64_t qw1 =
3393 __gen_offset(values->KernelStartPointer0, 6, 63) |
3394 0;
3395
3396 dw[1] = qw1;
3397 dw[2] = qw1 >> 32;
3398
3399 dw[3] =
3400 __gen_field(values->SingleProgramFlow, 31, 31) |
3401 __gen_field(values->VectorMaskEnable, 30, 30) |
3402 __gen_field(values->SamplerCount, 27, 29) |
3403 __gen_field(values->SinglePrecisionDenormalMode, 26, 26) |
3404 __gen_field(values->BindingTableEntryCount, 18, 25) |
3405 __gen_field(values->ThreadDispatchPriority, 17, 17) |
3406 __gen_field(values->FloatingPointMode, 16, 16) |
3407 __gen_field(values->RoundingMode, 14, 15) |
3408 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
3409 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
3410 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
3411 0;
3412
3413 uint64_t qw4 =
3414 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
3415 __gen_field(values->PerThreadScratchSpace, 0, 3) |
3416 0;
3417
3418 dw[4] = qw4;
3419 dw[5] = qw4 >> 32;
3420
3421 dw[6] =
3422 __gen_field(values->MaximumNumberofThreadsPerPSD, 23, 31) |
3423 __gen_field(values->PushConstantEnable, 11, 11) |
3424 __gen_field(values->RenderTargetFastClearEnable, 8, 8) |
3425 __gen_field(values->RenderTargetResolveEnable, 6, 6) |
3426 __gen_field(values->PositionXYOffsetSelect, 3, 4) |
3427 __gen_field(values->_32PixelDispatchEnable, 2, 2) |
3428 __gen_field(values->_16PixelDispatchEnable, 1, 1) |
3429 __gen_field(values->_8PixelDispatchEnable, 0, 0) |
3430 0;
3431
3432 dw[7] =
3433 __gen_field(values->DispatchGRFStartRegisterForConstantSetupData0, 16, 22) |
3434 __gen_field(values->DispatchGRFStartRegisterForConstantSetupData1, 8, 14) |
3435 __gen_field(values->DispatchGRFStartRegisterForConstantSetupData2, 0, 6) |
3436 0;
3437
3438 uint64_t qw8 =
3439 __gen_offset(values->KernelStartPointer1, 6, 63) |
3440 0;
3441
3442 dw[8] = qw8;
3443 dw[9] = qw8 >> 32;
3444
3445 uint64_t qw10 =
3446 __gen_offset(values->KernelStartPointer2, 6, 63) |
3447 0;
3448
3449 dw[10] = qw10;
3450 dw[11] = qw10 >> 32;
3451
3452 }
3453
3454 #define GEN8_3DSTATE_PS_BLEND_length_bias 0x00000002
3455 #define GEN8_3DSTATE_PS_BLEND_header \
3456 .CommandType = 3, \
3457 .CommandSubType = 3, \
3458 ._3DCommandOpcode = 0, \
3459 ._3DCommandSubOpcode = 77, \
3460 .DwordLength = 0
3461
3462 #define GEN8_3DSTATE_PS_BLEND_length 0x00000002
3463
3464 struct GEN8_3DSTATE_PS_BLEND {
3465 uint32_t CommandType;
3466 uint32_t CommandSubType;
3467 uint32_t _3DCommandOpcode;
3468 uint32_t _3DCommandSubOpcode;
3469 uint32_t DwordLength;
3470 bool AlphaToCoverageEnable;
3471 bool HasWriteableRT;
3472 bool ColorBufferBlendEnable;
3473 uint32_t SourceAlphaBlendFactor;
3474 uint32_t DestinationAlphaBlendFactor;
3475 uint32_t SourceBlendFactor;
3476 uint32_t DestinationBlendFactor;
3477 bool AlphaTestEnable;
3478 bool IndependentAlphaBlendEnable;
3479 };
3480
3481 static inline void
3482 GEN8_3DSTATE_PS_BLEND_pack(__gen_user_data *data, void * restrict dst,
3483 const struct GEN8_3DSTATE_PS_BLEND * restrict values)
3484 {
3485 uint32_t *dw = (uint32_t * restrict) dst;
3486
3487 dw[0] =
3488 __gen_field(values->CommandType, 29, 31) |
3489 __gen_field(values->CommandSubType, 27, 28) |
3490 __gen_field(values->_3DCommandOpcode, 24, 26) |
3491 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3492 __gen_field(values->DwordLength, 0, 7) |
3493 0;
3494
3495 dw[1] =
3496 __gen_field(values->AlphaToCoverageEnable, 31, 31) |
3497 __gen_field(values->HasWriteableRT, 30, 30) |
3498 __gen_field(values->ColorBufferBlendEnable, 29, 29) |
3499 __gen_field(values->SourceAlphaBlendFactor, 24, 28) |
3500 __gen_field(values->DestinationAlphaBlendFactor, 19, 23) |
3501 __gen_field(values->SourceBlendFactor, 14, 18) |
3502 __gen_field(values->DestinationBlendFactor, 9, 13) |
3503 __gen_field(values->AlphaTestEnable, 8, 8) |
3504 __gen_field(values->IndependentAlphaBlendEnable, 7, 7) |
3505 0;
3506
3507 }
3508
3509 #define GEN8_3DSTATE_PS_EXTRA_length_bias 0x00000002
3510 #define GEN8_3DSTATE_PS_EXTRA_header \
3511 .CommandType = 3, \
3512 .CommandSubType = 3, \
3513 ._3DCommandOpcode = 0, \
3514 ._3DCommandSubOpcode = 79, \
3515 .DwordLength = 0
3516
3517 #define GEN8_3DSTATE_PS_EXTRA_length 0x00000002
3518
3519 struct GEN8_3DSTATE_PS_EXTRA {
3520 uint32_t CommandType;
3521 uint32_t CommandSubType;
3522 uint32_t _3DCommandOpcode;
3523 uint32_t _3DCommandSubOpcode;
3524 uint32_t DwordLength;
3525 bool PixelShaderValid;
3526 bool PixelShaderDoesnotwritetoRT;
3527 bool oMaskPresenttoRenderTarget;
3528 bool PixelShaderKillsPixel;
3529 #define PSCDEPTH_OFF 0
3530 #define PSCDEPTH_ON 1
3531 #define PSCDEPTH_ON_GE 2
3532 #define PSCDEPTH_ON_LE 3
3533 uint32_t PixelShaderComputedDepthMode;
3534 bool ForceComputedDepth;
3535 bool PixelShaderUsesSourceDepth;
3536 bool PixelShaderUsesSourceW;
3537 uint32_t Removed;
3538 bool AttributeEnable;
3539 bool PixelShaderDisablesAlphaToCoverage;
3540 bool PixelShaderIsPerSample;
3541 bool PixelShaderHasUAV;
3542 bool PixelShaderUsesInputCoverageMask;
3543 };
3544
3545 static inline void
3546 GEN8_3DSTATE_PS_EXTRA_pack(__gen_user_data *data, void * restrict dst,
3547 const struct GEN8_3DSTATE_PS_EXTRA * restrict values)
3548 {
3549 uint32_t *dw = (uint32_t * restrict) dst;
3550
3551 dw[0] =
3552 __gen_field(values->CommandType, 29, 31) |
3553 __gen_field(values->CommandSubType, 27, 28) |
3554 __gen_field(values->_3DCommandOpcode, 24, 26) |
3555 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3556 __gen_field(values->DwordLength, 0, 7) |
3557 0;
3558
3559 dw[1] =
3560 __gen_field(values->PixelShaderValid, 31, 31) |
3561 __gen_field(values->PixelShaderDoesnotwritetoRT, 30, 30) |
3562 __gen_field(values->oMaskPresenttoRenderTarget, 29, 29) |
3563 __gen_field(values->PixelShaderKillsPixel, 28, 28) |
3564 __gen_field(values->PixelShaderComputedDepthMode, 26, 27) |
3565 __gen_field(values->ForceComputedDepth, 25, 25) |
3566 __gen_field(values->PixelShaderUsesSourceDepth, 24, 24) |
3567 __gen_field(values->PixelShaderUsesSourceW, 23, 23) |
3568 __gen_field(values->Removed, 17, 17) |
3569 __gen_field(values->AttributeEnable, 8, 8) |
3570 __gen_field(values->PixelShaderDisablesAlphaToCoverage, 7, 7) |
3571 __gen_field(values->PixelShaderIsPerSample, 6, 6) |
3572 __gen_field(values->PixelShaderHasUAV, 2, 2) |
3573 __gen_field(values->PixelShaderUsesInputCoverageMask, 1, 1) |
3574 0;
3575
3576 }
3577
3578 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length_bias 0x00000002
3579 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_header\
3580 .CommandType = 3, \
3581 .CommandSubType = 3, \
3582 ._3DCommandOpcode = 1, \
3583 ._3DCommandSubOpcode = 20, \
3584 .DwordLength = 0
3585
3586 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length 0x00000002
3587
3588 struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS {
3589 uint32_t CommandType;
3590 uint32_t CommandSubType;
3591 uint32_t _3DCommandOpcode;
3592 uint32_t _3DCommandSubOpcode;
3593 uint32_t DwordLength;
3594 uint32_t ConstantBufferOffset;
3595 uint32_t ConstantBufferSize;
3596 };
3597
3598 static inline void
3599 GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_pack(__gen_user_data *data, void * restrict dst,
3600 const struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS * restrict values)
3601 {
3602 uint32_t *dw = (uint32_t * restrict) dst;
3603
3604 dw[0] =
3605 __gen_field(values->CommandType, 29, 31) |
3606 __gen_field(values->CommandSubType, 27, 28) |
3607 __gen_field(values->_3DCommandOpcode, 24, 26) |
3608 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3609 __gen_field(values->DwordLength, 0, 7) |
3610 0;
3611
3612 dw[1] =
3613 __gen_field(values->ConstantBufferOffset, 16, 20) |
3614 __gen_field(values->ConstantBufferSize, 0, 5) |
3615 0;
3616
3617 }
3618
3619 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length_bias 0x00000002
3620 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_header\
3621 .CommandType = 3, \
3622 .CommandSubType = 3, \
3623 ._3DCommandOpcode = 1, \
3624 ._3DCommandSubOpcode = 21, \
3625 .DwordLength = 0
3626
3627 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length 0x00000002
3628
3629 struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS {
3630 uint32_t CommandType;
3631 uint32_t CommandSubType;
3632 uint32_t _3DCommandOpcode;
3633 uint32_t _3DCommandSubOpcode;
3634 uint32_t DwordLength;
3635 uint32_t ConstantBufferOffset;
3636 uint32_t ConstantBufferSize;
3637 };
3638
3639 static inline void
3640 GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_pack(__gen_user_data *data, void * restrict dst,
3641 const struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS * restrict values)
3642 {
3643 uint32_t *dw = (uint32_t * restrict) dst;
3644
3645 dw[0] =
3646 __gen_field(values->CommandType, 29, 31) |
3647 __gen_field(values->CommandSubType, 27, 28) |
3648 __gen_field(values->_3DCommandOpcode, 24, 26) |
3649 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3650 __gen_field(values->DwordLength, 0, 7) |
3651 0;
3652
3653 dw[1] =
3654 __gen_field(values->ConstantBufferOffset, 16, 20) |
3655 __gen_field(values->ConstantBufferSize, 0, 5) |
3656 0;
3657
3658 }
3659
3660 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length_bias 0x00000002
3661 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_header\
3662 .CommandType = 3, \
3663 .CommandSubType = 3, \
3664 ._3DCommandOpcode = 1, \
3665 ._3DCommandSubOpcode = 19, \
3666 .DwordLength = 0
3667
3668 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length 0x00000002
3669
3670 struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS {
3671 uint32_t CommandType;
3672 uint32_t CommandSubType;
3673 uint32_t _3DCommandOpcode;
3674 uint32_t _3DCommandSubOpcode;
3675 uint32_t DwordLength;
3676 uint32_t ConstantBufferOffset;
3677 uint32_t ConstantBufferSize;
3678 };
3679
3680 static inline void
3681 GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_pack(__gen_user_data *data, void * restrict dst,
3682 const struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS * restrict values)
3683 {
3684 uint32_t *dw = (uint32_t * restrict) dst;
3685
3686 dw[0] =
3687 __gen_field(values->CommandType, 29, 31) |
3688 __gen_field(values->CommandSubType, 27, 28) |
3689 __gen_field(values->_3DCommandOpcode, 24, 26) |
3690 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3691 __gen_field(values->DwordLength, 0, 7) |
3692 0;
3693
3694 dw[1] =
3695 __gen_field(values->ConstantBufferOffset, 16, 20) |
3696 __gen_field(values->ConstantBufferSize, 0, 5) |
3697 0;
3698
3699 }
3700
3701 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length_bias 0x00000002
3702 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_header\
3703 .CommandType = 3, \
3704 .CommandSubType = 3, \
3705 ._3DCommandOpcode = 1, \
3706 ._3DCommandSubOpcode = 22, \
3707 .DwordLength = 0
3708
3709 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length 0x00000002
3710
3711 struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS {
3712 uint32_t CommandType;
3713 uint32_t CommandSubType;
3714 uint32_t _3DCommandOpcode;
3715 uint32_t _3DCommandSubOpcode;
3716 uint32_t DwordLength;
3717 uint32_t ConstantBufferOffset;
3718 uint32_t ConstantBufferSize;
3719 };
3720
3721 static inline void
3722 GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_pack(__gen_user_data *data, void * restrict dst,
3723 const struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS * restrict values)
3724 {
3725 uint32_t *dw = (uint32_t * restrict) dst;
3726
3727 dw[0] =
3728 __gen_field(values->CommandType, 29, 31) |
3729 __gen_field(values->CommandSubType, 27, 28) |
3730 __gen_field(values->_3DCommandOpcode, 24, 26) |
3731 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3732 __gen_field(values->DwordLength, 0, 7) |
3733 0;
3734
3735 dw[1] =
3736 __gen_field(values->ConstantBufferOffset, 16, 20) |
3737 __gen_field(values->ConstantBufferSize, 0, 5) |
3738 0;
3739
3740 }
3741
3742 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length_bias 0x00000002
3743 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_header\
3744 .CommandType = 3, \
3745 .CommandSubType = 3, \
3746 ._3DCommandOpcode = 1, \
3747 ._3DCommandSubOpcode = 18, \
3748 .DwordLength = 0
3749
3750 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length 0x00000002
3751
3752 struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS {
3753 uint32_t CommandType;
3754 uint32_t CommandSubType;
3755 uint32_t _3DCommandOpcode;
3756 uint32_t _3DCommandSubOpcode;
3757 uint32_t DwordLength;
3758 uint32_t ConstantBufferOffset;
3759 uint32_t ConstantBufferSize;
3760 };
3761
3762 static inline void
3763 GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_pack(__gen_user_data *data, void * restrict dst,
3764 const struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS * restrict values)
3765 {
3766 uint32_t *dw = (uint32_t * restrict) dst;
3767
3768 dw[0] =
3769 __gen_field(values->CommandType, 29, 31) |
3770 __gen_field(values->CommandSubType, 27, 28) |
3771 __gen_field(values->_3DCommandOpcode, 24, 26) |
3772 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3773 __gen_field(values->DwordLength, 0, 7) |
3774 0;
3775
3776 dw[1] =
3777 __gen_field(values->ConstantBufferOffset, 16, 20) |
3778 __gen_field(values->ConstantBufferSize, 0, 5) |
3779 0;
3780
3781 }
3782
3783 #define GEN8_3DSTATE_RASTER_length_bias 0x00000002
3784 #define GEN8_3DSTATE_RASTER_header \
3785 .CommandType = 3, \
3786 .CommandSubType = 3, \
3787 ._3DCommandOpcode = 0, \
3788 ._3DCommandSubOpcode = 80, \
3789 .DwordLength = 3
3790
3791 #define GEN8_3DSTATE_RASTER_length 0x00000005
3792
3793 struct GEN8_3DSTATE_RASTER {
3794 uint32_t CommandType;
3795 uint32_t CommandSubType;
3796 uint32_t _3DCommandOpcode;
3797 uint32_t _3DCommandSubOpcode;
3798 uint32_t DwordLength;
3799 #define DX9OGL 0
3800 #define DX100 1
3801 #define DX101 2
3802 uint32_t APIMode;
3803 #define Clockwise 0
3804 #define CounterClockwise 1
3805 uint32_t FrontWinding;
3806 #define FSC_NUMRASTSAMPLES_0 0
3807 #define FSC_NUMRASTSAMPLES_1 1
3808 #define FSC_NUMRASTSAMPLES_2 2
3809 #define FSC_NUMRASTSAMPLES_4 3
3810 #define FSC_NUMRASTSAMPLES_8 4
3811 #define FSC_NUMRASTSAMPLES_16 5
3812 uint32_t ForcedSampleCount;
3813 #define CULLMODE_BOTH 0
3814 #define CULLMODE_NONE 1
3815 #define CULLMODE_FRONT 2
3816 #define CULLMODE_BACK 3
3817 uint32_t CullMode;
3818 #define Normal 0
3819 #define Force 1
3820 uint32_t ForceMultisampling;
3821 bool SmoothPointEnable;
3822 bool DXMultisampleRasterizationEnable;
3823 #define MSRASTMODE_OFF_PIXEL 0
3824 #define MSRASTMODE_OFF_PATTERN 1
3825 #define MSRASTMODE_ON_PIXEL 2
3826 #define MSRASTMODE_ON_PATTERN 3
3827 uint32_t DXMultisampleRasterizationMode;
3828 bool GlobalDepthOffsetEnableSolid;
3829 bool GlobalDepthOffsetEnableWireframe;
3830 bool GlobalDepthOffsetEnablePoint;
3831 #define RASTER_SOLID 0
3832 #define RASTER_WIREFRAME 1
3833 #define RASTER_POINT 2
3834 uint32_t FrontFaceFillMode;
3835 #define RASTER_SOLID 0
3836 #define RASTER_WIREFRAME 1
3837 #define RASTER_POINT 2
3838 uint32_t BackFaceFillMode;
3839 bool AntialiasingEnable;
3840 bool ScissorRectangleEnable;
3841 bool ViewportZClipTestEnable;
3842 float GlobalDepthOffsetConstant;
3843 float GlobalDepthOffsetScale;
3844 float GlobalDepthOffsetClamp;
3845 };
3846
3847 static inline void
3848 GEN8_3DSTATE_RASTER_pack(__gen_user_data *data, void * restrict dst,
3849 const struct GEN8_3DSTATE_RASTER * restrict values)
3850 {
3851 uint32_t *dw = (uint32_t * restrict) dst;
3852
3853 dw[0] =
3854 __gen_field(values->CommandType, 29, 31) |
3855 __gen_field(values->CommandSubType, 27, 28) |
3856 __gen_field(values->_3DCommandOpcode, 24, 26) |
3857 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3858 __gen_field(values->DwordLength, 0, 7) |
3859 0;
3860
3861 dw[1] =
3862 __gen_field(values->APIMode, 22, 23) |
3863 __gen_field(values->FrontWinding, 21, 21) |
3864 __gen_field(values->ForcedSampleCount, 18, 20) |
3865 __gen_field(values->CullMode, 16, 17) |
3866 __gen_field(values->ForceMultisampling, 14, 14) |
3867 __gen_field(values->SmoothPointEnable, 13, 13) |
3868 __gen_field(values->DXMultisampleRasterizationEnable, 12, 12) |
3869 __gen_field(values->DXMultisampleRasterizationMode, 10, 11) |
3870 __gen_field(values->GlobalDepthOffsetEnableSolid, 9, 9) |
3871 __gen_field(values->GlobalDepthOffsetEnableWireframe, 8, 8) |
3872 __gen_field(values->GlobalDepthOffsetEnablePoint, 7, 7) |
3873 __gen_field(values->FrontFaceFillMode, 5, 6) |
3874 __gen_field(values->BackFaceFillMode, 3, 4) |
3875 __gen_field(values->AntialiasingEnable, 2, 2) |
3876 __gen_field(values->ScissorRectangleEnable, 1, 1) |
3877 __gen_field(values->ViewportZClipTestEnable, 0, 0) |
3878 0;
3879
3880 dw[2] =
3881 __gen_float(values->GlobalDepthOffsetConstant) |
3882 0;
3883
3884 dw[3] =
3885 __gen_float(values->GlobalDepthOffsetScale) |
3886 0;
3887
3888 dw[4] =
3889 __gen_float(values->GlobalDepthOffsetClamp) |
3890 0;
3891
3892 }
3893
3894 #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_length_bias 0x00000002
3895 #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_header\
3896 .CommandType = 3, \
3897 .CommandSubType = 3, \
3898 ._3DCommandOpcode = 1, \
3899 ._3DCommandSubOpcode = 2
3900
3901 #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_length 0x00000000
3902
3903 #define GEN8_PALETTE_ENTRY_length 0x00000001
3904
3905 struct GEN8_PALETTE_ENTRY {
3906 uint32_t Alpha;
3907 uint32_t Red;
3908 uint32_t Green;
3909 uint32_t Blue;
3910 };
3911
3912 static inline void
3913 GEN8_PALETTE_ENTRY_pack(__gen_user_data *data, void * restrict dst,
3914 const struct GEN8_PALETTE_ENTRY * restrict values)
3915 {
3916 uint32_t *dw = (uint32_t * restrict) dst;
3917
3918 dw[0] =
3919 __gen_field(values->Alpha, 24, 31) |
3920 __gen_field(values->Red, 16, 23) |
3921 __gen_field(values->Green, 8, 15) |
3922 __gen_field(values->Blue, 0, 7) |
3923 0;
3924
3925 }
3926
3927 struct GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0 {
3928 uint32_t CommandType;
3929 uint32_t CommandSubType;
3930 uint32_t _3DCommandOpcode;
3931 uint32_t _3DCommandSubOpcode;
3932 uint32_t DwordLength;
3933 /* variable length fields follow */
3934 };
3935
3936 static inline void
3937 GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_pack(__gen_user_data *data, void * restrict dst,
3938 const struct GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0 * restrict values)
3939 {
3940 uint32_t *dw = (uint32_t * restrict) dst;
3941
3942 dw[0] =
3943 __gen_field(values->CommandType, 29, 31) |
3944 __gen_field(values->CommandSubType, 27, 28) |
3945 __gen_field(values->_3DCommandOpcode, 24, 26) |
3946 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3947 __gen_field(values->DwordLength, 0, 7) |
3948 0;
3949
3950 /* variable length fields follow */
3951 }
3952
3953 #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_length_bias 0x00000002
3954 #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_header\
3955 .CommandType = 3, \
3956 .CommandSubType = 3, \
3957 ._3DCommandOpcode = 1, \
3958 ._3DCommandSubOpcode = 12
3959
3960 #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_length 0x00000000
3961
3962 struct GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1 {
3963 uint32_t CommandType;
3964 uint32_t CommandSubType;
3965 uint32_t _3DCommandOpcode;
3966 uint32_t _3DCommandSubOpcode;
3967 uint32_t DwordLength;
3968 /* variable length fields follow */
3969 };
3970
3971 static inline void
3972 GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_pack(__gen_user_data *data, void * restrict dst,
3973 const struct GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1 * restrict values)
3974 {
3975 uint32_t *dw = (uint32_t * restrict) dst;
3976
3977 dw[0] =
3978 __gen_field(values->CommandType, 29, 31) |
3979 __gen_field(values->CommandSubType, 27, 28) |
3980 __gen_field(values->_3DCommandOpcode, 24, 26) |
3981 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3982 __gen_field(values->DwordLength, 0, 7) |
3983 0;
3984
3985 /* variable length fields follow */
3986 }
3987
3988 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_length_bias 0x00000002
3989 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_header\
3990 .CommandType = 3, \
3991 .CommandSubType = 3, \
3992 ._3DCommandOpcode = 0, \
3993 ._3DCommandSubOpcode = 45, \
3994 .DwordLength = 0
3995
3996 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_length 0x00000002
3997
3998 struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS {
3999 uint32_t CommandType;
4000 uint32_t CommandSubType;
4001 uint32_t _3DCommandOpcode;
4002 uint32_t _3DCommandSubOpcode;
4003 uint32_t DwordLength;
4004 uint32_t PointertoDSSamplerState;
4005 };
4006
4007 static inline void
4008 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
4009 const struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS * restrict values)
4010 {
4011 uint32_t *dw = (uint32_t * restrict) dst;
4012
4013 dw[0] =
4014 __gen_field(values->CommandType, 29, 31) |
4015 __gen_field(values->CommandSubType, 27, 28) |
4016 __gen_field(values->_3DCommandOpcode, 24, 26) |
4017 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4018 __gen_field(values->DwordLength, 0, 7) |
4019 0;
4020
4021 dw[1] =
4022 __gen_offset(values->PointertoDSSamplerState, 5, 31) |
4023 0;
4024
4025 }
4026
4027 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_length_bias 0x00000002
4028 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_header\
4029 .CommandType = 3, \
4030 .CommandSubType = 3, \
4031 ._3DCommandOpcode = 0, \
4032 ._3DCommandSubOpcode = 46, \
4033 .DwordLength = 0
4034
4035 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_length 0x00000002
4036
4037 struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS {
4038 uint32_t CommandType;
4039 uint32_t CommandSubType;
4040 uint32_t _3DCommandOpcode;
4041 uint32_t _3DCommandSubOpcode;
4042 uint32_t DwordLength;
4043 uint32_t PointertoGSSamplerState;
4044 };
4045
4046 static inline void
4047 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
4048 const struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS * restrict values)
4049 {
4050 uint32_t *dw = (uint32_t * restrict) dst;
4051
4052 dw[0] =
4053 __gen_field(values->CommandType, 29, 31) |
4054 __gen_field(values->CommandSubType, 27, 28) |
4055 __gen_field(values->_3DCommandOpcode, 24, 26) |
4056 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4057 __gen_field(values->DwordLength, 0, 7) |
4058 0;
4059
4060 dw[1] =
4061 __gen_offset(values->PointertoGSSamplerState, 5, 31) |
4062 0;
4063
4064 }
4065
4066 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_length_bias 0x00000002
4067 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_header\
4068 .CommandType = 3, \
4069 .CommandSubType = 3, \
4070 ._3DCommandOpcode = 0, \
4071 ._3DCommandSubOpcode = 44, \
4072 .DwordLength = 0
4073
4074 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_length 0x00000002
4075
4076 struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS {
4077 uint32_t CommandType;
4078 uint32_t CommandSubType;
4079 uint32_t _3DCommandOpcode;
4080 uint32_t _3DCommandSubOpcode;
4081 uint32_t DwordLength;
4082 uint32_t PointertoHSSamplerState;
4083 };
4084
4085 static inline void
4086 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
4087 const struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS * restrict values)
4088 {
4089 uint32_t *dw = (uint32_t * restrict) dst;
4090
4091 dw[0] =
4092 __gen_field(values->CommandType, 29, 31) |
4093 __gen_field(values->CommandSubType, 27, 28) |
4094 __gen_field(values->_3DCommandOpcode, 24, 26) |
4095 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4096 __gen_field(values->DwordLength, 0, 7) |
4097 0;
4098
4099 dw[1] =
4100 __gen_offset(values->PointertoHSSamplerState, 5, 31) |
4101 0;
4102
4103 }
4104
4105 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_length_bias 0x00000002
4106 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_header\
4107 .CommandType = 3, \
4108 .CommandSubType = 3, \
4109 ._3DCommandOpcode = 0, \
4110 ._3DCommandSubOpcode = 47, \
4111 .DwordLength = 0
4112
4113 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_length 0x00000002
4114
4115 struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS {
4116 uint32_t CommandType;
4117 uint32_t CommandSubType;
4118 uint32_t _3DCommandOpcode;
4119 uint32_t _3DCommandSubOpcode;
4120 uint32_t DwordLength;
4121 uint32_t PointertoPSSamplerState;
4122 };
4123
4124 static inline void
4125 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
4126 const struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS * restrict values)
4127 {
4128 uint32_t *dw = (uint32_t * restrict) dst;
4129
4130 dw[0] =
4131 __gen_field(values->CommandType, 29, 31) |
4132 __gen_field(values->CommandSubType, 27, 28) |
4133 __gen_field(values->_3DCommandOpcode, 24, 26) |
4134 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4135 __gen_field(values->DwordLength, 0, 7) |
4136 0;
4137
4138 dw[1] =
4139 __gen_offset(values->PointertoPSSamplerState, 5, 31) |
4140 0;
4141
4142 }
4143
4144 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_length_bias 0x00000002
4145 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_header\
4146 .CommandType = 3, \
4147 .CommandSubType = 3, \
4148 ._3DCommandOpcode = 0, \
4149 ._3DCommandSubOpcode = 43, \
4150 .DwordLength = 0
4151
4152 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_length 0x00000002
4153
4154 struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS {
4155 uint32_t CommandType;
4156 uint32_t CommandSubType;
4157 uint32_t _3DCommandOpcode;
4158 uint32_t _3DCommandSubOpcode;
4159 uint32_t DwordLength;
4160 uint32_t PointertoVSSamplerState;
4161 };
4162
4163 static inline void
4164 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
4165 const struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS * restrict values)
4166 {
4167 uint32_t *dw = (uint32_t * restrict) dst;
4168
4169 dw[0] =
4170 __gen_field(values->CommandType, 29, 31) |
4171 __gen_field(values->CommandSubType, 27, 28) |
4172 __gen_field(values->_3DCommandOpcode, 24, 26) |
4173 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4174 __gen_field(values->DwordLength, 0, 7) |
4175 0;
4176
4177 dw[1] =
4178 __gen_offset(values->PointertoVSSamplerState, 5, 31) |
4179 0;
4180
4181 }
4182
4183 #define GEN8_3DSTATE_SAMPLE_MASK_length_bias 0x00000002
4184 #define GEN8_3DSTATE_SAMPLE_MASK_header \
4185 .CommandType = 3, \
4186 .CommandSubType = 3, \
4187 ._3DCommandOpcode = 0, \
4188 ._3DCommandSubOpcode = 24, \
4189 .DwordLength = 0
4190
4191 #define GEN8_3DSTATE_SAMPLE_MASK_length 0x00000002
4192
4193 struct GEN8_3DSTATE_SAMPLE_MASK {
4194 uint32_t CommandType;
4195 uint32_t CommandSubType;
4196 uint32_t _3DCommandOpcode;
4197 uint32_t _3DCommandSubOpcode;
4198 uint32_t DwordLength;
4199 uint32_t SampleMask;
4200 };
4201
4202 static inline void
4203 GEN8_3DSTATE_SAMPLE_MASK_pack(__gen_user_data *data, void * restrict dst,
4204 const struct GEN8_3DSTATE_SAMPLE_MASK * restrict values)
4205 {
4206 uint32_t *dw = (uint32_t * restrict) dst;
4207
4208 dw[0] =
4209 __gen_field(values->CommandType, 29, 31) |
4210 __gen_field(values->CommandSubType, 27, 28) |
4211 __gen_field(values->_3DCommandOpcode, 24, 26) |
4212 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4213 __gen_field(values->DwordLength, 0, 7) |
4214 0;
4215
4216 dw[1] =
4217 __gen_field(values->SampleMask, 0, 15) |
4218 0;
4219
4220 }
4221
4222 #define GEN8_3DSTATE_SAMPLE_PATTERN_length_bias 0x00000002
4223 #define GEN8_3DSTATE_SAMPLE_PATTERN_header \
4224 .CommandType = 3, \
4225 .CommandSubType = 3, \
4226 ._3DCommandOpcode = 1, \
4227 ._3DCommandSubOpcode = 28, \
4228 .DwordLength = 7
4229
4230 #define GEN8_3DSTATE_SAMPLE_PATTERN_length 0x00000009
4231
4232 struct GEN8_3DSTATE_SAMPLE_PATTERN {
4233 uint32_t CommandType;
4234 uint32_t CommandSubType;
4235 uint32_t _3DCommandOpcode;
4236 uint32_t _3DCommandSubOpcode;
4237 uint32_t DwordLength;
4238 float _8xSample7XOffset;
4239 float _8xSample7YOffset;
4240 float _8xSample6XOffset;
4241 float _8xSample6YOffset;
4242 float _8xSample5XOffset;
4243 float _8xSample5YOffset;
4244 float _8xSample4XOffset;
4245 float _8xSample4YOffset;
4246 float _8xSample3XOffset;
4247 float _8xSample3YOffset;
4248 float _8xSample2XOffset;
4249 float _8xSample2YOffset;
4250 float _8xSample1XOffset;
4251 float _8xSample1YOffset;
4252 float _8xSample0XOffset;
4253 float _8xSample0YOffset;
4254 float _4xSample3XOffset;
4255 float _4xSample3YOffset;
4256 float _4xSample2XOffset;
4257 float _4xSample2YOffset;
4258 float _4xSample1XOffset;
4259 float _4xSample1YOffset;
4260 float _4xSample0XOffset;
4261 float _4xSample0YOffset;
4262 float _1xSample0XOffset;
4263 float _1xSample0YOffset;
4264 float _2xSample1XOffset;
4265 float _2xSample1YOffset;
4266 float _2xSample0XOffset;
4267 float _2xSample0YOffset;
4268 };
4269
4270 static inline void
4271 GEN8_3DSTATE_SAMPLE_PATTERN_pack(__gen_user_data *data, void * restrict dst,
4272 const struct GEN8_3DSTATE_SAMPLE_PATTERN * restrict values)
4273 {
4274 uint32_t *dw = (uint32_t * restrict) dst;
4275
4276 dw[0] =
4277 __gen_field(values->CommandType, 29, 31) |
4278 __gen_field(values->CommandSubType, 27, 28) |
4279 __gen_field(values->_3DCommandOpcode, 24, 26) |
4280 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4281 __gen_field(values->DwordLength, 0, 7) |
4282 0;
4283
4284 for (uint32_t i = 0, j = 1; i < 4; i += 1, j++) {
4285 dw[j] =
4286 0;
4287 }
4288
4289 dw[5] =
4290 __gen_field(values->_8xSample7XOffset * (1 << 4), 28, 31) |
4291 __gen_field(values->_8xSample7YOffset * (1 << 4), 24, 27) |
4292 __gen_field(values->_8xSample6XOffset * (1 << 4), 20, 23) |
4293 __gen_field(values->_8xSample6YOffset * (1 << 4), 16, 19) |
4294 __gen_field(values->_8xSample5XOffset * (1 << 4), 12, 15) |
4295 __gen_field(values->_8xSample5YOffset * (1 << 4), 8, 11) |
4296 __gen_field(values->_8xSample4XOffset * (1 << 4), 4, 7) |
4297 __gen_field(values->_8xSample4YOffset * (1 << 4), 0, 3) |
4298 0;
4299
4300 dw[6] =
4301 __gen_field(values->_8xSample3XOffset * (1 << 4), 28, 31) |
4302 __gen_field(values->_8xSample3YOffset * (1 << 4), 24, 27) |
4303 __gen_field(values->_8xSample2XOffset * (1 << 4), 20, 23) |
4304 __gen_field(values->_8xSample2YOffset * (1 << 4), 16, 19) |
4305 __gen_field(values->_8xSample1XOffset * (1 << 4), 12, 15) |
4306 __gen_field(values->_8xSample1YOffset * (1 << 4), 8, 11) |
4307 __gen_field(values->_8xSample0XOffset * (1 << 4), 4, 7) |
4308 __gen_field(values->_8xSample0YOffset * (1 << 4), 0, 3) |
4309 0;
4310
4311 dw[7] =
4312 __gen_field(values->_4xSample3XOffset * (1 << 4), 28, 31) |
4313 __gen_field(values->_4xSample3YOffset * (1 << 4), 24, 27) |
4314 __gen_field(values->_4xSample2XOffset * (1 << 4), 20, 23) |
4315 __gen_field(values->_4xSample2YOffset * (1 << 4), 16, 19) |
4316 __gen_field(values->_4xSample1XOffset * (1 << 4), 12, 15) |
4317 __gen_field(values->_4xSample1YOffset * (1 << 4), 8, 11) |
4318 __gen_field(values->_4xSample0XOffset * (1 << 4), 4, 7) |
4319 __gen_field(values->_4xSample0YOffset * (1 << 4), 0, 3) |
4320 0;
4321
4322 dw[8] =
4323 __gen_field(values->_1xSample0XOffset * (1 << 4), 20, 23) |
4324 __gen_field(values->_1xSample0YOffset * (1 << 4), 16, 19) |
4325 __gen_field(values->_2xSample1XOffset * (1 << 4), 12, 15) |
4326 __gen_field(values->_2xSample1YOffset * (1 << 4), 8, 11) |
4327 __gen_field(values->_2xSample0XOffset * (1 << 4), 4, 7) |
4328 __gen_field(values->_2xSample0YOffset * (1 << 4), 0, 3) |
4329 0;
4330
4331 }
4332
4333 #define GEN8_3DSTATE_SBE_length_bias 0x00000002
4334 #define GEN8_3DSTATE_SBE_header \
4335 .CommandType = 3, \
4336 .CommandSubType = 3, \
4337 ._3DCommandOpcode = 0, \
4338 ._3DCommandSubOpcode = 31, \
4339 .DwordLength = 2
4340
4341 #define GEN8_3DSTATE_SBE_length 0x00000004
4342
4343 struct GEN8_3DSTATE_SBE {
4344 uint32_t CommandType;
4345 uint32_t CommandSubType;
4346 uint32_t _3DCommandOpcode;
4347 uint32_t _3DCommandSubOpcode;
4348 uint32_t DwordLength;
4349 bool ForceVertexURBEntryReadLength;
4350 bool ForceVertexURBEntryReadOffset;
4351 uint32_t NumberofSFOutputAttributes;
4352 bool AttributeSwizzleEnable;
4353 #define UPPERLEFT 0
4354 #define LOWERLEFT 1
4355 uint32_t PointSpriteTextureCoordinateOrigin;
4356 bool PrimitiveIDOverrideComponentW;
4357 bool PrimitiveIDOverrideComponentZ;
4358 bool PrimitiveIDOverrideComponentY;
4359 bool PrimitiveIDOverrideComponentX;
4360 uint32_t VertexURBEntryReadLength;
4361 uint32_t VertexURBEntryReadOffset;
4362 uint32_t PrimitiveIDOverrideAttributeSelect;
4363 uint32_t PointSpriteTextureCoordinateEnable;
4364 uint32_t ConstantInterpolationEnable;
4365 };
4366
4367 static inline void
4368 GEN8_3DSTATE_SBE_pack(__gen_user_data *data, void * restrict dst,
4369 const struct GEN8_3DSTATE_SBE * restrict values)
4370 {
4371 uint32_t *dw = (uint32_t * restrict) dst;
4372
4373 dw[0] =
4374 __gen_field(values->CommandType, 29, 31) |
4375 __gen_field(values->CommandSubType, 27, 28) |
4376 __gen_field(values->_3DCommandOpcode, 24, 26) |
4377 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4378 __gen_field(values->DwordLength, 0, 7) |
4379 0;
4380
4381 dw[1] =
4382 __gen_field(values->ForceVertexURBEntryReadLength, 29, 29) |
4383 __gen_field(values->ForceVertexURBEntryReadOffset, 28, 28) |
4384 __gen_field(values->NumberofSFOutputAttributes, 22, 27) |
4385 __gen_field(values->AttributeSwizzleEnable, 21, 21) |
4386 __gen_field(values->PointSpriteTextureCoordinateOrigin, 20, 20) |
4387 __gen_field(values->PrimitiveIDOverrideComponentW, 19, 19) |
4388 __gen_field(values->PrimitiveIDOverrideComponentZ, 18, 18) |
4389 __gen_field(values->PrimitiveIDOverrideComponentY, 17, 17) |
4390 __gen_field(values->PrimitiveIDOverrideComponentX, 16, 16) |
4391 __gen_field(values->VertexURBEntryReadLength, 11, 15) |
4392 __gen_field(values->VertexURBEntryReadOffset, 5, 10) |
4393 __gen_field(values->PrimitiveIDOverrideAttributeSelect, 0, 4) |
4394 0;
4395
4396 dw[2] =
4397 __gen_field(values->PointSpriteTextureCoordinateEnable, 0, 31) |
4398 0;
4399
4400 dw[3] =
4401 __gen_field(values->ConstantInterpolationEnable, 0, 31) |
4402 0;
4403
4404 }
4405
4406 #define GEN8_3DSTATE_SBE_SWIZ_length_bias 0x00000002
4407 #define GEN8_3DSTATE_SBE_SWIZ_header \
4408 .CommandType = 3, \
4409 .CommandSubType = 3, \
4410 ._3DCommandOpcode = 0, \
4411 ._3DCommandSubOpcode = 81, \
4412 .DwordLength = 9
4413
4414 #define GEN8_3DSTATE_SBE_SWIZ_length 0x0000000b
4415
4416 #define GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_length 0x00000001
4417
4418 struct GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL {
4419 bool ComponentOverrideW;
4420 bool ComponentOverrideZ;
4421 bool ComponentOverrideY;
4422 bool ComponentOverrideX;
4423 uint32_t SwizzleControlMode;
4424 #define CONST_0000 0
4425 #define CONST_0001_FLOAT 1
4426 #define CONST_1111_FLOAT 2
4427 #define PRIM_ID 3
4428 uint32_t ConstantSource;
4429 #define INPUTATTR 0
4430 #define INPUTATTR_FACING 1
4431 #define INPUTATTR_W 2
4432 #define INPUTATTR_FACING_W 3
4433 uint32_t SwizzleSelect;
4434 uint32_t SourceAttribute;
4435 };
4436
4437 static inline void
4438 GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(__gen_user_data *data, void * restrict dst,
4439 const struct GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL * restrict values)
4440 {
4441 uint32_t *dw = (uint32_t * restrict) dst;
4442
4443 dw[0] =
4444 __gen_field(values->ComponentOverrideW, 15, 15) |
4445 __gen_field(values->ComponentOverrideZ, 14, 14) |
4446 __gen_field(values->ComponentOverrideY, 13, 13) |
4447 __gen_field(values->ComponentOverrideX, 12, 12) |
4448 __gen_field(values->SwizzleControlMode, 11, 11) |
4449 __gen_field(values->ConstantSource, 9, 10) |
4450 __gen_field(values->SwizzleSelect, 6, 7) |
4451 __gen_field(values->SourceAttribute, 0, 4) |
4452 0;
4453
4454 }
4455
4456 struct GEN8_3DSTATE_SBE_SWIZ {
4457 uint32_t CommandType;
4458 uint32_t CommandSubType;
4459 uint32_t _3DCommandOpcode;
4460 uint32_t _3DCommandSubOpcode;
4461 uint32_t DwordLength;
4462 struct GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL Attribute[16];
4463 uint32_t AttributeWrapShortestEnables[16];
4464 };
4465
4466 static inline void
4467 GEN8_3DSTATE_SBE_SWIZ_pack(__gen_user_data *data, void * restrict dst,
4468 const struct GEN8_3DSTATE_SBE_SWIZ * restrict values)
4469 {
4470 uint32_t *dw = (uint32_t * restrict) dst;
4471
4472 dw[0] =
4473 __gen_field(values->CommandType, 29, 31) |
4474 __gen_field(values->CommandSubType, 27, 28) |
4475 __gen_field(values->_3DCommandOpcode, 24, 26) |
4476 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4477 __gen_field(values->DwordLength, 0, 7) |
4478 0;
4479
4480 for (uint32_t i = 0, j = 1; i < 16; i += 2, j++) {
4481 uint32_t dw_Attribute0;
4482 GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &dw_Attribute0, &values->Attribute[i + 0]);
4483 uint32_t dw_Attribute1;
4484 GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &dw_Attribute1, &values->Attribute[i + 1]);
4485 dw[j] =
4486 __gen_field(dw_Attribute0, 0, 15) |
4487 __gen_field(dw_Attribute1, 16, 31) |
4488 0;
4489 }
4490
4491 for (uint32_t i = 0, j = 9; i < 16; i += 8, j++) {
4492 dw[j] =
4493 __gen_field(values->AttributeWrapShortestEnables[i + 0], 0, 3) |
4494 __gen_field(values->AttributeWrapShortestEnables[i + 1], 4, 7) |
4495 __gen_field(values->AttributeWrapShortestEnables[i + 2], 8, 11) |
4496 __gen_field(values->AttributeWrapShortestEnables[i + 3], 12, 15) |
4497 __gen_field(values->AttributeWrapShortestEnables[i + 4], 16, 19) |
4498 __gen_field(values->AttributeWrapShortestEnables[i + 5], 20, 23) |
4499 __gen_field(values->AttributeWrapShortestEnables[i + 6], 24, 27) |
4500 __gen_field(values->AttributeWrapShortestEnables[i + 7], 28, 31) |
4501 0;
4502 }
4503
4504 }
4505
4506 #define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_length_bias 0x00000002
4507 #define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_header\
4508 .CommandType = 3, \
4509 .CommandSubType = 3, \
4510 ._3DCommandOpcode = 0, \
4511 ._3DCommandSubOpcode = 15, \
4512 .DwordLength = 0
4513
4514 #define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_length 0x00000002
4515
4516 struct GEN8_3DSTATE_SCISSOR_STATE_POINTERS {
4517 uint32_t CommandType;
4518 uint32_t CommandSubType;
4519 uint32_t _3DCommandOpcode;
4520 uint32_t _3DCommandSubOpcode;
4521 uint32_t DwordLength;
4522 uint32_t ScissorRectPointer;
4523 };
4524
4525 static inline void
4526 GEN8_3DSTATE_SCISSOR_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
4527 const struct GEN8_3DSTATE_SCISSOR_STATE_POINTERS * restrict values)
4528 {
4529 uint32_t *dw = (uint32_t * restrict) dst;
4530
4531 dw[0] =
4532 __gen_field(values->CommandType, 29, 31) |
4533 __gen_field(values->CommandSubType, 27, 28) |
4534 __gen_field(values->_3DCommandOpcode, 24, 26) |
4535 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4536 __gen_field(values->DwordLength, 0, 7) |
4537 0;
4538
4539 dw[1] =
4540 __gen_offset(values->ScissorRectPointer, 5, 31) |
4541 0;
4542
4543 }
4544
4545 #define GEN8_3DSTATE_SF_length_bias 0x00000002
4546 #define GEN8_3DSTATE_SF_header \
4547 .CommandType = 3, \
4548 .CommandSubType = 3, \
4549 ._3DCommandOpcode = 0, \
4550 ._3DCommandSubOpcode = 19, \
4551 .DwordLength = 2
4552
4553 #define GEN8_3DSTATE_SF_length 0x00000004
4554
4555 struct GEN8_3DSTATE_SF {
4556 uint32_t CommandType;
4557 uint32_t CommandSubType;
4558 uint32_t _3DCommandOpcode;
4559 uint32_t _3DCommandSubOpcode;
4560 uint32_t DwordLength;
4561 bool LegacyGlobalDepthBiasEnable;
4562 bool StatisticsEnable;
4563 bool ViewportTransformEnable;
4564 float LineWidth;
4565 #define _05pixels 0
4566 #define _10pixels 1
4567 #define _20pixels 2
4568 #define _40pixels 3
4569 uint32_t LineEndCapAntialiasingRegionWidth;
4570 bool LastPixelEnable;
4571 uint32_t TriangleStripListProvokingVertexSelect;
4572 uint32_t LineStripListProvokingVertexSelect;
4573 uint32_t TriangleFanProvokingVertexSelect;
4574 #define AALINEDISTANCE_TRUE 1
4575 uint32_t AALineDistanceMode;
4576 bool SmoothPointEnable;
4577 uint32_t VertexSubPixelPrecisionSelect;
4578 #define Vertex 0
4579 #define State 1
4580 uint32_t PointWidthSource;
4581 float PointWidth;
4582 };
4583
4584 static inline void
4585 GEN8_3DSTATE_SF_pack(__gen_user_data *data, void * restrict dst,
4586 const struct GEN8_3DSTATE_SF * restrict values)
4587 {
4588 uint32_t *dw = (uint32_t * restrict) dst;
4589
4590 dw[0] =
4591 __gen_field(values->CommandType, 29, 31) |
4592 __gen_field(values->CommandSubType, 27, 28) |
4593 __gen_field(values->_3DCommandOpcode, 24, 26) |
4594 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4595 __gen_field(values->DwordLength, 0, 7) |
4596 0;
4597
4598 dw[1] =
4599 __gen_field(values->LegacyGlobalDepthBiasEnable, 11, 11) |
4600 __gen_field(values->StatisticsEnable, 10, 10) |
4601 __gen_field(values->ViewportTransformEnable, 1, 1) |
4602 0;
4603
4604 dw[2] =
4605 __gen_field(values->LineWidth * (1 << 7), 18, 27) |
4606 __gen_field(values->LineEndCapAntialiasingRegionWidth, 16, 17) |
4607 0;
4608
4609 dw[3] =
4610 __gen_field(values->LastPixelEnable, 31, 31) |
4611 __gen_field(values->TriangleStripListProvokingVertexSelect, 29, 30) |
4612 __gen_field(values->LineStripListProvokingVertexSelect, 27, 28) |
4613 __gen_field(values->TriangleFanProvokingVertexSelect, 25, 26) |
4614 __gen_field(values->AALineDistanceMode, 14, 14) |
4615 __gen_field(values->SmoothPointEnable, 13, 13) |
4616 __gen_field(values->VertexSubPixelPrecisionSelect, 12, 12) |
4617 __gen_field(values->PointWidthSource, 11, 11) |
4618 __gen_field(values->PointWidth * (1 << 3), 0, 10) |
4619 0;
4620
4621 }
4622
4623 #define GEN8_3DSTATE_SO_BUFFER_length_bias 0x00000002
4624 #define GEN8_3DSTATE_SO_BUFFER_header \
4625 .CommandType = 3, \
4626 .CommandSubType = 3, \
4627 ._3DCommandOpcode = 1, \
4628 ._3DCommandSubOpcode = 24, \
4629 .DwordLength = 6
4630
4631 #define GEN8_3DSTATE_SO_BUFFER_length 0x00000008
4632
4633 struct GEN8_3DSTATE_SO_BUFFER {
4634 uint32_t CommandType;
4635 uint32_t CommandSubType;
4636 uint32_t _3DCommandOpcode;
4637 uint32_t _3DCommandSubOpcode;
4638 uint32_t DwordLength;
4639 bool SOBufferEnable;
4640 uint32_t SOBufferIndex;
4641 struct GEN8_MEMORY_OBJECT_CONTROL_STATE SOBufferObjectControlState;
4642 bool StreamOffsetWriteEnable;
4643 bool StreamOutputBufferOffsetAddressEnable;
4644 __gen_address_type SurfaceBaseAddress;
4645 uint32_t SurfaceSize;
4646 __gen_address_type StreamOutputBufferOffsetAddress;
4647 uint32_t StreamOffset;
4648 };
4649
4650 static inline void
4651 GEN8_3DSTATE_SO_BUFFER_pack(__gen_user_data *data, void * restrict dst,
4652 const struct GEN8_3DSTATE_SO_BUFFER * restrict values)
4653 {
4654 uint32_t *dw = (uint32_t * restrict) dst;
4655
4656 dw[0] =
4657 __gen_field(values->CommandType, 29, 31) |
4658 __gen_field(values->CommandSubType, 27, 28) |
4659 __gen_field(values->_3DCommandOpcode, 24, 26) |
4660 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4661 __gen_field(values->DwordLength, 0, 7) |
4662 0;
4663
4664 uint32_t dw_SOBufferObjectControlState;
4665 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SOBufferObjectControlState, &values->SOBufferObjectControlState);
4666 dw[1] =
4667 __gen_field(values->SOBufferEnable, 31, 31) |
4668 __gen_field(values->SOBufferIndex, 29, 30) |
4669 __gen_field(dw_SOBufferObjectControlState, 22, 28) |
4670 __gen_field(values->StreamOffsetWriteEnable, 21, 21) |
4671 __gen_field(values->StreamOutputBufferOffsetAddressEnable, 20, 20) |
4672 0;
4673
4674 uint32_t dw2 =
4675 0;
4676
4677 uint64_t qw2 =
4678 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
4679
4680 dw[2] = qw2;
4681 dw[3] = qw2 >> 32;
4682
4683 dw[4] =
4684 __gen_field(values->SurfaceSize, 0, 29) |
4685 0;
4686
4687 uint32_t dw5 =
4688 0;
4689
4690 uint64_t qw5 =
4691 __gen_combine_address(data, &dw[5], values->StreamOutputBufferOffsetAddress, dw5);
4692
4693 dw[5] = qw5;
4694 dw[6] = qw5 >> 32;
4695
4696 dw[7] =
4697 __gen_field(values->StreamOffset, 0, 31) |
4698 0;
4699
4700 }
4701
4702 #define GEN8_3DSTATE_SO_DECL_LIST_length_bias 0x00000002
4703 #define GEN8_3DSTATE_SO_DECL_LIST_header \
4704 .CommandType = 3, \
4705 .CommandSubType = 3, \
4706 ._3DCommandOpcode = 1, \
4707 ._3DCommandSubOpcode = 23
4708
4709 #define GEN8_3DSTATE_SO_DECL_LIST_length 0x00000000
4710
4711 #define GEN8_SO_DECL_ENTRY_length 0x00000002
4712
4713 #define GEN8_SO_DECL_length 0x00000001
4714
4715 struct GEN8_SO_DECL {
4716 uint32_t OutputBufferSlot;
4717 uint32_t HoleFlag;
4718 uint32_t RegisterIndex;
4719 uint32_t ComponentMask;
4720 };
4721
4722 static inline void
4723 GEN8_SO_DECL_pack(__gen_user_data *data, void * restrict dst,
4724 const struct GEN8_SO_DECL * restrict values)
4725 {
4726 uint32_t *dw = (uint32_t * restrict) dst;
4727
4728 dw[0] =
4729 __gen_field(values->OutputBufferSlot, 12, 13) |
4730 __gen_field(values->HoleFlag, 11, 11) |
4731 __gen_field(values->RegisterIndex, 4, 9) |
4732 __gen_field(values->ComponentMask, 0, 3) |
4733 0;
4734
4735 }
4736
4737 struct GEN8_SO_DECL_ENTRY {
4738 struct GEN8_SO_DECL Stream3Decl;
4739 struct GEN8_SO_DECL Stream2Decl;
4740 struct GEN8_SO_DECL Stream1Decl;
4741 struct GEN8_SO_DECL Stream0Decl;
4742 };
4743
4744 static inline void
4745 GEN8_SO_DECL_ENTRY_pack(__gen_user_data *data, void * restrict dst,
4746 const struct GEN8_SO_DECL_ENTRY * restrict values)
4747 {
4748 uint32_t *dw = (uint32_t * restrict) dst;
4749
4750 uint32_t dw_Stream3Decl;
4751 GEN8_SO_DECL_pack(data, &dw_Stream3Decl, &values->Stream3Decl);
4752 uint32_t dw_Stream2Decl;
4753 GEN8_SO_DECL_pack(data, &dw_Stream2Decl, &values->Stream2Decl);
4754 uint32_t dw_Stream1Decl;
4755 GEN8_SO_DECL_pack(data, &dw_Stream1Decl, &values->Stream1Decl);
4756 uint32_t dw_Stream0Decl;
4757 GEN8_SO_DECL_pack(data, &dw_Stream0Decl, &values->Stream0Decl);
4758 uint64_t qw0 =
4759 __gen_field(dw_Stream3Decl, 48, 63) |
4760 __gen_field(dw_Stream2Decl, 32, 47) |
4761 __gen_field(dw_Stream1Decl, 16, 31) |
4762 __gen_field(dw_Stream0Decl, 0, 15) |
4763 0;
4764
4765 dw[0] = qw0;
4766 dw[1] = qw0 >> 32;
4767
4768 }
4769
4770 struct GEN8_3DSTATE_SO_DECL_LIST {
4771 uint32_t CommandType;
4772 uint32_t CommandSubType;
4773 uint32_t _3DCommandOpcode;
4774 uint32_t _3DCommandSubOpcode;
4775 uint32_t DwordLength;
4776 uint32_t StreamtoBufferSelects3;
4777 uint32_t StreamtoBufferSelects2;
4778 uint32_t StreamtoBufferSelects1;
4779 uint32_t StreamtoBufferSelects0;
4780 uint32_t NumEntries3;
4781 uint32_t NumEntries2;
4782 uint32_t NumEntries1;
4783 uint32_t NumEntries0;
4784 /* variable length fields follow */
4785 };
4786
4787 static inline void
4788 GEN8_3DSTATE_SO_DECL_LIST_pack(__gen_user_data *data, void * restrict dst,
4789 const struct GEN8_3DSTATE_SO_DECL_LIST * restrict values)
4790 {
4791 uint32_t *dw = (uint32_t * restrict) dst;
4792
4793 dw[0] =
4794 __gen_field(values->CommandType, 29, 31) |
4795 __gen_field(values->CommandSubType, 27, 28) |
4796 __gen_field(values->_3DCommandOpcode, 24, 26) |
4797 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4798 __gen_field(values->DwordLength, 0, 8) |
4799 0;
4800
4801 dw[1] =
4802 __gen_field(values->StreamtoBufferSelects3, 12, 15) |
4803 __gen_field(values->StreamtoBufferSelects2, 8, 11) |
4804 __gen_field(values->StreamtoBufferSelects1, 4, 7) |
4805 __gen_field(values->StreamtoBufferSelects0, 0, 3) |
4806 0;
4807
4808 dw[2] =
4809 __gen_field(values->NumEntries3, 24, 31) |
4810 __gen_field(values->NumEntries2, 16, 23) |
4811 __gen_field(values->NumEntries1, 8, 15) |
4812 __gen_field(values->NumEntries0, 0, 7) |
4813 0;
4814
4815 /* variable length fields follow */
4816 }
4817
4818 #define GEN8_3DSTATE_STENCIL_BUFFER_length_bias 0x00000002
4819 #define GEN8_3DSTATE_STENCIL_BUFFER_header \
4820 .CommandType = 3, \
4821 .CommandSubType = 3, \
4822 ._3DCommandOpcode = 0, \
4823 ._3DCommandSubOpcode = 6, \
4824 .DwordLength = 3
4825
4826 #define GEN8_3DSTATE_STENCIL_BUFFER_length 0x00000005
4827
4828 struct GEN8_3DSTATE_STENCIL_BUFFER {
4829 uint32_t CommandType;
4830 uint32_t CommandSubType;
4831 uint32_t _3DCommandOpcode;
4832 uint32_t _3DCommandSubOpcode;
4833 uint32_t DwordLength;
4834 uint32_t StencilBufferEnable;
4835 struct GEN8_MEMORY_OBJECT_CONTROL_STATE StencilBufferObjectControlState;
4836 uint32_t SurfacePitch;
4837 __gen_address_type SurfaceBaseAddress;
4838 uint32_t SurfaceQPitch;
4839 };
4840
4841 static inline void
4842 GEN8_3DSTATE_STENCIL_BUFFER_pack(__gen_user_data *data, void * restrict dst,
4843 const struct GEN8_3DSTATE_STENCIL_BUFFER * restrict values)
4844 {
4845 uint32_t *dw = (uint32_t * restrict) dst;
4846
4847 dw[0] =
4848 __gen_field(values->CommandType, 29, 31) |
4849 __gen_field(values->CommandSubType, 27, 28) |
4850 __gen_field(values->_3DCommandOpcode, 24, 26) |
4851 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4852 __gen_field(values->DwordLength, 0, 7) |
4853 0;
4854
4855 uint32_t dw_StencilBufferObjectControlState;
4856 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StencilBufferObjectControlState, &values->StencilBufferObjectControlState);
4857 dw[1] =
4858 __gen_field(values->StencilBufferEnable, 31, 31) |
4859 __gen_field(dw_StencilBufferObjectControlState, 22, 28) |
4860 __gen_field(values->SurfacePitch, 0, 16) |
4861 0;
4862
4863 uint32_t dw2 =
4864 0;
4865
4866 uint64_t qw2 =
4867 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
4868
4869 dw[2] = qw2;
4870 dw[3] = qw2 >> 32;
4871
4872 dw[4] =
4873 __gen_field(values->SurfaceQPitch, 0, 14) |
4874 0;
4875
4876 }
4877
4878 #define GEN8_3DSTATE_STREAMOUT_length_bias 0x00000002
4879 #define GEN8_3DSTATE_STREAMOUT_header \
4880 .CommandType = 3, \
4881 .CommandSubType = 3, \
4882 ._3DCommandOpcode = 0, \
4883 ._3DCommandSubOpcode = 30, \
4884 .DwordLength = 3
4885
4886 #define GEN8_3DSTATE_STREAMOUT_length 0x00000005
4887
4888 struct GEN8_3DSTATE_STREAMOUT {
4889 uint32_t CommandType;
4890 uint32_t CommandSubType;
4891 uint32_t _3DCommandOpcode;
4892 uint32_t _3DCommandSubOpcode;
4893 uint32_t DwordLength;
4894 uint32_t SOFunctionEnable;
4895 uint32_t APIRenderingDisable;
4896 uint32_t RenderStreamSelect;
4897 #define LEADING 0
4898 #define TRAILING 1
4899 uint32_t ReorderMode;
4900 bool SOStatisticsEnable;
4901 #define Normal 0
4902 #define Resreved 1
4903 #define Force_Off 2
4904 #define Force_on 3
4905 uint32_t ForceRendering;
4906 uint32_t Stream3VertexReadOffset;
4907 uint32_t Stream3VertexReadLength;
4908 uint32_t Stream2VertexReadOffset;
4909 uint32_t Stream2VertexReadLength;
4910 uint32_t Stream1VertexReadOffset;
4911 uint32_t Stream1VertexReadLength;
4912 uint32_t Stream0VertexReadOffset;
4913 uint32_t Stream0VertexReadLength;
4914 uint32_t Buffer1SurfacePitch;
4915 uint32_t Buffer0SurfacePitch;
4916 uint32_t Buffer3SurfacePitch;
4917 uint32_t Buffer2SurfacePitch;
4918 };
4919
4920 static inline void
4921 GEN8_3DSTATE_STREAMOUT_pack(__gen_user_data *data, void * restrict dst,
4922 const struct GEN8_3DSTATE_STREAMOUT * restrict values)
4923 {
4924 uint32_t *dw = (uint32_t * restrict) dst;
4925
4926 dw[0] =
4927 __gen_field(values->CommandType, 29, 31) |
4928 __gen_field(values->CommandSubType, 27, 28) |
4929 __gen_field(values->_3DCommandOpcode, 24, 26) |
4930 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4931 __gen_field(values->DwordLength, 0, 7) |
4932 0;
4933
4934 dw[1] =
4935 __gen_field(values->SOFunctionEnable, 31, 31) |
4936 __gen_field(values->APIRenderingDisable, 30, 30) |
4937 __gen_field(values->RenderStreamSelect, 27, 28) |
4938 __gen_field(values->ReorderMode, 26, 26) |
4939 __gen_field(values->SOStatisticsEnable, 25, 25) |
4940 __gen_field(values->ForceRendering, 23, 24) |
4941 0;
4942
4943 dw[2] =
4944 __gen_field(values->Stream3VertexReadOffset, 29, 29) |
4945 __gen_field(values->Stream3VertexReadLength, 24, 28) |
4946 __gen_field(values->Stream2VertexReadOffset, 21, 21) |
4947 __gen_field(values->Stream2VertexReadLength, 16, 20) |
4948 __gen_field(values->Stream1VertexReadOffset, 13, 13) |
4949 __gen_field(values->Stream1VertexReadLength, 8, 12) |
4950 __gen_field(values->Stream0VertexReadOffset, 5, 5) |
4951 __gen_field(values->Stream0VertexReadLength, 0, 4) |
4952 0;
4953
4954 dw[3] =
4955 __gen_field(values->Buffer1SurfacePitch, 16, 27) |
4956 __gen_field(values->Buffer0SurfacePitch, 0, 11) |
4957 0;
4958
4959 dw[4] =
4960 __gen_field(values->Buffer3SurfacePitch, 16, 27) |
4961 __gen_field(values->Buffer2SurfacePitch, 0, 11) |
4962 0;
4963
4964 }
4965
4966 #define GEN8_3DSTATE_TE_length_bias 0x00000002
4967 #define GEN8_3DSTATE_TE_header \
4968 .CommandType = 3, \
4969 .CommandSubType = 3, \
4970 ._3DCommandOpcode = 0, \
4971 ._3DCommandSubOpcode = 28, \
4972 .DwordLength = 2
4973
4974 #define GEN8_3DSTATE_TE_length 0x00000004
4975
4976 struct GEN8_3DSTATE_TE {
4977 uint32_t CommandType;
4978 uint32_t CommandSubType;
4979 uint32_t _3DCommandOpcode;
4980 uint32_t _3DCommandSubOpcode;
4981 uint32_t DwordLength;
4982 #define INTEGER 0
4983 #define ODD_FRACTIONAL 1
4984 #define EVEN_FRACTIONAL 2
4985 uint32_t Partitioning;
4986 #define POINT 0
4987 #define OUTPUT_LINE 1
4988 #define OUTPUT_TRI_CW 2
4989 #define OUTPUT_TRI_CCW 3
4990 uint32_t OutputTopology;
4991 #define QUAD 0
4992 #define TRI 1
4993 #define ISOLINE 2
4994 uint32_t TEDomain;
4995 #define HW_TESS 0
4996 #define SW_TESS 1
4997 uint32_t TEMode;
4998 bool TEEnable;
4999 float MaximumTessellationFactorOdd;
5000 float MaximumTessellationFactorNotOdd;
5001 };
5002
5003 static inline void
5004 GEN8_3DSTATE_TE_pack(__gen_user_data *data, void * restrict dst,
5005 const struct GEN8_3DSTATE_TE * restrict values)
5006 {
5007 uint32_t *dw = (uint32_t * restrict) dst;
5008
5009 dw[0] =
5010 __gen_field(values->CommandType, 29, 31) |
5011 __gen_field(values->CommandSubType, 27, 28) |
5012 __gen_field(values->_3DCommandOpcode, 24, 26) |
5013 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5014 __gen_field(values->DwordLength, 0, 7) |
5015 0;
5016
5017 dw[1] =
5018 __gen_field(values->Partitioning, 12, 13) |
5019 __gen_field(values->OutputTopology, 8, 9) |
5020 __gen_field(values->TEDomain, 4, 5) |
5021 __gen_field(values->TEMode, 1, 2) |
5022 __gen_field(values->TEEnable, 0, 0) |
5023 0;
5024
5025 dw[2] =
5026 __gen_float(values->MaximumTessellationFactorOdd) |
5027 0;
5028
5029 dw[3] =
5030 __gen_float(values->MaximumTessellationFactorNotOdd) |
5031 0;
5032
5033 }
5034
5035 #define GEN8_3DSTATE_URB_DS_length_bias 0x00000002
5036 #define GEN8_3DSTATE_URB_DS_header \
5037 .CommandType = 3, \
5038 .CommandSubType = 3, \
5039 ._3DCommandOpcode = 0, \
5040 ._3DCommandSubOpcode = 50, \
5041 .DwordLength = 0
5042
5043 #define GEN8_3DSTATE_URB_DS_length 0x00000002
5044
5045 struct GEN8_3DSTATE_URB_DS {
5046 uint32_t CommandType;
5047 uint32_t CommandSubType;
5048 uint32_t _3DCommandOpcode;
5049 uint32_t _3DCommandSubOpcode;
5050 uint32_t DwordLength;
5051 uint32_t DSURBStartingAddress;
5052 uint32_t DSURBEntryAllocationSize;
5053 uint32_t DSNumberofURBEntries;
5054 };
5055
5056 static inline void
5057 GEN8_3DSTATE_URB_DS_pack(__gen_user_data *data, void * restrict dst,
5058 const struct GEN8_3DSTATE_URB_DS * restrict values)
5059 {
5060 uint32_t *dw = (uint32_t * restrict) dst;
5061
5062 dw[0] =
5063 __gen_field(values->CommandType, 29, 31) |
5064 __gen_field(values->CommandSubType, 27, 28) |
5065 __gen_field(values->_3DCommandOpcode, 24, 26) |
5066 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5067 __gen_field(values->DwordLength, 0, 7) |
5068 0;
5069
5070 dw[1] =
5071 __gen_field(values->DSURBStartingAddress, 25, 31) |
5072 __gen_field(values->DSURBEntryAllocationSize, 16, 24) |
5073 __gen_field(values->DSNumberofURBEntries, 0, 15) |
5074 0;
5075
5076 }
5077
5078 #define GEN8_3DSTATE_URB_GS_length_bias 0x00000002
5079 #define GEN8_3DSTATE_URB_GS_header \
5080 .CommandType = 3, \
5081 .CommandSubType = 3, \
5082 ._3DCommandOpcode = 0, \
5083 ._3DCommandSubOpcode = 51, \
5084 .DwordLength = 0
5085
5086 #define GEN8_3DSTATE_URB_GS_length 0x00000002
5087
5088 struct GEN8_3DSTATE_URB_GS {
5089 uint32_t CommandType;
5090 uint32_t CommandSubType;
5091 uint32_t _3DCommandOpcode;
5092 uint32_t _3DCommandSubOpcode;
5093 uint32_t DwordLength;
5094 uint32_t GSURBStartingAddress;
5095 uint32_t GSURBEntryAllocationSize;
5096 uint32_t GSNumberofURBEntries;
5097 };
5098
5099 static inline void
5100 GEN8_3DSTATE_URB_GS_pack(__gen_user_data *data, void * restrict dst,
5101 const struct GEN8_3DSTATE_URB_GS * restrict values)
5102 {
5103 uint32_t *dw = (uint32_t * restrict) dst;
5104
5105 dw[0] =
5106 __gen_field(values->CommandType, 29, 31) |
5107 __gen_field(values->CommandSubType, 27, 28) |
5108 __gen_field(values->_3DCommandOpcode, 24, 26) |
5109 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5110 __gen_field(values->DwordLength, 0, 7) |
5111 0;
5112
5113 dw[1] =
5114 __gen_field(values->GSURBStartingAddress, 25, 31) |
5115 __gen_field(values->GSURBEntryAllocationSize, 16, 24) |
5116 __gen_field(values->GSNumberofURBEntries, 0, 15) |
5117 0;
5118
5119 }
5120
5121 #define GEN8_3DSTATE_URB_HS_length_bias 0x00000002
5122 #define GEN8_3DSTATE_URB_HS_header \
5123 .CommandType = 3, \
5124 .CommandSubType = 3, \
5125 ._3DCommandOpcode = 0, \
5126 ._3DCommandSubOpcode = 49, \
5127 .DwordLength = 0
5128
5129 #define GEN8_3DSTATE_URB_HS_length 0x00000002
5130
5131 struct GEN8_3DSTATE_URB_HS {
5132 uint32_t CommandType;
5133 uint32_t CommandSubType;
5134 uint32_t _3DCommandOpcode;
5135 uint32_t _3DCommandSubOpcode;
5136 uint32_t DwordLength;
5137 uint32_t HSURBStartingAddress;
5138 uint32_t HSURBEntryAllocationSize;
5139 uint32_t HSNumberofURBEntries;
5140 };
5141
5142 static inline void
5143 GEN8_3DSTATE_URB_HS_pack(__gen_user_data *data, void * restrict dst,
5144 const struct GEN8_3DSTATE_URB_HS * restrict values)
5145 {
5146 uint32_t *dw = (uint32_t * restrict) dst;
5147
5148 dw[0] =
5149 __gen_field(values->CommandType, 29, 31) |
5150 __gen_field(values->CommandSubType, 27, 28) |
5151 __gen_field(values->_3DCommandOpcode, 24, 26) |
5152 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5153 __gen_field(values->DwordLength, 0, 7) |
5154 0;
5155
5156 dw[1] =
5157 __gen_field(values->HSURBStartingAddress, 25, 31) |
5158 __gen_field(values->HSURBEntryAllocationSize, 16, 24) |
5159 __gen_field(values->HSNumberofURBEntries, 0, 15) |
5160 0;
5161
5162 }
5163
5164 #define GEN8_3DSTATE_VERTEX_BUFFERS_length_bias 0x00000002
5165 #define GEN8_3DSTATE_VERTEX_BUFFERS_header \
5166 .CommandType = 3, \
5167 .CommandSubType = 3, \
5168 ._3DCommandOpcode = 0, \
5169 ._3DCommandSubOpcode = 8
5170
5171 #define GEN8_3DSTATE_VERTEX_BUFFERS_length 0x00000000
5172
5173 #define GEN8_VERTEX_BUFFER_STATE_length 0x00000004
5174
5175 struct GEN8_VERTEX_BUFFER_STATE {
5176 uint32_t VertexBufferIndex;
5177 struct GEN8_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
5178 uint32_t AddressModifyEnable;
5179 bool NullVertexBuffer;
5180 uint32_t BufferPitch;
5181 __gen_address_type BufferStartingAddress;
5182 uint32_t BufferSize;
5183 };
5184
5185 static inline void
5186 GEN8_VERTEX_BUFFER_STATE_pack(__gen_user_data *data, void * restrict dst,
5187 const struct GEN8_VERTEX_BUFFER_STATE * restrict values)
5188 {
5189 uint32_t *dw = (uint32_t * restrict) dst;
5190
5191 uint32_t dw_MemoryObjectControlState;
5192 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
5193 dw[0] =
5194 __gen_field(values->VertexBufferIndex, 26, 31) |
5195 __gen_field(dw_MemoryObjectControlState, 16, 22) |
5196 __gen_field(values->AddressModifyEnable, 14, 14) |
5197 __gen_field(values->NullVertexBuffer, 13, 13) |
5198 __gen_field(values->BufferPitch, 0, 11) |
5199 0;
5200
5201 uint32_t dw1 =
5202 0;
5203
5204 uint64_t qw1 =
5205 __gen_combine_address(data, &dw[1], values->BufferStartingAddress, dw1);
5206
5207 dw[1] = qw1;
5208 dw[2] = qw1 >> 32;
5209
5210 dw[3] =
5211 __gen_field(values->BufferSize, 0, 31) |
5212 0;
5213
5214 }
5215
5216 struct GEN8_3DSTATE_VERTEX_BUFFERS {
5217 uint32_t CommandType;
5218 uint32_t CommandSubType;
5219 uint32_t _3DCommandOpcode;
5220 uint32_t _3DCommandSubOpcode;
5221 uint32_t DwordLength;
5222 /* variable length fields follow */
5223 };
5224
5225 static inline void
5226 GEN8_3DSTATE_VERTEX_BUFFERS_pack(__gen_user_data *data, void * restrict dst,
5227 const struct GEN8_3DSTATE_VERTEX_BUFFERS * restrict values)
5228 {
5229 uint32_t *dw = (uint32_t * restrict) dst;
5230
5231 dw[0] =
5232 __gen_field(values->CommandType, 29, 31) |
5233 __gen_field(values->CommandSubType, 27, 28) |
5234 __gen_field(values->_3DCommandOpcode, 24, 26) |
5235 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5236 __gen_field(values->DwordLength, 0, 7) |
5237 0;
5238
5239 /* variable length fields follow */
5240 }
5241
5242 #define GEN8_3DSTATE_VERTEX_ELEMENTS_length_bias 0x00000002
5243 #define GEN8_3DSTATE_VERTEX_ELEMENTS_header \
5244 .CommandType = 3, \
5245 .CommandSubType = 3, \
5246 ._3DCommandOpcode = 0, \
5247 ._3DCommandSubOpcode = 9
5248
5249 #define GEN8_3DSTATE_VERTEX_ELEMENTS_length 0x00000000
5250
5251 #define GEN8_VERTEX_ELEMENT_STATE_length 0x00000002
5252
5253 struct GEN8_VERTEX_ELEMENT_STATE {
5254 uint32_t VertexBufferIndex;
5255 bool Valid;
5256 uint32_t SourceElementFormat;
5257 bool EdgeFlagEnable;
5258 uint32_t SourceElementOffset;
5259 uint32_t Component0Control;
5260 uint32_t Component1Control;
5261 uint32_t Component2Control;
5262 uint32_t Component3Control;
5263 };
5264
5265 static inline void
5266 GEN8_VERTEX_ELEMENT_STATE_pack(__gen_user_data *data, void * restrict dst,
5267 const struct GEN8_VERTEX_ELEMENT_STATE * restrict values)
5268 {
5269 uint32_t *dw = (uint32_t * restrict) dst;
5270
5271 dw[0] =
5272 __gen_field(values->VertexBufferIndex, 26, 31) |
5273 __gen_field(values->Valid, 25, 25) |
5274 __gen_field(values->SourceElementFormat, 16, 24) |
5275 __gen_field(values->EdgeFlagEnable, 15, 15) |
5276 __gen_field(values->SourceElementOffset, 0, 11) |
5277 0;
5278
5279 dw[1] =
5280 __gen_field(values->Component0Control, 28, 30) |
5281 __gen_field(values->Component1Control, 24, 26) |
5282 __gen_field(values->Component2Control, 20, 22) |
5283 __gen_field(values->Component3Control, 16, 18) |
5284 0;
5285
5286 }
5287
5288 struct GEN8_3DSTATE_VERTEX_ELEMENTS {
5289 uint32_t CommandType;
5290 uint32_t CommandSubType;
5291 uint32_t _3DCommandOpcode;
5292 uint32_t _3DCommandSubOpcode;
5293 uint32_t DwordLength;
5294 /* variable length fields follow */
5295 };
5296
5297 static inline void
5298 GEN8_3DSTATE_VERTEX_ELEMENTS_pack(__gen_user_data *data, void * restrict dst,
5299 const struct GEN8_3DSTATE_VERTEX_ELEMENTS * restrict values)
5300 {
5301 uint32_t *dw = (uint32_t * restrict) dst;
5302
5303 dw[0] =
5304 __gen_field(values->CommandType, 29, 31) |
5305 __gen_field(values->CommandSubType, 27, 28) |
5306 __gen_field(values->_3DCommandOpcode, 24, 26) |
5307 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5308 __gen_field(values->DwordLength, 0, 7) |
5309 0;
5310
5311 /* variable length fields follow */
5312 }
5313
5314 #define GEN8_3DSTATE_VF_length_bias 0x00000002
5315 #define GEN8_3DSTATE_VF_header \
5316 .CommandType = 3, \
5317 .CommandSubType = 3, \
5318 ._3DCommandOpcode = 0, \
5319 ._3DCommandSubOpcode = 12, \
5320 .DwordLength = 0
5321
5322 #define GEN8_3DSTATE_VF_length 0x00000002
5323
5324 struct GEN8_3DSTATE_VF {
5325 uint32_t CommandType;
5326 uint32_t CommandSubType;
5327 uint32_t _3DCommandOpcode;
5328 uint32_t _3DCommandSubOpcode;
5329 bool IndexedDrawCutIndexEnable;
5330 uint32_t DwordLength;
5331 uint32_t CutIndex;
5332 };
5333
5334 static inline void
5335 GEN8_3DSTATE_VF_pack(__gen_user_data *data, void * restrict dst,
5336 const struct GEN8_3DSTATE_VF * restrict values)
5337 {
5338 uint32_t *dw = (uint32_t * restrict) dst;
5339
5340 dw[0] =
5341 __gen_field(values->CommandType, 29, 31) |
5342 __gen_field(values->CommandSubType, 27, 28) |
5343 __gen_field(values->_3DCommandOpcode, 24, 26) |
5344 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5345 __gen_field(values->IndexedDrawCutIndexEnable, 8, 8) |
5346 __gen_field(values->DwordLength, 0, 7) |
5347 0;
5348
5349 dw[1] =
5350 __gen_field(values->CutIndex, 0, 31) |
5351 0;
5352
5353 }
5354
5355 #define GEN8_3DSTATE_VF_INSTANCING_length_bias 0x00000002
5356 #define GEN8_3DSTATE_VF_INSTANCING_header \
5357 .CommandType = 3, \
5358 .CommandSubType = 3, \
5359 ._3DCommandOpcode = 0, \
5360 ._3DCommandSubOpcode = 73, \
5361 .DwordLength = 1
5362
5363 #define GEN8_3DSTATE_VF_INSTANCING_length 0x00000003
5364
5365 struct GEN8_3DSTATE_VF_INSTANCING {
5366 uint32_t CommandType;
5367 uint32_t CommandSubType;
5368 uint32_t _3DCommandOpcode;
5369 uint32_t _3DCommandSubOpcode;
5370 uint32_t DwordLength;
5371 bool InstancingEnable;
5372 uint32_t VertexElementIndex;
5373 uint32_t InstanceDataStepRate;
5374 };
5375
5376 static inline void
5377 GEN8_3DSTATE_VF_INSTANCING_pack(__gen_user_data *data, void * restrict dst,
5378 const struct GEN8_3DSTATE_VF_INSTANCING * restrict values)
5379 {
5380 uint32_t *dw = (uint32_t * restrict) dst;
5381
5382 dw[0] =
5383 __gen_field(values->CommandType, 29, 31) |
5384 __gen_field(values->CommandSubType, 27, 28) |
5385 __gen_field(values->_3DCommandOpcode, 24, 26) |
5386 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5387 __gen_field(values->DwordLength, 0, 7) |
5388 0;
5389
5390 dw[1] =
5391 __gen_field(values->InstancingEnable, 8, 8) |
5392 __gen_field(values->VertexElementIndex, 0, 5) |
5393 0;
5394
5395 dw[2] =
5396 __gen_field(values->InstanceDataStepRate, 0, 31) |
5397 0;
5398
5399 }
5400
5401 #define GEN8_3DSTATE_VF_SGVS_length_bias 0x00000002
5402 #define GEN8_3DSTATE_VF_SGVS_header \
5403 .CommandType = 3, \
5404 .CommandSubType = 3, \
5405 ._3DCommandOpcode = 0, \
5406 ._3DCommandSubOpcode = 74, \
5407 .DwordLength = 0
5408
5409 #define GEN8_3DSTATE_VF_SGVS_length 0x00000002
5410
5411 struct GEN8_3DSTATE_VF_SGVS {
5412 uint32_t CommandType;
5413 uint32_t CommandSubType;
5414 uint32_t _3DCommandOpcode;
5415 uint32_t _3DCommandSubOpcode;
5416 uint32_t DwordLength;
5417 bool InstanceIDEnable;
5418 #define COMP_0 0
5419 #define COMP_1 1
5420 #define COMP_2 2
5421 #define COMP_3 3
5422 uint32_t InstanceIDComponentNumber;
5423 uint32_t InstanceIDElementOffset;
5424 bool VertexIDEnable;
5425 #define COMP_0 0
5426 #define COMP_1 1
5427 #define COMP_2 2
5428 #define COMP_3 3
5429 uint32_t VertexIDComponentNumber;
5430 uint32_t VertexIDElementOffset;
5431 };
5432
5433 static inline void
5434 GEN8_3DSTATE_VF_SGVS_pack(__gen_user_data *data, void * restrict dst,
5435 const struct GEN8_3DSTATE_VF_SGVS * restrict values)
5436 {
5437 uint32_t *dw = (uint32_t * restrict) dst;
5438
5439 dw[0] =
5440 __gen_field(values->CommandType, 29, 31) |
5441 __gen_field(values->CommandSubType, 27, 28) |
5442 __gen_field(values->_3DCommandOpcode, 24, 26) |
5443 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5444 __gen_field(values->DwordLength, 0, 7) |
5445 0;
5446
5447 dw[1] =
5448 __gen_field(values->InstanceIDEnable, 31, 31) |
5449 __gen_field(values->InstanceIDComponentNumber, 29, 30) |
5450 __gen_field(values->InstanceIDElementOffset, 16, 21) |
5451 __gen_field(values->VertexIDEnable, 15, 15) |
5452 __gen_field(values->VertexIDComponentNumber, 13, 14) |
5453 __gen_field(values->VertexIDElementOffset, 0, 5) |
5454 0;
5455
5456 }
5457
5458 #define GEN8_3DSTATE_VF_STATISTICS_length_bias 0x00000001
5459 #define GEN8_3DSTATE_VF_STATISTICS_header \
5460 .CommandType = 3, \
5461 .CommandSubType = 1, \
5462 ._3DCommandOpcode = 0, \
5463 ._3DCommandSubOpcode = 11
5464
5465 #define GEN8_3DSTATE_VF_STATISTICS_length 0x00000001
5466
5467 struct GEN8_3DSTATE_VF_STATISTICS {
5468 uint32_t CommandType;
5469 uint32_t CommandSubType;
5470 uint32_t _3DCommandOpcode;
5471 uint32_t _3DCommandSubOpcode;
5472 bool StatisticsEnable;
5473 };
5474
5475 static inline void
5476 GEN8_3DSTATE_VF_STATISTICS_pack(__gen_user_data *data, void * restrict dst,
5477 const struct GEN8_3DSTATE_VF_STATISTICS * restrict values)
5478 {
5479 uint32_t *dw = (uint32_t * restrict) dst;
5480
5481 dw[0] =
5482 __gen_field(values->CommandType, 29, 31) |
5483 __gen_field(values->CommandSubType, 27, 28) |
5484 __gen_field(values->_3DCommandOpcode, 24, 26) |
5485 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5486 __gen_field(values->StatisticsEnable, 0, 0) |
5487 0;
5488
5489 }
5490
5491 #define GEN8_3DSTATE_VF_TOPOLOGY_length_bias 0x00000002
5492 #define GEN8_3DSTATE_VF_TOPOLOGY_header \
5493 .CommandType = 3, \
5494 .CommandSubType = 3, \
5495 ._3DCommandOpcode = 0, \
5496 ._3DCommandSubOpcode = 75, \
5497 .DwordLength = 0
5498
5499 #define GEN8_3DSTATE_VF_TOPOLOGY_length 0x00000002
5500
5501 struct GEN8_3DSTATE_VF_TOPOLOGY {
5502 uint32_t CommandType;
5503 uint32_t CommandSubType;
5504 uint32_t _3DCommandOpcode;
5505 uint32_t _3DCommandSubOpcode;
5506 uint32_t DwordLength;
5507 uint32_t PrimitiveTopologyType;
5508 };
5509
5510 static inline void
5511 GEN8_3DSTATE_VF_TOPOLOGY_pack(__gen_user_data *data, void * restrict dst,
5512 const struct GEN8_3DSTATE_VF_TOPOLOGY * restrict values)
5513 {
5514 uint32_t *dw = (uint32_t * restrict) dst;
5515
5516 dw[0] =
5517 __gen_field(values->CommandType, 29, 31) |
5518 __gen_field(values->CommandSubType, 27, 28) |
5519 __gen_field(values->_3DCommandOpcode, 24, 26) |
5520 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5521 __gen_field(values->DwordLength, 0, 7) |
5522 0;
5523
5524 dw[1] =
5525 __gen_field(values->PrimitiveTopologyType, 0, 5) |
5526 0;
5527
5528 }
5529
5530 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length_bias 0x00000002
5531 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_header\
5532 .CommandType = 3, \
5533 .CommandSubType = 3, \
5534 ._3DCommandOpcode = 0, \
5535 ._3DCommandSubOpcode = 35, \
5536 .DwordLength = 0
5537
5538 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length 0x00000002
5539
5540 struct GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC {
5541 uint32_t CommandType;
5542 uint32_t CommandSubType;
5543 uint32_t _3DCommandOpcode;
5544 uint32_t _3DCommandSubOpcode;
5545 uint32_t DwordLength;
5546 uint32_t CCViewportPointer;
5547 };
5548
5549 static inline void
5550 GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_pack(__gen_user_data *data, void * restrict dst,
5551 const struct GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC * restrict values)
5552 {
5553 uint32_t *dw = (uint32_t * restrict) dst;
5554
5555 dw[0] =
5556 __gen_field(values->CommandType, 29, 31) |
5557 __gen_field(values->CommandSubType, 27, 28) |
5558 __gen_field(values->_3DCommandOpcode, 24, 26) |
5559 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5560 __gen_field(values->DwordLength, 0, 7) |
5561 0;
5562
5563 dw[1] =
5564 __gen_offset(values->CCViewportPointer, 5, 31) |
5565 0;
5566
5567 }
5568
5569 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length_bias 0x00000002
5570 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_header\
5571 .CommandType = 3, \
5572 .CommandSubType = 3, \
5573 ._3DCommandOpcode = 0, \
5574 ._3DCommandSubOpcode = 33, \
5575 .DwordLength = 0
5576
5577 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length 0x00000002
5578
5579 struct GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP {
5580 uint32_t CommandType;
5581 uint32_t CommandSubType;
5582 uint32_t _3DCommandOpcode;
5583 uint32_t _3DCommandSubOpcode;
5584 uint32_t DwordLength;
5585 uint32_t SFClipViewportPointer;
5586 };
5587
5588 static inline void
5589 GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_pack(__gen_user_data *data, void * restrict dst,
5590 const struct GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP * restrict values)
5591 {
5592 uint32_t *dw = (uint32_t * restrict) dst;
5593
5594 dw[0] =
5595 __gen_field(values->CommandType, 29, 31) |
5596 __gen_field(values->CommandSubType, 27, 28) |
5597 __gen_field(values->_3DCommandOpcode, 24, 26) |
5598 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5599 __gen_field(values->DwordLength, 0, 7) |
5600 0;
5601
5602 dw[1] =
5603 __gen_offset(values->SFClipViewportPointer, 6, 31) |
5604 0;
5605
5606 }
5607
5608 #define GEN8_3DSTATE_WM_length_bias 0x00000002
5609 #define GEN8_3DSTATE_WM_header \
5610 .CommandType = 3, \
5611 .CommandSubType = 3, \
5612 ._3DCommandOpcode = 0, \
5613 ._3DCommandSubOpcode = 20, \
5614 .DwordLength = 0
5615
5616 #define GEN8_3DSTATE_WM_length 0x00000002
5617
5618 struct GEN8_3DSTATE_WM {
5619 uint32_t CommandType;
5620 uint32_t CommandSubType;
5621 uint32_t _3DCommandOpcode;
5622 uint32_t _3DCommandSubOpcode;
5623 uint32_t DwordLength;
5624 bool StatisticsEnable;
5625 bool LegacyDepthBufferClearEnable;
5626 bool LegacyDepthBufferResolveEnable;
5627 bool LegacyHierarchicalDepthBufferResolveEnable;
5628 bool LegacyDiamondLineRasterization;
5629 #define NORMAL 0
5630 #define PSEXEC 1
5631 #define PREPS 2
5632 uint32_t EarlyDepthStencilControl;
5633 #define Normal 0
5634 #define ForceOff 1
5635 #define ForceON 2
5636 uint32_t ForceThreadDispatchEnable;
5637 #define INTERP_PIXEL 0
5638 #define INTERP_CENTROID 2
5639 #define INTERP_SAMPLE 3
5640 uint32_t PositionZWInterpolationMode;
5641 uint32_t BarycentricInterpolationMode;
5642 #define _05pixels 0
5643 #define _10pixels 1
5644 #define _20pixels 2
5645 #define _40pixels 3
5646 uint32_t LineEndCapAntialiasingRegionWidth;
5647 #define _05pixels 0
5648 #define _10pixels 1
5649 #define _20pixels 2
5650 #define _40pixels 3
5651 uint32_t LineAntialiasingRegionWidth;
5652 bool PolygonStippleEnable;
5653 bool LineStippleEnable;
5654 #define RASTRULE_UPPER_LEFT 0
5655 #define RASTRULE_UPPER_RIGHT 1
5656 uint32_t PointRasterizationRule;
5657 #define Normal 0
5658 #define ForceOff 1
5659 #define ForceON 2
5660 uint32_t ForceKillPixelEnable;
5661 };
5662
5663 static inline void
5664 GEN8_3DSTATE_WM_pack(__gen_user_data *data, void * restrict dst,
5665 const struct GEN8_3DSTATE_WM * restrict values)
5666 {
5667 uint32_t *dw = (uint32_t * restrict) dst;
5668
5669 dw[0] =
5670 __gen_field(values->CommandType, 29, 31) |
5671 __gen_field(values->CommandSubType, 27, 28) |
5672 __gen_field(values->_3DCommandOpcode, 24, 26) |
5673 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5674 __gen_field(values->DwordLength, 0, 7) |
5675 0;
5676
5677 dw[1] =
5678 __gen_field(values->StatisticsEnable, 31, 31) |
5679 __gen_field(values->LegacyDepthBufferClearEnable, 30, 30) |
5680 __gen_field(values->LegacyDepthBufferResolveEnable, 28, 28) |
5681 __gen_field(values->LegacyHierarchicalDepthBufferResolveEnable, 27, 27) |
5682 __gen_field(values->LegacyDiamondLineRasterization, 26, 26) |
5683 __gen_field(values->EarlyDepthStencilControl, 21, 22) |
5684 __gen_field(values->ForceThreadDispatchEnable, 19, 20) |
5685 __gen_field(values->PositionZWInterpolationMode, 17, 18) |
5686 __gen_field(values->BarycentricInterpolationMode, 11, 16) |
5687 __gen_field(values->LineEndCapAntialiasingRegionWidth, 8, 9) |
5688 __gen_field(values->LineAntialiasingRegionWidth, 6, 7) |
5689 __gen_field(values->PolygonStippleEnable, 4, 4) |
5690 __gen_field(values->LineStippleEnable, 3, 3) |
5691 __gen_field(values->PointRasterizationRule, 2, 2) |
5692 __gen_field(values->ForceKillPixelEnable, 0, 1) |
5693 0;
5694
5695 }
5696
5697 #define GEN8_3DSTATE_WM_CHROMAKEY_length_bias 0x00000002
5698 #define GEN8_3DSTATE_WM_CHROMAKEY_header \
5699 .CommandType = 3, \
5700 .CommandSubType = 3, \
5701 ._3DCommandOpcode = 0, \
5702 ._3DCommandSubOpcode = 76, \
5703 .DwordLength = 0
5704
5705 #define GEN8_3DSTATE_WM_CHROMAKEY_length 0x00000002
5706
5707 struct GEN8_3DSTATE_WM_CHROMAKEY {
5708 uint32_t CommandType;
5709 uint32_t CommandSubType;
5710 uint32_t _3DCommandOpcode;
5711 uint32_t _3DCommandSubOpcode;
5712 uint32_t DwordLength;
5713 bool ChromaKeyKillEnable;
5714 };
5715
5716 static inline void
5717 GEN8_3DSTATE_WM_CHROMAKEY_pack(__gen_user_data *data, void * restrict dst,
5718 const struct GEN8_3DSTATE_WM_CHROMAKEY * restrict values)
5719 {
5720 uint32_t *dw = (uint32_t * restrict) dst;
5721
5722 dw[0] =
5723 __gen_field(values->CommandType, 29, 31) |
5724 __gen_field(values->CommandSubType, 27, 28) |
5725 __gen_field(values->_3DCommandOpcode, 24, 26) |
5726 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5727 __gen_field(values->DwordLength, 0, 7) |
5728 0;
5729
5730 dw[1] =
5731 __gen_field(values->ChromaKeyKillEnable, 31, 31) |
5732 0;
5733
5734 }
5735
5736 #define GEN8_3DSTATE_WM_DEPTH_STENCIL_length_bias 0x00000002
5737 #define GEN8_3DSTATE_WM_DEPTH_STENCIL_header \
5738 .CommandType = 3, \
5739 .CommandSubType = 3, \
5740 ._3DCommandOpcode = 0, \
5741 ._3DCommandSubOpcode = 78, \
5742 .DwordLength = 1
5743
5744 #define GEN8_3DSTATE_WM_DEPTH_STENCIL_length 0x00000003
5745
5746 struct GEN8_3DSTATE_WM_DEPTH_STENCIL {
5747 uint32_t CommandType;
5748 uint32_t CommandSubType;
5749 uint32_t _3DCommandOpcode;
5750 uint32_t _3DCommandSubOpcode;
5751 uint32_t DwordLength;
5752 uint32_t StencilFailOp;
5753 uint32_t StencilPassDepthFailOp;
5754 uint32_t StencilPassDepthPassOp;
5755 uint32_t BackfaceStencilTestFunction;
5756 uint32_t BackfaceStencilFailOp;
5757 uint32_t BackfaceStencilPassDepthFailOp;
5758 uint32_t BackfaceStencilPassDepthPassOp;
5759 uint32_t StencilTestFunction;
5760 uint32_t DepthTestFunction;
5761 bool DoubleSidedStencilEnable;
5762 bool StencilTestEnable;
5763 bool StencilBufferWriteEnable;
5764 bool DepthTestEnable;
5765 bool DepthBufferWriteEnable;
5766 uint32_t StencilTestMask;
5767 uint32_t StencilWriteMask;
5768 uint32_t BackfaceStencilTestMask;
5769 uint32_t BackfaceStencilWriteMask;
5770 };
5771
5772 static inline void
5773 GEN8_3DSTATE_WM_DEPTH_STENCIL_pack(__gen_user_data *data, void * restrict dst,
5774 const struct GEN8_3DSTATE_WM_DEPTH_STENCIL * restrict values)
5775 {
5776 uint32_t *dw = (uint32_t * restrict) dst;
5777
5778 dw[0] =
5779 __gen_field(values->CommandType, 29, 31) |
5780 __gen_field(values->CommandSubType, 27, 28) |
5781 __gen_field(values->_3DCommandOpcode, 24, 26) |
5782 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5783 __gen_field(values->DwordLength, 0, 7) |
5784 0;
5785
5786 dw[1] =
5787 __gen_field(values->StencilFailOp, 29, 31) |
5788 __gen_field(values->StencilPassDepthFailOp, 26, 28) |
5789 __gen_field(values->StencilPassDepthPassOp, 23, 25) |
5790 __gen_field(values->BackfaceStencilTestFunction, 20, 22) |
5791 __gen_field(values->BackfaceStencilFailOp, 17, 19) |
5792 __gen_field(values->BackfaceStencilPassDepthFailOp, 14, 16) |
5793 __gen_field(values->BackfaceStencilPassDepthPassOp, 11, 13) |
5794 __gen_field(values->StencilTestFunction, 8, 10) |
5795 __gen_field(values->DepthTestFunction, 5, 7) |
5796 __gen_field(values->DoubleSidedStencilEnable, 4, 4) |
5797 __gen_field(values->StencilTestEnable, 3, 3) |
5798 __gen_field(values->StencilBufferWriteEnable, 2, 2) |
5799 __gen_field(values->DepthTestEnable, 1, 1) |
5800 __gen_field(values->DepthBufferWriteEnable, 0, 0) |
5801 0;
5802
5803 dw[2] =
5804 __gen_field(values->StencilTestMask, 24, 31) |
5805 __gen_field(values->StencilWriteMask, 16, 23) |
5806 __gen_field(values->BackfaceStencilTestMask, 8, 15) |
5807 __gen_field(values->BackfaceStencilWriteMask, 0, 7) |
5808 0;
5809
5810 }
5811
5812 #define GEN8_3DSTATE_WM_HZ_OP_length_bias 0x00000002
5813 #define GEN8_3DSTATE_WM_HZ_OP_header \
5814 .CommandType = 3, \
5815 .CommandSubType = 3, \
5816 ._3DCommandOpcode = 0, \
5817 ._3DCommandSubOpcode = 82, \
5818 .DwordLength = 3
5819
5820 #define GEN8_3DSTATE_WM_HZ_OP_length 0x00000005
5821
5822 struct GEN8_3DSTATE_WM_HZ_OP {
5823 uint32_t CommandType;
5824 uint32_t CommandSubType;
5825 uint32_t _3DCommandOpcode;
5826 uint32_t _3DCommandSubOpcode;
5827 uint32_t DwordLength;
5828 bool StencilBufferClearEnable;
5829 bool DepthBufferClearEnable;
5830 bool ScissorRectangleEnable;
5831 bool DepthBufferResolveEnable;
5832 bool HierarchicalDepthBufferResolveEnable;
5833 uint32_t PixelPositionOffsetEnable;
5834 bool FullSurfaceDepthClear;
5835 uint32_t StencilClearValue;
5836 uint32_t NumberofMultisamples;
5837 uint32_t ClearRectangleYMin;
5838 uint32_t ClearRectangleXMin;
5839 uint32_t ClearRectangleYMax;
5840 uint32_t ClearRectangleXMax;
5841 uint32_t SampleMask;
5842 };
5843
5844 static inline void
5845 GEN8_3DSTATE_WM_HZ_OP_pack(__gen_user_data *data, void * restrict dst,
5846 const struct GEN8_3DSTATE_WM_HZ_OP * restrict values)
5847 {
5848 uint32_t *dw = (uint32_t * restrict) dst;
5849
5850 dw[0] =
5851 __gen_field(values->CommandType, 29, 31) |
5852 __gen_field(values->CommandSubType, 27, 28) |
5853 __gen_field(values->_3DCommandOpcode, 24, 26) |
5854 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5855 __gen_field(values->DwordLength, 0, 7) |
5856 0;
5857
5858 dw[1] =
5859 __gen_field(values->StencilBufferClearEnable, 31, 31) |
5860 __gen_field(values->DepthBufferClearEnable, 30, 30) |
5861 __gen_field(values->ScissorRectangleEnable, 29, 29) |
5862 __gen_field(values->DepthBufferResolveEnable, 28, 28) |
5863 __gen_field(values->HierarchicalDepthBufferResolveEnable, 27, 27) |
5864 __gen_field(values->PixelPositionOffsetEnable, 26, 26) |
5865 __gen_field(values->FullSurfaceDepthClear, 25, 25) |
5866 __gen_field(values->StencilClearValue, 16, 23) |
5867 __gen_field(values->NumberofMultisamples, 13, 15) |
5868 0;
5869
5870 dw[2] =
5871 __gen_field(values->ClearRectangleYMin, 16, 31) |
5872 __gen_field(values->ClearRectangleXMin, 0, 15) |
5873 0;
5874
5875 dw[3] =
5876 __gen_field(values->ClearRectangleYMax, 16, 31) |
5877 __gen_field(values->ClearRectangleXMax, 0, 15) |
5878 0;
5879
5880 dw[4] =
5881 __gen_field(values->SampleMask, 0, 15) |
5882 0;
5883
5884 }
5885
5886 #define GEN8_GPGPU_WALKER_length_bias 0x00000002
5887 #define GEN8_GPGPU_WALKER_header \
5888 .CommandType = 3, \
5889 .Pipeline = 2, \
5890 .MediaCommandOpcode = 1, \
5891 .SubOpcode = 5, \
5892 .DwordLength = 13
5893
5894 #define GEN8_GPGPU_WALKER_length 0x0000000f
5895
5896 struct GEN8_GPGPU_WALKER {
5897 uint32_t CommandType;
5898 uint32_t Pipeline;
5899 uint32_t MediaCommandOpcode;
5900 uint32_t SubOpcode;
5901 bool IndirectParameterEnable;
5902 bool PredicateEnable;
5903 uint32_t DwordLength;
5904 uint32_t InterfaceDescriptorOffset;
5905 uint32_t IndirectDataLength;
5906 uint32_t IndirectDataStartAddress;
5907 #define SIMD8 0
5908 #define SIMD16 1
5909 #define SIMD32 2
5910 uint32_t SIMDSize;
5911 uint32_t ThreadDepthCounterMaximum;
5912 uint32_t ThreadHeightCounterMaximum;
5913 uint32_t ThreadWidthCounterMaximum;
5914 uint32_t ThreadGroupIDStartingX;
5915 uint32_t ThreadGroupIDXDimension;
5916 uint32_t ThreadGroupIDStartingY;
5917 uint32_t ThreadGroupIDYDimension;
5918 uint32_t ThreadGroupIDStartingResumeZ;
5919 uint32_t ThreadGroupIDZDimension;
5920 uint32_t RightExecutionMask;
5921 uint32_t BottomExecutionMask;
5922 };
5923
5924 static inline void
5925 GEN8_GPGPU_WALKER_pack(__gen_user_data *data, void * restrict dst,
5926 const struct GEN8_GPGPU_WALKER * restrict values)
5927 {
5928 uint32_t *dw = (uint32_t * restrict) dst;
5929
5930 dw[0] =
5931 __gen_field(values->CommandType, 29, 31) |
5932 __gen_field(values->Pipeline, 27, 28) |
5933 __gen_field(values->MediaCommandOpcode, 24, 26) |
5934 __gen_field(values->SubOpcode, 16, 23) |
5935 __gen_field(values->IndirectParameterEnable, 10, 10) |
5936 __gen_field(values->PredicateEnable, 8, 8) |
5937 __gen_field(values->DwordLength, 0, 7) |
5938 0;
5939
5940 dw[1] =
5941 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
5942 0;
5943
5944 dw[2] =
5945 __gen_field(values->IndirectDataLength, 0, 16) |
5946 0;
5947
5948 dw[3] =
5949 __gen_offset(values->IndirectDataStartAddress, 6, 31) |
5950 0;
5951
5952 dw[4] =
5953 __gen_field(values->SIMDSize, 30, 31) |
5954 __gen_field(values->ThreadDepthCounterMaximum, 16, 21) |
5955 __gen_field(values->ThreadHeightCounterMaximum, 8, 13) |
5956 __gen_field(values->ThreadWidthCounterMaximum, 0, 5) |
5957 0;
5958
5959 dw[5] =
5960 __gen_field(values->ThreadGroupIDStartingX, 0, 31) |
5961 0;
5962
5963 dw[6] =
5964 0;
5965
5966 dw[7] =
5967 __gen_field(values->ThreadGroupIDXDimension, 0, 31) |
5968 0;
5969
5970 dw[8] =
5971 __gen_field(values->ThreadGroupIDStartingY, 0, 31) |
5972 0;
5973
5974 dw[9] =
5975 0;
5976
5977 dw[10] =
5978 __gen_field(values->ThreadGroupIDYDimension, 0, 31) |
5979 0;
5980
5981 dw[11] =
5982 __gen_field(values->ThreadGroupIDStartingResumeZ, 0, 31) |
5983 0;
5984
5985 dw[12] =
5986 __gen_field(values->ThreadGroupIDZDimension, 0, 31) |
5987 0;
5988
5989 dw[13] =
5990 __gen_field(values->RightExecutionMask, 0, 31) |
5991 0;
5992
5993 dw[14] =
5994 __gen_field(values->BottomExecutionMask, 0, 31) |
5995 0;
5996
5997 }
5998
5999 #define GEN8_MEDIA_CURBE_LOAD_length_bias 0x00000002
6000 #define GEN8_MEDIA_CURBE_LOAD_header \
6001 .CommandType = 3, \
6002 .Pipeline = 2, \
6003 .MediaCommandOpcode = 0, \
6004 .SubOpcode = 1, \
6005 .DwordLength = 2
6006
6007 #define GEN8_MEDIA_CURBE_LOAD_length 0x00000004
6008
6009 struct GEN8_MEDIA_CURBE_LOAD {
6010 uint32_t CommandType;
6011 uint32_t Pipeline;
6012 uint32_t MediaCommandOpcode;
6013 uint32_t SubOpcode;
6014 uint32_t DwordLength;
6015 uint32_t CURBETotalDataLength;
6016 uint32_t CURBEDataStartAddress;
6017 };
6018
6019 static inline void
6020 GEN8_MEDIA_CURBE_LOAD_pack(__gen_user_data *data, void * restrict dst,
6021 const struct GEN8_MEDIA_CURBE_LOAD * restrict values)
6022 {
6023 uint32_t *dw = (uint32_t * restrict) dst;
6024
6025 dw[0] =
6026 __gen_field(values->CommandType, 29, 31) |
6027 __gen_field(values->Pipeline, 27, 28) |
6028 __gen_field(values->MediaCommandOpcode, 24, 26) |
6029 __gen_field(values->SubOpcode, 16, 23) |
6030 __gen_field(values->DwordLength, 0, 15) |
6031 0;
6032
6033 dw[1] =
6034 0;
6035
6036 dw[2] =
6037 __gen_field(values->CURBETotalDataLength, 0, 16) |
6038 0;
6039
6040 dw[3] =
6041 __gen_field(values->CURBEDataStartAddress, 0, 31) |
6042 0;
6043
6044 }
6045
6046 #define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length_bias 0x00000002
6047 #define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_header\
6048 .CommandType = 3, \
6049 .Pipeline = 2, \
6050 .MediaCommandOpcode = 0, \
6051 .SubOpcode = 2, \
6052 .DwordLength = 2
6053
6054 #define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 0x00000004
6055
6056 struct GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD {
6057 uint32_t CommandType;
6058 uint32_t Pipeline;
6059 uint32_t MediaCommandOpcode;
6060 uint32_t SubOpcode;
6061 uint32_t DwordLength;
6062 uint32_t InterfaceDescriptorTotalLength;
6063 uint32_t InterfaceDescriptorDataStartAddress;
6064 };
6065
6066 static inline void
6067 GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_pack(__gen_user_data *data, void * restrict dst,
6068 const struct GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD * restrict values)
6069 {
6070 uint32_t *dw = (uint32_t * restrict) dst;
6071
6072 dw[0] =
6073 __gen_field(values->CommandType, 29, 31) |
6074 __gen_field(values->Pipeline, 27, 28) |
6075 __gen_field(values->MediaCommandOpcode, 24, 26) |
6076 __gen_field(values->SubOpcode, 16, 23) |
6077 __gen_field(values->DwordLength, 0, 15) |
6078 0;
6079
6080 dw[1] =
6081 0;
6082
6083 dw[2] =
6084 __gen_field(values->InterfaceDescriptorTotalLength, 0, 16) |
6085 0;
6086
6087 dw[3] =
6088 __gen_offset(values->InterfaceDescriptorDataStartAddress, 0, 31) |
6089 0;
6090
6091 }
6092
6093 #define GEN8_MEDIA_OBJECT_length_bias 0x00000002
6094 #define GEN8_MEDIA_OBJECT_header \
6095 .CommandType = 3, \
6096 .MediaCommandPipeline = 2, \
6097 .MediaCommandOpcode = 1, \
6098 .MediaCommandSubOpcode = 0
6099
6100 #define GEN8_MEDIA_OBJECT_length 0x00000000
6101
6102 struct GEN8_MEDIA_OBJECT {
6103 uint32_t CommandType;
6104 uint32_t MediaCommandPipeline;
6105 uint32_t MediaCommandOpcode;
6106 uint32_t MediaCommandSubOpcode;
6107 uint32_t DwordLength;
6108 uint32_t InterfaceDescriptorOffset;
6109 bool ChildrenPresent;
6110 #define Nothreadsynchronization 0
6111 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
6112 uint32_t ThreadSynchronization;
6113 uint32_t ForceDestination;
6114 #define Notusingscoreboard 0
6115 #define Usingscoreboard 1
6116 uint32_t UseScoreboard;
6117 #define Slice0 0
6118 #define Slice1 1
6119 #define Slice2 2
6120 uint32_t SliceDestinationSelect;
6121 #define SubSlice2 2
6122 #define SubSlice1 1
6123 #define SubSlice0 0
6124 uint32_t SubSliceDestinationSelect;
6125 uint32_t IndirectDataLength;
6126 __gen_address_type IndirectDataStartAddress;
6127 uint32_t ScoredboardY;
6128 uint32_t ScoreboardX;
6129 uint32_t ScoreboardColor;
6130 bool ScoreboardMask;
6131 /* variable length fields follow */
6132 };
6133
6134 static inline void
6135 GEN8_MEDIA_OBJECT_pack(__gen_user_data *data, void * restrict dst,
6136 const struct GEN8_MEDIA_OBJECT * restrict values)
6137 {
6138 uint32_t *dw = (uint32_t * restrict) dst;
6139
6140 dw[0] =
6141 __gen_field(values->CommandType, 29, 31) |
6142 __gen_field(values->MediaCommandPipeline, 27, 28) |
6143 __gen_field(values->MediaCommandOpcode, 24, 26) |
6144 __gen_field(values->MediaCommandSubOpcode, 16, 23) |
6145 __gen_field(values->DwordLength, 0, 15) |
6146 0;
6147
6148 dw[1] =
6149 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6150 0;
6151
6152 dw[2] =
6153 __gen_field(values->ChildrenPresent, 31, 31) |
6154 __gen_field(values->ThreadSynchronization, 24, 24) |
6155 __gen_field(values->ForceDestination, 22, 22) |
6156 __gen_field(values->UseScoreboard, 21, 21) |
6157 __gen_field(values->SliceDestinationSelect, 19, 20) |
6158 __gen_field(values->SubSliceDestinationSelect, 17, 18) |
6159 __gen_field(values->IndirectDataLength, 0, 16) |
6160 0;
6161
6162 uint32_t dw3 =
6163 0;
6164
6165 dw[3] =
6166 __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, dw3);
6167
6168 dw[4] =
6169 __gen_field(values->ScoredboardY, 16, 24) |
6170 __gen_field(values->ScoreboardX, 0, 8) |
6171 0;
6172
6173 dw[5] =
6174 __gen_field(values->ScoreboardColor, 16, 19) |
6175 __gen_field(values->ScoreboardMask, 0, 7) |
6176 0;
6177
6178 /* variable length fields follow */
6179 }
6180
6181 #define GEN8_MEDIA_OBJECT_GRPID_length_bias 0x00000002
6182 #define GEN8_MEDIA_OBJECT_GRPID_header \
6183 .CommandType = 3, \
6184 .MediaCommandPipeline = 2, \
6185 .MediaCommandOpcode = 1, \
6186 .MediaCommandSubOpcode = 6
6187
6188 #define GEN8_MEDIA_OBJECT_GRPID_length 0x00000000
6189
6190 struct GEN8_MEDIA_OBJECT_GRPID {
6191 uint32_t CommandType;
6192 uint32_t MediaCommandPipeline;
6193 uint32_t MediaCommandOpcode;
6194 uint32_t MediaCommandSubOpcode;
6195 uint32_t DwordLength;
6196 uint32_t InterfaceDescriptorOffset;
6197 uint32_t EndofThreadGroup;
6198 uint32_t ForceDestination;
6199 #define Notusingscoreboard 0
6200 #define Usingscoreboard 1
6201 uint32_t UseScoreboard;
6202 #define Slice0 0
6203 #define Slice1 1
6204 #define Slice2 2
6205 uint32_t SliceDestinationSelect;
6206 #define SubSlice2 2
6207 #define SubSlice1 1
6208 #define SubSlice0 0
6209 uint32_t SubSliceDestinationSelect;
6210 uint32_t IndirectDataLength;
6211 __gen_address_type IndirectDataStartAddress;
6212 uint32_t ScoreboardY;
6213 uint32_t ScoreboardX;
6214 uint32_t ScoreboardColor;
6215 bool ScoreboardMask;
6216 uint32_t GroupID;
6217 /* variable length fields follow */
6218 };
6219
6220 static inline void
6221 GEN8_MEDIA_OBJECT_GRPID_pack(__gen_user_data *data, void * restrict dst,
6222 const struct GEN8_MEDIA_OBJECT_GRPID * restrict values)
6223 {
6224 uint32_t *dw = (uint32_t * restrict) dst;
6225
6226 dw[0] =
6227 __gen_field(values->CommandType, 29, 31) |
6228 __gen_field(values->MediaCommandPipeline, 27, 28) |
6229 __gen_field(values->MediaCommandOpcode, 24, 26) |
6230 __gen_field(values->MediaCommandSubOpcode, 16, 23) |
6231 __gen_field(values->DwordLength, 0, 15) |
6232 0;
6233
6234 dw[1] =
6235 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6236 0;
6237
6238 dw[2] =
6239 __gen_field(values->EndofThreadGroup, 23, 23) |
6240 __gen_field(values->ForceDestination, 22, 22) |
6241 __gen_field(values->UseScoreboard, 21, 21) |
6242 __gen_field(values->SliceDestinationSelect, 19, 20) |
6243 __gen_field(values->SubSliceDestinationSelect, 17, 18) |
6244 __gen_field(values->IndirectDataLength, 0, 16) |
6245 0;
6246
6247 uint32_t dw3 =
6248 0;
6249
6250 dw[3] =
6251 __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, dw3);
6252
6253 dw[4] =
6254 __gen_field(values->ScoreboardY, 16, 24) |
6255 __gen_field(values->ScoreboardX, 0, 8) |
6256 0;
6257
6258 dw[5] =
6259 __gen_field(values->ScoreboardColor, 16, 19) |
6260 __gen_field(values->ScoreboardMask, 0, 7) |
6261 0;
6262
6263 dw[6] =
6264 __gen_field(values->GroupID, 0, 31) |
6265 0;
6266
6267 /* variable length fields follow */
6268 }
6269
6270 #define GEN8_MEDIA_OBJECT_PRT_length_bias 0x00000002
6271 #define GEN8_MEDIA_OBJECT_PRT_header \
6272 .CommandType = 3, \
6273 .Pipeline = 2, \
6274 .MediaCommandOpcode = 1, \
6275 .SubOpcode = 2, \
6276 .DwordLength = 14
6277
6278 #define GEN8_MEDIA_OBJECT_PRT_length 0x00000010
6279
6280 struct GEN8_MEDIA_OBJECT_PRT {
6281 uint32_t CommandType;
6282 uint32_t Pipeline;
6283 uint32_t MediaCommandOpcode;
6284 uint32_t SubOpcode;
6285 uint32_t DwordLength;
6286 uint32_t InterfaceDescriptorOffset;
6287 bool ChildrenPresent;
6288 bool PRT_FenceNeeded;
6289 #define Rootthreadqueue 0
6290 #define VFEstateflush 1
6291 uint32_t PRT_FenceType;
6292 uint32_t InlineData[12];
6293 };
6294
6295 static inline void
6296 GEN8_MEDIA_OBJECT_PRT_pack(__gen_user_data *data, void * restrict dst,
6297 const struct GEN8_MEDIA_OBJECT_PRT * restrict values)
6298 {
6299 uint32_t *dw = (uint32_t * restrict) dst;
6300
6301 dw[0] =
6302 __gen_field(values->CommandType, 29, 31) |
6303 __gen_field(values->Pipeline, 27, 28) |
6304 __gen_field(values->MediaCommandOpcode, 24, 26) |
6305 __gen_field(values->SubOpcode, 16, 23) |
6306 __gen_field(values->DwordLength, 0, 15) |
6307 0;
6308
6309 dw[1] =
6310 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6311 0;
6312
6313 dw[2] =
6314 __gen_field(values->ChildrenPresent, 31, 31) |
6315 __gen_field(values->PRT_FenceNeeded, 23, 23) |
6316 __gen_field(values->PRT_FenceType, 22, 22) |
6317 0;
6318
6319 dw[3] =
6320 0;
6321
6322 for (uint32_t i = 0, j = 4; i < 12; i += 1, j++) {
6323 dw[j] =
6324 __gen_field(values->InlineData[i + 0], 0, 31) |
6325 0;
6326 }
6327
6328 }
6329
6330 #define GEN8_MEDIA_OBJECT_WALKER_length_bias 0x00000002
6331 #define GEN8_MEDIA_OBJECT_WALKER_header \
6332 .CommandType = 3, \
6333 .Pipeline = 2, \
6334 .MediaCommandOpcode = 1, \
6335 .SubOpcode = 3
6336
6337 #define GEN8_MEDIA_OBJECT_WALKER_length 0x00000000
6338
6339 struct GEN8_MEDIA_OBJECT_WALKER {
6340 uint32_t CommandType;
6341 uint32_t Pipeline;
6342 uint32_t MediaCommandOpcode;
6343 uint32_t SubOpcode;
6344 uint32_t DwordLength;
6345 uint32_t InterfaceDescriptorOffset;
6346 bool ChildrenPresent;
6347 #define Nothreadsynchronization 0
6348 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
6349 uint32_t ThreadSynchronization;
6350 #define Notusingscoreboard 0
6351 #define Usingscoreboard 1
6352 uint32_t UseScoreboard;
6353 uint32_t IndirectDataLength;
6354 uint32_t IndirectDataStartAddress;
6355 uint32_t GroupIDLoopSelect;
6356 bool ScoreboardMask;
6357 uint32_t ColorCountMinusOne;
6358 uint32_t MiddleLoopExtraSteps;
6359 uint32_t LocalMidLoopUnitY;
6360 uint32_t MidLoopUnitX;
6361 uint32_t GlobalLoopExecCount;
6362 uint32_t LocalLoopExecCount;
6363 uint32_t BlockResolutionY;
6364 uint32_t BlockResolutionX;
6365 uint32_t LocalStartY;
6366 uint32_t LocalStartX;
6367 uint32_t LocalOuterLoopStrideY;
6368 uint32_t LocalOuterLoopStrideX;
6369 uint32_t LocalInnerLoopUnitY;
6370 uint32_t LocalInnerLoopUnitX;
6371 uint32_t GlobalResolutionY;
6372 uint32_t GlobalResolutionX;
6373 uint32_t GlobalStartY;
6374 uint32_t GlobalStartX;
6375 uint32_t GlobalOuterLoopStrideY;
6376 uint32_t GlobalOuterLoopStrideX;
6377 uint32_t GlobalInnerLoopUnitY;
6378 uint32_t GlobalInnerLoopUnitX;
6379 /* variable length fields follow */
6380 };
6381
6382 static inline void
6383 GEN8_MEDIA_OBJECT_WALKER_pack(__gen_user_data *data, void * restrict dst,
6384 const struct GEN8_MEDIA_OBJECT_WALKER * restrict values)
6385 {
6386 uint32_t *dw = (uint32_t * restrict) dst;
6387
6388 dw[0] =
6389 __gen_field(values->CommandType, 29, 31) |
6390 __gen_field(values->Pipeline, 27, 28) |
6391 __gen_field(values->MediaCommandOpcode, 24, 26) |
6392 __gen_field(values->SubOpcode, 16, 23) |
6393 __gen_field(values->DwordLength, 0, 15) |
6394 0;
6395
6396 dw[1] =
6397 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6398 0;
6399
6400 dw[2] =
6401 __gen_field(values->ChildrenPresent, 31, 31) |
6402 __gen_field(values->ThreadSynchronization, 24, 24) |
6403 __gen_field(values->UseScoreboard, 21, 21) |
6404 __gen_field(values->IndirectDataLength, 0, 16) |
6405 0;
6406
6407 dw[3] =
6408 __gen_offset(values->IndirectDataStartAddress, 0, 31) |
6409 0;
6410
6411 dw[4] =
6412 0;
6413
6414 dw[5] =
6415 __gen_field(values->GroupIDLoopSelect, 8, 31) |
6416 __gen_field(values->ScoreboardMask, 0, 7) |
6417 0;
6418
6419 dw[6] =
6420 __gen_field(values->ColorCountMinusOne, 24, 27) |
6421 __gen_field(values->MiddleLoopExtraSteps, 16, 20) |
6422 __gen_field(values->LocalMidLoopUnitY, 12, 13) |
6423 __gen_field(values->MidLoopUnitX, 8, 9) |
6424 0;
6425
6426 dw[7] =
6427 __gen_field(values->GlobalLoopExecCount, 16, 25) |
6428 __gen_field(values->LocalLoopExecCount, 0, 9) |
6429 0;
6430
6431 dw[8] =
6432 __gen_field(values->BlockResolutionY, 16, 24) |
6433 __gen_field(values->BlockResolutionX, 0, 8) |
6434 0;
6435
6436 dw[9] =
6437 __gen_field(values->LocalStartY, 16, 24) |
6438 __gen_field(values->LocalStartX, 0, 8) |
6439 0;
6440
6441 dw[10] =
6442 0;
6443
6444 dw[11] =
6445 __gen_field(values->LocalOuterLoopStrideY, 16, 25) |
6446 __gen_field(values->LocalOuterLoopStrideX, 0, 9) |
6447 0;
6448
6449 dw[12] =
6450 __gen_field(values->LocalInnerLoopUnitY, 16, 25) |
6451 __gen_field(values->LocalInnerLoopUnitX, 0, 9) |
6452 0;
6453
6454 dw[13] =
6455 __gen_field(values->GlobalResolutionY, 16, 24) |
6456 __gen_field(values->GlobalResolutionX, 0, 8) |
6457 0;
6458
6459 dw[14] =
6460 __gen_field(values->GlobalStartY, 16, 25) |
6461 __gen_field(values->GlobalStartX, 0, 9) |
6462 0;
6463
6464 dw[15] =
6465 __gen_field(values->GlobalOuterLoopStrideY, 16, 25) |
6466 __gen_field(values->GlobalOuterLoopStrideX, 0, 9) |
6467 0;
6468
6469 dw[16] =
6470 __gen_field(values->GlobalInnerLoopUnitY, 16, 25) |
6471 __gen_field(values->GlobalInnerLoopUnitX, 0, 9) |
6472 0;
6473
6474 /* variable length fields follow */
6475 }
6476
6477 #define GEN8_MEDIA_STATE_FLUSH_length_bias 0x00000002
6478 #define GEN8_MEDIA_STATE_FLUSH_header \
6479 .CommandType = 3, \
6480 .Pipeline = 2, \
6481 .MediaCommandOpcode = 0, \
6482 .SubOpcode = 4, \
6483 .DwordLength = 0
6484
6485 #define GEN8_MEDIA_STATE_FLUSH_length 0x00000002
6486
6487 struct GEN8_MEDIA_STATE_FLUSH {
6488 uint32_t CommandType;
6489 uint32_t Pipeline;
6490 uint32_t MediaCommandOpcode;
6491 uint32_t SubOpcode;
6492 uint32_t DwordLength;
6493 bool FlushtoGO;
6494 uint32_t WatermarkRequired;
6495 uint32_t InterfaceDescriptorOffset;
6496 };
6497
6498 static inline void
6499 GEN8_MEDIA_STATE_FLUSH_pack(__gen_user_data *data, void * restrict dst,
6500 const struct GEN8_MEDIA_STATE_FLUSH * restrict values)
6501 {
6502 uint32_t *dw = (uint32_t * restrict) dst;
6503
6504 dw[0] =
6505 __gen_field(values->CommandType, 29, 31) |
6506 __gen_field(values->Pipeline, 27, 28) |
6507 __gen_field(values->MediaCommandOpcode, 24, 26) |
6508 __gen_field(values->SubOpcode, 16, 23) |
6509 __gen_field(values->DwordLength, 0, 15) |
6510 0;
6511
6512 dw[1] =
6513 __gen_field(values->FlushtoGO, 7, 7) |
6514 __gen_field(values->WatermarkRequired, 6, 6) |
6515 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6516 0;
6517
6518 }
6519
6520 #define GEN8_MEDIA_VFE_STATE_length_bias 0x00000002
6521 #define GEN8_MEDIA_VFE_STATE_header \
6522 .CommandType = 3, \
6523 .Pipeline = 2, \
6524 .MediaCommandOpcode = 0, \
6525 .SubOpcode = 0, \
6526 .DwordLength = 7
6527
6528 #define GEN8_MEDIA_VFE_STATE_length 0x00000009
6529
6530 struct GEN8_MEDIA_VFE_STATE {
6531 uint32_t CommandType;
6532 uint32_t Pipeline;
6533 uint32_t MediaCommandOpcode;
6534 uint32_t SubOpcode;
6535 uint32_t DwordLength;
6536 uint32_t ScratchSpaceBasePointer;
6537 uint32_t StackSize;
6538 uint32_t PerThreadScratchSpace;
6539 uint32_t ScratchSpaceBasePointerHigh;
6540 uint32_t MaximumNumberofThreads;
6541 uint32_t NumberofURBEntries;
6542 #define Maintainingtheexistingtimestampstate 0
6543 #define Resettingrelativetimerandlatchingtheglobaltimestamp 1
6544 uint32_t ResetGatewayTimer;
6545 #define MaintainingOpenGatewayForwardMsgCloseGatewayprotocollegacymode 0
6546 #define BypassingOpenGatewayCloseGatewayprotocol 1
6547 uint32_t BypassGatewayControl;
6548 uint32_t SliceDisable;
6549 uint32_t URBEntryAllocationSize;
6550 uint32_t CURBEAllocationSize;
6551 #define Scoreboarddisabled 0
6552 #define Scoreboardenabled 1
6553 uint32_t ScoreboardEnable;
6554 #define StallingScoreboard 0
6555 #define NonStallingScoreboard 1
6556 uint32_t ScoreboardType;
6557 uint32_t ScoreboardMask;
6558 uint32_t Scoreboard3DeltaY;
6559 uint32_t Scoreboard3DeltaX;
6560 uint32_t Scoreboard2DeltaY;
6561 uint32_t Scoreboard2DeltaX;
6562 uint32_t Scoreboard1DeltaY;
6563 uint32_t Scoreboard1DeltaX;
6564 uint32_t Scoreboard0DeltaY;
6565 uint32_t Scoreboard0DeltaX;
6566 uint32_t Scoreboard7DeltaY;
6567 uint32_t Scoreboard7DeltaX;
6568 uint32_t Scoreboard6DeltaY;
6569 uint32_t Scoreboard6DeltaX;
6570 uint32_t Scoreboard5DeltaY;
6571 uint32_t Scoreboard5DeltaX;
6572 uint32_t Scoreboard4DeltaY;
6573 uint32_t Scoreboard4DeltaX;
6574 };
6575
6576 static inline void
6577 GEN8_MEDIA_VFE_STATE_pack(__gen_user_data *data, void * restrict dst,
6578 const struct GEN8_MEDIA_VFE_STATE * restrict values)
6579 {
6580 uint32_t *dw = (uint32_t * restrict) dst;
6581
6582 dw[0] =
6583 __gen_field(values->CommandType, 29, 31) |
6584 __gen_field(values->Pipeline, 27, 28) |
6585 __gen_field(values->MediaCommandOpcode, 24, 26) |
6586 __gen_field(values->SubOpcode, 16, 23) |
6587 __gen_field(values->DwordLength, 0, 15) |
6588 0;
6589
6590 dw[1] =
6591 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
6592 __gen_field(values->StackSize, 4, 7) |
6593 __gen_field(values->PerThreadScratchSpace, 0, 3) |
6594 0;
6595
6596 dw[2] =
6597 __gen_offset(values->ScratchSpaceBasePointerHigh, 0, 15) |
6598 0;
6599
6600 dw[3] =
6601 __gen_field(values->MaximumNumberofThreads, 16, 31) |
6602 __gen_field(values->NumberofURBEntries, 8, 15) |
6603 __gen_field(values->ResetGatewayTimer, 7, 7) |
6604 __gen_field(values->BypassGatewayControl, 6, 6) |
6605 0;
6606
6607 dw[4] =
6608 __gen_field(values->SliceDisable, 0, 1) |
6609 0;
6610
6611 dw[5] =
6612 __gen_field(values->URBEntryAllocationSize, 16, 31) |
6613 __gen_field(values->CURBEAllocationSize, 0, 15) |
6614 0;
6615
6616 dw[6] =
6617 __gen_field(values->ScoreboardEnable, 31, 31) |
6618 __gen_field(values->ScoreboardType, 30, 30) |
6619 __gen_field(values->ScoreboardMask, 0, 7) |
6620 0;
6621
6622 dw[7] =
6623 __gen_field(values->Scoreboard3DeltaY, 28, 31) |
6624 __gen_field(values->Scoreboard3DeltaX, 24, 27) |
6625 __gen_field(values->Scoreboard2DeltaY, 20, 23) |
6626 __gen_field(values->Scoreboard2DeltaX, 16, 19) |
6627 __gen_field(values->Scoreboard1DeltaY, 12, 15) |
6628 __gen_field(values->Scoreboard1DeltaX, 8, 11) |
6629 __gen_field(values->Scoreboard0DeltaY, 4, 7) |
6630 __gen_field(values->Scoreboard0DeltaX, 0, 3) |
6631 0;
6632
6633 dw[8] =
6634 __gen_field(values->Scoreboard7DeltaY, 28, 31) |
6635 __gen_field(values->Scoreboard7DeltaX, 24, 27) |
6636 __gen_field(values->Scoreboard6DeltaY, 20, 23) |
6637 __gen_field(values->Scoreboard6DeltaX, 16, 19) |
6638 __gen_field(values->Scoreboard5DeltaY, 12, 15) |
6639 __gen_field(values->Scoreboard5DeltaX, 8, 11) |
6640 __gen_field(values->Scoreboard4DeltaY, 4, 7) |
6641 __gen_field(values->Scoreboard4DeltaX, 0, 3) |
6642 0;
6643
6644 }
6645
6646 #define GEN8_MI_ARB_CHECK_length_bias 0x00000001
6647 #define GEN8_MI_ARB_CHECK_header \
6648 .CommandType = 0, \
6649 .MICommandOpcode = 5
6650
6651 #define GEN8_MI_ARB_CHECK_length 0x00000001
6652
6653 struct GEN8_MI_ARB_CHECK {
6654 uint32_t CommandType;
6655 uint32_t MICommandOpcode;
6656 };
6657
6658 static inline void
6659 GEN8_MI_ARB_CHECK_pack(__gen_user_data *data, void * restrict dst,
6660 const struct GEN8_MI_ARB_CHECK * restrict values)
6661 {
6662 uint32_t *dw = (uint32_t * restrict) dst;
6663
6664 dw[0] =
6665 __gen_field(values->CommandType, 29, 31) |
6666 __gen_field(values->MICommandOpcode, 23, 28) |
6667 0;
6668
6669 }
6670
6671 #define GEN8_MI_BATCH_BUFFER_END_length_bias 0x00000001
6672 #define GEN8_MI_BATCH_BUFFER_END_header \
6673 .CommandType = 0, \
6674 .MICommandOpcode = 10
6675
6676 #define GEN8_MI_BATCH_BUFFER_END_length 0x00000001
6677
6678 struct GEN8_MI_BATCH_BUFFER_END {
6679 uint32_t CommandType;
6680 uint32_t MICommandOpcode;
6681 };
6682
6683 static inline void
6684 GEN8_MI_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
6685 const struct GEN8_MI_BATCH_BUFFER_END * restrict values)
6686 {
6687 uint32_t *dw = (uint32_t * restrict) dst;
6688
6689 dw[0] =
6690 __gen_field(values->CommandType, 29, 31) |
6691 __gen_field(values->MICommandOpcode, 23, 28) |
6692 0;
6693
6694 }
6695
6696 #define GEN8_MI_BATCH_BUFFER_START_length_bias 0x00000002
6697 #define GEN8_MI_BATCH_BUFFER_START_header \
6698 .CommandType = 0, \
6699 .MICommandOpcode = 49, \
6700 .DwordLength = 1
6701
6702 #define GEN8_MI_BATCH_BUFFER_START_length 0x00000003
6703
6704 struct GEN8_MI_BATCH_BUFFER_START {
6705 uint32_t CommandType;
6706 uint32_t MICommandOpcode;
6707 #define _1stlevelbatch 0
6708 #define _2ndlevelbatch 1
6709 uint32_t _2ndLevelBatchBuffer;
6710 bool AddOffsetEnable;
6711 uint32_t PredicationEnable;
6712 bool ResourceStreamerEnable;
6713 #define ASI_GGTT 0
6714 #define ASI_PPGTT 1
6715 uint32_t AddressSpaceIndicator;
6716 uint32_t DwordLength;
6717 __gen_address_type BatchBufferStartAddress;
6718 };
6719
6720 static inline void
6721 GEN8_MI_BATCH_BUFFER_START_pack(__gen_user_data *data, void * restrict dst,
6722 const struct GEN8_MI_BATCH_BUFFER_START * restrict values)
6723 {
6724 uint32_t *dw = (uint32_t * restrict) dst;
6725
6726 dw[0] =
6727 __gen_field(values->CommandType, 29, 31) |
6728 __gen_field(values->MICommandOpcode, 23, 28) |
6729 __gen_field(values->_2ndLevelBatchBuffer, 22, 22) |
6730 __gen_field(values->AddOffsetEnable, 16, 16) |
6731 __gen_field(values->PredicationEnable, 15, 15) |
6732 __gen_field(values->ResourceStreamerEnable, 10, 10) |
6733 __gen_field(values->AddressSpaceIndicator, 8, 8) |
6734 __gen_field(values->DwordLength, 0, 7) |
6735 0;
6736
6737 uint32_t dw1 =
6738 0;
6739
6740 uint64_t qw1 =
6741 __gen_combine_address(data, &dw[1], values->BatchBufferStartAddress, dw1);
6742
6743 dw[1] = qw1;
6744 dw[2] = qw1 >> 32;
6745
6746 }
6747
6748 #define GEN8_MI_CLFLUSH_length_bias 0x00000002
6749 #define GEN8_MI_CLFLUSH_header \
6750 .CommandType = 0, \
6751 .MICommandOpcode = 39
6752
6753 #define GEN8_MI_CLFLUSH_length 0x00000000
6754
6755 struct GEN8_MI_CLFLUSH {
6756 uint32_t CommandType;
6757 uint32_t MICommandOpcode;
6758 #define PerProcessGraphicsAddress 0
6759 #define GlobalGraphicsAddress 1
6760 uint32_t UseGlobalGTT;
6761 uint32_t DwordLength;
6762 __gen_address_type PageBaseAddress;
6763 uint32_t StartingCachelineOffset;
6764 /* variable length fields follow */
6765 };
6766
6767 static inline void
6768 GEN8_MI_CLFLUSH_pack(__gen_user_data *data, void * restrict dst,
6769 const struct GEN8_MI_CLFLUSH * restrict values)
6770 {
6771 uint32_t *dw = (uint32_t * restrict) dst;
6772
6773 dw[0] =
6774 __gen_field(values->CommandType, 29, 31) |
6775 __gen_field(values->MICommandOpcode, 23, 28) |
6776 __gen_field(values->UseGlobalGTT, 22, 22) |
6777 __gen_field(values->DwordLength, 0, 9) |
6778 0;
6779
6780 uint32_t dw1 =
6781 __gen_field(values->StartingCachelineOffset, 6, 11) |
6782 0;
6783
6784 uint64_t qw1 =
6785 __gen_combine_address(data, &dw[1], values->PageBaseAddress, dw1);
6786
6787 dw[1] = qw1;
6788 dw[2] = qw1 >> 32;
6789
6790 /* variable length fields follow */
6791 }
6792
6793 #define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_length_bias 0x00000002
6794 #define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_header\
6795 .CommandType = 0, \
6796 .MICommandOpcode = 54, \
6797 .UseGlobalGTT = 0, \
6798 .CompareSemaphore = 0, \
6799 .DwordLength = 1
6800
6801 #define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_length 0x00000003
6802
6803 struct GEN8_MI_CONDITIONAL_BATCH_BUFFER_END {
6804 uint32_t CommandType;
6805 uint32_t MICommandOpcode;
6806 uint32_t UseGlobalGTT;
6807 uint32_t CompareSemaphore;
6808 uint32_t DwordLength;
6809 uint32_t CompareDataDword;
6810 __gen_address_type CompareAddress;
6811 };
6812
6813 static inline void
6814 GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
6815 const struct GEN8_MI_CONDITIONAL_BATCH_BUFFER_END * restrict values)
6816 {
6817 uint32_t *dw = (uint32_t * restrict) dst;
6818
6819 dw[0] =
6820 __gen_field(values->CommandType, 29, 31) |
6821 __gen_field(values->MICommandOpcode, 23, 28) |
6822 __gen_field(values->UseGlobalGTT, 22, 22) |
6823 __gen_field(values->CompareSemaphore, 21, 21) |
6824 __gen_field(values->DwordLength, 0, 7) |
6825 0;
6826
6827 dw[1] =
6828 __gen_field(values->CompareDataDword, 0, 31) |
6829 0;
6830
6831 uint32_t dw2 =
6832 0;
6833
6834 uint64_t qw2 =
6835 __gen_combine_address(data, &dw[2], values->CompareAddress, dw2);
6836
6837 dw[2] = qw2;
6838 dw[3] = qw2 >> 32;
6839
6840 }
6841
6842 #define GEN8_MI_COPY_MEM_MEM_length_bias 0x00000002
6843 #define GEN8_MI_COPY_MEM_MEM_header \
6844 .CommandType = 0, \
6845 .MICommandOpcode = 46, \
6846 .DwordLength = 3
6847
6848 #define GEN8_MI_COPY_MEM_MEM_length 0x00000005
6849
6850 struct GEN8_MI_COPY_MEM_MEM {
6851 uint32_t CommandType;
6852 uint32_t MICommandOpcode;
6853 #define PerProcessGraphicsAddress 0
6854 #define GlobalGraphicsAddress 1
6855 uint32_t UseGlobalGTTSource;
6856 #define PerProcessGraphicsAddress 0
6857 #define GlobalGraphicsAddress 1
6858 uint32_t UseGlobalGTTDestination;
6859 uint32_t DwordLength;
6860 __gen_address_type DestinationMemoryAddress;
6861 __gen_address_type SourceMemoryAddress;
6862 };
6863
6864 static inline void
6865 GEN8_MI_COPY_MEM_MEM_pack(__gen_user_data *data, void * restrict dst,
6866 const struct GEN8_MI_COPY_MEM_MEM * restrict values)
6867 {
6868 uint32_t *dw = (uint32_t * restrict) dst;
6869
6870 dw[0] =
6871 __gen_field(values->CommandType, 29, 31) |
6872 __gen_field(values->MICommandOpcode, 23, 28) |
6873 __gen_field(values->UseGlobalGTTSource, 22, 22) |
6874 __gen_field(values->UseGlobalGTTDestination, 21, 21) |
6875 __gen_field(values->DwordLength, 0, 7) |
6876 0;
6877
6878 uint32_t dw1 =
6879 0;
6880
6881 uint64_t qw1 =
6882 __gen_combine_address(data, &dw[1], values->DestinationMemoryAddress, dw1);
6883
6884 dw[1] = qw1;
6885 dw[2] = qw1 >> 32;
6886
6887 uint32_t dw3 =
6888 0;
6889
6890 uint64_t qw3 =
6891 __gen_combine_address(data, &dw[3], values->SourceMemoryAddress, dw3);
6892
6893 dw[3] = qw3;
6894 dw[4] = qw3 >> 32;
6895
6896 }
6897
6898 #define GEN8_MI_LOAD_REGISTER_IMM_length_bias 0x00000002
6899 #define GEN8_MI_LOAD_REGISTER_IMM_header \
6900 .CommandType = 0, \
6901 .MICommandOpcode = 34, \
6902 .DwordLength = 1
6903
6904 #define GEN8_MI_LOAD_REGISTER_IMM_length 0x00000003
6905
6906 struct GEN8_MI_LOAD_REGISTER_IMM {
6907 uint32_t CommandType;
6908 uint32_t MICommandOpcode;
6909 uint32_t ByteWriteDisables;
6910 uint32_t DwordLength;
6911 uint32_t RegisterOffset;
6912 uint32_t DataDWord;
6913 };
6914
6915 static inline void
6916 GEN8_MI_LOAD_REGISTER_IMM_pack(__gen_user_data *data, void * restrict dst,
6917 const struct GEN8_MI_LOAD_REGISTER_IMM * restrict values)
6918 {
6919 uint32_t *dw = (uint32_t * restrict) dst;
6920
6921 dw[0] =
6922 __gen_field(values->CommandType, 29, 31) |
6923 __gen_field(values->MICommandOpcode, 23, 28) |
6924 __gen_field(values->ByteWriteDisables, 8, 11) |
6925 __gen_field(values->DwordLength, 0, 7) |
6926 0;
6927
6928 dw[1] =
6929 __gen_offset(values->RegisterOffset, 2, 22) |
6930 0;
6931
6932 dw[2] =
6933 __gen_field(values->DataDWord, 0, 31) |
6934 0;
6935
6936 }
6937
6938 #define GEN8_MI_LOAD_REGISTER_MEM_length_bias 0x00000002
6939 #define GEN8_MI_LOAD_REGISTER_MEM_header \
6940 .CommandType = 0, \
6941 .MICommandOpcode = 41, \
6942 .DwordLength = 2
6943
6944 #define GEN8_MI_LOAD_REGISTER_MEM_length 0x00000004
6945
6946 struct GEN8_MI_LOAD_REGISTER_MEM {
6947 uint32_t CommandType;
6948 uint32_t MICommandOpcode;
6949 bool UseGlobalGTT;
6950 uint32_t AsyncModeEnable;
6951 uint32_t DwordLength;
6952 uint32_t RegisterAddress;
6953 __gen_address_type MemoryAddress;
6954 };
6955
6956 static inline void
6957 GEN8_MI_LOAD_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
6958 const struct GEN8_MI_LOAD_REGISTER_MEM * restrict values)
6959 {
6960 uint32_t *dw = (uint32_t * restrict) dst;
6961
6962 dw[0] =
6963 __gen_field(values->CommandType, 29, 31) |
6964 __gen_field(values->MICommandOpcode, 23, 28) |
6965 __gen_field(values->UseGlobalGTT, 22, 22) |
6966 __gen_field(values->AsyncModeEnable, 21, 21) |
6967 __gen_field(values->DwordLength, 0, 7) |
6968 0;
6969
6970 dw[1] =
6971 __gen_offset(values->RegisterAddress, 2, 22) |
6972 0;
6973
6974 uint32_t dw2 =
6975 0;
6976
6977 uint64_t qw2 =
6978 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
6979
6980 dw[2] = qw2;
6981 dw[3] = qw2 >> 32;
6982
6983 }
6984
6985 #define GEN8_MI_LOAD_SCAN_LINES_EXCL_length_bias 0x00000002
6986 #define GEN8_MI_LOAD_SCAN_LINES_EXCL_header \
6987 .CommandType = 0, \
6988 .MICommandOpcode = 19, \
6989 .DwordLength = 0
6990
6991 #define GEN8_MI_LOAD_SCAN_LINES_EXCL_length 0x00000002
6992
6993 struct GEN8_MI_LOAD_SCAN_LINES_EXCL {
6994 uint32_t CommandType;
6995 uint32_t MICommandOpcode;
6996 #define DisplayPlaneA 0
6997 #define DisplayPlaneB 1
6998 #define DisplayPlaneC 4
6999 uint32_t DisplayPlaneSelect;
7000 uint32_t DwordLength;
7001 uint32_t StartScanLineNumber;
7002 uint32_t EndScanLineNumber;
7003 };
7004
7005 static inline void
7006 GEN8_MI_LOAD_SCAN_LINES_EXCL_pack(__gen_user_data *data, void * restrict dst,
7007 const struct GEN8_MI_LOAD_SCAN_LINES_EXCL * restrict values)
7008 {
7009 uint32_t *dw = (uint32_t * restrict) dst;
7010
7011 dw[0] =
7012 __gen_field(values->CommandType, 29, 31) |
7013 __gen_field(values->MICommandOpcode, 23, 28) |
7014 __gen_field(values->DisplayPlaneSelect, 19, 21) |
7015 __gen_field(values->DwordLength, 0, 5) |
7016 0;
7017
7018 dw[1] =
7019 __gen_field(values->StartScanLineNumber, 16, 28) |
7020 __gen_field(values->EndScanLineNumber, 0, 12) |
7021 0;
7022
7023 }
7024
7025 #define GEN8_MI_LOAD_SCAN_LINES_INCL_length_bias 0x00000002
7026 #define GEN8_MI_LOAD_SCAN_LINES_INCL_header \
7027 .CommandType = 0, \
7028 .MICommandOpcode = 18, \
7029 .DwordLength = 0
7030
7031 #define GEN8_MI_LOAD_SCAN_LINES_INCL_length 0x00000002
7032
7033 struct GEN8_MI_LOAD_SCAN_LINES_INCL {
7034 uint32_t CommandType;
7035 uint32_t MICommandOpcode;
7036 #define DisplayPlaneA 0
7037 #define DisplayPlaneB 1
7038 #define DisplayPlaneC 4
7039 uint32_t DisplayPlaneSelect;
7040 #define NeverForward 0
7041 #define AlwaysForward 1
7042 #define ConditionallyForward 2
7043 bool ScanLineEventDoneForward;
7044 uint32_t DwordLength;
7045 uint32_t StartScanLineNumber;
7046 uint32_t EndScanLineNumber;
7047 };
7048
7049 static inline void
7050 GEN8_MI_LOAD_SCAN_LINES_INCL_pack(__gen_user_data *data, void * restrict dst,
7051 const struct GEN8_MI_LOAD_SCAN_LINES_INCL * restrict values)
7052 {
7053 uint32_t *dw = (uint32_t * restrict) dst;
7054
7055 dw[0] =
7056 __gen_field(values->CommandType, 29, 31) |
7057 __gen_field(values->MICommandOpcode, 23, 28) |
7058 __gen_field(values->DisplayPlaneSelect, 19, 21) |
7059 __gen_field(values->ScanLineEventDoneForward, 17, 18) |
7060 __gen_field(values->DwordLength, 0, 5) |
7061 0;
7062
7063 dw[1] =
7064 __gen_field(values->StartScanLineNumber, 16, 28) |
7065 __gen_field(values->EndScanLineNumber, 0, 12) |
7066 0;
7067
7068 }
7069
7070 #define GEN8_MI_LOAD_URB_MEM_length_bias 0x00000002
7071 #define GEN8_MI_LOAD_URB_MEM_header \
7072 .CommandType = 0, \
7073 .MICommandOpcode = 44, \
7074 .DwordLength = 2
7075
7076 #define GEN8_MI_LOAD_URB_MEM_length 0x00000004
7077
7078 struct GEN8_MI_LOAD_URB_MEM {
7079 uint32_t CommandType;
7080 uint32_t MICommandOpcode;
7081 uint32_t DwordLength;
7082 uint32_t URBAddress;
7083 __gen_address_type MemoryAddress;
7084 };
7085
7086 static inline void
7087 GEN8_MI_LOAD_URB_MEM_pack(__gen_user_data *data, void * restrict dst,
7088 const struct GEN8_MI_LOAD_URB_MEM * restrict values)
7089 {
7090 uint32_t *dw = (uint32_t * restrict) dst;
7091
7092 dw[0] =
7093 __gen_field(values->CommandType, 29, 31) |
7094 __gen_field(values->MICommandOpcode, 23, 28) |
7095 __gen_field(values->DwordLength, 0, 7) |
7096 0;
7097
7098 dw[1] =
7099 __gen_field(values->URBAddress, 2, 14) |
7100 0;
7101
7102 uint32_t dw2 =
7103 0;
7104
7105 uint64_t qw2 =
7106 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
7107
7108 dw[2] = qw2;
7109 dw[3] = qw2 >> 32;
7110
7111 }
7112
7113 #define GEN8_MI_MATH_length_bias 0x00000002
7114 #define GEN8_MI_MATH_header \
7115 .CommandType = 0, \
7116 .MICommandOpcode = 26
7117
7118 #define GEN8_MI_MATH_length 0x00000000
7119
7120 struct GEN8_MI_MATH {
7121 uint32_t CommandType;
7122 uint32_t MICommandOpcode;
7123 uint32_t DwordLength;
7124 uint32_t ALUINSTRUCTION1;
7125 uint32_t ALUINSTRUCTION2;
7126 /* variable length fields follow */
7127 };
7128
7129 static inline void
7130 GEN8_MI_MATH_pack(__gen_user_data *data, void * restrict dst,
7131 const struct GEN8_MI_MATH * restrict values)
7132 {
7133 uint32_t *dw = (uint32_t * restrict) dst;
7134
7135 dw[0] =
7136 __gen_field(values->CommandType, 29, 31) |
7137 __gen_field(values->MICommandOpcode, 23, 28) |
7138 __gen_field(values->DwordLength, 0, 5) |
7139 0;
7140
7141 dw[1] =
7142 __gen_field(values->ALUINSTRUCTION1, 0, 31) |
7143 0;
7144
7145 dw[2] =
7146 __gen_field(values->ALUINSTRUCTION2, 0, 31) |
7147 0;
7148
7149 /* variable length fields follow */
7150 }
7151
7152 #define GEN8_MI_NOOP_length_bias 0x00000001
7153 #define GEN8_MI_NOOP_header \
7154 .CommandType = 0, \
7155 .MICommandOpcode = 0
7156
7157 #define GEN8_MI_NOOP_length 0x00000001
7158
7159 struct GEN8_MI_NOOP {
7160 uint32_t CommandType;
7161 uint32_t MICommandOpcode;
7162 bool IdentificationNumberRegisterWriteEnable;
7163 uint32_t IdentificationNumber;
7164 };
7165
7166 static inline void
7167 GEN8_MI_NOOP_pack(__gen_user_data *data, void * restrict dst,
7168 const struct GEN8_MI_NOOP * restrict values)
7169 {
7170 uint32_t *dw = (uint32_t * restrict) dst;
7171
7172 dw[0] =
7173 __gen_field(values->CommandType, 29, 31) |
7174 __gen_field(values->MICommandOpcode, 23, 28) |
7175 __gen_field(values->IdentificationNumberRegisterWriteEnable, 22, 22) |
7176 __gen_field(values->IdentificationNumber, 0, 21) |
7177 0;
7178
7179 }
7180
7181 #define GEN8_MI_PREDICATE_length_bias 0x00000001
7182 #define GEN8_MI_PREDICATE_header \
7183 .CommandType = 0, \
7184 .MICommandOpcode = 12
7185
7186 #define GEN8_MI_PREDICATE_length 0x00000001
7187
7188 struct GEN8_MI_PREDICATE {
7189 uint32_t CommandType;
7190 uint32_t MICommandOpcode;
7191 #define LOAD_KEEP 0
7192 #define LOAD_LOAD 2
7193 #define LOAD_LOADINV 3
7194 uint32_t LoadOperation;
7195 #define COMBINE_SET 0
7196 #define COMBINE_AND 1
7197 #define COMBINE_OR 2
7198 #define COMBINE_XOR 3
7199 uint32_t CombineOperation;
7200 #define COMPARE_SRCS_EQUAL 2
7201 #define COMPARE_DELTAS_EQUAL 3
7202 uint32_t CompareOperation;
7203 };
7204
7205 static inline void
7206 GEN8_MI_PREDICATE_pack(__gen_user_data *data, void * restrict dst,
7207 const struct GEN8_MI_PREDICATE * restrict values)
7208 {
7209 uint32_t *dw = (uint32_t * restrict) dst;
7210
7211 dw[0] =
7212 __gen_field(values->CommandType, 29, 31) |
7213 __gen_field(values->MICommandOpcode, 23, 28) |
7214 __gen_field(values->LoadOperation, 6, 7) |
7215 __gen_field(values->CombineOperation, 3, 4) |
7216 __gen_field(values->CompareOperation, 0, 1) |
7217 0;
7218
7219 }
7220
7221 #define GEN8_MI_REPORT_HEAD_length_bias 0x00000001
7222 #define GEN8_MI_REPORT_HEAD_header \
7223 .CommandType = 0, \
7224 .MICommandOpcode = 7
7225
7226 #define GEN8_MI_REPORT_HEAD_length 0x00000001
7227
7228 struct GEN8_MI_REPORT_HEAD {
7229 uint32_t CommandType;
7230 uint32_t MICommandOpcode;
7231 };
7232
7233 static inline void
7234 GEN8_MI_REPORT_HEAD_pack(__gen_user_data *data, void * restrict dst,
7235 const struct GEN8_MI_REPORT_HEAD * restrict values)
7236 {
7237 uint32_t *dw = (uint32_t * restrict) dst;
7238
7239 dw[0] =
7240 __gen_field(values->CommandType, 29, 31) |
7241 __gen_field(values->MICommandOpcode, 23, 28) |
7242 0;
7243
7244 }
7245
7246 #define GEN8_MI_RS_CONTEXT_length_bias 0x00000001
7247 #define GEN8_MI_RS_CONTEXT_header \
7248 .CommandType = 0, \
7249 .MICommandOpcode = 15
7250
7251 #define GEN8_MI_RS_CONTEXT_length 0x00000001
7252
7253 struct GEN8_MI_RS_CONTEXT {
7254 uint32_t CommandType;
7255 uint32_t MICommandOpcode;
7256 #define RS_RESTORE 0
7257 #define RS_SAVE 1
7258 uint32_t ResourceStreamerSave;
7259 };
7260
7261 static inline void
7262 GEN8_MI_RS_CONTEXT_pack(__gen_user_data *data, void * restrict dst,
7263 const struct GEN8_MI_RS_CONTEXT * restrict values)
7264 {
7265 uint32_t *dw = (uint32_t * restrict) dst;
7266
7267 dw[0] =
7268 __gen_field(values->CommandType, 29, 31) |
7269 __gen_field(values->MICommandOpcode, 23, 28) |
7270 __gen_field(values->ResourceStreamerSave, 0, 0) |
7271 0;
7272
7273 }
7274
7275 #define GEN8_MI_RS_CONTROL_length_bias 0x00000001
7276 #define GEN8_MI_RS_CONTROL_header \
7277 .CommandType = 0, \
7278 .MICommandOpcode = 6
7279
7280 #define GEN8_MI_RS_CONTROL_length 0x00000001
7281
7282 struct GEN8_MI_RS_CONTROL {
7283 uint32_t CommandType;
7284 uint32_t MICommandOpcode;
7285 #define RS_STOP 0
7286 #define RS_START 1
7287 uint32_t ResourceStreamerControl;
7288 };
7289
7290 static inline void
7291 GEN8_MI_RS_CONTROL_pack(__gen_user_data *data, void * restrict dst,
7292 const struct GEN8_MI_RS_CONTROL * restrict values)
7293 {
7294 uint32_t *dw = (uint32_t * restrict) dst;
7295
7296 dw[0] =
7297 __gen_field(values->CommandType, 29, 31) |
7298 __gen_field(values->MICommandOpcode, 23, 28) |
7299 __gen_field(values->ResourceStreamerControl, 0, 0) |
7300 0;
7301
7302 }
7303
7304 #define GEN8_MI_RS_STORE_DATA_IMM_length_bias 0x00000002
7305 #define GEN8_MI_RS_STORE_DATA_IMM_header \
7306 .CommandType = 0, \
7307 .MICommandOpcode = 43, \
7308 .DwordLength = 2
7309
7310 #define GEN8_MI_RS_STORE_DATA_IMM_length 0x00000004
7311
7312 struct GEN8_MI_RS_STORE_DATA_IMM {
7313 uint32_t CommandType;
7314 uint32_t MICommandOpcode;
7315 uint32_t DwordLength;
7316 __gen_address_type DestinationAddress;
7317 uint32_t CoreModeEnable;
7318 uint32_t DataDWord0;
7319 };
7320
7321 static inline void
7322 GEN8_MI_RS_STORE_DATA_IMM_pack(__gen_user_data *data, void * restrict dst,
7323 const struct GEN8_MI_RS_STORE_DATA_IMM * restrict values)
7324 {
7325 uint32_t *dw = (uint32_t * restrict) dst;
7326
7327 dw[0] =
7328 __gen_field(values->CommandType, 29, 31) |
7329 __gen_field(values->MICommandOpcode, 23, 28) |
7330 __gen_field(values->DwordLength, 0, 7) |
7331 0;
7332
7333 uint32_t dw1 =
7334 __gen_field(values->CoreModeEnable, 0, 0) |
7335 0;
7336
7337 uint64_t qw1 =
7338 __gen_combine_address(data, &dw[1], values->DestinationAddress, dw1);
7339
7340 dw[1] = qw1;
7341 dw[2] = qw1 >> 32;
7342
7343 dw[3] =
7344 __gen_field(values->DataDWord0, 0, 31) |
7345 0;
7346
7347 }
7348
7349 #define GEN8_MI_SET_CONTEXT_length_bias 0x00000002
7350 #define GEN8_MI_SET_CONTEXT_header \
7351 .CommandType = 0, \
7352 .MICommandOpcode = 24, \
7353 .DwordLength = 0
7354
7355 #define GEN8_MI_SET_CONTEXT_length 0x00000002
7356
7357 struct GEN8_MI_SET_CONTEXT {
7358 uint32_t CommandType;
7359 uint32_t MICommandOpcode;
7360 uint32_t DwordLength;
7361 __gen_address_type LogicalContextAddress;
7362 uint32_t ReservedMustbe1;
7363 bool CoreModeEnable;
7364 bool ResourceStreamerStateSaveEnable;
7365 bool ResourceStreamerStateRestoreEnable;
7366 uint32_t ForceRestore;
7367 uint32_t RestoreInhibit;
7368 };
7369
7370 static inline void
7371 GEN8_MI_SET_CONTEXT_pack(__gen_user_data *data, void * restrict dst,
7372 const struct GEN8_MI_SET_CONTEXT * restrict values)
7373 {
7374 uint32_t *dw = (uint32_t * restrict) dst;
7375
7376 dw[0] =
7377 __gen_field(values->CommandType, 29, 31) |
7378 __gen_field(values->MICommandOpcode, 23, 28) |
7379 __gen_field(values->DwordLength, 0, 7) |
7380 0;
7381
7382 uint32_t dw1 =
7383 __gen_field(values->ReservedMustbe1, 8, 8) |
7384 __gen_field(values->CoreModeEnable, 4, 4) |
7385 __gen_field(values->ResourceStreamerStateSaveEnable, 3, 3) |
7386 __gen_field(values->ResourceStreamerStateRestoreEnable, 2, 2) |
7387 __gen_field(values->ForceRestore, 1, 1) |
7388 __gen_field(values->RestoreInhibit, 0, 0) |
7389 0;
7390
7391 dw[1] =
7392 __gen_combine_address(data, &dw[1], values->LogicalContextAddress, dw1);
7393
7394 }
7395
7396 #define GEN8_MI_SET_PREDICATE_length_bias 0x00000001
7397 #define GEN8_MI_SET_PREDICATE_header \
7398 .CommandType = 0, \
7399 .MICommandOpcode = 1
7400
7401 #define GEN8_MI_SET_PREDICATE_length 0x00000001
7402
7403 struct GEN8_MI_SET_PREDICATE {
7404 uint32_t CommandType;
7405 uint32_t MICommandOpcode;
7406 #define NOOPNever 0
7407 #define NOOPonResult2clear 1
7408 #define NOOPonResult2set 2
7409 #define NOOPonResultclear 3
7410 #define NOOPonResultset 4
7411 #define Executewhenonesliceenabled 5
7412 #define Executewhentwoslicesareenabled 6
7413 #define Executewhenthreeslicesareenabled 7
7414 #define NOOPAlways 15
7415 uint32_t PREDICATEENABLE;
7416 };
7417
7418 static inline void
7419 GEN8_MI_SET_PREDICATE_pack(__gen_user_data *data, void * restrict dst,
7420 const struct GEN8_MI_SET_PREDICATE * restrict values)
7421 {
7422 uint32_t *dw = (uint32_t * restrict) dst;
7423
7424 dw[0] =
7425 __gen_field(values->CommandType, 29, 31) |
7426 __gen_field(values->MICommandOpcode, 23, 28) |
7427 __gen_field(values->PREDICATEENABLE, 0, 3) |
7428 0;
7429
7430 }
7431
7432 #define GEN8_MI_STORE_DATA_IMM_length_bias 0x00000002
7433 #define GEN8_MI_STORE_DATA_IMM_header \
7434 .CommandType = 0, \
7435 .MICommandOpcode = 32, \
7436 .DwordLength = 2
7437
7438 #define GEN8_MI_STORE_DATA_IMM_length 0x00000004
7439
7440 struct GEN8_MI_STORE_DATA_IMM {
7441 uint32_t CommandType;
7442 uint32_t MICommandOpcode;
7443 bool UseGlobalGTT;
7444 bool StoreQword;
7445 uint32_t DwordLength;
7446 __gen_address_type Address;
7447 uint32_t CoreModeEnable;
7448 uint32_t DataDWord0;
7449 uint32_t DataDWord1;
7450 };
7451
7452 static inline void
7453 GEN8_MI_STORE_DATA_IMM_pack(__gen_user_data *data, void * restrict dst,
7454 const struct GEN8_MI_STORE_DATA_IMM * restrict values)
7455 {
7456 uint32_t *dw = (uint32_t * restrict) dst;
7457
7458 dw[0] =
7459 __gen_field(values->CommandType, 29, 31) |
7460 __gen_field(values->MICommandOpcode, 23, 28) |
7461 __gen_field(values->UseGlobalGTT, 22, 22) |
7462 __gen_field(values->StoreQword, 21, 21) |
7463 __gen_field(values->DwordLength, 0, 9) |
7464 0;
7465
7466 uint32_t dw1 =
7467 __gen_field(values->CoreModeEnable, 0, 0) |
7468 0;
7469
7470 uint64_t qw1 =
7471 __gen_combine_address(data, &dw[1], values->Address, dw1);
7472
7473 dw[1] = qw1;
7474 dw[2] = qw1 >> 32;
7475
7476 dw[3] =
7477 __gen_field(values->DataDWord0, 0, 31) |
7478 0;
7479
7480 dw[4] =
7481 __gen_field(values->DataDWord1, 0, 31) |
7482 0;
7483
7484 }
7485
7486 #define GEN8_MI_STORE_DATA_INDEX_length_bias 0x00000002
7487 #define GEN8_MI_STORE_DATA_INDEX_header \
7488 .CommandType = 0, \
7489 .MICommandOpcode = 33, \
7490 .DwordLength = 1
7491
7492 #define GEN8_MI_STORE_DATA_INDEX_length 0x00000003
7493
7494 struct GEN8_MI_STORE_DATA_INDEX {
7495 uint32_t CommandType;
7496 uint32_t MICommandOpcode;
7497 uint32_t UsePerProcessHardwareStatusPage;
7498 uint32_t DwordLength;
7499 uint32_t Offset;
7500 uint32_t DataDWord0;
7501 uint32_t DataDWord1;
7502 };
7503
7504 static inline void
7505 GEN8_MI_STORE_DATA_INDEX_pack(__gen_user_data *data, void * restrict dst,
7506 const struct GEN8_MI_STORE_DATA_INDEX * restrict values)
7507 {
7508 uint32_t *dw = (uint32_t * restrict) dst;
7509
7510 dw[0] =
7511 __gen_field(values->CommandType, 29, 31) |
7512 __gen_field(values->MICommandOpcode, 23, 28) |
7513 __gen_field(values->UsePerProcessHardwareStatusPage, 21, 21) |
7514 __gen_field(values->DwordLength, 0, 7) |
7515 0;
7516
7517 dw[1] =
7518 __gen_field(values->Offset, 2, 11) |
7519 0;
7520
7521 dw[2] =
7522 __gen_field(values->DataDWord0, 0, 31) |
7523 0;
7524
7525 dw[3] =
7526 __gen_field(values->DataDWord1, 0, 31) |
7527 0;
7528
7529 }
7530
7531 #define GEN8_MI_STORE_URB_MEM_length_bias 0x00000002
7532 #define GEN8_MI_STORE_URB_MEM_header \
7533 .CommandType = 0, \
7534 .MICommandOpcode = 45, \
7535 .DwordLength = 2
7536
7537 #define GEN8_MI_STORE_URB_MEM_length 0x00000004
7538
7539 struct GEN8_MI_STORE_URB_MEM {
7540 uint32_t CommandType;
7541 uint32_t MICommandOpcode;
7542 uint32_t DwordLength;
7543 uint32_t URBAddress;
7544 __gen_address_type MemoryAddress;
7545 };
7546
7547 static inline void
7548 GEN8_MI_STORE_URB_MEM_pack(__gen_user_data *data, void * restrict dst,
7549 const struct GEN8_MI_STORE_URB_MEM * restrict values)
7550 {
7551 uint32_t *dw = (uint32_t * restrict) dst;
7552
7553 dw[0] =
7554 __gen_field(values->CommandType, 29, 31) |
7555 __gen_field(values->MICommandOpcode, 23, 28) |
7556 __gen_field(values->DwordLength, 0, 7) |
7557 0;
7558
7559 dw[1] =
7560 __gen_field(values->URBAddress, 2, 14) |
7561 0;
7562
7563 uint32_t dw2 =
7564 0;
7565
7566 uint64_t qw2 =
7567 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
7568
7569 dw[2] = qw2;
7570 dw[3] = qw2 >> 32;
7571
7572 }
7573
7574 #define GEN8_MI_SUSPEND_FLUSH_length_bias 0x00000001
7575 #define GEN8_MI_SUSPEND_FLUSH_header \
7576 .CommandType = 0, \
7577 .MICommandOpcode = 11
7578
7579 #define GEN8_MI_SUSPEND_FLUSH_length 0x00000001
7580
7581 struct GEN8_MI_SUSPEND_FLUSH {
7582 uint32_t CommandType;
7583 uint32_t MICommandOpcode;
7584 bool SuspendFlush;
7585 };
7586
7587 static inline void
7588 GEN8_MI_SUSPEND_FLUSH_pack(__gen_user_data *data, void * restrict dst,
7589 const struct GEN8_MI_SUSPEND_FLUSH * restrict values)
7590 {
7591 uint32_t *dw = (uint32_t * restrict) dst;
7592
7593 dw[0] =
7594 __gen_field(values->CommandType, 29, 31) |
7595 __gen_field(values->MICommandOpcode, 23, 28) |
7596 __gen_field(values->SuspendFlush, 0, 0) |
7597 0;
7598
7599 }
7600
7601 #define GEN8_MI_TOPOLOGY_FILTER_length_bias 0x00000001
7602 #define GEN8_MI_TOPOLOGY_FILTER_header \
7603 .CommandType = 0, \
7604 .MICommandOpcode = 13
7605
7606 #define GEN8_MI_TOPOLOGY_FILTER_length 0x00000001
7607
7608 struct GEN8_MI_TOPOLOGY_FILTER {
7609 uint32_t CommandType;
7610 uint32_t MICommandOpcode;
7611 uint32_t TopologyFilterValue;
7612 };
7613
7614 static inline void
7615 GEN8_MI_TOPOLOGY_FILTER_pack(__gen_user_data *data, void * restrict dst,
7616 const struct GEN8_MI_TOPOLOGY_FILTER * restrict values)
7617 {
7618 uint32_t *dw = (uint32_t * restrict) dst;
7619
7620 dw[0] =
7621 __gen_field(values->CommandType, 29, 31) |
7622 __gen_field(values->MICommandOpcode, 23, 28) |
7623 __gen_field(values->TopologyFilterValue, 0, 5) |
7624 0;
7625
7626 }
7627
7628 #define GEN8_MI_UPDATE_GTT_length_bias 0x00000002
7629 #define GEN8_MI_UPDATE_GTT_header \
7630 .CommandType = 0, \
7631 .MICommandOpcode = 35
7632
7633 #define GEN8_MI_UPDATE_GTT_length 0x00000000
7634
7635 struct GEN8_MI_UPDATE_GTT {
7636 uint32_t CommandType;
7637 uint32_t MICommandOpcode;
7638 uint32_t DwordLength;
7639 __gen_address_type EntryAddress;
7640 /* variable length fields follow */
7641 };
7642
7643 static inline void
7644 GEN8_MI_UPDATE_GTT_pack(__gen_user_data *data, void * restrict dst,
7645 const struct GEN8_MI_UPDATE_GTT * restrict values)
7646 {
7647 uint32_t *dw = (uint32_t * restrict) dst;
7648
7649 dw[0] =
7650 __gen_field(values->CommandType, 29, 31) |
7651 __gen_field(values->MICommandOpcode, 23, 28) |
7652 __gen_field(values->DwordLength, 0, 9) |
7653 0;
7654
7655 uint32_t dw1 =
7656 0;
7657
7658 dw[1] =
7659 __gen_combine_address(data, &dw[1], values->EntryAddress, dw1);
7660
7661 /* variable length fields follow */
7662 }
7663
7664 #define GEN8_MI_URB_ATOMIC_ALLOC_length_bias 0x00000001
7665 #define GEN8_MI_URB_ATOMIC_ALLOC_header \
7666 .CommandType = 0, \
7667 .MICommandOpcode = 9
7668
7669 #define GEN8_MI_URB_ATOMIC_ALLOC_length 0x00000001
7670
7671 struct GEN8_MI_URB_ATOMIC_ALLOC {
7672 uint32_t CommandType;
7673 uint32_t MICommandOpcode;
7674 uint32_t URBAtomicStorageOffset;
7675 uint32_t URBAtomicStorageSize;
7676 };
7677
7678 static inline void
7679 GEN8_MI_URB_ATOMIC_ALLOC_pack(__gen_user_data *data, void * restrict dst,
7680 const struct GEN8_MI_URB_ATOMIC_ALLOC * restrict values)
7681 {
7682 uint32_t *dw = (uint32_t * restrict) dst;
7683
7684 dw[0] =
7685 __gen_field(values->CommandType, 29, 31) |
7686 __gen_field(values->MICommandOpcode, 23, 28) |
7687 __gen_field(values->URBAtomicStorageOffset, 12, 19) |
7688 __gen_field(values->URBAtomicStorageSize, 0, 8) |
7689 0;
7690
7691 }
7692
7693 #define GEN8_MI_URB_CLEAR_length_bias 0x00000002
7694 #define GEN8_MI_URB_CLEAR_header \
7695 .CommandType = 0, \
7696 .MICommandOpcode = 25, \
7697 .DwordLength = 0
7698
7699 #define GEN8_MI_URB_CLEAR_length 0x00000002
7700
7701 struct GEN8_MI_URB_CLEAR {
7702 uint32_t CommandType;
7703 uint32_t MICommandOpcode;
7704 uint32_t DwordLength;
7705 uint32_t URBClearLength;
7706 uint32_t URBAddress;
7707 };
7708
7709 static inline void
7710 GEN8_MI_URB_CLEAR_pack(__gen_user_data *data, void * restrict dst,
7711 const struct GEN8_MI_URB_CLEAR * restrict values)
7712 {
7713 uint32_t *dw = (uint32_t * restrict) dst;
7714
7715 dw[0] =
7716 __gen_field(values->CommandType, 29, 31) |
7717 __gen_field(values->MICommandOpcode, 23, 28) |
7718 __gen_field(values->DwordLength, 0, 7) |
7719 0;
7720
7721 dw[1] =
7722 __gen_field(values->URBClearLength, 16, 29) |
7723 __gen_offset(values->URBAddress, 0, 14) |
7724 0;
7725
7726 }
7727
7728 #define GEN8_MI_USER_INTERRUPT_length_bias 0x00000001
7729 #define GEN8_MI_USER_INTERRUPT_header \
7730 .CommandType = 0, \
7731 .MICommandOpcode = 2
7732
7733 #define GEN8_MI_USER_INTERRUPT_length 0x00000001
7734
7735 struct GEN8_MI_USER_INTERRUPT {
7736 uint32_t CommandType;
7737 uint32_t MICommandOpcode;
7738 };
7739
7740 static inline void
7741 GEN8_MI_USER_INTERRUPT_pack(__gen_user_data *data, void * restrict dst,
7742 const struct GEN8_MI_USER_INTERRUPT * restrict values)
7743 {
7744 uint32_t *dw = (uint32_t * restrict) dst;
7745
7746 dw[0] =
7747 __gen_field(values->CommandType, 29, 31) |
7748 __gen_field(values->MICommandOpcode, 23, 28) |
7749 0;
7750
7751 }
7752
7753 #define GEN8_MI_WAIT_FOR_EVENT_length_bias 0x00000001
7754 #define GEN8_MI_WAIT_FOR_EVENT_header \
7755 .CommandType = 0, \
7756 .MICommandOpcode = 3
7757
7758 #define GEN8_MI_WAIT_FOR_EVENT_length 0x00000001
7759
7760 struct GEN8_MI_WAIT_FOR_EVENT {
7761 uint32_t CommandType;
7762 uint32_t MICommandOpcode;
7763 bool DisplayPipeCVerticalBlankWaitEnable;
7764 bool DisplaySpriteCFlipPendingWaitEnable;
7765 bool DisplayPlaneCFlipPendingWaitEnable;
7766 bool DisplayPipeCScanLineWaitEnable;
7767 bool DisplayPipeBVerticalBlankWaitEnable;
7768 bool DisplaySpriteBFlipPendingWaitEnable;
7769 bool DisplayPlaneBFlipPendingWaitEnable;
7770 bool DisplayPipeBScanLineWaitEnable;
7771 bool DisplayPipeAVerticalBlankWaitEnable;
7772 bool DisplaySpriteAFlipPendingWaitEnable;
7773 bool DisplayPlaneAFlipPendingWaitEnable;
7774 bool DisplayPipeAScanLineWaitEnable;
7775 };
7776
7777 static inline void
7778 GEN8_MI_WAIT_FOR_EVENT_pack(__gen_user_data *data, void * restrict dst,
7779 const struct GEN8_MI_WAIT_FOR_EVENT * restrict values)
7780 {
7781 uint32_t *dw = (uint32_t * restrict) dst;
7782
7783 dw[0] =
7784 __gen_field(values->CommandType, 29, 31) |
7785 __gen_field(values->MICommandOpcode, 23, 28) |
7786 __gen_field(values->DisplayPipeCVerticalBlankWaitEnable, 21, 21) |
7787 __gen_field(values->DisplaySpriteCFlipPendingWaitEnable, 20, 20) |
7788 __gen_field(values->DisplayPlaneCFlipPendingWaitEnable, 15, 15) |
7789 __gen_field(values->DisplayPipeCScanLineWaitEnable, 14, 14) |
7790 __gen_field(values->DisplayPipeBVerticalBlankWaitEnable, 11, 11) |
7791 __gen_field(values->DisplaySpriteBFlipPendingWaitEnable, 10, 10) |
7792 __gen_field(values->DisplayPlaneBFlipPendingWaitEnable, 9, 9) |
7793 __gen_field(values->DisplayPipeBScanLineWaitEnable, 8, 8) |
7794 __gen_field(values->DisplayPipeAVerticalBlankWaitEnable, 3, 3) |
7795 __gen_field(values->DisplaySpriteAFlipPendingWaitEnable, 2, 2) |
7796 __gen_field(values->DisplayPlaneAFlipPendingWaitEnable, 1, 1) |
7797 __gen_field(values->DisplayPipeAScanLineWaitEnable, 0, 0) |
7798 0;
7799
7800 }
7801
7802 #define GEN8_PIPE_CONTROL_length_bias 0x00000002
7803 #define GEN8_PIPE_CONTROL_header \
7804 .CommandType = 3, \
7805 .CommandSubType = 3, \
7806 ._3DCommandOpcode = 2, \
7807 ._3DCommandSubOpcode = 0, \
7808 .DwordLength = 4
7809
7810 #define GEN8_PIPE_CONTROL_length 0x00000006
7811
7812 struct GEN8_PIPE_CONTROL {
7813 uint32_t CommandType;
7814 uint32_t CommandSubType;
7815 uint32_t _3DCommandOpcode;
7816 uint32_t _3DCommandSubOpcode;
7817 uint32_t DwordLength;
7818 #define DAT_PPGTT 0
7819 #define DAT_GGTT 1
7820 uint32_t DestinationAddressType;
7821 #define NoLRIOperation 0
7822 #define MMIOWriteImmediateData 1
7823 uint32_t LRIPostSyncOperation;
7824 uint32_t StoreDataIndex;
7825 uint32_t CommandStreamerStallEnable;
7826 #define DontReset 0
7827 #define Reset 1
7828 uint32_t GlobalSnapshotCountReset;
7829 uint32_t TLBInvalidate;
7830 bool GenericMediaStateClear;
7831 #define NoWrite 0
7832 #define WriteImmediateData 1
7833 #define WritePSDepthCount 2
7834 #define WriteTimestamp 3
7835 uint32_t PostSyncOperation;
7836 bool DepthStallEnable;
7837 #define DisableFlush 0
7838 #define EnableFlush 1
7839 bool RenderTargetCacheFlushEnable;
7840 bool InstructionCacheInvalidateEnable;
7841 bool TextureCacheInvalidationEnable;
7842 bool IndirectStatePointersDisable;
7843 bool NotifyEnable;
7844 bool PipeControlFlushEnable;
7845 bool DCFlushEnable;
7846 bool VFCacheInvalidationEnable;
7847 bool ConstantCacheInvalidationEnable;
7848 bool StateCacheInvalidationEnable;
7849 bool StallAtPixelScoreboard;
7850 #define FlushDisabled 0
7851 #define FlushEnabled 1
7852 bool DepthCacheFlushEnable;
7853 __gen_address_type Address;
7854 uint64_t ImmediateData;
7855 };
7856
7857 static inline void
7858 GEN8_PIPE_CONTROL_pack(__gen_user_data *data, void * restrict dst,
7859 const struct GEN8_PIPE_CONTROL * restrict values)
7860 {
7861 uint32_t *dw = (uint32_t * restrict) dst;
7862
7863 dw[0] =
7864 __gen_field(values->CommandType, 29, 31) |
7865 __gen_field(values->CommandSubType, 27, 28) |
7866 __gen_field(values->_3DCommandOpcode, 24, 26) |
7867 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
7868 __gen_field(values->DwordLength, 0, 7) |
7869 0;
7870
7871 dw[1] =
7872 __gen_field(values->DestinationAddressType, 24, 24) |
7873 __gen_field(values->LRIPostSyncOperation, 23, 23) |
7874 __gen_field(values->StoreDataIndex, 21, 21) |
7875 __gen_field(values->CommandStreamerStallEnable, 20, 20) |
7876 __gen_field(values->GlobalSnapshotCountReset, 19, 19) |
7877 __gen_field(values->TLBInvalidate, 18, 18) |
7878 __gen_field(values->GenericMediaStateClear, 16, 16) |
7879 __gen_field(values->PostSyncOperation, 14, 15) |
7880 __gen_field(values->DepthStallEnable, 13, 13) |
7881 __gen_field(values->RenderTargetCacheFlushEnable, 12, 12) |
7882 __gen_field(values->InstructionCacheInvalidateEnable, 11, 11) |
7883 __gen_field(values->TextureCacheInvalidationEnable, 10, 10) |
7884 __gen_field(values->IndirectStatePointersDisable, 9, 9) |
7885 __gen_field(values->NotifyEnable, 8, 8) |
7886 __gen_field(values->PipeControlFlushEnable, 7, 7) |
7887 __gen_field(values->DCFlushEnable, 5, 5) |
7888 __gen_field(values->VFCacheInvalidationEnable, 4, 4) |
7889 __gen_field(values->ConstantCacheInvalidationEnable, 3, 3) |
7890 __gen_field(values->StateCacheInvalidationEnable, 2, 2) |
7891 __gen_field(values->StallAtPixelScoreboard, 1, 1) |
7892 __gen_field(values->DepthCacheFlushEnable, 0, 0) |
7893 0;
7894
7895 uint32_t dw2 =
7896 0;
7897
7898 uint64_t qw2 =
7899 __gen_combine_address(data, &dw[2], values->Address, dw2);
7900
7901 dw[2] = qw2;
7902 dw[3] = qw2 >> 32;
7903
7904 uint64_t qw4 =
7905 __gen_field(values->ImmediateData, 0, 63) |
7906 0;
7907
7908 dw[4] = qw4;
7909 dw[5] = qw4 >> 32;
7910
7911 }
7912
7913 #define GEN8_SCISSOR_RECT_length 0x00000002
7914
7915 struct GEN8_SCISSOR_RECT {
7916 uint32_t ScissorRectangleYMin;
7917 uint32_t ScissorRectangleXMin;
7918 uint32_t ScissorRectangleYMax;
7919 uint32_t ScissorRectangleXMax;
7920 };
7921
7922 static inline void
7923 GEN8_SCISSOR_RECT_pack(__gen_user_data *data, void * restrict dst,
7924 const struct GEN8_SCISSOR_RECT * restrict values)
7925 {
7926 uint32_t *dw = (uint32_t * restrict) dst;
7927
7928 dw[0] =
7929 __gen_field(values->ScissorRectangleYMin, 16, 31) |
7930 __gen_field(values->ScissorRectangleXMin, 0, 15) |
7931 0;
7932
7933 dw[1] =
7934 __gen_field(values->ScissorRectangleYMax, 16, 31) |
7935 __gen_field(values->ScissorRectangleXMax, 0, 15) |
7936 0;
7937
7938 }
7939
7940 #define GEN8_SF_CLIP_VIEWPORT_length 0x00000010
7941
7942 struct GEN8_SF_CLIP_VIEWPORT {
7943 float ViewportMatrixElementm00;
7944 float ViewportMatrixElementm11;
7945 float ViewportMatrixElementm22;
7946 float ViewportMatrixElementm30;
7947 float ViewportMatrixElementm31;
7948 float ViewportMatrixElementm32;
7949 float XMinClipGuardband;
7950 float XMaxClipGuardband;
7951 float YMinClipGuardband;
7952 float YMaxClipGuardband;
7953 float XMinViewPort;
7954 float XMaxViewPort;
7955 float YMinViewPort;
7956 float YMaxViewPort;
7957 };
7958
7959 static inline void
7960 GEN8_SF_CLIP_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
7961 const struct GEN8_SF_CLIP_VIEWPORT * restrict values)
7962 {
7963 uint32_t *dw = (uint32_t * restrict) dst;
7964
7965 dw[0] =
7966 __gen_float(values->ViewportMatrixElementm00) |
7967 0;
7968
7969 dw[1] =
7970 __gen_float(values->ViewportMatrixElementm11) |
7971 0;
7972
7973 dw[2] =
7974 __gen_float(values->ViewportMatrixElementm22) |
7975 0;
7976
7977 dw[3] =
7978 __gen_float(values->ViewportMatrixElementm30) |
7979 0;
7980
7981 dw[4] =
7982 __gen_float(values->ViewportMatrixElementm31) |
7983 0;
7984
7985 dw[5] =
7986 __gen_float(values->ViewportMatrixElementm32) |
7987 0;
7988
7989 dw[6] =
7990 0;
7991
7992 dw[7] =
7993 0;
7994
7995 dw[8] =
7996 __gen_float(values->XMinClipGuardband) |
7997 0;
7998
7999 dw[9] =
8000 __gen_float(values->XMaxClipGuardband) |
8001 0;
8002
8003 dw[10] =
8004 __gen_float(values->YMinClipGuardband) |
8005 0;
8006
8007 dw[11] =
8008 __gen_float(values->YMaxClipGuardband) |
8009 0;
8010
8011 dw[12] =
8012 __gen_float(values->XMinViewPort) |
8013 0;
8014
8015 dw[13] =
8016 __gen_float(values->XMaxViewPort) |
8017 0;
8018
8019 dw[14] =
8020 __gen_float(values->YMinViewPort) |
8021 0;
8022
8023 dw[15] =
8024 __gen_float(values->YMaxViewPort) |
8025 0;
8026
8027 }
8028
8029 #define GEN8_BLEND_STATE_length 0x00000011
8030
8031 #define GEN8_BLEND_STATE_ENTRY_length 0x00000002
8032
8033 struct GEN8_BLEND_STATE_ENTRY {
8034 bool LogicOpEnable;
8035 uint32_t LogicOpFunction;
8036 uint32_t PreBlendSourceOnlyClampEnable;
8037 #define COLORCLAMP_UNORM 0
8038 #define COLORCLAMP_SNORM 1
8039 #define COLORCLAMP_RTFORMAT 2
8040 uint32_t ColorClampRange;
8041 bool PreBlendColorClampEnable;
8042 bool PostBlendColorClampEnable;
8043 bool ColorBufferBlendEnable;
8044 uint32_t SourceBlendFactor;
8045 uint32_t DestinationBlendFactor;
8046 uint32_t ColorBlendFunction;
8047 uint32_t SourceAlphaBlendFactor;
8048 uint32_t DestinationAlphaBlendFactor;
8049 uint32_t AlphaBlendFunction;
8050 bool WriteDisableAlpha;
8051 bool WriteDisableRed;
8052 bool WriteDisableGreen;
8053 bool WriteDisableBlue;
8054 };
8055
8056 static inline void
8057 GEN8_BLEND_STATE_ENTRY_pack(__gen_user_data *data, void * restrict dst,
8058 const struct GEN8_BLEND_STATE_ENTRY * restrict values)
8059 {
8060 uint32_t *dw = (uint32_t * restrict) dst;
8061
8062 uint64_t qw0 =
8063 __gen_field(values->LogicOpEnable, 63, 63) |
8064 __gen_field(values->LogicOpFunction, 59, 62) |
8065 __gen_field(values->PreBlendSourceOnlyClampEnable, 36, 36) |
8066 __gen_field(values->ColorClampRange, 34, 35) |
8067 __gen_field(values->PreBlendColorClampEnable, 33, 33) |
8068 __gen_field(values->PostBlendColorClampEnable, 32, 32) |
8069 __gen_field(values->ColorBufferBlendEnable, 31, 31) |
8070 __gen_field(values->SourceBlendFactor, 26, 30) |
8071 __gen_field(values->DestinationBlendFactor, 21, 25) |
8072 __gen_field(values->ColorBlendFunction, 18, 20) |
8073 __gen_field(values->SourceAlphaBlendFactor, 13, 17) |
8074 __gen_field(values->DestinationAlphaBlendFactor, 8, 12) |
8075 __gen_field(values->AlphaBlendFunction, 5, 7) |
8076 __gen_field(values->WriteDisableAlpha, 3, 3) |
8077 __gen_field(values->WriteDisableRed, 2, 2) |
8078 __gen_field(values->WriteDisableGreen, 1, 1) |
8079 __gen_field(values->WriteDisableBlue, 0, 0) |
8080 0;
8081
8082 dw[0] = qw0;
8083 dw[1] = qw0 >> 32;
8084
8085 }
8086
8087 struct GEN8_BLEND_STATE {
8088 bool AlphaToCoverageEnable;
8089 bool IndependentAlphaBlendEnable;
8090 bool AlphaToOneEnable;
8091 bool AlphaToCoverageDitherEnable;
8092 bool AlphaTestEnable;
8093 uint32_t AlphaTestFunction;
8094 bool ColorDitherEnable;
8095 uint32_t XDitherOffset;
8096 uint32_t YDitherOffset;
8097 struct GEN8_BLEND_STATE_ENTRY Entry[8];
8098 };
8099
8100 static inline void
8101 GEN8_BLEND_STATE_pack(__gen_user_data *data, void * restrict dst,
8102 const struct GEN8_BLEND_STATE * restrict values)
8103 {
8104 uint32_t *dw = (uint32_t * restrict) dst;
8105
8106 dw[0] =
8107 __gen_field(values->AlphaToCoverageEnable, 31, 31) |
8108 __gen_field(values->IndependentAlphaBlendEnable, 30, 30) |
8109 __gen_field(values->AlphaToOneEnable, 29, 29) |
8110 __gen_field(values->AlphaToCoverageDitherEnable, 28, 28) |
8111 __gen_field(values->AlphaTestEnable, 27, 27) |
8112 __gen_field(values->AlphaTestFunction, 24, 26) |
8113 __gen_field(values->ColorDitherEnable, 23, 23) |
8114 __gen_field(values->XDitherOffset, 21, 22) |
8115 __gen_field(values->YDitherOffset, 19, 20) |
8116 0;
8117
8118 for (uint32_t i = 0, j = 1; i < 8; i++, j += 2)
8119 GEN8_BLEND_STATE_ENTRY_pack(data, &dw[j], &values->Entry[i]);
8120 }
8121
8122 #define GEN8_CC_VIEWPORT_length 0x00000002
8123
8124 struct GEN8_CC_VIEWPORT {
8125 float MinimumDepth;
8126 float MaximumDepth;
8127 };
8128
8129 static inline void
8130 GEN8_CC_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
8131 const struct GEN8_CC_VIEWPORT * restrict values)
8132 {
8133 uint32_t *dw = (uint32_t * restrict) dst;
8134
8135 dw[0] =
8136 __gen_float(values->MinimumDepth) |
8137 0;
8138
8139 dw[1] =
8140 __gen_float(values->MaximumDepth) |
8141 0;
8142
8143 }
8144
8145 #define GEN8_COLOR_CALC_STATE_length 0x00000006
8146
8147 struct GEN8_COLOR_CALC_STATE {
8148 uint32_t StencilReferenceValue;
8149 uint32_t BackFaceStencilReferenceValue;
8150 #define Cancelled 0
8151 #define NotCancelled 1
8152 uint32_t RoundDisableFunctionDisable;
8153 #define ALPHATEST_UNORM8 0
8154 #define ALPHATEST_FLOAT32 1
8155 uint32_t AlphaTestFormat;
8156 uint32_t AlphaReferenceValueAsUNORM8;
8157 float AlphaReferenceValueAsFLOAT32;
8158 float BlendConstantColorRed;
8159 float BlendConstantColorGreen;
8160 float BlendConstantColorBlue;
8161 float BlendConstantColorAlpha;
8162 };
8163
8164 static inline void
8165 GEN8_COLOR_CALC_STATE_pack(__gen_user_data *data, void * restrict dst,
8166 const struct GEN8_COLOR_CALC_STATE * restrict values)
8167 {
8168 uint32_t *dw = (uint32_t * restrict) dst;
8169
8170 dw[0] =
8171 __gen_field(values->StencilReferenceValue, 24, 31) |
8172 __gen_field(values->BackFaceStencilReferenceValue, 16, 23) |
8173 __gen_field(values->RoundDisableFunctionDisable, 15, 15) |
8174 __gen_field(values->AlphaTestFormat, 0, 0) |
8175 0;
8176
8177 dw[1] =
8178 __gen_field(values->AlphaReferenceValueAsUNORM8, 0, 31) |
8179 __gen_float(values->AlphaReferenceValueAsFLOAT32) |
8180 0;
8181
8182 dw[2] =
8183 __gen_float(values->BlendConstantColorRed) |
8184 0;
8185
8186 dw[3] =
8187 __gen_float(values->BlendConstantColorGreen) |
8188 0;
8189
8190 dw[4] =
8191 __gen_float(values->BlendConstantColorBlue) |
8192 0;
8193
8194 dw[5] =
8195 __gen_float(values->BlendConstantColorAlpha) |
8196 0;
8197
8198 }
8199
8200 #define GEN8_BLACK_LEVEL_CORRECTION_STATE__DW7576_length 0x00000002
8201
8202 struct GEN8_BLACK_LEVEL_CORRECTION_STATE__DW7576 {
8203 uint32_t BlackPointOffsetR;
8204 uint32_t BlackPointOffsetG;
8205 uint32_t BlackPointOffsetB;
8206 };
8207
8208 static inline void
8209 GEN8_BLACK_LEVEL_CORRECTION_STATE__DW7576_pack(__gen_user_data *data, void * restrict dst,
8210 const struct GEN8_BLACK_LEVEL_CORRECTION_STATE__DW7576 * restrict values)
8211 {
8212 uint32_t *dw = (uint32_t * restrict) dst;
8213
8214 dw[0] =
8215 __gen_field(values->BlackPointOffsetR, 0, 12) |
8216 0;
8217
8218 dw[1] =
8219 __gen_field(values->BlackPointOffsetG, 13, 25) |
8220 __gen_field(values->BlackPointOffsetB, 0, 12) |
8221 0;
8222
8223 }
8224
8225 #define GEN8_INTERFACE_DESCRIPTOR_DATA_length 0x00000008
8226
8227 struct GEN8_INTERFACE_DESCRIPTOR_DATA {
8228 uint32_t KernelStartPointer;
8229 uint32_t KernelStartPointerHigh;
8230 #define Ftz 0
8231 #define SetByKernel 1
8232 uint32_t DenormMode;
8233 #define Multiple 0
8234 #define Single 1
8235 uint32_t SingleProgramFlow;
8236 #define NormalPriority 0
8237 #define HighPriority 1
8238 uint32_t ThreadPriority;
8239 #define IEEE754 0
8240 #define Alternate 1
8241 uint32_t FloatingPointMode;
8242 bool IllegalOpcodeExceptionEnable;
8243 bool MaskStackExceptionEnable;
8244 bool SoftwareExceptionEnable;
8245 uint32_t SamplerStatePointer;
8246 #define Nosamplersused 0
8247 #define Between1and4samplersused 1
8248 #define Between5and8samplersused 2
8249 #define Between9and12samplersused 3
8250 #define Between13and16samplersused 4
8251 uint32_t SamplerCount;
8252 uint32_t BindingTablePointer;
8253 uint32_t BindingTableEntryCount;
8254 uint32_t ConstantIndirectURBEntryReadLength;
8255 uint32_t ConstantURBEntryReadOffset;
8256 #define RTNE 0
8257 #define RU 1
8258 #define RD 2
8259 #define RTZ 3
8260 uint32_t RoundingMode;
8261 bool BarrierEnable;
8262 #define Encodes0k 0
8263 #define Encodes4k 1
8264 #define Encodes8k 2
8265 #define Encodes16k 4
8266 #define Encodes32k 8
8267 #define Encodes64k 16
8268 uint32_t SharedLocalMemorySize;
8269 uint32_t NumberofThreadsinGPGPUThreadGroup;
8270 uint32_t CrossThreadConstantDataReadLength;
8271 };
8272
8273 static inline void
8274 GEN8_INTERFACE_DESCRIPTOR_DATA_pack(__gen_user_data *data, void * restrict dst,
8275 const struct GEN8_INTERFACE_DESCRIPTOR_DATA * restrict values)
8276 {
8277 uint32_t *dw = (uint32_t * restrict) dst;
8278
8279 dw[0] =
8280 __gen_offset(values->KernelStartPointer, 6, 31) |
8281 0;
8282
8283 dw[1] =
8284 __gen_offset(values->KernelStartPointerHigh, 0, 15) |
8285 0;
8286
8287 dw[2] =
8288 __gen_field(values->DenormMode, 19, 19) |
8289 __gen_field(values->SingleProgramFlow, 18, 18) |
8290 __gen_field(values->ThreadPriority, 17, 17) |
8291 __gen_field(values->FloatingPointMode, 16, 16) |
8292 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
8293 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
8294 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
8295 0;
8296
8297 dw[3] =
8298 __gen_offset(values->SamplerStatePointer, 5, 31) |
8299 __gen_field(values->SamplerCount, 2, 4) |
8300 0;
8301
8302 dw[4] =
8303 __gen_offset(values->BindingTablePointer, 5, 15) |
8304 __gen_field(values->BindingTableEntryCount, 0, 4) |
8305 0;
8306
8307 dw[5] =
8308 __gen_field(values->ConstantIndirectURBEntryReadLength, 16, 31) |
8309 __gen_field(values->ConstantURBEntryReadOffset, 0, 15) |
8310 0;
8311
8312 dw[6] =
8313 __gen_field(values->RoundingMode, 22, 23) |
8314 __gen_field(values->BarrierEnable, 21, 21) |
8315 __gen_field(values->SharedLocalMemorySize, 16, 20) |
8316 __gen_field(values->NumberofThreadsinGPGPUThreadGroup, 0, 9) |
8317 0;
8318
8319 dw[7] =
8320 __gen_field(values->CrossThreadConstantDataReadLength, 0, 7) |
8321 0;
8322
8323 }
8324
8325 #define GEN8_BINDING_TABLE_STATE_length 0x00000001
8326
8327 struct GEN8_BINDING_TABLE_STATE {
8328 uint32_t SurfaceStatePointer;
8329 };
8330
8331 static inline void
8332 GEN8_BINDING_TABLE_STATE_pack(__gen_user_data *data, void * restrict dst,
8333 const struct GEN8_BINDING_TABLE_STATE * restrict values)
8334 {
8335 uint32_t *dw = (uint32_t * restrict) dst;
8336
8337 dw[0] =
8338 __gen_offset(values->SurfaceStatePointer, 6, 31) |
8339 0;
8340
8341 }
8342
8343 #define GEN8_RENDER_SURFACE_STATE_length 0x00000010
8344
8345 struct GEN8_RENDER_SURFACE_STATE {
8346 #define SURFTYPE_1D 0
8347 #define SURFTYPE_2D 1
8348 #define SURFTYPE_3D 2
8349 #define SURFTYPE_CUBE 3
8350 #define SURFTYPE_BUFFER 4
8351 #define SURFTYPE_STRBUF 5
8352 #define SURFTYPE_NULL 7
8353 uint32_t SurfaceType;
8354 bool SurfaceArray;
8355 uint32_t SurfaceFormat;
8356 #define VALIGN4 1
8357 #define VALIGN8 2
8358 #define VALIGN16 3
8359 uint32_t SurfaceVerticalAlignment;
8360 #define HALIGN4 1
8361 #define HALIGN8 2
8362 #define HALIGN16 3
8363 uint32_t SurfaceHorizontalAlignment;
8364 #define LINEAR 0
8365 #define WMAJOR 1
8366 #define XMAJOR 2
8367 #define YMAJOR 3
8368 uint32_t TileMode;
8369 uint32_t VerticalLineStride;
8370 uint32_t VerticalLineStrideOffset;
8371 bool SamplerL2BypassModeDisable;
8372 #define WriteOnlyCache 0
8373 #define ReadWriteCache 1
8374 uint32_t RenderCacheReadWriteMode;
8375 #define NORMAL_MODE 0
8376 #define PROGRESSIVE_FRAME 2
8377 #define INTERLACED_FRAME 3
8378 uint32_t MediaBoundaryPixelMode;
8379 bool CubeFaceEnablePositiveZ;
8380 bool CubeFaceEnableNegativeZ;
8381 bool CubeFaceEnablePositiveY;
8382 bool CubeFaceEnableNegativeY;
8383 bool CubeFaceEnablePositiveX;
8384 bool CubeFaceEnableNegativeX;
8385 struct GEN8_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
8386 float BaseMipLevel;
8387 uint32_t SurfaceQPitch;
8388 uint32_t Height;
8389 uint32_t Width;
8390 uint32_t Depth;
8391 uint32_t SurfacePitch;
8392 #define _0DEG 0
8393 #define _90DEG 1
8394 #define _270DEG 3
8395 uint32_t RenderTargetAndSampleUnormRotation;
8396 uint32_t MinimumArrayElement;
8397 uint32_t RenderTargetViewExtent;
8398 #define MSS 0
8399 #define DEPTH_STENCIL 1
8400 uint32_t MultisampledSurfaceStorageFormat;
8401 #define MULTISAMPLECOUNT_1 0
8402 #define MULTISAMPLECOUNT_2 1
8403 #define MULTISAMPLECOUNT_4 2
8404 #define MULTISAMPLECOUNT_8 3
8405 uint32_t NumberofMultisamples;
8406 uint32_t MultisamplePositionPaletteIndex;
8407 uint32_t XOffset;
8408 uint32_t YOffset;
8409 bool EWADisableForCube;
8410 #define GPUcoherent 0
8411 #define IAcoherent 1
8412 uint32_t CoherencyType;
8413 uint32_t SurfaceMinLOD;
8414 uint32_t MIPCountLOD;
8415 uint32_t AuxiliarySurfaceQPitch;
8416 uint32_t AuxiliarySurfacePitch;
8417 #define AUX_NONE 0
8418 #define AUX_MCS 1
8419 #define AUX_APPEND 2
8420 #define AUX_HIZ 3
8421 uint32_t AuxiliarySurfaceMode;
8422 bool SeparateUVPlaneEnable;
8423 uint32_t XOffsetforUorUVPlane;
8424 uint32_t YOffsetforUorUVPlane;
8425 uint32_t RedClearColor;
8426 uint32_t GreenClearColor;
8427 uint32_t BlueClearColor;
8428 uint32_t AlphaClearColor;
8429 uint32_t ShaderChannelSelectRed;
8430 uint32_t ShaderChannelSelectGreen;
8431 uint32_t ShaderChannelSelectBlue;
8432 uint32_t ShaderChannelSelectAlpha;
8433 float ResourceMinLOD;
8434 __gen_address_type SurfaceBaseAddress;
8435 uint32_t XOffsetforVPlane;
8436 uint32_t YOffsetforVPlane;
8437 uint32_t AuxiliaryTableIndexforMediaCompressedSurface;
8438 __gen_address_type AuxiliarySurfaceBaseAddress;
8439 };
8440
8441 static inline void
8442 GEN8_RENDER_SURFACE_STATE_pack(__gen_user_data *data, void * restrict dst,
8443 const struct GEN8_RENDER_SURFACE_STATE * restrict values)
8444 {
8445 uint32_t *dw = (uint32_t * restrict) dst;
8446
8447 dw[0] =
8448 __gen_field(values->SurfaceType, 29, 31) |
8449 __gen_field(values->SurfaceArray, 28, 28) |
8450 __gen_field(values->SurfaceFormat, 18, 26) |
8451 __gen_field(values->SurfaceVerticalAlignment, 16, 17) |
8452 __gen_field(values->SurfaceHorizontalAlignment, 14, 15) |
8453 __gen_field(values->TileMode, 12, 13) |
8454 __gen_field(values->VerticalLineStride, 11, 11) |
8455 __gen_field(values->VerticalLineStrideOffset, 10, 10) |
8456 __gen_field(values->SamplerL2BypassModeDisable, 9, 9) |
8457 __gen_field(values->RenderCacheReadWriteMode, 8, 8) |
8458 __gen_field(values->MediaBoundaryPixelMode, 6, 7) |
8459 __gen_field(values->CubeFaceEnablePositiveZ, 0, 0) |
8460 __gen_field(values->CubeFaceEnableNegativeZ, 1, 1) |
8461 __gen_field(values->CubeFaceEnablePositiveY, 2, 2) |
8462 __gen_field(values->CubeFaceEnableNegativeY, 3, 3) |
8463 __gen_field(values->CubeFaceEnablePositiveX, 4, 4) |
8464 __gen_field(values->CubeFaceEnableNegativeX, 5, 5) |
8465 0;
8466
8467 uint32_t dw_MemoryObjectControlState;
8468 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
8469 dw[1] =
8470 __gen_field(dw_MemoryObjectControlState, 24, 30) |
8471 __gen_field(values->BaseMipLevel * (1 << 1), 19, 23) |
8472 __gen_field(values->SurfaceQPitch, 0, 14) |
8473 0;
8474
8475 dw[2] =
8476 __gen_field(values->Height, 16, 29) |
8477 __gen_field(values->Width, 0, 13) |
8478 0;
8479
8480 dw[3] =
8481 __gen_field(values->Depth, 21, 31) |
8482 __gen_field(values->SurfacePitch, 0, 17) |
8483 0;
8484
8485 dw[4] =
8486 __gen_field(values->RenderTargetAndSampleUnormRotation, 29, 30) |
8487 __gen_field(values->MinimumArrayElement, 18, 28) |
8488 __gen_field(values->RenderTargetViewExtent, 7, 17) |
8489 __gen_field(values->MultisampledSurfaceStorageFormat, 6, 6) |
8490 __gen_field(values->NumberofMultisamples, 3, 5) |
8491 __gen_field(values->MultisamplePositionPaletteIndex, 0, 2) |
8492 0;
8493
8494 dw[5] =
8495 __gen_offset(values->XOffset, 25, 31) |
8496 __gen_offset(values->YOffset, 21, 23) |
8497 __gen_field(values->EWADisableForCube, 20, 20) |
8498 __gen_field(values->CoherencyType, 14, 14) |
8499 __gen_field(values->SurfaceMinLOD, 4, 7) |
8500 __gen_field(values->MIPCountLOD, 0, 3) |
8501 0;
8502
8503 dw[6] =
8504 __gen_field(values->AuxiliarySurfaceQPitch, 16, 30) |
8505 __gen_field(values->AuxiliarySurfacePitch, 3, 11) |
8506 __gen_field(values->AuxiliarySurfaceMode, 0, 2) |
8507 __gen_field(values->SeparateUVPlaneEnable, 31, 31) |
8508 __gen_field(values->XOffsetforUorUVPlane, 16, 29) |
8509 __gen_field(values->YOffsetforUorUVPlane, 0, 13) |
8510 0;
8511
8512 dw[7] =
8513 __gen_field(values->RedClearColor, 31, 31) |
8514 __gen_field(values->GreenClearColor, 30, 30) |
8515 __gen_field(values->BlueClearColor, 29, 29) |
8516 __gen_field(values->AlphaClearColor, 28, 28) |
8517 __gen_field(values->ShaderChannelSelectRed, 25, 27) |
8518 __gen_field(values->ShaderChannelSelectGreen, 22, 24) |
8519 __gen_field(values->ShaderChannelSelectBlue, 19, 21) |
8520 __gen_field(values->ShaderChannelSelectAlpha, 16, 18) |
8521 __gen_field(values->ResourceMinLOD * (1 << 8), 0, 11) |
8522 0;
8523
8524 uint32_t dw8 =
8525 0;
8526
8527 uint64_t qw8 =
8528 __gen_combine_address(data, &dw[8], values->SurfaceBaseAddress, dw8);
8529
8530 dw[8] = qw8;
8531 dw[9] = qw8 >> 32;
8532
8533 uint32_t dw10 =
8534 __gen_field(values->XOffsetforVPlane, 48, 61) |
8535 __gen_field(values->YOffsetforVPlane, 32, 45) |
8536 __gen_field(values->AuxiliaryTableIndexforMediaCompressedSurface, 21, 31) |
8537 0;
8538
8539 uint64_t qw10 =
8540 __gen_combine_address(data, &dw[10], values->AuxiliarySurfaceBaseAddress, dw10);
8541
8542 dw[10] = qw10;
8543 dw[11] = qw10 >> 32;
8544
8545 dw[12] =
8546 0;
8547
8548 dw[13] =
8549 0;
8550
8551 dw[14] =
8552 0;
8553
8554 dw[15] =
8555 0;
8556
8557 }
8558
8559 #define GEN8_FILTER_COEFFICIENT_length 0x00000001
8560
8561 struct GEN8_FILTER_COEFFICIENT {
8562 uint32_t FilterCoefficient;
8563 };
8564
8565 static inline void
8566 GEN8_FILTER_COEFFICIENT_pack(__gen_user_data *data, void * restrict dst,
8567 const struct GEN8_FILTER_COEFFICIENT * restrict values)
8568 {
8569 uint32_t *dw = (uint32_t * restrict) dst;
8570
8571 dw[0] =
8572 __gen_field(values->FilterCoefficient, 0, 7) |
8573 0;
8574
8575 }
8576
8577 #define GEN8_SAMPLER_STATE_length 0x00000004
8578
8579 struct GEN8_SAMPLER_STATE {
8580 bool SamplerDisable;
8581 #define DX10OGL 0
8582 #define DX9 1
8583 uint32_t TextureBorderColorMode;
8584 #define CLAMP_NONE 0
8585 #define CLAMP_OGL 2
8586 uint32_t LODPreClampMode;
8587 float BaseMipLevel;
8588 #define MIPFILTER_NONE 0
8589 #define MIPFILTER_NEAREST 1
8590 #define MIPFILTER_LINEAR 3
8591 uint32_t MipModeFilter;
8592 #define MAPFILTER_NEAREST 0
8593 #define MAPFILTER_LINEAR 1
8594 #define MAPFILTER_ANISOTROPIC 2
8595 #define MAPFILTER_MONO 6
8596 uint32_t MagModeFilter;
8597 #define MAPFILTER_NEAREST 0
8598 #define MAPFILTER_LINEAR 1
8599 #define MAPFILTER_ANISOTROPIC 2
8600 #define MAPFILTER_MONO 6
8601 uint32_t MinModeFilter;
8602 uint32_t TextureLODBias;
8603 #define LEGACY 0
8604 #define EWAApproximation 1
8605 uint32_t AnisotropicAlgorithm;
8606 float MinLOD;
8607 float MaxLOD;
8608 bool ChromaKeyEnable;
8609 uint32_t ChromaKeyIndex;
8610 #define KEYFILTER_KILL_ON_ANY_MATCH 0
8611 #define KEYFILTER_REPLACE_BLACK 1
8612 uint32_t ChromaKeyMode;
8613 #define PREFILTEROPALWAYS 0
8614 #define PREFILTEROPNEVER 1
8615 #define PREFILTEROPLESS 2
8616 #define PREFILTEROPEQUAL 3
8617 #define PREFILTEROPLEQUAL 4
8618 #define PREFILTEROPGREATER 5
8619 #define PREFILTEROPNOTEQUAL 6
8620 #define PREFILTEROPGEQUAL 7
8621 uint32_t ShadowFunction;
8622 #define PROGRAMMED 0
8623 #define OVERRIDE 1
8624 uint32_t CubeSurfaceControlMode;
8625 uint32_t IndirectStatePointer;
8626 #define MIPNONE 0
8627 #define MIPFILTER 1
8628 uint32_t LODClampMagnificationMode;
8629 #define RATIO21 0
8630 #define RATIO41 1
8631 #define RATIO61 2
8632 #define RATIO81 3
8633 #define RATIO101 4
8634 #define RATIO121 5
8635 #define RATIO141 6
8636 #define RATIO161 7
8637 uint32_t MaximumAnisotropy;
8638 bool RAddressMinFilterRoundingEnable;
8639 bool RAddressMagFilterRoundingEnable;
8640 bool VAddressMinFilterRoundingEnable;
8641 bool VAddressMagFilterRoundingEnable;
8642 bool UAddressMinFilterRoundingEnable;
8643 bool UAddressMagFilterRoundingEnable;
8644 #define FULL 0
8645 #define HIGH 1
8646 #define MED 2
8647 #define LOW 3
8648 uint32_t TrilinearFilterQuality;
8649 bool NonnormalizedCoordinateEnable;
8650 uint32_t TCXAddressControlMode;
8651 uint32_t TCYAddressControlMode;
8652 uint32_t TCZAddressControlMode;
8653 };
8654
8655 static inline void
8656 GEN8_SAMPLER_STATE_pack(__gen_user_data *data, void * restrict dst,
8657 const struct GEN8_SAMPLER_STATE * restrict values)
8658 {
8659 uint32_t *dw = (uint32_t * restrict) dst;
8660
8661 dw[0] =
8662 __gen_field(values->SamplerDisable, 31, 31) |
8663 __gen_field(values->TextureBorderColorMode, 29, 29) |
8664 __gen_field(values->LODPreClampMode, 27, 28) |
8665 __gen_field(values->BaseMipLevel * (1 << 1), 22, 26) |
8666 __gen_field(values->MipModeFilter, 20, 21) |
8667 __gen_field(values->MagModeFilter, 17, 19) |
8668 __gen_field(values->MinModeFilter, 14, 16) |
8669 __gen_field(values->TextureLODBias, 1, 13) |
8670 __gen_field(values->AnisotropicAlgorithm, 0, 0) |
8671 0;
8672
8673 dw[1] =
8674 __gen_field(values->MinLOD * (1 << 8), 20, 31) |
8675 __gen_field(values->MaxLOD * (1 << 8), 8, 19) |
8676 __gen_field(values->ChromaKeyEnable, 7, 7) |
8677 __gen_field(values->ChromaKeyIndex, 5, 6) |
8678 __gen_field(values->ChromaKeyMode, 4, 4) |
8679 __gen_field(values->ShadowFunction, 1, 3) |
8680 __gen_field(values->CubeSurfaceControlMode, 0, 0) |
8681 0;
8682
8683 dw[2] =
8684 __gen_field(values->IndirectStatePointer, 6, 23) |
8685 __gen_field(values->LODClampMagnificationMode, 0, 0) |
8686 0;
8687
8688 dw[3] =
8689 __gen_field(values->MaximumAnisotropy, 19, 21) |
8690 __gen_field(values->RAddressMinFilterRoundingEnable, 13, 13) |
8691 __gen_field(values->RAddressMagFilterRoundingEnable, 14, 14) |
8692 __gen_field(values->VAddressMinFilterRoundingEnable, 15, 15) |
8693 __gen_field(values->VAddressMagFilterRoundingEnable, 16, 16) |
8694 __gen_field(values->UAddressMinFilterRoundingEnable, 17, 17) |
8695 __gen_field(values->UAddressMagFilterRoundingEnable, 18, 18) |
8696 __gen_field(values->TrilinearFilterQuality, 11, 12) |
8697 __gen_field(values->NonnormalizedCoordinateEnable, 10, 10) |
8698 __gen_field(values->TCXAddressControlMode, 6, 8) |
8699 __gen_field(values->TCYAddressControlMode, 3, 5) |
8700 __gen_field(values->TCZAddressControlMode, 0, 2) |
8701 0;
8702
8703 }
8704
8705 #define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_length 0x00000008
8706
8707 struct GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS {
8708 uint32_t Table0YFilterCoefficientn1;
8709 uint32_t Table0XFilterCoefficientn1;
8710 uint32_t Table0YFilterCoefficientn0;
8711 uint32_t Table0XFilterCoefficientn0;
8712 uint32_t Table0YFilterCoefficientn3;
8713 uint32_t Table0XFilterCoefficientn3;
8714 uint32_t Table0YFilterCoefficientn2;
8715 uint32_t Table0XFilterCoefficientn2;
8716 uint32_t Table0YFilterCoefficientn5;
8717 uint32_t Table0XFilterCoefficientn5;
8718 uint32_t Table0YFilterCoefficientn4;
8719 uint32_t Table0XFilterCoefficientn4;
8720 uint32_t Table0YFilterCoefficientn7;
8721 uint32_t Table0XFilterCoefficientn7;
8722 uint32_t Table0YFilterCoefficientn6;
8723 uint32_t Table0XFilterCoefficientn6;
8724 uint32_t Table1XFilterCoefficientn3;
8725 uint32_t Table1XFilterCoefficientn2;
8726 uint32_t Table1XFilterCoefficientn5;
8727 uint32_t Table1XFilterCoefficientn4;
8728 uint32_t Table1YFilterCoefficientn3;
8729 uint32_t Table1YFilterCoefficientn2;
8730 uint32_t Table1YFilterCoefficientn5;
8731 uint32_t Table1YFilterCoefficientn4;
8732 };
8733
8734 static inline void
8735 GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_pack(__gen_user_data *data, void * restrict dst,
8736 const struct GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS * restrict values)
8737 {
8738 uint32_t *dw = (uint32_t * restrict) dst;
8739
8740 dw[0] =
8741 __gen_field(values->Table0YFilterCoefficientn1, 24, 31) |
8742 __gen_field(values->Table0XFilterCoefficientn1, 16, 23) |
8743 __gen_field(values->Table0YFilterCoefficientn0, 8, 15) |
8744 __gen_field(values->Table0XFilterCoefficientn0, 0, 7) |
8745 0;
8746
8747 dw[1] =
8748 __gen_field(values->Table0YFilterCoefficientn3, 24, 31) |
8749 __gen_field(values->Table0XFilterCoefficientn3, 16, 23) |
8750 __gen_field(values->Table0YFilterCoefficientn2, 8, 15) |
8751 __gen_field(values->Table0XFilterCoefficientn2, 0, 7) |
8752 0;
8753
8754 dw[2] =
8755 __gen_field(values->Table0YFilterCoefficientn5, 24, 31) |
8756 __gen_field(values->Table0XFilterCoefficientn5, 16, 23) |
8757 __gen_field(values->Table0YFilterCoefficientn4, 8, 15) |
8758 __gen_field(values->Table0XFilterCoefficientn4, 0, 7) |
8759 0;
8760
8761 dw[3] =
8762 __gen_field(values->Table0YFilterCoefficientn7, 24, 31) |
8763 __gen_field(values->Table0XFilterCoefficientn7, 16, 23) |
8764 __gen_field(values->Table0YFilterCoefficientn6, 8, 15) |
8765 __gen_field(values->Table0XFilterCoefficientn6, 0, 7) |
8766 0;
8767
8768 dw[4] =
8769 __gen_field(values->Table1XFilterCoefficientn3, 24, 31) |
8770 __gen_field(values->Table1XFilterCoefficientn2, 16, 23) |
8771 0;
8772
8773 dw[5] =
8774 __gen_field(values->Table1XFilterCoefficientn5, 8, 15) |
8775 __gen_field(values->Table1XFilterCoefficientn4, 0, 7) |
8776 0;
8777
8778 dw[6] =
8779 __gen_field(values->Table1YFilterCoefficientn3, 24, 31) |
8780 __gen_field(values->Table1YFilterCoefficientn2, 16, 23) |
8781 0;
8782
8783 dw[7] =
8784 __gen_field(values->Table1YFilterCoefficientn5, 8, 15) |
8785 __gen_field(values->Table1YFilterCoefficientn4, 0, 7) |
8786 0;
8787
8788 }
8789
8790 /* Enum 3D_Prim_Topo_Type */
8791 #define _3DPRIM_POINTLIST 1
8792 #define _3DPRIM_LINELIST 2
8793 #define _3DPRIM_LINESTRIP 3
8794 #define _3DPRIM_TRILIST 4
8795 #define _3DPRIM_TRISTRIP 5
8796 #define _3DPRIM_TRIFAN 6
8797 #define _3DPRIM_QUADLIST 7
8798 #define _3DPRIM_QUADSTRIP 8
8799 #define _3DPRIM_LINELIST_ADJ 9
8800 #define _3DPRIM_LINESTRIP_ADJ 10
8801 #define _3DPRIM_TRILIST_ADJ 11
8802 #define _3DPRIM_TRISTRIP_ADJ 12
8803 #define _3DPRIM_TRISTRIP_REVERSE 13
8804 #define _3DPRIM_POLYGON 14
8805 #define _3DPRIM_RECTLIST 15
8806 #define _3DPRIM_LINELOOP 16
8807 #define _3DPRIM_POINTLIST_BF 17
8808 #define _3DPRIM_LINESTRIP_CONT 18
8809 #define _3DPRIM_LINESTRIP_BF 19
8810 #define _3DPRIM_LINESTRIP_CONT_BF 20
8811 #define _3DPRIM_TRIFAN_NOSTIPPLE 22
8812 #define _3DPRIM_PATCHLIST_1 32
8813 #define _3DPRIM_PATCHLIST_2 33
8814 #define _3DPRIM_PATCHLIST_3 34
8815 #define _3DPRIM_PATCHLIST_4 35
8816 #define _3DPRIM_PATCHLIST_5 36
8817 #define _3DPRIM_PATCHLIST_6 37
8818 #define _3DPRIM_PATCHLIST_7 38
8819 #define _3DPRIM_PATCHLIST_8 39
8820 #define _3DPRIM_PATCHLIST_9 40
8821 #define _3DPRIM_PATCHLIST_10 41
8822 #define _3DPRIM_PATCHLIST_11 42
8823 #define _3DPRIM_PATCHLIST_12 43
8824 #define _3DPRIM_PATCHLIST_13 44
8825 #define _3DPRIM_PATCHLIST_14 45
8826 #define _3DPRIM_PATCHLIST_15 46
8827 #define _3DPRIM_PATCHLIST_16 47
8828 #define _3DPRIM_PATCHLIST_17 48
8829 #define _3DPRIM_PATCHLIST_18 49
8830 #define _3DPRIM_PATCHLIST_19 50
8831 #define _3DPRIM_PATCHLIST_20 51
8832 #define _3DPRIM_PATCHLIST_21 52
8833 #define _3DPRIM_PATCHLIST_22 53
8834 #define _3DPRIM_PATCHLIST_23 54
8835 #define _3DPRIM_PATCHLIST_24 55
8836 #define _3DPRIM_PATCHLIST_25 56
8837 #define _3DPRIM_PATCHLIST_26 57
8838 #define _3DPRIM_PATCHLIST_27 58
8839 #define _3DPRIM_PATCHLIST_28 59
8840 #define _3DPRIM_PATCHLIST_29 60
8841 #define _3DPRIM_PATCHLIST_30 61
8842 #define _3DPRIM_PATCHLIST_31 62
8843 #define _3DPRIM_PATCHLIST_32 63
8844
8845 /* Enum 3D_Vertex_Component_Control */
8846 #define VFCOMP_NOSTORE 0
8847 #define VFCOMP_STORE_SRC 1
8848 #define VFCOMP_STORE_0 2
8849 #define VFCOMP_STORE_1_FP 3
8850 #define VFCOMP_STORE_1_INT 4
8851 #define VFCOMP_STORE_PID 7
8852
8853 /* Enum WRAP_SHORTEST_ENABLE */
8854 #define WSE_X 1
8855 #define WSE_Y 2
8856 #define WSE_XY 3
8857 #define WSE_Z 4
8858 #define WSE_XZ 5
8859 #define WSE_YZ 6
8860 #define WSE_XYZ 7
8861 #define WSE_W 8
8862 #define WSE_XW 9
8863 #define WSE_YW 10
8864 #define WSE_XYW 11
8865 #define WSE_ZW 12
8866 #define WSE_XZW 13
8867 #define WSE_YZW 14
8868 #define WSE_XYZW 15
8869
8870 /* Enum 3D_Stencil_Operation */
8871 #define STENCILOP_KEEP 0
8872 #define STENCILOP_ZERO 1
8873 #define STENCILOP_REPLACE 2
8874 #define STENCILOP_INCRSAT 3
8875 #define STENCILOP_DECRSAT 4
8876 #define STENCILOP_INCR 5
8877 #define STENCILOP_DECR 6
8878 #define STENCILOP_INVERT 7
8879
8880 /* Enum 3D_Color_Buffer_Blend_Factor */
8881 #define BLENDFACTOR_ONE 1
8882 #define BLENDFACTOR_SRC_COLOR 2
8883 #define BLENDFACTOR_SRC_ALPHA 3
8884 #define BLENDFACTOR_DST_ALPHA 4
8885 #define BLENDFACTOR_DST_COLOR 5
8886 #define BLENDFACTOR_SRC_ALPHA_SATURATE 6
8887 #define BLENDFACTOR_CONST_COLOR 7
8888 #define BLENDFACTOR_CONST_ALPHA 8
8889 #define BLENDFACTOR_SRC1_COLOR 9
8890 #define BLENDFACTOR_SRC1_ALPHA 10
8891 #define BLENDFACTOR_ZERO 17
8892 #define BLENDFACTOR_INV_SRC_COLOR 18
8893 #define BLENDFACTOR_INV_SRC_ALPHA 19
8894 #define BLENDFACTOR_INV_DST_ALPHA 20
8895 #define BLENDFACTOR_INV_DST_COLOR 21
8896 #define BLENDFACTOR_INV_CONST_COLOR 23
8897 #define BLENDFACTOR_INV_CONST_ALPHA 24
8898 #define BLENDFACTOR_INV_SRC1_COLOR 25
8899 #define BLENDFACTOR_INV_SRC1_ALPHA 26
8900
8901 /* Enum 3D_Color_Buffer_Blend_Function */
8902 #define BLENDFUNCTION_ADD 0
8903 #define BLENDFUNCTION_SUBTRACT 1
8904 #define BLENDFUNCTION_REVERSE_SUBTRACT 2
8905 #define BLENDFUNCTION_MIN 3
8906 #define BLENDFUNCTION_MAX 4
8907
8908 /* Enum 3D_Compare_Function */
8909 #define COMPAREFUNCTION_ALWAYS 0
8910 #define COMPAREFUNCTION_NEVER 1
8911 #define COMPAREFUNCTION_LESS 2
8912 #define COMPAREFUNCTION_EQUAL 3
8913 #define COMPAREFUNCTION_LEQUAL 4
8914 #define COMPAREFUNCTION_GREATER 5
8915 #define COMPAREFUNCTION_NOTEQUAL 6
8916 #define COMPAREFUNCTION_GEQUAL 7
8917
8918 /* Enum 3D_Logic_Op_Function */
8919 #define LOGICOP_CLEAR 0
8920 #define LOGICOP_NOR 1
8921 #define LOGICOP_AND_INVERTED 2
8922 #define LOGICOP_COPY_INVERTED 3
8923 #define LOGICOP_AND_REVERSE 4
8924 #define LOGICOP_INVERT 5
8925 #define LOGICOP_XOR 6
8926 #define LOGICOP_NAND 7
8927 #define LOGICOP_AND 8
8928 #define LOGICOP_EQUIV 9
8929 #define LOGICOP_NOOP 10
8930 #define LOGICOP_OR_INVERTED 11
8931 #define LOGICOP_COPY 12
8932 #define LOGICOP_OR_REVERSE 13
8933 #define LOGICOP_OR 14
8934 #define LOGICOP_SET 15
8935
8936 /* Enum SURFACE_FORMAT */
8937 #define R32G32B32A32_FLOAT 0
8938 #define R32G32B32A32_SINT 1
8939 #define R32G32B32A32_UINT 2
8940 #define R32G32B32A32_UNORM 3
8941 #define R32G32B32A32_SNORM 4
8942 #define R64G64_FLOAT 5
8943 #define R32G32B32X32_FLOAT 6
8944 #define R32G32B32A32_SSCALED 7
8945 #define R32G32B32A32_USCALED 8
8946 #define R32G32B32A32_SFIXED 32
8947 #define R64G64_PASSTHRU 33
8948 #define R32G32B32_FLOAT 64
8949 #define R32G32B32_SINT 65
8950 #define R32G32B32_UINT 66
8951 #define R32G32B32_UNORM 67
8952 #define R32G32B32_SNORM 68
8953 #define R32G32B32_SSCALED 69
8954 #define R32G32B32_USCALED 70
8955 #define R32G32B32_SFIXED 80
8956 #define R16G16B16A16_UNORM 128
8957 #define R16G16B16A16_SNORM 129
8958 #define R16G16B16A16_SINT 130
8959 #define R16G16B16A16_UINT 131
8960 #define R16G16B16A16_FLOAT 132
8961 #define R32G32_FLOAT 133
8962 #define R32G32_SINT 134
8963 #define R32G32_UINT 135
8964 #define R32_FLOAT_X8X24_TYPELESS 136
8965 #define X32_TYPELESS_G8X24_UINT 137
8966 #define L32A32_FLOAT 138
8967 #define R32G32_UNORM 139
8968 #define R32G32_SNORM 140
8969 #define R64_FLOAT 141
8970 #define R16G16B16X16_UNORM 142
8971 #define R16G16B16X16_FLOAT 143
8972 #define A32X32_FLOAT 144
8973 #define L32X32_FLOAT 145
8974 #define I32X32_FLOAT 146
8975 #define R16G16B16A16_SSCALED 147
8976 #define R16G16B16A16_USCALED 148
8977 #define R32G32_SSCALED 149
8978 #define R32G32_USCALED 150
8979 #define R32G32_SFIXED 160
8980 #define R64_PASSTHRU 161
8981 #define B8G8R8A8_UNORM 192
8982 #define B8G8R8A8_UNORM_SRGB 193
8983 #define R10G10B10A2_UNORM 194
8984 #define R10G10B10A2_UNORM_SRGB 195
8985 #define R10G10B10A2_UINT 196
8986 #define R10G10B10_SNORM_A2_UNORM 197
8987 #define R8G8B8A8_UNORM 199
8988 #define R8G8B8A8_UNORM_SRGB 200
8989 #define R8G8B8A8_SNORM 201
8990 #define R8G8B8A8_SINT 202
8991 #define R8G8B8A8_UINT 203
8992 #define R16G16_UNORM 204
8993 #define R16G16_SNORM 205
8994 #define R16G16_SINT 206
8995 #define R16G16_UINT 207
8996 #define R16G16_FLOAT 208
8997 #define B10G10R10A2_UNORM 209
8998 #define B10G10R10A2_UNORM_SRGB 210
8999 #define R11G11B10_FLOAT 211
9000 #define R32_SINT 214
9001 #define R32_UINT 215
9002 #define R32_FLOAT 216
9003 #define R24_UNORM_X8_TYPELESS 217
9004 #define X24_TYPELESS_G8_UINT 218
9005 #define L32_UNORM 221
9006 #define A32_UNORM 222
9007 #define L16A16_UNORM 223
9008 #define I24X8_UNORM 224
9009 #define L24X8_UNORM 225
9010 #define A24X8_UNORM 226
9011 #define I32_FLOAT 227
9012 #define L32_FLOAT 228
9013 #define A32_FLOAT 229
9014 #define X8B8_UNORM_G8R8_SNORM 230
9015 #define A8X8_UNORM_G8R8_SNORM 231
9016 #define B8X8_UNORM_G8R8_SNORM 232
9017 #define B8G8R8X8_UNORM 233
9018 #define B8G8R8X8_UNORM_SRGB 234
9019 #define R8G8B8X8_UNORM 235
9020 #define R8G8B8X8_UNORM_SRGB 236
9021 #define R9G9B9E5_SHAREDEXP 237
9022 #define B10G10R10X2_UNORM 238
9023 #define L16A16_FLOAT 240
9024 #define R32_UNORM 241
9025 #define R32_SNORM 242
9026 #define R10G10B10X2_USCALED 243
9027 #define R8G8B8A8_SSCALED 244
9028 #define R8G8B8A8_USCALED 245
9029 #define R16G16_SSCALED 246
9030 #define R16G16_USCALED 247
9031 #define R32_SSCALED 248
9032 #define R32_USCALED 249
9033 #define B5G6R5_UNORM 256
9034 #define B5G6R5_UNORM_SRGB 257
9035 #define B5G5R5A1_UNORM 258
9036 #define B5G5R5A1_UNORM_SRGB 259
9037 #define B4G4R4A4_UNORM 260
9038 #define B4G4R4A4_UNORM_SRGB 261
9039 #define R8G8_UNORM 262
9040 #define R8G8_SNORM 263
9041 #define R8G8_SINT 264
9042 #define R8G8_UINT 265
9043 #define R16_UNORM 266
9044 #define R16_SNORM 267
9045 #define R16_SINT 268
9046 #define R16_UINT 269
9047 #define R16_FLOAT 270
9048 #define A8P8_UNORM_PALETTE0 271
9049 #define A8P8_UNORM_PALETTE1 272
9050 #define I16_UNORM 273
9051 #define L16_UNORM 274
9052 #define A16_UNORM 275
9053 #define L8A8_UNORM 276
9054 #define I16_FLOAT 277
9055 #define L16_FLOAT 278
9056 #define A16_FLOAT 279
9057 #define L8A8_UNORM_SRGB 280
9058 #define R5G5_SNORM_B6_UNORM 281
9059 #define B5G5R5X1_UNORM 282
9060 #define B5G5R5X1_UNORM_SRGB 283
9061 #define R8G8_SSCALED 284
9062 #define R8G8_USCALED 285
9063 #define R16_SSCALED 286
9064 #define R16_USCALED 287
9065 #define P8A8_UNORM_PALETTE0 290
9066 #define P8A8_UNORM_PALETTE1 291
9067 #define A1B5G5R5_UNORM 292
9068 #define A4B4G4R4_UNORM 293
9069 #define L8A8_UINT 294
9070 #define L8A8_SINT 295
9071 #define R8_UNORM 320
9072 #define R8_SNORM 321
9073 #define R8_SINT 322
9074 #define R8_UINT 323
9075 #define A8_UNORM 324
9076 #define I8_UNORM 325
9077 #define L8_UNORM 326
9078 #define P4A4_UNORM_PALETTE0 327
9079 #define A4P4_UNORM_PALETTE0 328
9080 #define R8_SSCALED 329
9081 #define R8_USCALED 330
9082 #define P8_UNORM_PALETTE0 331
9083 #define L8_UNORM_SRGB 332
9084 #define P8_UNORM_PALETTE1 333
9085 #define P4A4_UNORM_PALETTE1 334
9086 #define A4P4_UNORM_PALETTE1 335
9087 #define Y8_UNORM 336
9088 #define L8_UINT 338
9089 #define L8_SINT 339
9090 #define I8_UINT 340
9091 #define I8_SINT 341
9092 #define DXT1_RGB_SRGB 384
9093 #define R1_UNORM 385
9094 #define YCRCB_NORMAL 386
9095 #define YCRCB_SWAPUVY 387
9096 #define P2_UNORM_PALETTE0 388
9097 #define P2_UNORM_PALETTE1 389
9098 #define BC1_UNORM 390
9099 #define BC2_UNORM 391
9100 #define BC3_UNORM 392
9101 #define BC4_UNORM 393
9102 #define BC5_UNORM 394
9103 #define BC1_UNORM_SRGB 395
9104 #define BC2_UNORM_SRGB 396
9105 #define BC3_UNORM_SRGB 397
9106 #define MONO8 398
9107 #define YCRCB_SWAPUV 399
9108 #define YCRCB_SWAPY 400
9109 #define DXT1_RGB 401
9110 #define FXT1 402
9111 #define R8G8B8_UNORM 403
9112 #define R8G8B8_SNORM 404
9113 #define R8G8B8_SSCALED 405
9114 #define R8G8B8_USCALED 406
9115 #define R64G64B64A64_FLOAT 407
9116 #define R64G64B64_FLOAT 408
9117 #define BC4_SNORM 409
9118 #define BC5_SNORM 410
9119 #define R16G16B16_FLOAT 411
9120 #define R16G16B16_UNORM 412
9121 #define R16G16B16_SNORM 413
9122 #define R16G16B16_SSCALED 414
9123 #define R16G16B16_USCALED 415
9124 #define BC6H_SF16 417
9125 #define BC7_UNORM 418
9126 #define BC7_UNORM_SRGB 419
9127 #define BC6H_UF16 420
9128 #define PLANAR_420_8 421
9129 #define R8G8B8_UNORM_SRGB 424
9130 #define ETC1_RGB8 425
9131 #define ETC2_RGB8 426
9132 #define EAC_R11 427
9133 #define EAC_RG11 428
9134 #define EAC_SIGNED_R11 429
9135 #define EAC_SIGNED_RG11 430
9136 #define ETC2_SRGB8 431
9137 #define R16G16B16_UINT 432
9138 #define R16G16B16_SINT 433
9139 #define R32_SFIXED 434
9140 #define R10G10B10A2_SNORM 435
9141 #define R10G10B10A2_USCALED 436
9142 #define R10G10B10A2_SSCALED 437
9143 #define R10G10B10A2_SINT 438
9144 #define B10G10R10A2_SNORM 439
9145 #define B10G10R10A2_USCALED 440
9146 #define B10G10R10A2_SSCALED 441
9147 #define B10G10R10A2_UINT 442
9148 #define B10G10R10A2_SINT 443
9149 #define R64G64B64A64_PASSTHRU 444
9150 #define R64G64B64_PASSTHRU 445
9151 #define ETC2_RGB8_PTA 448
9152 #define ETC2_SRGB8_PTA 449
9153 #define ETC2_EAC_RGBA8 450
9154 #define ETC2_EAC_SRGB8_A8 451
9155 #define R8G8B8_UINT 456
9156 #define R8G8B8_SINT 457
9157 #define RAW 511
9158
9159 /* Enum Shader Channel Select */
9160 #define SCS_ZERO 0
9161 #define SCS_ONE 1
9162 #define SCS_RED 4
9163 #define SCS_GREEN 5
9164 #define SCS_BLUE 6
9165 #define SCS_ALPHA 7
9166
9167 /* Enum Clear Color */
9168 #define CC_ZERO 0
9169 #define CC_ONE 1
9170
9171 /* Enum Texture Coordinate Mode */
9172 #define TCM_WRAP 0
9173 #define TCM_MIRROR 1
9174 #define TCM_CLAMP 2
9175 #define TCM_CUBE 3
9176 #define TCM_CLAMP_BORDER 4
9177 #define TCM_MIRROR_ONCE 5
9178 #define TCM_HALF_BORDER 6
9179