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Merge branch 'wip/nir-vtn' into vulkan
[mesa.git] / src / vulkan / gen8_pack.h
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24
25 /* Instructions, enums and structures for BDW.
26 *
27 * This file has been generated, do not hand edit.
28 */
29
30 #pragma once
31
32 #include <stdio.h>
33 #include <assert.h>
34
35 #ifndef __gen_validate_value
36 #define __gen_validate_value(x)
37 #endif
38
39 #ifndef __gen_field_functions
40 #define __gen_field_functions
41
42 union __gen_value {
43 float f;
44 uint32_t dw;
45 };
46
47 static inline uint64_t
48 __gen_mbo(uint32_t start, uint32_t end)
49 {
50 return (~0ul >> (64 - (end - start + 1))) << start;
51 }
52
53 static inline uint64_t
54 __gen_field(uint64_t v, uint32_t start, uint32_t end)
55 {
56 __gen_validate_value(v);
57 #if DEBUG
58 if (end - start + 1 < 64)
59 assert(v < 1ul << (end - start + 1));
60 #endif
61
62 return v << start;
63 }
64
65 static inline uint64_t
66 __gen_offset(uint64_t v, uint32_t start, uint32_t end)
67 {
68 __gen_validate_value(v);
69 #if DEBUG
70 uint64_t mask = (~0ul >> (64 - (end - start + 1))) << start;
71
72 assert((v & ~mask) == 0);
73 #endif
74
75 return v;
76 }
77
78 static inline uint32_t
79 __gen_float(float v)
80 {
81 __gen_validate_value(v);
82 return ((union __gen_value) { .f = (v) }).dw;
83 }
84
85 #ifndef __gen_address_type
86 #error #define __gen_address_type before including this file
87 #endif
88
89 #ifndef __gen_user_data
90 #error #define __gen_combine_address before including this file
91 #endif
92
93 #endif
94
95 #define GEN8_3DSTATE_URB_VS_length 0x00000002
96 #define GEN8_3DSTATE_URB_VS_length_bias 0x00000002
97 #define GEN8_3DSTATE_URB_VS_header \
98 .CommandType = 3, \
99 .CommandSubType = 3, \
100 ._3DCommandOpcode = 0, \
101 ._3DCommandSubOpcode = 48, \
102 .DwordLength = 0
103
104 struct GEN8_3DSTATE_URB_VS {
105 uint32_t CommandType;
106 uint32_t CommandSubType;
107 uint32_t _3DCommandOpcode;
108 uint32_t _3DCommandSubOpcode;
109 uint32_t DwordLength;
110 uint32_t VSURBStartingAddress;
111 uint32_t VSURBEntryAllocationSize;
112 uint32_t VSNumberofURBEntries;
113 };
114
115 static inline void
116 GEN8_3DSTATE_URB_VS_pack(__gen_user_data *data, void * restrict dst,
117 const struct GEN8_3DSTATE_URB_VS * restrict values)
118 {
119 uint32_t *dw = (uint32_t * restrict) dst;
120
121 dw[0] =
122 __gen_field(values->CommandType, 29, 31) |
123 __gen_field(values->CommandSubType, 27, 28) |
124 __gen_field(values->_3DCommandOpcode, 24, 26) |
125 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
126 __gen_field(values->DwordLength, 0, 7) |
127 0;
128
129 dw[1] =
130 __gen_field(values->VSURBStartingAddress, 25, 31) |
131 __gen_field(values->VSURBEntryAllocationSize, 16, 24) |
132 __gen_field(values->VSNumberofURBEntries, 0, 15) |
133 0;
134
135 }
136
137 #define GEN8_3DSTATE_VS_length 0x00000009
138 #define GEN8_3DSTATE_VS_length_bias 0x00000002
139 #define GEN8_3DSTATE_VS_header \
140 .CommandType = 3, \
141 .CommandSubType = 3, \
142 ._3DCommandOpcode = 0, \
143 ._3DCommandSubOpcode = 16, \
144 .DwordLength = 7
145
146 struct GEN8_3DSTATE_VS {
147 uint32_t CommandType;
148 uint32_t CommandSubType;
149 uint32_t _3DCommandOpcode;
150 uint32_t _3DCommandSubOpcode;
151 uint32_t DwordLength;
152 uint64_t KernelStartPointer;
153 #define Multiple 0
154 #define Single 1
155 uint32_t SingleVertexDispatch;
156 #define Dmask 0
157 #define Vmask 1
158 uint32_t VectorMaskEnable;
159 #define NoSamplers 0
160 #define _14Samplers 1
161 #define _58Samplers 2
162 #define _912Samplers 3
163 #define _1316Samplers 4
164 uint32_t SamplerCount;
165 uint32_t BindingTableEntryCount;
166 #define Normal 0
167 #define High 1
168 uint32_t ThreadDispatchPriority;
169 #define IEEE754 0
170 #define Alternate 1
171 uint32_t FloatingPointMode;
172 uint32_t IllegalOpcodeExceptionEnable;
173 uint32_t AccessesUAV;
174 uint32_t SoftwareExceptionEnable;
175 uint64_t ScratchSpaceBasePointer;
176 uint32_t PerThreadScratchSpace;
177 uint32_t DispatchGRFStartRegisterForURBData;
178 uint32_t VertexURBEntryReadLength;
179 uint32_t VertexURBEntryReadOffset;
180 uint32_t MaximumNumberofThreads;
181 uint32_t StatisticsEnable;
182 uint32_t SIMD8DispatchEnable;
183 uint32_t VertexCacheDisable;
184 uint32_t FunctionEnable;
185 uint32_t VertexURBEntryOutputReadOffset;
186 uint32_t VertexURBEntryOutputLength;
187 uint32_t UserClipDistanceClipTestEnableBitmask;
188 uint32_t UserClipDistanceCullTestEnableBitmask;
189 };
190
191 static inline void
192 GEN8_3DSTATE_VS_pack(__gen_user_data *data, void * restrict dst,
193 const struct GEN8_3DSTATE_VS * restrict values)
194 {
195 uint32_t *dw = (uint32_t * restrict) dst;
196
197 dw[0] =
198 __gen_field(values->CommandType, 29, 31) |
199 __gen_field(values->CommandSubType, 27, 28) |
200 __gen_field(values->_3DCommandOpcode, 24, 26) |
201 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
202 __gen_field(values->DwordLength, 0, 7) |
203 0;
204
205 uint64_t qw1 =
206 __gen_offset(values->KernelStartPointer, 6, 63) |
207 0;
208
209 dw[1] = qw1;
210 dw[2] = qw1 >> 32;
211
212 dw[3] =
213 __gen_field(values->SingleVertexDispatch, 31, 31) |
214 __gen_field(values->VectorMaskEnable, 30, 30) |
215 __gen_field(values->SamplerCount, 27, 29) |
216 __gen_field(values->BindingTableEntryCount, 18, 25) |
217 __gen_field(values->ThreadDispatchPriority, 17, 17) |
218 __gen_field(values->FloatingPointMode, 16, 16) |
219 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
220 __gen_field(values->AccessesUAV, 12, 12) |
221 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
222 0;
223
224 uint64_t qw4 =
225 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
226 __gen_field(values->PerThreadScratchSpace, 0, 3) |
227 0;
228
229 dw[4] = qw4;
230 dw[5] = qw4 >> 32;
231
232 dw[6] =
233 __gen_field(values->DispatchGRFStartRegisterForURBData, 20, 24) |
234 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
235 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
236 0;
237
238 dw[7] =
239 __gen_field(values->MaximumNumberofThreads, 23, 31) |
240 __gen_field(values->StatisticsEnable, 10, 10) |
241 __gen_field(values->SIMD8DispatchEnable, 2, 2) |
242 __gen_field(values->VertexCacheDisable, 1, 1) |
243 __gen_field(values->FunctionEnable, 0, 0) |
244 0;
245
246 dw[8] =
247 __gen_field(values->VertexURBEntryOutputReadOffset, 21, 26) |
248 __gen_field(values->VertexURBEntryOutputLength, 16, 20) |
249 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 8, 15) |
250 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
251 0;
252
253 }
254
255 #define GEN8_GPGPU_CSR_BASE_ADDRESS_length 0x00000003
256 #define GEN8_GPGPU_CSR_BASE_ADDRESS_length_bias 0x00000002
257 #define GEN8_GPGPU_CSR_BASE_ADDRESS_header \
258 .CommandType = 3, \
259 .CommandSubType = 0, \
260 ._3DCommandOpcode = 1, \
261 ._3DCommandSubOpcode = 4, \
262 .DwordLength = 1
263
264 struct GEN8_GPGPU_CSR_BASE_ADDRESS {
265 uint32_t CommandType;
266 uint32_t CommandSubType;
267 uint32_t _3DCommandOpcode;
268 uint32_t _3DCommandSubOpcode;
269 uint32_t DwordLength;
270 __gen_address_type GPGPUCSRBaseAddressHigh;
271 };
272
273 static inline void
274 GEN8_GPGPU_CSR_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
275 const struct GEN8_GPGPU_CSR_BASE_ADDRESS * restrict values)
276 {
277 uint32_t *dw = (uint32_t * restrict) dst;
278
279 dw[0] =
280 __gen_field(values->CommandType, 29, 31) |
281 __gen_field(values->CommandSubType, 27, 28) |
282 __gen_field(values->_3DCommandOpcode, 24, 26) |
283 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
284 __gen_field(values->DwordLength, 0, 7) |
285 0;
286
287 uint32_t dw1 =
288 0;
289
290 uint64_t qw1 =
291 __gen_combine_address(data, &dw[1], values->GPGPUCSRBaseAddressHigh, dw1);
292
293 dw[1] = qw1;
294 dw[2] = qw1 >> 32;
295
296 }
297
298 #define GEN8_MI_ATOMIC_length 0x00000003
299 #define GEN8_MI_ATOMIC_length_bias 0x00000002
300 #define GEN8_MI_ATOMIC_header \
301 .CommandType = 0, \
302 .MICommandOpcode = 47
303
304 struct GEN8_MI_ATOMIC {
305 uint32_t CommandType;
306 uint32_t MICommandOpcode;
307 #define PerProcessGraphicsAddress 0
308 #define GlobalGraphicsAddress 1
309 uint32_t MemoryType;
310 uint32_t PostSyncOperation;
311 #define DWORD 0
312 #define QWORD 1
313 #define OCTWORD 2
314 #define RESERVED 3
315 uint32_t DataSize;
316 uint32_t InlineData;
317 uint32_t CSSTALL;
318 uint32_t ReturnDataControl;
319 uint32_t ATOMICOPCODE;
320 uint32_t DwordLength;
321 __gen_address_type MemoryAddress;
322 uint32_t MemoryAddressHigh;
323 uint32_t Operand1DataDword0;
324 uint32_t Operand2DataDword0;
325 uint32_t Operand1DataDword1;
326 uint32_t Operand2DataDword1;
327 uint32_t Operand1DataDword2;
328 uint32_t Operand2DataDword2;
329 uint32_t Operand1DataDword3;
330 uint32_t Operand2DataDword3;
331 };
332
333 static inline void
334 GEN8_MI_ATOMIC_pack(__gen_user_data *data, void * restrict dst,
335 const struct GEN8_MI_ATOMIC * restrict values)
336 {
337 uint32_t *dw = (uint32_t * restrict) dst;
338
339 dw[0] =
340 __gen_field(values->CommandType, 29, 31) |
341 __gen_field(values->MICommandOpcode, 23, 28) |
342 __gen_field(values->MemoryType, 22, 22) |
343 __gen_field(values->PostSyncOperation, 21, 21) |
344 __gen_field(values->DataSize, 19, 20) |
345 __gen_field(values->InlineData, 18, 18) |
346 __gen_field(values->CSSTALL, 17, 17) |
347 __gen_field(values->ReturnDataControl, 16, 16) |
348 __gen_field(values->ATOMICOPCODE, 8, 15) |
349 __gen_field(values->DwordLength, 0, 7) |
350 0;
351
352 uint32_t dw1 =
353 0;
354
355 dw[1] =
356 __gen_combine_address(data, &dw[1], values->MemoryAddress, dw1);
357
358 dw[2] =
359 __gen_field(values->MemoryAddressHigh, 0, 15) |
360 0;
361
362 dw[3] =
363 __gen_field(values->Operand1DataDword0, 0, 31) |
364 0;
365
366 dw[4] =
367 __gen_field(values->Operand2DataDword0, 0, 31) |
368 0;
369
370 dw[5] =
371 __gen_field(values->Operand1DataDword1, 0, 31) |
372 0;
373
374 dw[6] =
375 __gen_field(values->Operand2DataDword1, 0, 31) |
376 0;
377
378 dw[7] =
379 __gen_field(values->Operand1DataDword2, 0, 31) |
380 0;
381
382 dw[8] =
383 __gen_field(values->Operand2DataDword2, 0, 31) |
384 0;
385
386 dw[9] =
387 __gen_field(values->Operand1DataDword3, 0, 31) |
388 0;
389
390 dw[10] =
391 __gen_field(values->Operand2DataDword3, 0, 31) |
392 0;
393
394 }
395
396 #define GEN8_MI_LOAD_REGISTER_REG_length 0x00000003
397 #define GEN8_MI_LOAD_REGISTER_REG_length_bias 0x00000002
398 #define GEN8_MI_LOAD_REGISTER_REG_header \
399 .CommandType = 0, \
400 .MICommandOpcode = 42, \
401 .DwordLength = 1
402
403 struct GEN8_MI_LOAD_REGISTER_REG {
404 uint32_t CommandType;
405 uint32_t MICommandOpcode;
406 uint32_t DwordLength;
407 uint32_t SourceRegisterAddress;
408 uint32_t DestinationRegisterAddress;
409 };
410
411 static inline void
412 GEN8_MI_LOAD_REGISTER_REG_pack(__gen_user_data *data, void * restrict dst,
413 const struct GEN8_MI_LOAD_REGISTER_REG * restrict values)
414 {
415 uint32_t *dw = (uint32_t * restrict) dst;
416
417 dw[0] =
418 __gen_field(values->CommandType, 29, 31) |
419 __gen_field(values->MICommandOpcode, 23, 28) |
420 __gen_field(values->DwordLength, 0, 7) |
421 0;
422
423 dw[1] =
424 __gen_offset(values->SourceRegisterAddress, 2, 22) |
425 0;
426
427 dw[2] =
428 __gen_offset(values->DestinationRegisterAddress, 2, 22) |
429 0;
430
431 }
432
433 #define GEN8_MI_SEMAPHORE_SIGNAL_length 0x00000002
434 #define GEN8_MI_SEMAPHORE_SIGNAL_length_bias 0x00000002
435 #define GEN8_MI_SEMAPHORE_SIGNAL_header \
436 .CommandType = 0, \
437 .MICommandOpcode = 27, \
438 .DwordLength = 0
439
440 struct GEN8_MI_SEMAPHORE_SIGNAL {
441 uint32_t CommandType;
442 uint32_t MICommandOpcode;
443 uint32_t PostSyncOperation;
444 #define RCS 0
445 #define VCS0 1
446 #define BCS 2
447 #define VECS 3
448 #define VCS1 4
449 uint32_t TargetEngineSelect;
450 uint32_t DwordLength;
451 uint32_t TargetContextID;
452 };
453
454 static inline void
455 GEN8_MI_SEMAPHORE_SIGNAL_pack(__gen_user_data *data, void * restrict dst,
456 const struct GEN8_MI_SEMAPHORE_SIGNAL * restrict values)
457 {
458 uint32_t *dw = (uint32_t * restrict) dst;
459
460 dw[0] =
461 __gen_field(values->CommandType, 29, 31) |
462 __gen_field(values->MICommandOpcode, 23, 28) |
463 __gen_field(values->PostSyncOperation, 21, 21) |
464 __gen_field(values->TargetEngineSelect, 15, 17) |
465 __gen_field(values->DwordLength, 0, 7) |
466 0;
467
468 dw[1] =
469 __gen_field(values->TargetContextID, 0, 31) |
470 0;
471
472 }
473
474 #define GEN8_MI_SEMAPHORE_WAIT_length 0x00000004
475 #define GEN8_MI_SEMAPHORE_WAIT_length_bias 0x00000002
476 #define GEN8_MI_SEMAPHORE_WAIT_header \
477 .CommandType = 0, \
478 .MICommandOpcode = 28, \
479 .DwordLength = 2
480
481 struct GEN8_MI_SEMAPHORE_WAIT {
482 uint32_t CommandType;
483 uint32_t MICommandOpcode;
484 #define PerProcessGraphicsAddress 0
485 #define GlobalGraphicsAddress 1
486 uint32_t MemoryType;
487 #define PollingMode 1
488 #define SignalMode 0
489 uint32_t WaitMode;
490 #define SAD_GREATER_THAN_SDD 0
491 #define SAD_GREATER_THAN_OR_EQUAL_SDD 1
492 #define SAD_LESS_THAN_SDD 2
493 #define SAD_LESS_THAN_OR_EQUAL_SDD 3
494 #define SAD_EQUAL_SDD 4
495 #define SAD_NOT_EQUAL_SDD 5
496 uint32_t CompareOperation;
497 uint32_t DwordLength;
498 uint32_t SemaphoreDataDword;
499 __gen_address_type SemaphoreAddress;
500 };
501
502 static inline void
503 GEN8_MI_SEMAPHORE_WAIT_pack(__gen_user_data *data, void * restrict dst,
504 const struct GEN8_MI_SEMAPHORE_WAIT * restrict values)
505 {
506 uint32_t *dw = (uint32_t * restrict) dst;
507
508 dw[0] =
509 __gen_field(values->CommandType, 29, 31) |
510 __gen_field(values->MICommandOpcode, 23, 28) |
511 __gen_field(values->MemoryType, 22, 22) |
512 __gen_field(values->WaitMode, 15, 15) |
513 __gen_field(values->CompareOperation, 12, 14) |
514 __gen_field(values->DwordLength, 0, 7) |
515 0;
516
517 dw[1] =
518 __gen_field(values->SemaphoreDataDword, 0, 31) |
519 0;
520
521 uint32_t dw2 =
522 0;
523
524 uint64_t qw2 =
525 __gen_combine_address(data, &dw[2], values->SemaphoreAddress, dw2);
526
527 dw[2] = qw2;
528 dw[3] = qw2 >> 32;
529
530 }
531
532 #define GEN8_MI_STORE_REGISTER_MEM_length 0x00000004
533 #define GEN8_MI_STORE_REGISTER_MEM_length_bias 0x00000002
534 #define GEN8_MI_STORE_REGISTER_MEM_header \
535 .CommandType = 0, \
536 .MICommandOpcode = 36, \
537 .DwordLength = 2
538
539 struct GEN8_MI_STORE_REGISTER_MEM {
540 uint32_t CommandType;
541 uint32_t MICommandOpcode;
542 uint32_t UseGlobalGTT;
543 uint32_t PredicateEnable;
544 uint32_t DwordLength;
545 uint32_t RegisterAddress;
546 __gen_address_type MemoryAddress;
547 };
548
549 static inline void
550 GEN8_MI_STORE_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
551 const struct GEN8_MI_STORE_REGISTER_MEM * restrict values)
552 {
553 uint32_t *dw = (uint32_t * restrict) dst;
554
555 dw[0] =
556 __gen_field(values->CommandType, 29, 31) |
557 __gen_field(values->MICommandOpcode, 23, 28) |
558 __gen_field(values->UseGlobalGTT, 22, 22) |
559 __gen_field(values->PredicateEnable, 21, 21) |
560 __gen_field(values->DwordLength, 0, 7) |
561 0;
562
563 dw[1] =
564 __gen_offset(values->RegisterAddress, 2, 22) |
565 0;
566
567 uint32_t dw2 =
568 0;
569
570 uint64_t qw2 =
571 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
572
573 dw[2] = qw2;
574 dw[3] = qw2 >> 32;
575
576 }
577
578 #define GEN8_PIPELINE_SELECT_length 0x00000001
579 #define GEN8_PIPELINE_SELECT_length_bias 0x00000001
580 #define GEN8_PIPELINE_SELECT_header \
581 .CommandType = 3, \
582 .CommandSubType = 1, \
583 ._3DCommandOpcode = 1, \
584 ._3DCommandSubOpcode = 4
585
586 struct GEN8_PIPELINE_SELECT {
587 uint32_t CommandType;
588 uint32_t CommandSubType;
589 uint32_t _3DCommandOpcode;
590 uint32_t _3DCommandSubOpcode;
591 #define _3D 0
592 #define Media 1
593 #define GPGPU 2
594 uint32_t PipelineSelection;
595 };
596
597 static inline void
598 GEN8_PIPELINE_SELECT_pack(__gen_user_data *data, void * restrict dst,
599 const struct GEN8_PIPELINE_SELECT * restrict values)
600 {
601 uint32_t *dw = (uint32_t * restrict) dst;
602
603 dw[0] =
604 __gen_field(values->CommandType, 29, 31) |
605 __gen_field(values->CommandSubType, 27, 28) |
606 __gen_field(values->_3DCommandOpcode, 24, 26) |
607 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
608 __gen_field(values->PipelineSelection, 0, 1) |
609 0;
610
611 }
612
613 #define GEN8_STATE_BASE_ADDRESS_length 0x00000010
614 #define GEN8_STATE_BASE_ADDRESS_length_bias 0x00000002
615 #define GEN8_STATE_BASE_ADDRESS_header \
616 .CommandType = 3, \
617 .CommandSubType = 0, \
618 ._3DCommandOpcode = 1, \
619 ._3DCommandSubOpcode = 1, \
620 .DwordLength = 14
621
622 struct GEN8_MEMORY_OBJECT_CONTROL_STATE {
623 #define UCwithFenceifcoherentcycle 0
624 #define UCUncacheable 1
625 #define WT 2
626 #define WB 3
627 uint32_t MemoryTypeLLCeLLCCacheabilityControl;
628 #define eLLCOnlywheneDRAMispresentelsegetsallocatedinLLC 0
629 #define LLCOnly 1
630 #define LLCeLLCAllowed 2
631 #define L3DefertoPATforLLCeLLCselection 3
632 uint32_t TargetCache;
633 uint32_t AgeforQUADLRU;
634 };
635
636 static inline void
637 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(__gen_user_data *data, void * restrict dst,
638 const struct GEN8_MEMORY_OBJECT_CONTROL_STATE * restrict values)
639 {
640 uint32_t *dw = (uint32_t * restrict) dst;
641
642 dw[0] =
643 __gen_field(values->MemoryTypeLLCeLLCCacheabilityControl, 5, 6) |
644 __gen_field(values->TargetCache, 3, 4) |
645 __gen_field(values->AgeforQUADLRU, 0, 1) |
646 0;
647
648 }
649
650 struct GEN8_STATE_BASE_ADDRESS {
651 uint32_t CommandType;
652 uint32_t CommandSubType;
653 uint32_t _3DCommandOpcode;
654 uint32_t _3DCommandSubOpcode;
655 uint32_t DwordLength;
656 __gen_address_type GeneralStateBaseAddress;
657 struct GEN8_MEMORY_OBJECT_CONTROL_STATE GeneralStateMemoryObjectControlState;
658 uint32_t GeneralStateBaseAddressModifyEnable;
659 struct GEN8_MEMORY_OBJECT_CONTROL_STATE StatelessDataPortAccessMemoryObjectControlState;
660 __gen_address_type SurfaceStateBaseAddress;
661 struct GEN8_MEMORY_OBJECT_CONTROL_STATE SurfaceStateMemoryObjectControlState;
662 uint32_t SurfaceStateBaseAddressModifyEnable;
663 __gen_address_type DynamicStateBaseAddress;
664 struct GEN8_MEMORY_OBJECT_CONTROL_STATE DynamicStateMemoryObjectControlState;
665 uint32_t DynamicStateBaseAddressModifyEnable;
666 __gen_address_type IndirectObjectBaseAddress;
667 struct GEN8_MEMORY_OBJECT_CONTROL_STATE IndirectObjectMemoryObjectControlState;
668 uint32_t IndirectObjectBaseAddressModifyEnable;
669 __gen_address_type InstructionBaseAddress;
670 struct GEN8_MEMORY_OBJECT_CONTROL_STATE InstructionMemoryObjectControlState;
671 uint32_t InstructionBaseAddressModifyEnable;
672 uint32_t GeneralStateBufferSize;
673 uint32_t GeneralStateBufferSizeModifyEnable;
674 uint32_t DynamicStateBufferSize;
675 uint32_t DynamicStateBufferSizeModifyEnable;
676 uint32_t IndirectObjectBufferSize;
677 uint32_t IndirectObjectBufferSizeModifyEnable;
678 uint32_t InstructionBufferSize;
679 uint32_t InstructionBuffersizeModifyEnable;
680 };
681
682 static inline void
683 GEN8_STATE_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
684 const struct GEN8_STATE_BASE_ADDRESS * restrict values)
685 {
686 uint32_t *dw = (uint32_t * restrict) dst;
687
688 dw[0] =
689 __gen_field(values->CommandType, 29, 31) |
690 __gen_field(values->CommandSubType, 27, 28) |
691 __gen_field(values->_3DCommandOpcode, 24, 26) |
692 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
693 __gen_field(values->DwordLength, 0, 7) |
694 0;
695
696 uint32_t dw_GeneralStateMemoryObjectControlState;
697 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_GeneralStateMemoryObjectControlState, &values->GeneralStateMemoryObjectControlState);
698 uint32_t dw1 =
699 __gen_field(dw_GeneralStateMemoryObjectControlState, 4, 10) |
700 __gen_field(values->GeneralStateBaseAddressModifyEnable, 0, 0) |
701 0;
702
703 uint64_t qw1 =
704 __gen_combine_address(data, &dw[1], values->GeneralStateBaseAddress, dw1);
705
706 dw[1] = qw1;
707 dw[2] = qw1 >> 32;
708
709 uint32_t dw_StatelessDataPortAccessMemoryObjectControlState;
710 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StatelessDataPortAccessMemoryObjectControlState, &values->StatelessDataPortAccessMemoryObjectControlState);
711 dw[3] =
712 __gen_field(dw_StatelessDataPortAccessMemoryObjectControlState, 16, 22) |
713 0;
714
715 uint32_t dw_SurfaceStateMemoryObjectControlState;
716 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceStateMemoryObjectControlState, &values->SurfaceStateMemoryObjectControlState);
717 uint32_t dw4 =
718 __gen_field(dw_SurfaceStateMemoryObjectControlState, 4, 10) |
719 __gen_field(values->SurfaceStateBaseAddressModifyEnable, 0, 0) |
720 0;
721
722 uint64_t qw4 =
723 __gen_combine_address(data, &dw[4], values->SurfaceStateBaseAddress, dw4);
724
725 dw[4] = qw4;
726 dw[5] = qw4 >> 32;
727
728 uint32_t dw_DynamicStateMemoryObjectControlState;
729 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DynamicStateMemoryObjectControlState, &values->DynamicStateMemoryObjectControlState);
730 uint32_t dw6 =
731 __gen_field(dw_DynamicStateMemoryObjectControlState, 4, 10) |
732 __gen_field(values->DynamicStateBaseAddressModifyEnable, 0, 0) |
733 0;
734
735 uint64_t qw6 =
736 __gen_combine_address(data, &dw[6], values->DynamicStateBaseAddress, dw6);
737
738 dw[6] = qw6;
739 dw[7] = qw6 >> 32;
740
741 uint32_t dw_IndirectObjectMemoryObjectControlState;
742 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_IndirectObjectMemoryObjectControlState, &values->IndirectObjectMemoryObjectControlState);
743 uint32_t dw8 =
744 __gen_field(dw_IndirectObjectMemoryObjectControlState, 4, 10) |
745 __gen_field(values->IndirectObjectBaseAddressModifyEnable, 0, 0) |
746 0;
747
748 uint64_t qw8 =
749 __gen_combine_address(data, &dw[8], values->IndirectObjectBaseAddress, dw8);
750
751 dw[8] = qw8;
752 dw[9] = qw8 >> 32;
753
754 uint32_t dw_InstructionMemoryObjectControlState;
755 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_InstructionMemoryObjectControlState, &values->InstructionMemoryObjectControlState);
756 uint32_t dw10 =
757 __gen_field(dw_InstructionMemoryObjectControlState, 4, 10) |
758 __gen_field(values->InstructionBaseAddressModifyEnable, 0, 0) |
759 0;
760
761 uint64_t qw10 =
762 __gen_combine_address(data, &dw[10], values->InstructionBaseAddress, dw10);
763
764 dw[10] = qw10;
765 dw[11] = qw10 >> 32;
766
767 dw[12] =
768 __gen_field(values->GeneralStateBufferSize, 12, 31) |
769 __gen_field(values->GeneralStateBufferSizeModifyEnable, 0, 0) |
770 0;
771
772 dw[13] =
773 __gen_field(values->DynamicStateBufferSize, 12, 31) |
774 __gen_field(values->DynamicStateBufferSizeModifyEnable, 0, 0) |
775 0;
776
777 dw[14] =
778 __gen_field(values->IndirectObjectBufferSize, 12, 31) |
779 __gen_field(values->IndirectObjectBufferSizeModifyEnable, 0, 0) |
780 0;
781
782 dw[15] =
783 __gen_field(values->InstructionBufferSize, 12, 31) |
784 __gen_field(values->InstructionBuffersizeModifyEnable, 0, 0) |
785 0;
786
787 }
788
789 #define GEN8_STATE_PREFETCH_length 0x00000002
790 #define GEN8_STATE_PREFETCH_length_bias 0x00000002
791 #define GEN8_STATE_PREFETCH_header \
792 .CommandType = 3, \
793 .CommandSubType = 0, \
794 ._3DCommandOpcode = 0, \
795 ._3DCommandSubOpcode = 3, \
796 .DwordLength = 0
797
798 struct GEN8_STATE_PREFETCH {
799 uint32_t CommandType;
800 uint32_t CommandSubType;
801 uint32_t _3DCommandOpcode;
802 uint32_t _3DCommandSubOpcode;
803 uint32_t DwordLength;
804 __gen_address_type PrefetchPointer;
805 uint32_t PrefetchCount;
806 };
807
808 static inline void
809 GEN8_STATE_PREFETCH_pack(__gen_user_data *data, void * restrict dst,
810 const struct GEN8_STATE_PREFETCH * restrict values)
811 {
812 uint32_t *dw = (uint32_t * restrict) dst;
813
814 dw[0] =
815 __gen_field(values->CommandType, 29, 31) |
816 __gen_field(values->CommandSubType, 27, 28) |
817 __gen_field(values->_3DCommandOpcode, 24, 26) |
818 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
819 __gen_field(values->DwordLength, 0, 7) |
820 0;
821
822 uint32_t dw1 =
823 __gen_field(values->PrefetchCount, 0, 2) |
824 0;
825
826 dw[1] =
827 __gen_combine_address(data, &dw[1], values->PrefetchPointer, dw1);
828
829 }
830
831 #define GEN8_STATE_SIP_length 0x00000003
832 #define GEN8_STATE_SIP_length_bias 0x00000002
833 #define GEN8_STATE_SIP_header \
834 .CommandType = 3, \
835 .CommandSubType = 0, \
836 ._3DCommandOpcode = 1, \
837 ._3DCommandSubOpcode = 2, \
838 .DwordLength = 1
839
840 struct GEN8_STATE_SIP {
841 uint32_t CommandType;
842 uint32_t CommandSubType;
843 uint32_t _3DCommandOpcode;
844 uint32_t _3DCommandSubOpcode;
845 uint32_t DwordLength;
846 uint64_t SystemInstructionPointer;
847 };
848
849 static inline void
850 GEN8_STATE_SIP_pack(__gen_user_data *data, void * restrict dst,
851 const struct GEN8_STATE_SIP * restrict values)
852 {
853 uint32_t *dw = (uint32_t * restrict) dst;
854
855 dw[0] =
856 __gen_field(values->CommandType, 29, 31) |
857 __gen_field(values->CommandSubType, 27, 28) |
858 __gen_field(values->_3DCommandOpcode, 24, 26) |
859 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
860 __gen_field(values->DwordLength, 0, 7) |
861 0;
862
863 uint64_t qw1 =
864 __gen_offset(values->SystemInstructionPointer, 4, 63) |
865 0;
866
867 dw[1] = qw1;
868 dw[2] = qw1 >> 32;
869
870 }
871
872 #define GEN8_SWTESS_BASE_ADDRESS_length 0x00000002
873 #define GEN8_SWTESS_BASE_ADDRESS_length_bias 0x00000002
874 #define GEN8_SWTESS_BASE_ADDRESS_header \
875 .CommandType = 3, \
876 .CommandSubType = 0, \
877 ._3DCommandOpcode = 1, \
878 ._3DCommandSubOpcode = 3, \
879 .DwordLength = 0
880
881 struct GEN8_SWTESS_BASE_ADDRESS {
882 uint32_t CommandType;
883 uint32_t CommandSubType;
884 uint32_t _3DCommandOpcode;
885 uint32_t _3DCommandSubOpcode;
886 uint32_t DwordLength;
887 __gen_address_type SWTessellationBaseAddress;
888 struct GEN8_MEMORY_OBJECT_CONTROL_STATE SWTessellationMemoryObjectControlState;
889 __gen_address_type SWTessellationBaseAddressHigh;
890 };
891
892 static inline void
893 GEN8_SWTESS_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
894 const struct GEN8_SWTESS_BASE_ADDRESS * restrict values)
895 {
896 uint32_t *dw = (uint32_t * restrict) dst;
897
898 dw[0] =
899 __gen_field(values->CommandType, 29, 31) |
900 __gen_field(values->CommandSubType, 27, 28) |
901 __gen_field(values->_3DCommandOpcode, 24, 26) |
902 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
903 __gen_field(values->DwordLength, 0, 7) |
904 0;
905
906 uint32_t dw_SWTessellationMemoryObjectControlState;
907 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SWTessellationMemoryObjectControlState, &values->SWTessellationMemoryObjectControlState);
908 uint32_t dw1 =
909 __gen_field(dw_SWTessellationMemoryObjectControlState, 8, 11) |
910 0;
911
912 dw[1] =
913 __gen_combine_address(data, &dw[1], values->SWTessellationBaseAddress, dw1);
914
915 uint32_t dw2 =
916 0;
917
918 dw[2] =
919 __gen_combine_address(data, &dw[2], values->SWTessellationBaseAddressHigh, dw2);
920
921 }
922
923 #define GEN8_3DPRIMITIVE_length 0x00000007
924 #define GEN8_3DPRIMITIVE_length_bias 0x00000002
925 #define GEN8_3DPRIMITIVE_header \
926 .CommandType = 3, \
927 .CommandSubType = 3, \
928 ._3DCommandOpcode = 3, \
929 ._3DCommandSubOpcode = 0, \
930 .DwordLength = 5
931
932 struct GEN8_3DPRIMITIVE {
933 uint32_t CommandType;
934 uint32_t CommandSubType;
935 uint32_t _3DCommandOpcode;
936 uint32_t _3DCommandSubOpcode;
937 uint32_t IndirectParameterEnable;
938 uint32_t UAVCoherencyRequired;
939 uint32_t PredicateEnable;
940 uint32_t DwordLength;
941 uint32_t EndOffsetEnable;
942 #define SEQUENTIAL 0
943 #define RANDOM 1
944 uint32_t VertexAccessType;
945 uint32_t PrimitiveTopologyType;
946 uint32_t VertexCountPerInstance;
947 uint32_t StartVertexLocation;
948 uint32_t InstanceCount;
949 uint32_t StartInstanceLocation;
950 uint32_t BaseVertexLocation;
951 };
952
953 static inline void
954 GEN8_3DPRIMITIVE_pack(__gen_user_data *data, void * restrict dst,
955 const struct GEN8_3DPRIMITIVE * restrict values)
956 {
957 uint32_t *dw = (uint32_t * restrict) dst;
958
959 dw[0] =
960 __gen_field(values->CommandType, 29, 31) |
961 __gen_field(values->CommandSubType, 27, 28) |
962 __gen_field(values->_3DCommandOpcode, 24, 26) |
963 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
964 __gen_field(values->IndirectParameterEnable, 10, 10) |
965 __gen_field(values->UAVCoherencyRequired, 9, 9) |
966 __gen_field(values->PredicateEnable, 8, 8) |
967 __gen_field(values->DwordLength, 0, 7) |
968 0;
969
970 dw[1] =
971 __gen_field(values->EndOffsetEnable, 9, 9) |
972 __gen_field(values->VertexAccessType, 8, 8) |
973 __gen_field(values->PrimitiveTopologyType, 0, 5) |
974 0;
975
976 dw[2] =
977 __gen_field(values->VertexCountPerInstance, 0, 31) |
978 0;
979
980 dw[3] =
981 __gen_field(values->StartVertexLocation, 0, 31) |
982 0;
983
984 dw[4] =
985 __gen_field(values->InstanceCount, 0, 31) |
986 0;
987
988 dw[5] =
989 __gen_field(values->StartInstanceLocation, 0, 31) |
990 0;
991
992 dw[6] =
993 __gen_field(values->BaseVertexLocation, 0, 31) |
994 0;
995
996 }
997
998 #define GEN8_3DSTATE_AA_LINE_PARAMETERS_length 0x00000003
999 #define GEN8_3DSTATE_AA_LINE_PARAMETERS_length_bias 0x00000002
1000 #define GEN8_3DSTATE_AA_LINE_PARAMETERS_header \
1001 .CommandType = 3, \
1002 .CommandSubType = 3, \
1003 ._3DCommandOpcode = 1, \
1004 ._3DCommandSubOpcode = 10, \
1005 .DwordLength = 1
1006
1007 struct GEN8_3DSTATE_AA_LINE_PARAMETERS {
1008 uint32_t CommandType;
1009 uint32_t CommandSubType;
1010 uint32_t _3DCommandOpcode;
1011 uint32_t _3DCommandSubOpcode;
1012 uint32_t DwordLength;
1013 float AAPointCoverageBias;
1014 float AACoverageBias;
1015 float AAPointCoverageSlope;
1016 float AACoverageSlope;
1017 float AAPointCoverageEndCapBias;
1018 float AACoverageEndCapBias;
1019 float AAPointCoverageEndCapSlope;
1020 float AACoverageEndCapSlope;
1021 };
1022
1023 static inline void
1024 GEN8_3DSTATE_AA_LINE_PARAMETERS_pack(__gen_user_data *data, void * restrict dst,
1025 const struct GEN8_3DSTATE_AA_LINE_PARAMETERS * restrict values)
1026 {
1027 uint32_t *dw = (uint32_t * restrict) dst;
1028
1029 dw[0] =
1030 __gen_field(values->CommandType, 29, 31) |
1031 __gen_field(values->CommandSubType, 27, 28) |
1032 __gen_field(values->_3DCommandOpcode, 24, 26) |
1033 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1034 __gen_field(values->DwordLength, 0, 7) |
1035 0;
1036
1037 dw[1] =
1038 __gen_field(values->AAPointCoverageBias * (1 << 8), 24, 31) |
1039 __gen_field(values->AACoverageBias * (1 << 8), 16, 23) |
1040 __gen_field(values->AAPointCoverageSlope * (1 << 8), 8, 15) |
1041 __gen_field(values->AACoverageSlope * (1 << 8), 0, 7) |
1042 0;
1043
1044 dw[2] =
1045 __gen_field(values->AAPointCoverageEndCapBias * (1 << 8), 24, 31) |
1046 __gen_field(values->AACoverageEndCapBias * (1 << 8), 16, 23) |
1047 __gen_field(values->AAPointCoverageEndCapSlope * (1 << 8), 8, 15) |
1048 __gen_field(values->AACoverageEndCapSlope * (1 << 8), 0, 7) |
1049 0;
1050
1051 }
1052
1053 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_length_bias 0x00000002
1054 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_header\
1055 .CommandType = 3, \
1056 .CommandSubType = 3, \
1057 ._3DCommandOpcode = 0, \
1058 ._3DCommandSubOpcode = 70
1059
1060 struct GEN8_BINDING_TABLE_EDIT_ENTRY {
1061 uint32_t BindingTableIndex;
1062 uint32_t SurfaceStatePointer;
1063 };
1064
1065 static inline void
1066 GEN8_BINDING_TABLE_EDIT_ENTRY_pack(__gen_user_data *data, void * restrict dst,
1067 const struct GEN8_BINDING_TABLE_EDIT_ENTRY * restrict values)
1068 {
1069 uint32_t *dw = (uint32_t * restrict) dst;
1070
1071 dw[0] =
1072 __gen_field(values->BindingTableIndex, 16, 23) |
1073 __gen_offset(values->SurfaceStatePointer, 0, 15) |
1074 0;
1075
1076 }
1077
1078 struct GEN8_3DSTATE_BINDING_TABLE_EDIT_DS {
1079 uint32_t CommandType;
1080 uint32_t CommandSubType;
1081 uint32_t _3DCommandOpcode;
1082 uint32_t _3DCommandSubOpcode;
1083 uint32_t DwordLength;
1084 uint32_t BindingTableBlockClear;
1085 #define AllCores 3
1086 #define Core1 2
1087 #define Core0 1
1088 uint32_t BindingTableEditTarget;
1089 /* variable length fields follow */
1090 };
1091
1092 static inline void
1093 GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_pack(__gen_user_data *data, void * restrict dst,
1094 const struct GEN8_3DSTATE_BINDING_TABLE_EDIT_DS * restrict values)
1095 {
1096 uint32_t *dw = (uint32_t * restrict) dst;
1097
1098 dw[0] =
1099 __gen_field(values->CommandType, 29, 31) |
1100 __gen_field(values->CommandSubType, 27, 28) |
1101 __gen_field(values->_3DCommandOpcode, 24, 26) |
1102 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1103 __gen_field(values->DwordLength, 0, 8) |
1104 0;
1105
1106 dw[1] =
1107 __gen_field(values->BindingTableBlockClear, 16, 31) |
1108 __gen_field(values->BindingTableEditTarget, 0, 1) |
1109 0;
1110
1111 /* variable length fields follow */
1112 }
1113
1114 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_length_bias 0x00000002
1115 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_header\
1116 .CommandType = 3, \
1117 .CommandSubType = 3, \
1118 ._3DCommandOpcode = 0, \
1119 ._3DCommandSubOpcode = 68
1120
1121 struct GEN8_3DSTATE_BINDING_TABLE_EDIT_GS {
1122 uint32_t CommandType;
1123 uint32_t CommandSubType;
1124 uint32_t _3DCommandOpcode;
1125 uint32_t _3DCommandSubOpcode;
1126 uint32_t DwordLength;
1127 uint32_t BindingTableBlockClear;
1128 #define AllCores 3
1129 #define Core1 2
1130 #define Core0 1
1131 uint32_t BindingTableEditTarget;
1132 /* variable length fields follow */
1133 };
1134
1135 static inline void
1136 GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_pack(__gen_user_data *data, void * restrict dst,
1137 const struct GEN8_3DSTATE_BINDING_TABLE_EDIT_GS * restrict values)
1138 {
1139 uint32_t *dw = (uint32_t * restrict) dst;
1140
1141 dw[0] =
1142 __gen_field(values->CommandType, 29, 31) |
1143 __gen_field(values->CommandSubType, 27, 28) |
1144 __gen_field(values->_3DCommandOpcode, 24, 26) |
1145 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1146 __gen_field(values->DwordLength, 0, 8) |
1147 0;
1148
1149 dw[1] =
1150 __gen_field(values->BindingTableBlockClear, 16, 31) |
1151 __gen_field(values->BindingTableEditTarget, 0, 1) |
1152 0;
1153
1154 /* variable length fields follow */
1155 }
1156
1157 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_length_bias 0x00000002
1158 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_header\
1159 .CommandType = 3, \
1160 .CommandSubType = 3, \
1161 ._3DCommandOpcode = 0, \
1162 ._3DCommandSubOpcode = 69
1163
1164 struct GEN8_3DSTATE_BINDING_TABLE_EDIT_HS {
1165 uint32_t CommandType;
1166 uint32_t CommandSubType;
1167 uint32_t _3DCommandOpcode;
1168 uint32_t _3DCommandSubOpcode;
1169 uint32_t DwordLength;
1170 uint32_t BindingTableBlockClear;
1171 #define AllCores 3
1172 #define Core1 2
1173 #define Core0 1
1174 uint32_t BindingTableEditTarget;
1175 /* variable length fields follow */
1176 };
1177
1178 static inline void
1179 GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_pack(__gen_user_data *data, void * restrict dst,
1180 const struct GEN8_3DSTATE_BINDING_TABLE_EDIT_HS * restrict values)
1181 {
1182 uint32_t *dw = (uint32_t * restrict) dst;
1183
1184 dw[0] =
1185 __gen_field(values->CommandType, 29, 31) |
1186 __gen_field(values->CommandSubType, 27, 28) |
1187 __gen_field(values->_3DCommandOpcode, 24, 26) |
1188 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1189 __gen_field(values->DwordLength, 0, 8) |
1190 0;
1191
1192 dw[1] =
1193 __gen_field(values->BindingTableBlockClear, 16, 31) |
1194 __gen_field(values->BindingTableEditTarget, 0, 1) |
1195 0;
1196
1197 /* variable length fields follow */
1198 }
1199
1200 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_length_bias 0x00000002
1201 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_header\
1202 .CommandType = 3, \
1203 .CommandSubType = 3, \
1204 ._3DCommandOpcode = 0, \
1205 ._3DCommandSubOpcode = 71
1206
1207 struct GEN8_3DSTATE_BINDING_TABLE_EDIT_PS {
1208 uint32_t CommandType;
1209 uint32_t CommandSubType;
1210 uint32_t _3DCommandOpcode;
1211 uint32_t _3DCommandSubOpcode;
1212 uint32_t DwordLength;
1213 uint32_t BindingTableBlockClear;
1214 #define AllCores 3
1215 #define Core1 2
1216 #define Core0 1
1217 uint32_t BindingTableEditTarget;
1218 /* variable length fields follow */
1219 };
1220
1221 static inline void
1222 GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_pack(__gen_user_data *data, void * restrict dst,
1223 const struct GEN8_3DSTATE_BINDING_TABLE_EDIT_PS * restrict values)
1224 {
1225 uint32_t *dw = (uint32_t * restrict) dst;
1226
1227 dw[0] =
1228 __gen_field(values->CommandType, 29, 31) |
1229 __gen_field(values->CommandSubType, 27, 28) |
1230 __gen_field(values->_3DCommandOpcode, 24, 26) |
1231 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1232 __gen_field(values->DwordLength, 0, 8) |
1233 0;
1234
1235 dw[1] =
1236 __gen_field(values->BindingTableBlockClear, 16, 31) |
1237 __gen_field(values->BindingTableEditTarget, 0, 1) |
1238 0;
1239
1240 /* variable length fields follow */
1241 }
1242
1243 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_length_bias 0x00000002
1244 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_header\
1245 .CommandType = 3, \
1246 .CommandSubType = 3, \
1247 ._3DCommandOpcode = 0, \
1248 ._3DCommandSubOpcode = 67
1249
1250 struct GEN8_3DSTATE_BINDING_TABLE_EDIT_VS {
1251 uint32_t CommandType;
1252 uint32_t CommandSubType;
1253 uint32_t _3DCommandOpcode;
1254 uint32_t _3DCommandSubOpcode;
1255 uint32_t DwordLength;
1256 uint32_t BindingTableBlockClear;
1257 #define AllCores 3
1258 #define Core1 2
1259 #define Core0 1
1260 uint32_t BindingTableEditTarget;
1261 /* variable length fields follow */
1262 };
1263
1264 static inline void
1265 GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_pack(__gen_user_data *data, void * restrict dst,
1266 const struct GEN8_3DSTATE_BINDING_TABLE_EDIT_VS * restrict values)
1267 {
1268 uint32_t *dw = (uint32_t * restrict) dst;
1269
1270 dw[0] =
1271 __gen_field(values->CommandType, 29, 31) |
1272 __gen_field(values->CommandSubType, 27, 28) |
1273 __gen_field(values->_3DCommandOpcode, 24, 26) |
1274 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1275 __gen_field(values->DwordLength, 0, 8) |
1276 0;
1277
1278 dw[1] =
1279 __gen_field(values->BindingTableBlockClear, 16, 31) |
1280 __gen_field(values->BindingTableEditTarget, 0, 1) |
1281 0;
1282
1283 /* variable length fields follow */
1284 }
1285
1286 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_length 0x00000002
1287 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_length_bias 0x00000002
1288 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_header\
1289 .CommandType = 3, \
1290 .CommandSubType = 3, \
1291 ._3DCommandOpcode = 0, \
1292 ._3DCommandSubOpcode = 40, \
1293 .DwordLength = 0
1294
1295 struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS {
1296 uint32_t CommandType;
1297 uint32_t CommandSubType;
1298 uint32_t _3DCommandOpcode;
1299 uint32_t _3DCommandSubOpcode;
1300 uint32_t DwordLength;
1301 uint32_t PointertoDSBindingTable;
1302 };
1303
1304 static inline void
1305 GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
1306 const struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS * restrict values)
1307 {
1308 uint32_t *dw = (uint32_t * restrict) dst;
1309
1310 dw[0] =
1311 __gen_field(values->CommandType, 29, 31) |
1312 __gen_field(values->CommandSubType, 27, 28) |
1313 __gen_field(values->_3DCommandOpcode, 24, 26) |
1314 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1315 __gen_field(values->DwordLength, 0, 7) |
1316 0;
1317
1318 dw[1] =
1319 __gen_offset(values->PointertoDSBindingTable, 5, 15) |
1320 0;
1321
1322 }
1323
1324 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_length 0x00000002
1325 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_length_bias 0x00000002
1326 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_header\
1327 .CommandType = 3, \
1328 .CommandSubType = 3, \
1329 ._3DCommandOpcode = 0, \
1330 ._3DCommandSubOpcode = 41, \
1331 .DwordLength = 0
1332
1333 struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS {
1334 uint32_t CommandType;
1335 uint32_t CommandSubType;
1336 uint32_t _3DCommandOpcode;
1337 uint32_t _3DCommandSubOpcode;
1338 uint32_t DwordLength;
1339 uint32_t PointertoGSBindingTable;
1340 };
1341
1342 static inline void
1343 GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
1344 const struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS * restrict values)
1345 {
1346 uint32_t *dw = (uint32_t * restrict) dst;
1347
1348 dw[0] =
1349 __gen_field(values->CommandType, 29, 31) |
1350 __gen_field(values->CommandSubType, 27, 28) |
1351 __gen_field(values->_3DCommandOpcode, 24, 26) |
1352 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1353 __gen_field(values->DwordLength, 0, 7) |
1354 0;
1355
1356 dw[1] =
1357 __gen_offset(values->PointertoGSBindingTable, 5, 15) |
1358 0;
1359
1360 }
1361
1362 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_length 0x00000002
1363 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_length_bias 0x00000002
1364 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_header\
1365 .CommandType = 3, \
1366 .CommandSubType = 3, \
1367 ._3DCommandOpcode = 0, \
1368 ._3DCommandSubOpcode = 39, \
1369 .DwordLength = 0
1370
1371 struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS {
1372 uint32_t CommandType;
1373 uint32_t CommandSubType;
1374 uint32_t _3DCommandOpcode;
1375 uint32_t _3DCommandSubOpcode;
1376 uint32_t DwordLength;
1377 uint32_t PointertoHSBindingTable;
1378 };
1379
1380 static inline void
1381 GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
1382 const struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS * restrict values)
1383 {
1384 uint32_t *dw = (uint32_t * restrict) dst;
1385
1386 dw[0] =
1387 __gen_field(values->CommandType, 29, 31) |
1388 __gen_field(values->CommandSubType, 27, 28) |
1389 __gen_field(values->_3DCommandOpcode, 24, 26) |
1390 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1391 __gen_field(values->DwordLength, 0, 7) |
1392 0;
1393
1394 dw[1] =
1395 __gen_offset(values->PointertoHSBindingTable, 5, 15) |
1396 0;
1397
1398 }
1399
1400 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_length 0x00000002
1401 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_length_bias 0x00000002
1402 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_header\
1403 .CommandType = 3, \
1404 .CommandSubType = 3, \
1405 ._3DCommandOpcode = 0, \
1406 ._3DCommandSubOpcode = 42, \
1407 .DwordLength = 0
1408
1409 struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS {
1410 uint32_t CommandType;
1411 uint32_t CommandSubType;
1412 uint32_t _3DCommandOpcode;
1413 uint32_t _3DCommandSubOpcode;
1414 uint32_t DwordLength;
1415 uint32_t PointertoPSBindingTable;
1416 };
1417
1418 static inline void
1419 GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
1420 const struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS * restrict values)
1421 {
1422 uint32_t *dw = (uint32_t * restrict) dst;
1423
1424 dw[0] =
1425 __gen_field(values->CommandType, 29, 31) |
1426 __gen_field(values->CommandSubType, 27, 28) |
1427 __gen_field(values->_3DCommandOpcode, 24, 26) |
1428 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1429 __gen_field(values->DwordLength, 0, 7) |
1430 0;
1431
1432 dw[1] =
1433 __gen_offset(values->PointertoPSBindingTable, 5, 15) |
1434 0;
1435
1436 }
1437
1438 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_length 0x00000002
1439 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_length_bias 0x00000002
1440 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_header\
1441 .CommandType = 3, \
1442 .CommandSubType = 3, \
1443 ._3DCommandOpcode = 0, \
1444 ._3DCommandSubOpcode = 38, \
1445 .DwordLength = 0
1446
1447 struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS {
1448 uint32_t CommandType;
1449 uint32_t CommandSubType;
1450 uint32_t _3DCommandOpcode;
1451 uint32_t _3DCommandSubOpcode;
1452 uint32_t DwordLength;
1453 uint32_t PointertoVSBindingTable;
1454 };
1455
1456 static inline void
1457 GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
1458 const struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS * restrict values)
1459 {
1460 uint32_t *dw = (uint32_t * restrict) dst;
1461
1462 dw[0] =
1463 __gen_field(values->CommandType, 29, 31) |
1464 __gen_field(values->CommandSubType, 27, 28) |
1465 __gen_field(values->_3DCommandOpcode, 24, 26) |
1466 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1467 __gen_field(values->DwordLength, 0, 7) |
1468 0;
1469
1470 dw[1] =
1471 __gen_offset(values->PointertoVSBindingTable, 5, 15) |
1472 0;
1473
1474 }
1475
1476 #define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_length 0x00000004
1477 #define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_length_bias 0x00000002
1478 #define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_header\
1479 .CommandType = 3, \
1480 .CommandSubType = 3, \
1481 ._3DCommandOpcode = 1, \
1482 ._3DCommandSubOpcode = 25, \
1483 .DwordLength = 2
1484
1485 struct GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC {
1486 uint32_t CommandType;
1487 uint32_t CommandSubType;
1488 uint32_t _3DCommandOpcode;
1489 uint32_t _3DCommandSubOpcode;
1490 uint32_t DwordLength;
1491 __gen_address_type BindingTablePoolBaseAddress;
1492 uint32_t BindingTablePoolEnable;
1493 struct GEN8_MEMORY_OBJECT_CONTROL_STATE SurfaceObjectControlState;
1494 #define NoValidData 0
1495 uint32_t BindingTablePoolBufferSize;
1496 };
1497
1498 static inline void
1499 GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_pack(__gen_user_data *data, void * restrict dst,
1500 const struct GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC * restrict values)
1501 {
1502 uint32_t *dw = (uint32_t * restrict) dst;
1503
1504 dw[0] =
1505 __gen_field(values->CommandType, 29, 31) |
1506 __gen_field(values->CommandSubType, 27, 28) |
1507 __gen_field(values->_3DCommandOpcode, 24, 26) |
1508 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1509 __gen_field(values->DwordLength, 0, 7) |
1510 0;
1511
1512 uint32_t dw_SurfaceObjectControlState;
1513 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceObjectControlState, &values->SurfaceObjectControlState);
1514 uint32_t dw1 =
1515 __gen_field(values->BindingTablePoolEnable, 11, 11) |
1516 __gen_field(dw_SurfaceObjectControlState, 0, 6) |
1517 0;
1518
1519 uint64_t qw1 =
1520 __gen_combine_address(data, &dw[1], values->BindingTablePoolBaseAddress, dw1);
1521
1522 dw[1] = qw1;
1523 dw[2] = qw1 >> 32;
1524
1525 dw[3] =
1526 __gen_field(values->BindingTablePoolBufferSize, 12, 31) |
1527 0;
1528
1529 }
1530
1531 #define GEN8_3DSTATE_BLEND_STATE_POINTERS_length 0x00000002
1532 #define GEN8_3DSTATE_BLEND_STATE_POINTERS_length_bias 0x00000002
1533 #define GEN8_3DSTATE_BLEND_STATE_POINTERS_header\
1534 .CommandType = 3, \
1535 .CommandSubType = 3, \
1536 ._3DCommandOpcode = 0, \
1537 ._3DCommandSubOpcode = 36, \
1538 .DwordLength = 0
1539
1540 struct GEN8_3DSTATE_BLEND_STATE_POINTERS {
1541 uint32_t CommandType;
1542 uint32_t CommandSubType;
1543 uint32_t _3DCommandOpcode;
1544 uint32_t _3DCommandSubOpcode;
1545 uint32_t DwordLength;
1546 uint32_t BlendStatePointer;
1547 uint32_t BlendStatePointerValid;
1548 };
1549
1550 static inline void
1551 GEN8_3DSTATE_BLEND_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
1552 const struct GEN8_3DSTATE_BLEND_STATE_POINTERS * restrict values)
1553 {
1554 uint32_t *dw = (uint32_t * restrict) dst;
1555
1556 dw[0] =
1557 __gen_field(values->CommandType, 29, 31) |
1558 __gen_field(values->CommandSubType, 27, 28) |
1559 __gen_field(values->_3DCommandOpcode, 24, 26) |
1560 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1561 __gen_field(values->DwordLength, 0, 7) |
1562 0;
1563
1564 dw[1] =
1565 __gen_offset(values->BlendStatePointer, 6, 31) |
1566 __gen_field(values->BlendStatePointerValid, 0, 0) |
1567 0;
1568
1569 }
1570
1571 #define GEN8_3DSTATE_CC_STATE_POINTERS_length 0x00000002
1572 #define GEN8_3DSTATE_CC_STATE_POINTERS_length_bias 0x00000002
1573 #define GEN8_3DSTATE_CC_STATE_POINTERS_header \
1574 .CommandType = 3, \
1575 .CommandSubType = 3, \
1576 ._3DCommandOpcode = 0, \
1577 ._3DCommandSubOpcode = 14, \
1578 .DwordLength = 0
1579
1580 struct GEN8_3DSTATE_CC_STATE_POINTERS {
1581 uint32_t CommandType;
1582 uint32_t CommandSubType;
1583 uint32_t _3DCommandOpcode;
1584 uint32_t _3DCommandSubOpcode;
1585 uint32_t DwordLength;
1586 uint32_t ColorCalcStatePointer;
1587 uint32_t ColorCalcStatePointerValid;
1588 };
1589
1590 static inline void
1591 GEN8_3DSTATE_CC_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
1592 const struct GEN8_3DSTATE_CC_STATE_POINTERS * restrict values)
1593 {
1594 uint32_t *dw = (uint32_t * restrict) dst;
1595
1596 dw[0] =
1597 __gen_field(values->CommandType, 29, 31) |
1598 __gen_field(values->CommandSubType, 27, 28) |
1599 __gen_field(values->_3DCommandOpcode, 24, 26) |
1600 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1601 __gen_field(values->DwordLength, 0, 7) |
1602 0;
1603
1604 dw[1] =
1605 __gen_offset(values->ColorCalcStatePointer, 6, 31) |
1606 __gen_field(values->ColorCalcStatePointerValid, 0, 0) |
1607 0;
1608
1609 }
1610
1611 #define GEN8_3DSTATE_CHROMA_KEY_length 0x00000004
1612 #define GEN8_3DSTATE_CHROMA_KEY_length_bias 0x00000002
1613 #define GEN8_3DSTATE_CHROMA_KEY_header \
1614 .CommandType = 3, \
1615 .CommandSubType = 3, \
1616 ._3DCommandOpcode = 1, \
1617 ._3DCommandSubOpcode = 4, \
1618 .DwordLength = 2
1619
1620 struct GEN8_3DSTATE_CHROMA_KEY {
1621 uint32_t CommandType;
1622 uint32_t CommandSubType;
1623 uint32_t _3DCommandOpcode;
1624 uint32_t _3DCommandSubOpcode;
1625 uint32_t DwordLength;
1626 uint32_t ChromaKeyTableIndex;
1627 uint32_t ChromaKeyLowValue;
1628 uint32_t ChromaKeyHighValue;
1629 };
1630
1631 static inline void
1632 GEN8_3DSTATE_CHROMA_KEY_pack(__gen_user_data *data, void * restrict dst,
1633 const struct GEN8_3DSTATE_CHROMA_KEY * restrict values)
1634 {
1635 uint32_t *dw = (uint32_t * restrict) dst;
1636
1637 dw[0] =
1638 __gen_field(values->CommandType, 29, 31) |
1639 __gen_field(values->CommandSubType, 27, 28) |
1640 __gen_field(values->_3DCommandOpcode, 24, 26) |
1641 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1642 __gen_field(values->DwordLength, 0, 7) |
1643 0;
1644
1645 dw[1] =
1646 __gen_field(values->ChromaKeyTableIndex, 30, 31) |
1647 0;
1648
1649 dw[2] =
1650 __gen_field(values->ChromaKeyLowValue, 0, 31) |
1651 0;
1652
1653 dw[3] =
1654 __gen_field(values->ChromaKeyHighValue, 0, 31) |
1655 0;
1656
1657 }
1658
1659 #define GEN8_3DSTATE_CLEAR_PARAMS_length 0x00000003
1660 #define GEN8_3DSTATE_CLEAR_PARAMS_length_bias 0x00000002
1661 #define GEN8_3DSTATE_CLEAR_PARAMS_header \
1662 .CommandType = 3, \
1663 .CommandSubType = 3, \
1664 ._3DCommandOpcode = 0, \
1665 ._3DCommandSubOpcode = 4, \
1666 .DwordLength = 1
1667
1668 struct GEN8_3DSTATE_CLEAR_PARAMS {
1669 uint32_t CommandType;
1670 uint32_t CommandSubType;
1671 uint32_t _3DCommandOpcode;
1672 uint32_t _3DCommandSubOpcode;
1673 uint32_t DwordLength;
1674 float DepthClearValue;
1675 uint32_t DepthClearValueValid;
1676 };
1677
1678 static inline void
1679 GEN8_3DSTATE_CLEAR_PARAMS_pack(__gen_user_data *data, void * restrict dst,
1680 const struct GEN8_3DSTATE_CLEAR_PARAMS * restrict values)
1681 {
1682 uint32_t *dw = (uint32_t * restrict) dst;
1683
1684 dw[0] =
1685 __gen_field(values->CommandType, 29, 31) |
1686 __gen_field(values->CommandSubType, 27, 28) |
1687 __gen_field(values->_3DCommandOpcode, 24, 26) |
1688 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1689 __gen_field(values->DwordLength, 0, 7) |
1690 0;
1691
1692 dw[1] =
1693 __gen_float(values->DepthClearValue) |
1694 0;
1695
1696 dw[2] =
1697 __gen_field(values->DepthClearValueValid, 0, 0) |
1698 0;
1699
1700 }
1701
1702 #define GEN8_3DSTATE_CLIP_length 0x00000004
1703 #define GEN8_3DSTATE_CLIP_length_bias 0x00000002
1704 #define GEN8_3DSTATE_CLIP_header \
1705 .CommandType = 3, \
1706 .CommandSubType = 3, \
1707 ._3DCommandOpcode = 0, \
1708 ._3DCommandSubOpcode = 18, \
1709 .DwordLength = 2
1710
1711 struct GEN8_3DSTATE_CLIP {
1712 uint32_t CommandType;
1713 uint32_t CommandSubType;
1714 uint32_t _3DCommandOpcode;
1715 uint32_t _3DCommandSubOpcode;
1716 uint32_t DwordLength;
1717 #define Normal 0
1718 #define Force 1
1719 uint32_t ForceUserClipDistanceCullTestEnableBitmask;
1720 #define _8Bit 0
1721 #define _4Bit 1
1722 uint32_t VertexSubPixelPrecisionSelect;
1723 uint32_t EarlyCullEnable;
1724 #define Normal 0
1725 #define Force 1
1726 uint32_t ForceUserClipDistanceClipTestEnableBitmask;
1727 #define Normal 0
1728 #define Force 1
1729 uint32_t ForceClipMode;
1730 uint32_t ClipperStatisticsEnable;
1731 uint32_t UserClipDistanceCullTestEnableBitmask;
1732 uint32_t ClipEnable;
1733 #define API_OGL 0
1734 uint32_t APIMode;
1735 uint32_t ViewportXYClipTestEnable;
1736 uint32_t GuardbandClipTestEnable;
1737 uint32_t UserClipDistanceClipTestEnableBitmask;
1738 #define NORMAL 0
1739 #define REJECT_ALL 3
1740 #define ACCEPT_ALL 4
1741 uint32_t ClipMode;
1742 uint32_t PerspectiveDivideDisable;
1743 uint32_t NonPerspectiveBarycentricEnable;
1744 uint32_t TriangleStripListProvokingVertexSelect;
1745 uint32_t LineStripListProvokingVertexSelect;
1746 uint32_t TriangleFanProvokingVertexSelect;
1747 float MinimumPointWidth;
1748 float MaximumPointWidth;
1749 uint32_t ForceZeroRTAIndexEnable;
1750 uint32_t MaximumVPIndex;
1751 };
1752
1753 static inline void
1754 GEN8_3DSTATE_CLIP_pack(__gen_user_data *data, void * restrict dst,
1755 const struct GEN8_3DSTATE_CLIP * restrict values)
1756 {
1757 uint32_t *dw = (uint32_t * restrict) dst;
1758
1759 dw[0] =
1760 __gen_field(values->CommandType, 29, 31) |
1761 __gen_field(values->CommandSubType, 27, 28) |
1762 __gen_field(values->_3DCommandOpcode, 24, 26) |
1763 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1764 __gen_field(values->DwordLength, 0, 7) |
1765 0;
1766
1767 dw[1] =
1768 __gen_field(values->ForceUserClipDistanceCullTestEnableBitmask, 20, 20) |
1769 __gen_field(values->VertexSubPixelPrecisionSelect, 19, 19) |
1770 __gen_field(values->EarlyCullEnable, 18, 18) |
1771 __gen_field(values->ForceUserClipDistanceClipTestEnableBitmask, 17, 17) |
1772 __gen_field(values->ForceClipMode, 16, 16) |
1773 __gen_field(values->ClipperStatisticsEnable, 10, 10) |
1774 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
1775 0;
1776
1777 dw[2] =
1778 __gen_field(values->ClipEnable, 31, 31) |
1779 __gen_field(values->APIMode, 30, 30) |
1780 __gen_field(values->ViewportXYClipTestEnable, 28, 28) |
1781 __gen_field(values->GuardbandClipTestEnable, 26, 26) |
1782 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 16, 23) |
1783 __gen_field(values->ClipMode, 13, 15) |
1784 __gen_field(values->PerspectiveDivideDisable, 9, 9) |
1785 __gen_field(values->NonPerspectiveBarycentricEnable, 8, 8) |
1786 __gen_field(values->TriangleStripListProvokingVertexSelect, 4, 5) |
1787 __gen_field(values->LineStripListProvokingVertexSelect, 2, 3) |
1788 __gen_field(values->TriangleFanProvokingVertexSelect, 0, 1) |
1789 0;
1790
1791 dw[3] =
1792 __gen_field(values->MinimumPointWidth * (1 << 3), 17, 27) |
1793 __gen_field(values->MaximumPointWidth * (1 << 3), 6, 16) |
1794 __gen_field(values->ForceZeroRTAIndexEnable, 5, 5) |
1795 __gen_field(values->MaximumVPIndex, 0, 3) |
1796 0;
1797
1798 }
1799
1800 #define GEN8_3DSTATE_CONSTANT_DS_length 0x0000000b
1801 #define GEN8_3DSTATE_CONSTANT_DS_length_bias 0x00000002
1802 #define GEN8_3DSTATE_CONSTANT_DS_header \
1803 .CommandType = 3, \
1804 .CommandSubType = 3, \
1805 ._3DCommandOpcode = 0, \
1806 ._3DCommandSubOpcode = 26, \
1807 .DwordLength = 9
1808
1809 struct GEN8_3DSTATE_CONSTANT_BODY {
1810 uint32_t ConstantBuffer1ReadLength;
1811 uint32_t ConstantBuffer0ReadLength;
1812 uint32_t ConstantBuffer3ReadLength;
1813 uint32_t ConstantBuffer2ReadLength;
1814 __gen_address_type PointerToConstantBuffer0;
1815 __gen_address_type PointerToConstantBuffer1;
1816 __gen_address_type PointerToConstantBuffer2;
1817 __gen_address_type PointerToConstantBuffer3;
1818 };
1819
1820 static inline void
1821 GEN8_3DSTATE_CONSTANT_BODY_pack(__gen_user_data *data, void * restrict dst,
1822 const struct GEN8_3DSTATE_CONSTANT_BODY * restrict values)
1823 {
1824 uint32_t *dw = (uint32_t * restrict) dst;
1825
1826 dw[0] =
1827 __gen_field(values->ConstantBuffer1ReadLength, 16, 31) |
1828 __gen_field(values->ConstantBuffer0ReadLength, 0, 15) |
1829 0;
1830
1831 dw[1] =
1832 __gen_field(values->ConstantBuffer3ReadLength, 16, 31) |
1833 __gen_field(values->ConstantBuffer2ReadLength, 0, 15) |
1834 0;
1835
1836 uint32_t dw2 =
1837 0;
1838
1839 uint64_t qw2 =
1840 __gen_combine_address(data, &dw[2], values->PointerToConstantBuffer0, dw2);
1841
1842 dw[2] = qw2;
1843 dw[3] = qw2 >> 32;
1844
1845 uint32_t dw4 =
1846 0;
1847
1848 uint64_t qw4 =
1849 __gen_combine_address(data, &dw[4], values->PointerToConstantBuffer1, dw4);
1850
1851 dw[4] = qw4;
1852 dw[5] = qw4 >> 32;
1853
1854 uint32_t dw6 =
1855 0;
1856
1857 uint64_t qw6 =
1858 __gen_combine_address(data, &dw[6], values->PointerToConstantBuffer2, dw6);
1859
1860 dw[6] = qw6;
1861 dw[7] = qw6 >> 32;
1862
1863 uint32_t dw8 =
1864 0;
1865
1866 uint64_t qw8 =
1867 __gen_combine_address(data, &dw[8], values->PointerToConstantBuffer3, dw8);
1868
1869 dw[8] = qw8;
1870 dw[9] = qw8 >> 32;
1871
1872 }
1873
1874 struct GEN8_3DSTATE_CONSTANT_DS {
1875 uint32_t CommandType;
1876 uint32_t CommandSubType;
1877 uint32_t _3DCommandOpcode;
1878 uint32_t _3DCommandSubOpcode;
1879 struct GEN8_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
1880 uint32_t DwordLength;
1881 struct GEN8_3DSTATE_CONSTANT_BODY ConstantBody;
1882 };
1883
1884 static inline void
1885 GEN8_3DSTATE_CONSTANT_DS_pack(__gen_user_data *data, void * restrict dst,
1886 const struct GEN8_3DSTATE_CONSTANT_DS * restrict values)
1887 {
1888 uint32_t *dw = (uint32_t * restrict) dst;
1889
1890 uint32_t dw_ConstantBufferObjectControlState;
1891 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
1892 dw[0] =
1893 __gen_field(values->CommandType, 29, 31) |
1894 __gen_field(values->CommandSubType, 27, 28) |
1895 __gen_field(values->_3DCommandOpcode, 24, 26) |
1896 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1897 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
1898 __gen_field(values->DwordLength, 0, 7) |
1899 0;
1900
1901 GEN8_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1902 }
1903
1904 #define GEN8_3DSTATE_CONSTANT_GS_length 0x0000000b
1905 #define GEN8_3DSTATE_CONSTANT_GS_length_bias 0x00000002
1906 #define GEN8_3DSTATE_CONSTANT_GS_header \
1907 .CommandType = 3, \
1908 .CommandSubType = 3, \
1909 ._3DCommandOpcode = 0, \
1910 ._3DCommandSubOpcode = 22, \
1911 .DwordLength = 9
1912
1913 struct GEN8_3DSTATE_CONSTANT_GS {
1914 uint32_t CommandType;
1915 uint32_t CommandSubType;
1916 uint32_t _3DCommandOpcode;
1917 uint32_t _3DCommandSubOpcode;
1918 struct GEN8_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
1919 uint32_t DwordLength;
1920 struct GEN8_3DSTATE_CONSTANT_BODY ConstantBody;
1921 };
1922
1923 static inline void
1924 GEN8_3DSTATE_CONSTANT_GS_pack(__gen_user_data *data, void * restrict dst,
1925 const struct GEN8_3DSTATE_CONSTANT_GS * restrict values)
1926 {
1927 uint32_t *dw = (uint32_t * restrict) dst;
1928
1929 uint32_t dw_ConstantBufferObjectControlState;
1930 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
1931 dw[0] =
1932 __gen_field(values->CommandType, 29, 31) |
1933 __gen_field(values->CommandSubType, 27, 28) |
1934 __gen_field(values->_3DCommandOpcode, 24, 26) |
1935 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1936 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
1937 __gen_field(values->DwordLength, 0, 7) |
1938 0;
1939
1940 GEN8_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1941 }
1942
1943 #define GEN8_3DSTATE_CONSTANT_HS_length 0x0000000b
1944 #define GEN8_3DSTATE_CONSTANT_HS_length_bias 0x00000002
1945 #define GEN8_3DSTATE_CONSTANT_HS_header \
1946 .CommandType = 3, \
1947 .CommandSubType = 3, \
1948 ._3DCommandOpcode = 0, \
1949 ._3DCommandSubOpcode = 25, \
1950 .DwordLength = 9
1951
1952 struct GEN8_3DSTATE_CONSTANT_HS {
1953 uint32_t CommandType;
1954 uint32_t CommandSubType;
1955 uint32_t _3DCommandOpcode;
1956 uint32_t _3DCommandSubOpcode;
1957 struct GEN8_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
1958 uint32_t DwordLength;
1959 struct GEN8_3DSTATE_CONSTANT_BODY ConstantBody;
1960 };
1961
1962 static inline void
1963 GEN8_3DSTATE_CONSTANT_HS_pack(__gen_user_data *data, void * restrict dst,
1964 const struct GEN8_3DSTATE_CONSTANT_HS * restrict values)
1965 {
1966 uint32_t *dw = (uint32_t * restrict) dst;
1967
1968 uint32_t dw_ConstantBufferObjectControlState;
1969 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
1970 dw[0] =
1971 __gen_field(values->CommandType, 29, 31) |
1972 __gen_field(values->CommandSubType, 27, 28) |
1973 __gen_field(values->_3DCommandOpcode, 24, 26) |
1974 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1975 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
1976 __gen_field(values->DwordLength, 0, 7) |
1977 0;
1978
1979 GEN8_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1980 }
1981
1982 #define GEN8_3DSTATE_CONSTANT_PS_length 0x0000000b
1983 #define GEN8_3DSTATE_CONSTANT_PS_length_bias 0x00000002
1984 #define GEN8_3DSTATE_CONSTANT_PS_header \
1985 .CommandType = 3, \
1986 .CommandSubType = 3, \
1987 ._3DCommandOpcode = 0, \
1988 ._3DCommandSubOpcode = 23, \
1989 .DwordLength = 9
1990
1991 struct GEN8_3DSTATE_CONSTANT_PS {
1992 uint32_t CommandType;
1993 uint32_t CommandSubType;
1994 uint32_t _3DCommandOpcode;
1995 uint32_t _3DCommandSubOpcode;
1996 struct GEN8_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
1997 uint32_t DwordLength;
1998 struct GEN8_3DSTATE_CONSTANT_BODY ConstantBody;
1999 };
2000
2001 static inline void
2002 GEN8_3DSTATE_CONSTANT_PS_pack(__gen_user_data *data, void * restrict dst,
2003 const struct GEN8_3DSTATE_CONSTANT_PS * restrict values)
2004 {
2005 uint32_t *dw = (uint32_t * restrict) dst;
2006
2007 uint32_t dw_ConstantBufferObjectControlState;
2008 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
2009 dw[0] =
2010 __gen_field(values->CommandType, 29, 31) |
2011 __gen_field(values->CommandSubType, 27, 28) |
2012 __gen_field(values->_3DCommandOpcode, 24, 26) |
2013 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2014 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
2015 __gen_field(values->DwordLength, 0, 7) |
2016 0;
2017
2018 GEN8_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
2019 }
2020
2021 #define GEN8_3DSTATE_CONSTANT_VS_length 0x0000000b
2022 #define GEN8_3DSTATE_CONSTANT_VS_length_bias 0x00000002
2023 #define GEN8_3DSTATE_CONSTANT_VS_header \
2024 .CommandType = 3, \
2025 .CommandSubType = 3, \
2026 ._3DCommandOpcode = 0, \
2027 ._3DCommandSubOpcode = 21, \
2028 .DwordLength = 9
2029
2030 struct GEN8_3DSTATE_CONSTANT_VS {
2031 uint32_t CommandType;
2032 uint32_t CommandSubType;
2033 uint32_t _3DCommandOpcode;
2034 uint32_t _3DCommandSubOpcode;
2035 struct GEN8_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
2036 uint32_t DwordLength;
2037 struct GEN8_3DSTATE_CONSTANT_BODY ConstantBody;
2038 };
2039
2040 static inline void
2041 GEN8_3DSTATE_CONSTANT_VS_pack(__gen_user_data *data, void * restrict dst,
2042 const struct GEN8_3DSTATE_CONSTANT_VS * restrict values)
2043 {
2044 uint32_t *dw = (uint32_t * restrict) dst;
2045
2046 uint32_t dw_ConstantBufferObjectControlState;
2047 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
2048 dw[0] =
2049 __gen_field(values->CommandType, 29, 31) |
2050 __gen_field(values->CommandSubType, 27, 28) |
2051 __gen_field(values->_3DCommandOpcode, 24, 26) |
2052 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2053 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
2054 __gen_field(values->DwordLength, 0, 7) |
2055 0;
2056
2057 GEN8_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
2058 }
2059
2060 #define GEN8_3DSTATE_DEPTH_BUFFER_length 0x00000008
2061 #define GEN8_3DSTATE_DEPTH_BUFFER_length_bias 0x00000002
2062 #define GEN8_3DSTATE_DEPTH_BUFFER_header \
2063 .CommandType = 3, \
2064 .CommandSubType = 3, \
2065 ._3DCommandOpcode = 0, \
2066 ._3DCommandSubOpcode = 5, \
2067 .DwordLength = 6
2068
2069 struct GEN8_3DSTATE_DEPTH_BUFFER {
2070 uint32_t CommandType;
2071 uint32_t CommandSubType;
2072 uint32_t _3DCommandOpcode;
2073 uint32_t _3DCommandSubOpcode;
2074 uint32_t DwordLength;
2075 #define SURFTYPE_1D 0
2076 #define SURFTYPE_2D 1
2077 #define SURFTYPE_3D 2
2078 #define SURFTYPE_CUBE 3
2079 #define SURFTYPE_NULL 7
2080 uint32_t SurfaceType;
2081 uint32_t DepthWriteEnable;
2082 uint32_t StencilWriteEnable;
2083 uint32_t HierarchicalDepthBufferEnable;
2084 #define D32_FLOAT 1
2085 #define D24_UNORM_X8_UINT 3
2086 #define D16_UNORM 5
2087 uint32_t SurfaceFormat;
2088 uint32_t SurfacePitch;
2089 __gen_address_type SurfaceBaseAddress;
2090 uint32_t Height;
2091 uint32_t Width;
2092 uint32_t LOD;
2093 uint32_t Depth;
2094 uint32_t MinimumArrayElement;
2095 struct GEN8_MEMORY_OBJECT_CONTROL_STATE DepthBufferObjectControlState;
2096 uint32_t RenderTargetViewExtent;
2097 uint32_t SurfaceQPitch;
2098 };
2099
2100 static inline void
2101 GEN8_3DSTATE_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
2102 const struct GEN8_3DSTATE_DEPTH_BUFFER * restrict values)
2103 {
2104 uint32_t *dw = (uint32_t * restrict) dst;
2105
2106 dw[0] =
2107 __gen_field(values->CommandType, 29, 31) |
2108 __gen_field(values->CommandSubType, 27, 28) |
2109 __gen_field(values->_3DCommandOpcode, 24, 26) |
2110 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2111 __gen_field(values->DwordLength, 0, 7) |
2112 0;
2113
2114 dw[1] =
2115 __gen_field(values->SurfaceType, 29, 31) |
2116 __gen_field(values->DepthWriteEnable, 28, 28) |
2117 __gen_field(values->StencilWriteEnable, 27, 27) |
2118 __gen_field(values->HierarchicalDepthBufferEnable, 22, 22) |
2119 __gen_field(values->SurfaceFormat, 18, 20) |
2120 __gen_field(values->SurfacePitch, 0, 17) |
2121 0;
2122
2123 uint32_t dw2 =
2124 0;
2125
2126 uint64_t qw2 =
2127 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
2128
2129 dw[2] = qw2;
2130 dw[3] = qw2 >> 32;
2131
2132 dw[4] =
2133 __gen_field(values->Height, 18, 31) |
2134 __gen_field(values->Width, 4, 17) |
2135 __gen_field(values->LOD, 0, 3) |
2136 0;
2137
2138 uint32_t dw_DepthBufferObjectControlState;
2139 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DepthBufferObjectControlState, &values->DepthBufferObjectControlState);
2140 dw[5] =
2141 __gen_field(values->Depth, 21, 31) |
2142 __gen_field(values->MinimumArrayElement, 10, 20) |
2143 __gen_field(dw_DepthBufferObjectControlState, 0, 6) |
2144 0;
2145
2146 dw[6] =
2147 0;
2148
2149 dw[7] =
2150 __gen_field(values->RenderTargetViewExtent, 21, 31) |
2151 __gen_field(values->SurfaceQPitch, 0, 14) |
2152 0;
2153
2154 }
2155
2156 #define GEN8_3DSTATE_DRAWING_RECTANGLE_length 0x00000004
2157 #define GEN8_3DSTATE_DRAWING_RECTANGLE_length_bias 0x00000002
2158 #define GEN8_3DSTATE_DRAWING_RECTANGLE_header \
2159 .CommandType = 3, \
2160 .CommandSubType = 3, \
2161 ._3DCommandOpcode = 1, \
2162 ._3DCommandSubOpcode = 0, \
2163 .DwordLength = 2
2164
2165 struct GEN8_3DSTATE_DRAWING_RECTANGLE {
2166 uint32_t CommandType;
2167 uint32_t CommandSubType;
2168 uint32_t _3DCommandOpcode;
2169 uint32_t _3DCommandSubOpcode;
2170 #define Legacy 0
2171 #define Core0Enabled 1
2172 #define Core1Enabled 2
2173 uint32_t CoreModeSelect;
2174 uint32_t DwordLength;
2175 uint32_t ClippedDrawingRectangleYMin;
2176 uint32_t ClippedDrawingRectangleXMin;
2177 uint32_t ClippedDrawingRectangleYMax;
2178 uint32_t ClippedDrawingRectangleXMax;
2179 uint32_t DrawingRectangleOriginY;
2180 uint32_t DrawingRectangleOriginX;
2181 };
2182
2183 static inline void
2184 GEN8_3DSTATE_DRAWING_RECTANGLE_pack(__gen_user_data *data, void * restrict dst,
2185 const struct GEN8_3DSTATE_DRAWING_RECTANGLE * restrict values)
2186 {
2187 uint32_t *dw = (uint32_t * restrict) dst;
2188
2189 dw[0] =
2190 __gen_field(values->CommandType, 29, 31) |
2191 __gen_field(values->CommandSubType, 27, 28) |
2192 __gen_field(values->_3DCommandOpcode, 24, 26) |
2193 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2194 __gen_field(values->CoreModeSelect, 14, 15) |
2195 __gen_field(values->DwordLength, 0, 7) |
2196 0;
2197
2198 dw[1] =
2199 __gen_field(values->ClippedDrawingRectangleYMin, 16, 31) |
2200 __gen_field(values->ClippedDrawingRectangleXMin, 0, 15) |
2201 0;
2202
2203 dw[2] =
2204 __gen_field(values->ClippedDrawingRectangleYMax, 16, 31) |
2205 __gen_field(values->ClippedDrawingRectangleXMax, 0, 15) |
2206 0;
2207
2208 dw[3] =
2209 __gen_field(values->DrawingRectangleOriginY, 16, 31) |
2210 __gen_field(values->DrawingRectangleOriginX, 0, 15) |
2211 0;
2212
2213 }
2214
2215 #define GEN8_3DSTATE_DS_length 0x00000009
2216 #define GEN8_3DSTATE_DS_length_bias 0x00000002
2217 #define GEN8_3DSTATE_DS_header \
2218 .CommandType = 3, \
2219 .CommandSubType = 3, \
2220 ._3DCommandOpcode = 0, \
2221 ._3DCommandSubOpcode = 29, \
2222 .DwordLength = 7
2223
2224 struct GEN8_3DSTATE_DS {
2225 uint32_t CommandType;
2226 uint32_t CommandSubType;
2227 uint32_t _3DCommandOpcode;
2228 uint32_t _3DCommandSubOpcode;
2229 uint32_t DwordLength;
2230 uint64_t KernelStartPointer;
2231 #define Multiple 0
2232 #define Single 1
2233 uint32_t SingleDomainPointDispatch;
2234 #define Dmask 0
2235 #define Vmask 1
2236 uint32_t VectorMaskEnable;
2237 #define NoSamplers 0
2238 #define _14Samplers 1
2239 #define _58Samplers 2
2240 #define _912Samplers 3
2241 #define _1316Samplers 4
2242 uint32_t SamplerCount;
2243 uint32_t BindingTableEntryCount;
2244 #define Normal 0
2245 #define High 1
2246 uint32_t ThreadDispatchPriority;
2247 #define IEEE754 0
2248 #define Alternate 1
2249 uint32_t FloatingPointMode;
2250 uint32_t AccessesUAV;
2251 uint32_t IllegalOpcodeExceptionEnable;
2252 uint32_t SoftwareExceptionEnable;
2253 uint64_t ScratchSpaceBasePointer;
2254 uint32_t PerThreadScratchSpace;
2255 uint32_t DispatchGRFStartRegisterForURBData;
2256 uint32_t PatchURBEntryReadLength;
2257 uint32_t PatchURBEntryReadOffset;
2258 uint32_t MaximumNumberofThreads;
2259 uint32_t StatisticsEnable;
2260 uint32_t SIMD8DispatchEnable;
2261 uint32_t ComputeWCoordinateEnable;
2262 uint32_t CacheDisable;
2263 uint32_t FunctionEnable;
2264 uint32_t VertexURBEntryOutputReadOffset;
2265 uint32_t VertexURBEntryOutputLength;
2266 uint32_t UserClipDistanceClipTestEnableBitmask;
2267 uint32_t UserClipDistanceCullTestEnableBitmask;
2268 };
2269
2270 static inline void
2271 GEN8_3DSTATE_DS_pack(__gen_user_data *data, void * restrict dst,
2272 const struct GEN8_3DSTATE_DS * restrict values)
2273 {
2274 uint32_t *dw = (uint32_t * restrict) dst;
2275
2276 dw[0] =
2277 __gen_field(values->CommandType, 29, 31) |
2278 __gen_field(values->CommandSubType, 27, 28) |
2279 __gen_field(values->_3DCommandOpcode, 24, 26) |
2280 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2281 __gen_field(values->DwordLength, 0, 7) |
2282 0;
2283
2284 uint64_t qw1 =
2285 __gen_offset(values->KernelStartPointer, 6, 63) |
2286 0;
2287
2288 dw[1] = qw1;
2289 dw[2] = qw1 >> 32;
2290
2291 dw[3] =
2292 __gen_field(values->SingleDomainPointDispatch, 31, 31) |
2293 __gen_field(values->VectorMaskEnable, 30, 30) |
2294 __gen_field(values->SamplerCount, 27, 29) |
2295 __gen_field(values->BindingTableEntryCount, 18, 25) |
2296 __gen_field(values->ThreadDispatchPriority, 17, 17) |
2297 __gen_field(values->FloatingPointMode, 16, 16) |
2298 __gen_field(values->AccessesUAV, 14, 14) |
2299 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2300 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
2301 0;
2302
2303 uint64_t qw4 =
2304 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
2305 __gen_field(values->PerThreadScratchSpace, 0, 3) |
2306 0;
2307
2308 dw[4] = qw4;
2309 dw[5] = qw4 >> 32;
2310
2311 dw[6] =
2312 __gen_field(values->DispatchGRFStartRegisterForURBData, 20, 24) |
2313 __gen_field(values->PatchURBEntryReadLength, 11, 17) |
2314 __gen_field(values->PatchURBEntryReadOffset, 4, 9) |
2315 0;
2316
2317 dw[7] =
2318 __gen_field(values->MaximumNumberofThreads, 21, 29) |
2319 __gen_field(values->StatisticsEnable, 10, 10) |
2320 __gen_field(values->SIMD8DispatchEnable, 3, 3) |
2321 __gen_field(values->ComputeWCoordinateEnable, 2, 2) |
2322 __gen_field(values->CacheDisable, 1, 1) |
2323 __gen_field(values->FunctionEnable, 0, 0) |
2324 0;
2325
2326 dw[8] =
2327 __gen_field(values->VertexURBEntryOutputReadOffset, 21, 26) |
2328 __gen_field(values->VertexURBEntryOutputLength, 16, 20) |
2329 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 8, 15) |
2330 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
2331 0;
2332
2333 }
2334
2335 #define GEN8_3DSTATE_GATHER_CONSTANT_DS_length_bias 0x00000002
2336 #define GEN8_3DSTATE_GATHER_CONSTANT_DS_header \
2337 .CommandType = 3, \
2338 .CommandSubType = 3, \
2339 ._3DCommandOpcode = 0, \
2340 ._3DCommandSubOpcode = 55
2341
2342 struct GEN8_GATHER_CONSTANT_ENTRY {
2343 uint32_t ConstantBufferOffset;
2344 uint32_t ChannelMask;
2345 uint32_t BindingTableIndexOffset;
2346 };
2347
2348 static inline void
2349 GEN8_GATHER_CONSTANT_ENTRY_pack(__gen_user_data *data, void * restrict dst,
2350 const struct GEN8_GATHER_CONSTANT_ENTRY * restrict values)
2351 {
2352 uint32_t *dw = (uint32_t * restrict) dst;
2353
2354 dw[0] =
2355 __gen_offset(values->ConstantBufferOffset, 8, 15) |
2356 __gen_field(values->ChannelMask, 4, 7) |
2357 __gen_field(values->BindingTableIndexOffset, 0, 3) |
2358 0;
2359
2360 }
2361
2362 struct GEN8_3DSTATE_GATHER_CONSTANT_DS {
2363 uint32_t CommandType;
2364 uint32_t CommandSubType;
2365 uint32_t _3DCommandOpcode;
2366 uint32_t _3DCommandSubOpcode;
2367 uint32_t DwordLength;
2368 uint32_t ConstantBufferValid;
2369 uint32_t ConstantBufferBindingTableBlock;
2370 uint32_t GatherBufferOffset;
2371 uint32_t ConstantBufferDx9GenerateStall;
2372 /* variable length fields follow */
2373 };
2374
2375 static inline void
2376 GEN8_3DSTATE_GATHER_CONSTANT_DS_pack(__gen_user_data *data, void * restrict dst,
2377 const struct GEN8_3DSTATE_GATHER_CONSTANT_DS * restrict values)
2378 {
2379 uint32_t *dw = (uint32_t * restrict) dst;
2380
2381 dw[0] =
2382 __gen_field(values->CommandType, 29, 31) |
2383 __gen_field(values->CommandSubType, 27, 28) |
2384 __gen_field(values->_3DCommandOpcode, 24, 26) |
2385 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2386 __gen_field(values->DwordLength, 0, 7) |
2387 0;
2388
2389 dw[1] =
2390 __gen_field(values->ConstantBufferValid, 16, 31) |
2391 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2392 0;
2393
2394 dw[2] =
2395 __gen_offset(values->GatherBufferOffset, 6, 22) |
2396 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2397 0;
2398
2399 /* variable length fields follow */
2400 }
2401
2402 #define GEN8_3DSTATE_GATHER_CONSTANT_GS_length_bias 0x00000002
2403 #define GEN8_3DSTATE_GATHER_CONSTANT_GS_header \
2404 .CommandType = 3, \
2405 .CommandSubType = 3, \
2406 ._3DCommandOpcode = 0, \
2407 ._3DCommandSubOpcode = 53
2408
2409 struct GEN8_3DSTATE_GATHER_CONSTANT_GS {
2410 uint32_t CommandType;
2411 uint32_t CommandSubType;
2412 uint32_t _3DCommandOpcode;
2413 uint32_t _3DCommandSubOpcode;
2414 uint32_t DwordLength;
2415 uint32_t ConstantBufferValid;
2416 uint32_t ConstantBufferBindingTableBlock;
2417 uint32_t GatherBufferOffset;
2418 uint32_t ConstantBufferDx9GenerateStall;
2419 /* variable length fields follow */
2420 };
2421
2422 static inline void
2423 GEN8_3DSTATE_GATHER_CONSTANT_GS_pack(__gen_user_data *data, void * restrict dst,
2424 const struct GEN8_3DSTATE_GATHER_CONSTANT_GS * restrict values)
2425 {
2426 uint32_t *dw = (uint32_t * restrict) dst;
2427
2428 dw[0] =
2429 __gen_field(values->CommandType, 29, 31) |
2430 __gen_field(values->CommandSubType, 27, 28) |
2431 __gen_field(values->_3DCommandOpcode, 24, 26) |
2432 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2433 __gen_field(values->DwordLength, 0, 7) |
2434 0;
2435
2436 dw[1] =
2437 __gen_field(values->ConstantBufferValid, 16, 31) |
2438 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2439 0;
2440
2441 dw[2] =
2442 __gen_offset(values->GatherBufferOffset, 6, 22) |
2443 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2444 0;
2445
2446 /* variable length fields follow */
2447 }
2448
2449 #define GEN8_3DSTATE_GATHER_CONSTANT_HS_length_bias 0x00000002
2450 #define GEN8_3DSTATE_GATHER_CONSTANT_HS_header \
2451 .CommandType = 3, \
2452 .CommandSubType = 3, \
2453 ._3DCommandOpcode = 0, \
2454 ._3DCommandSubOpcode = 54
2455
2456 struct GEN8_3DSTATE_GATHER_CONSTANT_HS {
2457 uint32_t CommandType;
2458 uint32_t CommandSubType;
2459 uint32_t _3DCommandOpcode;
2460 uint32_t _3DCommandSubOpcode;
2461 uint32_t DwordLength;
2462 uint32_t ConstantBufferValid;
2463 uint32_t ConstantBufferBindingTableBlock;
2464 uint32_t GatherBufferOffset;
2465 uint32_t ConstantBufferDx9GenerateStall;
2466 /* variable length fields follow */
2467 };
2468
2469 static inline void
2470 GEN8_3DSTATE_GATHER_CONSTANT_HS_pack(__gen_user_data *data, void * restrict dst,
2471 const struct GEN8_3DSTATE_GATHER_CONSTANT_HS * restrict values)
2472 {
2473 uint32_t *dw = (uint32_t * restrict) dst;
2474
2475 dw[0] =
2476 __gen_field(values->CommandType, 29, 31) |
2477 __gen_field(values->CommandSubType, 27, 28) |
2478 __gen_field(values->_3DCommandOpcode, 24, 26) |
2479 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2480 __gen_field(values->DwordLength, 0, 7) |
2481 0;
2482
2483 dw[1] =
2484 __gen_field(values->ConstantBufferValid, 16, 31) |
2485 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2486 0;
2487
2488 dw[2] =
2489 __gen_offset(values->GatherBufferOffset, 6, 22) |
2490 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2491 0;
2492
2493 /* variable length fields follow */
2494 }
2495
2496 #define GEN8_3DSTATE_GATHER_CONSTANT_PS_length_bias 0x00000002
2497 #define GEN8_3DSTATE_GATHER_CONSTANT_PS_header \
2498 .CommandType = 3, \
2499 .CommandSubType = 3, \
2500 ._3DCommandOpcode = 0, \
2501 ._3DCommandSubOpcode = 56
2502
2503 struct GEN8_3DSTATE_GATHER_CONSTANT_PS {
2504 uint32_t CommandType;
2505 uint32_t CommandSubType;
2506 uint32_t _3DCommandOpcode;
2507 uint32_t _3DCommandSubOpcode;
2508 uint32_t DwordLength;
2509 uint32_t ConstantBufferValid;
2510 uint32_t ConstantBufferBindingTableBlock;
2511 uint32_t GatherBufferOffset;
2512 uint32_t ConstantBufferDx9GenerateStall;
2513 uint32_t ConstantBufferDx9Enable;
2514 /* variable length fields follow */
2515 };
2516
2517 static inline void
2518 GEN8_3DSTATE_GATHER_CONSTANT_PS_pack(__gen_user_data *data, void * restrict dst,
2519 const struct GEN8_3DSTATE_GATHER_CONSTANT_PS * restrict values)
2520 {
2521 uint32_t *dw = (uint32_t * restrict) dst;
2522
2523 dw[0] =
2524 __gen_field(values->CommandType, 29, 31) |
2525 __gen_field(values->CommandSubType, 27, 28) |
2526 __gen_field(values->_3DCommandOpcode, 24, 26) |
2527 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2528 __gen_field(values->DwordLength, 0, 7) |
2529 0;
2530
2531 dw[1] =
2532 __gen_field(values->ConstantBufferValid, 16, 31) |
2533 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2534 0;
2535
2536 dw[2] =
2537 __gen_offset(values->GatherBufferOffset, 6, 22) |
2538 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2539 __gen_field(values->ConstantBufferDx9Enable, 4, 4) |
2540 0;
2541
2542 /* variable length fields follow */
2543 }
2544
2545 #define GEN8_3DSTATE_GATHER_CONSTANT_VS_length_bias 0x00000002
2546 #define GEN8_3DSTATE_GATHER_CONSTANT_VS_header \
2547 .CommandType = 3, \
2548 .CommandSubType = 3, \
2549 ._3DCommandOpcode = 0, \
2550 ._3DCommandSubOpcode = 52
2551
2552 struct GEN8_3DSTATE_GATHER_CONSTANT_VS {
2553 uint32_t CommandType;
2554 uint32_t CommandSubType;
2555 uint32_t _3DCommandOpcode;
2556 uint32_t _3DCommandSubOpcode;
2557 uint32_t DwordLength;
2558 uint32_t ConstantBufferValid;
2559 uint32_t ConstantBufferBindingTableBlock;
2560 uint32_t GatherBufferOffset;
2561 uint32_t ConstantBufferDx9GenerateStall;
2562 uint32_t ConstantBufferDx9Enable;
2563 /* variable length fields follow */
2564 };
2565
2566 static inline void
2567 GEN8_3DSTATE_GATHER_CONSTANT_VS_pack(__gen_user_data *data, void * restrict dst,
2568 const struct GEN8_3DSTATE_GATHER_CONSTANT_VS * restrict values)
2569 {
2570 uint32_t *dw = (uint32_t * restrict) dst;
2571
2572 dw[0] =
2573 __gen_field(values->CommandType, 29, 31) |
2574 __gen_field(values->CommandSubType, 27, 28) |
2575 __gen_field(values->_3DCommandOpcode, 24, 26) |
2576 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2577 __gen_field(values->DwordLength, 0, 7) |
2578 0;
2579
2580 dw[1] =
2581 __gen_field(values->ConstantBufferValid, 16, 31) |
2582 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2583 0;
2584
2585 dw[2] =
2586 __gen_offset(values->GatherBufferOffset, 6, 22) |
2587 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2588 __gen_field(values->ConstantBufferDx9Enable, 4, 4) |
2589 0;
2590
2591 /* variable length fields follow */
2592 }
2593
2594 #define GEN8_3DSTATE_GATHER_POOL_ALLOC_length 0x00000004
2595 #define GEN8_3DSTATE_GATHER_POOL_ALLOC_length_bias 0x00000002
2596 #define GEN8_3DSTATE_GATHER_POOL_ALLOC_header \
2597 .CommandType = 3, \
2598 .CommandSubType = 3, \
2599 ._3DCommandOpcode = 1, \
2600 ._3DCommandSubOpcode = 26, \
2601 .DwordLength = 2
2602
2603 struct GEN8_3DSTATE_GATHER_POOL_ALLOC {
2604 uint32_t CommandType;
2605 uint32_t CommandSubType;
2606 uint32_t _3DCommandOpcode;
2607 uint32_t _3DCommandSubOpcode;
2608 uint32_t DwordLength;
2609 __gen_address_type GatherPoolBaseAddress;
2610 uint32_t GatherPoolEnable;
2611 struct GEN8_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
2612 uint32_t GatherPoolBufferSize;
2613 };
2614
2615 static inline void
2616 GEN8_3DSTATE_GATHER_POOL_ALLOC_pack(__gen_user_data *data, void * restrict dst,
2617 const struct GEN8_3DSTATE_GATHER_POOL_ALLOC * restrict values)
2618 {
2619 uint32_t *dw = (uint32_t * restrict) dst;
2620
2621 dw[0] =
2622 __gen_field(values->CommandType, 29, 31) |
2623 __gen_field(values->CommandSubType, 27, 28) |
2624 __gen_field(values->_3DCommandOpcode, 24, 26) |
2625 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2626 __gen_field(values->DwordLength, 0, 7) |
2627 0;
2628
2629 uint32_t dw_MemoryObjectControlState;
2630 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
2631 uint32_t dw1 =
2632 __gen_field(values->GatherPoolEnable, 11, 11) |
2633 __gen_field(dw_MemoryObjectControlState, 0, 6) |
2634 0;
2635
2636 uint64_t qw1 =
2637 __gen_combine_address(data, &dw[1], values->GatherPoolBaseAddress, dw1);
2638
2639 dw[1] = qw1;
2640 dw[2] = qw1 >> 32;
2641
2642 dw[3] =
2643 __gen_field(values->GatherPoolBufferSize, 12, 31) |
2644 0;
2645
2646 }
2647
2648 #define GEN8_3DSTATE_GS_length 0x0000000a
2649 #define GEN8_3DSTATE_GS_length_bias 0x00000002
2650 #define GEN8_3DSTATE_GS_header \
2651 .CommandType = 3, \
2652 .CommandSubType = 3, \
2653 ._3DCommandOpcode = 0, \
2654 ._3DCommandSubOpcode = 17, \
2655 .DwordLength = 8
2656
2657 struct GEN8_3DSTATE_GS {
2658 uint32_t CommandType;
2659 uint32_t CommandSubType;
2660 uint32_t _3DCommandOpcode;
2661 uint32_t _3DCommandSubOpcode;
2662 uint32_t DwordLength;
2663 uint64_t KernelStartPointer;
2664 uint32_t SingleProgramFlow;
2665 #define Dmask 0
2666 #define Vmask 1
2667 uint32_t VectorMaskEnable;
2668 #define NoSamplers 0
2669 #define _14Samplers 1
2670 #define _58Samplers 2
2671 #define _912Samplers 3
2672 #define _1316Samplers 4
2673 uint32_t SamplerCount;
2674 uint32_t BindingTableEntryCount;
2675 #define Normal 0
2676 #define High 1
2677 uint32_t ThreadDispatchPriority;
2678 #define IEEE754 0
2679 #define Alternate 1
2680 uint32_t FloatingPointMode;
2681 uint32_t IllegalOpcodeExceptionEnable;
2682 uint32_t AccessesUAV;
2683 uint32_t MaskStackExceptionEnable;
2684 uint32_t SoftwareExceptionEnable;
2685 uint32_t ExpectedVertexCount;
2686 uint64_t ScratchSpaceBasePointer;
2687 uint32_t PerThreadScratchSpace;
2688 uint32_t OutputVertexSize;
2689 uint32_t OutputTopology;
2690 uint32_t VertexURBEntryReadLength;
2691 uint32_t IncludeVertexHandles;
2692 uint32_t VertexURBEntryReadOffset;
2693 uint32_t DispatchGRFStartRegisterForURBData;
2694 uint32_t MaximumNumberofThreads;
2695 uint32_t ControlDataHeaderSize;
2696 uint32_t InstanceControl;
2697 uint32_t DefaultStreamId;
2698 #define DispatchModeSingle 0
2699 #define DispatchModeDualInstance 1
2700 #define DispatchModeDualObject 2
2701 #define DispatchModeSIMD8 3
2702 uint32_t DispatchMode;
2703 uint32_t StatisticsEnable;
2704 uint32_t InvocationsIncrementValue;
2705 uint32_t IncludePrimitiveID;
2706 uint32_t Hint;
2707 #define LEADING 0
2708 #define TRAILING 1
2709 uint32_t ReorderMode;
2710 uint32_t DiscardAdjacency;
2711 uint32_t Enable;
2712 #define CUT 0
2713 #define SID 1
2714 uint32_t ControlDataFormat;
2715 uint32_t StaticOutput;
2716 uint32_t StaticOutputVertexCount;
2717 uint32_t VertexURBEntryOutputReadOffset;
2718 uint32_t VertexURBEntryOutputLength;
2719 uint32_t UserClipDistanceClipTestEnableBitmask;
2720 uint32_t UserClipDistanceCullTestEnableBitmask;
2721 };
2722
2723 static inline void
2724 GEN8_3DSTATE_GS_pack(__gen_user_data *data, void * restrict dst,
2725 const struct GEN8_3DSTATE_GS * restrict values)
2726 {
2727 uint32_t *dw = (uint32_t * restrict) dst;
2728
2729 dw[0] =
2730 __gen_field(values->CommandType, 29, 31) |
2731 __gen_field(values->CommandSubType, 27, 28) |
2732 __gen_field(values->_3DCommandOpcode, 24, 26) |
2733 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2734 __gen_field(values->DwordLength, 0, 7) |
2735 0;
2736
2737 uint64_t qw1 =
2738 __gen_offset(values->KernelStartPointer, 6, 63) |
2739 0;
2740
2741 dw[1] = qw1;
2742 dw[2] = qw1 >> 32;
2743
2744 dw[3] =
2745 __gen_field(values->SingleProgramFlow, 31, 31) |
2746 __gen_field(values->VectorMaskEnable, 30, 30) |
2747 __gen_field(values->SamplerCount, 27, 29) |
2748 __gen_field(values->BindingTableEntryCount, 18, 25) |
2749 __gen_field(values->ThreadDispatchPriority, 17, 17) |
2750 __gen_field(values->FloatingPointMode, 16, 16) |
2751 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2752 __gen_field(values->AccessesUAV, 12, 12) |
2753 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
2754 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
2755 __gen_field(values->ExpectedVertexCount, 0, 5) |
2756 0;
2757
2758 uint64_t qw4 =
2759 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
2760 __gen_field(values->PerThreadScratchSpace, 0, 3) |
2761 0;
2762
2763 dw[4] = qw4;
2764 dw[5] = qw4 >> 32;
2765
2766 dw[6] =
2767 __gen_field(values->OutputVertexSize, 23, 28) |
2768 __gen_field(values->OutputTopology, 17, 22) |
2769 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
2770 __gen_field(values->IncludeVertexHandles, 10, 10) |
2771 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
2772 __gen_field(values->DispatchGRFStartRegisterForURBData, 0, 3) |
2773 0;
2774
2775 dw[7] =
2776 __gen_field(values->MaximumNumberofThreads, 24, 31) |
2777 __gen_field(values->ControlDataHeaderSize, 20, 23) |
2778 __gen_field(values->InstanceControl, 15, 19) |
2779 __gen_field(values->DefaultStreamId, 13, 14) |
2780 __gen_field(values->DispatchMode, 11, 12) |
2781 __gen_field(values->StatisticsEnable, 10, 10) |
2782 __gen_field(values->InvocationsIncrementValue, 5, 9) |
2783 __gen_field(values->IncludePrimitiveID, 4, 4) |
2784 __gen_field(values->Hint, 3, 3) |
2785 __gen_field(values->ReorderMode, 2, 2) |
2786 __gen_field(values->DiscardAdjacency, 1, 1) |
2787 __gen_field(values->Enable, 0, 0) |
2788 0;
2789
2790 dw[8] =
2791 __gen_field(values->ControlDataFormat, 31, 31) |
2792 __gen_field(values->StaticOutput, 30, 30) |
2793 __gen_field(values->StaticOutputVertexCount, 16, 26) |
2794 0;
2795
2796 dw[9] =
2797 __gen_field(values->VertexURBEntryOutputReadOffset, 21, 26) |
2798 __gen_field(values->VertexURBEntryOutputLength, 16, 20) |
2799 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 8, 15) |
2800 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
2801 0;
2802
2803 }
2804
2805 #define GEN8_3DSTATE_HIER_DEPTH_BUFFER_length 0x00000005
2806 #define GEN8_3DSTATE_HIER_DEPTH_BUFFER_length_bias 0x00000002
2807 #define GEN8_3DSTATE_HIER_DEPTH_BUFFER_header \
2808 .CommandType = 3, \
2809 .CommandSubType = 3, \
2810 ._3DCommandOpcode = 0, \
2811 ._3DCommandSubOpcode = 7, \
2812 .DwordLength = 3
2813
2814 struct GEN8_3DSTATE_HIER_DEPTH_BUFFER {
2815 uint32_t CommandType;
2816 uint32_t CommandSubType;
2817 uint32_t _3DCommandOpcode;
2818 uint32_t _3DCommandSubOpcode;
2819 uint32_t DwordLength;
2820 struct GEN8_MEMORY_OBJECT_CONTROL_STATE HierarchicalDepthBufferObjectControlState;
2821 uint32_t SurfacePitch;
2822 __gen_address_type SurfaceBaseAddress;
2823 uint32_t SurfaceQPitch;
2824 };
2825
2826 static inline void
2827 GEN8_3DSTATE_HIER_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
2828 const struct GEN8_3DSTATE_HIER_DEPTH_BUFFER * restrict values)
2829 {
2830 uint32_t *dw = (uint32_t * restrict) dst;
2831
2832 dw[0] =
2833 __gen_field(values->CommandType, 29, 31) |
2834 __gen_field(values->CommandSubType, 27, 28) |
2835 __gen_field(values->_3DCommandOpcode, 24, 26) |
2836 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2837 __gen_field(values->DwordLength, 0, 7) |
2838 0;
2839
2840 uint32_t dw_HierarchicalDepthBufferObjectControlState;
2841 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_HierarchicalDepthBufferObjectControlState, &values->HierarchicalDepthBufferObjectControlState);
2842 dw[1] =
2843 __gen_field(dw_HierarchicalDepthBufferObjectControlState, 25, 31) |
2844 __gen_field(values->SurfacePitch, 0, 16) |
2845 0;
2846
2847 uint32_t dw2 =
2848 0;
2849
2850 uint64_t qw2 =
2851 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
2852
2853 dw[2] = qw2;
2854 dw[3] = qw2 >> 32;
2855
2856 dw[4] =
2857 __gen_field(values->SurfaceQPitch, 0, 14) |
2858 0;
2859
2860 }
2861
2862 #define GEN8_3DSTATE_HS_length 0x00000009
2863 #define GEN8_3DSTATE_HS_length_bias 0x00000002
2864 #define GEN8_3DSTATE_HS_header \
2865 .CommandType = 3, \
2866 .CommandSubType = 3, \
2867 ._3DCommandOpcode = 0, \
2868 ._3DCommandSubOpcode = 27, \
2869 .DwordLength = 7
2870
2871 struct GEN8_3DSTATE_HS {
2872 uint32_t CommandType;
2873 uint32_t CommandSubType;
2874 uint32_t _3DCommandOpcode;
2875 uint32_t _3DCommandSubOpcode;
2876 uint32_t DwordLength;
2877 #define NoSamplers 0
2878 #define _14Samplers 1
2879 #define _58Samplers 2
2880 #define _912Samplers 3
2881 #define _1316Samplers 4
2882 uint32_t SamplerCount;
2883 uint32_t BindingTableEntryCount;
2884 #define Normal 0
2885 #define High 1
2886 uint32_t ThreadDispatchPriority;
2887 #define IEEE754 0
2888 #define alternate 1
2889 uint32_t FloatingPointMode;
2890 uint32_t IllegalOpcodeExceptionEnable;
2891 uint32_t SoftwareExceptionEnable;
2892 uint32_t Enable;
2893 uint32_t StatisticsEnable;
2894 uint32_t MaximumNumberofThreads;
2895 uint32_t InstanceCount;
2896 uint64_t KernelStartPointer;
2897 uint64_t ScratchSpaceBasePointer;
2898 uint32_t PerThreadScratchSpace;
2899 uint32_t SingleProgramFlow;
2900 #define Dmask 0
2901 #define Vmask 1
2902 uint32_t VectorMaskEnable;
2903 uint32_t AccessesUAV;
2904 uint32_t IncludeVertexHandles;
2905 uint32_t DispatchGRFStartRegisterForURBData;
2906 uint32_t VertexURBEntryReadLength;
2907 uint32_t VertexURBEntryReadOffset;
2908 };
2909
2910 static inline void
2911 GEN8_3DSTATE_HS_pack(__gen_user_data *data, void * restrict dst,
2912 const struct GEN8_3DSTATE_HS * restrict values)
2913 {
2914 uint32_t *dw = (uint32_t * restrict) dst;
2915
2916 dw[0] =
2917 __gen_field(values->CommandType, 29, 31) |
2918 __gen_field(values->CommandSubType, 27, 28) |
2919 __gen_field(values->_3DCommandOpcode, 24, 26) |
2920 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2921 __gen_field(values->DwordLength, 0, 7) |
2922 0;
2923
2924 dw[1] =
2925 __gen_field(values->SamplerCount, 27, 29) |
2926 __gen_field(values->BindingTableEntryCount, 18, 25) |
2927 __gen_field(values->ThreadDispatchPriority, 17, 17) |
2928 __gen_field(values->FloatingPointMode, 16, 16) |
2929 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2930 __gen_field(values->SoftwareExceptionEnable, 12, 12) |
2931 0;
2932
2933 dw[2] =
2934 __gen_field(values->Enable, 31, 31) |
2935 __gen_field(values->StatisticsEnable, 29, 29) |
2936 __gen_field(values->MaximumNumberofThreads, 8, 16) |
2937 __gen_field(values->InstanceCount, 0, 3) |
2938 0;
2939
2940 uint64_t qw3 =
2941 __gen_offset(values->KernelStartPointer, 6, 63) |
2942 0;
2943
2944 dw[3] = qw3;
2945 dw[4] = qw3 >> 32;
2946
2947 uint64_t qw5 =
2948 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
2949 __gen_field(values->PerThreadScratchSpace, 0, 3) |
2950 0;
2951
2952 dw[5] = qw5;
2953 dw[6] = qw5 >> 32;
2954
2955 dw[7] =
2956 __gen_field(values->SingleProgramFlow, 27, 27) |
2957 __gen_field(values->VectorMaskEnable, 26, 26) |
2958 __gen_field(values->AccessesUAV, 25, 25) |
2959 __gen_field(values->IncludeVertexHandles, 24, 24) |
2960 __gen_field(values->DispatchGRFStartRegisterForURBData, 19, 23) |
2961 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
2962 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
2963 0;
2964
2965 dw[8] =
2966 0;
2967
2968 }
2969
2970 #define GEN8_3DSTATE_INDEX_BUFFER_length 0x00000005
2971 #define GEN8_3DSTATE_INDEX_BUFFER_length_bias 0x00000002
2972 #define GEN8_3DSTATE_INDEX_BUFFER_header \
2973 .CommandType = 3, \
2974 .CommandSubType = 3, \
2975 ._3DCommandOpcode = 0, \
2976 ._3DCommandSubOpcode = 10, \
2977 .DwordLength = 3
2978
2979 struct GEN8_3DSTATE_INDEX_BUFFER {
2980 uint32_t CommandType;
2981 uint32_t CommandSubType;
2982 uint32_t _3DCommandOpcode;
2983 uint32_t _3DCommandSubOpcode;
2984 uint32_t DwordLength;
2985 #define INDEX_BYTE 0
2986 #define INDEX_WORD 1
2987 #define INDEX_DWORD 2
2988 uint32_t IndexFormat;
2989 struct GEN8_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
2990 __gen_address_type BufferStartingAddress;
2991 uint32_t BufferSize;
2992 };
2993
2994 static inline void
2995 GEN8_3DSTATE_INDEX_BUFFER_pack(__gen_user_data *data, void * restrict dst,
2996 const struct GEN8_3DSTATE_INDEX_BUFFER * restrict values)
2997 {
2998 uint32_t *dw = (uint32_t * restrict) dst;
2999
3000 dw[0] =
3001 __gen_field(values->CommandType, 29, 31) |
3002 __gen_field(values->CommandSubType, 27, 28) |
3003 __gen_field(values->_3DCommandOpcode, 24, 26) |
3004 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3005 __gen_field(values->DwordLength, 0, 7) |
3006 0;
3007
3008 uint32_t dw_MemoryObjectControlState;
3009 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
3010 dw[1] =
3011 __gen_field(values->IndexFormat, 8, 9) |
3012 __gen_field(dw_MemoryObjectControlState, 0, 6) |
3013 0;
3014
3015 uint32_t dw2 =
3016 0;
3017
3018 uint64_t qw2 =
3019 __gen_combine_address(data, &dw[2], values->BufferStartingAddress, dw2);
3020
3021 dw[2] = qw2;
3022 dw[3] = qw2 >> 32;
3023
3024 dw[4] =
3025 __gen_field(values->BufferSize, 0, 31) |
3026 0;
3027
3028 }
3029
3030 #define GEN8_3DSTATE_LINE_STIPPLE_length 0x00000003
3031 #define GEN8_3DSTATE_LINE_STIPPLE_length_bias 0x00000002
3032 #define GEN8_3DSTATE_LINE_STIPPLE_header \
3033 .CommandType = 3, \
3034 .CommandSubType = 3, \
3035 ._3DCommandOpcode = 1, \
3036 ._3DCommandSubOpcode = 8, \
3037 .DwordLength = 1
3038
3039 struct GEN8_3DSTATE_LINE_STIPPLE {
3040 uint32_t CommandType;
3041 uint32_t CommandSubType;
3042 uint32_t _3DCommandOpcode;
3043 uint32_t _3DCommandSubOpcode;
3044 uint32_t DwordLength;
3045 uint32_t ModifyEnableCurrentRepeatCounterCurrentStippleIndex;
3046 uint32_t CurrentRepeatCounter;
3047 uint32_t CurrentStippleIndex;
3048 uint32_t LineStipplePattern;
3049 float LineStippleInverseRepeatCount;
3050 uint32_t LineStippleRepeatCount;
3051 };
3052
3053 static inline void
3054 GEN8_3DSTATE_LINE_STIPPLE_pack(__gen_user_data *data, void * restrict dst,
3055 const struct GEN8_3DSTATE_LINE_STIPPLE * restrict values)
3056 {
3057 uint32_t *dw = (uint32_t * restrict) dst;
3058
3059 dw[0] =
3060 __gen_field(values->CommandType, 29, 31) |
3061 __gen_field(values->CommandSubType, 27, 28) |
3062 __gen_field(values->_3DCommandOpcode, 24, 26) |
3063 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3064 __gen_field(values->DwordLength, 0, 7) |
3065 0;
3066
3067 dw[1] =
3068 __gen_field(values->ModifyEnableCurrentRepeatCounterCurrentStippleIndex, 31, 31) |
3069 __gen_field(values->CurrentRepeatCounter, 21, 29) |
3070 __gen_field(values->CurrentStippleIndex, 16, 19) |
3071 __gen_field(values->LineStipplePattern, 0, 15) |
3072 0;
3073
3074 dw[2] =
3075 __gen_field(values->LineStippleInverseRepeatCount * (1 << 16), 15, 31) |
3076 __gen_field(values->LineStippleRepeatCount, 0, 8) |
3077 0;
3078
3079 }
3080
3081 #define GEN8_3DSTATE_MONOFILTER_SIZE_length 0x00000002
3082 #define GEN8_3DSTATE_MONOFILTER_SIZE_length_bias 0x00000002
3083 #define GEN8_3DSTATE_MONOFILTER_SIZE_header \
3084 .CommandType = 3, \
3085 .CommandSubType = 3, \
3086 ._3DCommandOpcode = 1, \
3087 ._3DCommandSubOpcode = 17, \
3088 .DwordLength = 0
3089
3090 struct GEN8_3DSTATE_MONOFILTER_SIZE {
3091 uint32_t CommandType;
3092 uint32_t CommandSubType;
3093 uint32_t _3DCommandOpcode;
3094 uint32_t _3DCommandSubOpcode;
3095 uint32_t DwordLength;
3096 uint32_t MonochromeFilterWidth;
3097 uint32_t MonochromeFilterHeight;
3098 };
3099
3100 static inline void
3101 GEN8_3DSTATE_MONOFILTER_SIZE_pack(__gen_user_data *data, void * restrict dst,
3102 const struct GEN8_3DSTATE_MONOFILTER_SIZE * restrict values)
3103 {
3104 uint32_t *dw = (uint32_t * restrict) dst;
3105
3106 dw[0] =
3107 __gen_field(values->CommandType, 29, 31) |
3108 __gen_field(values->CommandSubType, 27, 28) |
3109 __gen_field(values->_3DCommandOpcode, 24, 26) |
3110 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3111 __gen_field(values->DwordLength, 0, 7) |
3112 0;
3113
3114 dw[1] =
3115 __gen_field(values->MonochromeFilterWidth, 3, 5) |
3116 __gen_field(values->MonochromeFilterHeight, 0, 2) |
3117 0;
3118
3119 }
3120
3121 #define GEN8_3DSTATE_MULTISAMPLE_length 0x00000002
3122 #define GEN8_3DSTATE_MULTISAMPLE_length_bias 0x00000002
3123 #define GEN8_3DSTATE_MULTISAMPLE_header \
3124 .CommandType = 3, \
3125 .CommandSubType = 3, \
3126 ._3DCommandOpcode = 0, \
3127 ._3DCommandSubOpcode = 13, \
3128 .DwordLength = 0
3129
3130 struct GEN8_3DSTATE_MULTISAMPLE {
3131 uint32_t CommandType;
3132 uint32_t CommandSubType;
3133 uint32_t _3DCommandOpcode;
3134 uint32_t _3DCommandSubOpcode;
3135 uint32_t DwordLength;
3136 uint32_t PixelPositionOffsetEnable;
3137 #define CENTER 0
3138 #define UL_CORNER 1
3139 uint32_t PixelLocation;
3140 uint32_t NumberofMultisamples;
3141 };
3142
3143 static inline void
3144 GEN8_3DSTATE_MULTISAMPLE_pack(__gen_user_data *data, void * restrict dst,
3145 const struct GEN8_3DSTATE_MULTISAMPLE * restrict values)
3146 {
3147 uint32_t *dw = (uint32_t * restrict) dst;
3148
3149 dw[0] =
3150 __gen_field(values->CommandType, 29, 31) |
3151 __gen_field(values->CommandSubType, 27, 28) |
3152 __gen_field(values->_3DCommandOpcode, 24, 26) |
3153 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3154 __gen_field(values->DwordLength, 0, 7) |
3155 0;
3156
3157 dw[1] =
3158 __gen_field(values->PixelPositionOffsetEnable, 5, 5) |
3159 __gen_field(values->PixelLocation, 4, 4) |
3160 __gen_field(values->NumberofMultisamples, 1, 3) |
3161 0;
3162
3163 }
3164
3165 #define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_length 0x00000002
3166 #define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_length_bias 0x00000002
3167 #define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_header \
3168 .CommandType = 3, \
3169 .CommandSubType = 3, \
3170 ._3DCommandOpcode = 1, \
3171 ._3DCommandSubOpcode = 6, \
3172 .DwordLength = 0
3173
3174 struct GEN8_3DSTATE_POLY_STIPPLE_OFFSET {
3175 uint32_t CommandType;
3176 uint32_t CommandSubType;
3177 uint32_t _3DCommandOpcode;
3178 uint32_t _3DCommandSubOpcode;
3179 uint32_t DwordLength;
3180 uint32_t PolygonStippleXOffset;
3181 uint32_t PolygonStippleYOffset;
3182 };
3183
3184 static inline void
3185 GEN8_3DSTATE_POLY_STIPPLE_OFFSET_pack(__gen_user_data *data, void * restrict dst,
3186 const struct GEN8_3DSTATE_POLY_STIPPLE_OFFSET * restrict values)
3187 {
3188 uint32_t *dw = (uint32_t * restrict) dst;
3189
3190 dw[0] =
3191 __gen_field(values->CommandType, 29, 31) |
3192 __gen_field(values->CommandSubType, 27, 28) |
3193 __gen_field(values->_3DCommandOpcode, 24, 26) |
3194 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3195 __gen_field(values->DwordLength, 0, 7) |
3196 0;
3197
3198 dw[1] =
3199 __gen_field(values->PolygonStippleXOffset, 8, 12) |
3200 __gen_field(values->PolygonStippleYOffset, 0, 4) |
3201 0;
3202
3203 }
3204
3205 #define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_length 0x00000021
3206 #define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_length_bias 0x00000002
3207 #define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_header\
3208 .CommandType = 3, \
3209 .CommandSubType = 3, \
3210 ._3DCommandOpcode = 1, \
3211 ._3DCommandSubOpcode = 7, \
3212 .DwordLength = 31
3213
3214 struct GEN8_3DSTATE_POLY_STIPPLE_PATTERN {
3215 uint32_t CommandType;
3216 uint32_t CommandSubType;
3217 uint32_t _3DCommandOpcode;
3218 uint32_t _3DCommandSubOpcode;
3219 uint32_t DwordLength;
3220 uint32_t PatternRow;
3221 };
3222
3223 static inline void
3224 GEN8_3DSTATE_POLY_STIPPLE_PATTERN_pack(__gen_user_data *data, void * restrict dst,
3225 const struct GEN8_3DSTATE_POLY_STIPPLE_PATTERN * restrict values)
3226 {
3227 uint32_t *dw = (uint32_t * restrict) dst;
3228
3229 dw[0] =
3230 __gen_field(values->CommandType, 29, 31) |
3231 __gen_field(values->CommandSubType, 27, 28) |
3232 __gen_field(values->_3DCommandOpcode, 24, 26) |
3233 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3234 __gen_field(values->DwordLength, 0, 7) |
3235 0;
3236
3237 dw[1] =
3238 __gen_field(values->PatternRow, 0, 31) |
3239 0;
3240
3241 }
3242
3243 #define GEN8_3DSTATE_PS_length 0x0000000c
3244 #define GEN8_3DSTATE_PS_length_bias 0x00000002
3245 #define GEN8_3DSTATE_PS_header \
3246 .CommandType = 3, \
3247 .CommandSubType = 3, \
3248 ._3DCommandOpcode = 0, \
3249 ._3DCommandSubOpcode = 32, \
3250 .DwordLength = 10
3251
3252 struct GEN8_3DSTATE_PS {
3253 uint32_t CommandType;
3254 uint32_t CommandSubType;
3255 uint32_t _3DCommandOpcode;
3256 uint32_t _3DCommandSubOpcode;
3257 uint32_t DwordLength;
3258 uint64_t KernelStartPointer0;
3259 #define Multiple 0
3260 #define Single 1
3261 uint32_t SingleProgramFlow;
3262 #define Dmask 0
3263 #define Vmask 1
3264 uint32_t VectorMaskEnable;
3265 #define NoSamplers 0
3266 #define _14Samplers 1
3267 #define _58Samplers 2
3268 #define _912Samplers 3
3269 #define _1316Samplers 4
3270 uint32_t SamplerCount;
3271 #define FlushedtoZero 0
3272 #define Retained 1
3273 uint32_t SinglePrecisionDenormalMode;
3274 uint32_t BindingTableEntryCount;
3275 #define Normal 0
3276 #define High 1
3277 uint32_t ThreadDispatchPriority;
3278 #define IEEE754 0
3279 #define Alternate 1
3280 uint32_t FloatingPointMode;
3281 #define RTNE 0
3282 #define RU 1
3283 #define RD 2
3284 #define RTZ 3
3285 uint32_t RoundingMode;
3286 uint32_t IllegalOpcodeExceptionEnable;
3287 uint32_t MaskStackExceptionEnable;
3288 uint32_t SoftwareExceptionEnable;
3289 uint64_t ScratchSpaceBasePointer;
3290 uint32_t PerThreadScratchSpace;
3291 uint32_t MaximumNumberofThreadsPerPSD;
3292 uint32_t PushConstantEnable;
3293 uint32_t RenderTargetFastClearEnable;
3294 uint32_t RenderTargetResolveEnable;
3295 #define POSOFFSET_NONE 0
3296 #define POSOFFSET_CENTROID 2
3297 #define POSOFFSET_SAMPLE 3
3298 uint32_t PositionXYOffsetSelect;
3299 uint32_t _32PixelDispatchEnable;
3300 uint32_t _16PixelDispatchEnable;
3301 uint32_t _8PixelDispatchEnable;
3302 uint32_t DispatchGRFStartRegisterForConstantSetupData0;
3303 uint32_t DispatchGRFStartRegisterForConstantSetupData1;
3304 uint32_t DispatchGRFStartRegisterForConstantSetupData2;
3305 uint64_t KernelStartPointer1;
3306 uint64_t KernelStartPointer2;
3307 };
3308
3309 static inline void
3310 GEN8_3DSTATE_PS_pack(__gen_user_data *data, void * restrict dst,
3311 const struct GEN8_3DSTATE_PS * restrict values)
3312 {
3313 uint32_t *dw = (uint32_t * restrict) dst;
3314
3315 dw[0] =
3316 __gen_field(values->CommandType, 29, 31) |
3317 __gen_field(values->CommandSubType, 27, 28) |
3318 __gen_field(values->_3DCommandOpcode, 24, 26) |
3319 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3320 __gen_field(values->DwordLength, 0, 7) |
3321 0;
3322
3323 uint64_t qw1 =
3324 __gen_offset(values->KernelStartPointer0, 6, 63) |
3325 0;
3326
3327 dw[1] = qw1;
3328 dw[2] = qw1 >> 32;
3329
3330 dw[3] =
3331 __gen_field(values->SingleProgramFlow, 31, 31) |
3332 __gen_field(values->VectorMaskEnable, 30, 30) |
3333 __gen_field(values->SamplerCount, 27, 29) |
3334 __gen_field(values->SinglePrecisionDenormalMode, 26, 26) |
3335 __gen_field(values->BindingTableEntryCount, 18, 25) |
3336 __gen_field(values->ThreadDispatchPriority, 17, 17) |
3337 __gen_field(values->FloatingPointMode, 16, 16) |
3338 __gen_field(values->RoundingMode, 14, 15) |
3339 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
3340 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
3341 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
3342 0;
3343
3344 uint64_t qw4 =
3345 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
3346 __gen_field(values->PerThreadScratchSpace, 0, 3) |
3347 0;
3348
3349 dw[4] = qw4;
3350 dw[5] = qw4 >> 32;
3351
3352 dw[6] =
3353 __gen_field(values->MaximumNumberofThreadsPerPSD, 23, 31) |
3354 __gen_field(values->PushConstantEnable, 11, 11) |
3355 __gen_field(values->RenderTargetFastClearEnable, 8, 8) |
3356 __gen_field(values->RenderTargetResolveEnable, 6, 6) |
3357 __gen_field(values->PositionXYOffsetSelect, 3, 4) |
3358 __gen_field(values->_32PixelDispatchEnable, 2, 2) |
3359 __gen_field(values->_16PixelDispatchEnable, 1, 1) |
3360 __gen_field(values->_8PixelDispatchEnable, 0, 0) |
3361 0;
3362
3363 dw[7] =
3364 __gen_field(values->DispatchGRFStartRegisterForConstantSetupData0, 16, 22) |
3365 __gen_field(values->DispatchGRFStartRegisterForConstantSetupData1, 8, 14) |
3366 __gen_field(values->DispatchGRFStartRegisterForConstantSetupData2, 0, 6) |
3367 0;
3368
3369 uint64_t qw8 =
3370 __gen_offset(values->KernelStartPointer1, 6, 63) |
3371 0;
3372
3373 dw[8] = qw8;
3374 dw[9] = qw8 >> 32;
3375
3376 uint64_t qw10 =
3377 __gen_offset(values->KernelStartPointer2, 6, 63) |
3378 0;
3379
3380 dw[10] = qw10;
3381 dw[11] = qw10 >> 32;
3382
3383 }
3384
3385 #define GEN8_3DSTATE_PS_BLEND_length 0x00000002
3386 #define GEN8_3DSTATE_PS_BLEND_length_bias 0x00000002
3387 #define GEN8_3DSTATE_PS_BLEND_header \
3388 .CommandType = 3, \
3389 .CommandSubType = 3, \
3390 ._3DCommandOpcode = 0, \
3391 ._3DCommandSubOpcode = 77, \
3392 .DwordLength = 0
3393
3394 struct GEN8_3DSTATE_PS_BLEND {
3395 uint32_t CommandType;
3396 uint32_t CommandSubType;
3397 uint32_t _3DCommandOpcode;
3398 uint32_t _3DCommandSubOpcode;
3399 uint32_t DwordLength;
3400 uint32_t AlphaToCoverageEnable;
3401 uint32_t HasWriteableRT;
3402 uint32_t ColorBufferBlendEnable;
3403 uint32_t SourceAlphaBlendFactor;
3404 uint32_t DestinationAlphaBlendFactor;
3405 uint32_t SourceBlendFactor;
3406 uint32_t DestinationBlendFactor;
3407 uint32_t AlphaTestEnable;
3408 uint32_t IndependentAlphaBlendEnable;
3409 };
3410
3411 static inline void
3412 GEN8_3DSTATE_PS_BLEND_pack(__gen_user_data *data, void * restrict dst,
3413 const struct GEN8_3DSTATE_PS_BLEND * restrict values)
3414 {
3415 uint32_t *dw = (uint32_t * restrict) dst;
3416
3417 dw[0] =
3418 __gen_field(values->CommandType, 29, 31) |
3419 __gen_field(values->CommandSubType, 27, 28) |
3420 __gen_field(values->_3DCommandOpcode, 24, 26) |
3421 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3422 __gen_field(values->DwordLength, 0, 7) |
3423 0;
3424
3425 dw[1] =
3426 __gen_field(values->AlphaToCoverageEnable, 31, 31) |
3427 __gen_field(values->HasWriteableRT, 30, 30) |
3428 __gen_field(values->ColorBufferBlendEnable, 29, 29) |
3429 __gen_field(values->SourceAlphaBlendFactor, 24, 28) |
3430 __gen_field(values->DestinationAlphaBlendFactor, 19, 23) |
3431 __gen_field(values->SourceBlendFactor, 14, 18) |
3432 __gen_field(values->DestinationBlendFactor, 9, 13) |
3433 __gen_field(values->AlphaTestEnable, 8, 8) |
3434 __gen_field(values->IndependentAlphaBlendEnable, 7, 7) |
3435 0;
3436
3437 }
3438
3439 #define GEN8_3DSTATE_PS_EXTRA_length 0x00000002
3440 #define GEN8_3DSTATE_PS_EXTRA_length_bias 0x00000002
3441 #define GEN8_3DSTATE_PS_EXTRA_header \
3442 .CommandType = 3, \
3443 .CommandSubType = 3, \
3444 ._3DCommandOpcode = 0, \
3445 ._3DCommandSubOpcode = 79, \
3446 .DwordLength = 0
3447
3448 struct GEN8_3DSTATE_PS_EXTRA {
3449 uint32_t CommandType;
3450 uint32_t CommandSubType;
3451 uint32_t _3DCommandOpcode;
3452 uint32_t _3DCommandSubOpcode;
3453 uint32_t DwordLength;
3454 uint32_t PixelShaderValid;
3455 uint32_t PixelShaderDoesnotwritetoRT;
3456 uint32_t oMaskPresenttoRenderTarget;
3457 uint32_t PixelShaderKillsPixel;
3458 #define PSCDEPTH_OFF 0
3459 #define PSCDEPTH_ON 1
3460 #define PSCDEPTH_ON_GE 2
3461 #define PSCDEPTH_ON_LE 3
3462 uint32_t PixelShaderComputedDepthMode;
3463 uint32_t ForceComputedDepth;
3464 uint32_t PixelShaderUsesSourceDepth;
3465 uint32_t PixelShaderUsesSourceW;
3466 uint32_t Removed;
3467 uint32_t AttributeEnable;
3468 uint32_t PixelShaderDisablesAlphaToCoverage;
3469 uint32_t PixelShaderIsPerSample;
3470 uint32_t PixelShaderHasUAV;
3471 uint32_t PixelShaderUsesInputCoverageMask;
3472 };
3473
3474 static inline void
3475 GEN8_3DSTATE_PS_EXTRA_pack(__gen_user_data *data, void * restrict dst,
3476 const struct GEN8_3DSTATE_PS_EXTRA * restrict values)
3477 {
3478 uint32_t *dw = (uint32_t * restrict) dst;
3479
3480 dw[0] =
3481 __gen_field(values->CommandType, 29, 31) |
3482 __gen_field(values->CommandSubType, 27, 28) |
3483 __gen_field(values->_3DCommandOpcode, 24, 26) |
3484 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3485 __gen_field(values->DwordLength, 0, 7) |
3486 0;
3487
3488 dw[1] =
3489 __gen_field(values->PixelShaderValid, 31, 31) |
3490 __gen_field(values->PixelShaderDoesnotwritetoRT, 30, 30) |
3491 __gen_field(values->oMaskPresenttoRenderTarget, 29, 29) |
3492 __gen_field(values->PixelShaderKillsPixel, 28, 28) |
3493 __gen_field(values->PixelShaderComputedDepthMode, 26, 27) |
3494 __gen_field(values->ForceComputedDepth, 25, 25) |
3495 __gen_field(values->PixelShaderUsesSourceDepth, 24, 24) |
3496 __gen_field(values->PixelShaderUsesSourceW, 23, 23) |
3497 __gen_field(values->Removed, 17, 17) |
3498 __gen_field(values->AttributeEnable, 8, 8) |
3499 __gen_field(values->PixelShaderDisablesAlphaToCoverage, 7, 7) |
3500 __gen_field(values->PixelShaderIsPerSample, 6, 6) |
3501 __gen_field(values->PixelShaderHasUAV, 2, 2) |
3502 __gen_field(values->PixelShaderUsesInputCoverageMask, 1, 1) |
3503 0;
3504
3505 }
3506
3507 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length 0x00000002
3508 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length_bias 0x00000002
3509 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_header\
3510 .CommandType = 3, \
3511 .CommandSubType = 3, \
3512 ._3DCommandOpcode = 1, \
3513 ._3DCommandSubOpcode = 20, \
3514 .DwordLength = 0
3515
3516 struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS {
3517 uint32_t CommandType;
3518 uint32_t CommandSubType;
3519 uint32_t _3DCommandOpcode;
3520 uint32_t _3DCommandSubOpcode;
3521 uint32_t DwordLength;
3522 uint32_t ConstantBufferOffset;
3523 uint32_t ConstantBufferSize;
3524 };
3525
3526 static inline void
3527 GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_pack(__gen_user_data *data, void * restrict dst,
3528 const struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS * restrict values)
3529 {
3530 uint32_t *dw = (uint32_t * restrict) dst;
3531
3532 dw[0] =
3533 __gen_field(values->CommandType, 29, 31) |
3534 __gen_field(values->CommandSubType, 27, 28) |
3535 __gen_field(values->_3DCommandOpcode, 24, 26) |
3536 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3537 __gen_field(values->DwordLength, 0, 7) |
3538 0;
3539
3540 dw[1] =
3541 __gen_field(values->ConstantBufferOffset, 16, 20) |
3542 __gen_field(values->ConstantBufferSize, 0, 5) |
3543 0;
3544
3545 }
3546
3547 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length 0x00000002
3548 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length_bias 0x00000002
3549 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_header\
3550 .CommandType = 3, \
3551 .CommandSubType = 3, \
3552 ._3DCommandOpcode = 1, \
3553 ._3DCommandSubOpcode = 21, \
3554 .DwordLength = 0
3555
3556 struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS {
3557 uint32_t CommandType;
3558 uint32_t CommandSubType;
3559 uint32_t _3DCommandOpcode;
3560 uint32_t _3DCommandSubOpcode;
3561 uint32_t DwordLength;
3562 uint32_t ConstantBufferOffset;
3563 uint32_t ConstantBufferSize;
3564 };
3565
3566 static inline void
3567 GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_pack(__gen_user_data *data, void * restrict dst,
3568 const struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS * restrict values)
3569 {
3570 uint32_t *dw = (uint32_t * restrict) dst;
3571
3572 dw[0] =
3573 __gen_field(values->CommandType, 29, 31) |
3574 __gen_field(values->CommandSubType, 27, 28) |
3575 __gen_field(values->_3DCommandOpcode, 24, 26) |
3576 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3577 __gen_field(values->DwordLength, 0, 7) |
3578 0;
3579
3580 dw[1] =
3581 __gen_field(values->ConstantBufferOffset, 16, 20) |
3582 __gen_field(values->ConstantBufferSize, 0, 5) |
3583 0;
3584
3585 }
3586
3587 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length 0x00000002
3588 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length_bias 0x00000002
3589 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_header\
3590 .CommandType = 3, \
3591 .CommandSubType = 3, \
3592 ._3DCommandOpcode = 1, \
3593 ._3DCommandSubOpcode = 19, \
3594 .DwordLength = 0
3595
3596 struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS {
3597 uint32_t CommandType;
3598 uint32_t CommandSubType;
3599 uint32_t _3DCommandOpcode;
3600 uint32_t _3DCommandSubOpcode;
3601 uint32_t DwordLength;
3602 uint32_t ConstantBufferOffset;
3603 uint32_t ConstantBufferSize;
3604 };
3605
3606 static inline void
3607 GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_pack(__gen_user_data *data, void * restrict dst,
3608 const struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS * restrict values)
3609 {
3610 uint32_t *dw = (uint32_t * restrict) dst;
3611
3612 dw[0] =
3613 __gen_field(values->CommandType, 29, 31) |
3614 __gen_field(values->CommandSubType, 27, 28) |
3615 __gen_field(values->_3DCommandOpcode, 24, 26) |
3616 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3617 __gen_field(values->DwordLength, 0, 7) |
3618 0;
3619
3620 dw[1] =
3621 __gen_field(values->ConstantBufferOffset, 16, 20) |
3622 __gen_field(values->ConstantBufferSize, 0, 5) |
3623 0;
3624
3625 }
3626
3627 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length 0x00000002
3628 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length_bias 0x00000002
3629 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_header\
3630 .CommandType = 3, \
3631 .CommandSubType = 3, \
3632 ._3DCommandOpcode = 1, \
3633 ._3DCommandSubOpcode = 22, \
3634 .DwordLength = 0
3635
3636 struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS {
3637 uint32_t CommandType;
3638 uint32_t CommandSubType;
3639 uint32_t _3DCommandOpcode;
3640 uint32_t _3DCommandSubOpcode;
3641 uint32_t DwordLength;
3642 uint32_t ConstantBufferOffset;
3643 uint32_t ConstantBufferSize;
3644 };
3645
3646 static inline void
3647 GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_pack(__gen_user_data *data, void * restrict dst,
3648 const struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS * restrict values)
3649 {
3650 uint32_t *dw = (uint32_t * restrict) dst;
3651
3652 dw[0] =
3653 __gen_field(values->CommandType, 29, 31) |
3654 __gen_field(values->CommandSubType, 27, 28) |
3655 __gen_field(values->_3DCommandOpcode, 24, 26) |
3656 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3657 __gen_field(values->DwordLength, 0, 7) |
3658 0;
3659
3660 dw[1] =
3661 __gen_field(values->ConstantBufferOffset, 16, 20) |
3662 __gen_field(values->ConstantBufferSize, 0, 5) |
3663 0;
3664
3665 }
3666
3667 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length 0x00000002
3668 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length_bias 0x00000002
3669 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_header\
3670 .CommandType = 3, \
3671 .CommandSubType = 3, \
3672 ._3DCommandOpcode = 1, \
3673 ._3DCommandSubOpcode = 18, \
3674 .DwordLength = 0
3675
3676 struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS {
3677 uint32_t CommandType;
3678 uint32_t CommandSubType;
3679 uint32_t _3DCommandOpcode;
3680 uint32_t _3DCommandSubOpcode;
3681 uint32_t DwordLength;
3682 uint32_t ConstantBufferOffset;
3683 uint32_t ConstantBufferSize;
3684 };
3685
3686 static inline void
3687 GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_pack(__gen_user_data *data, void * restrict dst,
3688 const struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS * restrict values)
3689 {
3690 uint32_t *dw = (uint32_t * restrict) dst;
3691
3692 dw[0] =
3693 __gen_field(values->CommandType, 29, 31) |
3694 __gen_field(values->CommandSubType, 27, 28) |
3695 __gen_field(values->_3DCommandOpcode, 24, 26) |
3696 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3697 __gen_field(values->DwordLength, 0, 7) |
3698 0;
3699
3700 dw[1] =
3701 __gen_field(values->ConstantBufferOffset, 16, 20) |
3702 __gen_field(values->ConstantBufferSize, 0, 5) |
3703 0;
3704
3705 }
3706
3707 #define GEN8_3DSTATE_RASTER_length 0x00000005
3708 #define GEN8_3DSTATE_RASTER_length_bias 0x00000002
3709 #define GEN8_3DSTATE_RASTER_header \
3710 .CommandType = 3, \
3711 .CommandSubType = 3, \
3712 ._3DCommandOpcode = 0, \
3713 ._3DCommandSubOpcode = 80, \
3714 .DwordLength = 3
3715
3716 struct GEN8_3DSTATE_RASTER {
3717 uint32_t CommandType;
3718 uint32_t CommandSubType;
3719 uint32_t _3DCommandOpcode;
3720 uint32_t _3DCommandSubOpcode;
3721 uint32_t DwordLength;
3722 #define DX9OGL 0
3723 #define DX100 1
3724 #define DX101 2
3725 uint32_t APIMode;
3726 #define Clockwise 0
3727 #define CounterClockwise 1
3728 uint32_t FrontWinding;
3729 #define FSC_NUMRASTSAMPLES_0 0
3730 #define FSC_NUMRASTSAMPLES_1 1
3731 #define FSC_NUMRASTSAMPLES_2 2
3732 #define FSC_NUMRASTSAMPLES_4 3
3733 #define FSC_NUMRASTSAMPLES_8 4
3734 #define FSC_NUMRASTSAMPLES_16 5
3735 uint32_t ForcedSampleCount;
3736 #define CULLMODE_BOTH 0
3737 #define CULLMODE_NONE 1
3738 #define CULLMODE_FRONT 2
3739 #define CULLMODE_BACK 3
3740 uint32_t CullMode;
3741 #define Normal 0
3742 #define Force 1
3743 uint32_t ForceMultisampling;
3744 uint32_t SmoothPointEnable;
3745 uint32_t DXMultisampleRasterizationEnable;
3746 #define MSRASTMODE_OFF_PIXEL 0
3747 #define MSRASTMODE_OFF_PATTERN 1
3748 #define MSRASTMODE_ON_PIXEL 2
3749 #define MSRASTMODE_ON_PATTERN 3
3750 uint32_t DXMultisampleRasterizationMode;
3751 uint32_t GlobalDepthOffsetEnableSolid;
3752 uint32_t GlobalDepthOffsetEnableWireframe;
3753 uint32_t GlobalDepthOffsetEnablePoint;
3754 #define RASTER_SOLID 0
3755 #define RASTER_WIREFRAME 1
3756 #define RASTER_POINT 2
3757 uint32_t FrontFaceFillMode;
3758 #define RASTER_SOLID 0
3759 #define RASTER_WIREFRAME 1
3760 #define RASTER_POINT 2
3761 uint32_t BackFaceFillMode;
3762 uint32_t AntialiasingEnable;
3763 uint32_t ScissorRectangleEnable;
3764 uint32_t ViewportZClipTestEnable;
3765 float GlobalDepthOffsetConstant;
3766 float GlobalDepthOffsetScale;
3767 float GlobalDepthOffsetClamp;
3768 };
3769
3770 static inline void
3771 GEN8_3DSTATE_RASTER_pack(__gen_user_data *data, void * restrict dst,
3772 const struct GEN8_3DSTATE_RASTER * restrict values)
3773 {
3774 uint32_t *dw = (uint32_t * restrict) dst;
3775
3776 dw[0] =
3777 __gen_field(values->CommandType, 29, 31) |
3778 __gen_field(values->CommandSubType, 27, 28) |
3779 __gen_field(values->_3DCommandOpcode, 24, 26) |
3780 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3781 __gen_field(values->DwordLength, 0, 7) |
3782 0;
3783
3784 dw[1] =
3785 __gen_field(values->APIMode, 22, 23) |
3786 __gen_field(values->FrontWinding, 21, 21) |
3787 __gen_field(values->ForcedSampleCount, 18, 20) |
3788 __gen_field(values->CullMode, 16, 17) |
3789 __gen_field(values->ForceMultisampling, 14, 14) |
3790 __gen_field(values->SmoothPointEnable, 13, 13) |
3791 __gen_field(values->DXMultisampleRasterizationEnable, 12, 12) |
3792 __gen_field(values->DXMultisampleRasterizationMode, 10, 11) |
3793 __gen_field(values->GlobalDepthOffsetEnableSolid, 9, 9) |
3794 __gen_field(values->GlobalDepthOffsetEnableWireframe, 8, 8) |
3795 __gen_field(values->GlobalDepthOffsetEnablePoint, 7, 7) |
3796 __gen_field(values->FrontFaceFillMode, 5, 6) |
3797 __gen_field(values->BackFaceFillMode, 3, 4) |
3798 __gen_field(values->AntialiasingEnable, 2, 2) |
3799 __gen_field(values->ScissorRectangleEnable, 1, 1) |
3800 __gen_field(values->ViewportZClipTestEnable, 0, 0) |
3801 0;
3802
3803 dw[2] =
3804 __gen_float(values->GlobalDepthOffsetConstant) |
3805 0;
3806
3807 dw[3] =
3808 __gen_float(values->GlobalDepthOffsetScale) |
3809 0;
3810
3811 dw[4] =
3812 __gen_float(values->GlobalDepthOffsetClamp) |
3813 0;
3814
3815 }
3816
3817 #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_length_bias 0x00000002
3818 #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_header\
3819 .CommandType = 3, \
3820 .CommandSubType = 3, \
3821 ._3DCommandOpcode = 1, \
3822 ._3DCommandSubOpcode = 2
3823
3824 struct GEN8_PALETTE_ENTRY {
3825 uint32_t Alpha;
3826 uint32_t Red;
3827 uint32_t Green;
3828 uint32_t Blue;
3829 };
3830
3831 static inline void
3832 GEN8_PALETTE_ENTRY_pack(__gen_user_data *data, void * restrict dst,
3833 const struct GEN8_PALETTE_ENTRY * restrict values)
3834 {
3835 uint32_t *dw = (uint32_t * restrict) dst;
3836
3837 dw[0] =
3838 __gen_field(values->Alpha, 24, 31) |
3839 __gen_field(values->Red, 16, 23) |
3840 __gen_field(values->Green, 8, 15) |
3841 __gen_field(values->Blue, 0, 7) |
3842 0;
3843
3844 }
3845
3846 struct GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0 {
3847 uint32_t CommandType;
3848 uint32_t CommandSubType;
3849 uint32_t _3DCommandOpcode;
3850 uint32_t _3DCommandSubOpcode;
3851 uint32_t DwordLength;
3852 /* variable length fields follow */
3853 };
3854
3855 static inline void
3856 GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_pack(__gen_user_data *data, void * restrict dst,
3857 const struct GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0 * restrict values)
3858 {
3859 uint32_t *dw = (uint32_t * restrict) dst;
3860
3861 dw[0] =
3862 __gen_field(values->CommandType, 29, 31) |
3863 __gen_field(values->CommandSubType, 27, 28) |
3864 __gen_field(values->_3DCommandOpcode, 24, 26) |
3865 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3866 __gen_field(values->DwordLength, 0, 7) |
3867 0;
3868
3869 /* variable length fields follow */
3870 }
3871
3872 #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_length_bias 0x00000002
3873 #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_header\
3874 .CommandType = 3, \
3875 .CommandSubType = 3, \
3876 ._3DCommandOpcode = 1, \
3877 ._3DCommandSubOpcode = 12
3878
3879 struct GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1 {
3880 uint32_t CommandType;
3881 uint32_t CommandSubType;
3882 uint32_t _3DCommandOpcode;
3883 uint32_t _3DCommandSubOpcode;
3884 uint32_t DwordLength;
3885 /* variable length fields follow */
3886 };
3887
3888 static inline void
3889 GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_pack(__gen_user_data *data, void * restrict dst,
3890 const struct GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1 * restrict values)
3891 {
3892 uint32_t *dw = (uint32_t * restrict) dst;
3893
3894 dw[0] =
3895 __gen_field(values->CommandType, 29, 31) |
3896 __gen_field(values->CommandSubType, 27, 28) |
3897 __gen_field(values->_3DCommandOpcode, 24, 26) |
3898 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3899 __gen_field(values->DwordLength, 0, 7) |
3900 0;
3901
3902 /* variable length fields follow */
3903 }
3904
3905 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_length 0x00000002
3906 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_length_bias 0x00000002
3907 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_header\
3908 .CommandType = 3, \
3909 .CommandSubType = 3, \
3910 ._3DCommandOpcode = 0, \
3911 ._3DCommandSubOpcode = 45, \
3912 .DwordLength = 0
3913
3914 struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS {
3915 uint32_t CommandType;
3916 uint32_t CommandSubType;
3917 uint32_t _3DCommandOpcode;
3918 uint32_t _3DCommandSubOpcode;
3919 uint32_t DwordLength;
3920 uint32_t PointertoDSSamplerState;
3921 };
3922
3923 static inline void
3924 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
3925 const struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS * restrict values)
3926 {
3927 uint32_t *dw = (uint32_t * restrict) dst;
3928
3929 dw[0] =
3930 __gen_field(values->CommandType, 29, 31) |
3931 __gen_field(values->CommandSubType, 27, 28) |
3932 __gen_field(values->_3DCommandOpcode, 24, 26) |
3933 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3934 __gen_field(values->DwordLength, 0, 7) |
3935 0;
3936
3937 dw[1] =
3938 __gen_offset(values->PointertoDSSamplerState, 5, 31) |
3939 0;
3940
3941 }
3942
3943 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_length 0x00000002
3944 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_length_bias 0x00000002
3945 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_header\
3946 .CommandType = 3, \
3947 .CommandSubType = 3, \
3948 ._3DCommandOpcode = 0, \
3949 ._3DCommandSubOpcode = 46, \
3950 .DwordLength = 0
3951
3952 struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS {
3953 uint32_t CommandType;
3954 uint32_t CommandSubType;
3955 uint32_t _3DCommandOpcode;
3956 uint32_t _3DCommandSubOpcode;
3957 uint32_t DwordLength;
3958 uint32_t PointertoGSSamplerState;
3959 };
3960
3961 static inline void
3962 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
3963 const struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS * restrict values)
3964 {
3965 uint32_t *dw = (uint32_t * restrict) dst;
3966
3967 dw[0] =
3968 __gen_field(values->CommandType, 29, 31) |
3969 __gen_field(values->CommandSubType, 27, 28) |
3970 __gen_field(values->_3DCommandOpcode, 24, 26) |
3971 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3972 __gen_field(values->DwordLength, 0, 7) |
3973 0;
3974
3975 dw[1] =
3976 __gen_offset(values->PointertoGSSamplerState, 5, 31) |
3977 0;
3978
3979 }
3980
3981 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_length 0x00000002
3982 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_length_bias 0x00000002
3983 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_header\
3984 .CommandType = 3, \
3985 .CommandSubType = 3, \
3986 ._3DCommandOpcode = 0, \
3987 ._3DCommandSubOpcode = 44, \
3988 .DwordLength = 0
3989
3990 struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS {
3991 uint32_t CommandType;
3992 uint32_t CommandSubType;
3993 uint32_t _3DCommandOpcode;
3994 uint32_t _3DCommandSubOpcode;
3995 uint32_t DwordLength;
3996 uint32_t PointertoHSSamplerState;
3997 };
3998
3999 static inline void
4000 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
4001 const struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS * restrict values)
4002 {
4003 uint32_t *dw = (uint32_t * restrict) dst;
4004
4005 dw[0] =
4006 __gen_field(values->CommandType, 29, 31) |
4007 __gen_field(values->CommandSubType, 27, 28) |
4008 __gen_field(values->_3DCommandOpcode, 24, 26) |
4009 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4010 __gen_field(values->DwordLength, 0, 7) |
4011 0;
4012
4013 dw[1] =
4014 __gen_offset(values->PointertoHSSamplerState, 5, 31) |
4015 0;
4016
4017 }
4018
4019 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_length 0x00000002
4020 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_length_bias 0x00000002
4021 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_header\
4022 .CommandType = 3, \
4023 .CommandSubType = 3, \
4024 ._3DCommandOpcode = 0, \
4025 ._3DCommandSubOpcode = 47, \
4026 .DwordLength = 0
4027
4028 struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS {
4029 uint32_t CommandType;
4030 uint32_t CommandSubType;
4031 uint32_t _3DCommandOpcode;
4032 uint32_t _3DCommandSubOpcode;
4033 uint32_t DwordLength;
4034 uint32_t PointertoPSSamplerState;
4035 };
4036
4037 static inline void
4038 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
4039 const struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS * restrict values)
4040 {
4041 uint32_t *dw = (uint32_t * restrict) dst;
4042
4043 dw[0] =
4044 __gen_field(values->CommandType, 29, 31) |
4045 __gen_field(values->CommandSubType, 27, 28) |
4046 __gen_field(values->_3DCommandOpcode, 24, 26) |
4047 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4048 __gen_field(values->DwordLength, 0, 7) |
4049 0;
4050
4051 dw[1] =
4052 __gen_offset(values->PointertoPSSamplerState, 5, 31) |
4053 0;
4054
4055 }
4056
4057 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_length 0x00000002
4058 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_length_bias 0x00000002
4059 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_header\
4060 .CommandType = 3, \
4061 .CommandSubType = 3, \
4062 ._3DCommandOpcode = 0, \
4063 ._3DCommandSubOpcode = 43, \
4064 .DwordLength = 0
4065
4066 struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS {
4067 uint32_t CommandType;
4068 uint32_t CommandSubType;
4069 uint32_t _3DCommandOpcode;
4070 uint32_t _3DCommandSubOpcode;
4071 uint32_t DwordLength;
4072 uint32_t PointertoVSSamplerState;
4073 };
4074
4075 static inline void
4076 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
4077 const struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS * restrict values)
4078 {
4079 uint32_t *dw = (uint32_t * restrict) dst;
4080
4081 dw[0] =
4082 __gen_field(values->CommandType, 29, 31) |
4083 __gen_field(values->CommandSubType, 27, 28) |
4084 __gen_field(values->_3DCommandOpcode, 24, 26) |
4085 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4086 __gen_field(values->DwordLength, 0, 7) |
4087 0;
4088
4089 dw[1] =
4090 __gen_offset(values->PointertoVSSamplerState, 5, 31) |
4091 0;
4092
4093 }
4094
4095 #define GEN8_3DSTATE_SAMPLE_MASK_length 0x00000002
4096 #define GEN8_3DSTATE_SAMPLE_MASK_length_bias 0x00000002
4097 #define GEN8_3DSTATE_SAMPLE_MASK_header \
4098 .CommandType = 3, \
4099 .CommandSubType = 3, \
4100 ._3DCommandOpcode = 0, \
4101 ._3DCommandSubOpcode = 24, \
4102 .DwordLength = 0
4103
4104 struct GEN8_3DSTATE_SAMPLE_MASK {
4105 uint32_t CommandType;
4106 uint32_t CommandSubType;
4107 uint32_t _3DCommandOpcode;
4108 uint32_t _3DCommandSubOpcode;
4109 uint32_t DwordLength;
4110 uint32_t SampleMask;
4111 };
4112
4113 static inline void
4114 GEN8_3DSTATE_SAMPLE_MASK_pack(__gen_user_data *data, void * restrict dst,
4115 const struct GEN8_3DSTATE_SAMPLE_MASK * restrict values)
4116 {
4117 uint32_t *dw = (uint32_t * restrict) dst;
4118
4119 dw[0] =
4120 __gen_field(values->CommandType, 29, 31) |
4121 __gen_field(values->CommandSubType, 27, 28) |
4122 __gen_field(values->_3DCommandOpcode, 24, 26) |
4123 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4124 __gen_field(values->DwordLength, 0, 7) |
4125 0;
4126
4127 dw[1] =
4128 __gen_field(values->SampleMask, 0, 15) |
4129 0;
4130
4131 }
4132
4133 #define GEN8_3DSTATE_SAMPLE_PATTERN_length 0x00000009
4134 #define GEN8_3DSTATE_SAMPLE_PATTERN_length_bias 0x00000002
4135 #define GEN8_3DSTATE_SAMPLE_PATTERN_header \
4136 .CommandType = 3, \
4137 .CommandSubType = 3, \
4138 ._3DCommandOpcode = 1, \
4139 ._3DCommandSubOpcode = 28, \
4140 .DwordLength = 7
4141
4142 struct GEN8_3DSTATE_SAMPLE_PATTERN {
4143 uint32_t CommandType;
4144 uint32_t CommandSubType;
4145 uint32_t _3DCommandOpcode;
4146 uint32_t _3DCommandSubOpcode;
4147 uint32_t DwordLength;
4148 float _8xSample7XOffset;
4149 float _8xSample7YOffset;
4150 float _8xSample6XOffset;
4151 float _8xSample6YOffset;
4152 float _8xSample5XOffset;
4153 float _8xSample5YOffset;
4154 float _8xSample4XOffset;
4155 float _8xSample4YOffset;
4156 float _8xSample3XOffset;
4157 float _8xSample3YOffset;
4158 float _8xSample2XOffset;
4159 float _8xSample2YOffset;
4160 float _8xSample1XOffset;
4161 float _8xSample1YOffset;
4162 float _8xSample0XOffset;
4163 float _8xSample0YOffset;
4164 float _4xSample3XOffset;
4165 float _4xSample3YOffset;
4166 float _4xSample2XOffset;
4167 float _4xSample2YOffset;
4168 float _4xSample1XOffset;
4169 float _4xSample1YOffset;
4170 float _4xSample0XOffset;
4171 float _4xSample0YOffset;
4172 float _1xSample0XOffset;
4173 float _1xSample0YOffset;
4174 float _2xSample1XOffset;
4175 float _2xSample1YOffset;
4176 float _2xSample0XOffset;
4177 float _2xSample0YOffset;
4178 };
4179
4180 static inline void
4181 GEN8_3DSTATE_SAMPLE_PATTERN_pack(__gen_user_data *data, void * restrict dst,
4182 const struct GEN8_3DSTATE_SAMPLE_PATTERN * restrict values)
4183 {
4184 uint32_t *dw = (uint32_t * restrict) dst;
4185
4186 dw[0] =
4187 __gen_field(values->CommandType, 29, 31) |
4188 __gen_field(values->CommandSubType, 27, 28) |
4189 __gen_field(values->_3DCommandOpcode, 24, 26) |
4190 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4191 __gen_field(values->DwordLength, 0, 7) |
4192 0;
4193
4194 dw[1] =
4195 0;
4196
4197 dw[5] =
4198 __gen_field(values->_8xSample7XOffset * (1 << 4), 28, 31) |
4199 __gen_field(values->_8xSample7YOffset * (1 << 4), 24, 27) |
4200 __gen_field(values->_8xSample6XOffset * (1 << 4), 20, 23) |
4201 __gen_field(values->_8xSample6YOffset * (1 << 4), 16, 19) |
4202 __gen_field(values->_8xSample5XOffset * (1 << 4), 12, 15) |
4203 __gen_field(values->_8xSample5YOffset * (1 << 4), 8, 11) |
4204 __gen_field(values->_8xSample4XOffset * (1 << 4), 4, 7) |
4205 __gen_field(values->_8xSample4YOffset * (1 << 4), 0, 3) |
4206 0;
4207
4208 dw[6] =
4209 __gen_field(values->_8xSample3XOffset * (1 << 4), 28, 31) |
4210 __gen_field(values->_8xSample3YOffset * (1 << 4), 24, 27) |
4211 __gen_field(values->_8xSample2XOffset * (1 << 4), 20, 23) |
4212 __gen_field(values->_8xSample2YOffset * (1 << 4), 16, 19) |
4213 __gen_field(values->_8xSample1XOffset * (1 << 4), 12, 15) |
4214 __gen_field(values->_8xSample1YOffset * (1 << 4), 8, 11) |
4215 __gen_field(values->_8xSample0XOffset * (1 << 4), 4, 7) |
4216 __gen_field(values->_8xSample0YOffset * (1 << 4), 0, 3) |
4217 0;
4218
4219 dw[7] =
4220 __gen_field(values->_4xSample3XOffset * (1 << 4), 28, 31) |
4221 __gen_field(values->_4xSample3YOffset * (1 << 4), 24, 27) |
4222 __gen_field(values->_4xSample2XOffset * (1 << 4), 20, 23) |
4223 __gen_field(values->_4xSample2YOffset * (1 << 4), 16, 19) |
4224 __gen_field(values->_4xSample1XOffset * (1 << 4), 12, 15) |
4225 __gen_field(values->_4xSample1YOffset * (1 << 4), 8, 11) |
4226 __gen_field(values->_4xSample0XOffset * (1 << 4), 4, 7) |
4227 __gen_field(values->_4xSample0YOffset * (1 << 4), 0, 3) |
4228 0;
4229
4230 dw[8] =
4231 __gen_field(values->_1xSample0XOffset * (1 << 4), 20, 23) |
4232 __gen_field(values->_1xSample0YOffset * (1 << 4), 16, 19) |
4233 __gen_field(values->_2xSample1XOffset * (1 << 4), 12, 15) |
4234 __gen_field(values->_2xSample1YOffset * (1 << 4), 8, 11) |
4235 __gen_field(values->_2xSample0XOffset * (1 << 4), 4, 7) |
4236 __gen_field(values->_2xSample0YOffset * (1 << 4), 0, 3) |
4237 0;
4238
4239 }
4240
4241 #define GEN8_3DSTATE_SBE_length 0x00000004
4242 #define GEN8_3DSTATE_SBE_length_bias 0x00000002
4243 #define GEN8_3DSTATE_SBE_header \
4244 .CommandType = 3, \
4245 .CommandSubType = 3, \
4246 ._3DCommandOpcode = 0, \
4247 ._3DCommandSubOpcode = 31, \
4248 .DwordLength = 2
4249
4250 struct GEN8_3DSTATE_SBE {
4251 uint32_t CommandType;
4252 uint32_t CommandSubType;
4253 uint32_t _3DCommandOpcode;
4254 uint32_t _3DCommandSubOpcode;
4255 uint32_t DwordLength;
4256 uint32_t ForceVertexURBEntryReadLength;
4257 uint32_t ForceVertexURBEntryReadOffset;
4258 uint32_t NumberofSFOutputAttributes;
4259 uint32_t AttributeSwizzleEnable;
4260 #define UPPERLEFT 0
4261 #define LOWERLEFT 1
4262 uint32_t PointSpriteTextureCoordinateOrigin;
4263 uint32_t PrimitiveIDOverrideComponentW;
4264 uint32_t PrimitiveIDOverrideComponentZ;
4265 uint32_t PrimitiveIDOverrideComponentY;
4266 uint32_t PrimitiveIDOverrideComponentX;
4267 uint32_t VertexURBEntryReadLength;
4268 uint32_t VertexURBEntryReadOffset;
4269 uint32_t PrimitiveIDOverrideAttributeSelect;
4270 uint32_t PointSpriteTextureCoordinateEnable;
4271 uint32_t ConstantInterpolationEnable;
4272 };
4273
4274 static inline void
4275 GEN8_3DSTATE_SBE_pack(__gen_user_data *data, void * restrict dst,
4276 const struct GEN8_3DSTATE_SBE * restrict values)
4277 {
4278 uint32_t *dw = (uint32_t * restrict) dst;
4279
4280 dw[0] =
4281 __gen_field(values->CommandType, 29, 31) |
4282 __gen_field(values->CommandSubType, 27, 28) |
4283 __gen_field(values->_3DCommandOpcode, 24, 26) |
4284 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4285 __gen_field(values->DwordLength, 0, 7) |
4286 0;
4287
4288 dw[1] =
4289 __gen_field(values->ForceVertexURBEntryReadLength, 29, 29) |
4290 __gen_field(values->ForceVertexURBEntryReadOffset, 28, 28) |
4291 __gen_field(values->NumberofSFOutputAttributes, 22, 27) |
4292 __gen_field(values->AttributeSwizzleEnable, 21, 21) |
4293 __gen_field(values->PointSpriteTextureCoordinateOrigin, 20, 20) |
4294 __gen_field(values->PrimitiveIDOverrideComponentW, 19, 19) |
4295 __gen_field(values->PrimitiveIDOverrideComponentZ, 18, 18) |
4296 __gen_field(values->PrimitiveIDOverrideComponentY, 17, 17) |
4297 __gen_field(values->PrimitiveIDOverrideComponentX, 16, 16) |
4298 __gen_field(values->VertexURBEntryReadLength, 11, 15) |
4299 __gen_field(values->VertexURBEntryReadOffset, 5, 10) |
4300 __gen_field(values->PrimitiveIDOverrideAttributeSelect, 0, 4) |
4301 0;
4302
4303 dw[2] =
4304 __gen_field(values->PointSpriteTextureCoordinateEnable, 0, 31) |
4305 0;
4306
4307 dw[3] =
4308 __gen_field(values->ConstantInterpolationEnable, 0, 31) |
4309 0;
4310
4311 }
4312
4313 #define GEN8_3DSTATE_SBE_SWIZ_length 0x0000000b
4314 #define GEN8_3DSTATE_SBE_SWIZ_length_bias 0x00000002
4315 #define GEN8_3DSTATE_SBE_SWIZ_header \
4316 .CommandType = 3, \
4317 .CommandSubType = 3, \
4318 ._3DCommandOpcode = 0, \
4319 ._3DCommandSubOpcode = 81, \
4320 .DwordLength = 9
4321
4322 struct GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL {
4323 uint32_t ComponentOverrideW;
4324 uint32_t ComponentOverrideZ;
4325 uint32_t ComponentOverrideY;
4326 uint32_t ComponentOverrideX;
4327 uint32_t SwizzleControlMode;
4328 #define CONST_0000 0
4329 #define CONST_0001_FLOAT 1
4330 #define CONST_1111_FLOAT 2
4331 #define PRIM_ID 3
4332 uint32_t ConstantSource;
4333 #define INPUTATTR 0
4334 #define INPUTATTR_FACING 1
4335 #define INPUTATTR_W 2
4336 #define INPUTATTR_FACING_W 3
4337 uint32_t SwizzleSelect;
4338 uint32_t SourceAttribute;
4339 };
4340
4341 static inline void
4342 GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(__gen_user_data *data, void * restrict dst,
4343 const struct GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL * restrict values)
4344 {
4345 uint32_t *dw = (uint32_t * restrict) dst;
4346
4347 dw[0] =
4348 __gen_field(values->ComponentOverrideW, 15, 15) |
4349 __gen_field(values->ComponentOverrideZ, 14, 14) |
4350 __gen_field(values->ComponentOverrideY, 13, 13) |
4351 __gen_field(values->ComponentOverrideX, 12, 12) |
4352 __gen_field(values->SwizzleControlMode, 11, 11) |
4353 __gen_field(values->ConstantSource, 9, 10) |
4354 __gen_field(values->SwizzleSelect, 6, 7) |
4355 __gen_field(values->SourceAttribute, 0, 4) |
4356 0;
4357
4358 }
4359
4360 struct GEN8_3DSTATE_SBE_SWIZ {
4361 uint32_t CommandType;
4362 uint32_t CommandSubType;
4363 uint32_t _3DCommandOpcode;
4364 uint32_t _3DCommandSubOpcode;
4365 uint32_t DwordLength;
4366 struct GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL Attribute;
4367 uint32_t Attribute15WrapShortestEnables;
4368 uint32_t Attribute14WrapShortestEnables;
4369 uint32_t Attribute13WrapShortestEnables;
4370 uint32_t Attribute12WrapShortestEnables;
4371 uint32_t Attribute11WrapShortestEnables;
4372 uint32_t Attribute10WrapShortestEnables;
4373 uint32_t Attribute09WrapShortestEnables;
4374 uint32_t Attribute08WrapShortestEnables;
4375 uint32_t Attribute07WrapShortestEnables;
4376 uint32_t Attribute06WrapShortestEnables;
4377 uint32_t Attribute05WrapShortestEnables;
4378 uint32_t Attribute04WrapShortestEnables;
4379 uint32_t Attribute03WrapShortestEnables;
4380 uint32_t Attribute02WrapShortestEnables;
4381 uint32_t Attribute01WrapShortestEnables;
4382 uint32_t Attribute00WrapShortestEnables;
4383 };
4384
4385 static inline void
4386 GEN8_3DSTATE_SBE_SWIZ_pack(__gen_user_data *data, void * restrict dst,
4387 const struct GEN8_3DSTATE_SBE_SWIZ * restrict values)
4388 {
4389 uint32_t *dw = (uint32_t * restrict) dst;
4390
4391 dw[0] =
4392 __gen_field(values->CommandType, 29, 31) |
4393 __gen_field(values->CommandSubType, 27, 28) |
4394 __gen_field(values->_3DCommandOpcode, 24, 26) |
4395 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4396 __gen_field(values->DwordLength, 0, 7) |
4397 0;
4398
4399 uint32_t dw_Attribute;
4400 GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &dw_Attribute, &values->Attribute);
4401 dw[1] =
4402 __gen_field(dw_Attribute, 0, 15) |
4403 0;
4404
4405 uint64_t qw9 =
4406 __gen_field(values->Attribute15WrapShortestEnables, 60, 63) |
4407 __gen_field(values->Attribute14WrapShortestEnables, 56, 59) |
4408 __gen_field(values->Attribute13WrapShortestEnables, 52, 55) |
4409 __gen_field(values->Attribute12WrapShortestEnables, 48, 51) |
4410 __gen_field(values->Attribute11WrapShortestEnables, 44, 47) |
4411 __gen_field(values->Attribute10WrapShortestEnables, 40, 43) |
4412 __gen_field(values->Attribute09WrapShortestEnables, 36, 39) |
4413 __gen_field(values->Attribute08WrapShortestEnables, 32, 35) |
4414 __gen_field(values->Attribute07WrapShortestEnables, 28, 31) |
4415 __gen_field(values->Attribute06WrapShortestEnables, 24, 27) |
4416 __gen_field(values->Attribute05WrapShortestEnables, 20, 23) |
4417 __gen_field(values->Attribute04WrapShortestEnables, 16, 19) |
4418 __gen_field(values->Attribute03WrapShortestEnables, 12, 15) |
4419 __gen_field(values->Attribute02WrapShortestEnables, 8, 11) |
4420 __gen_field(values->Attribute01WrapShortestEnables, 4, 7) |
4421 __gen_field(values->Attribute00WrapShortestEnables, 0, 3) |
4422 0;
4423
4424 dw[9] = qw9;
4425 dw[10] = qw9 >> 32;
4426
4427 }
4428
4429 #define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_length 0x00000002
4430 #define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_length_bias 0x00000002
4431 #define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_header\
4432 .CommandType = 3, \
4433 .CommandSubType = 3, \
4434 ._3DCommandOpcode = 0, \
4435 ._3DCommandSubOpcode = 15, \
4436 .DwordLength = 0
4437
4438 struct GEN8_3DSTATE_SCISSOR_STATE_POINTERS {
4439 uint32_t CommandType;
4440 uint32_t CommandSubType;
4441 uint32_t _3DCommandOpcode;
4442 uint32_t _3DCommandSubOpcode;
4443 uint32_t DwordLength;
4444 uint32_t ScissorRectPointer;
4445 };
4446
4447 static inline void
4448 GEN8_3DSTATE_SCISSOR_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
4449 const struct GEN8_3DSTATE_SCISSOR_STATE_POINTERS * restrict values)
4450 {
4451 uint32_t *dw = (uint32_t * restrict) dst;
4452
4453 dw[0] =
4454 __gen_field(values->CommandType, 29, 31) |
4455 __gen_field(values->CommandSubType, 27, 28) |
4456 __gen_field(values->_3DCommandOpcode, 24, 26) |
4457 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4458 __gen_field(values->DwordLength, 0, 7) |
4459 0;
4460
4461 dw[1] =
4462 __gen_offset(values->ScissorRectPointer, 5, 31) |
4463 0;
4464
4465 }
4466
4467 #define GEN8_3DSTATE_SF_length 0x00000004
4468 #define GEN8_3DSTATE_SF_length_bias 0x00000002
4469 #define GEN8_3DSTATE_SF_header \
4470 .CommandType = 3, \
4471 .CommandSubType = 3, \
4472 ._3DCommandOpcode = 0, \
4473 ._3DCommandSubOpcode = 19, \
4474 .DwordLength = 2
4475
4476 struct GEN8_3DSTATE_SF {
4477 uint32_t CommandType;
4478 uint32_t CommandSubType;
4479 uint32_t _3DCommandOpcode;
4480 uint32_t _3DCommandSubOpcode;
4481 uint32_t DwordLength;
4482 uint32_t LegacyGlobalDepthBiasEnable;
4483 uint32_t StatisticsEnable;
4484 uint32_t ViewportTransformEnable;
4485 float LineWidth;
4486 #define _05pixels 0
4487 #define _10pixels 1
4488 #define _20pixels 2
4489 #define _40pixels 3
4490 uint32_t LineEndCapAntialiasingRegionWidth;
4491 uint32_t LastPixelEnable;
4492 uint32_t TriangleStripListProvokingVertexSelect;
4493 uint32_t LineStripListProvokingVertexSelect;
4494 uint32_t TriangleFanProvokingVertexSelect;
4495 #define AALINEDISTANCE_TRUE 1
4496 uint32_t AALineDistanceMode;
4497 uint32_t SmoothPointEnable;
4498 uint32_t VertexSubPixelPrecisionSelect;
4499 #define Vertex 0
4500 #define State 1
4501 uint32_t PointWidthSource;
4502 float PointWidth;
4503 };
4504
4505 static inline void
4506 GEN8_3DSTATE_SF_pack(__gen_user_data *data, void * restrict dst,
4507 const struct GEN8_3DSTATE_SF * restrict values)
4508 {
4509 uint32_t *dw = (uint32_t * restrict) dst;
4510
4511 dw[0] =
4512 __gen_field(values->CommandType, 29, 31) |
4513 __gen_field(values->CommandSubType, 27, 28) |
4514 __gen_field(values->_3DCommandOpcode, 24, 26) |
4515 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4516 __gen_field(values->DwordLength, 0, 7) |
4517 0;
4518
4519 dw[1] =
4520 __gen_field(values->LegacyGlobalDepthBiasEnable, 11, 11) |
4521 __gen_field(values->StatisticsEnable, 10, 10) |
4522 __gen_field(values->ViewportTransformEnable, 1, 1) |
4523 0;
4524
4525 dw[2] =
4526 __gen_field(values->LineWidth * (1 << 7), 18, 27) |
4527 __gen_field(values->LineEndCapAntialiasingRegionWidth, 16, 17) |
4528 0;
4529
4530 dw[3] =
4531 __gen_field(values->LastPixelEnable, 31, 31) |
4532 __gen_field(values->TriangleStripListProvokingVertexSelect, 29, 30) |
4533 __gen_field(values->LineStripListProvokingVertexSelect, 27, 28) |
4534 __gen_field(values->TriangleFanProvokingVertexSelect, 25, 26) |
4535 __gen_field(values->AALineDistanceMode, 14, 14) |
4536 __gen_field(values->SmoothPointEnable, 13, 13) |
4537 __gen_field(values->VertexSubPixelPrecisionSelect, 12, 12) |
4538 __gen_field(values->PointWidthSource, 11, 11) |
4539 __gen_field(values->PointWidth * (1 << 3), 0, 10) |
4540 0;
4541
4542 }
4543
4544 #define GEN8_3DSTATE_SO_BUFFER_length 0x00000008
4545 #define GEN8_3DSTATE_SO_BUFFER_length_bias 0x00000002
4546 #define GEN8_3DSTATE_SO_BUFFER_header \
4547 .CommandType = 3, \
4548 .CommandSubType = 3, \
4549 ._3DCommandOpcode = 1, \
4550 ._3DCommandSubOpcode = 24, \
4551 .DwordLength = 6
4552
4553 struct GEN8_3DSTATE_SO_BUFFER {
4554 uint32_t CommandType;
4555 uint32_t CommandSubType;
4556 uint32_t _3DCommandOpcode;
4557 uint32_t _3DCommandSubOpcode;
4558 uint32_t DwordLength;
4559 uint32_t SOBufferEnable;
4560 uint32_t SOBufferIndex;
4561 struct GEN8_MEMORY_OBJECT_CONTROL_STATE SOBufferObjectControlState;
4562 uint32_t StreamOffsetWriteEnable;
4563 uint32_t StreamOutputBufferOffsetAddressEnable;
4564 __gen_address_type SurfaceBaseAddress;
4565 uint32_t SurfaceSize;
4566 __gen_address_type StreamOutputBufferOffsetAddress;
4567 uint32_t StreamOffset;
4568 };
4569
4570 static inline void
4571 GEN8_3DSTATE_SO_BUFFER_pack(__gen_user_data *data, void * restrict dst,
4572 const struct GEN8_3DSTATE_SO_BUFFER * restrict values)
4573 {
4574 uint32_t *dw = (uint32_t * restrict) dst;
4575
4576 dw[0] =
4577 __gen_field(values->CommandType, 29, 31) |
4578 __gen_field(values->CommandSubType, 27, 28) |
4579 __gen_field(values->_3DCommandOpcode, 24, 26) |
4580 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4581 __gen_field(values->DwordLength, 0, 7) |
4582 0;
4583
4584 uint32_t dw_SOBufferObjectControlState;
4585 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SOBufferObjectControlState, &values->SOBufferObjectControlState);
4586 dw[1] =
4587 __gen_field(values->SOBufferEnable, 31, 31) |
4588 __gen_field(values->SOBufferIndex, 29, 30) |
4589 __gen_field(dw_SOBufferObjectControlState, 22, 28) |
4590 __gen_field(values->StreamOffsetWriteEnable, 21, 21) |
4591 __gen_field(values->StreamOutputBufferOffsetAddressEnable, 20, 20) |
4592 0;
4593
4594 uint32_t dw2 =
4595 0;
4596
4597 uint64_t qw2 =
4598 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
4599
4600 dw[2] = qw2;
4601 dw[3] = qw2 >> 32;
4602
4603 dw[4] =
4604 __gen_field(values->SurfaceSize, 0, 29) |
4605 0;
4606
4607 uint32_t dw5 =
4608 0;
4609
4610 uint64_t qw5 =
4611 __gen_combine_address(data, &dw[5], values->StreamOutputBufferOffsetAddress, dw5);
4612
4613 dw[5] = qw5;
4614 dw[6] = qw5 >> 32;
4615
4616 dw[7] =
4617 __gen_field(values->StreamOffset, 0, 31) |
4618 0;
4619
4620 }
4621
4622 #define GEN8_3DSTATE_SO_DECL_LIST_length_bias 0x00000002
4623 #define GEN8_3DSTATE_SO_DECL_LIST_header \
4624 .CommandType = 3, \
4625 .CommandSubType = 3, \
4626 ._3DCommandOpcode = 1, \
4627 ._3DCommandSubOpcode = 23
4628
4629 struct GEN8_SO_DECL {
4630 uint32_t OutputBufferSlot;
4631 uint32_t HoleFlag;
4632 uint32_t RegisterIndex;
4633 uint32_t ComponentMask;
4634 };
4635
4636 static inline void
4637 GEN8_SO_DECL_pack(__gen_user_data *data, void * restrict dst,
4638 const struct GEN8_SO_DECL * restrict values)
4639 {
4640 uint32_t *dw = (uint32_t * restrict) dst;
4641
4642 dw[0] =
4643 __gen_field(values->OutputBufferSlot, 12, 13) |
4644 __gen_field(values->HoleFlag, 11, 11) |
4645 __gen_field(values->RegisterIndex, 4, 9) |
4646 __gen_field(values->ComponentMask, 0, 3) |
4647 0;
4648
4649 }
4650
4651 struct GEN8_SO_DECL_ENTRY {
4652 struct GEN8_SO_DECL Stream3Decl;
4653 struct GEN8_SO_DECL Stream2Decl;
4654 struct GEN8_SO_DECL Stream1Decl;
4655 struct GEN8_SO_DECL Stream0Decl;
4656 };
4657
4658 static inline void
4659 GEN8_SO_DECL_ENTRY_pack(__gen_user_data *data, void * restrict dst,
4660 const struct GEN8_SO_DECL_ENTRY * restrict values)
4661 {
4662 uint32_t *dw = (uint32_t * restrict) dst;
4663
4664 uint32_t dw_Stream3Decl;
4665 GEN8_SO_DECL_pack(data, &dw_Stream3Decl, &values->Stream3Decl);
4666 uint32_t dw_Stream2Decl;
4667 GEN8_SO_DECL_pack(data, &dw_Stream2Decl, &values->Stream2Decl);
4668 uint32_t dw_Stream1Decl;
4669 GEN8_SO_DECL_pack(data, &dw_Stream1Decl, &values->Stream1Decl);
4670 uint32_t dw_Stream0Decl;
4671 GEN8_SO_DECL_pack(data, &dw_Stream0Decl, &values->Stream0Decl);
4672 uint64_t qw0 =
4673 __gen_field(dw_Stream3Decl, 48, 63) |
4674 __gen_field(dw_Stream2Decl, 32, 47) |
4675 __gen_field(dw_Stream1Decl, 16, 31) |
4676 __gen_field(dw_Stream0Decl, 0, 15) |
4677 0;
4678
4679 dw[0] = qw0;
4680 dw[1] = qw0 >> 32;
4681
4682 }
4683
4684 struct GEN8_3DSTATE_SO_DECL_LIST {
4685 uint32_t CommandType;
4686 uint32_t CommandSubType;
4687 uint32_t _3DCommandOpcode;
4688 uint32_t _3DCommandSubOpcode;
4689 uint32_t DwordLength;
4690 uint32_t StreamtoBufferSelects3;
4691 uint32_t StreamtoBufferSelects2;
4692 uint32_t StreamtoBufferSelects1;
4693 uint32_t StreamtoBufferSelects0;
4694 uint32_t NumEntries3;
4695 uint32_t NumEntries2;
4696 uint32_t NumEntries1;
4697 uint32_t NumEntries0;
4698 /* variable length fields follow */
4699 };
4700
4701 static inline void
4702 GEN8_3DSTATE_SO_DECL_LIST_pack(__gen_user_data *data, void * restrict dst,
4703 const struct GEN8_3DSTATE_SO_DECL_LIST * restrict values)
4704 {
4705 uint32_t *dw = (uint32_t * restrict) dst;
4706
4707 dw[0] =
4708 __gen_field(values->CommandType, 29, 31) |
4709 __gen_field(values->CommandSubType, 27, 28) |
4710 __gen_field(values->_3DCommandOpcode, 24, 26) |
4711 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4712 __gen_field(values->DwordLength, 0, 8) |
4713 0;
4714
4715 dw[1] =
4716 __gen_field(values->StreamtoBufferSelects3, 12, 15) |
4717 __gen_field(values->StreamtoBufferSelects2, 8, 11) |
4718 __gen_field(values->StreamtoBufferSelects1, 4, 7) |
4719 __gen_field(values->StreamtoBufferSelects0, 0, 3) |
4720 0;
4721
4722 dw[2] =
4723 __gen_field(values->NumEntries3, 24, 31) |
4724 __gen_field(values->NumEntries2, 16, 23) |
4725 __gen_field(values->NumEntries1, 8, 15) |
4726 __gen_field(values->NumEntries0, 0, 7) |
4727 0;
4728
4729 /* variable length fields follow */
4730 }
4731
4732 #define GEN8_3DSTATE_STENCIL_BUFFER_length 0x00000005
4733 #define GEN8_3DSTATE_STENCIL_BUFFER_length_bias 0x00000002
4734 #define GEN8_3DSTATE_STENCIL_BUFFER_header \
4735 .CommandType = 3, \
4736 .CommandSubType = 3, \
4737 ._3DCommandOpcode = 0, \
4738 ._3DCommandSubOpcode = 6, \
4739 .DwordLength = 3
4740
4741 struct GEN8_3DSTATE_STENCIL_BUFFER {
4742 uint32_t CommandType;
4743 uint32_t CommandSubType;
4744 uint32_t _3DCommandOpcode;
4745 uint32_t _3DCommandSubOpcode;
4746 uint32_t DwordLength;
4747 uint32_t StencilBufferEnable;
4748 struct GEN8_MEMORY_OBJECT_CONTROL_STATE StencilBufferObjectControlState;
4749 uint32_t SurfacePitch;
4750 __gen_address_type SurfaceBaseAddress;
4751 uint32_t SurfaceQPitch;
4752 };
4753
4754 static inline void
4755 GEN8_3DSTATE_STENCIL_BUFFER_pack(__gen_user_data *data, void * restrict dst,
4756 const struct GEN8_3DSTATE_STENCIL_BUFFER * restrict values)
4757 {
4758 uint32_t *dw = (uint32_t * restrict) dst;
4759
4760 dw[0] =
4761 __gen_field(values->CommandType, 29, 31) |
4762 __gen_field(values->CommandSubType, 27, 28) |
4763 __gen_field(values->_3DCommandOpcode, 24, 26) |
4764 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4765 __gen_field(values->DwordLength, 0, 7) |
4766 0;
4767
4768 uint32_t dw_StencilBufferObjectControlState;
4769 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StencilBufferObjectControlState, &values->StencilBufferObjectControlState);
4770 dw[1] =
4771 __gen_field(values->StencilBufferEnable, 31, 31) |
4772 __gen_field(dw_StencilBufferObjectControlState, 22, 28) |
4773 __gen_field(values->SurfacePitch, 0, 16) |
4774 0;
4775
4776 uint32_t dw2 =
4777 0;
4778
4779 uint64_t qw2 =
4780 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
4781
4782 dw[2] = qw2;
4783 dw[3] = qw2 >> 32;
4784
4785 dw[4] =
4786 __gen_field(values->SurfaceQPitch, 0, 14) |
4787 0;
4788
4789 }
4790
4791 #define GEN8_3DSTATE_STREAMOUT_length 0x00000005
4792 #define GEN8_3DSTATE_STREAMOUT_length_bias 0x00000002
4793 #define GEN8_3DSTATE_STREAMOUT_header \
4794 .CommandType = 3, \
4795 .CommandSubType = 3, \
4796 ._3DCommandOpcode = 0, \
4797 ._3DCommandSubOpcode = 30, \
4798 .DwordLength = 3
4799
4800 struct GEN8_3DSTATE_STREAMOUT {
4801 uint32_t CommandType;
4802 uint32_t CommandSubType;
4803 uint32_t _3DCommandOpcode;
4804 uint32_t _3DCommandSubOpcode;
4805 uint32_t DwordLength;
4806 uint32_t SOFunctionEnable;
4807 uint32_t APIRenderingDisable;
4808 uint32_t RenderStreamSelect;
4809 #define LEADING 0
4810 #define TRAILING 1
4811 uint32_t ReorderMode;
4812 uint32_t SOStatisticsEnable;
4813 #define Normal 0
4814 #define Resreved 1
4815 #define Force_Off 2
4816 #define Force_on 3
4817 uint32_t ForceRendering;
4818 uint32_t Stream3VertexReadOffset;
4819 uint32_t Stream3VertexReadLength;
4820 uint32_t Stream2VertexReadOffset;
4821 uint32_t Stream2VertexReadLength;
4822 uint32_t Stream1VertexReadOffset;
4823 uint32_t Stream1VertexReadLength;
4824 uint32_t Stream0VertexReadOffset;
4825 uint32_t Stream0VertexReadLength;
4826 uint32_t Buffer1SurfacePitch;
4827 uint32_t Buffer0SurfacePitch;
4828 uint32_t Buffer3SurfacePitch;
4829 uint32_t Buffer2SurfacePitch;
4830 };
4831
4832 static inline void
4833 GEN8_3DSTATE_STREAMOUT_pack(__gen_user_data *data, void * restrict dst,
4834 const struct GEN8_3DSTATE_STREAMOUT * restrict values)
4835 {
4836 uint32_t *dw = (uint32_t * restrict) dst;
4837
4838 dw[0] =
4839 __gen_field(values->CommandType, 29, 31) |
4840 __gen_field(values->CommandSubType, 27, 28) |
4841 __gen_field(values->_3DCommandOpcode, 24, 26) |
4842 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4843 __gen_field(values->DwordLength, 0, 7) |
4844 0;
4845
4846 dw[1] =
4847 __gen_field(values->SOFunctionEnable, 31, 31) |
4848 __gen_field(values->APIRenderingDisable, 30, 30) |
4849 __gen_field(values->RenderStreamSelect, 27, 28) |
4850 __gen_field(values->ReorderMode, 26, 26) |
4851 __gen_field(values->SOStatisticsEnable, 25, 25) |
4852 __gen_field(values->ForceRendering, 23, 24) |
4853 0;
4854
4855 dw[2] =
4856 __gen_field(values->Stream3VertexReadOffset, 29, 29) |
4857 __gen_field(values->Stream3VertexReadLength, 24, 28) |
4858 __gen_field(values->Stream2VertexReadOffset, 21, 21) |
4859 __gen_field(values->Stream2VertexReadLength, 16, 20) |
4860 __gen_field(values->Stream1VertexReadOffset, 13, 13) |
4861 __gen_field(values->Stream1VertexReadLength, 8, 12) |
4862 __gen_field(values->Stream0VertexReadOffset, 5, 5) |
4863 __gen_field(values->Stream0VertexReadLength, 0, 4) |
4864 0;
4865
4866 dw[3] =
4867 __gen_field(values->Buffer1SurfacePitch, 16, 27) |
4868 __gen_field(values->Buffer0SurfacePitch, 0, 11) |
4869 0;
4870
4871 dw[4] =
4872 __gen_field(values->Buffer3SurfacePitch, 16, 27) |
4873 __gen_field(values->Buffer2SurfacePitch, 0, 11) |
4874 0;
4875
4876 }
4877
4878 #define GEN8_3DSTATE_TE_length 0x00000004
4879 #define GEN8_3DSTATE_TE_length_bias 0x00000002
4880 #define GEN8_3DSTATE_TE_header \
4881 .CommandType = 3, \
4882 .CommandSubType = 3, \
4883 ._3DCommandOpcode = 0, \
4884 ._3DCommandSubOpcode = 28, \
4885 .DwordLength = 2
4886
4887 struct GEN8_3DSTATE_TE {
4888 uint32_t CommandType;
4889 uint32_t CommandSubType;
4890 uint32_t _3DCommandOpcode;
4891 uint32_t _3DCommandSubOpcode;
4892 uint32_t DwordLength;
4893 #define INTEGER 0
4894 #define ODD_FRACTIONAL 1
4895 #define EVEN_FRACTIONAL 2
4896 uint32_t Partitioning;
4897 #define POINT 0
4898 #define LINE 1
4899 #define TRI_CW 2
4900 #define TRI_CCW 3
4901 uint32_t OutputTopology;
4902 #define QUAD 0
4903 #define TRI 1
4904 #define ISOLINE 2
4905 uint32_t TEDomain;
4906 #define HW_TESS 0
4907 #define SW_TESS 1
4908 uint32_t TEMode;
4909 uint32_t TEEnable;
4910 float MaximumTessellationFactorOdd;
4911 float MaximumTessellationFactorNotOdd;
4912 };
4913
4914 static inline void
4915 GEN8_3DSTATE_TE_pack(__gen_user_data *data, void * restrict dst,
4916 const struct GEN8_3DSTATE_TE * restrict values)
4917 {
4918 uint32_t *dw = (uint32_t * restrict) dst;
4919
4920 dw[0] =
4921 __gen_field(values->CommandType, 29, 31) |
4922 __gen_field(values->CommandSubType, 27, 28) |
4923 __gen_field(values->_3DCommandOpcode, 24, 26) |
4924 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4925 __gen_field(values->DwordLength, 0, 7) |
4926 0;
4927
4928 dw[1] =
4929 __gen_field(values->Partitioning, 12, 13) |
4930 __gen_field(values->OutputTopology, 8, 9) |
4931 __gen_field(values->TEDomain, 4, 5) |
4932 __gen_field(values->TEMode, 1, 2) |
4933 __gen_field(values->TEEnable, 0, 0) |
4934 0;
4935
4936 dw[2] =
4937 __gen_float(values->MaximumTessellationFactorOdd) |
4938 0;
4939
4940 dw[3] =
4941 __gen_float(values->MaximumTessellationFactorNotOdd) |
4942 0;
4943
4944 }
4945
4946 #define GEN8_3DSTATE_URB_DS_length 0x00000002
4947 #define GEN8_3DSTATE_URB_DS_length_bias 0x00000002
4948 #define GEN8_3DSTATE_URB_DS_header \
4949 .CommandType = 3, \
4950 .CommandSubType = 3, \
4951 ._3DCommandOpcode = 0, \
4952 ._3DCommandSubOpcode = 50, \
4953 .DwordLength = 0
4954
4955 struct GEN8_3DSTATE_URB_DS {
4956 uint32_t CommandType;
4957 uint32_t CommandSubType;
4958 uint32_t _3DCommandOpcode;
4959 uint32_t _3DCommandSubOpcode;
4960 uint32_t DwordLength;
4961 uint32_t DSURBStartingAddress;
4962 uint32_t DSURBEntryAllocationSize;
4963 uint32_t DSNumberofURBEntries;
4964 };
4965
4966 static inline void
4967 GEN8_3DSTATE_URB_DS_pack(__gen_user_data *data, void * restrict dst,
4968 const struct GEN8_3DSTATE_URB_DS * restrict values)
4969 {
4970 uint32_t *dw = (uint32_t * restrict) dst;
4971
4972 dw[0] =
4973 __gen_field(values->CommandType, 29, 31) |
4974 __gen_field(values->CommandSubType, 27, 28) |
4975 __gen_field(values->_3DCommandOpcode, 24, 26) |
4976 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4977 __gen_field(values->DwordLength, 0, 7) |
4978 0;
4979
4980 dw[1] =
4981 __gen_field(values->DSURBStartingAddress, 25, 31) |
4982 __gen_field(values->DSURBEntryAllocationSize, 16, 24) |
4983 __gen_field(values->DSNumberofURBEntries, 0, 15) |
4984 0;
4985
4986 }
4987
4988 #define GEN8_3DSTATE_URB_GS_length 0x00000002
4989 #define GEN8_3DSTATE_URB_GS_length_bias 0x00000002
4990 #define GEN8_3DSTATE_URB_GS_header \
4991 .CommandType = 3, \
4992 .CommandSubType = 3, \
4993 ._3DCommandOpcode = 0, \
4994 ._3DCommandSubOpcode = 51, \
4995 .DwordLength = 0
4996
4997 struct GEN8_3DSTATE_URB_GS {
4998 uint32_t CommandType;
4999 uint32_t CommandSubType;
5000 uint32_t _3DCommandOpcode;
5001 uint32_t _3DCommandSubOpcode;
5002 uint32_t DwordLength;
5003 uint32_t GSURBStartingAddress;
5004 uint32_t GSURBEntryAllocationSize;
5005 uint32_t GSNumberofURBEntries;
5006 };
5007
5008 static inline void
5009 GEN8_3DSTATE_URB_GS_pack(__gen_user_data *data, void * restrict dst,
5010 const struct GEN8_3DSTATE_URB_GS * restrict values)
5011 {
5012 uint32_t *dw = (uint32_t * restrict) dst;
5013
5014 dw[0] =
5015 __gen_field(values->CommandType, 29, 31) |
5016 __gen_field(values->CommandSubType, 27, 28) |
5017 __gen_field(values->_3DCommandOpcode, 24, 26) |
5018 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5019 __gen_field(values->DwordLength, 0, 7) |
5020 0;
5021
5022 dw[1] =
5023 __gen_field(values->GSURBStartingAddress, 25, 31) |
5024 __gen_field(values->GSURBEntryAllocationSize, 16, 24) |
5025 __gen_field(values->GSNumberofURBEntries, 0, 15) |
5026 0;
5027
5028 }
5029
5030 #define GEN8_3DSTATE_URB_HS_length 0x00000002
5031 #define GEN8_3DSTATE_URB_HS_length_bias 0x00000002
5032 #define GEN8_3DSTATE_URB_HS_header \
5033 .CommandType = 3, \
5034 .CommandSubType = 3, \
5035 ._3DCommandOpcode = 0, \
5036 ._3DCommandSubOpcode = 49, \
5037 .DwordLength = 0
5038
5039 struct GEN8_3DSTATE_URB_HS {
5040 uint32_t CommandType;
5041 uint32_t CommandSubType;
5042 uint32_t _3DCommandOpcode;
5043 uint32_t _3DCommandSubOpcode;
5044 uint32_t DwordLength;
5045 uint32_t HSURBStartingAddress;
5046 uint32_t HSURBEntryAllocationSize;
5047 uint32_t HSNumberofURBEntries;
5048 };
5049
5050 static inline void
5051 GEN8_3DSTATE_URB_HS_pack(__gen_user_data *data, void * restrict dst,
5052 const struct GEN8_3DSTATE_URB_HS * restrict values)
5053 {
5054 uint32_t *dw = (uint32_t * restrict) dst;
5055
5056 dw[0] =
5057 __gen_field(values->CommandType, 29, 31) |
5058 __gen_field(values->CommandSubType, 27, 28) |
5059 __gen_field(values->_3DCommandOpcode, 24, 26) |
5060 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5061 __gen_field(values->DwordLength, 0, 7) |
5062 0;
5063
5064 dw[1] =
5065 __gen_field(values->HSURBStartingAddress, 25, 31) |
5066 __gen_field(values->HSURBEntryAllocationSize, 16, 24) |
5067 __gen_field(values->HSNumberofURBEntries, 0, 15) |
5068 0;
5069
5070 }
5071
5072 #define GEN8_3DSTATE_VERTEX_BUFFERS_length_bias 0x00000002
5073 #define GEN8_3DSTATE_VERTEX_BUFFERS_header \
5074 .CommandType = 3, \
5075 .CommandSubType = 3, \
5076 ._3DCommandOpcode = 0, \
5077 ._3DCommandSubOpcode = 8
5078
5079 struct GEN8_VERTEX_BUFFER_STATE {
5080 uint32_t VertexBufferIndex;
5081 struct GEN8_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
5082 uint32_t AddressModifyEnable;
5083 uint32_t NullVertexBuffer;
5084 uint32_t BufferPitch;
5085 __gen_address_type BufferStartingAddress;
5086 uint32_t BufferSize;
5087 };
5088
5089 static inline void
5090 GEN8_VERTEX_BUFFER_STATE_pack(__gen_user_data *data, void * restrict dst,
5091 const struct GEN8_VERTEX_BUFFER_STATE * restrict values)
5092 {
5093 uint32_t *dw = (uint32_t * restrict) dst;
5094
5095 uint32_t dw_MemoryObjectControlState;
5096 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
5097 dw[0] =
5098 __gen_field(values->VertexBufferIndex, 26, 31) |
5099 __gen_field(dw_MemoryObjectControlState, 16, 22) |
5100 __gen_field(values->AddressModifyEnable, 14, 14) |
5101 __gen_field(values->NullVertexBuffer, 13, 13) |
5102 __gen_field(values->BufferPitch, 0, 11) |
5103 0;
5104
5105 uint32_t dw1 =
5106 0;
5107
5108 uint64_t qw1 =
5109 __gen_combine_address(data, &dw[1], values->BufferStartingAddress, dw1);
5110
5111 dw[1] = qw1;
5112 dw[2] = qw1 >> 32;
5113
5114 dw[3] =
5115 __gen_field(values->BufferSize, 0, 31) |
5116 0;
5117
5118 }
5119
5120 struct GEN8_3DSTATE_VERTEX_BUFFERS {
5121 uint32_t CommandType;
5122 uint32_t CommandSubType;
5123 uint32_t _3DCommandOpcode;
5124 uint32_t _3DCommandSubOpcode;
5125 uint32_t DwordLength;
5126 /* variable length fields follow */
5127 };
5128
5129 static inline void
5130 GEN8_3DSTATE_VERTEX_BUFFERS_pack(__gen_user_data *data, void * restrict dst,
5131 const struct GEN8_3DSTATE_VERTEX_BUFFERS * restrict values)
5132 {
5133 uint32_t *dw = (uint32_t * restrict) dst;
5134
5135 dw[0] =
5136 __gen_field(values->CommandType, 29, 31) |
5137 __gen_field(values->CommandSubType, 27, 28) |
5138 __gen_field(values->_3DCommandOpcode, 24, 26) |
5139 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5140 __gen_field(values->DwordLength, 0, 7) |
5141 0;
5142
5143 /* variable length fields follow */
5144 }
5145
5146 #define GEN8_3DSTATE_VERTEX_ELEMENTS_length_bias 0x00000002
5147 #define GEN8_3DSTATE_VERTEX_ELEMENTS_header \
5148 .CommandType = 3, \
5149 .CommandSubType = 3, \
5150 ._3DCommandOpcode = 0, \
5151 ._3DCommandSubOpcode = 9
5152
5153 struct GEN8_VERTEX_ELEMENT_STATE {
5154 uint32_t VertexBufferIndex;
5155 uint32_t Valid;
5156 uint32_t SourceElementFormat;
5157 uint32_t EdgeFlagEnable;
5158 uint32_t SourceElementOffset;
5159 uint32_t Component0Control;
5160 uint32_t Component1Control;
5161 uint32_t Component2Control;
5162 uint32_t Component3Control;
5163 };
5164
5165 static inline void
5166 GEN8_VERTEX_ELEMENT_STATE_pack(__gen_user_data *data, void * restrict dst,
5167 const struct GEN8_VERTEX_ELEMENT_STATE * restrict values)
5168 {
5169 uint32_t *dw = (uint32_t * restrict) dst;
5170
5171 dw[0] =
5172 __gen_field(values->VertexBufferIndex, 26, 31) |
5173 __gen_field(values->Valid, 25, 25) |
5174 __gen_field(values->SourceElementFormat, 16, 24) |
5175 __gen_field(values->EdgeFlagEnable, 15, 15) |
5176 __gen_field(values->SourceElementOffset, 0, 11) |
5177 0;
5178
5179 dw[1] =
5180 __gen_field(values->Component0Control, 28, 30) |
5181 __gen_field(values->Component1Control, 24, 26) |
5182 __gen_field(values->Component2Control, 20, 22) |
5183 __gen_field(values->Component3Control, 16, 18) |
5184 0;
5185
5186 }
5187
5188 struct GEN8_3DSTATE_VERTEX_ELEMENTS {
5189 uint32_t CommandType;
5190 uint32_t CommandSubType;
5191 uint32_t _3DCommandOpcode;
5192 uint32_t _3DCommandSubOpcode;
5193 uint32_t DwordLength;
5194 /* variable length fields follow */
5195 };
5196
5197 static inline void
5198 GEN8_3DSTATE_VERTEX_ELEMENTS_pack(__gen_user_data *data, void * restrict dst,
5199 const struct GEN8_3DSTATE_VERTEX_ELEMENTS * restrict values)
5200 {
5201 uint32_t *dw = (uint32_t * restrict) dst;
5202
5203 dw[0] =
5204 __gen_field(values->CommandType, 29, 31) |
5205 __gen_field(values->CommandSubType, 27, 28) |
5206 __gen_field(values->_3DCommandOpcode, 24, 26) |
5207 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5208 __gen_field(values->DwordLength, 0, 7) |
5209 0;
5210
5211 /* variable length fields follow */
5212 }
5213
5214 #define GEN8_3DSTATE_VF_length 0x00000002
5215 #define GEN8_3DSTATE_VF_length_bias 0x00000002
5216 #define GEN8_3DSTATE_VF_header \
5217 .CommandType = 3, \
5218 .CommandSubType = 3, \
5219 ._3DCommandOpcode = 0, \
5220 ._3DCommandSubOpcode = 12, \
5221 .DwordLength = 0
5222
5223 struct GEN8_3DSTATE_VF {
5224 uint32_t CommandType;
5225 uint32_t CommandSubType;
5226 uint32_t _3DCommandOpcode;
5227 uint32_t _3DCommandSubOpcode;
5228 uint32_t IndexedDrawCutIndexEnable;
5229 uint32_t DwordLength;
5230 uint32_t CutIndex;
5231 };
5232
5233 static inline void
5234 GEN8_3DSTATE_VF_pack(__gen_user_data *data, void * restrict dst,
5235 const struct GEN8_3DSTATE_VF * restrict values)
5236 {
5237 uint32_t *dw = (uint32_t * restrict) dst;
5238
5239 dw[0] =
5240 __gen_field(values->CommandType, 29, 31) |
5241 __gen_field(values->CommandSubType, 27, 28) |
5242 __gen_field(values->_3DCommandOpcode, 24, 26) |
5243 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5244 __gen_field(values->IndexedDrawCutIndexEnable, 8, 8) |
5245 __gen_field(values->DwordLength, 0, 7) |
5246 0;
5247
5248 dw[1] =
5249 __gen_field(values->CutIndex, 0, 31) |
5250 0;
5251
5252 }
5253
5254 #define GEN8_3DSTATE_VF_INSTANCING_length 0x00000003
5255 #define GEN8_3DSTATE_VF_INSTANCING_length_bias 0x00000002
5256 #define GEN8_3DSTATE_VF_INSTANCING_header \
5257 .CommandType = 3, \
5258 .CommandSubType = 3, \
5259 ._3DCommandOpcode = 0, \
5260 ._3DCommandSubOpcode = 73, \
5261 .DwordLength = 1
5262
5263 struct GEN8_3DSTATE_VF_INSTANCING {
5264 uint32_t CommandType;
5265 uint32_t CommandSubType;
5266 uint32_t _3DCommandOpcode;
5267 uint32_t _3DCommandSubOpcode;
5268 uint32_t DwordLength;
5269 uint32_t InstancingEnable;
5270 uint32_t VertexElementIndex;
5271 uint32_t InstanceDataStepRate;
5272 };
5273
5274 static inline void
5275 GEN8_3DSTATE_VF_INSTANCING_pack(__gen_user_data *data, void * restrict dst,
5276 const struct GEN8_3DSTATE_VF_INSTANCING * restrict values)
5277 {
5278 uint32_t *dw = (uint32_t * restrict) dst;
5279
5280 dw[0] =
5281 __gen_field(values->CommandType, 29, 31) |
5282 __gen_field(values->CommandSubType, 27, 28) |
5283 __gen_field(values->_3DCommandOpcode, 24, 26) |
5284 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5285 __gen_field(values->DwordLength, 0, 7) |
5286 0;
5287
5288 dw[1] =
5289 __gen_field(values->InstancingEnable, 8, 8) |
5290 __gen_field(values->VertexElementIndex, 0, 5) |
5291 0;
5292
5293 dw[2] =
5294 __gen_field(values->InstanceDataStepRate, 0, 31) |
5295 0;
5296
5297 }
5298
5299 #define GEN8_3DSTATE_VF_SGVS_length 0x00000002
5300 #define GEN8_3DSTATE_VF_SGVS_length_bias 0x00000002
5301 #define GEN8_3DSTATE_VF_SGVS_header \
5302 .CommandType = 3, \
5303 .CommandSubType = 3, \
5304 ._3DCommandOpcode = 0, \
5305 ._3DCommandSubOpcode = 74, \
5306 .DwordLength = 0
5307
5308 struct GEN8_3DSTATE_VF_SGVS {
5309 uint32_t CommandType;
5310 uint32_t CommandSubType;
5311 uint32_t _3DCommandOpcode;
5312 uint32_t _3DCommandSubOpcode;
5313 uint32_t DwordLength;
5314 uint32_t InstanceIDEnable;
5315 #define COMP_0 0
5316 #define COMP_1 1
5317 #define COMP_2 2
5318 #define COMP_3 3
5319 uint32_t InstanceIDComponentNumber;
5320 uint32_t InstanceIDElementOffset;
5321 uint32_t VertexIDEnable;
5322 #define COMP_0 0
5323 #define COMP_1 1
5324 #define COMP_2 2
5325 #define COMP_3 3
5326 uint32_t VertexIDComponentNumber;
5327 uint32_t VertexIDElementOffset;
5328 };
5329
5330 static inline void
5331 GEN8_3DSTATE_VF_SGVS_pack(__gen_user_data *data, void * restrict dst,
5332 const struct GEN8_3DSTATE_VF_SGVS * restrict values)
5333 {
5334 uint32_t *dw = (uint32_t * restrict) dst;
5335
5336 dw[0] =
5337 __gen_field(values->CommandType, 29, 31) |
5338 __gen_field(values->CommandSubType, 27, 28) |
5339 __gen_field(values->_3DCommandOpcode, 24, 26) |
5340 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5341 __gen_field(values->DwordLength, 0, 7) |
5342 0;
5343
5344 dw[1] =
5345 __gen_field(values->InstanceIDEnable, 31, 31) |
5346 __gen_field(values->InstanceIDComponentNumber, 29, 30) |
5347 __gen_field(values->InstanceIDElementOffset, 16, 21) |
5348 __gen_field(values->VertexIDEnable, 15, 15) |
5349 __gen_field(values->VertexIDComponentNumber, 13, 14) |
5350 __gen_field(values->VertexIDElementOffset, 0, 5) |
5351 0;
5352
5353 }
5354
5355 #define GEN8_3DSTATE_VF_STATISTICS_length 0x00000001
5356 #define GEN8_3DSTATE_VF_STATISTICS_length_bias 0x00000001
5357 #define GEN8_3DSTATE_VF_STATISTICS_header \
5358 .CommandType = 3, \
5359 .CommandSubType = 1, \
5360 ._3DCommandOpcode = 0, \
5361 ._3DCommandSubOpcode = 11
5362
5363 struct GEN8_3DSTATE_VF_STATISTICS {
5364 uint32_t CommandType;
5365 uint32_t CommandSubType;
5366 uint32_t _3DCommandOpcode;
5367 uint32_t _3DCommandSubOpcode;
5368 uint32_t StatisticsEnable;
5369 };
5370
5371 static inline void
5372 GEN8_3DSTATE_VF_STATISTICS_pack(__gen_user_data *data, void * restrict dst,
5373 const struct GEN8_3DSTATE_VF_STATISTICS * restrict values)
5374 {
5375 uint32_t *dw = (uint32_t * restrict) dst;
5376
5377 dw[0] =
5378 __gen_field(values->CommandType, 29, 31) |
5379 __gen_field(values->CommandSubType, 27, 28) |
5380 __gen_field(values->_3DCommandOpcode, 24, 26) |
5381 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5382 __gen_field(values->StatisticsEnable, 0, 0) |
5383 0;
5384
5385 }
5386
5387 #define GEN8_3DSTATE_VF_TOPOLOGY_length 0x00000002
5388 #define GEN8_3DSTATE_VF_TOPOLOGY_length_bias 0x00000002
5389 #define GEN8_3DSTATE_VF_TOPOLOGY_header \
5390 .CommandType = 3, \
5391 .CommandSubType = 3, \
5392 ._3DCommandOpcode = 0, \
5393 ._3DCommandSubOpcode = 75, \
5394 .DwordLength = 0
5395
5396 struct GEN8_3DSTATE_VF_TOPOLOGY {
5397 uint32_t CommandType;
5398 uint32_t CommandSubType;
5399 uint32_t _3DCommandOpcode;
5400 uint32_t _3DCommandSubOpcode;
5401 uint32_t DwordLength;
5402 uint32_t PrimitiveTopologyType;
5403 };
5404
5405 static inline void
5406 GEN8_3DSTATE_VF_TOPOLOGY_pack(__gen_user_data *data, void * restrict dst,
5407 const struct GEN8_3DSTATE_VF_TOPOLOGY * restrict values)
5408 {
5409 uint32_t *dw = (uint32_t * restrict) dst;
5410
5411 dw[0] =
5412 __gen_field(values->CommandType, 29, 31) |
5413 __gen_field(values->CommandSubType, 27, 28) |
5414 __gen_field(values->_3DCommandOpcode, 24, 26) |
5415 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5416 __gen_field(values->DwordLength, 0, 7) |
5417 0;
5418
5419 dw[1] =
5420 __gen_field(values->PrimitiveTopologyType, 0, 5) |
5421 0;
5422
5423 }
5424
5425 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length 0x00000002
5426 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length_bias 0x00000002
5427 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_header\
5428 .CommandType = 3, \
5429 .CommandSubType = 3, \
5430 ._3DCommandOpcode = 0, \
5431 ._3DCommandSubOpcode = 35, \
5432 .DwordLength = 0
5433
5434 struct GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC {
5435 uint32_t CommandType;
5436 uint32_t CommandSubType;
5437 uint32_t _3DCommandOpcode;
5438 uint32_t _3DCommandSubOpcode;
5439 uint32_t DwordLength;
5440 uint32_t CCViewportPointer;
5441 };
5442
5443 static inline void
5444 GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_pack(__gen_user_data *data, void * restrict dst,
5445 const struct GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC * restrict values)
5446 {
5447 uint32_t *dw = (uint32_t * restrict) dst;
5448
5449 dw[0] =
5450 __gen_field(values->CommandType, 29, 31) |
5451 __gen_field(values->CommandSubType, 27, 28) |
5452 __gen_field(values->_3DCommandOpcode, 24, 26) |
5453 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5454 __gen_field(values->DwordLength, 0, 7) |
5455 0;
5456
5457 dw[1] =
5458 __gen_offset(values->CCViewportPointer, 5, 31) |
5459 0;
5460
5461 }
5462
5463 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length 0x00000002
5464 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length_bias 0x00000002
5465 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_header\
5466 .CommandType = 3, \
5467 .CommandSubType = 3, \
5468 ._3DCommandOpcode = 0, \
5469 ._3DCommandSubOpcode = 33, \
5470 .DwordLength = 0
5471
5472 struct GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP {
5473 uint32_t CommandType;
5474 uint32_t CommandSubType;
5475 uint32_t _3DCommandOpcode;
5476 uint32_t _3DCommandSubOpcode;
5477 uint32_t DwordLength;
5478 uint32_t SFClipViewportPointer;
5479 };
5480
5481 static inline void
5482 GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_pack(__gen_user_data *data, void * restrict dst,
5483 const struct GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP * restrict values)
5484 {
5485 uint32_t *dw = (uint32_t * restrict) dst;
5486
5487 dw[0] =
5488 __gen_field(values->CommandType, 29, 31) |
5489 __gen_field(values->CommandSubType, 27, 28) |
5490 __gen_field(values->_3DCommandOpcode, 24, 26) |
5491 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5492 __gen_field(values->DwordLength, 0, 7) |
5493 0;
5494
5495 dw[1] =
5496 __gen_offset(values->SFClipViewportPointer, 6, 31) |
5497 0;
5498
5499 }
5500
5501 #define GEN8_3DSTATE_WM_length 0x00000002
5502 #define GEN8_3DSTATE_WM_length_bias 0x00000002
5503 #define GEN8_3DSTATE_WM_header \
5504 .CommandType = 3, \
5505 .CommandSubType = 3, \
5506 ._3DCommandOpcode = 0, \
5507 ._3DCommandSubOpcode = 20, \
5508 .DwordLength = 0
5509
5510 struct GEN8_3DSTATE_WM {
5511 uint32_t CommandType;
5512 uint32_t CommandSubType;
5513 uint32_t _3DCommandOpcode;
5514 uint32_t _3DCommandSubOpcode;
5515 uint32_t DwordLength;
5516 uint32_t StatisticsEnable;
5517 uint32_t LegacyDepthBufferClearEnable;
5518 uint32_t LegacyDepthBufferResolveEnable;
5519 uint32_t LegacyHierarchicalDepthBufferResolveEnable;
5520 uint32_t LegacyDiamondLineRasterization;
5521 #define NORMAL 0
5522 #define PSEXEC 1
5523 #define PREPS 2
5524 uint32_t EarlyDepthStencilControl;
5525 #define Normal 0
5526 #define ForceOff 1
5527 #define ForceON 2
5528 uint32_t ForceThreadDispatchEnable;
5529 #define INTERP_PIXEL 0
5530 #define INTERP_CENTROID 2
5531 #define INTERP_SAMPLE 3
5532 uint32_t PositionZWInterpolationMode;
5533 uint32_t BarycentricInterpolationMode;
5534 #define _05pixels 0
5535 #define _10pixels 1
5536 #define _20pixels 2
5537 #define _40pixels 3
5538 uint32_t LineEndCapAntialiasingRegionWidth;
5539 #define _05pixels 0
5540 #define _10pixels 1
5541 #define _20pixels 2
5542 #define _40pixels 3
5543 uint32_t LineAntialiasingRegionWidth;
5544 uint32_t PolygonStippleEnable;
5545 uint32_t LineStippleEnable;
5546 #define RASTRULE_UPPER_LEFT 0
5547 #define RASTRULE_UPPER_RIGHT 1
5548 uint32_t PointRasterizationRule;
5549 #define Normal 0
5550 #define ForceOff 1
5551 #define ForceON 2
5552 uint32_t ForceKillPixelEnable;
5553 };
5554
5555 static inline void
5556 GEN8_3DSTATE_WM_pack(__gen_user_data *data, void * restrict dst,
5557 const struct GEN8_3DSTATE_WM * restrict values)
5558 {
5559 uint32_t *dw = (uint32_t * restrict) dst;
5560
5561 dw[0] =
5562 __gen_field(values->CommandType, 29, 31) |
5563 __gen_field(values->CommandSubType, 27, 28) |
5564 __gen_field(values->_3DCommandOpcode, 24, 26) |
5565 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5566 __gen_field(values->DwordLength, 0, 7) |
5567 0;
5568
5569 dw[1] =
5570 __gen_field(values->StatisticsEnable, 31, 31) |
5571 __gen_field(values->LegacyDepthBufferClearEnable, 30, 30) |
5572 __gen_field(values->LegacyDepthBufferResolveEnable, 28, 28) |
5573 __gen_field(values->LegacyHierarchicalDepthBufferResolveEnable, 27, 27) |
5574 __gen_field(values->LegacyDiamondLineRasterization, 26, 26) |
5575 __gen_field(values->EarlyDepthStencilControl, 21, 22) |
5576 __gen_field(values->ForceThreadDispatchEnable, 19, 20) |
5577 __gen_field(values->PositionZWInterpolationMode, 17, 18) |
5578 __gen_field(values->BarycentricInterpolationMode, 11, 16) |
5579 __gen_field(values->LineEndCapAntialiasingRegionWidth, 8, 9) |
5580 __gen_field(values->LineAntialiasingRegionWidth, 6, 7) |
5581 __gen_field(values->PolygonStippleEnable, 4, 4) |
5582 __gen_field(values->LineStippleEnable, 3, 3) |
5583 __gen_field(values->PointRasterizationRule, 2, 2) |
5584 __gen_field(values->ForceKillPixelEnable, 0, 1) |
5585 0;
5586
5587 }
5588
5589 #define GEN8_3DSTATE_WM_CHROMAKEY_length 0x00000002
5590 #define GEN8_3DSTATE_WM_CHROMAKEY_length_bias 0x00000002
5591 #define GEN8_3DSTATE_WM_CHROMAKEY_header \
5592 .CommandType = 3, \
5593 .CommandSubType = 3, \
5594 ._3DCommandOpcode = 0, \
5595 ._3DCommandSubOpcode = 76, \
5596 .DwordLength = 0
5597
5598 struct GEN8_3DSTATE_WM_CHROMAKEY {
5599 uint32_t CommandType;
5600 uint32_t CommandSubType;
5601 uint32_t _3DCommandOpcode;
5602 uint32_t _3DCommandSubOpcode;
5603 uint32_t DwordLength;
5604 uint32_t ChromaKeyKillEnable;
5605 };
5606
5607 static inline void
5608 GEN8_3DSTATE_WM_CHROMAKEY_pack(__gen_user_data *data, void * restrict dst,
5609 const struct GEN8_3DSTATE_WM_CHROMAKEY * restrict values)
5610 {
5611 uint32_t *dw = (uint32_t * restrict) dst;
5612
5613 dw[0] =
5614 __gen_field(values->CommandType, 29, 31) |
5615 __gen_field(values->CommandSubType, 27, 28) |
5616 __gen_field(values->_3DCommandOpcode, 24, 26) |
5617 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5618 __gen_field(values->DwordLength, 0, 7) |
5619 0;
5620
5621 dw[1] =
5622 __gen_field(values->ChromaKeyKillEnable, 31, 31) |
5623 0;
5624
5625 }
5626
5627 #define GEN8_3DSTATE_WM_DEPTH_STENCIL_length 0x00000003
5628 #define GEN8_3DSTATE_WM_DEPTH_STENCIL_length_bias 0x00000002
5629 #define GEN8_3DSTATE_WM_DEPTH_STENCIL_header \
5630 .CommandType = 3, \
5631 .CommandSubType = 3, \
5632 ._3DCommandOpcode = 0, \
5633 ._3DCommandSubOpcode = 78, \
5634 .DwordLength = 1
5635
5636 struct GEN8_3DSTATE_WM_DEPTH_STENCIL {
5637 uint32_t CommandType;
5638 uint32_t CommandSubType;
5639 uint32_t _3DCommandOpcode;
5640 uint32_t _3DCommandSubOpcode;
5641 uint32_t DwordLength;
5642 uint32_t StencilFailOp;
5643 uint32_t StencilPassDepthFailOp;
5644 uint32_t StencilPassDepthPassOp;
5645 uint32_t BackfaceStencilTestFunction;
5646 uint32_t BackfaceStencilFailOp;
5647 uint32_t BackfaceStencilPassDepthFailOp;
5648 uint32_t BackfaceStencilPassDepthPassOp;
5649 uint32_t StencilTestFunction;
5650 uint32_t DepthTestFunction;
5651 #define False 0
5652 #define True 1
5653 uint32_t DoubleSidedStencilEnable;
5654 uint32_t StencilTestEnable;
5655 uint32_t StencilBufferWriteEnable;
5656 uint32_t DepthTestEnable;
5657 uint32_t DepthBufferWriteEnable;
5658 uint32_t StencilTestMask;
5659 uint32_t StencilWriteMask;
5660 uint32_t BackfaceStencilTestMask;
5661 uint32_t BackfaceStencilWriteMask;
5662 };
5663
5664 static inline void
5665 GEN8_3DSTATE_WM_DEPTH_STENCIL_pack(__gen_user_data *data, void * restrict dst,
5666 const struct GEN8_3DSTATE_WM_DEPTH_STENCIL * restrict values)
5667 {
5668 uint32_t *dw = (uint32_t * restrict) dst;
5669
5670 dw[0] =
5671 __gen_field(values->CommandType, 29, 31) |
5672 __gen_field(values->CommandSubType, 27, 28) |
5673 __gen_field(values->_3DCommandOpcode, 24, 26) |
5674 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5675 __gen_field(values->DwordLength, 0, 7) |
5676 0;
5677
5678 dw[1] =
5679 __gen_field(values->StencilFailOp, 29, 31) |
5680 __gen_field(values->StencilPassDepthFailOp, 26, 28) |
5681 __gen_field(values->StencilPassDepthPassOp, 23, 25) |
5682 __gen_field(values->BackfaceStencilTestFunction, 20, 22) |
5683 __gen_field(values->BackfaceStencilFailOp, 17, 19) |
5684 __gen_field(values->BackfaceStencilPassDepthFailOp, 14, 16) |
5685 __gen_field(values->BackfaceStencilPassDepthPassOp, 11, 13) |
5686 __gen_field(values->StencilTestFunction, 8, 10) |
5687 __gen_field(values->DepthTestFunction, 5, 7) |
5688 __gen_field(values->DoubleSidedStencilEnable, 4, 4) |
5689 __gen_field(values->StencilTestEnable, 3, 3) |
5690 __gen_field(values->StencilBufferWriteEnable, 2, 2) |
5691 __gen_field(values->DepthTestEnable, 1, 1) |
5692 __gen_field(values->DepthBufferWriteEnable, 0, 0) |
5693 0;
5694
5695 dw[2] =
5696 __gen_field(values->StencilTestMask, 24, 31) |
5697 __gen_field(values->StencilWriteMask, 16, 23) |
5698 __gen_field(values->BackfaceStencilTestMask, 8, 15) |
5699 __gen_field(values->BackfaceStencilWriteMask, 0, 7) |
5700 0;
5701
5702 }
5703
5704 #define GEN8_3DSTATE_WM_HZ_OP_length 0x00000005
5705 #define GEN8_3DSTATE_WM_HZ_OP_length_bias 0x00000002
5706 #define GEN8_3DSTATE_WM_HZ_OP_header \
5707 .CommandType = 3, \
5708 .CommandSubType = 3, \
5709 ._3DCommandOpcode = 0, \
5710 ._3DCommandSubOpcode = 82, \
5711 .DwordLength = 3
5712
5713 struct GEN8_3DSTATE_WM_HZ_OP {
5714 uint32_t CommandType;
5715 uint32_t CommandSubType;
5716 uint32_t _3DCommandOpcode;
5717 uint32_t _3DCommandSubOpcode;
5718 uint32_t DwordLength;
5719 uint32_t StencilBufferClearEnable;
5720 uint32_t DepthBufferClearEnable;
5721 uint32_t ScissorRectangleEnable;
5722 uint32_t DepthBufferResolveEnable;
5723 uint32_t HierarchicalDepthBufferResolveEnable;
5724 uint32_t PixelPositionOffsetEnable;
5725 uint32_t FullSurfaceDepthClear;
5726 uint32_t StencilClearValue;
5727 uint32_t NumberofMultisamples;
5728 uint32_t ClearRectangleYMin;
5729 uint32_t ClearRectangleXMin;
5730 uint32_t ClearRectangleYMax;
5731 uint32_t ClearRectangleXMax;
5732 uint32_t SampleMask;
5733 };
5734
5735 static inline void
5736 GEN8_3DSTATE_WM_HZ_OP_pack(__gen_user_data *data, void * restrict dst,
5737 const struct GEN8_3DSTATE_WM_HZ_OP * restrict values)
5738 {
5739 uint32_t *dw = (uint32_t * restrict) dst;
5740
5741 dw[0] =
5742 __gen_field(values->CommandType, 29, 31) |
5743 __gen_field(values->CommandSubType, 27, 28) |
5744 __gen_field(values->_3DCommandOpcode, 24, 26) |
5745 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5746 __gen_field(values->DwordLength, 0, 7) |
5747 0;
5748
5749 dw[1] =
5750 __gen_field(values->StencilBufferClearEnable, 31, 31) |
5751 __gen_field(values->DepthBufferClearEnable, 30, 30) |
5752 __gen_field(values->ScissorRectangleEnable, 29, 29) |
5753 __gen_field(values->DepthBufferResolveEnable, 28, 28) |
5754 __gen_field(values->HierarchicalDepthBufferResolveEnable, 27, 27) |
5755 __gen_field(values->PixelPositionOffsetEnable, 26, 26) |
5756 __gen_field(values->FullSurfaceDepthClear, 25, 25) |
5757 __gen_field(values->StencilClearValue, 16, 23) |
5758 __gen_field(values->NumberofMultisamples, 13, 15) |
5759 0;
5760
5761 dw[2] =
5762 __gen_field(values->ClearRectangleYMin, 16, 31) |
5763 __gen_field(values->ClearRectangleXMin, 0, 15) |
5764 0;
5765
5766 dw[3] =
5767 __gen_field(values->ClearRectangleYMax, 16, 31) |
5768 __gen_field(values->ClearRectangleXMax, 0, 15) |
5769 0;
5770
5771 dw[4] =
5772 __gen_field(values->SampleMask, 0, 15) |
5773 0;
5774
5775 }
5776
5777 #define GEN8_GPGPU_WALKER_length 0x0000000f
5778 #define GEN8_GPGPU_WALKER_length_bias 0x00000002
5779 #define GEN8_GPGPU_WALKER_header \
5780 .CommandType = 3, \
5781 .Pipeline = 2, \
5782 .MediaCommandOpcode = 1, \
5783 .SubOpcode = 5, \
5784 .DwordLength = 13
5785
5786 struct GEN8_GPGPU_WALKER {
5787 uint32_t CommandType;
5788 uint32_t Pipeline;
5789 uint32_t MediaCommandOpcode;
5790 uint32_t SubOpcode;
5791 uint32_t IndirectParameterEnable;
5792 uint32_t PredicateEnable;
5793 uint32_t DwordLength;
5794 uint32_t InterfaceDescriptorOffset;
5795 uint32_t IndirectDataLength;
5796 uint32_t IndirectDataStartAddress;
5797 #define SIMD8 0
5798 #define SIMD16 1
5799 #define SIMD32 2
5800 uint32_t SIMDSize;
5801 uint32_t ThreadDepthCounterMaximum;
5802 uint32_t ThreadHeightCounterMaximum;
5803 uint32_t ThreadWidthCounterMaximum;
5804 uint32_t ThreadGroupIDStartingX;
5805 uint32_t ThreadGroupIDXDimension;
5806 uint32_t ThreadGroupIDStartingY;
5807 uint32_t ThreadGroupIDYDimension;
5808 uint32_t ThreadGroupIDStartingResumeZ;
5809 uint32_t ThreadGroupIDZDimension;
5810 uint32_t RightExecutionMask;
5811 uint32_t BottomExecutionMask;
5812 };
5813
5814 static inline void
5815 GEN8_GPGPU_WALKER_pack(__gen_user_data *data, void * restrict dst,
5816 const struct GEN8_GPGPU_WALKER * restrict values)
5817 {
5818 uint32_t *dw = (uint32_t * restrict) dst;
5819
5820 dw[0] =
5821 __gen_field(values->CommandType, 29, 31) |
5822 __gen_field(values->Pipeline, 27, 28) |
5823 __gen_field(values->MediaCommandOpcode, 24, 26) |
5824 __gen_field(values->SubOpcode, 16, 23) |
5825 __gen_field(values->IndirectParameterEnable, 10, 10) |
5826 __gen_field(values->PredicateEnable, 8, 8) |
5827 __gen_field(values->DwordLength, 0, 7) |
5828 0;
5829
5830 dw[1] =
5831 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
5832 0;
5833
5834 dw[2] =
5835 __gen_field(values->IndirectDataLength, 0, 16) |
5836 0;
5837
5838 dw[3] =
5839 __gen_offset(values->IndirectDataStartAddress, 6, 31) |
5840 0;
5841
5842 dw[4] =
5843 __gen_field(values->SIMDSize, 30, 31) |
5844 __gen_field(values->ThreadDepthCounterMaximum, 16, 21) |
5845 __gen_field(values->ThreadHeightCounterMaximum, 8, 13) |
5846 __gen_field(values->ThreadWidthCounterMaximum, 0, 5) |
5847 0;
5848
5849 dw[5] =
5850 __gen_field(values->ThreadGroupIDStartingX, 0, 31) |
5851 0;
5852
5853 dw[6] =
5854 0;
5855
5856 dw[7] =
5857 __gen_field(values->ThreadGroupIDXDimension, 0, 31) |
5858 0;
5859
5860 dw[8] =
5861 __gen_field(values->ThreadGroupIDStartingY, 0, 31) |
5862 0;
5863
5864 dw[9] =
5865 0;
5866
5867 dw[10] =
5868 __gen_field(values->ThreadGroupIDYDimension, 0, 31) |
5869 0;
5870
5871 dw[11] =
5872 __gen_field(values->ThreadGroupIDStartingResumeZ, 0, 31) |
5873 0;
5874
5875 dw[12] =
5876 __gen_field(values->ThreadGroupIDZDimension, 0, 31) |
5877 0;
5878
5879 dw[13] =
5880 __gen_field(values->RightExecutionMask, 0, 31) |
5881 0;
5882
5883 dw[14] =
5884 __gen_field(values->BottomExecutionMask, 0, 31) |
5885 0;
5886
5887 }
5888
5889 #define GEN8_MEDIA_CURBE_LOAD_length 0x00000004
5890 #define GEN8_MEDIA_CURBE_LOAD_length_bias 0x00000002
5891 #define GEN8_MEDIA_CURBE_LOAD_header \
5892 .CommandType = 3, \
5893 .Pipeline = 2, \
5894 .MediaCommandOpcode = 0, \
5895 .SubOpcode = 1, \
5896 .DwordLength = 2
5897
5898 struct GEN8_MEDIA_CURBE_LOAD {
5899 uint32_t CommandType;
5900 uint32_t Pipeline;
5901 uint32_t MediaCommandOpcode;
5902 uint32_t SubOpcode;
5903 uint32_t DwordLength;
5904 uint32_t CURBETotalDataLength;
5905 uint32_t CURBEDataStartAddress;
5906 };
5907
5908 static inline void
5909 GEN8_MEDIA_CURBE_LOAD_pack(__gen_user_data *data, void * restrict dst,
5910 const struct GEN8_MEDIA_CURBE_LOAD * restrict values)
5911 {
5912 uint32_t *dw = (uint32_t * restrict) dst;
5913
5914 dw[0] =
5915 __gen_field(values->CommandType, 29, 31) |
5916 __gen_field(values->Pipeline, 27, 28) |
5917 __gen_field(values->MediaCommandOpcode, 24, 26) |
5918 __gen_field(values->SubOpcode, 16, 23) |
5919 __gen_field(values->DwordLength, 0, 15) |
5920 0;
5921
5922 dw[1] =
5923 0;
5924
5925 dw[2] =
5926 __gen_field(values->CURBETotalDataLength, 0, 16) |
5927 0;
5928
5929 dw[3] =
5930 __gen_field(values->CURBEDataStartAddress, 0, 31) |
5931 0;
5932
5933 }
5934
5935 #define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 0x00000004
5936 #define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length_bias 0x00000002
5937 #define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_header\
5938 .CommandType = 3, \
5939 .Pipeline = 2, \
5940 .MediaCommandOpcode = 0, \
5941 .SubOpcode = 2, \
5942 .DwordLength = 2
5943
5944 struct GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD {
5945 uint32_t CommandType;
5946 uint32_t Pipeline;
5947 uint32_t MediaCommandOpcode;
5948 uint32_t SubOpcode;
5949 uint32_t DwordLength;
5950 uint32_t InterfaceDescriptorTotalLength;
5951 uint32_t InterfaceDescriptorDataStartAddress;
5952 };
5953
5954 static inline void
5955 GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_pack(__gen_user_data *data, void * restrict dst,
5956 const struct GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD * restrict values)
5957 {
5958 uint32_t *dw = (uint32_t * restrict) dst;
5959
5960 dw[0] =
5961 __gen_field(values->CommandType, 29, 31) |
5962 __gen_field(values->Pipeline, 27, 28) |
5963 __gen_field(values->MediaCommandOpcode, 24, 26) |
5964 __gen_field(values->SubOpcode, 16, 23) |
5965 __gen_field(values->DwordLength, 0, 15) |
5966 0;
5967
5968 dw[1] =
5969 0;
5970
5971 dw[2] =
5972 __gen_field(values->InterfaceDescriptorTotalLength, 0, 16) |
5973 0;
5974
5975 dw[3] =
5976 __gen_offset(values->InterfaceDescriptorDataStartAddress, 0, 31) |
5977 0;
5978
5979 }
5980
5981 #define GEN8_MEDIA_OBJECT_length_bias 0x00000002
5982 #define GEN8_MEDIA_OBJECT_header \
5983 .CommandType = 3, \
5984 .MediaCommandPipeline = 2, \
5985 .MediaCommandOpcode = 1, \
5986 .MediaCommandSubOpcode = 0
5987
5988 struct GEN8_MEDIA_OBJECT {
5989 uint32_t CommandType;
5990 uint32_t MediaCommandPipeline;
5991 uint32_t MediaCommandOpcode;
5992 uint32_t MediaCommandSubOpcode;
5993 uint32_t DwordLength;
5994 uint32_t InterfaceDescriptorOffset;
5995 uint32_t ChildrenPresent;
5996 #define Nothreadsynchronization 0
5997 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
5998 uint32_t ThreadSynchronization;
5999 uint32_t ForceDestination;
6000 #define Notusingscoreboard 0
6001 #define Usingscoreboard 1
6002 uint32_t UseScoreboard;
6003 #define Slice0 0
6004 #define Slice1 1
6005 #define Slice2 2
6006 uint32_t SliceDestinationSelect;
6007 #define SubSlice2 2
6008 #define SubSlice1 1
6009 #define SubSlice0 0
6010 uint32_t SubSliceDestinationSelect;
6011 uint32_t IndirectDataLength;
6012 __gen_address_type IndirectDataStartAddress;
6013 uint32_t ScoredboardY;
6014 uint32_t ScoreboardX;
6015 uint32_t ScoreboardColor;
6016 uint32_t ScoreboardMask;
6017 /* variable length fields follow */
6018 };
6019
6020 static inline void
6021 GEN8_MEDIA_OBJECT_pack(__gen_user_data *data, void * restrict dst,
6022 const struct GEN8_MEDIA_OBJECT * restrict values)
6023 {
6024 uint32_t *dw = (uint32_t * restrict) dst;
6025
6026 dw[0] =
6027 __gen_field(values->CommandType, 29, 31) |
6028 __gen_field(values->MediaCommandPipeline, 27, 28) |
6029 __gen_field(values->MediaCommandOpcode, 24, 26) |
6030 __gen_field(values->MediaCommandSubOpcode, 16, 23) |
6031 __gen_field(values->DwordLength, 0, 15) |
6032 0;
6033
6034 dw[1] =
6035 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6036 0;
6037
6038 dw[2] =
6039 __gen_field(values->ChildrenPresent, 31, 31) |
6040 __gen_field(values->ThreadSynchronization, 24, 24) |
6041 __gen_field(values->ForceDestination, 22, 22) |
6042 __gen_field(values->UseScoreboard, 21, 21) |
6043 __gen_field(values->SliceDestinationSelect, 19, 20) |
6044 __gen_field(values->SubSliceDestinationSelect, 17, 18) |
6045 __gen_field(values->IndirectDataLength, 0, 16) |
6046 0;
6047
6048 uint32_t dw3 =
6049 0;
6050
6051 dw[3] =
6052 __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, dw3);
6053
6054 dw[4] =
6055 __gen_field(values->ScoredboardY, 16, 24) |
6056 __gen_field(values->ScoreboardX, 0, 8) |
6057 0;
6058
6059 dw[5] =
6060 __gen_field(values->ScoreboardColor, 16, 19) |
6061 __gen_field(values->ScoreboardMask, 0, 7) |
6062 0;
6063
6064 /* variable length fields follow */
6065 }
6066
6067 #define GEN8_MEDIA_OBJECT_GRPID_length_bias 0x00000002
6068 #define GEN8_MEDIA_OBJECT_GRPID_header \
6069 .CommandType = 3, \
6070 .MediaCommandPipeline = 2, \
6071 .MediaCommandOpcode = 1, \
6072 .MediaCommandSubOpcode = 6
6073
6074 struct GEN8_MEDIA_OBJECT_GRPID {
6075 uint32_t CommandType;
6076 uint32_t MediaCommandPipeline;
6077 uint32_t MediaCommandOpcode;
6078 uint32_t MediaCommandSubOpcode;
6079 uint32_t DwordLength;
6080 uint32_t InterfaceDescriptorOffset;
6081 uint32_t EndofThreadGroup;
6082 uint32_t ForceDestination;
6083 #define Notusingscoreboard 0
6084 #define Usingscoreboard 1
6085 uint32_t UseScoreboard;
6086 #define Slice0 0
6087 #define Slice1 1
6088 #define Slice2 2
6089 uint32_t SliceDestinationSelect;
6090 #define SubSlice2 2
6091 #define SubSlice1 1
6092 #define SubSlice0 0
6093 uint32_t SubSliceDestinationSelect;
6094 uint32_t IndirectDataLength;
6095 __gen_address_type IndirectDataStartAddress;
6096 uint32_t ScoredboardY;
6097 uint32_t ScoreboardX;
6098 uint32_t ScoreboardColor;
6099 uint32_t ScoreboardMask;
6100 uint32_t GroupID;
6101 /* variable length fields follow */
6102 };
6103
6104 static inline void
6105 GEN8_MEDIA_OBJECT_GRPID_pack(__gen_user_data *data, void * restrict dst,
6106 const struct GEN8_MEDIA_OBJECT_GRPID * restrict values)
6107 {
6108 uint32_t *dw = (uint32_t * restrict) dst;
6109
6110 dw[0] =
6111 __gen_field(values->CommandType, 29, 31) |
6112 __gen_field(values->MediaCommandPipeline, 27, 28) |
6113 __gen_field(values->MediaCommandOpcode, 24, 26) |
6114 __gen_field(values->MediaCommandSubOpcode, 16, 23) |
6115 __gen_field(values->DwordLength, 0, 15) |
6116 0;
6117
6118 dw[1] =
6119 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6120 0;
6121
6122 dw[2] =
6123 __gen_field(values->EndofThreadGroup, 23, 23) |
6124 __gen_field(values->ForceDestination, 22, 22) |
6125 __gen_field(values->UseScoreboard, 21, 21) |
6126 __gen_field(values->SliceDestinationSelect, 19, 20) |
6127 __gen_field(values->SubSliceDestinationSelect, 17, 18) |
6128 __gen_field(values->IndirectDataLength, 0, 16) |
6129 0;
6130
6131 uint32_t dw3 =
6132 0;
6133
6134 dw[3] =
6135 __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, dw3);
6136
6137 dw[4] =
6138 __gen_field(values->ScoredboardY, 16, 24) |
6139 __gen_field(values->ScoreboardX, 0, 8) |
6140 0;
6141
6142 dw[5] =
6143 __gen_field(values->ScoreboardColor, 16, 19) |
6144 __gen_field(values->ScoreboardMask, 0, 7) |
6145 0;
6146
6147 dw[6] =
6148 __gen_field(values->GroupID, 0, 31) |
6149 0;
6150
6151 /* variable length fields follow */
6152 }
6153
6154 #define GEN8_MEDIA_OBJECT_PRT_length 0x00000010
6155 #define GEN8_MEDIA_OBJECT_PRT_length_bias 0x00000002
6156 #define GEN8_MEDIA_OBJECT_PRT_header \
6157 .CommandType = 3, \
6158 .Pipeline = 2, \
6159 .MediaCommandOpcode = 1, \
6160 .SubOpcode = 2, \
6161 .DwordLength = 14
6162
6163 struct GEN8_MEDIA_OBJECT_PRT {
6164 uint32_t CommandType;
6165 uint32_t Pipeline;
6166 uint32_t MediaCommandOpcode;
6167 uint32_t SubOpcode;
6168 uint32_t DwordLength;
6169 uint32_t InterfaceDescriptorOffset;
6170 uint32_t ChildrenPresent;
6171 uint32_t PRT_FenceNeeded;
6172 #define Rootthreadqueue 0
6173 #define VFEstateflush 1
6174 uint32_t PRT_FenceType;
6175 uint32_t InlineData;
6176 };
6177
6178 static inline void
6179 GEN8_MEDIA_OBJECT_PRT_pack(__gen_user_data *data, void * restrict dst,
6180 const struct GEN8_MEDIA_OBJECT_PRT * restrict values)
6181 {
6182 uint32_t *dw = (uint32_t * restrict) dst;
6183
6184 dw[0] =
6185 __gen_field(values->CommandType, 29, 31) |
6186 __gen_field(values->Pipeline, 27, 28) |
6187 __gen_field(values->MediaCommandOpcode, 24, 26) |
6188 __gen_field(values->SubOpcode, 16, 23) |
6189 __gen_field(values->DwordLength, 0, 15) |
6190 0;
6191
6192 dw[1] =
6193 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6194 0;
6195
6196 dw[2] =
6197 __gen_field(values->ChildrenPresent, 31, 31) |
6198 __gen_field(values->PRT_FenceNeeded, 23, 23) |
6199 __gen_field(values->PRT_FenceType, 22, 22) |
6200 0;
6201
6202 dw[3] =
6203 0;
6204
6205 dw[4] =
6206 __gen_field(values->InlineData, 0, 31) |
6207 0;
6208
6209 }
6210
6211 #define GEN8_MEDIA_OBJECT_WALKER_length_bias 0x00000002
6212 #define GEN8_MEDIA_OBJECT_WALKER_header \
6213 .CommandType = 3, \
6214 .Pipeline = 2, \
6215 .MediaCommandOpcode = 1, \
6216 .SubOpcode = 3
6217
6218 struct GEN8_MEDIA_OBJECT_WALKER {
6219 uint32_t CommandType;
6220 uint32_t Pipeline;
6221 uint32_t MediaCommandOpcode;
6222 uint32_t SubOpcode;
6223 uint32_t DwordLength;
6224 uint32_t InterfaceDescriptorOffset;
6225 uint32_t ChildrenPresent;
6226 #define Nothreadsynchronization 0
6227 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
6228 uint32_t ThreadSynchronization;
6229 #define Notusingscoreboard 0
6230 #define Usingscoreboard 1
6231 uint32_t UseScoreboard;
6232 uint32_t IndirectDataLength;
6233 uint32_t IndirectDataStartAddress;
6234 uint32_t GroupIDLoopSelect;
6235 uint32_t ScoreboardMask;
6236 uint32_t ColorCountMinusOne;
6237 uint32_t MiddleLoopExtraSteps;
6238 uint32_t LocalMidLoopUnitY;
6239 uint32_t MidLoopUnitX;
6240 uint32_t GlobalLoopExecCount;
6241 uint32_t LocalLoopExecCount;
6242 uint32_t BlockResolutionY;
6243 uint32_t BlockResolutionX;
6244 uint32_t LocalStartY;
6245 uint32_t LocalStartX;
6246 uint32_t LocalOuterLoopStrideY;
6247 uint32_t LocalOuterLoopStrideX;
6248 uint32_t LocalInnerLoopUnitY;
6249 uint32_t LocalInnerLoopUnitX;
6250 uint32_t GlobalResolutionY;
6251 uint32_t GlobalResolutionX;
6252 uint32_t GlobalStartY;
6253 uint32_t GlobalStartX;
6254 uint32_t GlobalOuterLoopStrideY;
6255 uint32_t GlobalOuterLoopStrideX;
6256 uint32_t GlobalInnerLoopUnitY;
6257 uint32_t GlobalInnerLoopUnitX;
6258 /* variable length fields follow */
6259 };
6260
6261 static inline void
6262 GEN8_MEDIA_OBJECT_WALKER_pack(__gen_user_data *data, void * restrict dst,
6263 const struct GEN8_MEDIA_OBJECT_WALKER * restrict values)
6264 {
6265 uint32_t *dw = (uint32_t * restrict) dst;
6266
6267 dw[0] =
6268 __gen_field(values->CommandType, 29, 31) |
6269 __gen_field(values->Pipeline, 27, 28) |
6270 __gen_field(values->MediaCommandOpcode, 24, 26) |
6271 __gen_field(values->SubOpcode, 16, 23) |
6272 __gen_field(values->DwordLength, 0, 15) |
6273 0;
6274
6275 dw[1] =
6276 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6277 0;
6278
6279 dw[2] =
6280 __gen_field(values->ChildrenPresent, 31, 31) |
6281 __gen_field(values->ThreadSynchronization, 24, 24) |
6282 __gen_field(values->UseScoreboard, 21, 21) |
6283 __gen_field(values->IndirectDataLength, 0, 16) |
6284 0;
6285
6286 dw[3] =
6287 __gen_offset(values->IndirectDataStartAddress, 0, 31) |
6288 0;
6289
6290 dw[4] =
6291 0;
6292
6293 dw[5] =
6294 __gen_field(values->GroupIDLoopSelect, 8, 31) |
6295 __gen_field(values->ScoreboardMask, 0, 7) |
6296 0;
6297
6298 dw[6] =
6299 __gen_field(values->ColorCountMinusOne, 24, 27) |
6300 __gen_field(values->MiddleLoopExtraSteps, 16, 20) |
6301 __gen_field(values->LocalMidLoopUnitY, 12, 13) |
6302 __gen_field(values->MidLoopUnitX, 8, 9) |
6303 0;
6304
6305 dw[7] =
6306 __gen_field(values->GlobalLoopExecCount, 16, 25) |
6307 __gen_field(values->LocalLoopExecCount, 0, 9) |
6308 0;
6309
6310 dw[8] =
6311 __gen_field(values->BlockResolutionY, 16, 24) |
6312 __gen_field(values->BlockResolutionX, 0, 8) |
6313 0;
6314
6315 dw[9] =
6316 __gen_field(values->LocalStartY, 16, 24) |
6317 __gen_field(values->LocalStartX, 0, 8) |
6318 0;
6319
6320 dw[10] =
6321 0;
6322
6323 dw[11] =
6324 __gen_field(values->LocalOuterLoopStrideY, 16, 25) |
6325 __gen_field(values->LocalOuterLoopStrideX, 0, 9) |
6326 0;
6327
6328 dw[12] =
6329 __gen_field(values->LocalInnerLoopUnitY, 16, 25) |
6330 __gen_field(values->LocalInnerLoopUnitX, 0, 9) |
6331 0;
6332
6333 dw[13] =
6334 __gen_field(values->GlobalResolutionY, 16, 24) |
6335 __gen_field(values->GlobalResolutionX, 0, 8) |
6336 0;
6337
6338 dw[14] =
6339 __gen_field(values->GlobalStartY, 16, 25) |
6340 __gen_field(values->GlobalStartX, 0, 9) |
6341 0;
6342
6343 dw[15] =
6344 __gen_field(values->GlobalOuterLoopStrideY, 16, 25) |
6345 __gen_field(values->GlobalOuterLoopStrideX, 0, 9) |
6346 0;
6347
6348 dw[16] =
6349 __gen_field(values->GlobalInnerLoopUnitY, 16, 25) |
6350 __gen_field(values->GlobalInnerLoopUnitX, 0, 9) |
6351 0;
6352
6353 /* variable length fields follow */
6354 }
6355
6356 #define GEN8_MEDIA_STATE_FLUSH_length 0x00000002
6357 #define GEN8_MEDIA_STATE_FLUSH_length_bias 0x00000002
6358 #define GEN8_MEDIA_STATE_FLUSH_header \
6359 .CommandType = 3, \
6360 .Pipeline = 2, \
6361 .MediaCommandOpcode = 0, \
6362 .SubOpcode = 4, \
6363 .DwordLength = 0
6364
6365 struct GEN8_MEDIA_STATE_FLUSH {
6366 uint32_t CommandType;
6367 uint32_t Pipeline;
6368 uint32_t MediaCommandOpcode;
6369 uint32_t SubOpcode;
6370 uint32_t DwordLength;
6371 uint32_t FlushtoGO;
6372 uint32_t WatermarkRequired;
6373 uint32_t InterfaceDescriptorOffset;
6374 };
6375
6376 static inline void
6377 GEN8_MEDIA_STATE_FLUSH_pack(__gen_user_data *data, void * restrict dst,
6378 const struct GEN8_MEDIA_STATE_FLUSH * restrict values)
6379 {
6380 uint32_t *dw = (uint32_t * restrict) dst;
6381
6382 dw[0] =
6383 __gen_field(values->CommandType, 29, 31) |
6384 __gen_field(values->Pipeline, 27, 28) |
6385 __gen_field(values->MediaCommandOpcode, 24, 26) |
6386 __gen_field(values->SubOpcode, 16, 23) |
6387 __gen_field(values->DwordLength, 0, 15) |
6388 0;
6389
6390 dw[1] =
6391 __gen_field(values->FlushtoGO, 7, 7) |
6392 __gen_field(values->WatermarkRequired, 6, 6) |
6393 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6394 0;
6395
6396 }
6397
6398 #define GEN8_MEDIA_VFE_STATE_length 0x00000009
6399 #define GEN8_MEDIA_VFE_STATE_length_bias 0x00000002
6400 #define GEN8_MEDIA_VFE_STATE_header \
6401 .CommandType = 3, \
6402 .Pipeline = 2, \
6403 .MediaCommandOpcode = 0, \
6404 .SubOpcode = 0, \
6405 .DwordLength = 7
6406
6407 struct GEN8_MEDIA_VFE_STATE {
6408 uint32_t CommandType;
6409 uint32_t Pipeline;
6410 uint32_t MediaCommandOpcode;
6411 uint32_t SubOpcode;
6412 uint32_t DwordLength;
6413 uint32_t ScratchSpaceBasePointer;
6414 uint32_t StackSize;
6415 uint32_t PerThreadScratchSpace;
6416 uint32_t ScratchSpaceBasePointerHigh;
6417 uint32_t MaximumNumberofThreads;
6418 uint32_t NumberofURBEntries;
6419 #define Maintainingtheexistingtimestampstate 0
6420 #define Resettingrelativetimerandlatchingtheglobaltimestamp 1
6421 uint32_t ResetGatewayTimer;
6422 #define MaintainingOpenGatewayForwardMsgCloseGatewayprotocollegacymode 0
6423 #define BypassingOpenGatewayCloseGatewayprotocol 1
6424 uint32_t BypassGatewayControl;
6425 uint32_t SliceDisable;
6426 uint32_t URBEntryAllocationSize;
6427 uint32_t CURBEAllocationSize;
6428 #define Scoreboarddisabled 0
6429 #define Scoreboardenabled 1
6430 uint32_t ScoreboardEnable;
6431 #define StallingScoreboard 0
6432 #define NonStallingScoreboard 1
6433 uint32_t ScoreboardType;
6434 uint32_t ScoreboardMask;
6435 uint32_t Scoreboard3DeltaY;
6436 uint32_t Scoreboard3DeltaX;
6437 uint32_t Scoreboard2DeltaY;
6438 uint32_t Scoreboard2DeltaX;
6439 uint32_t Scoreboard1DeltaY;
6440 uint32_t Scoreboard1DeltaX;
6441 uint32_t Scoreboard0DeltaY;
6442 uint32_t Scoreboard0DeltaX;
6443 uint32_t Scoreboard7DeltaY;
6444 uint32_t Scoreboard7DeltaX;
6445 uint32_t Scoreboard6DeltaY;
6446 uint32_t Scoreboard6DeltaX;
6447 uint32_t Scoreboard5DeltaY;
6448 uint32_t Scoreboard5DeltaX;
6449 uint32_t Scoreboard4DeltaY;
6450 uint32_t Scoreboard4DeltaX;
6451 };
6452
6453 static inline void
6454 GEN8_MEDIA_VFE_STATE_pack(__gen_user_data *data, void * restrict dst,
6455 const struct GEN8_MEDIA_VFE_STATE * restrict values)
6456 {
6457 uint32_t *dw = (uint32_t * restrict) dst;
6458
6459 dw[0] =
6460 __gen_field(values->CommandType, 29, 31) |
6461 __gen_field(values->Pipeline, 27, 28) |
6462 __gen_field(values->MediaCommandOpcode, 24, 26) |
6463 __gen_field(values->SubOpcode, 16, 23) |
6464 __gen_field(values->DwordLength, 0, 15) |
6465 0;
6466
6467 dw[1] =
6468 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
6469 __gen_field(values->StackSize, 4, 7) |
6470 __gen_field(values->PerThreadScratchSpace, 0, 3) |
6471 0;
6472
6473 dw[2] =
6474 __gen_offset(values->ScratchSpaceBasePointerHigh, 0, 15) |
6475 0;
6476
6477 dw[3] =
6478 __gen_field(values->MaximumNumberofThreads, 16, 31) |
6479 __gen_field(values->NumberofURBEntries, 8, 15) |
6480 __gen_field(values->ResetGatewayTimer, 7, 7) |
6481 __gen_field(values->BypassGatewayControl, 6, 6) |
6482 0;
6483
6484 dw[4] =
6485 __gen_field(values->SliceDisable, 0, 1) |
6486 0;
6487
6488 dw[5] =
6489 __gen_field(values->URBEntryAllocationSize, 16, 31) |
6490 __gen_field(values->CURBEAllocationSize, 0, 15) |
6491 0;
6492
6493 dw[6] =
6494 __gen_field(values->ScoreboardEnable, 31, 31) |
6495 __gen_field(values->ScoreboardType, 30, 30) |
6496 __gen_field(values->ScoreboardMask, 0, 7) |
6497 0;
6498
6499 dw[7] =
6500 __gen_field(values->Scoreboard3DeltaY, 28, 31) |
6501 __gen_field(values->Scoreboard3DeltaX, 24, 27) |
6502 __gen_field(values->Scoreboard2DeltaY, 20, 23) |
6503 __gen_field(values->Scoreboard2DeltaX, 16, 19) |
6504 __gen_field(values->Scoreboard1DeltaY, 12, 15) |
6505 __gen_field(values->Scoreboard1DeltaX, 8, 11) |
6506 __gen_field(values->Scoreboard0DeltaY, 4, 7) |
6507 __gen_field(values->Scoreboard0DeltaX, 0, 3) |
6508 0;
6509
6510 dw[8] =
6511 __gen_field(values->Scoreboard7DeltaY, 28, 31) |
6512 __gen_field(values->Scoreboard7DeltaX, 24, 27) |
6513 __gen_field(values->Scoreboard6DeltaY, 20, 23) |
6514 __gen_field(values->Scoreboard6DeltaX, 16, 19) |
6515 __gen_field(values->Scoreboard5DeltaY, 12, 15) |
6516 __gen_field(values->Scoreboard5DeltaX, 8, 11) |
6517 __gen_field(values->Scoreboard4DeltaY, 4, 7) |
6518 __gen_field(values->Scoreboard4DeltaX, 0, 3) |
6519 0;
6520
6521 }
6522
6523 #define GEN8_MI_ARB_CHECK_length 0x00000001
6524 #define GEN8_MI_ARB_CHECK_length_bias 0x00000001
6525 #define GEN8_MI_ARB_CHECK_header \
6526 .CommandType = 0, \
6527 .MICommandOpcode = 5
6528
6529 struct GEN8_MI_ARB_CHECK {
6530 uint32_t CommandType;
6531 uint32_t MICommandOpcode;
6532 };
6533
6534 static inline void
6535 GEN8_MI_ARB_CHECK_pack(__gen_user_data *data, void * restrict dst,
6536 const struct GEN8_MI_ARB_CHECK * restrict values)
6537 {
6538 uint32_t *dw = (uint32_t * restrict) dst;
6539
6540 dw[0] =
6541 __gen_field(values->CommandType, 29, 31) |
6542 __gen_field(values->MICommandOpcode, 23, 28) |
6543 0;
6544
6545 }
6546
6547 #define GEN8_MI_BATCH_BUFFER_END_length 0x00000001
6548 #define GEN8_MI_BATCH_BUFFER_END_length_bias 0x00000001
6549 #define GEN8_MI_BATCH_BUFFER_END_header \
6550 .CommandType = 0, \
6551 .MICommandOpcode = 10
6552
6553 struct GEN8_MI_BATCH_BUFFER_END {
6554 uint32_t CommandType;
6555 uint32_t MICommandOpcode;
6556 };
6557
6558 static inline void
6559 GEN8_MI_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
6560 const struct GEN8_MI_BATCH_BUFFER_END * restrict values)
6561 {
6562 uint32_t *dw = (uint32_t * restrict) dst;
6563
6564 dw[0] =
6565 __gen_field(values->CommandType, 29, 31) |
6566 __gen_field(values->MICommandOpcode, 23, 28) |
6567 0;
6568
6569 }
6570
6571 #define GEN8_MI_BATCH_BUFFER_START_length 0x00000003
6572 #define GEN8_MI_BATCH_BUFFER_START_length_bias 0x00000002
6573 #define GEN8_MI_BATCH_BUFFER_START_header \
6574 .CommandType = 0, \
6575 .MICommandOpcode = 49, \
6576 .DwordLength = 1
6577
6578 struct GEN8_MI_BATCH_BUFFER_START {
6579 uint32_t CommandType;
6580 uint32_t MICommandOpcode;
6581 #define _1stlevelbatch 0
6582 #define _2ndlevelbatch 1
6583 uint32_t _2ndLevelBatchBuffer;
6584 uint32_t AddOffsetEnable;
6585 uint32_t PredicationEnable;
6586 uint32_t ResourceStreamerEnable;
6587 #define ASI_GGTT 0
6588 #define ASI_PPGTT 1
6589 uint32_t AddressSpaceIndicator;
6590 uint32_t DwordLength;
6591 __gen_address_type BatchBufferStartAddress;
6592 __gen_address_type BatchBufferStartAddressHigh;
6593 };
6594
6595 static inline void
6596 GEN8_MI_BATCH_BUFFER_START_pack(__gen_user_data *data, void * restrict dst,
6597 const struct GEN8_MI_BATCH_BUFFER_START * restrict values)
6598 {
6599 uint32_t *dw = (uint32_t * restrict) dst;
6600
6601 dw[0] =
6602 __gen_field(values->CommandType, 29, 31) |
6603 __gen_field(values->MICommandOpcode, 23, 28) |
6604 __gen_field(values->_2ndLevelBatchBuffer, 22, 22) |
6605 __gen_field(values->AddOffsetEnable, 16, 16) |
6606 __gen_field(values->PredicationEnable, 15, 15) |
6607 __gen_field(values->ResourceStreamerEnable, 10, 10) |
6608 __gen_field(values->AddressSpaceIndicator, 8, 8) |
6609 __gen_field(values->DwordLength, 0, 7) |
6610 0;
6611
6612 uint32_t dw1 =
6613 0;
6614
6615 dw[1] =
6616 __gen_combine_address(data, &dw[1], values->BatchBufferStartAddress, dw1);
6617
6618 uint32_t dw2 =
6619 0;
6620
6621 dw[2] =
6622 __gen_combine_address(data, &dw[2], values->BatchBufferStartAddressHigh, dw2);
6623
6624 }
6625
6626 #define GEN8_MI_CLFLUSH_length_bias 0x00000002
6627 #define GEN8_MI_CLFLUSH_header \
6628 .CommandType = 0, \
6629 .MICommandOpcode = 39
6630
6631 struct GEN8_MI_CLFLUSH {
6632 uint32_t CommandType;
6633 uint32_t MICommandOpcode;
6634 #define PerProcessGraphicsAddress 0
6635 #define GlobalGraphicsAddress 1
6636 uint32_t UseGlobalGTT;
6637 uint32_t DwordLength;
6638 __gen_address_type PageBaseAddress;
6639 uint32_t StartingCachelineOffset;
6640 __gen_address_type PageBaseAddressHigh;
6641 /* variable length fields follow */
6642 };
6643
6644 static inline void
6645 GEN8_MI_CLFLUSH_pack(__gen_user_data *data, void * restrict dst,
6646 const struct GEN8_MI_CLFLUSH * restrict values)
6647 {
6648 uint32_t *dw = (uint32_t * restrict) dst;
6649
6650 dw[0] =
6651 __gen_field(values->CommandType, 29, 31) |
6652 __gen_field(values->MICommandOpcode, 23, 28) |
6653 __gen_field(values->UseGlobalGTT, 22, 22) |
6654 __gen_field(values->DwordLength, 0, 9) |
6655 0;
6656
6657 uint32_t dw1 =
6658 __gen_field(values->StartingCachelineOffset, 6, 11) |
6659 0;
6660
6661 dw[1] =
6662 __gen_combine_address(data, &dw[1], values->PageBaseAddress, dw1);
6663
6664 uint32_t dw2 =
6665 0;
6666
6667 dw[2] =
6668 __gen_combine_address(data, &dw[2], values->PageBaseAddressHigh, dw2);
6669
6670 /* variable length fields follow */
6671 }
6672
6673 #define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_length 0x00000003
6674 #define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_length_bias 0x00000002
6675 #define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_header\
6676 .CommandType = 0, \
6677 .MICommandOpcode = 54, \
6678 .UseGlobalGTT = 0, \
6679 .CompareSemaphore = 0, \
6680 .DwordLength = 1
6681
6682 struct GEN8_MI_CONDITIONAL_BATCH_BUFFER_END {
6683 uint32_t CommandType;
6684 uint32_t MICommandOpcode;
6685 uint32_t UseGlobalGTT;
6686 uint32_t CompareSemaphore;
6687 uint32_t DwordLength;
6688 uint32_t CompareDataDword;
6689 __gen_address_type CompareAddress;
6690 __gen_address_type CompareAddressHigh;
6691 };
6692
6693 static inline void
6694 GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
6695 const struct GEN8_MI_CONDITIONAL_BATCH_BUFFER_END * restrict values)
6696 {
6697 uint32_t *dw = (uint32_t * restrict) dst;
6698
6699 dw[0] =
6700 __gen_field(values->CommandType, 29, 31) |
6701 __gen_field(values->MICommandOpcode, 23, 28) |
6702 __gen_field(values->UseGlobalGTT, 22, 22) |
6703 __gen_field(values->CompareSemaphore, 21, 21) |
6704 __gen_field(values->DwordLength, 0, 7) |
6705 0;
6706
6707 dw[1] =
6708 __gen_field(values->CompareDataDword, 0, 31) |
6709 0;
6710
6711 uint32_t dw2 =
6712 0;
6713
6714 dw[2] =
6715 __gen_combine_address(data, &dw[2], values->CompareAddress, dw2);
6716
6717 uint32_t dw3 =
6718 0;
6719
6720 dw[3] =
6721 __gen_combine_address(data, &dw[3], values->CompareAddressHigh, dw3);
6722
6723 }
6724
6725 #define GEN8_MI_COPY_MEM_MEM_length 0x00000005
6726 #define GEN8_MI_COPY_MEM_MEM_length_bias 0x00000002
6727 #define GEN8_MI_COPY_MEM_MEM_header \
6728 .CommandType = 0, \
6729 .MICommandOpcode = 46, \
6730 .DwordLength = 3
6731
6732 struct GEN8_MI_COPY_MEM_MEM {
6733 uint32_t CommandType;
6734 uint32_t MICommandOpcode;
6735 #define PerProcessGraphicsAddress 0
6736 #define GlobalGraphicsAddress 1
6737 uint32_t UseGlobalGTTSource;
6738 #define PerProcessGraphicsAddress 0
6739 #define GlobalGraphicsAddress 1
6740 uint32_t UseGlobalGTTDestination;
6741 uint32_t DwordLength;
6742 __gen_address_type DestinationMemoryAddress;
6743 __gen_address_type SourceMemoryAddress;
6744 };
6745
6746 static inline void
6747 GEN8_MI_COPY_MEM_MEM_pack(__gen_user_data *data, void * restrict dst,
6748 const struct GEN8_MI_COPY_MEM_MEM * restrict values)
6749 {
6750 uint32_t *dw = (uint32_t * restrict) dst;
6751
6752 dw[0] =
6753 __gen_field(values->CommandType, 29, 31) |
6754 __gen_field(values->MICommandOpcode, 23, 28) |
6755 __gen_field(values->UseGlobalGTTSource, 22, 22) |
6756 __gen_field(values->UseGlobalGTTDestination, 21, 21) |
6757 __gen_field(values->DwordLength, 0, 7) |
6758 0;
6759
6760 uint32_t dw1 =
6761 0;
6762
6763 uint64_t qw1 =
6764 __gen_combine_address(data, &dw[1], values->DestinationMemoryAddress, dw1);
6765
6766 dw[1] = qw1;
6767 dw[2] = qw1 >> 32;
6768
6769 uint32_t dw3 =
6770 0;
6771
6772 uint64_t qw3 =
6773 __gen_combine_address(data, &dw[3], values->SourceMemoryAddress, dw3);
6774
6775 dw[3] = qw3;
6776 dw[4] = qw3 >> 32;
6777
6778 }
6779
6780 #define GEN8_MI_LOAD_REGISTER_IMM_length 0x00000003
6781 #define GEN8_MI_LOAD_REGISTER_IMM_length_bias 0x00000002
6782 #define GEN8_MI_LOAD_REGISTER_IMM_header \
6783 .CommandType = 0, \
6784 .MICommandOpcode = 34, \
6785 .DwordLength = 1
6786
6787 struct GEN8_MI_LOAD_REGISTER_IMM {
6788 uint32_t CommandType;
6789 uint32_t MICommandOpcode;
6790 uint32_t ByteWriteDisables;
6791 uint32_t DwordLength;
6792 uint32_t RegisterOffset;
6793 uint32_t DataDWord;
6794 };
6795
6796 static inline void
6797 GEN8_MI_LOAD_REGISTER_IMM_pack(__gen_user_data *data, void * restrict dst,
6798 const struct GEN8_MI_LOAD_REGISTER_IMM * restrict values)
6799 {
6800 uint32_t *dw = (uint32_t * restrict) dst;
6801
6802 dw[0] =
6803 __gen_field(values->CommandType, 29, 31) |
6804 __gen_field(values->MICommandOpcode, 23, 28) |
6805 __gen_field(values->ByteWriteDisables, 8, 11) |
6806 __gen_field(values->DwordLength, 0, 7) |
6807 0;
6808
6809 dw[1] =
6810 __gen_offset(values->RegisterOffset, 2, 22) |
6811 0;
6812
6813 dw[2] =
6814 __gen_field(values->DataDWord, 0, 31) |
6815 0;
6816
6817 }
6818
6819 #define GEN8_MI_LOAD_REGISTER_MEM_length 0x00000004
6820 #define GEN8_MI_LOAD_REGISTER_MEM_length_bias 0x00000002
6821 #define GEN8_MI_LOAD_REGISTER_MEM_header \
6822 .CommandType = 0, \
6823 .MICommandOpcode = 41, \
6824 .DwordLength = 2
6825
6826 struct GEN8_MI_LOAD_REGISTER_MEM {
6827 uint32_t CommandType;
6828 uint32_t MICommandOpcode;
6829 uint32_t UseGlobalGTT;
6830 uint32_t AsyncModeEnable;
6831 uint32_t DwordLength;
6832 uint32_t RegisterAddress;
6833 __gen_address_type MemoryAddress;
6834 };
6835
6836 static inline void
6837 GEN8_MI_LOAD_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
6838 const struct GEN8_MI_LOAD_REGISTER_MEM * restrict values)
6839 {
6840 uint32_t *dw = (uint32_t * restrict) dst;
6841
6842 dw[0] =
6843 __gen_field(values->CommandType, 29, 31) |
6844 __gen_field(values->MICommandOpcode, 23, 28) |
6845 __gen_field(values->UseGlobalGTT, 22, 22) |
6846 __gen_field(values->AsyncModeEnable, 21, 21) |
6847 __gen_field(values->DwordLength, 0, 7) |
6848 0;
6849
6850 dw[1] =
6851 __gen_offset(values->RegisterAddress, 2, 22) |
6852 0;
6853
6854 uint32_t dw2 =
6855 0;
6856
6857 uint64_t qw2 =
6858 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
6859
6860 dw[2] = qw2;
6861 dw[3] = qw2 >> 32;
6862
6863 }
6864
6865 #define GEN8_MI_LOAD_SCAN_LINES_EXCL_length 0x00000002
6866 #define GEN8_MI_LOAD_SCAN_LINES_EXCL_length_bias 0x00000002
6867 #define GEN8_MI_LOAD_SCAN_LINES_EXCL_header \
6868 .CommandType = 0, \
6869 .MICommandOpcode = 19, \
6870 .DwordLength = 0
6871
6872 struct GEN8_MI_LOAD_SCAN_LINES_EXCL {
6873 uint32_t CommandType;
6874 uint32_t MICommandOpcode;
6875 #define DisplayPlaneA 0
6876 #define DisplayPlaneB 1
6877 #define DisplayPlaneC 4
6878 uint32_t DisplayPlaneSelect;
6879 uint32_t DwordLength;
6880 uint32_t StartScanLineNumber;
6881 uint32_t EndScanLineNumber;
6882 };
6883
6884 static inline void
6885 GEN8_MI_LOAD_SCAN_LINES_EXCL_pack(__gen_user_data *data, void * restrict dst,
6886 const struct GEN8_MI_LOAD_SCAN_LINES_EXCL * restrict values)
6887 {
6888 uint32_t *dw = (uint32_t * restrict) dst;
6889
6890 dw[0] =
6891 __gen_field(values->CommandType, 29, 31) |
6892 __gen_field(values->MICommandOpcode, 23, 28) |
6893 __gen_field(values->DisplayPlaneSelect, 19, 21) |
6894 __gen_field(values->DwordLength, 0, 5) |
6895 0;
6896
6897 dw[1] =
6898 __gen_field(values->StartScanLineNumber, 16, 28) |
6899 __gen_field(values->EndScanLineNumber, 0, 12) |
6900 0;
6901
6902 }
6903
6904 #define GEN8_MI_LOAD_SCAN_LINES_INCL_length 0x00000002
6905 #define GEN8_MI_LOAD_SCAN_LINES_INCL_length_bias 0x00000002
6906 #define GEN8_MI_LOAD_SCAN_LINES_INCL_header \
6907 .CommandType = 0, \
6908 .MICommandOpcode = 18, \
6909 .DwordLength = 0
6910
6911 struct GEN8_MI_LOAD_SCAN_LINES_INCL {
6912 uint32_t CommandType;
6913 uint32_t MICommandOpcode;
6914 #define DisplayPlaneA 0
6915 #define DisplayPlaneB 1
6916 #define DisplayPlaneC 4
6917 uint32_t DisplayPlaneSelect;
6918 #define NeverForward 0
6919 #define AlwaysForward 1
6920 #define ConditionallyForward 2
6921 uint32_t ScanLineEventDoneForward;
6922 uint32_t DwordLength;
6923 uint32_t StartScanLineNumber;
6924 uint32_t EndScanLineNumber;
6925 };
6926
6927 static inline void
6928 GEN8_MI_LOAD_SCAN_LINES_INCL_pack(__gen_user_data *data, void * restrict dst,
6929 const struct GEN8_MI_LOAD_SCAN_LINES_INCL * restrict values)
6930 {
6931 uint32_t *dw = (uint32_t * restrict) dst;
6932
6933 dw[0] =
6934 __gen_field(values->CommandType, 29, 31) |
6935 __gen_field(values->MICommandOpcode, 23, 28) |
6936 __gen_field(values->DisplayPlaneSelect, 19, 21) |
6937 __gen_field(values->ScanLineEventDoneForward, 17, 18) |
6938 __gen_field(values->DwordLength, 0, 5) |
6939 0;
6940
6941 dw[1] =
6942 __gen_field(values->StartScanLineNumber, 16, 28) |
6943 __gen_field(values->EndScanLineNumber, 0, 12) |
6944 0;
6945
6946 }
6947
6948 #define GEN8_MI_LOAD_URB_MEM_length 0x00000004
6949 #define GEN8_MI_LOAD_URB_MEM_length_bias 0x00000002
6950 #define GEN8_MI_LOAD_URB_MEM_header \
6951 .CommandType = 0, \
6952 .MICommandOpcode = 44, \
6953 .DwordLength = 2
6954
6955 struct GEN8_MI_LOAD_URB_MEM {
6956 uint32_t CommandType;
6957 uint32_t MICommandOpcode;
6958 uint32_t DwordLength;
6959 uint32_t URBAddress;
6960 __gen_address_type MemoryAddress;
6961 };
6962
6963 static inline void
6964 GEN8_MI_LOAD_URB_MEM_pack(__gen_user_data *data, void * restrict dst,
6965 const struct GEN8_MI_LOAD_URB_MEM * restrict values)
6966 {
6967 uint32_t *dw = (uint32_t * restrict) dst;
6968
6969 dw[0] =
6970 __gen_field(values->CommandType, 29, 31) |
6971 __gen_field(values->MICommandOpcode, 23, 28) |
6972 __gen_field(values->DwordLength, 0, 7) |
6973 0;
6974
6975 dw[1] =
6976 __gen_field(values->URBAddress, 2, 14) |
6977 0;
6978
6979 uint32_t dw2 =
6980 0;
6981
6982 uint64_t qw2 =
6983 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
6984
6985 dw[2] = qw2;
6986 dw[3] = qw2 >> 32;
6987
6988 }
6989
6990 #define GEN8_MI_MATH_length_bias 0x00000002
6991 #define GEN8_MI_MATH_header \
6992 .CommandType = 0, \
6993 .MICommandOpcode = 26
6994
6995 struct GEN8_MI_MATH {
6996 uint32_t CommandType;
6997 uint32_t MICommandOpcode;
6998 uint32_t DwordLength;
6999 uint32_t ALUINSTRUCTION1;
7000 uint32_t ALUINSTRUCTION2;
7001 /* variable length fields follow */
7002 };
7003
7004 static inline void
7005 GEN8_MI_MATH_pack(__gen_user_data *data, void * restrict dst,
7006 const struct GEN8_MI_MATH * restrict values)
7007 {
7008 uint32_t *dw = (uint32_t * restrict) dst;
7009
7010 dw[0] =
7011 __gen_field(values->CommandType, 29, 31) |
7012 __gen_field(values->MICommandOpcode, 23, 28) |
7013 __gen_field(values->DwordLength, 0, 5) |
7014 0;
7015
7016 dw[1] =
7017 __gen_field(values->ALUINSTRUCTION1, 0, 31) |
7018 0;
7019
7020 dw[2] =
7021 __gen_field(values->ALUINSTRUCTION2, 0, 31) |
7022 0;
7023
7024 /* variable length fields follow */
7025 }
7026
7027 #define GEN8_MI_NOOP_length 0x00000001
7028 #define GEN8_MI_NOOP_length_bias 0x00000001
7029 #define GEN8_MI_NOOP_header \
7030 .CommandType = 0, \
7031 .MICommandOpcode = 0
7032
7033 struct GEN8_MI_NOOP {
7034 uint32_t CommandType;
7035 uint32_t MICommandOpcode;
7036 uint32_t IdentificationNumberRegisterWriteEnable;
7037 uint32_t IdentificationNumber;
7038 };
7039
7040 static inline void
7041 GEN8_MI_NOOP_pack(__gen_user_data *data, void * restrict dst,
7042 const struct GEN8_MI_NOOP * restrict values)
7043 {
7044 uint32_t *dw = (uint32_t * restrict) dst;
7045
7046 dw[0] =
7047 __gen_field(values->CommandType, 29, 31) |
7048 __gen_field(values->MICommandOpcode, 23, 28) |
7049 __gen_field(values->IdentificationNumberRegisterWriteEnable, 22, 22) |
7050 __gen_field(values->IdentificationNumber, 0, 21) |
7051 0;
7052
7053 }
7054
7055 #define GEN8_MI_PREDICATE_length 0x00000001
7056 #define GEN8_MI_PREDICATE_length_bias 0x00000001
7057 #define GEN8_MI_PREDICATE_header \
7058 .CommandType = 0, \
7059 .MICommandOpcode = 12
7060
7061 struct GEN8_MI_PREDICATE {
7062 uint32_t CommandType;
7063 uint32_t MICommandOpcode;
7064 #define KEEP 0
7065 #define LOAD 2
7066 #define LOADINV 3
7067 uint32_t LoadOperation;
7068 #define COMBINE_SET 0
7069 #define COMBINE_AND 1
7070 #define COMBINE_OR 2
7071 #define COMBINE_XOR 3
7072 uint32_t CombineOperation;
7073 #define COMPARE_SRCS_EQUAL 2
7074 #define COMPARE_DELTAS_EQUAL 3
7075 uint32_t CompareOperation;
7076 };
7077
7078 static inline void
7079 GEN8_MI_PREDICATE_pack(__gen_user_data *data, void * restrict dst,
7080 const struct GEN8_MI_PREDICATE * restrict values)
7081 {
7082 uint32_t *dw = (uint32_t * restrict) dst;
7083
7084 dw[0] =
7085 __gen_field(values->CommandType, 29, 31) |
7086 __gen_field(values->MICommandOpcode, 23, 28) |
7087 __gen_field(values->LoadOperation, 6, 7) |
7088 __gen_field(values->CombineOperation, 3, 4) |
7089 __gen_field(values->CompareOperation, 0, 1) |
7090 0;
7091
7092 }
7093
7094 #define GEN8_MI_REPORT_HEAD_length 0x00000001
7095 #define GEN8_MI_REPORT_HEAD_length_bias 0x00000001
7096 #define GEN8_MI_REPORT_HEAD_header \
7097 .CommandType = 0, \
7098 .MICommandOpcode = 7
7099
7100 struct GEN8_MI_REPORT_HEAD {
7101 uint32_t CommandType;
7102 uint32_t MICommandOpcode;
7103 };
7104
7105 static inline void
7106 GEN8_MI_REPORT_HEAD_pack(__gen_user_data *data, void * restrict dst,
7107 const struct GEN8_MI_REPORT_HEAD * restrict values)
7108 {
7109 uint32_t *dw = (uint32_t * restrict) dst;
7110
7111 dw[0] =
7112 __gen_field(values->CommandType, 29, 31) |
7113 __gen_field(values->MICommandOpcode, 23, 28) |
7114 0;
7115
7116 }
7117
7118 #define GEN8_MI_RS_CONTEXT_length 0x00000001
7119 #define GEN8_MI_RS_CONTEXT_length_bias 0x00000001
7120 #define GEN8_MI_RS_CONTEXT_header \
7121 .CommandType = 0, \
7122 .MICommandOpcode = 15
7123
7124 struct GEN8_MI_RS_CONTEXT {
7125 uint32_t CommandType;
7126 uint32_t MICommandOpcode;
7127 #define Restore 0
7128 #define Save 1
7129 uint32_t ResourceStreamerSave;
7130 };
7131
7132 static inline void
7133 GEN8_MI_RS_CONTEXT_pack(__gen_user_data *data, void * restrict dst,
7134 const struct GEN8_MI_RS_CONTEXT * restrict values)
7135 {
7136 uint32_t *dw = (uint32_t * restrict) dst;
7137
7138 dw[0] =
7139 __gen_field(values->CommandType, 29, 31) |
7140 __gen_field(values->MICommandOpcode, 23, 28) |
7141 __gen_field(values->ResourceStreamerSave, 0, 0) |
7142 0;
7143
7144 }
7145
7146 #define GEN8_MI_RS_CONTROL_length 0x00000001
7147 #define GEN8_MI_RS_CONTROL_length_bias 0x00000001
7148 #define GEN8_MI_RS_CONTROL_header \
7149 .CommandType = 0, \
7150 .MICommandOpcode = 6
7151
7152 struct GEN8_MI_RS_CONTROL {
7153 uint32_t CommandType;
7154 uint32_t MICommandOpcode;
7155 #define Stop 0
7156 #define Start 1
7157 uint32_t ResourceStreamerControl;
7158 };
7159
7160 static inline void
7161 GEN8_MI_RS_CONTROL_pack(__gen_user_data *data, void * restrict dst,
7162 const struct GEN8_MI_RS_CONTROL * restrict values)
7163 {
7164 uint32_t *dw = (uint32_t * restrict) dst;
7165
7166 dw[0] =
7167 __gen_field(values->CommandType, 29, 31) |
7168 __gen_field(values->MICommandOpcode, 23, 28) |
7169 __gen_field(values->ResourceStreamerControl, 0, 0) |
7170 0;
7171
7172 }
7173
7174 #define GEN8_MI_RS_STORE_DATA_IMM_length 0x00000004
7175 #define GEN8_MI_RS_STORE_DATA_IMM_length_bias 0x00000002
7176 #define GEN8_MI_RS_STORE_DATA_IMM_header \
7177 .CommandType = 0, \
7178 .MICommandOpcode = 43, \
7179 .DwordLength = 2
7180
7181 struct GEN8_MI_RS_STORE_DATA_IMM {
7182 uint32_t CommandType;
7183 uint32_t MICommandOpcode;
7184 uint32_t DwordLength;
7185 __gen_address_type DestinationAddress;
7186 uint32_t CoreModeEnable;
7187 uint32_t DataDWord0;
7188 };
7189
7190 static inline void
7191 GEN8_MI_RS_STORE_DATA_IMM_pack(__gen_user_data *data, void * restrict dst,
7192 const struct GEN8_MI_RS_STORE_DATA_IMM * restrict values)
7193 {
7194 uint32_t *dw = (uint32_t * restrict) dst;
7195
7196 dw[0] =
7197 __gen_field(values->CommandType, 29, 31) |
7198 __gen_field(values->MICommandOpcode, 23, 28) |
7199 __gen_field(values->DwordLength, 0, 7) |
7200 0;
7201
7202 uint32_t dw1 =
7203 __gen_field(values->CoreModeEnable, 0, 0) |
7204 0;
7205
7206 uint64_t qw1 =
7207 __gen_combine_address(data, &dw[1], values->DestinationAddress, dw1);
7208
7209 dw[1] = qw1;
7210 dw[2] = qw1 >> 32;
7211
7212 dw[3] =
7213 __gen_field(values->DataDWord0, 0, 31) |
7214 0;
7215
7216 }
7217
7218 #define GEN8_MI_SET_CONTEXT_length 0x00000002
7219 #define GEN8_MI_SET_CONTEXT_length_bias 0x00000002
7220 #define GEN8_MI_SET_CONTEXT_header \
7221 .CommandType = 0, \
7222 .MICommandOpcode = 24, \
7223 .DwordLength = 0
7224
7225 struct GEN8_MI_SET_CONTEXT {
7226 uint32_t CommandType;
7227 uint32_t MICommandOpcode;
7228 uint32_t DwordLength;
7229 __gen_address_type LogicalContextAddress;
7230 uint32_t ReservedMustbe1;
7231 uint32_t CoreModeEnable;
7232 uint32_t ResourceStreamerStateSaveEnable;
7233 uint32_t ResourceStreamerStateRestoreEnable;
7234 uint32_t ForceRestore;
7235 uint32_t RestoreInhibit;
7236 };
7237
7238 static inline void
7239 GEN8_MI_SET_CONTEXT_pack(__gen_user_data *data, void * restrict dst,
7240 const struct GEN8_MI_SET_CONTEXT * restrict values)
7241 {
7242 uint32_t *dw = (uint32_t * restrict) dst;
7243
7244 dw[0] =
7245 __gen_field(values->CommandType, 29, 31) |
7246 __gen_field(values->MICommandOpcode, 23, 28) |
7247 __gen_field(values->DwordLength, 0, 7) |
7248 0;
7249
7250 uint32_t dw1 =
7251 __gen_field(values->ReservedMustbe1, 8, 8) |
7252 __gen_field(values->CoreModeEnable, 4, 4) |
7253 __gen_field(values->ResourceStreamerStateSaveEnable, 3, 3) |
7254 __gen_field(values->ResourceStreamerStateRestoreEnable, 2, 2) |
7255 __gen_field(values->ForceRestore, 1, 1) |
7256 __gen_field(values->RestoreInhibit, 0, 0) |
7257 0;
7258
7259 dw[1] =
7260 __gen_combine_address(data, &dw[1], values->LogicalContextAddress, dw1);
7261
7262 }
7263
7264 #define GEN8_MI_SET_PREDICATE_length 0x00000001
7265 #define GEN8_MI_SET_PREDICATE_length_bias 0x00000001
7266 #define GEN8_MI_SET_PREDICATE_header \
7267 .CommandType = 0, \
7268 .MICommandOpcode = 1
7269
7270 struct GEN8_MI_SET_PREDICATE {
7271 uint32_t CommandType;
7272 uint32_t MICommandOpcode;
7273 #define NOOPNever 0
7274 #define NOOPonResult2clear 1
7275 #define NOOPonResult2set 2
7276 #define NOOPonResultclear 3
7277 #define NOOPonResultset 4
7278 #define Executewhenonesliceenabled 5
7279 #define Executewhentwoslicesareenabled 6
7280 #define Executewhenthreeslicesareenabled 7
7281 #define NOOPAlways 15
7282 uint32_t PREDICATEENABLE;
7283 };
7284
7285 static inline void
7286 GEN8_MI_SET_PREDICATE_pack(__gen_user_data *data, void * restrict dst,
7287 const struct GEN8_MI_SET_PREDICATE * restrict values)
7288 {
7289 uint32_t *dw = (uint32_t * restrict) dst;
7290
7291 dw[0] =
7292 __gen_field(values->CommandType, 29, 31) |
7293 __gen_field(values->MICommandOpcode, 23, 28) |
7294 __gen_field(values->PREDICATEENABLE, 0, 3) |
7295 0;
7296
7297 }
7298
7299 #define GEN8_MI_STORE_DATA_IMM_length 0x00000004
7300 #define GEN8_MI_STORE_DATA_IMM_length_bias 0x00000002
7301 #define GEN8_MI_STORE_DATA_IMM_header \
7302 .CommandType = 0, \
7303 .MICommandOpcode = 32, \
7304 .DwordLength = 2
7305
7306 struct GEN8_MI_STORE_DATA_IMM {
7307 uint32_t CommandType;
7308 uint32_t MICommandOpcode;
7309 uint32_t UseGlobalGTT;
7310 uint32_t StoreQword;
7311 uint32_t DwordLength;
7312 __gen_address_type Address;
7313 uint32_t CoreModeEnable;
7314 uint32_t DataDWord0;
7315 uint32_t DataDWord1;
7316 };
7317
7318 static inline void
7319 GEN8_MI_STORE_DATA_IMM_pack(__gen_user_data *data, void * restrict dst,
7320 const struct GEN8_MI_STORE_DATA_IMM * restrict values)
7321 {
7322 uint32_t *dw = (uint32_t * restrict) dst;
7323
7324 dw[0] =
7325 __gen_field(values->CommandType, 29, 31) |
7326 __gen_field(values->MICommandOpcode, 23, 28) |
7327 __gen_field(values->UseGlobalGTT, 22, 22) |
7328 __gen_field(values->StoreQword, 21, 21) |
7329 __gen_field(values->DwordLength, 0, 9) |
7330 0;
7331
7332 uint32_t dw1 =
7333 __gen_field(values->CoreModeEnable, 0, 0) |
7334 0;
7335
7336 uint64_t qw1 =
7337 __gen_combine_address(data, &dw[1], values->Address, dw1);
7338
7339 dw[1] = qw1;
7340 dw[2] = qw1 >> 32;
7341
7342 dw[3] =
7343 __gen_field(values->DataDWord0, 0, 31) |
7344 0;
7345
7346 dw[4] =
7347 __gen_field(values->DataDWord1, 0, 31) |
7348 0;
7349
7350 }
7351
7352 #define GEN8_MI_STORE_DATA_INDEX_length 0x00000003
7353 #define GEN8_MI_STORE_DATA_INDEX_length_bias 0x00000002
7354 #define GEN8_MI_STORE_DATA_INDEX_header \
7355 .CommandType = 0, \
7356 .MICommandOpcode = 33, \
7357 .DwordLength = 1
7358
7359 struct GEN8_MI_STORE_DATA_INDEX {
7360 uint32_t CommandType;
7361 uint32_t MICommandOpcode;
7362 uint32_t UsePerProcessHardwareStatusPage;
7363 uint32_t DwordLength;
7364 uint32_t Offset;
7365 uint32_t DataDWord0;
7366 uint32_t DataDWord1;
7367 };
7368
7369 static inline void
7370 GEN8_MI_STORE_DATA_INDEX_pack(__gen_user_data *data, void * restrict dst,
7371 const struct GEN8_MI_STORE_DATA_INDEX * restrict values)
7372 {
7373 uint32_t *dw = (uint32_t * restrict) dst;
7374
7375 dw[0] =
7376 __gen_field(values->CommandType, 29, 31) |
7377 __gen_field(values->MICommandOpcode, 23, 28) |
7378 __gen_field(values->UsePerProcessHardwareStatusPage, 21, 21) |
7379 __gen_field(values->DwordLength, 0, 7) |
7380 0;
7381
7382 dw[1] =
7383 __gen_field(values->Offset, 2, 11) |
7384 0;
7385
7386 dw[2] =
7387 __gen_field(values->DataDWord0, 0, 31) |
7388 0;
7389
7390 dw[3] =
7391 __gen_field(values->DataDWord1, 0, 31) |
7392 0;
7393
7394 }
7395
7396 #define GEN8_MI_STORE_URB_MEM_length 0x00000004
7397 #define GEN8_MI_STORE_URB_MEM_length_bias 0x00000002
7398 #define GEN8_MI_STORE_URB_MEM_header \
7399 .CommandType = 0, \
7400 .MICommandOpcode = 45, \
7401 .DwordLength = 2
7402
7403 struct GEN8_MI_STORE_URB_MEM {
7404 uint32_t CommandType;
7405 uint32_t MICommandOpcode;
7406 uint32_t DwordLength;
7407 uint32_t URBAddress;
7408 __gen_address_type MemoryAddress;
7409 };
7410
7411 static inline void
7412 GEN8_MI_STORE_URB_MEM_pack(__gen_user_data *data, void * restrict dst,
7413 const struct GEN8_MI_STORE_URB_MEM * restrict values)
7414 {
7415 uint32_t *dw = (uint32_t * restrict) dst;
7416
7417 dw[0] =
7418 __gen_field(values->CommandType, 29, 31) |
7419 __gen_field(values->MICommandOpcode, 23, 28) |
7420 __gen_field(values->DwordLength, 0, 7) |
7421 0;
7422
7423 dw[1] =
7424 __gen_field(values->URBAddress, 2, 14) |
7425 0;
7426
7427 uint32_t dw2 =
7428 0;
7429
7430 uint64_t qw2 =
7431 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
7432
7433 dw[2] = qw2;
7434 dw[3] = qw2 >> 32;
7435
7436 }
7437
7438 #define GEN8_MI_SUSPEND_FLUSH_length 0x00000001
7439 #define GEN8_MI_SUSPEND_FLUSH_length_bias 0x00000001
7440 #define GEN8_MI_SUSPEND_FLUSH_header \
7441 .CommandType = 0, \
7442 .MICommandOpcode = 11
7443
7444 struct GEN8_MI_SUSPEND_FLUSH {
7445 uint32_t CommandType;
7446 uint32_t MICommandOpcode;
7447 uint32_t SuspendFlush;
7448 };
7449
7450 static inline void
7451 GEN8_MI_SUSPEND_FLUSH_pack(__gen_user_data *data, void * restrict dst,
7452 const struct GEN8_MI_SUSPEND_FLUSH * restrict values)
7453 {
7454 uint32_t *dw = (uint32_t * restrict) dst;
7455
7456 dw[0] =
7457 __gen_field(values->CommandType, 29, 31) |
7458 __gen_field(values->MICommandOpcode, 23, 28) |
7459 __gen_field(values->SuspendFlush, 0, 0) |
7460 0;
7461
7462 }
7463
7464 #define GEN8_MI_TOPOLOGY_FILTER_length 0x00000001
7465 #define GEN8_MI_TOPOLOGY_FILTER_length_bias 0x00000001
7466 #define GEN8_MI_TOPOLOGY_FILTER_header \
7467 .CommandType = 0, \
7468 .MICommandOpcode = 13
7469
7470 struct GEN8_MI_TOPOLOGY_FILTER {
7471 uint32_t CommandType;
7472 uint32_t MICommandOpcode;
7473 uint32_t TopologyFilterValue;
7474 };
7475
7476 static inline void
7477 GEN8_MI_TOPOLOGY_FILTER_pack(__gen_user_data *data, void * restrict dst,
7478 const struct GEN8_MI_TOPOLOGY_FILTER * restrict values)
7479 {
7480 uint32_t *dw = (uint32_t * restrict) dst;
7481
7482 dw[0] =
7483 __gen_field(values->CommandType, 29, 31) |
7484 __gen_field(values->MICommandOpcode, 23, 28) |
7485 __gen_field(values->TopologyFilterValue, 0, 5) |
7486 0;
7487
7488 }
7489
7490 #define GEN8_MI_UPDATE_GTT_length_bias 0x00000002
7491 #define GEN8_MI_UPDATE_GTT_header \
7492 .CommandType = 0, \
7493 .MICommandOpcode = 35
7494
7495 struct GEN8_MI_UPDATE_GTT {
7496 uint32_t CommandType;
7497 uint32_t MICommandOpcode;
7498 uint32_t DwordLength;
7499 __gen_address_type EntryAddress;
7500 /* variable length fields follow */
7501 };
7502
7503 static inline void
7504 GEN8_MI_UPDATE_GTT_pack(__gen_user_data *data, void * restrict dst,
7505 const struct GEN8_MI_UPDATE_GTT * restrict values)
7506 {
7507 uint32_t *dw = (uint32_t * restrict) dst;
7508
7509 dw[0] =
7510 __gen_field(values->CommandType, 29, 31) |
7511 __gen_field(values->MICommandOpcode, 23, 28) |
7512 __gen_field(values->DwordLength, 0, 9) |
7513 0;
7514
7515 uint32_t dw1 =
7516 0;
7517
7518 dw[1] =
7519 __gen_combine_address(data, &dw[1], values->EntryAddress, dw1);
7520
7521 /* variable length fields follow */
7522 }
7523
7524 #define GEN8_MI_URB_ATOMIC_ALLOC_length 0x00000001
7525 #define GEN8_MI_URB_ATOMIC_ALLOC_length_bias 0x00000001
7526 #define GEN8_MI_URB_ATOMIC_ALLOC_header \
7527 .CommandType = 0, \
7528 .MICommandOpcode = 9
7529
7530 struct GEN8_MI_URB_ATOMIC_ALLOC {
7531 uint32_t CommandType;
7532 uint32_t MICommandOpcode;
7533 uint32_t URBAtomicStorageOffset;
7534 uint32_t URBAtomicStorageSize;
7535 };
7536
7537 static inline void
7538 GEN8_MI_URB_ATOMIC_ALLOC_pack(__gen_user_data *data, void * restrict dst,
7539 const struct GEN8_MI_URB_ATOMIC_ALLOC * restrict values)
7540 {
7541 uint32_t *dw = (uint32_t * restrict) dst;
7542
7543 dw[0] =
7544 __gen_field(values->CommandType, 29, 31) |
7545 __gen_field(values->MICommandOpcode, 23, 28) |
7546 __gen_field(values->URBAtomicStorageOffset, 12, 19) |
7547 __gen_field(values->URBAtomicStorageSize, 0, 8) |
7548 0;
7549
7550 }
7551
7552 #define GEN8_MI_URB_CLEAR_length 0x00000002
7553 #define GEN8_MI_URB_CLEAR_length_bias 0x00000002
7554 #define GEN8_MI_URB_CLEAR_header \
7555 .CommandType = 0, \
7556 .MICommandOpcode = 25, \
7557 .DwordLength = 0
7558
7559 struct GEN8_MI_URB_CLEAR {
7560 uint32_t CommandType;
7561 uint32_t MICommandOpcode;
7562 uint32_t DwordLength;
7563 uint32_t URBClearLength;
7564 uint32_t URBAddress;
7565 };
7566
7567 static inline void
7568 GEN8_MI_URB_CLEAR_pack(__gen_user_data *data, void * restrict dst,
7569 const struct GEN8_MI_URB_CLEAR * restrict values)
7570 {
7571 uint32_t *dw = (uint32_t * restrict) dst;
7572
7573 dw[0] =
7574 __gen_field(values->CommandType, 29, 31) |
7575 __gen_field(values->MICommandOpcode, 23, 28) |
7576 __gen_field(values->DwordLength, 0, 7) |
7577 0;
7578
7579 dw[1] =
7580 __gen_field(values->URBClearLength, 16, 29) |
7581 __gen_offset(values->URBAddress, 0, 14) |
7582 0;
7583
7584 }
7585
7586 #define GEN8_MI_USER_INTERRUPT_length 0x00000001
7587 #define GEN8_MI_USER_INTERRUPT_length_bias 0x00000001
7588 #define GEN8_MI_USER_INTERRUPT_header \
7589 .CommandType = 0, \
7590 .MICommandOpcode = 2
7591
7592 struct GEN8_MI_USER_INTERRUPT {
7593 uint32_t CommandType;
7594 uint32_t MICommandOpcode;
7595 };
7596
7597 static inline void
7598 GEN8_MI_USER_INTERRUPT_pack(__gen_user_data *data, void * restrict dst,
7599 const struct GEN8_MI_USER_INTERRUPT * restrict values)
7600 {
7601 uint32_t *dw = (uint32_t * restrict) dst;
7602
7603 dw[0] =
7604 __gen_field(values->CommandType, 29, 31) |
7605 __gen_field(values->MICommandOpcode, 23, 28) |
7606 0;
7607
7608 }
7609
7610 #define GEN8_MI_WAIT_FOR_EVENT_length 0x00000001
7611 #define GEN8_MI_WAIT_FOR_EVENT_length_bias 0x00000001
7612 #define GEN8_MI_WAIT_FOR_EVENT_header \
7613 .CommandType = 0, \
7614 .MICommandOpcode = 3
7615
7616 struct GEN8_MI_WAIT_FOR_EVENT {
7617 uint32_t CommandType;
7618 uint32_t MICommandOpcode;
7619 uint32_t DisplayPipeCVerticalBlankWaitEnable;
7620 uint32_t DisplaySpriteCFlipPendingWaitEnable;
7621 uint32_t DisplayPlaneCFlipPendingWaitEnable;
7622 uint32_t DisplayPipeCScanLineWaitEnable;
7623 uint32_t DisplayPipeBVerticalBlankWaitEnable;
7624 uint32_t DisplaySpriteBFlipPendingWaitEnable;
7625 uint32_t DisplayPlaneBFlipPendingWaitEnable;
7626 uint32_t DisplayPipeBScanLineWaitEnable;
7627 uint32_t DisplayPipeAVerticalBlankWaitEnable;
7628 uint32_t DisplaySpriteAFlipPendingWaitEnable;
7629 uint32_t DisplayPlaneAFlipPendingWaitEnable;
7630 uint32_t DisplayPipeAScanLineWaitEnable;
7631 };
7632
7633 static inline void
7634 GEN8_MI_WAIT_FOR_EVENT_pack(__gen_user_data *data, void * restrict dst,
7635 const struct GEN8_MI_WAIT_FOR_EVENT * restrict values)
7636 {
7637 uint32_t *dw = (uint32_t * restrict) dst;
7638
7639 dw[0] =
7640 __gen_field(values->CommandType, 29, 31) |
7641 __gen_field(values->MICommandOpcode, 23, 28) |
7642 __gen_field(values->DisplayPipeCVerticalBlankWaitEnable, 21, 21) |
7643 __gen_field(values->DisplaySpriteCFlipPendingWaitEnable, 20, 20) |
7644 __gen_field(values->DisplayPlaneCFlipPendingWaitEnable, 15, 15) |
7645 __gen_field(values->DisplayPipeCScanLineWaitEnable, 14, 14) |
7646 __gen_field(values->DisplayPipeBVerticalBlankWaitEnable, 11, 11) |
7647 __gen_field(values->DisplaySpriteBFlipPendingWaitEnable, 10, 10) |
7648 __gen_field(values->DisplayPlaneBFlipPendingWaitEnable, 9, 9) |
7649 __gen_field(values->DisplayPipeBScanLineWaitEnable, 8, 8) |
7650 __gen_field(values->DisplayPipeAVerticalBlankWaitEnable, 3, 3) |
7651 __gen_field(values->DisplaySpriteAFlipPendingWaitEnable, 2, 2) |
7652 __gen_field(values->DisplayPlaneAFlipPendingWaitEnable, 1, 1) |
7653 __gen_field(values->DisplayPipeAScanLineWaitEnable, 0, 0) |
7654 0;
7655
7656 }
7657
7658 #define GEN8_PIPE_CONTROL_length 0x00000006
7659 #define GEN8_PIPE_CONTROL_length_bias 0x00000002
7660 #define GEN8_PIPE_CONTROL_header \
7661 .CommandType = 3, \
7662 .CommandSubType = 3, \
7663 ._3DCommandOpcode = 2, \
7664 ._3DCommandSubOpcode = 0, \
7665 .DwordLength = 4
7666
7667 struct GEN8_PIPE_CONTROL {
7668 uint32_t CommandType;
7669 uint32_t CommandSubType;
7670 uint32_t _3DCommandOpcode;
7671 uint32_t _3DCommandSubOpcode;
7672 uint32_t DwordLength;
7673 #define DAT_PPGTT 0
7674 #define DAT_GGTT 1
7675 uint32_t DestinationAddressType;
7676 #define NoLRIOperation 0
7677 #define MMIOWriteImmediateData 1
7678 uint32_t LRIPostSyncOperation;
7679 uint32_t StoreDataIndex;
7680 uint32_t CommandStreamerStallEnable;
7681 #define DontReset 0
7682 #define Reset 1
7683 uint32_t GlobalSnapshotCountReset;
7684 uint32_t TLBInvalidate;
7685 uint32_t GenericMediaStateClear;
7686 #define NoWrite 0
7687 #define WriteImmediateData 1
7688 #define WritePSDepthCount 2
7689 #define WriteTimestamp 3
7690 uint32_t PostSyncOperation;
7691 uint32_t DepthStallEnable;
7692 #define DisableFlush 0
7693 #define EnableFlush 1
7694 uint32_t RenderTargetCacheFlushEnable;
7695 uint32_t InstructionCacheInvalidateEnable;
7696 uint32_t TextureCacheInvalidationEnable;
7697 uint32_t IndirectStatePointersDisable;
7698 uint32_t NotifyEnable;
7699 uint32_t PipeControlFlushEnable;
7700 uint32_t DCFlushEnable;
7701 uint32_t VFCacheInvalidationEnable;
7702 uint32_t ConstantCacheInvalidationEnable;
7703 uint32_t StateCacheInvalidationEnable;
7704 uint32_t StallAtPixelScoreboard;
7705 #define FlushDisabled 0
7706 #define FlushEnabled 1
7707 uint32_t DepthCacheFlushEnable;
7708 __gen_address_type Address;
7709 __gen_address_type AddressHigh;
7710 uint64_t ImmediateData;
7711 };
7712
7713 static inline void
7714 GEN8_PIPE_CONTROL_pack(__gen_user_data *data, void * restrict dst,
7715 const struct GEN8_PIPE_CONTROL * restrict values)
7716 {
7717 uint32_t *dw = (uint32_t * restrict) dst;
7718
7719 dw[0] =
7720 __gen_field(values->CommandType, 29, 31) |
7721 __gen_field(values->CommandSubType, 27, 28) |
7722 __gen_field(values->_3DCommandOpcode, 24, 26) |
7723 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
7724 __gen_field(values->DwordLength, 0, 7) |
7725 0;
7726
7727 dw[1] =
7728 __gen_field(values->DestinationAddressType, 24, 24) |
7729 __gen_field(values->LRIPostSyncOperation, 23, 23) |
7730 __gen_field(values->StoreDataIndex, 21, 21) |
7731 __gen_field(values->CommandStreamerStallEnable, 20, 20) |
7732 __gen_field(values->GlobalSnapshotCountReset, 19, 19) |
7733 __gen_field(values->TLBInvalidate, 18, 18) |
7734 __gen_field(values->GenericMediaStateClear, 16, 16) |
7735 __gen_field(values->PostSyncOperation, 14, 15) |
7736 __gen_field(values->DepthStallEnable, 13, 13) |
7737 __gen_field(values->RenderTargetCacheFlushEnable, 12, 12) |
7738 __gen_field(values->InstructionCacheInvalidateEnable, 11, 11) |
7739 __gen_field(values->TextureCacheInvalidationEnable, 10, 10) |
7740 __gen_field(values->IndirectStatePointersDisable, 9, 9) |
7741 __gen_field(values->NotifyEnable, 8, 8) |
7742 __gen_field(values->PipeControlFlushEnable, 7, 7) |
7743 __gen_field(values->DCFlushEnable, 5, 5) |
7744 __gen_field(values->VFCacheInvalidationEnable, 4, 4) |
7745 __gen_field(values->ConstantCacheInvalidationEnable, 3, 3) |
7746 __gen_field(values->StateCacheInvalidationEnable, 2, 2) |
7747 __gen_field(values->StallAtPixelScoreboard, 1, 1) |
7748 __gen_field(values->DepthCacheFlushEnable, 0, 0) |
7749 0;
7750
7751 uint32_t dw2 =
7752 0;
7753
7754 dw[2] =
7755 __gen_combine_address(data, &dw[2], values->Address, dw2);
7756
7757 uint32_t dw3 =
7758 0;
7759
7760 dw[3] =
7761 __gen_combine_address(data, &dw[3], values->AddressHigh, dw3);
7762
7763 uint64_t qw4 =
7764 __gen_field(values->ImmediateData, 0, 63) |
7765 0;
7766
7767 dw[4] = qw4;
7768 dw[5] = qw4 >> 32;
7769
7770 }
7771
7772 #define GEN8_3DSTATE_CONSTANT_BODY_length 0x0000000a
7773
7774 #define GEN8_BINDING_TABLE_EDIT_ENTRY_length 0x00000001
7775
7776 #define GEN8_GATHER_CONSTANT_ENTRY_length 0x00000001
7777
7778 #define GEN8_VERTEX_BUFFER_STATE_length 0x00000004
7779
7780 #define GEN8_VERTEX_ELEMENT_STATE_length 0x00000002
7781
7782 #define GEN8_SO_DECL_ENTRY_length 0x00000002
7783
7784 #define GEN8_SO_DECL_length 0x00000001
7785
7786 #define GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_length 0x00000001
7787
7788 #define GEN8_SCISSOR_RECT_length 0x00000002
7789
7790 struct GEN8_SCISSOR_RECT {
7791 uint32_t ScissorRectangleYMin;
7792 uint32_t ScissorRectangleXMin;
7793 uint32_t ScissorRectangleYMax;
7794 uint32_t ScissorRectangleXMax;
7795 };
7796
7797 static inline void
7798 GEN8_SCISSOR_RECT_pack(__gen_user_data *data, void * restrict dst,
7799 const struct GEN8_SCISSOR_RECT * restrict values)
7800 {
7801 uint32_t *dw = (uint32_t * restrict) dst;
7802
7803 dw[0] =
7804 __gen_field(values->ScissorRectangleYMin, 16, 31) |
7805 __gen_field(values->ScissorRectangleXMin, 0, 15) |
7806 0;
7807
7808 dw[1] =
7809 __gen_field(values->ScissorRectangleYMax, 16, 31) |
7810 __gen_field(values->ScissorRectangleXMax, 0, 15) |
7811 0;
7812
7813 }
7814
7815 #define GEN8_SF_CLIP_VIEWPORT_length 0x00000010
7816
7817 struct GEN8_SF_CLIP_VIEWPORT {
7818 float ViewportMatrixElementm00;
7819 float ViewportMatrixElementm11;
7820 float ViewportMatrixElementm22;
7821 float ViewportMatrixElementm30;
7822 float ViewportMatrixElementm31;
7823 float ViewportMatrixElementm32;
7824 float XMinClipGuardband;
7825 float XMaxClipGuardband;
7826 float YMinClipGuardband;
7827 float YMaxClipGuardband;
7828 float XMinViewPort;
7829 float XMaxViewPort;
7830 float YMinViewPort;
7831 float YMaxViewPort;
7832 };
7833
7834 static inline void
7835 GEN8_SF_CLIP_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
7836 const struct GEN8_SF_CLIP_VIEWPORT * restrict values)
7837 {
7838 uint32_t *dw = (uint32_t * restrict) dst;
7839
7840 dw[0] =
7841 __gen_float(values->ViewportMatrixElementm00) |
7842 0;
7843
7844 dw[1] =
7845 __gen_float(values->ViewportMatrixElementm11) |
7846 0;
7847
7848 dw[2] =
7849 __gen_float(values->ViewportMatrixElementm22) |
7850 0;
7851
7852 dw[3] =
7853 __gen_float(values->ViewportMatrixElementm30) |
7854 0;
7855
7856 dw[4] =
7857 __gen_float(values->ViewportMatrixElementm31) |
7858 0;
7859
7860 dw[5] =
7861 __gen_float(values->ViewportMatrixElementm32) |
7862 0;
7863
7864 dw[6] =
7865 0;
7866
7867 dw[7] =
7868 0;
7869
7870 dw[8] =
7871 __gen_float(values->XMinClipGuardband) |
7872 0;
7873
7874 dw[9] =
7875 __gen_float(values->XMaxClipGuardband) |
7876 0;
7877
7878 dw[10] =
7879 __gen_float(values->YMinClipGuardband) |
7880 0;
7881
7882 dw[11] =
7883 __gen_float(values->YMaxClipGuardband) |
7884 0;
7885
7886 dw[12] =
7887 __gen_float(values->XMinViewPort) |
7888 0;
7889
7890 dw[13] =
7891 __gen_float(values->XMaxViewPort) |
7892 0;
7893
7894 dw[14] =
7895 __gen_float(values->YMinViewPort) |
7896 0;
7897
7898 dw[15] =
7899 __gen_float(values->YMaxViewPort) |
7900 0;
7901
7902 }
7903
7904 #define GEN8_BLEND_STATE_length 0x00000011
7905
7906 struct GEN8_BLEND_STATE_ENTRY {
7907 uint32_t LogicOpEnable;
7908 uint32_t LogicOpFunction;
7909 uint32_t PreBlendSourceOnlyClampEnable;
7910 #define COLORCLAMP_UNORM 0
7911 #define COLORCLAMP_SNORM 1
7912 #define COLORCLAMP_RTFORMAT 2
7913 uint32_t ColorClampRange;
7914 uint32_t PreBlendColorClampEnable;
7915 uint32_t PostBlendColorClampEnable;
7916 uint32_t ColorBufferBlendEnable;
7917 uint32_t SourceBlendFactor;
7918 uint32_t DestinationBlendFactor;
7919 uint32_t ColorBlendFunction;
7920 uint32_t SourceAlphaBlendFactor;
7921 uint32_t DestinationAlphaBlendFactor;
7922 uint32_t AlphaBlendFunction;
7923 uint32_t WriteDisableAlpha;
7924 uint32_t WriteDisableRed;
7925 uint32_t WriteDisableGreen;
7926 uint32_t WriteDisableBlue;
7927 };
7928
7929 static inline void
7930 GEN8_BLEND_STATE_ENTRY_pack(__gen_user_data *data, void * restrict dst,
7931 const struct GEN8_BLEND_STATE_ENTRY * restrict values)
7932 {
7933 uint32_t *dw = (uint32_t * restrict) dst;
7934
7935 dw[0] =
7936 __gen_field(values->LogicOpEnable, 63, 63) |
7937 __gen_field(values->LogicOpFunction, 59, 62) |
7938 __gen_field(values->PreBlendSourceOnlyClampEnable, 36, 36) |
7939 __gen_field(values->ColorClampRange, 34, 35) |
7940 __gen_field(values->PreBlendColorClampEnable, 33, 33) |
7941 __gen_field(values->PostBlendColorClampEnable, 32, 32) |
7942 __gen_field(values->ColorBufferBlendEnable, 31, 31) |
7943 __gen_field(values->SourceBlendFactor, 26, 30) |
7944 __gen_field(values->DestinationBlendFactor, 21, 25) |
7945 __gen_field(values->ColorBlendFunction, 18, 20) |
7946 __gen_field(values->SourceAlphaBlendFactor, 13, 17) |
7947 __gen_field(values->DestinationAlphaBlendFactor, 8, 12) |
7948 __gen_field(values->AlphaBlendFunction, 5, 7) |
7949 __gen_field(values->WriteDisableAlpha, 3, 3) |
7950 __gen_field(values->WriteDisableRed, 2, 2) |
7951 __gen_field(values->WriteDisableGreen, 1, 1) |
7952 __gen_field(values->WriteDisableBlue, 0, 0) |
7953 0;
7954
7955 }
7956
7957 struct GEN8_BLEND_STATE {
7958 uint32_t AlphaToCoverageEnable;
7959 uint32_t IndependentAlphaBlendEnable;
7960 uint32_t AlphaToOneEnable;
7961 uint32_t AlphaToCoverageDitherEnable;
7962 uint32_t AlphaTestEnable;
7963 uint32_t AlphaTestFunction;
7964 uint32_t ColorDitherEnable;
7965 uint32_t XDitherOffset;
7966 uint32_t YDitherOffset;
7967 struct GEN8_BLEND_STATE_ENTRY Entry;
7968 };
7969
7970 static inline void
7971 GEN8_BLEND_STATE_pack(__gen_user_data *data, void * restrict dst,
7972 const struct GEN8_BLEND_STATE * restrict values)
7973 {
7974 uint32_t *dw = (uint32_t * restrict) dst;
7975
7976 dw[0] =
7977 __gen_field(values->AlphaToCoverageEnable, 31, 31) |
7978 __gen_field(values->IndependentAlphaBlendEnable, 30, 30) |
7979 __gen_field(values->AlphaToOneEnable, 29, 29) |
7980 __gen_field(values->AlphaToCoverageDitherEnable, 28, 28) |
7981 __gen_field(values->AlphaTestEnable, 27, 27) |
7982 __gen_field(values->AlphaTestFunction, 24, 26) |
7983 __gen_field(values->ColorDitherEnable, 23, 23) |
7984 __gen_field(values->XDitherOffset, 21, 22) |
7985 __gen_field(values->YDitherOffset, 19, 20) |
7986 0;
7987
7988 GEN8_BLEND_STATE_ENTRY_pack(data, &dw[1], &values->Entry);
7989 }
7990
7991 #define GEN8_BLEND_STATE_ENTRY_length 0x00000001
7992
7993 #define GEN8_CC_VIEWPORT_length 0x00000002
7994
7995 struct GEN8_CC_VIEWPORT {
7996 float MinimumDepth;
7997 float MaximumDepth;
7998 };
7999
8000 static inline void
8001 GEN8_CC_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
8002 const struct GEN8_CC_VIEWPORT * restrict values)
8003 {
8004 uint32_t *dw = (uint32_t * restrict) dst;
8005
8006 dw[0] =
8007 __gen_float(values->MinimumDepth) |
8008 0;
8009
8010 dw[1] =
8011 __gen_float(values->MaximumDepth) |
8012 0;
8013
8014 }
8015
8016 #define GEN8_COLOR_CALC_STATE_length 0x00000006
8017
8018 struct GEN8_COLOR_CALC_STATE {
8019 uint32_t StencilReferenceValue;
8020 uint32_t BackFaceStencilReferenceValue;
8021 #define Cancelled 0
8022 #define NotCancelled 1
8023 uint32_t RoundDisableFunctionDisable;
8024 #define ALPHATEST_UNORM8 0
8025 #define ALPHATEST_FLOAT32 1
8026 uint32_t AlphaTestFormat;
8027 uint32_t AlphaReferenceValueAsUNORM8;
8028 float AlphaReferenceValueAsFLOAT32;
8029 float BlendConstantColorRed;
8030 float BlendConstantColorGreen;
8031 float BlendConstantColorBlue;
8032 float BlendConstantColorAlpha;
8033 };
8034
8035 static inline void
8036 GEN8_COLOR_CALC_STATE_pack(__gen_user_data *data, void * restrict dst,
8037 const struct GEN8_COLOR_CALC_STATE * restrict values)
8038 {
8039 uint32_t *dw = (uint32_t * restrict) dst;
8040
8041 dw[0] =
8042 __gen_field(values->StencilReferenceValue, 24, 31) |
8043 __gen_field(values->BackFaceStencilReferenceValue, 16, 23) |
8044 __gen_field(values->RoundDisableFunctionDisable, 15, 15) |
8045 __gen_field(values->AlphaTestFormat, 0, 0) |
8046 0;
8047
8048 dw[1] =
8049 __gen_field(values->AlphaReferenceValueAsUNORM8, 0, 31) |
8050 __gen_float(values->AlphaReferenceValueAsFLOAT32) |
8051 0;
8052
8053 dw[2] =
8054 __gen_float(values->BlendConstantColorRed) |
8055 0;
8056
8057 dw[3] =
8058 __gen_float(values->BlendConstantColorGreen) |
8059 0;
8060
8061 dw[4] =
8062 __gen_float(values->BlendConstantColorBlue) |
8063 0;
8064
8065 dw[5] =
8066 __gen_float(values->BlendConstantColorAlpha) |
8067 0;
8068
8069 }
8070
8071 #define GEN8_MEMORY_OBJECT_CONTROL_STATE_length 0x00000001
8072
8073 #define GEN8_VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_length 0x00000001
8074
8075 struct GEN8_VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS {
8076 #define UseCacheabilityControlsfrompagetableUCwithFenceifcoherentcycle 0
8077 #define UncacheableUCnoncacheable 1
8078 #define WritethroughWT 2
8079 #define WritebackWB 3
8080 uint32_t MemoryTypeLLCeLLCCacheabilityControlLeLLCCC;
8081 #define eLLCOnly 0
8082 #define LLCOnly 1
8083 #define LLCeLLCAllowed 2
8084 #define L3LLCeLLCAllowed 3
8085 uint32_t TargetCacheTC;
8086 uint32_t EncryptedData;
8087 #define PoorChance 3
8088 #define NormalChance 2
8089 #define BetterChance 1
8090 #define BestChance 0
8091 uint32_t AgeforQUADLRUAGE;
8092 };
8093
8094 static inline void
8095 GEN8_VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_pack(__gen_user_data *data, void * restrict dst,
8096 const struct GEN8_VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS * restrict values)
8097 {
8098 uint32_t *dw = (uint32_t * restrict) dst;
8099
8100 dw[0] =
8101 __gen_field(values->MemoryTypeLLCeLLCCacheabilityControlLeLLCCC, 5, 6) |
8102 __gen_field(values->TargetCacheTC, 3, 4) |
8103 __gen_field(values->EncryptedData, 2, 2) |
8104 __gen_field(values->AgeforQUADLRUAGE, 0, 1) |
8105 0;
8106
8107 }
8108
8109 #define GEN8_INTERFACE_DESCRIPTOR_DATA_length 0x00000008
8110
8111 struct GEN8_INTERFACE_DESCRIPTOR_DATA {
8112 uint32_t KernelStartPointer;
8113 uint32_t KernelStartPointerHigh;
8114 #define Ftz 0
8115 #define SetByKernel 1
8116 uint32_t DenormMode;
8117 #define Multiple 0
8118 #define Single 1
8119 uint32_t SingleProgramFlow;
8120 #define NormalPriority 0
8121 #define HighPriority 1
8122 uint32_t ThreadPriority;
8123 #define IEEE754 0
8124 #define Alternate 1
8125 uint32_t FloatingPointMode;
8126 uint32_t IllegalOpcodeExceptionEnable;
8127 uint32_t MaskStackExceptionEnable;
8128 uint32_t SoftwareExceptionEnable;
8129 uint32_t SamplerStatePointer;
8130 #define Nosamplersused 0
8131 #define Between1and4samplersused 1
8132 #define Between5and8samplersused 2
8133 #define Between9and12samplersused 3
8134 #define Between13and16samplersused 4
8135 uint32_t SamplerCount;
8136 uint32_t BindingTablePointer;
8137 uint32_t BindingTableEntryCount;
8138 uint32_t ConstantIndirectURBEntryReadLength;
8139 uint32_t ConstantURBEntryReadOffset;
8140 #define RTNE 0
8141 #define RU 1
8142 #define RD 2
8143 #define RTZ 3
8144 uint32_t RoundingMode;
8145 uint32_t BarrierEnable;
8146 #define Encodes0k 0
8147 #define Encodes4k 1
8148 #define Encodes8k 2
8149 #define Encodes16k 4
8150 #define Encodes32k 8
8151 #define Encodes64k 16
8152 uint32_t SharedLocalMemorySize;
8153 uint32_t NumberofThreadsinGPGPUThreadGroup;
8154 uint32_t CrossThreadConstantDataReadLength;
8155 };
8156
8157 static inline void
8158 GEN8_INTERFACE_DESCRIPTOR_DATA_pack(__gen_user_data *data, void * restrict dst,
8159 const struct GEN8_INTERFACE_DESCRIPTOR_DATA * restrict values)
8160 {
8161 uint32_t *dw = (uint32_t * restrict) dst;
8162
8163 dw[0] =
8164 __gen_offset(values->KernelStartPointer, 6, 31) |
8165 0;
8166
8167 dw[1] =
8168 __gen_offset(values->KernelStartPointerHigh, 0, 15) |
8169 0;
8170
8171 dw[2] =
8172 __gen_field(values->DenormMode, 19, 19) |
8173 __gen_field(values->SingleProgramFlow, 18, 18) |
8174 __gen_field(values->ThreadPriority, 17, 17) |
8175 __gen_field(values->FloatingPointMode, 16, 16) |
8176 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
8177 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
8178 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
8179 0;
8180
8181 dw[3] =
8182 __gen_offset(values->SamplerStatePointer, 5, 31) |
8183 __gen_field(values->SamplerCount, 2, 4) |
8184 0;
8185
8186 dw[4] =
8187 __gen_offset(values->BindingTablePointer, 5, 15) |
8188 __gen_field(values->BindingTableEntryCount, 0, 4) |
8189 0;
8190
8191 dw[5] =
8192 __gen_field(values->ConstantIndirectURBEntryReadLength, 16, 31) |
8193 __gen_field(values->ConstantURBEntryReadOffset, 0, 15) |
8194 0;
8195
8196 dw[6] =
8197 __gen_field(values->RoundingMode, 22, 23) |
8198 __gen_field(values->BarrierEnable, 21, 21) |
8199 __gen_field(values->SharedLocalMemorySize, 16, 20) |
8200 __gen_field(values->NumberofThreadsinGPGPUThreadGroup, 0, 9) |
8201 0;
8202
8203 dw[7] =
8204 __gen_field(values->CrossThreadConstantDataReadLength, 0, 7) |
8205 0;
8206
8207 }
8208
8209 #define GEN8_PALETTE_ENTRY_length 0x00000001
8210
8211 #define GEN8_BINDING_TABLE_STATE_length 0x00000001
8212
8213 struct GEN8_BINDING_TABLE_STATE {
8214 uint32_t SurfaceStatePointer;
8215 };
8216
8217 static inline void
8218 GEN8_BINDING_TABLE_STATE_pack(__gen_user_data *data, void * restrict dst,
8219 const struct GEN8_BINDING_TABLE_STATE * restrict values)
8220 {
8221 uint32_t *dw = (uint32_t * restrict) dst;
8222
8223 dw[0] =
8224 __gen_offset(values->SurfaceStatePointer, 6, 31) |
8225 0;
8226
8227 }
8228
8229 #define GEN8_RENDER_SURFACE_STATE_length 0x00000010
8230
8231 struct GEN8_RENDER_SURFACE_STATE {
8232 #define SURFTYPE_1D 0
8233 #define SURFTYPE_2D 1
8234 #define SURFTYPE_3D 2
8235 #define SURFTYPE_CUBE 3
8236 #define SURFTYPE_BUFFER 4
8237 #define SURFTYPE_STRBUF 5
8238 #define SURFTYPE_NULL 7
8239 uint32_t SurfaceType;
8240 uint32_t SurfaceArray;
8241 uint32_t SurfaceFormat;
8242 #define VALIGN4 1
8243 #define VALIGN8 2
8244 #define VALIGN16 3
8245 uint32_t SurfaceVerticalAlignment;
8246 #define HALIGN4 1
8247 #define HALIGN8 2
8248 #define HALIGN16 3
8249 uint32_t SurfaceHorizontalAlignment;
8250 #define LINEAR 0
8251 #define WMAJOR 1
8252 #define XMAJOR 2
8253 #define YMAJOR 3
8254 uint32_t TileMode;
8255 uint32_t VerticalLineStride;
8256 uint32_t VerticalLineStrideOffset;
8257 uint32_t SamplerL2BypassModeDisable;
8258 #define WriteOnlyCache 0
8259 #define ReadWriteCache 1
8260 uint32_t RenderCacheReadWriteMode;
8261 #define NORMAL_MODE 0
8262 #define PROGRESSIVE_FRAME 2
8263 #define INTERLACED_FRAME 3
8264 uint32_t MediaBoundaryPixelMode;
8265 uint32_t CubeFaceEnablePositiveZ;
8266 uint32_t CubeFaceEnableNegativeZ;
8267 uint32_t CubeFaceEnablePositiveY;
8268 uint32_t CubeFaceEnableNegativeY;
8269 uint32_t CubeFaceEnablePositiveX;
8270 uint32_t CubeFaceEnableNegativeX;
8271 struct GEN8_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
8272 float BaseMipLevel;
8273 uint32_t SurfaceQPitch;
8274 uint32_t Height;
8275 uint32_t Width;
8276 uint32_t Depth;
8277 uint32_t SurfacePitch;
8278 #define _0DEG 0
8279 #define _90DEG 1
8280 #define _270DEG 3
8281 uint32_t RenderTargetAndSampleUnormRotation;
8282 uint32_t MinimumArrayElement;
8283 uint32_t RenderTargetViewExtent;
8284 #define MSS 0
8285 #define DEPTH_STENCIL 1
8286 uint32_t MultisampledSurfaceStorageFormat;
8287 #define MULTISAMPLECOUNT_1 0
8288 #define MULTISAMPLECOUNT_2 1
8289 #define MULTISAMPLECOUNT_4 2
8290 #define MULTISAMPLECOUNT_8 3
8291 uint32_t NumberofMultisamples;
8292 uint32_t MultisamplePositionPaletteIndex;
8293 uint32_t XOffset;
8294 uint32_t YOffset;
8295 uint32_t EWADisableForCube;
8296 #define GPUcoherent 0
8297 #define IAcoherent 1
8298 uint32_t CoherencyType;
8299 uint32_t SurfaceMinLOD;
8300 uint32_t MIPCountLOD;
8301 uint32_t AuxiliarySurfaceQPitch;
8302 uint32_t AuxiliarySurfacePitch;
8303 #define AUX_NONE 0
8304 #define AUX_MCS 1
8305 #define AUX_APPEND 2
8306 #define AUX_HIZ 3
8307 uint32_t AuxiliarySurfaceMode;
8308 uint32_t SeparateUVPlaneEnable;
8309 uint32_t XOffsetforUorUVPlane;
8310 uint32_t YOffsetforUorUVPlane;
8311 uint32_t RedClearColor;
8312 uint32_t GreenClearColor;
8313 uint32_t BlueClearColor;
8314 uint32_t AlphaClearColor;
8315 uint32_t ShaderChannelSelectRed;
8316 uint32_t ShaderChannelSelectGreen;
8317 uint32_t ShaderChannelSelectBlue;
8318 uint32_t ShaderChannelSelectAlpha;
8319 float ResourceMinLOD;
8320 __gen_address_type SurfaceBaseAddress;
8321 uint32_t XOffsetforVPlane;
8322 uint32_t YOffsetforVPlane;
8323 uint32_t AuxiliaryTableIndexforMediaCompressedSurface;
8324 __gen_address_type AuxiliarySurfaceBaseAddress;
8325 };
8326
8327 static inline void
8328 GEN8_RENDER_SURFACE_STATE_pack(__gen_user_data *data, void * restrict dst,
8329 const struct GEN8_RENDER_SURFACE_STATE * restrict values)
8330 {
8331 uint32_t *dw = (uint32_t * restrict) dst;
8332
8333 dw[0] =
8334 __gen_field(values->SurfaceType, 29, 31) |
8335 __gen_field(values->SurfaceArray, 28, 28) |
8336 __gen_field(values->SurfaceFormat, 18, 26) |
8337 __gen_field(values->SurfaceVerticalAlignment, 16, 17) |
8338 __gen_field(values->SurfaceHorizontalAlignment, 14, 15) |
8339 __gen_field(values->TileMode, 12, 13) |
8340 __gen_field(values->VerticalLineStride, 11, 11) |
8341 __gen_field(values->VerticalLineStrideOffset, 10, 10) |
8342 __gen_field(values->SamplerL2BypassModeDisable, 9, 9) |
8343 __gen_field(values->RenderCacheReadWriteMode, 8, 8) |
8344 __gen_field(values->MediaBoundaryPixelMode, 6, 7) |
8345 __gen_field(values->CubeFaceEnablePositiveZ, 0, 0) |
8346 __gen_field(values->CubeFaceEnableNegativeZ, 1, 1) |
8347 __gen_field(values->CubeFaceEnablePositiveY, 2, 2) |
8348 __gen_field(values->CubeFaceEnableNegativeY, 3, 3) |
8349 __gen_field(values->CubeFaceEnablePositiveX, 4, 4) |
8350 __gen_field(values->CubeFaceEnableNegativeX, 5, 5) |
8351 0;
8352
8353 uint32_t dw_MemoryObjectControlState;
8354 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
8355 dw[1] =
8356 __gen_field(dw_MemoryObjectControlState, 24, 30) |
8357 __gen_field(values->BaseMipLevel * (1 << 1), 19, 23) |
8358 __gen_field(values->SurfaceQPitch, 0, 14) |
8359 0;
8360
8361 dw[2] =
8362 __gen_field(values->Height, 16, 29) |
8363 __gen_field(values->Width, 0, 13) |
8364 0;
8365
8366 dw[3] =
8367 __gen_field(values->Depth, 21, 31) |
8368 __gen_field(values->SurfacePitch, 0, 17) |
8369 0;
8370
8371 dw[4] =
8372 __gen_field(values->RenderTargetAndSampleUnormRotation, 29, 30) |
8373 __gen_field(values->MinimumArrayElement, 18, 28) |
8374 __gen_field(values->RenderTargetViewExtent, 7, 17) |
8375 __gen_field(values->MultisampledSurfaceStorageFormat, 6, 6) |
8376 __gen_field(values->NumberofMultisamples, 3, 5) |
8377 __gen_field(values->MultisamplePositionPaletteIndex, 0, 2) |
8378 0;
8379
8380 dw[5] =
8381 __gen_offset(values->XOffset, 25, 31) |
8382 __gen_offset(values->YOffset, 21, 23) |
8383 __gen_field(values->EWADisableForCube, 20, 20) |
8384 __gen_field(values->CoherencyType, 14, 14) |
8385 __gen_field(values->SurfaceMinLOD, 4, 7) |
8386 __gen_field(values->MIPCountLOD, 0, 3) |
8387 0;
8388
8389 dw[6] =
8390 __gen_field(values->AuxiliarySurfaceQPitch, 16, 30) |
8391 __gen_field(values->AuxiliarySurfacePitch, 3, 11) |
8392 __gen_field(values->AuxiliarySurfaceMode, 0, 2) |
8393 __gen_field(values->SeparateUVPlaneEnable, 31, 31) |
8394 __gen_field(values->XOffsetforUorUVPlane, 16, 29) |
8395 __gen_field(values->YOffsetforUorUVPlane, 0, 13) |
8396 0;
8397
8398 dw[7] =
8399 __gen_field(values->RedClearColor, 31, 31) |
8400 __gen_field(values->GreenClearColor, 30, 30) |
8401 __gen_field(values->BlueClearColor, 29, 29) |
8402 __gen_field(values->AlphaClearColor, 28, 28) |
8403 __gen_field(values->ShaderChannelSelectRed, 25, 27) |
8404 __gen_field(values->ShaderChannelSelectGreen, 22, 24) |
8405 __gen_field(values->ShaderChannelSelectBlue, 19, 21) |
8406 __gen_field(values->ShaderChannelSelectAlpha, 16, 18) |
8407 __gen_field(values->ResourceMinLOD * (1 << 8), 0, 11) |
8408 0;
8409
8410 uint32_t dw8 =
8411 0;
8412
8413 uint64_t qw8 =
8414 __gen_combine_address(data, &dw[8], values->SurfaceBaseAddress, dw8);
8415
8416 dw[8] = qw8;
8417 dw[9] = qw8 >> 32;
8418
8419 uint32_t dw10 =
8420 __gen_field(values->XOffsetforVPlane, 48, 61) |
8421 __gen_field(values->YOffsetforVPlane, 32, 45) |
8422 __gen_field(values->AuxiliaryTableIndexforMediaCompressedSurface, 21, 31) |
8423 0;
8424
8425 uint64_t qw10 =
8426 __gen_combine_address(data, &dw[10], values->AuxiliarySurfaceBaseAddress, dw10);
8427
8428 dw[10] = qw10;
8429 dw[11] = qw10 >> 32;
8430
8431 dw[12] =
8432 0;
8433
8434 dw[13] =
8435 0;
8436
8437 dw[14] =
8438 0;
8439
8440 dw[15] =
8441 0;
8442
8443 }
8444
8445 #define GEN8_SAMPLER_STATE_length 0x00000004
8446
8447 struct GEN8_SAMPLER_STATE {
8448 uint32_t SamplerDisable;
8449 #define DX10OGL 0
8450 #define DX9 1
8451 uint32_t TextureBorderColorMode;
8452 #define CLAMP_NONE 0
8453 #define CLAMP_OGL 2
8454 uint32_t LODPreClampMode;
8455 float BaseMipLevel;
8456 #define MIPFILTER_NONE 0
8457 #define MIPFILTER_NEAREST 1
8458 #define MIPFILTER_LINEAR 3
8459 uint32_t MipModeFilter;
8460 #define MAPFILTER_NEAREST 0
8461 #define MAPFILTER_LINEAR 1
8462 #define MAPFILTER_ANISOTROPIC 2
8463 #define MAPFILTER_MONO 6
8464 uint32_t MagModeFilter;
8465 #define MAPFILTER_NEAREST 0
8466 #define MAPFILTER_LINEAR 1
8467 #define MAPFILTER_ANISOTROPIC 2
8468 #define MAPFILTER_MONO 6
8469 uint32_t MinModeFilter;
8470 uint32_t TextureLODBias;
8471 #define LEGACY 0
8472 #define EWAApproximation 1
8473 uint32_t AnisotropicAlgorithm;
8474 float MinLOD;
8475 float MaxLOD;
8476 uint32_t ChromaKeyEnable;
8477 uint32_t ChromaKeyIndex;
8478 #define KEYFILTER_KILL_ON_ANY_MATCH 0
8479 #define KEYFILTER_REPLACE_BLACK 1
8480 uint32_t ChromaKeyMode;
8481 #define PREFILTEROPALWAYS 0
8482 #define PREFILTEROPNEVER 1
8483 #define PREFILTEROPLESS 2
8484 #define PREFILTEROPEQUAL 3
8485 #define PREFILTEROPLEQUAL 4
8486 #define PREFILTEROPGREATER 5
8487 #define PREFILTEROPNOTEQUAL 6
8488 #define PREFILTEROPGEQUAL 7
8489 uint32_t ShadowFunction;
8490 #define PROGRAMMED 0
8491 #define OVERRIDE 1
8492 uint32_t CubeSurfaceControlMode;
8493 uint32_t IndirectStatePointer;
8494 #define MIPNONE 0
8495 #define MIPFILTER 1
8496 uint32_t LODClampMagnificationMode;
8497 #define RATIO21 0
8498 #define RATIO41 1
8499 #define RATIO61 2
8500 #define RATIO81 3
8501 #define RATIO101 4
8502 #define RATIO121 5
8503 #define RATIO141 6
8504 #define RATIO161 7
8505 uint32_t MaximumAnisotropy;
8506 uint32_t RAddressMinFilterRoundingEnable;
8507 uint32_t RAddressMagFilterRoundingEnable;
8508 uint32_t VAddressMinFilterRoundingEnable;
8509 uint32_t VAddressMagFilterRoundingEnable;
8510 uint32_t UAddressMinFilterRoundingEnable;
8511 uint32_t UAddressMagFilterRoundingEnable;
8512 #define FULL 0
8513 #define HIGH 1
8514 #define MED 2
8515 #define LOW 3
8516 uint32_t TrilinearFilterQuality;
8517 uint32_t NonnormalizedCoordinateEnable;
8518 uint32_t TCXAddressControlMode;
8519 uint32_t TCYAddressControlMode;
8520 uint32_t TCZAddressControlMode;
8521 };
8522
8523 static inline void
8524 GEN8_SAMPLER_STATE_pack(__gen_user_data *data, void * restrict dst,
8525 const struct GEN8_SAMPLER_STATE * restrict values)
8526 {
8527 uint32_t *dw = (uint32_t * restrict) dst;
8528
8529 dw[0] =
8530 __gen_field(values->SamplerDisable, 31, 31) |
8531 __gen_field(values->TextureBorderColorMode, 29, 29) |
8532 __gen_field(values->LODPreClampMode, 27, 28) |
8533 __gen_field(values->BaseMipLevel * (1 << 1), 22, 26) |
8534 __gen_field(values->MipModeFilter, 20, 21) |
8535 __gen_field(values->MagModeFilter, 17, 19) |
8536 __gen_field(values->MinModeFilter, 14, 16) |
8537 __gen_field(values->TextureLODBias, 1, 13) |
8538 __gen_field(values->AnisotropicAlgorithm, 0, 0) |
8539 0;
8540
8541 dw[1] =
8542 __gen_field(values->MinLOD * (1 << 8), 20, 31) |
8543 __gen_field(values->MaxLOD * (1 << 8), 8, 19) |
8544 __gen_field(values->ChromaKeyEnable, 7, 7) |
8545 __gen_field(values->ChromaKeyIndex, 5, 6) |
8546 __gen_field(values->ChromaKeyMode, 4, 4) |
8547 __gen_field(values->ShadowFunction, 1, 3) |
8548 __gen_field(values->CubeSurfaceControlMode, 0, 0) |
8549 0;
8550
8551 dw[2] =
8552 __gen_field(values->IndirectStatePointer, 6, 23) |
8553 __gen_field(values->LODClampMagnificationMode, 0, 0) |
8554 0;
8555
8556 dw[3] =
8557 __gen_field(values->MaximumAnisotropy, 19, 21) |
8558 __gen_field(values->RAddressMinFilterRoundingEnable, 13, 13) |
8559 __gen_field(values->RAddressMagFilterRoundingEnable, 14, 14) |
8560 __gen_field(values->VAddressMinFilterRoundingEnable, 15, 15) |
8561 __gen_field(values->VAddressMagFilterRoundingEnable, 16, 16) |
8562 __gen_field(values->UAddressMinFilterRoundingEnable, 17, 17) |
8563 __gen_field(values->UAddressMagFilterRoundingEnable, 18, 18) |
8564 __gen_field(values->TrilinearFilterQuality, 11, 12) |
8565 __gen_field(values->NonnormalizedCoordinateEnable, 10, 10) |
8566 __gen_field(values->TCXAddressControlMode, 6, 8) |
8567 __gen_field(values->TCYAddressControlMode, 3, 5) |
8568 __gen_field(values->TCZAddressControlMode, 0, 2) |
8569 0;
8570
8571 }
8572
8573 /* Enum 3D_Prim_Topo_Type */
8574 #define _3DPRIM_POINTLIST 1
8575 #define _3DPRIM_LINELIST 2
8576 #define _3DPRIM_LINESTRIP 3
8577 #define _3DPRIM_TRILIST 4
8578 #define _3DPRIM_TRISTRIP 5
8579 #define _3DPRIM_TRIFAN 6
8580 #define _3DPRIM_QUADLIST 7
8581 #define _3DPRIM_QUADSTRIP 8
8582 #define _3DPRIM_LINELIST_ADJ 9
8583 #define _3DPRIM_LISTSTRIP_ADJ 10
8584 #define _3DPRIM_TRILIST_ADJ 11
8585 #define _3DPRIM_TRISTRIP_ADJ 12
8586 #define _3DPRIM_TRISTRIP_REVERSE 13
8587 #define _3DPRIM_POLYGON 14
8588 #define _3DPRIM_RECTLIST 15
8589 #define _3DPRIM_LINELOOP 16
8590 #define _3DPRIM_POINTLIST_BF 17
8591 #define _3DPRIM_LINESTRIP_CONT 18
8592 #define _3DPRIM_LINESTRIP_BF 19
8593 #define _3DPRIM_LINESTRIP_CONT_BF 20
8594 #define _3DPRIM_TRIFAN_NOSTIPPLE 22
8595 #define _3DPRIM_PATCHLIST_1 32
8596 #define _3DPRIM_PATCHLIST_2 33
8597 #define _3DPRIM_PATCHLIST_3 34
8598 #define _3DPRIM_PATCHLIST_4 35
8599 #define _3DPRIM_PATCHLIST_5 36
8600 #define _3DPRIM_PATCHLIST_6 37
8601 #define _3DPRIM_PATCHLIST_7 38
8602 #define _3DPRIM_PATCHLIST_8 39
8603 #define _3DPRIM_PATCHLIST_9 40
8604 #define _3DPRIM_PATCHLIST_10 41
8605 #define _3DPRIM_PATCHLIST_11 42
8606 #define _3DPRIM_PATCHLIST_12 43
8607 #define _3DPRIM_PATCHLIST_13 44
8608 #define _3DPRIM_PATCHLIST_14 45
8609 #define _3DPRIM_PATCHLIST_15 46
8610 #define _3DPRIM_PATCHLIST_16 47
8611 #define _3DPRIM_PATCHLIST_17 48
8612 #define _3DPRIM_PATCHLIST_18 49
8613 #define _3DPRIM_PATCHLIST_19 50
8614 #define _3DPRIM_PATCHLIST_20 51
8615 #define _3DPRIM_PATCHLIST_21 52
8616 #define _3DPRIM_PATCHLIST_22 53
8617 #define _3DPRIM_PATCHLIST_23 54
8618 #define _3DPRIM_PATCHLIST_24 55
8619 #define _3DPRIM_PATCHLIST_25 56
8620 #define _3DPRIM_PATCHLIST_26 57
8621 #define _3DPRIM_PATCHLIST_27 58
8622 #define _3DPRIM_PATCHLIST_28 59
8623 #define _3DPRIM_PATCHLIST_29 60
8624 #define _3DPRIM_PATCHLIST_30 61
8625 #define _3DPRIM_PATCHLIST_31 62
8626 #define _3DPRIM_PATCHLIST_32 63
8627
8628 /* Enum 3D_Vertex_Component_Control */
8629 #define VFCOMP_NOSTORE 0
8630 #define VFCOMP_STORE_SRC 1
8631 #define VFCOMP_STORE_0 2
8632 #define VFCOMP_STORE_1_FP 3
8633 #define VFCOMP_STORE_1_INT 4
8634 #define VFCOMP_STORE_PID 7
8635
8636 /* Enum WRAP_SHORTEST_ENABLE */
8637 #define X 1
8638 #define Y 2
8639 #define XY 3
8640 #define Z 4
8641 #define XZ 5
8642 #define YZ 6
8643 #define XYZ 7
8644 #define W 8
8645 #define XW 9
8646 #define YW 10
8647 #define XYW 11
8648 #define ZW 12
8649 #define XZW 13
8650 #define YZW 14
8651 #define XYZW 15
8652
8653 /* Enum 3D_Stencil_Operation */
8654 #define STENCILOP_KEEP 0
8655 #define STENCILOP_ZERO 1
8656 #define STENCILOP_REPLACE 2
8657 #define STENCILOP_INCRSAT 3
8658 #define STENCILOP_DECRSAT 4
8659 #define STENCILOP_INCR 5
8660 #define STENCILOP_DECR 6
8661 #define STENCILOP_INVERT 7
8662
8663 /* Enum 3D_Color_Buffer_Blend_Factor */
8664 #define BLENDFACTOR_ONE 1
8665 #define BLENDFACTOR_SRC_COLOR 2
8666 #define BLENDFACTOR_SRC_ALPHA 3
8667 #define BLENDFACTOR_DST_ALPHA 4
8668 #define BLENDFACTOR_DST_COLOR 5
8669 #define BLENDFACTOR_SRC_ALPHA_SATURATE 6
8670 #define BLENDFACTOR_CONST_COLOR 7
8671 #define BLENDFACTOR_CONST_ALPHA 8
8672 #define BLENDFACTOR_SRC1_COLOR 9
8673 #define BLENDFACTOR_SRC1_ALPHA 10
8674 #define BLENDFACTOR_ZERO 17
8675 #define BLENDFACTOR_INV_SRC_COLOR 18
8676 #define BLENDFACTOR_INV_SRC_ALPHA 19
8677 #define BLENDFACTOR_INV_DST_ALPHA 20
8678 #define BLENDFACTOR_INV_DST_COLOR 21
8679 #define BLENDFACTOR_INV_CONST_COLOR 23
8680 #define BLENDFACTOR_INV_CONST_ALPHA 24
8681 #define BLENDFACTOR_INV_SRC1_COLOR 25
8682 #define BLENDFACTOR_INV_SRC1_ALPHA 26
8683
8684 /* Enum 3D_Color_Buffer_Blend_Function */
8685 #define BLENDFUNCTION_ADD 0
8686 #define BLENDFUNCTION_SUBTRACT 1
8687 #define BLENDFUNCTION_REVERSE_SUBTRACT 2
8688 #define BLENDFUNCTION_MIN 3
8689 #define BLENDFUNCTION_MAX 4
8690
8691 /* Enum 3D_Compare_Function */
8692 #define COMPAREFUNCTION_ALWAYS 0
8693 #define COMPAREFUNCTION_NEVER 1
8694 #define COMPAREFUNCTION_LESS 2
8695 #define COMPAREFUNCTION_EQUAL 3
8696 #define COMPAREFUNCTION_LEQUAL 4
8697 #define COMPAREFUNCTION_GREATER 5
8698 #define COMPAREFUNCTION_NOTEQUAL 6
8699 #define COMPAREFUNCTION_GEQUAL 7
8700
8701 /* Enum 3D_Logic_Op_Function */
8702 #define LOGICOP_CLEAR 0
8703 #define LOGICOP_NOR 1
8704 #define LOGICOP_AND_INVERTED 2
8705 #define LOGICOP_COPY_INVERTED 3
8706 #define LOGICOP_AND_REVERSE 4
8707 #define LOGICOP_INVERT 5
8708 #define LOGICOP_XOR 6
8709 #define LOGICOP_NAND 7
8710 #define LOGICOP_AND 8
8711 #define LOGICOP_EQUIV 9
8712 #define LOGICOP_NOOP 10
8713 #define LOGICOP_OR_INVERTED 11
8714 #define LOGICOP_COPY 12
8715 #define LOGICOP_OR_REVERSE 13
8716 #define LOGICOP_OR 14
8717 #define LOGICOP_SET 15
8718
8719 /* Enum SURFACE_FORMAT */
8720 #define R32G32B32A32_FLOAT 0
8721 #define R32G32B32A32_SINT 1
8722 #define R32G32B32A32_UINT 2
8723 #define R32G32B32A32_UNORM 3
8724 #define R32G32B32A32_SNORM 4
8725 #define R64G64_FLOAT 5
8726 #define R32G32B32X32_FLOAT 6
8727 #define R32G32B32A32_SSCALED 7
8728 #define R32G32B32A32_USCALED 8
8729 #define R32G32B32A32_SFIXED 32
8730 #define R64G64_PASSTHRU 33
8731 #define R32G32B32_FLOAT 64
8732 #define R32G32B32_SINT 65
8733 #define R32G32B32_UINT 66
8734 #define R32G32B32_UNORM 67
8735 #define R32G32B32_SNORM 68
8736 #define R32G32B32_SSCALED 69
8737 #define R32G32B32_USCALED 70
8738 #define R32G32B32_SFIXED 80
8739 #define R16G16B16A16_UNORM 128
8740 #define R16G16B16A16_SNORM 129
8741 #define R16G16B16A16_SINT 130
8742 #define R16G16B16A16_UINT 131
8743 #define R16G16B16A16_FLOAT 132
8744 #define R32G32_FLOAT 133
8745 #define R32G32_SINT 134
8746 #define R32G32_UINT 135
8747 #define R32_FLOAT_X8X24_TYPELESS 136
8748 #define X32_TYPELESS_G8X24_UINT 137
8749 #define L32A32_FLOAT 138
8750 #define R32G32_UNORM 139
8751 #define R32G32_SNORM 140
8752 #define R64_FLOAT 141
8753 #define R16G16B16X16_UNORM 142
8754 #define R16G16B16X16_FLOAT 143
8755 #define A32X32_FLOAT 144
8756 #define L32X32_FLOAT 145
8757 #define I32X32_FLOAT 146
8758 #define R16G16B16A16_SSCALED 147
8759 #define R16G16B16A16_USCALED 148
8760 #define R32G32_SSCALED 149
8761 #define R32G32_USCALED 150
8762 #define R32G32_SFIXED 160
8763 #define R64_PASSTHRU 161
8764 #define B8G8R8A8_UNORM 192
8765 #define B8G8R8A8_UNORM_SRGB 193
8766 #define R10G10B10A2_UNORM 194
8767 #define R10G10B10A2_UNORM_SRGB 195
8768 #define R10G10B10A2_UINT 196
8769 #define R10G10B10_SNORM_A2_UNORM 197
8770 #define R8G8B8A8_UNORM 199
8771 #define R8G8B8A8_UNORM_SRGB 200
8772 #define R8G8B8A8_SNORM 201
8773 #define R8G8B8A8_SINT 202
8774 #define R8G8B8A8_UINT 203
8775 #define R16G16_UNORM 204
8776 #define R16G16_SNORM 205
8777 #define R16G16_SINT 206
8778 #define R16G16_UINT 207
8779 #define R16G16_FLOAT 208
8780 #define B10G10R10A2_UNORM 209
8781 #define B10G10R10A2_UNORM_SRGB 210
8782 #define R11G11B10_FLOAT 211
8783 #define R32_SINT 214
8784 #define R32_UINT 215
8785 #define R32_FLOAT 216
8786 #define R24_UNORM_X8_TYPELESS 217
8787 #define X24_TYPELESS_G8_UINT 218
8788 #define L32_UNORM 221
8789 #define A32_UNORM 222
8790 #define L16A16_UNORM 223
8791 #define I24X8_UNORM 224
8792 #define L24X8_UNORM 225
8793 #define A24X8_UNORM 226
8794 #define I32_FLOAT 227
8795 #define L32_FLOAT 228
8796 #define A32_FLOAT 229
8797 #define X8B8_UNORM_G8R8_SNORM 230
8798 #define A8X8_UNORM_G8R8_SNORM 231
8799 #define B8X8_UNORM_G8R8_SNORM 232
8800 #define B8G8R8X8_UNORM 233
8801 #define B8G8R8X8_UNORM_SRGB 234
8802 #define R8G8B8X8_UNORM 235
8803 #define R8G8B8X8_UNORM_SRGB 236
8804 #define R9G9B9E5_SHAREDEXP 237
8805 #define B10G10R10X2_UNORM 238
8806 #define L16A16_FLOAT 240
8807 #define R32_UNORM 241
8808 #define R32_SNORM 242
8809 #define R10G10B10X2_USCALED 243
8810 #define R8G8B8A8_SSCALED 244
8811 #define R8G8B8A8_USCALED 245
8812 #define R16G16_SSCALED 246
8813 #define R16G16_USCALED 247
8814 #define R32_SSCALED 248
8815 #define R32_USCALED 249
8816 #define B5G6R5_UNORM 256
8817 #define B5G6R5_UNORM_SRGB 257
8818 #define B5G5R5A1_UNORM 258
8819 #define B5G5R5A1_UNORM_SRGB 259
8820 #define B4G4R4A4_UNORM 260
8821 #define B4G4R4A4_UNORM_SRGB 261
8822 #define R8G8_UNORM 262
8823 #define R8G8_SNORM 263
8824 #define R8G8_SINT 264
8825 #define R8G8_UINT 265
8826 #define R16_UNORM 266
8827 #define R16_SNORM 267
8828 #define R16_SINT 268
8829 #define R16_UINT 269
8830 #define R16_FLOAT 270
8831 #define A8P8_UNORM_PALETTE0 271
8832 #define A8P8_UNORM_PALETTE1 272
8833 #define I16_UNORM 273
8834 #define L16_UNORM 274
8835 #define A16_UNORM 275
8836 #define L8A8_UNORM 276
8837 #define I16_FLOAT 277
8838 #define L16_FLOAT 278
8839 #define A16_FLOAT 279
8840 #define L8A8_UNORM_SRGB 280
8841 #define R5G5_SNORM_B6_UNORM 281
8842 #define B5G5R5X1_UNORM 282
8843 #define B5G5R5X1_UNORM_SRGB 283
8844 #define R8G8_SSCALED 284
8845 #define R8G8_USCALED 285
8846 #define R16_SSCALED 286
8847 #define R16_USCALED 287
8848 #define P8A8_UNORM_PALETTE0 290
8849 #define P8A8_UNORM_PALETTE1 291
8850 #define A1B5G5R5_UNORM 292
8851 #define A4B4G4R4_UNORM 293
8852 #define L8A8_UINT 294
8853 #define L8A8_SINT 295
8854 #define R8_UNORM 320
8855 #define R8_SNORM 321
8856 #define R8_SINT 322
8857 #define R8_UINT 323
8858 #define A8_UNORM 324
8859 #define I8_UNORM 325
8860 #define L8_UNORM 326
8861 #define P4A4_UNORM_PALETTE0 327
8862 #define A4P4_UNORM_PALETTE0 328
8863 #define R8_SSCALED 329
8864 #define R8_USCALED 330
8865 #define P8_UNORM_PALETTE0 331
8866 #define L8_UNORM_SRGB 332
8867 #define P8_UNORM_PALETTE1 333
8868 #define P4A4_UNORM_PALETTE1 334
8869 #define A4P4_UNORM_PALETTE1 335
8870 #define Y8_UNORM 336
8871 #define L8_UINT 338
8872 #define L8_SINT 339
8873 #define I8_UINT 340
8874 #define I8_SINT 341
8875 #define DXT1_RGB_SRGB 384
8876 #define R1_UNORM 385
8877 #define YCRCB_NORMAL 386
8878 #define YCRCB_SWAPUVY 387
8879 #define P2_UNORM_PALETTE0 388
8880 #define P2_UNORM_PALETTE1 389
8881 #define BC1_UNORM 390
8882 #define BC2_UNORM 391
8883 #define BC3_UNORM 392
8884 #define BC4_UNORM 393
8885 #define BC5_UNORM 394
8886 #define BC1_UNORM_SRGB 395
8887 #define BC2_UNORM_SRGB 396
8888 #define BC3_UNORM_SRGB 397
8889 #define MONO8 398
8890 #define YCRCB_SWAPUV 399
8891 #define YCRCB_SWAPY 400
8892 #define DXT1_RGB 401
8893 #define FXT1 402
8894 #define R8G8B8_UNORM 403
8895 #define R8G8B8_SNORM 404
8896 #define R8G8B8_SSCALED 405
8897 #define R8G8B8_USCALED 406
8898 #define R64G64B64A64_FLOAT 407
8899 #define R64G64B64_FLOAT 408
8900 #define BC4_SNORM 409
8901 #define BC5_SNORM 410
8902 #define R16G16B16_FLOAT 411
8903 #define R16G16B16_UNORM 412
8904 #define R16G16B16_SNORM 413
8905 #define R16G16B16_SSCALED 414
8906 #define R16G16B16_USCALED 415
8907 #define BC6H_SF16 417
8908 #define BC7_UNORM 418
8909 #define BC7_UNORM_SRGB 419
8910 #define BC6H_UF16 420
8911 #define PLANAR_420_8 421
8912 #define R8G8B8_UNORM_SRGB 424
8913 #define ETC1_RGB8 425
8914 #define ETC2_RGB8 426
8915 #define EAC_R11 427
8916 #define EAC_RG11 428
8917 #define EAC_SIGNED_R11 429
8918 #define EAC_SIGNED_RG11 430
8919 #define ETC2_SRGB8 431
8920 #define R16G16B16_UINT 432
8921 #define R16G16B16_SINT 433
8922 #define R32_SFIXED 434
8923 #define R10G10B10A2_SNORM 435
8924 #define R10G10B10A2_USCALED 436
8925 #define R10G10B10A2_SSCALED 437
8926 #define R10G10B10A2_SINT 438
8927 #define B10G10R10A2_SNORM 439
8928 #define B10G10R10A2_USCALED 440
8929 #define B10G10R10A2_SSCALED 441
8930 #define B10G10R10A2_UINT 442
8931 #define B10G10R10A2_SINT 443
8932 #define R64G64B64A64_PASSTHRU 444
8933 #define R64G64B64_PASSTHRU 445
8934 #define ETC2_RGB8_PTA 448
8935 #define ETC2_SRGB8_PTA 449
8936 #define ETC2_EAC_RGBA8 450
8937 #define ETC2_EAC_SRGB8_A8 451
8938 #define R8G8B8_UINT 456
8939 #define R8G8B8_SINT 457
8940 #define RAW 511
8941
8942 /* Enum Shader Channel Select */
8943 #define SCS_ZERO 0
8944 #define SCS_ONE 1
8945 #define SCS_RED 4
8946 #define SCS_GREEN 5
8947 #define SCS_BLUE 6
8948 #define SCS_ALPHA 7
8949
8950 /* Enum Clear Color */
8951 #define CC_ZERO 0
8952 #define CC_ONE 1
8953
8954 /* Enum Texture Coordinate Mode */
8955 #define TCM_WRAP 0
8956 #define TCM_MIRROR 1
8957 #define TCM_CLAMP 2
8958 #define TCM_CUBE 3
8959 #define TCM_CLAMP_BORDER 4
8960 #define TCM_MIRROR_ONCE 5
8961 #define TCM_HALF_BORDER 6
8962