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vk/headers: Make General State offsets relocations
[mesa.git] / src / vulkan / gen8_pack.h
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24
25 /* Instructions, enums and structures for BDW.
26 *
27 * This file has been generated, do not hand edit.
28 */
29
30 #pragma once
31
32 #include <stdio.h>
33 #include <assert.h>
34
35 #ifndef __gen_validate_value
36 #define __gen_validate_value(x)
37 #endif
38
39 #ifndef __gen_field_functions
40 #define __gen_field_functions
41
42 union __gen_value {
43 float f;
44 uint32_t dw;
45 };
46
47 static inline uint64_t
48 __gen_field(uint64_t v, uint32_t start, uint32_t end)
49 {
50 __gen_validate_value(v);
51 #if DEBUG
52 if (end - start + 1 < 64)
53 assert(v < 1ul << (end - start + 1));
54 #endif
55
56 return v << start;
57 }
58
59 static inline uint64_t
60 __gen_offset(uint64_t v, uint32_t start, uint32_t end)
61 {
62 __gen_validate_value(v);
63 #if DEBUG
64 uint64_t mask = (~0ul >> (64 - (end - start + 1))) << start;
65
66 assert((v & ~mask) == 0);
67 #endif
68
69 return v;
70 }
71
72 static inline uint32_t
73 __gen_float(float v)
74 {
75 __gen_validate_value(v);
76 return ((union __gen_value) { .f = (v) }).dw;
77 }
78
79 #ifndef __gen_address_type
80 #error #define __gen_address_type before including this file
81 #endif
82
83 #ifndef __gen_user_data
84 #error #define __gen_combine_address before including this file
85 #endif
86
87 #endif
88
89 #define GEN8_3DSTATE_URB_VS_length 0x00000002
90 #define GEN8_3DSTATE_URB_VS_length_bias 0x00000002
91 #define GEN8_3DSTATE_URB_VS_header \
92 .CommandType = 3, \
93 .CommandSubType = 3, \
94 ._3DCommandOpcode = 0, \
95 ._3DCommandSubOpcode = 48, \
96 .DwordLength = 0
97
98 struct GEN8_3DSTATE_URB_VS {
99 uint32_t CommandType;
100 uint32_t CommandSubType;
101 uint32_t _3DCommandOpcode;
102 uint32_t _3DCommandSubOpcode;
103 uint32_t DwordLength;
104 uint32_t VSURBStartingAddress;
105 uint32_t VSURBEntryAllocationSize;
106 uint32_t VSNumberofURBEntries;
107 };
108
109 static inline void
110 GEN8_3DSTATE_URB_VS_pack(__gen_user_data *data, void * restrict dst,
111 const struct GEN8_3DSTATE_URB_VS * restrict values)
112 {
113 uint32_t *dw = (uint32_t * restrict) dst;
114
115 dw[0] =
116 __gen_field(values->CommandType, 29, 31) |
117 __gen_field(values->CommandSubType, 27, 28) |
118 __gen_field(values->_3DCommandOpcode, 24, 26) |
119 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
120 __gen_field(values->DwordLength, 0, 7) |
121 0;
122
123 dw[1] =
124 __gen_field(values->VSURBStartingAddress, 25, 31) |
125 __gen_field(values->VSURBEntryAllocationSize, 16, 24) |
126 __gen_field(values->VSNumberofURBEntries, 0, 15) |
127 0;
128
129 }
130
131 #define GEN8_3DSTATE_VS_length 0x00000009
132 #define GEN8_3DSTATE_VS_length_bias 0x00000002
133 #define GEN8_3DSTATE_VS_header \
134 .CommandType = 3, \
135 .CommandSubType = 3, \
136 ._3DCommandOpcode = 0, \
137 ._3DCommandSubOpcode = 16, \
138 .DwordLength = 7
139
140 struct GEN8_3DSTATE_VS {
141 uint32_t CommandType;
142 uint32_t CommandSubType;
143 uint32_t _3DCommandOpcode;
144 uint32_t _3DCommandSubOpcode;
145 uint32_t DwordLength;
146 uint64_t KernelStartPointer;
147 #define Multiple 0
148 #define Single 1
149 uint32_t SingleVertexDispatch;
150 #define Dmask 0
151 #define Vmask 1
152 uint32_t VectorMaskEnable;
153 #define NoSamplers 0
154 #define _14Samplers 1
155 #define _58Samplers 2
156 #define _912Samplers 3
157 #define _1316Samplers 4
158 uint32_t SamplerCount;
159 uint32_t BindingTableEntryCount;
160 #define Normal 0
161 #define High 1
162 uint32_t ThreadDispatchPriority;
163 #define IEEE754 0
164 #define Alternate 1
165 uint32_t FloatingPointMode;
166 uint32_t IllegalOpcodeExceptionEnable;
167 uint32_t AccessesUAV;
168 uint32_t SoftwareExceptionEnable;
169 __gen_address_type ScratchSpaceBasePointer;
170 uint32_t PerThreadScratchSpace;
171 uint32_t DispatchGRFStartRegisterForURBData;
172 uint32_t VertexURBEntryReadLength;
173 uint32_t VertexURBEntryReadOffset;
174 uint32_t MaximumNumberofThreads;
175 uint32_t StatisticsEnable;
176 uint32_t SIMD8DispatchEnable;
177 uint32_t VertexCacheDisable;
178 uint32_t FunctionEnable;
179 uint32_t VertexURBEntryOutputReadOffset;
180 uint32_t VertexURBEntryOutputLength;
181 uint32_t UserClipDistanceClipTestEnableBitmask;
182 uint32_t UserClipDistanceCullTestEnableBitmask;
183 };
184
185 static inline void
186 GEN8_3DSTATE_VS_pack(__gen_user_data *data, void * restrict dst,
187 const struct GEN8_3DSTATE_VS * restrict values)
188 {
189 uint32_t *dw = (uint32_t * restrict) dst;
190
191 dw[0] =
192 __gen_field(values->CommandType, 29, 31) |
193 __gen_field(values->CommandSubType, 27, 28) |
194 __gen_field(values->_3DCommandOpcode, 24, 26) |
195 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
196 __gen_field(values->DwordLength, 0, 7) |
197 0;
198
199 uint64_t qw1 =
200 __gen_offset(values->KernelStartPointer, 6, 63) |
201 0;
202
203 dw[1] = qw1;
204 dw[2] = qw1 >> 32;
205
206 dw[3] =
207 __gen_field(values->SingleVertexDispatch, 31, 31) |
208 __gen_field(values->VectorMaskEnable, 30, 30) |
209 __gen_field(values->SamplerCount, 27, 29) |
210 __gen_field(values->BindingTableEntryCount, 18, 25) |
211 __gen_field(values->ThreadDispatchPriority, 17, 17) |
212 __gen_field(values->FloatingPointMode, 16, 16) |
213 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
214 __gen_field(values->AccessesUAV, 12, 12) |
215 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
216 0;
217
218 uint32_t dw4 =
219 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
220 __gen_field(values->PerThreadScratchSpace, 0, 3) |
221 0;
222
223 uint64_t qw4 =
224 __gen_combine_address(data, &dw[4], values->ScratchSpaceBasePointer, dw4);
225
226 dw[4] = qw4;
227 dw[5] = qw4 >> 32;
228
229 dw[6] =
230 __gen_field(values->DispatchGRFStartRegisterForURBData, 20, 24) |
231 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
232 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
233 0;
234
235 dw[7] =
236 __gen_field(values->MaximumNumberofThreads, 23, 31) |
237 __gen_field(values->StatisticsEnable, 10, 10) |
238 __gen_field(values->SIMD8DispatchEnable, 2, 2) |
239 __gen_field(values->VertexCacheDisable, 1, 1) |
240 __gen_field(values->FunctionEnable, 0, 0) |
241 0;
242
243 dw[8] =
244 __gen_field(values->VertexURBEntryOutputReadOffset, 21, 26) |
245 __gen_field(values->VertexURBEntryOutputLength, 16, 20) |
246 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 8, 15) |
247 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
248 0;
249
250 }
251
252 #define GEN8_GPGPU_CSR_BASE_ADDRESS_length 0x00000003
253 #define GEN8_GPGPU_CSR_BASE_ADDRESS_length_bias 0x00000002
254 #define GEN8_GPGPU_CSR_BASE_ADDRESS_header \
255 .CommandType = 3, \
256 .CommandSubType = 0, \
257 ._3DCommandOpcode = 1, \
258 ._3DCommandSubOpcode = 4, \
259 .DwordLength = 1
260
261 struct GEN8_GPGPU_CSR_BASE_ADDRESS {
262 uint32_t CommandType;
263 uint32_t CommandSubType;
264 uint32_t _3DCommandOpcode;
265 uint32_t _3DCommandSubOpcode;
266 uint32_t DwordLength;
267 __gen_address_type GPGPUCSRBaseAddressHigh;
268 };
269
270 static inline void
271 GEN8_GPGPU_CSR_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
272 const struct GEN8_GPGPU_CSR_BASE_ADDRESS * restrict values)
273 {
274 uint32_t *dw = (uint32_t * restrict) dst;
275
276 dw[0] =
277 __gen_field(values->CommandType, 29, 31) |
278 __gen_field(values->CommandSubType, 27, 28) |
279 __gen_field(values->_3DCommandOpcode, 24, 26) |
280 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
281 __gen_field(values->DwordLength, 0, 7) |
282 0;
283
284 uint32_t dw1 =
285 0;
286
287 uint64_t qw1 =
288 __gen_combine_address(data, &dw[1], values->GPGPUCSRBaseAddressHigh, dw1);
289
290 dw[1] = qw1;
291 dw[2] = qw1 >> 32;
292
293 }
294
295 #define GEN8_MI_ATOMIC_length 0x00000003
296 #define GEN8_MI_ATOMIC_length_bias 0x00000002
297 #define GEN8_MI_ATOMIC_header \
298 .CommandType = 0, \
299 .MICommandOpcode = 47
300
301 struct GEN8_MI_ATOMIC {
302 uint32_t CommandType;
303 uint32_t MICommandOpcode;
304 #define PerProcessGraphicsAddress 0
305 #define GlobalGraphicsAddress 1
306 uint32_t MemoryType;
307 uint32_t PostSyncOperation;
308 #define DWORD 0
309 #define QWORD 1
310 #define OCTWORD 2
311 #define RESERVED 3
312 uint32_t DataSize;
313 uint32_t InlineData;
314 uint32_t CSSTALL;
315 uint32_t ReturnDataControl;
316 uint32_t ATOMICOPCODE;
317 uint32_t DwordLength;
318 __gen_address_type MemoryAddress;
319 uint32_t MemoryAddressHigh;
320 uint32_t Operand1DataDword0;
321 uint32_t Operand2DataDword0;
322 uint32_t Operand1DataDword1;
323 uint32_t Operand2DataDword1;
324 uint32_t Operand1DataDword2;
325 uint32_t Operand2DataDword2;
326 uint32_t Operand1DataDword3;
327 uint32_t Operand2DataDword3;
328 };
329
330 static inline void
331 GEN8_MI_ATOMIC_pack(__gen_user_data *data, void * restrict dst,
332 const struct GEN8_MI_ATOMIC * restrict values)
333 {
334 uint32_t *dw = (uint32_t * restrict) dst;
335
336 dw[0] =
337 __gen_field(values->CommandType, 29, 31) |
338 __gen_field(values->MICommandOpcode, 23, 28) |
339 __gen_field(values->MemoryType, 22, 22) |
340 __gen_field(values->PostSyncOperation, 21, 21) |
341 __gen_field(values->DataSize, 19, 20) |
342 __gen_field(values->InlineData, 18, 18) |
343 __gen_field(values->CSSTALL, 17, 17) |
344 __gen_field(values->ReturnDataControl, 16, 16) |
345 __gen_field(values->ATOMICOPCODE, 8, 15) |
346 __gen_field(values->DwordLength, 0, 7) |
347 0;
348
349 uint32_t dw1 =
350 0;
351
352 dw[1] =
353 __gen_combine_address(data, &dw[1], values->MemoryAddress, dw1);
354
355 dw[2] =
356 __gen_field(values->MemoryAddressHigh, 0, 15) |
357 0;
358
359 dw[3] =
360 __gen_field(values->Operand1DataDword0, 0, 31) |
361 0;
362
363 dw[4] =
364 __gen_field(values->Operand2DataDword0, 0, 31) |
365 0;
366
367 dw[5] =
368 __gen_field(values->Operand1DataDword1, 0, 31) |
369 0;
370
371 dw[6] =
372 __gen_field(values->Operand2DataDword1, 0, 31) |
373 0;
374
375 dw[7] =
376 __gen_field(values->Operand1DataDword2, 0, 31) |
377 0;
378
379 dw[8] =
380 __gen_field(values->Operand2DataDword2, 0, 31) |
381 0;
382
383 dw[9] =
384 __gen_field(values->Operand1DataDword3, 0, 31) |
385 0;
386
387 dw[10] =
388 __gen_field(values->Operand2DataDword3, 0, 31) |
389 0;
390
391 }
392
393 #define GEN8_MI_LOAD_REGISTER_REG_length 0x00000003
394 #define GEN8_MI_LOAD_REGISTER_REG_length_bias 0x00000002
395 #define GEN8_MI_LOAD_REGISTER_REG_header \
396 .CommandType = 0, \
397 .MICommandOpcode = 42, \
398 .DwordLength = 1
399
400 struct GEN8_MI_LOAD_REGISTER_REG {
401 uint32_t CommandType;
402 uint32_t MICommandOpcode;
403 uint32_t DwordLength;
404 uint32_t SourceRegisterAddress;
405 uint32_t DestinationRegisterAddress;
406 };
407
408 static inline void
409 GEN8_MI_LOAD_REGISTER_REG_pack(__gen_user_data *data, void * restrict dst,
410 const struct GEN8_MI_LOAD_REGISTER_REG * restrict values)
411 {
412 uint32_t *dw = (uint32_t * restrict) dst;
413
414 dw[0] =
415 __gen_field(values->CommandType, 29, 31) |
416 __gen_field(values->MICommandOpcode, 23, 28) |
417 __gen_field(values->DwordLength, 0, 7) |
418 0;
419
420 dw[1] =
421 __gen_offset(values->SourceRegisterAddress, 2, 22) |
422 0;
423
424 dw[2] =
425 __gen_offset(values->DestinationRegisterAddress, 2, 22) |
426 0;
427
428 }
429
430 #define GEN8_MI_SEMAPHORE_SIGNAL_length 0x00000002
431 #define GEN8_MI_SEMAPHORE_SIGNAL_length_bias 0x00000002
432 #define GEN8_MI_SEMAPHORE_SIGNAL_header \
433 .CommandType = 0, \
434 .MICommandOpcode = 27, \
435 .DwordLength = 0
436
437 struct GEN8_MI_SEMAPHORE_SIGNAL {
438 uint32_t CommandType;
439 uint32_t MICommandOpcode;
440 uint32_t PostSyncOperation;
441 #define RCS 0
442 #define VCS0 1
443 #define BCS 2
444 #define VECS 3
445 #define VCS1 4
446 uint32_t TargetEngineSelect;
447 uint32_t DwordLength;
448 uint32_t TargetContextID;
449 };
450
451 static inline void
452 GEN8_MI_SEMAPHORE_SIGNAL_pack(__gen_user_data *data, void * restrict dst,
453 const struct GEN8_MI_SEMAPHORE_SIGNAL * restrict values)
454 {
455 uint32_t *dw = (uint32_t * restrict) dst;
456
457 dw[0] =
458 __gen_field(values->CommandType, 29, 31) |
459 __gen_field(values->MICommandOpcode, 23, 28) |
460 __gen_field(values->PostSyncOperation, 21, 21) |
461 __gen_field(values->TargetEngineSelect, 15, 17) |
462 __gen_field(values->DwordLength, 0, 7) |
463 0;
464
465 dw[1] =
466 __gen_field(values->TargetContextID, 0, 31) |
467 0;
468
469 }
470
471 #define GEN8_MI_SEMAPHORE_WAIT_length 0x00000004
472 #define GEN8_MI_SEMAPHORE_WAIT_length_bias 0x00000002
473 #define GEN8_MI_SEMAPHORE_WAIT_header \
474 .CommandType = 0, \
475 .MICommandOpcode = 28, \
476 .DwordLength = 2
477
478 struct GEN8_MI_SEMAPHORE_WAIT {
479 uint32_t CommandType;
480 uint32_t MICommandOpcode;
481 #define PerProcessGraphicsAddress 0
482 #define GlobalGraphicsAddress 1
483 uint32_t MemoryType;
484 #define PollingMode 1
485 #define SignalMode 0
486 uint32_t WaitMode;
487 #define SAD_GREATER_THAN_SDD 0
488 #define SAD_GREATER_THAN_OR_EQUAL_SDD 1
489 #define SAD_LESS_THAN_SDD 2
490 #define SAD_LESS_THAN_OR_EQUAL_SDD 3
491 #define SAD_EQUAL_SDD 4
492 #define SAD_NOT_EQUAL_SDD 5
493 uint32_t CompareOperation;
494 uint32_t DwordLength;
495 uint32_t SemaphoreDataDword;
496 __gen_address_type SemaphoreAddress;
497 };
498
499 static inline void
500 GEN8_MI_SEMAPHORE_WAIT_pack(__gen_user_data *data, void * restrict dst,
501 const struct GEN8_MI_SEMAPHORE_WAIT * restrict values)
502 {
503 uint32_t *dw = (uint32_t * restrict) dst;
504
505 dw[0] =
506 __gen_field(values->CommandType, 29, 31) |
507 __gen_field(values->MICommandOpcode, 23, 28) |
508 __gen_field(values->MemoryType, 22, 22) |
509 __gen_field(values->WaitMode, 15, 15) |
510 __gen_field(values->CompareOperation, 12, 14) |
511 __gen_field(values->DwordLength, 0, 7) |
512 0;
513
514 dw[1] =
515 __gen_field(values->SemaphoreDataDword, 0, 31) |
516 0;
517
518 uint32_t dw2 =
519 0;
520
521 uint64_t qw2 =
522 __gen_combine_address(data, &dw[2], values->SemaphoreAddress, dw2);
523
524 dw[2] = qw2;
525 dw[3] = qw2 >> 32;
526
527 }
528
529 #define GEN8_MI_STORE_REGISTER_MEM_length 0x00000004
530 #define GEN8_MI_STORE_REGISTER_MEM_length_bias 0x00000002
531 #define GEN8_MI_STORE_REGISTER_MEM_header \
532 .CommandType = 0, \
533 .MICommandOpcode = 36, \
534 .DwordLength = 2
535
536 struct GEN8_MI_STORE_REGISTER_MEM {
537 uint32_t CommandType;
538 uint32_t MICommandOpcode;
539 uint32_t UseGlobalGTT;
540 uint32_t PredicateEnable;
541 uint32_t DwordLength;
542 uint32_t RegisterAddress;
543 __gen_address_type MemoryAddress;
544 };
545
546 static inline void
547 GEN8_MI_STORE_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
548 const struct GEN8_MI_STORE_REGISTER_MEM * restrict values)
549 {
550 uint32_t *dw = (uint32_t * restrict) dst;
551
552 dw[0] =
553 __gen_field(values->CommandType, 29, 31) |
554 __gen_field(values->MICommandOpcode, 23, 28) |
555 __gen_field(values->UseGlobalGTT, 22, 22) |
556 __gen_field(values->PredicateEnable, 21, 21) |
557 __gen_field(values->DwordLength, 0, 7) |
558 0;
559
560 dw[1] =
561 __gen_offset(values->RegisterAddress, 2, 22) |
562 0;
563
564 uint32_t dw2 =
565 0;
566
567 uint64_t qw2 =
568 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
569
570 dw[2] = qw2;
571 dw[3] = qw2 >> 32;
572
573 }
574
575 #define GEN8_PIPELINE_SELECT_length 0x00000001
576 #define GEN8_PIPELINE_SELECT_length_bias 0x00000001
577 #define GEN8_PIPELINE_SELECT_header \
578 .CommandType = 3, \
579 .CommandSubType = 1, \
580 ._3DCommandOpcode = 1, \
581 ._3DCommandSubOpcode = 4
582
583 struct GEN8_PIPELINE_SELECT {
584 uint32_t CommandType;
585 uint32_t CommandSubType;
586 uint32_t _3DCommandOpcode;
587 uint32_t _3DCommandSubOpcode;
588 #define _3D 0
589 #define Media 1
590 #define GPGPU 2
591 uint32_t PipelineSelection;
592 };
593
594 static inline void
595 GEN8_PIPELINE_SELECT_pack(__gen_user_data *data, void * restrict dst,
596 const struct GEN8_PIPELINE_SELECT * restrict values)
597 {
598 uint32_t *dw = (uint32_t * restrict) dst;
599
600 dw[0] =
601 __gen_field(values->CommandType, 29, 31) |
602 __gen_field(values->CommandSubType, 27, 28) |
603 __gen_field(values->_3DCommandOpcode, 24, 26) |
604 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
605 __gen_field(values->PipelineSelection, 0, 1) |
606 0;
607
608 }
609
610 #define GEN8_STATE_BASE_ADDRESS_length 0x00000010
611 #define GEN8_STATE_BASE_ADDRESS_length_bias 0x00000002
612 #define GEN8_STATE_BASE_ADDRESS_header \
613 .CommandType = 3, \
614 .CommandSubType = 0, \
615 ._3DCommandOpcode = 1, \
616 ._3DCommandSubOpcode = 1, \
617 .DwordLength = 14
618
619 struct GEN8_MEMORY_OBJECT_CONTROL_STATE {
620 #define UCwithFenceifcoherentcycle 0
621 #define UCUncacheable 1
622 #define WT 2
623 #define WB 3
624 uint32_t MemoryTypeLLCeLLCCacheabilityControl;
625 #define eLLCOnlywheneDRAMispresentelsegetsallocatedinLLC 0
626 #define LLCOnly 1
627 #define LLCeLLCAllowed 2
628 #define L3DefertoPATforLLCeLLCselection 3
629 uint32_t TargetCache;
630 uint32_t AgeforQUADLRU;
631 };
632
633 static inline void
634 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(__gen_user_data *data, void * restrict dst,
635 const struct GEN8_MEMORY_OBJECT_CONTROL_STATE * restrict values)
636 {
637 uint32_t *dw = (uint32_t * restrict) dst;
638
639 dw[0] =
640 __gen_field(values->MemoryTypeLLCeLLCCacheabilityControl, 5, 6) |
641 __gen_field(values->TargetCache, 3, 4) |
642 __gen_field(values->AgeforQUADLRU, 0, 1) |
643 0;
644
645 }
646
647 struct GEN8_STATE_BASE_ADDRESS {
648 uint32_t CommandType;
649 uint32_t CommandSubType;
650 uint32_t _3DCommandOpcode;
651 uint32_t _3DCommandSubOpcode;
652 uint32_t DwordLength;
653 __gen_address_type GeneralStateBaseAddress;
654 struct GEN8_MEMORY_OBJECT_CONTROL_STATE GeneralStateMemoryObjectControlState;
655 uint32_t GeneralStateBaseAddressModifyEnable;
656 struct GEN8_MEMORY_OBJECT_CONTROL_STATE StatelessDataPortAccessMemoryObjectControlState;
657 __gen_address_type SurfaceStateBaseAddress;
658 struct GEN8_MEMORY_OBJECT_CONTROL_STATE SurfaceStateMemoryObjectControlState;
659 uint32_t SurfaceStateBaseAddressModifyEnable;
660 __gen_address_type DynamicStateBaseAddress;
661 struct GEN8_MEMORY_OBJECT_CONTROL_STATE DynamicStateMemoryObjectControlState;
662 uint32_t DynamicStateBaseAddressModifyEnable;
663 __gen_address_type IndirectObjectBaseAddress;
664 struct GEN8_MEMORY_OBJECT_CONTROL_STATE IndirectObjectMemoryObjectControlState;
665 uint32_t IndirectObjectBaseAddressModifyEnable;
666 __gen_address_type InstructionBaseAddress;
667 struct GEN8_MEMORY_OBJECT_CONTROL_STATE InstructionMemoryObjectControlState;
668 uint32_t InstructionBaseAddressModifyEnable;
669 uint32_t GeneralStateBufferSize;
670 uint32_t GeneralStateBufferSizeModifyEnable;
671 uint32_t DynamicStateBufferSize;
672 uint32_t DynamicStateBufferSizeModifyEnable;
673 uint32_t IndirectObjectBufferSize;
674 uint32_t IndirectObjectBufferSizeModifyEnable;
675 uint32_t InstructionBufferSize;
676 uint32_t InstructionBuffersizeModifyEnable;
677 };
678
679 static inline void
680 GEN8_STATE_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
681 const struct GEN8_STATE_BASE_ADDRESS * restrict values)
682 {
683 uint32_t *dw = (uint32_t * restrict) dst;
684
685 dw[0] =
686 __gen_field(values->CommandType, 29, 31) |
687 __gen_field(values->CommandSubType, 27, 28) |
688 __gen_field(values->_3DCommandOpcode, 24, 26) |
689 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
690 __gen_field(values->DwordLength, 0, 7) |
691 0;
692
693 uint32_t dw_GeneralStateMemoryObjectControlState;
694 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_GeneralStateMemoryObjectControlState, &values->GeneralStateMemoryObjectControlState);
695 uint32_t dw1 =
696 __gen_field(dw_GeneralStateMemoryObjectControlState, 4, 10) |
697 __gen_field(values->GeneralStateBaseAddressModifyEnable, 0, 0) |
698 0;
699
700 uint64_t qw1 =
701 __gen_combine_address(data, &dw[1], values->GeneralStateBaseAddress, dw1);
702
703 dw[1] = qw1;
704 dw[2] = qw1 >> 32;
705
706 uint32_t dw_StatelessDataPortAccessMemoryObjectControlState;
707 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StatelessDataPortAccessMemoryObjectControlState, &values->StatelessDataPortAccessMemoryObjectControlState);
708 dw[3] =
709 __gen_field(dw_StatelessDataPortAccessMemoryObjectControlState, 16, 22) |
710 0;
711
712 uint32_t dw_SurfaceStateMemoryObjectControlState;
713 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceStateMemoryObjectControlState, &values->SurfaceStateMemoryObjectControlState);
714 uint32_t dw4 =
715 __gen_field(dw_SurfaceStateMemoryObjectControlState, 4, 10) |
716 __gen_field(values->SurfaceStateBaseAddressModifyEnable, 0, 0) |
717 0;
718
719 uint64_t qw4 =
720 __gen_combine_address(data, &dw[4], values->SurfaceStateBaseAddress, dw4);
721
722 dw[4] = qw4;
723 dw[5] = qw4 >> 32;
724
725 uint32_t dw_DynamicStateMemoryObjectControlState;
726 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DynamicStateMemoryObjectControlState, &values->DynamicStateMemoryObjectControlState);
727 uint32_t dw6 =
728 __gen_field(dw_DynamicStateMemoryObjectControlState, 4, 10) |
729 __gen_field(values->DynamicStateBaseAddressModifyEnable, 0, 0) |
730 0;
731
732 uint64_t qw6 =
733 __gen_combine_address(data, &dw[6], values->DynamicStateBaseAddress, dw6);
734
735 dw[6] = qw6;
736 dw[7] = qw6 >> 32;
737
738 uint32_t dw_IndirectObjectMemoryObjectControlState;
739 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_IndirectObjectMemoryObjectControlState, &values->IndirectObjectMemoryObjectControlState);
740 uint32_t dw8 =
741 __gen_field(dw_IndirectObjectMemoryObjectControlState, 4, 10) |
742 __gen_field(values->IndirectObjectBaseAddressModifyEnable, 0, 0) |
743 0;
744
745 uint64_t qw8 =
746 __gen_combine_address(data, &dw[8], values->IndirectObjectBaseAddress, dw8);
747
748 dw[8] = qw8;
749 dw[9] = qw8 >> 32;
750
751 uint32_t dw_InstructionMemoryObjectControlState;
752 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_InstructionMemoryObjectControlState, &values->InstructionMemoryObjectControlState);
753 uint32_t dw10 =
754 __gen_field(dw_InstructionMemoryObjectControlState, 4, 10) |
755 __gen_field(values->InstructionBaseAddressModifyEnable, 0, 0) |
756 0;
757
758 uint64_t qw10 =
759 __gen_combine_address(data, &dw[10], values->InstructionBaseAddress, dw10);
760
761 dw[10] = qw10;
762 dw[11] = qw10 >> 32;
763
764 dw[12] =
765 __gen_field(values->GeneralStateBufferSize, 12, 31) |
766 __gen_field(values->GeneralStateBufferSizeModifyEnable, 0, 0) |
767 0;
768
769 dw[13] =
770 __gen_field(values->DynamicStateBufferSize, 12, 31) |
771 __gen_field(values->DynamicStateBufferSizeModifyEnable, 0, 0) |
772 0;
773
774 dw[14] =
775 __gen_field(values->IndirectObjectBufferSize, 12, 31) |
776 __gen_field(values->IndirectObjectBufferSizeModifyEnable, 0, 0) |
777 0;
778
779 dw[15] =
780 __gen_field(values->InstructionBufferSize, 12, 31) |
781 __gen_field(values->InstructionBuffersizeModifyEnable, 0, 0) |
782 0;
783
784 }
785
786 #define GEN8_STATE_PREFETCH_length 0x00000002
787 #define GEN8_STATE_PREFETCH_length_bias 0x00000002
788 #define GEN8_STATE_PREFETCH_header \
789 .CommandType = 3, \
790 .CommandSubType = 0, \
791 ._3DCommandOpcode = 0, \
792 ._3DCommandSubOpcode = 3, \
793 .DwordLength = 0
794
795 struct GEN8_STATE_PREFETCH {
796 uint32_t CommandType;
797 uint32_t CommandSubType;
798 uint32_t _3DCommandOpcode;
799 uint32_t _3DCommandSubOpcode;
800 uint32_t DwordLength;
801 __gen_address_type PrefetchPointer;
802 uint32_t PrefetchCount;
803 };
804
805 static inline void
806 GEN8_STATE_PREFETCH_pack(__gen_user_data *data, void * restrict dst,
807 const struct GEN8_STATE_PREFETCH * restrict values)
808 {
809 uint32_t *dw = (uint32_t * restrict) dst;
810
811 dw[0] =
812 __gen_field(values->CommandType, 29, 31) |
813 __gen_field(values->CommandSubType, 27, 28) |
814 __gen_field(values->_3DCommandOpcode, 24, 26) |
815 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
816 __gen_field(values->DwordLength, 0, 7) |
817 0;
818
819 uint32_t dw1 =
820 __gen_field(values->PrefetchCount, 0, 2) |
821 0;
822
823 dw[1] =
824 __gen_combine_address(data, &dw[1], values->PrefetchPointer, dw1);
825
826 }
827
828 #define GEN8_STATE_SIP_length 0x00000003
829 #define GEN8_STATE_SIP_length_bias 0x00000002
830 #define GEN8_STATE_SIP_header \
831 .CommandType = 3, \
832 .CommandSubType = 0, \
833 ._3DCommandOpcode = 1, \
834 ._3DCommandSubOpcode = 2, \
835 .DwordLength = 1
836
837 struct GEN8_STATE_SIP {
838 uint32_t CommandType;
839 uint32_t CommandSubType;
840 uint32_t _3DCommandOpcode;
841 uint32_t _3DCommandSubOpcode;
842 uint32_t DwordLength;
843 uint64_t SystemInstructionPointer;
844 };
845
846 static inline void
847 GEN8_STATE_SIP_pack(__gen_user_data *data, void * restrict dst,
848 const struct GEN8_STATE_SIP * restrict values)
849 {
850 uint32_t *dw = (uint32_t * restrict) dst;
851
852 dw[0] =
853 __gen_field(values->CommandType, 29, 31) |
854 __gen_field(values->CommandSubType, 27, 28) |
855 __gen_field(values->_3DCommandOpcode, 24, 26) |
856 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
857 __gen_field(values->DwordLength, 0, 7) |
858 0;
859
860 uint64_t qw1 =
861 __gen_offset(values->SystemInstructionPointer, 4, 63) |
862 0;
863
864 dw[1] = qw1;
865 dw[2] = qw1 >> 32;
866
867 }
868
869 #define GEN8_SWTESS_BASE_ADDRESS_length 0x00000002
870 #define GEN8_SWTESS_BASE_ADDRESS_length_bias 0x00000002
871 #define GEN8_SWTESS_BASE_ADDRESS_header \
872 .CommandType = 3, \
873 .CommandSubType = 0, \
874 ._3DCommandOpcode = 1, \
875 ._3DCommandSubOpcode = 3, \
876 .DwordLength = 0
877
878 struct GEN8_SWTESS_BASE_ADDRESS {
879 uint32_t CommandType;
880 uint32_t CommandSubType;
881 uint32_t _3DCommandOpcode;
882 uint32_t _3DCommandSubOpcode;
883 uint32_t DwordLength;
884 __gen_address_type SWTessellationBaseAddress;
885 struct GEN8_MEMORY_OBJECT_CONTROL_STATE SWTessellationMemoryObjectControlState;
886 __gen_address_type SWTessellationBaseAddressHigh;
887 };
888
889 static inline void
890 GEN8_SWTESS_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
891 const struct GEN8_SWTESS_BASE_ADDRESS * restrict values)
892 {
893 uint32_t *dw = (uint32_t * restrict) dst;
894
895 dw[0] =
896 __gen_field(values->CommandType, 29, 31) |
897 __gen_field(values->CommandSubType, 27, 28) |
898 __gen_field(values->_3DCommandOpcode, 24, 26) |
899 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
900 __gen_field(values->DwordLength, 0, 7) |
901 0;
902
903 uint32_t dw_SWTessellationMemoryObjectControlState;
904 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SWTessellationMemoryObjectControlState, &values->SWTessellationMemoryObjectControlState);
905 uint32_t dw1 =
906 __gen_field(dw_SWTessellationMemoryObjectControlState, 8, 11) |
907 0;
908
909 dw[1] =
910 __gen_combine_address(data, &dw[1], values->SWTessellationBaseAddress, dw1);
911
912 uint32_t dw2 =
913 0;
914
915 dw[2] =
916 __gen_combine_address(data, &dw[2], values->SWTessellationBaseAddressHigh, dw2);
917
918 }
919
920 #define GEN8_3DPRIMITIVE_length 0x00000007
921 #define GEN8_3DPRIMITIVE_length_bias 0x00000002
922 #define GEN8_3DPRIMITIVE_header \
923 .CommandType = 3, \
924 .CommandSubType = 3, \
925 ._3DCommandOpcode = 3, \
926 ._3DCommandSubOpcode = 0, \
927 .DwordLength = 5
928
929 struct GEN8_3DPRIMITIVE {
930 uint32_t CommandType;
931 uint32_t CommandSubType;
932 uint32_t _3DCommandOpcode;
933 uint32_t _3DCommandSubOpcode;
934 uint32_t IndirectParameterEnable;
935 uint32_t UAVCoherencyRequired;
936 uint32_t PredicateEnable;
937 uint32_t DwordLength;
938 uint32_t EndOffsetEnable;
939 #define SEQUENTIAL 0
940 #define RANDOM 1
941 uint32_t VertexAccessType;
942 uint32_t PrimitiveTopologyType;
943 uint32_t VertexCountPerInstance;
944 uint32_t StartVertexLocation;
945 uint32_t InstanceCount;
946 uint32_t StartInstanceLocation;
947 uint32_t BaseVertexLocation;
948 };
949
950 static inline void
951 GEN8_3DPRIMITIVE_pack(__gen_user_data *data, void * restrict dst,
952 const struct GEN8_3DPRIMITIVE * restrict values)
953 {
954 uint32_t *dw = (uint32_t * restrict) dst;
955
956 dw[0] =
957 __gen_field(values->CommandType, 29, 31) |
958 __gen_field(values->CommandSubType, 27, 28) |
959 __gen_field(values->_3DCommandOpcode, 24, 26) |
960 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
961 __gen_field(values->IndirectParameterEnable, 10, 10) |
962 __gen_field(values->UAVCoherencyRequired, 9, 9) |
963 __gen_field(values->PredicateEnable, 8, 8) |
964 __gen_field(values->DwordLength, 0, 7) |
965 0;
966
967 dw[1] =
968 __gen_field(values->EndOffsetEnable, 9, 9) |
969 __gen_field(values->VertexAccessType, 8, 8) |
970 __gen_field(values->PrimitiveTopologyType, 0, 5) |
971 0;
972
973 dw[2] =
974 __gen_field(values->VertexCountPerInstance, 0, 31) |
975 0;
976
977 dw[3] =
978 __gen_field(values->StartVertexLocation, 0, 31) |
979 0;
980
981 dw[4] =
982 __gen_field(values->InstanceCount, 0, 31) |
983 0;
984
985 dw[5] =
986 __gen_field(values->StartInstanceLocation, 0, 31) |
987 0;
988
989 dw[6] =
990 __gen_field(values->BaseVertexLocation, 0, 31) |
991 0;
992
993 }
994
995 #define GEN8_3DSTATE_AA_LINE_PARAMETERS_length 0x00000003
996 #define GEN8_3DSTATE_AA_LINE_PARAMETERS_length_bias 0x00000002
997 #define GEN8_3DSTATE_AA_LINE_PARAMETERS_header \
998 .CommandType = 3, \
999 .CommandSubType = 3, \
1000 ._3DCommandOpcode = 1, \
1001 ._3DCommandSubOpcode = 10, \
1002 .DwordLength = 1
1003
1004 struct GEN8_3DSTATE_AA_LINE_PARAMETERS {
1005 uint32_t CommandType;
1006 uint32_t CommandSubType;
1007 uint32_t _3DCommandOpcode;
1008 uint32_t _3DCommandSubOpcode;
1009 uint32_t DwordLength;
1010 float AAPointCoverageBias;
1011 float AACoverageBias;
1012 float AAPointCoverageSlope;
1013 float AACoverageSlope;
1014 float AAPointCoverageEndCapBias;
1015 float AACoverageEndCapBias;
1016 float AAPointCoverageEndCapSlope;
1017 float AACoverageEndCapSlope;
1018 };
1019
1020 static inline void
1021 GEN8_3DSTATE_AA_LINE_PARAMETERS_pack(__gen_user_data *data, void * restrict dst,
1022 const struct GEN8_3DSTATE_AA_LINE_PARAMETERS * restrict values)
1023 {
1024 uint32_t *dw = (uint32_t * restrict) dst;
1025
1026 dw[0] =
1027 __gen_field(values->CommandType, 29, 31) |
1028 __gen_field(values->CommandSubType, 27, 28) |
1029 __gen_field(values->_3DCommandOpcode, 24, 26) |
1030 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1031 __gen_field(values->DwordLength, 0, 7) |
1032 0;
1033
1034 dw[1] =
1035 __gen_field(values->AAPointCoverageBias * (1 << 8), 24, 31) |
1036 __gen_field(values->AACoverageBias * (1 << 8), 16, 23) |
1037 __gen_field(values->AAPointCoverageSlope * (1 << 8), 8, 15) |
1038 __gen_field(values->AACoverageSlope * (1 << 8), 0, 7) |
1039 0;
1040
1041 dw[2] =
1042 __gen_field(values->AAPointCoverageEndCapBias * (1 << 8), 24, 31) |
1043 __gen_field(values->AACoverageEndCapBias * (1 << 8), 16, 23) |
1044 __gen_field(values->AAPointCoverageEndCapSlope * (1 << 8), 8, 15) |
1045 __gen_field(values->AACoverageEndCapSlope * (1 << 8), 0, 7) |
1046 0;
1047
1048 }
1049
1050 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_length_bias 0x00000002
1051 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_header\
1052 .CommandType = 3, \
1053 .CommandSubType = 3, \
1054 ._3DCommandOpcode = 0, \
1055 ._3DCommandSubOpcode = 70
1056
1057 struct GEN8_BINDING_TABLE_EDIT_ENTRY {
1058 uint32_t BindingTableIndex;
1059 uint32_t SurfaceStatePointer;
1060 };
1061
1062 static inline void
1063 GEN8_BINDING_TABLE_EDIT_ENTRY_pack(__gen_user_data *data, void * restrict dst,
1064 const struct GEN8_BINDING_TABLE_EDIT_ENTRY * restrict values)
1065 {
1066 uint32_t *dw = (uint32_t * restrict) dst;
1067
1068 dw[0] =
1069 __gen_field(values->BindingTableIndex, 16, 23) |
1070 __gen_offset(values->SurfaceStatePointer, 0, 15) |
1071 0;
1072
1073 }
1074
1075 struct GEN8_3DSTATE_BINDING_TABLE_EDIT_DS {
1076 uint32_t CommandType;
1077 uint32_t CommandSubType;
1078 uint32_t _3DCommandOpcode;
1079 uint32_t _3DCommandSubOpcode;
1080 uint32_t DwordLength;
1081 uint32_t BindingTableBlockClear;
1082 #define AllCores 3
1083 #define Core1 2
1084 #define Core0 1
1085 uint32_t BindingTableEditTarget;
1086 /* variable length fields follow */
1087 };
1088
1089 static inline void
1090 GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_pack(__gen_user_data *data, void * restrict dst,
1091 const struct GEN8_3DSTATE_BINDING_TABLE_EDIT_DS * restrict values)
1092 {
1093 uint32_t *dw = (uint32_t * restrict) dst;
1094
1095 dw[0] =
1096 __gen_field(values->CommandType, 29, 31) |
1097 __gen_field(values->CommandSubType, 27, 28) |
1098 __gen_field(values->_3DCommandOpcode, 24, 26) |
1099 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1100 __gen_field(values->DwordLength, 0, 8) |
1101 0;
1102
1103 dw[1] =
1104 __gen_field(values->BindingTableBlockClear, 16, 31) |
1105 __gen_field(values->BindingTableEditTarget, 0, 1) |
1106 0;
1107
1108 /* variable length fields follow */
1109 }
1110
1111 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_length_bias 0x00000002
1112 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_header\
1113 .CommandType = 3, \
1114 .CommandSubType = 3, \
1115 ._3DCommandOpcode = 0, \
1116 ._3DCommandSubOpcode = 68
1117
1118 struct GEN8_3DSTATE_BINDING_TABLE_EDIT_GS {
1119 uint32_t CommandType;
1120 uint32_t CommandSubType;
1121 uint32_t _3DCommandOpcode;
1122 uint32_t _3DCommandSubOpcode;
1123 uint32_t DwordLength;
1124 uint32_t BindingTableBlockClear;
1125 #define AllCores 3
1126 #define Core1 2
1127 #define Core0 1
1128 uint32_t BindingTableEditTarget;
1129 /* variable length fields follow */
1130 };
1131
1132 static inline void
1133 GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_pack(__gen_user_data *data, void * restrict dst,
1134 const struct GEN8_3DSTATE_BINDING_TABLE_EDIT_GS * restrict values)
1135 {
1136 uint32_t *dw = (uint32_t * restrict) dst;
1137
1138 dw[0] =
1139 __gen_field(values->CommandType, 29, 31) |
1140 __gen_field(values->CommandSubType, 27, 28) |
1141 __gen_field(values->_3DCommandOpcode, 24, 26) |
1142 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1143 __gen_field(values->DwordLength, 0, 8) |
1144 0;
1145
1146 dw[1] =
1147 __gen_field(values->BindingTableBlockClear, 16, 31) |
1148 __gen_field(values->BindingTableEditTarget, 0, 1) |
1149 0;
1150
1151 /* variable length fields follow */
1152 }
1153
1154 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_length_bias 0x00000002
1155 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_header\
1156 .CommandType = 3, \
1157 .CommandSubType = 3, \
1158 ._3DCommandOpcode = 0, \
1159 ._3DCommandSubOpcode = 69
1160
1161 struct GEN8_3DSTATE_BINDING_TABLE_EDIT_HS {
1162 uint32_t CommandType;
1163 uint32_t CommandSubType;
1164 uint32_t _3DCommandOpcode;
1165 uint32_t _3DCommandSubOpcode;
1166 uint32_t DwordLength;
1167 uint32_t BindingTableBlockClear;
1168 #define AllCores 3
1169 #define Core1 2
1170 #define Core0 1
1171 uint32_t BindingTableEditTarget;
1172 /* variable length fields follow */
1173 };
1174
1175 static inline void
1176 GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_pack(__gen_user_data *data, void * restrict dst,
1177 const struct GEN8_3DSTATE_BINDING_TABLE_EDIT_HS * restrict values)
1178 {
1179 uint32_t *dw = (uint32_t * restrict) dst;
1180
1181 dw[0] =
1182 __gen_field(values->CommandType, 29, 31) |
1183 __gen_field(values->CommandSubType, 27, 28) |
1184 __gen_field(values->_3DCommandOpcode, 24, 26) |
1185 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1186 __gen_field(values->DwordLength, 0, 8) |
1187 0;
1188
1189 dw[1] =
1190 __gen_field(values->BindingTableBlockClear, 16, 31) |
1191 __gen_field(values->BindingTableEditTarget, 0, 1) |
1192 0;
1193
1194 /* variable length fields follow */
1195 }
1196
1197 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_length_bias 0x00000002
1198 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_header\
1199 .CommandType = 3, \
1200 .CommandSubType = 3, \
1201 ._3DCommandOpcode = 0, \
1202 ._3DCommandSubOpcode = 71
1203
1204 struct GEN8_3DSTATE_BINDING_TABLE_EDIT_PS {
1205 uint32_t CommandType;
1206 uint32_t CommandSubType;
1207 uint32_t _3DCommandOpcode;
1208 uint32_t _3DCommandSubOpcode;
1209 uint32_t DwordLength;
1210 uint32_t BindingTableBlockClear;
1211 #define AllCores 3
1212 #define Core1 2
1213 #define Core0 1
1214 uint32_t BindingTableEditTarget;
1215 /* variable length fields follow */
1216 };
1217
1218 static inline void
1219 GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_pack(__gen_user_data *data, void * restrict dst,
1220 const struct GEN8_3DSTATE_BINDING_TABLE_EDIT_PS * restrict values)
1221 {
1222 uint32_t *dw = (uint32_t * restrict) dst;
1223
1224 dw[0] =
1225 __gen_field(values->CommandType, 29, 31) |
1226 __gen_field(values->CommandSubType, 27, 28) |
1227 __gen_field(values->_3DCommandOpcode, 24, 26) |
1228 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1229 __gen_field(values->DwordLength, 0, 8) |
1230 0;
1231
1232 dw[1] =
1233 __gen_field(values->BindingTableBlockClear, 16, 31) |
1234 __gen_field(values->BindingTableEditTarget, 0, 1) |
1235 0;
1236
1237 /* variable length fields follow */
1238 }
1239
1240 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_length_bias 0x00000002
1241 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_header\
1242 .CommandType = 3, \
1243 .CommandSubType = 3, \
1244 ._3DCommandOpcode = 0, \
1245 ._3DCommandSubOpcode = 67
1246
1247 struct GEN8_3DSTATE_BINDING_TABLE_EDIT_VS {
1248 uint32_t CommandType;
1249 uint32_t CommandSubType;
1250 uint32_t _3DCommandOpcode;
1251 uint32_t _3DCommandSubOpcode;
1252 uint32_t DwordLength;
1253 uint32_t BindingTableBlockClear;
1254 #define AllCores 3
1255 #define Core1 2
1256 #define Core0 1
1257 uint32_t BindingTableEditTarget;
1258 /* variable length fields follow */
1259 };
1260
1261 static inline void
1262 GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_pack(__gen_user_data *data, void * restrict dst,
1263 const struct GEN8_3DSTATE_BINDING_TABLE_EDIT_VS * restrict values)
1264 {
1265 uint32_t *dw = (uint32_t * restrict) dst;
1266
1267 dw[0] =
1268 __gen_field(values->CommandType, 29, 31) |
1269 __gen_field(values->CommandSubType, 27, 28) |
1270 __gen_field(values->_3DCommandOpcode, 24, 26) |
1271 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1272 __gen_field(values->DwordLength, 0, 8) |
1273 0;
1274
1275 dw[1] =
1276 __gen_field(values->BindingTableBlockClear, 16, 31) |
1277 __gen_field(values->BindingTableEditTarget, 0, 1) |
1278 0;
1279
1280 /* variable length fields follow */
1281 }
1282
1283 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_length 0x00000002
1284 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_length_bias 0x00000002
1285 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_header\
1286 .CommandType = 3, \
1287 .CommandSubType = 3, \
1288 ._3DCommandOpcode = 0, \
1289 ._3DCommandSubOpcode = 40, \
1290 .DwordLength = 0
1291
1292 struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS {
1293 uint32_t CommandType;
1294 uint32_t CommandSubType;
1295 uint32_t _3DCommandOpcode;
1296 uint32_t _3DCommandSubOpcode;
1297 uint32_t DwordLength;
1298 uint32_t PointertoDSBindingTable;
1299 };
1300
1301 static inline void
1302 GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
1303 const struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS * restrict values)
1304 {
1305 uint32_t *dw = (uint32_t * restrict) dst;
1306
1307 dw[0] =
1308 __gen_field(values->CommandType, 29, 31) |
1309 __gen_field(values->CommandSubType, 27, 28) |
1310 __gen_field(values->_3DCommandOpcode, 24, 26) |
1311 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1312 __gen_field(values->DwordLength, 0, 7) |
1313 0;
1314
1315 dw[1] =
1316 __gen_offset(values->PointertoDSBindingTable, 5, 15) |
1317 0;
1318
1319 }
1320
1321 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_length 0x00000002
1322 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_length_bias 0x00000002
1323 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_header\
1324 .CommandType = 3, \
1325 .CommandSubType = 3, \
1326 ._3DCommandOpcode = 0, \
1327 ._3DCommandSubOpcode = 41, \
1328 .DwordLength = 0
1329
1330 struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS {
1331 uint32_t CommandType;
1332 uint32_t CommandSubType;
1333 uint32_t _3DCommandOpcode;
1334 uint32_t _3DCommandSubOpcode;
1335 uint32_t DwordLength;
1336 uint32_t PointertoGSBindingTable;
1337 };
1338
1339 static inline void
1340 GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
1341 const struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS * restrict values)
1342 {
1343 uint32_t *dw = (uint32_t * restrict) dst;
1344
1345 dw[0] =
1346 __gen_field(values->CommandType, 29, 31) |
1347 __gen_field(values->CommandSubType, 27, 28) |
1348 __gen_field(values->_3DCommandOpcode, 24, 26) |
1349 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1350 __gen_field(values->DwordLength, 0, 7) |
1351 0;
1352
1353 dw[1] =
1354 __gen_offset(values->PointertoGSBindingTable, 5, 15) |
1355 0;
1356
1357 }
1358
1359 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_length 0x00000002
1360 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_length_bias 0x00000002
1361 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_header\
1362 .CommandType = 3, \
1363 .CommandSubType = 3, \
1364 ._3DCommandOpcode = 0, \
1365 ._3DCommandSubOpcode = 39, \
1366 .DwordLength = 0
1367
1368 struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS {
1369 uint32_t CommandType;
1370 uint32_t CommandSubType;
1371 uint32_t _3DCommandOpcode;
1372 uint32_t _3DCommandSubOpcode;
1373 uint32_t DwordLength;
1374 uint32_t PointertoHSBindingTable;
1375 };
1376
1377 static inline void
1378 GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
1379 const struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS * restrict values)
1380 {
1381 uint32_t *dw = (uint32_t * restrict) dst;
1382
1383 dw[0] =
1384 __gen_field(values->CommandType, 29, 31) |
1385 __gen_field(values->CommandSubType, 27, 28) |
1386 __gen_field(values->_3DCommandOpcode, 24, 26) |
1387 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1388 __gen_field(values->DwordLength, 0, 7) |
1389 0;
1390
1391 dw[1] =
1392 __gen_offset(values->PointertoHSBindingTable, 5, 15) |
1393 0;
1394
1395 }
1396
1397 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_length 0x00000002
1398 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_length_bias 0x00000002
1399 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_header\
1400 .CommandType = 3, \
1401 .CommandSubType = 3, \
1402 ._3DCommandOpcode = 0, \
1403 ._3DCommandSubOpcode = 42, \
1404 .DwordLength = 0
1405
1406 struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS {
1407 uint32_t CommandType;
1408 uint32_t CommandSubType;
1409 uint32_t _3DCommandOpcode;
1410 uint32_t _3DCommandSubOpcode;
1411 uint32_t DwordLength;
1412 uint32_t PointertoPSBindingTable;
1413 };
1414
1415 static inline void
1416 GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
1417 const struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS * restrict values)
1418 {
1419 uint32_t *dw = (uint32_t * restrict) dst;
1420
1421 dw[0] =
1422 __gen_field(values->CommandType, 29, 31) |
1423 __gen_field(values->CommandSubType, 27, 28) |
1424 __gen_field(values->_3DCommandOpcode, 24, 26) |
1425 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1426 __gen_field(values->DwordLength, 0, 7) |
1427 0;
1428
1429 dw[1] =
1430 __gen_offset(values->PointertoPSBindingTable, 5, 15) |
1431 0;
1432
1433 }
1434
1435 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_length 0x00000002
1436 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_length_bias 0x00000002
1437 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_header\
1438 .CommandType = 3, \
1439 .CommandSubType = 3, \
1440 ._3DCommandOpcode = 0, \
1441 ._3DCommandSubOpcode = 38, \
1442 .DwordLength = 0
1443
1444 struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS {
1445 uint32_t CommandType;
1446 uint32_t CommandSubType;
1447 uint32_t _3DCommandOpcode;
1448 uint32_t _3DCommandSubOpcode;
1449 uint32_t DwordLength;
1450 uint32_t PointertoVSBindingTable;
1451 };
1452
1453 static inline void
1454 GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
1455 const struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS * restrict values)
1456 {
1457 uint32_t *dw = (uint32_t * restrict) dst;
1458
1459 dw[0] =
1460 __gen_field(values->CommandType, 29, 31) |
1461 __gen_field(values->CommandSubType, 27, 28) |
1462 __gen_field(values->_3DCommandOpcode, 24, 26) |
1463 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1464 __gen_field(values->DwordLength, 0, 7) |
1465 0;
1466
1467 dw[1] =
1468 __gen_offset(values->PointertoVSBindingTable, 5, 15) |
1469 0;
1470
1471 }
1472
1473 #define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_length 0x00000004
1474 #define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_length_bias 0x00000002
1475 #define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_header\
1476 .CommandType = 3, \
1477 .CommandSubType = 3, \
1478 ._3DCommandOpcode = 1, \
1479 ._3DCommandSubOpcode = 25, \
1480 .DwordLength = 2
1481
1482 struct GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC {
1483 uint32_t CommandType;
1484 uint32_t CommandSubType;
1485 uint32_t _3DCommandOpcode;
1486 uint32_t _3DCommandSubOpcode;
1487 uint32_t DwordLength;
1488 __gen_address_type BindingTablePoolBaseAddress;
1489 uint32_t BindingTablePoolEnable;
1490 struct GEN8_MEMORY_OBJECT_CONTROL_STATE SurfaceObjectControlState;
1491 #define NoValidData 0
1492 uint32_t BindingTablePoolBufferSize;
1493 };
1494
1495 static inline void
1496 GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_pack(__gen_user_data *data, void * restrict dst,
1497 const struct GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC * restrict values)
1498 {
1499 uint32_t *dw = (uint32_t * restrict) dst;
1500
1501 dw[0] =
1502 __gen_field(values->CommandType, 29, 31) |
1503 __gen_field(values->CommandSubType, 27, 28) |
1504 __gen_field(values->_3DCommandOpcode, 24, 26) |
1505 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1506 __gen_field(values->DwordLength, 0, 7) |
1507 0;
1508
1509 uint32_t dw_SurfaceObjectControlState;
1510 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceObjectControlState, &values->SurfaceObjectControlState);
1511 uint32_t dw1 =
1512 __gen_field(values->BindingTablePoolEnable, 11, 11) |
1513 __gen_field(dw_SurfaceObjectControlState, 0, 6) |
1514 0;
1515
1516 uint64_t qw1 =
1517 __gen_combine_address(data, &dw[1], values->BindingTablePoolBaseAddress, dw1);
1518
1519 dw[1] = qw1;
1520 dw[2] = qw1 >> 32;
1521
1522 dw[3] =
1523 __gen_field(values->BindingTablePoolBufferSize, 12, 31) |
1524 0;
1525
1526 }
1527
1528 #define GEN8_3DSTATE_BLEND_STATE_POINTERS_length 0x00000002
1529 #define GEN8_3DSTATE_BLEND_STATE_POINTERS_length_bias 0x00000002
1530 #define GEN8_3DSTATE_BLEND_STATE_POINTERS_header\
1531 .CommandType = 3, \
1532 .CommandSubType = 3, \
1533 ._3DCommandOpcode = 0, \
1534 ._3DCommandSubOpcode = 36, \
1535 .DwordLength = 0
1536
1537 struct GEN8_3DSTATE_BLEND_STATE_POINTERS {
1538 uint32_t CommandType;
1539 uint32_t CommandSubType;
1540 uint32_t _3DCommandOpcode;
1541 uint32_t _3DCommandSubOpcode;
1542 uint32_t DwordLength;
1543 uint32_t BlendStatePointer;
1544 uint32_t BlendStatePointerValid;
1545 };
1546
1547 static inline void
1548 GEN8_3DSTATE_BLEND_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
1549 const struct GEN8_3DSTATE_BLEND_STATE_POINTERS * restrict values)
1550 {
1551 uint32_t *dw = (uint32_t * restrict) dst;
1552
1553 dw[0] =
1554 __gen_field(values->CommandType, 29, 31) |
1555 __gen_field(values->CommandSubType, 27, 28) |
1556 __gen_field(values->_3DCommandOpcode, 24, 26) |
1557 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1558 __gen_field(values->DwordLength, 0, 7) |
1559 0;
1560
1561 dw[1] =
1562 __gen_offset(values->BlendStatePointer, 6, 31) |
1563 __gen_field(values->BlendStatePointerValid, 0, 0) |
1564 0;
1565
1566 }
1567
1568 #define GEN8_3DSTATE_CC_STATE_POINTERS_length 0x00000002
1569 #define GEN8_3DSTATE_CC_STATE_POINTERS_length_bias 0x00000002
1570 #define GEN8_3DSTATE_CC_STATE_POINTERS_header \
1571 .CommandType = 3, \
1572 .CommandSubType = 3, \
1573 ._3DCommandOpcode = 0, \
1574 ._3DCommandSubOpcode = 14, \
1575 .DwordLength = 0
1576
1577 struct GEN8_3DSTATE_CC_STATE_POINTERS {
1578 uint32_t CommandType;
1579 uint32_t CommandSubType;
1580 uint32_t _3DCommandOpcode;
1581 uint32_t _3DCommandSubOpcode;
1582 uint32_t DwordLength;
1583 uint32_t ColorCalcStatePointer;
1584 uint32_t ColorCalcStatePointerValid;
1585 };
1586
1587 static inline void
1588 GEN8_3DSTATE_CC_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
1589 const struct GEN8_3DSTATE_CC_STATE_POINTERS * restrict values)
1590 {
1591 uint32_t *dw = (uint32_t * restrict) dst;
1592
1593 dw[0] =
1594 __gen_field(values->CommandType, 29, 31) |
1595 __gen_field(values->CommandSubType, 27, 28) |
1596 __gen_field(values->_3DCommandOpcode, 24, 26) |
1597 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1598 __gen_field(values->DwordLength, 0, 7) |
1599 0;
1600
1601 dw[1] =
1602 __gen_offset(values->ColorCalcStatePointer, 6, 31) |
1603 __gen_field(values->ColorCalcStatePointerValid, 0, 0) |
1604 0;
1605
1606 }
1607
1608 #define GEN8_3DSTATE_CHROMA_KEY_length 0x00000004
1609 #define GEN8_3DSTATE_CHROMA_KEY_length_bias 0x00000002
1610 #define GEN8_3DSTATE_CHROMA_KEY_header \
1611 .CommandType = 3, \
1612 .CommandSubType = 3, \
1613 ._3DCommandOpcode = 1, \
1614 ._3DCommandSubOpcode = 4, \
1615 .DwordLength = 2
1616
1617 struct GEN8_3DSTATE_CHROMA_KEY {
1618 uint32_t CommandType;
1619 uint32_t CommandSubType;
1620 uint32_t _3DCommandOpcode;
1621 uint32_t _3DCommandSubOpcode;
1622 uint32_t DwordLength;
1623 uint32_t ChromaKeyTableIndex;
1624 uint32_t ChromaKeyLowValue;
1625 uint32_t ChromaKeyHighValue;
1626 };
1627
1628 static inline void
1629 GEN8_3DSTATE_CHROMA_KEY_pack(__gen_user_data *data, void * restrict dst,
1630 const struct GEN8_3DSTATE_CHROMA_KEY * restrict values)
1631 {
1632 uint32_t *dw = (uint32_t * restrict) dst;
1633
1634 dw[0] =
1635 __gen_field(values->CommandType, 29, 31) |
1636 __gen_field(values->CommandSubType, 27, 28) |
1637 __gen_field(values->_3DCommandOpcode, 24, 26) |
1638 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1639 __gen_field(values->DwordLength, 0, 7) |
1640 0;
1641
1642 dw[1] =
1643 __gen_field(values->ChromaKeyTableIndex, 30, 31) |
1644 0;
1645
1646 dw[2] =
1647 __gen_field(values->ChromaKeyLowValue, 0, 31) |
1648 0;
1649
1650 dw[3] =
1651 __gen_field(values->ChromaKeyHighValue, 0, 31) |
1652 0;
1653
1654 }
1655
1656 #define GEN8_3DSTATE_CLEAR_PARAMS_length 0x00000003
1657 #define GEN8_3DSTATE_CLEAR_PARAMS_length_bias 0x00000002
1658 #define GEN8_3DSTATE_CLEAR_PARAMS_header \
1659 .CommandType = 3, \
1660 .CommandSubType = 3, \
1661 ._3DCommandOpcode = 0, \
1662 ._3DCommandSubOpcode = 4, \
1663 .DwordLength = 1
1664
1665 struct GEN8_3DSTATE_CLEAR_PARAMS {
1666 uint32_t CommandType;
1667 uint32_t CommandSubType;
1668 uint32_t _3DCommandOpcode;
1669 uint32_t _3DCommandSubOpcode;
1670 uint32_t DwordLength;
1671 float DepthClearValue;
1672 uint32_t DepthClearValueValid;
1673 };
1674
1675 static inline void
1676 GEN8_3DSTATE_CLEAR_PARAMS_pack(__gen_user_data *data, void * restrict dst,
1677 const struct GEN8_3DSTATE_CLEAR_PARAMS * restrict values)
1678 {
1679 uint32_t *dw = (uint32_t * restrict) dst;
1680
1681 dw[0] =
1682 __gen_field(values->CommandType, 29, 31) |
1683 __gen_field(values->CommandSubType, 27, 28) |
1684 __gen_field(values->_3DCommandOpcode, 24, 26) |
1685 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1686 __gen_field(values->DwordLength, 0, 7) |
1687 0;
1688
1689 dw[1] =
1690 __gen_float(values->DepthClearValue) |
1691 0;
1692
1693 dw[2] =
1694 __gen_field(values->DepthClearValueValid, 0, 0) |
1695 0;
1696
1697 }
1698
1699 #define GEN8_3DSTATE_CLIP_length 0x00000004
1700 #define GEN8_3DSTATE_CLIP_length_bias 0x00000002
1701 #define GEN8_3DSTATE_CLIP_header \
1702 .CommandType = 3, \
1703 .CommandSubType = 3, \
1704 ._3DCommandOpcode = 0, \
1705 ._3DCommandSubOpcode = 18, \
1706 .DwordLength = 2
1707
1708 struct GEN8_3DSTATE_CLIP {
1709 uint32_t CommandType;
1710 uint32_t CommandSubType;
1711 uint32_t _3DCommandOpcode;
1712 uint32_t _3DCommandSubOpcode;
1713 uint32_t DwordLength;
1714 #define Normal 0
1715 #define Force 1
1716 uint32_t ForceUserClipDistanceCullTestEnableBitmask;
1717 #define _8Bit 0
1718 #define _4Bit 1
1719 uint32_t VertexSubPixelPrecisionSelect;
1720 uint32_t EarlyCullEnable;
1721 #define Normal 0
1722 #define Force 1
1723 uint32_t ForceUserClipDistanceClipTestEnableBitmask;
1724 #define Normal 0
1725 #define Force 1
1726 uint32_t ForceClipMode;
1727 uint32_t ClipperStatisticsEnable;
1728 uint32_t UserClipDistanceCullTestEnableBitmask;
1729 uint32_t ClipEnable;
1730 #define API_OGL 0
1731 uint32_t APIMode;
1732 uint32_t ViewportXYClipTestEnable;
1733 uint32_t GuardbandClipTestEnable;
1734 uint32_t UserClipDistanceClipTestEnableBitmask;
1735 #define NORMAL 0
1736 #define REJECT_ALL 3
1737 #define ACCEPT_ALL 4
1738 uint32_t ClipMode;
1739 uint32_t PerspectiveDivideDisable;
1740 uint32_t NonPerspectiveBarycentricEnable;
1741 uint32_t TriangleStripListProvokingVertexSelect;
1742 uint32_t LineStripListProvokingVertexSelect;
1743 uint32_t TriangleFanProvokingVertexSelect;
1744 float MinimumPointWidth;
1745 float MaximumPointWidth;
1746 uint32_t ForceZeroRTAIndexEnable;
1747 uint32_t MaximumVPIndex;
1748 };
1749
1750 static inline void
1751 GEN8_3DSTATE_CLIP_pack(__gen_user_data *data, void * restrict dst,
1752 const struct GEN8_3DSTATE_CLIP * restrict values)
1753 {
1754 uint32_t *dw = (uint32_t * restrict) dst;
1755
1756 dw[0] =
1757 __gen_field(values->CommandType, 29, 31) |
1758 __gen_field(values->CommandSubType, 27, 28) |
1759 __gen_field(values->_3DCommandOpcode, 24, 26) |
1760 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1761 __gen_field(values->DwordLength, 0, 7) |
1762 0;
1763
1764 dw[1] =
1765 __gen_field(values->ForceUserClipDistanceCullTestEnableBitmask, 20, 20) |
1766 __gen_field(values->VertexSubPixelPrecisionSelect, 19, 19) |
1767 __gen_field(values->EarlyCullEnable, 18, 18) |
1768 __gen_field(values->ForceUserClipDistanceClipTestEnableBitmask, 17, 17) |
1769 __gen_field(values->ForceClipMode, 16, 16) |
1770 __gen_field(values->ClipperStatisticsEnable, 10, 10) |
1771 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
1772 0;
1773
1774 dw[2] =
1775 __gen_field(values->ClipEnable, 31, 31) |
1776 __gen_field(values->APIMode, 30, 30) |
1777 __gen_field(values->ViewportXYClipTestEnable, 28, 28) |
1778 __gen_field(values->GuardbandClipTestEnable, 26, 26) |
1779 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 16, 23) |
1780 __gen_field(values->ClipMode, 13, 15) |
1781 __gen_field(values->PerspectiveDivideDisable, 9, 9) |
1782 __gen_field(values->NonPerspectiveBarycentricEnable, 8, 8) |
1783 __gen_field(values->TriangleStripListProvokingVertexSelect, 4, 5) |
1784 __gen_field(values->LineStripListProvokingVertexSelect, 2, 3) |
1785 __gen_field(values->TriangleFanProvokingVertexSelect, 0, 1) |
1786 0;
1787
1788 dw[3] =
1789 __gen_field(values->MinimumPointWidth * (1 << 3), 17, 27) |
1790 __gen_field(values->MaximumPointWidth * (1 << 3), 6, 16) |
1791 __gen_field(values->ForceZeroRTAIndexEnable, 5, 5) |
1792 __gen_field(values->MaximumVPIndex, 0, 3) |
1793 0;
1794
1795 }
1796
1797 #define GEN8_3DSTATE_CONSTANT_DS_length 0x0000000b
1798 #define GEN8_3DSTATE_CONSTANT_DS_length_bias 0x00000002
1799 #define GEN8_3DSTATE_CONSTANT_DS_header \
1800 .CommandType = 3, \
1801 .CommandSubType = 3, \
1802 ._3DCommandOpcode = 0, \
1803 ._3DCommandSubOpcode = 26, \
1804 .DwordLength = 9
1805
1806 struct GEN8_3DSTATE_CONSTANT_BODY {
1807 uint32_t ConstantBuffer1ReadLength;
1808 uint32_t ConstantBuffer0ReadLength;
1809 uint32_t ConstantBuffer3ReadLength;
1810 uint32_t ConstantBuffer2ReadLength;
1811 __gen_address_type PointerToConstantBuffer0;
1812 __gen_address_type PointerToConstantBuffer1;
1813 __gen_address_type PointerToConstantBuffer2;
1814 __gen_address_type PointerToConstantBuffer3;
1815 };
1816
1817 static inline void
1818 GEN8_3DSTATE_CONSTANT_BODY_pack(__gen_user_data *data, void * restrict dst,
1819 const struct GEN8_3DSTATE_CONSTANT_BODY * restrict values)
1820 {
1821 uint32_t *dw = (uint32_t * restrict) dst;
1822
1823 dw[0] =
1824 __gen_field(values->ConstantBuffer1ReadLength, 16, 31) |
1825 __gen_field(values->ConstantBuffer0ReadLength, 0, 15) |
1826 0;
1827
1828 dw[1] =
1829 __gen_field(values->ConstantBuffer3ReadLength, 16, 31) |
1830 __gen_field(values->ConstantBuffer2ReadLength, 0, 15) |
1831 0;
1832
1833 uint32_t dw2 =
1834 0;
1835
1836 uint64_t qw2 =
1837 __gen_combine_address(data, &dw[2], values->PointerToConstantBuffer0, dw2);
1838
1839 dw[2] = qw2;
1840 dw[3] = qw2 >> 32;
1841
1842 uint32_t dw4 =
1843 0;
1844
1845 uint64_t qw4 =
1846 __gen_combine_address(data, &dw[4], values->PointerToConstantBuffer1, dw4);
1847
1848 dw[4] = qw4;
1849 dw[5] = qw4 >> 32;
1850
1851 uint32_t dw6 =
1852 0;
1853
1854 uint64_t qw6 =
1855 __gen_combine_address(data, &dw[6], values->PointerToConstantBuffer2, dw6);
1856
1857 dw[6] = qw6;
1858 dw[7] = qw6 >> 32;
1859
1860 uint32_t dw8 =
1861 0;
1862
1863 uint64_t qw8 =
1864 __gen_combine_address(data, &dw[8], values->PointerToConstantBuffer3, dw8);
1865
1866 dw[8] = qw8;
1867 dw[9] = qw8 >> 32;
1868
1869 }
1870
1871 struct GEN8_3DSTATE_CONSTANT_DS {
1872 uint32_t CommandType;
1873 uint32_t CommandSubType;
1874 uint32_t _3DCommandOpcode;
1875 uint32_t _3DCommandSubOpcode;
1876 struct GEN8_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
1877 uint32_t DwordLength;
1878 struct GEN8_3DSTATE_CONSTANT_BODY ConstantBody;
1879 };
1880
1881 static inline void
1882 GEN8_3DSTATE_CONSTANT_DS_pack(__gen_user_data *data, void * restrict dst,
1883 const struct GEN8_3DSTATE_CONSTANT_DS * restrict values)
1884 {
1885 uint32_t *dw = (uint32_t * restrict) dst;
1886
1887 uint32_t dw_ConstantBufferObjectControlState;
1888 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
1889 dw[0] =
1890 __gen_field(values->CommandType, 29, 31) |
1891 __gen_field(values->CommandSubType, 27, 28) |
1892 __gen_field(values->_3DCommandOpcode, 24, 26) |
1893 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1894 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
1895 __gen_field(values->DwordLength, 0, 7) |
1896 0;
1897
1898 GEN8_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1899 }
1900
1901 #define GEN8_3DSTATE_CONSTANT_GS_length 0x0000000b
1902 #define GEN8_3DSTATE_CONSTANT_GS_length_bias 0x00000002
1903 #define GEN8_3DSTATE_CONSTANT_GS_header \
1904 .CommandType = 3, \
1905 .CommandSubType = 3, \
1906 ._3DCommandOpcode = 0, \
1907 ._3DCommandSubOpcode = 22, \
1908 .DwordLength = 9
1909
1910 struct GEN8_3DSTATE_CONSTANT_GS {
1911 uint32_t CommandType;
1912 uint32_t CommandSubType;
1913 uint32_t _3DCommandOpcode;
1914 uint32_t _3DCommandSubOpcode;
1915 struct GEN8_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
1916 uint32_t DwordLength;
1917 struct GEN8_3DSTATE_CONSTANT_BODY ConstantBody;
1918 };
1919
1920 static inline void
1921 GEN8_3DSTATE_CONSTANT_GS_pack(__gen_user_data *data, void * restrict dst,
1922 const struct GEN8_3DSTATE_CONSTANT_GS * restrict values)
1923 {
1924 uint32_t *dw = (uint32_t * restrict) dst;
1925
1926 uint32_t dw_ConstantBufferObjectControlState;
1927 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
1928 dw[0] =
1929 __gen_field(values->CommandType, 29, 31) |
1930 __gen_field(values->CommandSubType, 27, 28) |
1931 __gen_field(values->_3DCommandOpcode, 24, 26) |
1932 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1933 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
1934 __gen_field(values->DwordLength, 0, 7) |
1935 0;
1936
1937 GEN8_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1938 }
1939
1940 #define GEN8_3DSTATE_CONSTANT_HS_length 0x0000000b
1941 #define GEN8_3DSTATE_CONSTANT_HS_length_bias 0x00000002
1942 #define GEN8_3DSTATE_CONSTANT_HS_header \
1943 .CommandType = 3, \
1944 .CommandSubType = 3, \
1945 ._3DCommandOpcode = 0, \
1946 ._3DCommandSubOpcode = 25, \
1947 .DwordLength = 9
1948
1949 struct GEN8_3DSTATE_CONSTANT_HS {
1950 uint32_t CommandType;
1951 uint32_t CommandSubType;
1952 uint32_t _3DCommandOpcode;
1953 uint32_t _3DCommandSubOpcode;
1954 struct GEN8_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
1955 uint32_t DwordLength;
1956 struct GEN8_3DSTATE_CONSTANT_BODY ConstantBody;
1957 };
1958
1959 static inline void
1960 GEN8_3DSTATE_CONSTANT_HS_pack(__gen_user_data *data, void * restrict dst,
1961 const struct GEN8_3DSTATE_CONSTANT_HS * restrict values)
1962 {
1963 uint32_t *dw = (uint32_t * restrict) dst;
1964
1965 uint32_t dw_ConstantBufferObjectControlState;
1966 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
1967 dw[0] =
1968 __gen_field(values->CommandType, 29, 31) |
1969 __gen_field(values->CommandSubType, 27, 28) |
1970 __gen_field(values->_3DCommandOpcode, 24, 26) |
1971 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1972 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
1973 __gen_field(values->DwordLength, 0, 7) |
1974 0;
1975
1976 GEN8_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1977 }
1978
1979 #define GEN8_3DSTATE_CONSTANT_PS_length 0x0000000b
1980 #define GEN8_3DSTATE_CONSTANT_PS_length_bias 0x00000002
1981 #define GEN8_3DSTATE_CONSTANT_PS_header \
1982 .CommandType = 3, \
1983 .CommandSubType = 3, \
1984 ._3DCommandOpcode = 0, \
1985 ._3DCommandSubOpcode = 23, \
1986 .DwordLength = 9
1987
1988 struct GEN8_3DSTATE_CONSTANT_PS {
1989 uint32_t CommandType;
1990 uint32_t CommandSubType;
1991 uint32_t _3DCommandOpcode;
1992 uint32_t _3DCommandSubOpcode;
1993 struct GEN8_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
1994 uint32_t DwordLength;
1995 struct GEN8_3DSTATE_CONSTANT_BODY ConstantBody;
1996 };
1997
1998 static inline void
1999 GEN8_3DSTATE_CONSTANT_PS_pack(__gen_user_data *data, void * restrict dst,
2000 const struct GEN8_3DSTATE_CONSTANT_PS * restrict values)
2001 {
2002 uint32_t *dw = (uint32_t * restrict) dst;
2003
2004 uint32_t dw_ConstantBufferObjectControlState;
2005 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
2006 dw[0] =
2007 __gen_field(values->CommandType, 29, 31) |
2008 __gen_field(values->CommandSubType, 27, 28) |
2009 __gen_field(values->_3DCommandOpcode, 24, 26) |
2010 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2011 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
2012 __gen_field(values->DwordLength, 0, 7) |
2013 0;
2014
2015 GEN8_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
2016 }
2017
2018 #define GEN8_3DSTATE_CONSTANT_VS_length 0x0000000b
2019 #define GEN8_3DSTATE_CONSTANT_VS_length_bias 0x00000002
2020 #define GEN8_3DSTATE_CONSTANT_VS_header \
2021 .CommandType = 3, \
2022 .CommandSubType = 3, \
2023 ._3DCommandOpcode = 0, \
2024 ._3DCommandSubOpcode = 21, \
2025 .DwordLength = 9
2026
2027 struct GEN8_3DSTATE_CONSTANT_VS {
2028 uint32_t CommandType;
2029 uint32_t CommandSubType;
2030 uint32_t _3DCommandOpcode;
2031 uint32_t _3DCommandSubOpcode;
2032 struct GEN8_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
2033 uint32_t DwordLength;
2034 struct GEN8_3DSTATE_CONSTANT_BODY ConstantBody;
2035 };
2036
2037 static inline void
2038 GEN8_3DSTATE_CONSTANT_VS_pack(__gen_user_data *data, void * restrict dst,
2039 const struct GEN8_3DSTATE_CONSTANT_VS * restrict values)
2040 {
2041 uint32_t *dw = (uint32_t * restrict) dst;
2042
2043 uint32_t dw_ConstantBufferObjectControlState;
2044 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
2045 dw[0] =
2046 __gen_field(values->CommandType, 29, 31) |
2047 __gen_field(values->CommandSubType, 27, 28) |
2048 __gen_field(values->_3DCommandOpcode, 24, 26) |
2049 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2050 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
2051 __gen_field(values->DwordLength, 0, 7) |
2052 0;
2053
2054 GEN8_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
2055 }
2056
2057 #define GEN8_3DSTATE_DEPTH_BUFFER_length 0x00000008
2058 #define GEN8_3DSTATE_DEPTH_BUFFER_length_bias 0x00000002
2059 #define GEN8_3DSTATE_DEPTH_BUFFER_header \
2060 .CommandType = 3, \
2061 .CommandSubType = 3, \
2062 ._3DCommandOpcode = 0, \
2063 ._3DCommandSubOpcode = 5, \
2064 .DwordLength = 6
2065
2066 struct GEN8_3DSTATE_DEPTH_BUFFER {
2067 uint32_t CommandType;
2068 uint32_t CommandSubType;
2069 uint32_t _3DCommandOpcode;
2070 uint32_t _3DCommandSubOpcode;
2071 uint32_t DwordLength;
2072 #define SURFTYPE_1D 0
2073 #define SURFTYPE_2D 1
2074 #define SURFTYPE_3D 2
2075 #define SURFTYPE_CUBE 3
2076 #define SURFTYPE_NULL 7
2077 uint32_t SurfaceType;
2078 uint32_t DepthWriteEnable;
2079 uint32_t StencilWriteEnable;
2080 uint32_t HierarchicalDepthBufferEnable;
2081 #define D32_FLOAT 1
2082 #define D24_UNORM_X8_UINT 3
2083 #define D16_UNORM 5
2084 uint32_t SurfaceFormat;
2085 uint32_t SurfacePitch;
2086 __gen_address_type SurfaceBaseAddress;
2087 uint32_t Height;
2088 uint32_t Width;
2089 uint32_t LOD;
2090 uint32_t Depth;
2091 uint32_t MinimumArrayElement;
2092 struct GEN8_MEMORY_OBJECT_CONTROL_STATE DepthBufferObjectControlState;
2093 uint32_t RenderTargetViewExtent;
2094 uint32_t SurfaceQPitch;
2095 };
2096
2097 static inline void
2098 GEN8_3DSTATE_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
2099 const struct GEN8_3DSTATE_DEPTH_BUFFER * restrict values)
2100 {
2101 uint32_t *dw = (uint32_t * restrict) dst;
2102
2103 dw[0] =
2104 __gen_field(values->CommandType, 29, 31) |
2105 __gen_field(values->CommandSubType, 27, 28) |
2106 __gen_field(values->_3DCommandOpcode, 24, 26) |
2107 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2108 __gen_field(values->DwordLength, 0, 7) |
2109 0;
2110
2111 dw[1] =
2112 __gen_field(values->SurfaceType, 29, 31) |
2113 __gen_field(values->DepthWriteEnable, 28, 28) |
2114 __gen_field(values->StencilWriteEnable, 27, 27) |
2115 __gen_field(values->HierarchicalDepthBufferEnable, 22, 22) |
2116 __gen_field(values->SurfaceFormat, 18, 20) |
2117 __gen_field(values->SurfacePitch, 0, 17) |
2118 0;
2119
2120 uint32_t dw2 =
2121 0;
2122
2123 uint64_t qw2 =
2124 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
2125
2126 dw[2] = qw2;
2127 dw[3] = qw2 >> 32;
2128
2129 dw[4] =
2130 __gen_field(values->Height, 18, 31) |
2131 __gen_field(values->Width, 4, 17) |
2132 __gen_field(values->LOD, 0, 3) |
2133 0;
2134
2135 uint32_t dw_DepthBufferObjectControlState;
2136 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DepthBufferObjectControlState, &values->DepthBufferObjectControlState);
2137 dw[5] =
2138 __gen_field(values->Depth, 21, 31) |
2139 __gen_field(values->MinimumArrayElement, 10, 20) |
2140 __gen_field(dw_DepthBufferObjectControlState, 0, 6) |
2141 0;
2142
2143 dw[6] =
2144 0;
2145
2146 dw[7] =
2147 __gen_field(values->RenderTargetViewExtent, 21, 31) |
2148 __gen_field(values->SurfaceQPitch, 0, 14) |
2149 0;
2150
2151 }
2152
2153 #define GEN8_3DSTATE_DRAWING_RECTANGLE_length 0x00000004
2154 #define GEN8_3DSTATE_DRAWING_RECTANGLE_length_bias 0x00000002
2155 #define GEN8_3DSTATE_DRAWING_RECTANGLE_header \
2156 .CommandType = 3, \
2157 .CommandSubType = 3, \
2158 ._3DCommandOpcode = 1, \
2159 ._3DCommandSubOpcode = 0, \
2160 .DwordLength = 2
2161
2162 struct GEN8_3DSTATE_DRAWING_RECTANGLE {
2163 uint32_t CommandType;
2164 uint32_t CommandSubType;
2165 uint32_t _3DCommandOpcode;
2166 uint32_t _3DCommandSubOpcode;
2167 #define Legacy 0
2168 #define Core0Enabled 1
2169 #define Core1Enabled 2
2170 uint32_t CoreModeSelect;
2171 uint32_t DwordLength;
2172 uint32_t ClippedDrawingRectangleYMin;
2173 uint32_t ClippedDrawingRectangleXMin;
2174 uint32_t ClippedDrawingRectangleYMax;
2175 uint32_t ClippedDrawingRectangleXMax;
2176 uint32_t DrawingRectangleOriginY;
2177 uint32_t DrawingRectangleOriginX;
2178 };
2179
2180 static inline void
2181 GEN8_3DSTATE_DRAWING_RECTANGLE_pack(__gen_user_data *data, void * restrict dst,
2182 const struct GEN8_3DSTATE_DRAWING_RECTANGLE * restrict values)
2183 {
2184 uint32_t *dw = (uint32_t * restrict) dst;
2185
2186 dw[0] =
2187 __gen_field(values->CommandType, 29, 31) |
2188 __gen_field(values->CommandSubType, 27, 28) |
2189 __gen_field(values->_3DCommandOpcode, 24, 26) |
2190 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2191 __gen_field(values->CoreModeSelect, 14, 15) |
2192 __gen_field(values->DwordLength, 0, 7) |
2193 0;
2194
2195 dw[1] =
2196 __gen_field(values->ClippedDrawingRectangleYMin, 16, 31) |
2197 __gen_field(values->ClippedDrawingRectangleXMin, 0, 15) |
2198 0;
2199
2200 dw[2] =
2201 __gen_field(values->ClippedDrawingRectangleYMax, 16, 31) |
2202 __gen_field(values->ClippedDrawingRectangleXMax, 0, 15) |
2203 0;
2204
2205 dw[3] =
2206 __gen_field(values->DrawingRectangleOriginY, 16, 31) |
2207 __gen_field(values->DrawingRectangleOriginX, 0, 15) |
2208 0;
2209
2210 }
2211
2212 #define GEN8_3DSTATE_DS_length 0x00000009
2213 #define GEN8_3DSTATE_DS_length_bias 0x00000002
2214 #define GEN8_3DSTATE_DS_header \
2215 .CommandType = 3, \
2216 .CommandSubType = 3, \
2217 ._3DCommandOpcode = 0, \
2218 ._3DCommandSubOpcode = 29, \
2219 .DwordLength = 7
2220
2221 struct GEN8_3DSTATE_DS {
2222 uint32_t CommandType;
2223 uint32_t CommandSubType;
2224 uint32_t _3DCommandOpcode;
2225 uint32_t _3DCommandSubOpcode;
2226 uint32_t DwordLength;
2227 uint64_t KernelStartPointer;
2228 #define Multiple 0
2229 #define Single 1
2230 uint32_t SingleDomainPointDispatch;
2231 #define Dmask 0
2232 #define Vmask 1
2233 uint32_t VectorMaskEnable;
2234 #define NoSamplers 0
2235 #define _14Samplers 1
2236 #define _58Samplers 2
2237 #define _912Samplers 3
2238 #define _1316Samplers 4
2239 uint32_t SamplerCount;
2240 uint32_t BindingTableEntryCount;
2241 #define Normal 0
2242 #define High 1
2243 uint32_t ThreadDispatchPriority;
2244 #define IEEE754 0
2245 #define Alternate 1
2246 uint32_t FloatingPointMode;
2247 uint32_t AccessesUAV;
2248 uint32_t IllegalOpcodeExceptionEnable;
2249 uint32_t SoftwareExceptionEnable;
2250 __gen_address_type ScratchSpaceBasePointer;
2251 uint32_t PerThreadScratchSpace;
2252 uint32_t DispatchGRFStartRegisterForURBData;
2253 uint32_t PatchURBEntryReadLength;
2254 uint32_t PatchURBEntryReadOffset;
2255 uint32_t MaximumNumberofThreads;
2256 uint32_t StatisticsEnable;
2257 uint32_t SIMD8DispatchEnable;
2258 uint32_t ComputeWCoordinateEnable;
2259 uint32_t CacheDisable;
2260 uint32_t FunctionEnable;
2261 uint32_t VertexURBEntryOutputReadOffset;
2262 uint32_t VertexURBEntryOutputLength;
2263 uint32_t UserClipDistanceClipTestEnableBitmask;
2264 uint32_t UserClipDistanceCullTestEnableBitmask;
2265 };
2266
2267 static inline void
2268 GEN8_3DSTATE_DS_pack(__gen_user_data *data, void * restrict dst,
2269 const struct GEN8_3DSTATE_DS * restrict values)
2270 {
2271 uint32_t *dw = (uint32_t * restrict) dst;
2272
2273 dw[0] =
2274 __gen_field(values->CommandType, 29, 31) |
2275 __gen_field(values->CommandSubType, 27, 28) |
2276 __gen_field(values->_3DCommandOpcode, 24, 26) |
2277 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2278 __gen_field(values->DwordLength, 0, 7) |
2279 0;
2280
2281 uint64_t qw1 =
2282 __gen_offset(values->KernelStartPointer, 6, 63) |
2283 0;
2284
2285 dw[1] = qw1;
2286 dw[2] = qw1 >> 32;
2287
2288 dw[3] =
2289 __gen_field(values->SingleDomainPointDispatch, 31, 31) |
2290 __gen_field(values->VectorMaskEnable, 30, 30) |
2291 __gen_field(values->SamplerCount, 27, 29) |
2292 __gen_field(values->BindingTableEntryCount, 18, 25) |
2293 __gen_field(values->ThreadDispatchPriority, 17, 17) |
2294 __gen_field(values->FloatingPointMode, 16, 16) |
2295 __gen_field(values->AccessesUAV, 14, 14) |
2296 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2297 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
2298 0;
2299
2300 uint32_t dw4 =
2301 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
2302 __gen_field(values->PerThreadScratchSpace, 0, 3) |
2303 0;
2304
2305 uint64_t qw4 =
2306 __gen_combine_address(data, &dw[4], values->ScratchSpaceBasePointer, dw4);
2307
2308 dw[4] = qw4;
2309 dw[5] = qw4 >> 32;
2310
2311 dw[6] =
2312 __gen_field(values->DispatchGRFStartRegisterForURBData, 20, 24) |
2313 __gen_field(values->PatchURBEntryReadLength, 11, 17) |
2314 __gen_field(values->PatchURBEntryReadOffset, 4, 9) |
2315 0;
2316
2317 dw[7] =
2318 __gen_field(values->MaximumNumberofThreads, 21, 29) |
2319 __gen_field(values->StatisticsEnable, 10, 10) |
2320 __gen_field(values->SIMD8DispatchEnable, 3, 3) |
2321 __gen_field(values->ComputeWCoordinateEnable, 2, 2) |
2322 __gen_field(values->CacheDisable, 1, 1) |
2323 __gen_field(values->FunctionEnable, 0, 0) |
2324 0;
2325
2326 dw[8] =
2327 __gen_field(values->VertexURBEntryOutputReadOffset, 21, 26) |
2328 __gen_field(values->VertexURBEntryOutputLength, 16, 20) |
2329 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 8, 15) |
2330 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
2331 0;
2332
2333 }
2334
2335 #define GEN8_3DSTATE_GATHER_CONSTANT_DS_length_bias 0x00000002
2336 #define GEN8_3DSTATE_GATHER_CONSTANT_DS_header \
2337 .CommandType = 3, \
2338 .CommandSubType = 3, \
2339 ._3DCommandOpcode = 0, \
2340 ._3DCommandSubOpcode = 55
2341
2342 struct GEN8_GATHER_CONSTANT_ENTRY {
2343 uint32_t ConstantBufferOffset;
2344 uint32_t ChannelMask;
2345 uint32_t BindingTableIndexOffset;
2346 };
2347
2348 static inline void
2349 GEN8_GATHER_CONSTANT_ENTRY_pack(__gen_user_data *data, void * restrict dst,
2350 const struct GEN8_GATHER_CONSTANT_ENTRY * restrict values)
2351 {
2352 uint32_t *dw = (uint32_t * restrict) dst;
2353
2354 dw[0] =
2355 __gen_offset(values->ConstantBufferOffset, 8, 15) |
2356 __gen_field(values->ChannelMask, 4, 7) |
2357 __gen_field(values->BindingTableIndexOffset, 0, 3) |
2358 0;
2359
2360 }
2361
2362 struct GEN8_3DSTATE_GATHER_CONSTANT_DS {
2363 uint32_t CommandType;
2364 uint32_t CommandSubType;
2365 uint32_t _3DCommandOpcode;
2366 uint32_t _3DCommandSubOpcode;
2367 uint32_t DwordLength;
2368 uint32_t ConstantBufferValid;
2369 uint32_t ConstantBufferBindingTableBlock;
2370 uint32_t GatherBufferOffset;
2371 uint32_t ConstantBufferDx9GenerateStall;
2372 /* variable length fields follow */
2373 };
2374
2375 static inline void
2376 GEN8_3DSTATE_GATHER_CONSTANT_DS_pack(__gen_user_data *data, void * restrict dst,
2377 const struct GEN8_3DSTATE_GATHER_CONSTANT_DS * restrict values)
2378 {
2379 uint32_t *dw = (uint32_t * restrict) dst;
2380
2381 dw[0] =
2382 __gen_field(values->CommandType, 29, 31) |
2383 __gen_field(values->CommandSubType, 27, 28) |
2384 __gen_field(values->_3DCommandOpcode, 24, 26) |
2385 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2386 __gen_field(values->DwordLength, 0, 7) |
2387 0;
2388
2389 dw[1] =
2390 __gen_field(values->ConstantBufferValid, 16, 31) |
2391 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2392 0;
2393
2394 dw[2] =
2395 __gen_offset(values->GatherBufferOffset, 6, 22) |
2396 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2397 0;
2398
2399 /* variable length fields follow */
2400 }
2401
2402 #define GEN8_3DSTATE_GATHER_CONSTANT_GS_length_bias 0x00000002
2403 #define GEN8_3DSTATE_GATHER_CONSTANT_GS_header \
2404 .CommandType = 3, \
2405 .CommandSubType = 3, \
2406 ._3DCommandOpcode = 0, \
2407 ._3DCommandSubOpcode = 53
2408
2409 struct GEN8_3DSTATE_GATHER_CONSTANT_GS {
2410 uint32_t CommandType;
2411 uint32_t CommandSubType;
2412 uint32_t _3DCommandOpcode;
2413 uint32_t _3DCommandSubOpcode;
2414 uint32_t DwordLength;
2415 uint32_t ConstantBufferValid;
2416 uint32_t ConstantBufferBindingTableBlock;
2417 uint32_t GatherBufferOffset;
2418 uint32_t ConstantBufferDx9GenerateStall;
2419 /* variable length fields follow */
2420 };
2421
2422 static inline void
2423 GEN8_3DSTATE_GATHER_CONSTANT_GS_pack(__gen_user_data *data, void * restrict dst,
2424 const struct GEN8_3DSTATE_GATHER_CONSTANT_GS * restrict values)
2425 {
2426 uint32_t *dw = (uint32_t * restrict) dst;
2427
2428 dw[0] =
2429 __gen_field(values->CommandType, 29, 31) |
2430 __gen_field(values->CommandSubType, 27, 28) |
2431 __gen_field(values->_3DCommandOpcode, 24, 26) |
2432 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2433 __gen_field(values->DwordLength, 0, 7) |
2434 0;
2435
2436 dw[1] =
2437 __gen_field(values->ConstantBufferValid, 16, 31) |
2438 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2439 0;
2440
2441 dw[2] =
2442 __gen_offset(values->GatherBufferOffset, 6, 22) |
2443 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2444 0;
2445
2446 /* variable length fields follow */
2447 }
2448
2449 #define GEN8_3DSTATE_GATHER_CONSTANT_HS_length_bias 0x00000002
2450 #define GEN8_3DSTATE_GATHER_CONSTANT_HS_header \
2451 .CommandType = 3, \
2452 .CommandSubType = 3, \
2453 ._3DCommandOpcode = 0, \
2454 ._3DCommandSubOpcode = 54
2455
2456 struct GEN8_3DSTATE_GATHER_CONSTANT_HS {
2457 uint32_t CommandType;
2458 uint32_t CommandSubType;
2459 uint32_t _3DCommandOpcode;
2460 uint32_t _3DCommandSubOpcode;
2461 uint32_t DwordLength;
2462 uint32_t ConstantBufferValid;
2463 uint32_t ConstantBufferBindingTableBlock;
2464 uint32_t GatherBufferOffset;
2465 uint32_t ConstantBufferDx9GenerateStall;
2466 /* variable length fields follow */
2467 };
2468
2469 static inline void
2470 GEN8_3DSTATE_GATHER_CONSTANT_HS_pack(__gen_user_data *data, void * restrict dst,
2471 const struct GEN8_3DSTATE_GATHER_CONSTANT_HS * restrict values)
2472 {
2473 uint32_t *dw = (uint32_t * restrict) dst;
2474
2475 dw[0] =
2476 __gen_field(values->CommandType, 29, 31) |
2477 __gen_field(values->CommandSubType, 27, 28) |
2478 __gen_field(values->_3DCommandOpcode, 24, 26) |
2479 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2480 __gen_field(values->DwordLength, 0, 7) |
2481 0;
2482
2483 dw[1] =
2484 __gen_field(values->ConstantBufferValid, 16, 31) |
2485 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2486 0;
2487
2488 dw[2] =
2489 __gen_offset(values->GatherBufferOffset, 6, 22) |
2490 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2491 0;
2492
2493 /* variable length fields follow */
2494 }
2495
2496 #define GEN8_3DSTATE_GATHER_CONSTANT_PS_length_bias 0x00000002
2497 #define GEN8_3DSTATE_GATHER_CONSTANT_PS_header \
2498 .CommandType = 3, \
2499 .CommandSubType = 3, \
2500 ._3DCommandOpcode = 0, \
2501 ._3DCommandSubOpcode = 56
2502
2503 struct GEN8_3DSTATE_GATHER_CONSTANT_PS {
2504 uint32_t CommandType;
2505 uint32_t CommandSubType;
2506 uint32_t _3DCommandOpcode;
2507 uint32_t _3DCommandSubOpcode;
2508 uint32_t DwordLength;
2509 uint32_t ConstantBufferValid;
2510 uint32_t ConstantBufferBindingTableBlock;
2511 uint32_t GatherBufferOffset;
2512 uint32_t ConstantBufferDx9GenerateStall;
2513 uint32_t ConstantBufferDx9Enable;
2514 /* variable length fields follow */
2515 };
2516
2517 static inline void
2518 GEN8_3DSTATE_GATHER_CONSTANT_PS_pack(__gen_user_data *data, void * restrict dst,
2519 const struct GEN8_3DSTATE_GATHER_CONSTANT_PS * restrict values)
2520 {
2521 uint32_t *dw = (uint32_t * restrict) dst;
2522
2523 dw[0] =
2524 __gen_field(values->CommandType, 29, 31) |
2525 __gen_field(values->CommandSubType, 27, 28) |
2526 __gen_field(values->_3DCommandOpcode, 24, 26) |
2527 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2528 __gen_field(values->DwordLength, 0, 7) |
2529 0;
2530
2531 dw[1] =
2532 __gen_field(values->ConstantBufferValid, 16, 31) |
2533 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2534 0;
2535
2536 dw[2] =
2537 __gen_offset(values->GatherBufferOffset, 6, 22) |
2538 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2539 __gen_field(values->ConstantBufferDx9Enable, 4, 4) |
2540 0;
2541
2542 /* variable length fields follow */
2543 }
2544
2545 #define GEN8_3DSTATE_GATHER_CONSTANT_VS_length_bias 0x00000002
2546 #define GEN8_3DSTATE_GATHER_CONSTANT_VS_header \
2547 .CommandType = 3, \
2548 .CommandSubType = 3, \
2549 ._3DCommandOpcode = 0, \
2550 ._3DCommandSubOpcode = 52
2551
2552 struct GEN8_3DSTATE_GATHER_CONSTANT_VS {
2553 uint32_t CommandType;
2554 uint32_t CommandSubType;
2555 uint32_t _3DCommandOpcode;
2556 uint32_t _3DCommandSubOpcode;
2557 uint32_t DwordLength;
2558 uint32_t ConstantBufferValid;
2559 uint32_t ConstantBufferBindingTableBlock;
2560 uint32_t GatherBufferOffset;
2561 uint32_t ConstantBufferDx9GenerateStall;
2562 uint32_t ConstantBufferDx9Enable;
2563 /* variable length fields follow */
2564 };
2565
2566 static inline void
2567 GEN8_3DSTATE_GATHER_CONSTANT_VS_pack(__gen_user_data *data, void * restrict dst,
2568 const struct GEN8_3DSTATE_GATHER_CONSTANT_VS * restrict values)
2569 {
2570 uint32_t *dw = (uint32_t * restrict) dst;
2571
2572 dw[0] =
2573 __gen_field(values->CommandType, 29, 31) |
2574 __gen_field(values->CommandSubType, 27, 28) |
2575 __gen_field(values->_3DCommandOpcode, 24, 26) |
2576 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2577 __gen_field(values->DwordLength, 0, 7) |
2578 0;
2579
2580 dw[1] =
2581 __gen_field(values->ConstantBufferValid, 16, 31) |
2582 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2583 0;
2584
2585 dw[2] =
2586 __gen_offset(values->GatherBufferOffset, 6, 22) |
2587 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2588 __gen_field(values->ConstantBufferDx9Enable, 4, 4) |
2589 0;
2590
2591 /* variable length fields follow */
2592 }
2593
2594 #define GEN8_3DSTATE_GATHER_POOL_ALLOC_length 0x00000004
2595 #define GEN8_3DSTATE_GATHER_POOL_ALLOC_length_bias 0x00000002
2596 #define GEN8_3DSTATE_GATHER_POOL_ALLOC_header \
2597 .CommandType = 3, \
2598 .CommandSubType = 3, \
2599 ._3DCommandOpcode = 1, \
2600 ._3DCommandSubOpcode = 26, \
2601 .DwordLength = 2
2602
2603 struct GEN8_3DSTATE_GATHER_POOL_ALLOC {
2604 uint32_t CommandType;
2605 uint32_t CommandSubType;
2606 uint32_t _3DCommandOpcode;
2607 uint32_t _3DCommandSubOpcode;
2608 uint32_t DwordLength;
2609 __gen_address_type GatherPoolBaseAddress;
2610 uint32_t GatherPoolEnable;
2611 struct GEN8_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
2612 uint32_t GatherPoolBufferSize;
2613 };
2614
2615 static inline void
2616 GEN8_3DSTATE_GATHER_POOL_ALLOC_pack(__gen_user_data *data, void * restrict dst,
2617 const struct GEN8_3DSTATE_GATHER_POOL_ALLOC * restrict values)
2618 {
2619 uint32_t *dw = (uint32_t * restrict) dst;
2620
2621 dw[0] =
2622 __gen_field(values->CommandType, 29, 31) |
2623 __gen_field(values->CommandSubType, 27, 28) |
2624 __gen_field(values->_3DCommandOpcode, 24, 26) |
2625 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2626 __gen_field(values->DwordLength, 0, 7) |
2627 0;
2628
2629 uint32_t dw_MemoryObjectControlState;
2630 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
2631 uint32_t dw1 =
2632 __gen_field(values->GatherPoolEnable, 11, 11) |
2633 __gen_field(dw_MemoryObjectControlState, 0, 6) |
2634 0;
2635
2636 uint64_t qw1 =
2637 __gen_combine_address(data, &dw[1], values->GatherPoolBaseAddress, dw1);
2638
2639 dw[1] = qw1;
2640 dw[2] = qw1 >> 32;
2641
2642 dw[3] =
2643 __gen_field(values->GatherPoolBufferSize, 12, 31) |
2644 0;
2645
2646 }
2647
2648 #define GEN8_3DSTATE_GS_length 0x0000000a
2649 #define GEN8_3DSTATE_GS_length_bias 0x00000002
2650 #define GEN8_3DSTATE_GS_header \
2651 .CommandType = 3, \
2652 .CommandSubType = 3, \
2653 ._3DCommandOpcode = 0, \
2654 ._3DCommandSubOpcode = 17, \
2655 .DwordLength = 8
2656
2657 struct GEN8_3DSTATE_GS {
2658 uint32_t CommandType;
2659 uint32_t CommandSubType;
2660 uint32_t _3DCommandOpcode;
2661 uint32_t _3DCommandSubOpcode;
2662 uint32_t DwordLength;
2663 uint64_t KernelStartPointer;
2664 uint32_t SingleProgramFlow;
2665 #define Dmask 0
2666 #define Vmask 1
2667 uint32_t VectorMaskEnable;
2668 #define NoSamplers 0
2669 #define _14Samplers 1
2670 #define _58Samplers 2
2671 #define _912Samplers 3
2672 #define _1316Samplers 4
2673 uint32_t SamplerCount;
2674 uint32_t BindingTableEntryCount;
2675 #define Normal 0
2676 #define High 1
2677 uint32_t ThreadDispatchPriority;
2678 #define IEEE754 0
2679 #define Alternate 1
2680 uint32_t FloatingPointMode;
2681 uint32_t IllegalOpcodeExceptionEnable;
2682 uint32_t AccessesUAV;
2683 uint32_t MaskStackExceptionEnable;
2684 uint32_t SoftwareExceptionEnable;
2685 uint32_t ExpectedVertexCount;
2686 __gen_address_type ScratchSpaceBasePointer;
2687 uint32_t PerThreadScratchSpace;
2688 uint32_t OutputVertexSize;
2689 uint32_t OutputTopology;
2690 uint32_t VertexURBEntryReadLength;
2691 uint32_t IncludeVertexHandles;
2692 uint32_t VertexURBEntryReadOffset;
2693 uint32_t DispatchGRFStartRegisterForURBData;
2694 uint32_t MaximumNumberofThreads;
2695 uint32_t ControlDataHeaderSize;
2696 uint32_t InstanceControl;
2697 uint32_t DefaultStreamId;
2698 #define DispatchModeSingle 0
2699 #define DispatchModeDualInstance 1
2700 #define DispatchModeDualObject 2
2701 #define DispatchModeSIMD8 3
2702 uint32_t DispatchMode;
2703 uint32_t StatisticsEnable;
2704 uint32_t InvocationsIncrementValue;
2705 uint32_t IncludePrimitiveID;
2706 uint32_t Hint;
2707 #define LEADING 0
2708 #define TRAILING 1
2709 uint32_t ReorderMode;
2710 uint32_t DiscardAdjacency;
2711 uint32_t Enable;
2712 #define CUT 0
2713 #define SID 1
2714 uint32_t ControlDataFormat;
2715 uint32_t StaticOutput;
2716 uint32_t StaticOutputVertexCount;
2717 uint32_t VertexURBEntryOutputReadOffset;
2718 uint32_t VertexURBEntryOutputLength;
2719 uint32_t UserClipDistanceClipTestEnableBitmask;
2720 uint32_t UserClipDistanceCullTestEnableBitmask;
2721 };
2722
2723 static inline void
2724 GEN8_3DSTATE_GS_pack(__gen_user_data *data, void * restrict dst,
2725 const struct GEN8_3DSTATE_GS * restrict values)
2726 {
2727 uint32_t *dw = (uint32_t * restrict) dst;
2728
2729 dw[0] =
2730 __gen_field(values->CommandType, 29, 31) |
2731 __gen_field(values->CommandSubType, 27, 28) |
2732 __gen_field(values->_3DCommandOpcode, 24, 26) |
2733 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2734 __gen_field(values->DwordLength, 0, 7) |
2735 0;
2736
2737 uint64_t qw1 =
2738 __gen_offset(values->KernelStartPointer, 6, 63) |
2739 0;
2740
2741 dw[1] = qw1;
2742 dw[2] = qw1 >> 32;
2743
2744 dw[3] =
2745 __gen_field(values->SingleProgramFlow, 31, 31) |
2746 __gen_field(values->VectorMaskEnable, 30, 30) |
2747 __gen_field(values->SamplerCount, 27, 29) |
2748 __gen_field(values->BindingTableEntryCount, 18, 25) |
2749 __gen_field(values->ThreadDispatchPriority, 17, 17) |
2750 __gen_field(values->FloatingPointMode, 16, 16) |
2751 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2752 __gen_field(values->AccessesUAV, 12, 12) |
2753 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
2754 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
2755 __gen_field(values->ExpectedVertexCount, 0, 5) |
2756 0;
2757
2758 uint32_t dw4 =
2759 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
2760 __gen_field(values->PerThreadScratchSpace, 0, 3) |
2761 0;
2762
2763 uint64_t qw4 =
2764 __gen_combine_address(data, &dw[4], values->ScratchSpaceBasePointer, dw4);
2765
2766 dw[4] = qw4;
2767 dw[5] = qw4 >> 32;
2768
2769 dw[6] =
2770 __gen_field(values->OutputVertexSize, 23, 28) |
2771 __gen_field(values->OutputTopology, 17, 22) |
2772 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
2773 __gen_field(values->IncludeVertexHandles, 10, 10) |
2774 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
2775 __gen_field(values->DispatchGRFStartRegisterForURBData, 0, 3) |
2776 0;
2777
2778 dw[7] =
2779 __gen_field(values->MaximumNumberofThreads, 24, 31) |
2780 __gen_field(values->ControlDataHeaderSize, 20, 23) |
2781 __gen_field(values->InstanceControl, 15, 19) |
2782 __gen_field(values->DefaultStreamId, 13, 14) |
2783 __gen_field(values->DispatchMode, 11, 12) |
2784 __gen_field(values->StatisticsEnable, 10, 10) |
2785 __gen_field(values->InvocationsIncrementValue, 5, 9) |
2786 __gen_field(values->IncludePrimitiveID, 4, 4) |
2787 __gen_field(values->Hint, 3, 3) |
2788 __gen_field(values->ReorderMode, 2, 2) |
2789 __gen_field(values->DiscardAdjacency, 1, 1) |
2790 __gen_field(values->Enable, 0, 0) |
2791 0;
2792
2793 dw[8] =
2794 __gen_field(values->ControlDataFormat, 31, 31) |
2795 __gen_field(values->StaticOutput, 30, 30) |
2796 __gen_field(values->StaticOutputVertexCount, 16, 26) |
2797 0;
2798
2799 dw[9] =
2800 __gen_field(values->VertexURBEntryOutputReadOffset, 21, 26) |
2801 __gen_field(values->VertexURBEntryOutputLength, 16, 20) |
2802 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 8, 15) |
2803 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
2804 0;
2805
2806 }
2807
2808 #define GEN8_3DSTATE_HIER_DEPTH_BUFFER_length 0x00000005
2809 #define GEN8_3DSTATE_HIER_DEPTH_BUFFER_length_bias 0x00000002
2810 #define GEN8_3DSTATE_HIER_DEPTH_BUFFER_header \
2811 .CommandType = 3, \
2812 .CommandSubType = 3, \
2813 ._3DCommandOpcode = 0, \
2814 ._3DCommandSubOpcode = 7, \
2815 .DwordLength = 3
2816
2817 struct GEN8_3DSTATE_HIER_DEPTH_BUFFER {
2818 uint32_t CommandType;
2819 uint32_t CommandSubType;
2820 uint32_t _3DCommandOpcode;
2821 uint32_t _3DCommandSubOpcode;
2822 uint32_t DwordLength;
2823 struct GEN8_MEMORY_OBJECT_CONTROL_STATE HierarchicalDepthBufferObjectControlState;
2824 uint32_t SurfacePitch;
2825 __gen_address_type SurfaceBaseAddress;
2826 uint32_t SurfaceQPitch;
2827 };
2828
2829 static inline void
2830 GEN8_3DSTATE_HIER_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
2831 const struct GEN8_3DSTATE_HIER_DEPTH_BUFFER * restrict values)
2832 {
2833 uint32_t *dw = (uint32_t * restrict) dst;
2834
2835 dw[0] =
2836 __gen_field(values->CommandType, 29, 31) |
2837 __gen_field(values->CommandSubType, 27, 28) |
2838 __gen_field(values->_3DCommandOpcode, 24, 26) |
2839 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2840 __gen_field(values->DwordLength, 0, 7) |
2841 0;
2842
2843 uint32_t dw_HierarchicalDepthBufferObjectControlState;
2844 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_HierarchicalDepthBufferObjectControlState, &values->HierarchicalDepthBufferObjectControlState);
2845 dw[1] =
2846 __gen_field(dw_HierarchicalDepthBufferObjectControlState, 25, 31) |
2847 __gen_field(values->SurfacePitch, 0, 16) |
2848 0;
2849
2850 uint32_t dw2 =
2851 0;
2852
2853 uint64_t qw2 =
2854 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
2855
2856 dw[2] = qw2;
2857 dw[3] = qw2 >> 32;
2858
2859 dw[4] =
2860 __gen_field(values->SurfaceQPitch, 0, 14) |
2861 0;
2862
2863 }
2864
2865 #define GEN8_3DSTATE_HS_length 0x00000009
2866 #define GEN8_3DSTATE_HS_length_bias 0x00000002
2867 #define GEN8_3DSTATE_HS_header \
2868 .CommandType = 3, \
2869 .CommandSubType = 3, \
2870 ._3DCommandOpcode = 0, \
2871 ._3DCommandSubOpcode = 27, \
2872 .DwordLength = 7
2873
2874 struct GEN8_3DSTATE_HS {
2875 uint32_t CommandType;
2876 uint32_t CommandSubType;
2877 uint32_t _3DCommandOpcode;
2878 uint32_t _3DCommandSubOpcode;
2879 uint32_t DwordLength;
2880 #define NoSamplers 0
2881 #define _14Samplers 1
2882 #define _58Samplers 2
2883 #define _912Samplers 3
2884 #define _1316Samplers 4
2885 uint32_t SamplerCount;
2886 uint32_t BindingTableEntryCount;
2887 #define Normal 0
2888 #define High 1
2889 uint32_t ThreadDispatchPriority;
2890 #define IEEE754 0
2891 #define alternate 1
2892 uint32_t FloatingPointMode;
2893 uint32_t IllegalOpcodeExceptionEnable;
2894 uint32_t SoftwareExceptionEnable;
2895 uint32_t Enable;
2896 uint32_t StatisticsEnable;
2897 uint32_t MaximumNumberofThreads;
2898 uint32_t InstanceCount;
2899 uint64_t KernelStartPointer;
2900 __gen_address_type ScratchSpaceBasePointer;
2901 uint32_t PerThreadScratchSpace;
2902 uint32_t SingleProgramFlow;
2903 #define Dmask 0
2904 #define Vmask 1
2905 uint32_t VectorMaskEnable;
2906 uint32_t AccessesUAV;
2907 uint32_t IncludeVertexHandles;
2908 uint32_t DispatchGRFStartRegisterForURBData;
2909 uint32_t VertexURBEntryReadLength;
2910 uint32_t VertexURBEntryReadOffset;
2911 };
2912
2913 static inline void
2914 GEN8_3DSTATE_HS_pack(__gen_user_data *data, void * restrict dst,
2915 const struct GEN8_3DSTATE_HS * restrict values)
2916 {
2917 uint32_t *dw = (uint32_t * restrict) dst;
2918
2919 dw[0] =
2920 __gen_field(values->CommandType, 29, 31) |
2921 __gen_field(values->CommandSubType, 27, 28) |
2922 __gen_field(values->_3DCommandOpcode, 24, 26) |
2923 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2924 __gen_field(values->DwordLength, 0, 7) |
2925 0;
2926
2927 dw[1] =
2928 __gen_field(values->SamplerCount, 27, 29) |
2929 __gen_field(values->BindingTableEntryCount, 18, 25) |
2930 __gen_field(values->ThreadDispatchPriority, 17, 17) |
2931 __gen_field(values->FloatingPointMode, 16, 16) |
2932 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2933 __gen_field(values->SoftwareExceptionEnable, 12, 12) |
2934 0;
2935
2936 dw[2] =
2937 __gen_field(values->Enable, 31, 31) |
2938 __gen_field(values->StatisticsEnable, 29, 29) |
2939 __gen_field(values->MaximumNumberofThreads, 8, 16) |
2940 __gen_field(values->InstanceCount, 0, 3) |
2941 0;
2942
2943 uint64_t qw3 =
2944 __gen_offset(values->KernelStartPointer, 6, 63) |
2945 0;
2946
2947 dw[3] = qw3;
2948 dw[4] = qw3 >> 32;
2949
2950 uint32_t dw5 =
2951 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
2952 __gen_field(values->PerThreadScratchSpace, 0, 3) |
2953 0;
2954
2955 uint64_t qw5 =
2956 __gen_combine_address(data, &dw[5], values->ScratchSpaceBasePointer, dw5);
2957
2958 dw[5] = qw5;
2959 dw[6] = qw5 >> 32;
2960
2961 dw[7] =
2962 __gen_field(values->SingleProgramFlow, 27, 27) |
2963 __gen_field(values->VectorMaskEnable, 26, 26) |
2964 __gen_field(values->AccessesUAV, 25, 25) |
2965 __gen_field(values->IncludeVertexHandles, 24, 24) |
2966 __gen_field(values->DispatchGRFStartRegisterForURBData, 19, 23) |
2967 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
2968 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
2969 0;
2970
2971 dw[8] =
2972 0;
2973
2974 }
2975
2976 #define GEN8_3DSTATE_INDEX_BUFFER_length 0x00000005
2977 #define GEN8_3DSTATE_INDEX_BUFFER_length_bias 0x00000002
2978 #define GEN8_3DSTATE_INDEX_BUFFER_header \
2979 .CommandType = 3, \
2980 .CommandSubType = 3, \
2981 ._3DCommandOpcode = 0, \
2982 ._3DCommandSubOpcode = 10, \
2983 .DwordLength = 3
2984
2985 struct GEN8_3DSTATE_INDEX_BUFFER {
2986 uint32_t CommandType;
2987 uint32_t CommandSubType;
2988 uint32_t _3DCommandOpcode;
2989 uint32_t _3DCommandSubOpcode;
2990 uint32_t DwordLength;
2991 #define INDEX_BYTE 0
2992 #define INDEX_WORD 1
2993 #define INDEX_DWORD 2
2994 uint32_t IndexFormat;
2995 struct GEN8_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
2996 __gen_address_type BufferStartingAddress;
2997 uint32_t BufferSize;
2998 };
2999
3000 static inline void
3001 GEN8_3DSTATE_INDEX_BUFFER_pack(__gen_user_data *data, void * restrict dst,
3002 const struct GEN8_3DSTATE_INDEX_BUFFER * restrict values)
3003 {
3004 uint32_t *dw = (uint32_t * restrict) dst;
3005
3006 dw[0] =
3007 __gen_field(values->CommandType, 29, 31) |
3008 __gen_field(values->CommandSubType, 27, 28) |
3009 __gen_field(values->_3DCommandOpcode, 24, 26) |
3010 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3011 __gen_field(values->DwordLength, 0, 7) |
3012 0;
3013
3014 uint32_t dw_MemoryObjectControlState;
3015 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
3016 dw[1] =
3017 __gen_field(values->IndexFormat, 8, 9) |
3018 __gen_field(dw_MemoryObjectControlState, 0, 6) |
3019 0;
3020
3021 uint32_t dw2 =
3022 0;
3023
3024 uint64_t qw2 =
3025 __gen_combine_address(data, &dw[2], values->BufferStartingAddress, dw2);
3026
3027 dw[2] = qw2;
3028 dw[3] = qw2 >> 32;
3029
3030 dw[4] =
3031 __gen_field(values->BufferSize, 0, 31) |
3032 0;
3033
3034 }
3035
3036 #define GEN8_3DSTATE_LINE_STIPPLE_length 0x00000003
3037 #define GEN8_3DSTATE_LINE_STIPPLE_length_bias 0x00000002
3038 #define GEN8_3DSTATE_LINE_STIPPLE_header \
3039 .CommandType = 3, \
3040 .CommandSubType = 3, \
3041 ._3DCommandOpcode = 1, \
3042 ._3DCommandSubOpcode = 8, \
3043 .DwordLength = 1
3044
3045 struct GEN8_3DSTATE_LINE_STIPPLE {
3046 uint32_t CommandType;
3047 uint32_t CommandSubType;
3048 uint32_t _3DCommandOpcode;
3049 uint32_t _3DCommandSubOpcode;
3050 uint32_t DwordLength;
3051 uint32_t ModifyEnableCurrentRepeatCounterCurrentStippleIndex;
3052 uint32_t CurrentRepeatCounter;
3053 uint32_t CurrentStippleIndex;
3054 uint32_t LineStipplePattern;
3055 float LineStippleInverseRepeatCount;
3056 uint32_t LineStippleRepeatCount;
3057 };
3058
3059 static inline void
3060 GEN8_3DSTATE_LINE_STIPPLE_pack(__gen_user_data *data, void * restrict dst,
3061 const struct GEN8_3DSTATE_LINE_STIPPLE * restrict values)
3062 {
3063 uint32_t *dw = (uint32_t * restrict) dst;
3064
3065 dw[0] =
3066 __gen_field(values->CommandType, 29, 31) |
3067 __gen_field(values->CommandSubType, 27, 28) |
3068 __gen_field(values->_3DCommandOpcode, 24, 26) |
3069 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3070 __gen_field(values->DwordLength, 0, 7) |
3071 0;
3072
3073 dw[1] =
3074 __gen_field(values->ModifyEnableCurrentRepeatCounterCurrentStippleIndex, 31, 31) |
3075 __gen_field(values->CurrentRepeatCounter, 21, 29) |
3076 __gen_field(values->CurrentStippleIndex, 16, 19) |
3077 __gen_field(values->LineStipplePattern, 0, 15) |
3078 0;
3079
3080 dw[2] =
3081 __gen_field(values->LineStippleInverseRepeatCount * (1 << 16), 15, 31) |
3082 __gen_field(values->LineStippleRepeatCount, 0, 8) |
3083 0;
3084
3085 }
3086
3087 #define GEN8_3DSTATE_MONOFILTER_SIZE_length 0x00000002
3088 #define GEN8_3DSTATE_MONOFILTER_SIZE_length_bias 0x00000002
3089 #define GEN8_3DSTATE_MONOFILTER_SIZE_header \
3090 .CommandType = 3, \
3091 .CommandSubType = 3, \
3092 ._3DCommandOpcode = 1, \
3093 ._3DCommandSubOpcode = 17, \
3094 .DwordLength = 0
3095
3096 struct GEN8_3DSTATE_MONOFILTER_SIZE {
3097 uint32_t CommandType;
3098 uint32_t CommandSubType;
3099 uint32_t _3DCommandOpcode;
3100 uint32_t _3DCommandSubOpcode;
3101 uint32_t DwordLength;
3102 uint32_t MonochromeFilterWidth;
3103 uint32_t MonochromeFilterHeight;
3104 };
3105
3106 static inline void
3107 GEN8_3DSTATE_MONOFILTER_SIZE_pack(__gen_user_data *data, void * restrict dst,
3108 const struct GEN8_3DSTATE_MONOFILTER_SIZE * restrict values)
3109 {
3110 uint32_t *dw = (uint32_t * restrict) dst;
3111
3112 dw[0] =
3113 __gen_field(values->CommandType, 29, 31) |
3114 __gen_field(values->CommandSubType, 27, 28) |
3115 __gen_field(values->_3DCommandOpcode, 24, 26) |
3116 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3117 __gen_field(values->DwordLength, 0, 7) |
3118 0;
3119
3120 dw[1] =
3121 __gen_field(values->MonochromeFilterWidth, 3, 5) |
3122 __gen_field(values->MonochromeFilterHeight, 0, 2) |
3123 0;
3124
3125 }
3126
3127 #define GEN8_3DSTATE_MULTISAMPLE_length 0x00000002
3128 #define GEN8_3DSTATE_MULTISAMPLE_length_bias 0x00000002
3129 #define GEN8_3DSTATE_MULTISAMPLE_header \
3130 .CommandType = 3, \
3131 .CommandSubType = 3, \
3132 ._3DCommandOpcode = 0, \
3133 ._3DCommandSubOpcode = 13, \
3134 .DwordLength = 0
3135
3136 struct GEN8_3DSTATE_MULTISAMPLE {
3137 uint32_t CommandType;
3138 uint32_t CommandSubType;
3139 uint32_t _3DCommandOpcode;
3140 uint32_t _3DCommandSubOpcode;
3141 uint32_t DwordLength;
3142 uint32_t PixelPositionOffsetEnable;
3143 #define CENTER 0
3144 #define UL_CORNER 1
3145 uint32_t PixelLocation;
3146 uint32_t NumberofMultisamples;
3147 };
3148
3149 static inline void
3150 GEN8_3DSTATE_MULTISAMPLE_pack(__gen_user_data *data, void * restrict dst,
3151 const struct GEN8_3DSTATE_MULTISAMPLE * restrict values)
3152 {
3153 uint32_t *dw = (uint32_t * restrict) dst;
3154
3155 dw[0] =
3156 __gen_field(values->CommandType, 29, 31) |
3157 __gen_field(values->CommandSubType, 27, 28) |
3158 __gen_field(values->_3DCommandOpcode, 24, 26) |
3159 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3160 __gen_field(values->DwordLength, 0, 7) |
3161 0;
3162
3163 dw[1] =
3164 __gen_field(values->PixelPositionOffsetEnable, 5, 5) |
3165 __gen_field(values->PixelLocation, 4, 4) |
3166 __gen_field(values->NumberofMultisamples, 1, 3) |
3167 0;
3168
3169 }
3170
3171 #define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_length 0x00000002
3172 #define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_length_bias 0x00000002
3173 #define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_header \
3174 .CommandType = 3, \
3175 .CommandSubType = 3, \
3176 ._3DCommandOpcode = 1, \
3177 ._3DCommandSubOpcode = 6, \
3178 .DwordLength = 0
3179
3180 struct GEN8_3DSTATE_POLY_STIPPLE_OFFSET {
3181 uint32_t CommandType;
3182 uint32_t CommandSubType;
3183 uint32_t _3DCommandOpcode;
3184 uint32_t _3DCommandSubOpcode;
3185 uint32_t DwordLength;
3186 uint32_t PolygonStippleXOffset;
3187 uint32_t PolygonStippleYOffset;
3188 };
3189
3190 static inline void
3191 GEN8_3DSTATE_POLY_STIPPLE_OFFSET_pack(__gen_user_data *data, void * restrict dst,
3192 const struct GEN8_3DSTATE_POLY_STIPPLE_OFFSET * restrict values)
3193 {
3194 uint32_t *dw = (uint32_t * restrict) dst;
3195
3196 dw[0] =
3197 __gen_field(values->CommandType, 29, 31) |
3198 __gen_field(values->CommandSubType, 27, 28) |
3199 __gen_field(values->_3DCommandOpcode, 24, 26) |
3200 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3201 __gen_field(values->DwordLength, 0, 7) |
3202 0;
3203
3204 dw[1] =
3205 __gen_field(values->PolygonStippleXOffset, 8, 12) |
3206 __gen_field(values->PolygonStippleYOffset, 0, 4) |
3207 0;
3208
3209 }
3210
3211 #define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_length 0x00000021
3212 #define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_length_bias 0x00000002
3213 #define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_header\
3214 .CommandType = 3, \
3215 .CommandSubType = 3, \
3216 ._3DCommandOpcode = 1, \
3217 ._3DCommandSubOpcode = 7, \
3218 .DwordLength = 31
3219
3220 struct GEN8_3DSTATE_POLY_STIPPLE_PATTERN {
3221 uint32_t CommandType;
3222 uint32_t CommandSubType;
3223 uint32_t _3DCommandOpcode;
3224 uint32_t _3DCommandSubOpcode;
3225 uint32_t DwordLength;
3226 uint32_t PatternRow;
3227 };
3228
3229 static inline void
3230 GEN8_3DSTATE_POLY_STIPPLE_PATTERN_pack(__gen_user_data *data, void * restrict dst,
3231 const struct GEN8_3DSTATE_POLY_STIPPLE_PATTERN * restrict values)
3232 {
3233 uint32_t *dw = (uint32_t * restrict) dst;
3234
3235 dw[0] =
3236 __gen_field(values->CommandType, 29, 31) |
3237 __gen_field(values->CommandSubType, 27, 28) |
3238 __gen_field(values->_3DCommandOpcode, 24, 26) |
3239 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3240 __gen_field(values->DwordLength, 0, 7) |
3241 0;
3242
3243 dw[1] =
3244 __gen_field(values->PatternRow, 0, 31) |
3245 0;
3246
3247 }
3248
3249 #define GEN8_3DSTATE_PS_length 0x0000000c
3250 #define GEN8_3DSTATE_PS_length_bias 0x00000002
3251 #define GEN8_3DSTATE_PS_header \
3252 .CommandType = 3, \
3253 .CommandSubType = 3, \
3254 ._3DCommandOpcode = 0, \
3255 ._3DCommandSubOpcode = 32, \
3256 .DwordLength = 10
3257
3258 struct GEN8_3DSTATE_PS {
3259 uint32_t CommandType;
3260 uint32_t CommandSubType;
3261 uint32_t _3DCommandOpcode;
3262 uint32_t _3DCommandSubOpcode;
3263 uint32_t DwordLength;
3264 uint64_t KernelStartPointer0;
3265 #define Multiple 0
3266 #define Single 1
3267 uint32_t SingleProgramFlow;
3268 #define Dmask 0
3269 #define Vmask 1
3270 uint32_t VectorMaskEnable;
3271 #define NoSamplers 0
3272 #define _14Samplers 1
3273 #define _58Samplers 2
3274 #define _912Samplers 3
3275 #define _1316Samplers 4
3276 uint32_t SamplerCount;
3277 #define FlushedtoZero 0
3278 #define Retained 1
3279 uint32_t SinglePrecisionDenormalMode;
3280 uint32_t BindingTableEntryCount;
3281 #define Normal 0
3282 #define High 1
3283 uint32_t ThreadDispatchPriority;
3284 #define IEEE754 0
3285 #define Alternate 1
3286 uint32_t FloatingPointMode;
3287 #define RTNE 0
3288 #define RU 1
3289 #define RD 2
3290 #define RTZ 3
3291 uint32_t RoundingMode;
3292 uint32_t IllegalOpcodeExceptionEnable;
3293 uint32_t MaskStackExceptionEnable;
3294 uint32_t SoftwareExceptionEnable;
3295 __gen_address_type ScratchSpaceBasePointer;
3296 uint32_t PerThreadScratchSpace;
3297 uint32_t MaximumNumberofThreadsPerPSD;
3298 uint32_t PushConstantEnable;
3299 uint32_t RenderTargetFastClearEnable;
3300 uint32_t RenderTargetResolveEnable;
3301 #define POSOFFSET_NONE 0
3302 #define POSOFFSET_CENTROID 2
3303 #define POSOFFSET_SAMPLE 3
3304 uint32_t PositionXYOffsetSelect;
3305 uint32_t _32PixelDispatchEnable;
3306 uint32_t _16PixelDispatchEnable;
3307 uint32_t _8PixelDispatchEnable;
3308 uint32_t DispatchGRFStartRegisterForConstantSetupData0;
3309 uint32_t DispatchGRFStartRegisterForConstantSetupData1;
3310 uint32_t DispatchGRFStartRegisterForConstantSetupData2;
3311 uint64_t KernelStartPointer1;
3312 uint64_t KernelStartPointer2;
3313 };
3314
3315 static inline void
3316 GEN8_3DSTATE_PS_pack(__gen_user_data *data, void * restrict dst,
3317 const struct GEN8_3DSTATE_PS * restrict values)
3318 {
3319 uint32_t *dw = (uint32_t * restrict) dst;
3320
3321 dw[0] =
3322 __gen_field(values->CommandType, 29, 31) |
3323 __gen_field(values->CommandSubType, 27, 28) |
3324 __gen_field(values->_3DCommandOpcode, 24, 26) |
3325 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3326 __gen_field(values->DwordLength, 0, 7) |
3327 0;
3328
3329 uint64_t qw1 =
3330 __gen_offset(values->KernelStartPointer0, 6, 63) |
3331 0;
3332
3333 dw[1] = qw1;
3334 dw[2] = qw1 >> 32;
3335
3336 dw[3] =
3337 __gen_field(values->SingleProgramFlow, 31, 31) |
3338 __gen_field(values->VectorMaskEnable, 30, 30) |
3339 __gen_field(values->SamplerCount, 27, 29) |
3340 __gen_field(values->SinglePrecisionDenormalMode, 26, 26) |
3341 __gen_field(values->BindingTableEntryCount, 18, 25) |
3342 __gen_field(values->ThreadDispatchPriority, 17, 17) |
3343 __gen_field(values->FloatingPointMode, 16, 16) |
3344 __gen_field(values->RoundingMode, 14, 15) |
3345 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
3346 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
3347 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
3348 0;
3349
3350 uint32_t dw4 =
3351 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
3352 __gen_field(values->PerThreadScratchSpace, 0, 3) |
3353 0;
3354
3355 uint64_t qw4 =
3356 __gen_combine_address(data, &dw[4], values->ScratchSpaceBasePointer, dw4);
3357
3358 dw[4] = qw4;
3359 dw[5] = qw4 >> 32;
3360
3361 dw[6] =
3362 __gen_field(values->MaximumNumberofThreadsPerPSD, 23, 31) |
3363 __gen_field(values->PushConstantEnable, 11, 11) |
3364 __gen_field(values->RenderTargetFastClearEnable, 8, 8) |
3365 __gen_field(values->RenderTargetResolveEnable, 6, 6) |
3366 __gen_field(values->PositionXYOffsetSelect, 3, 4) |
3367 __gen_field(values->_32PixelDispatchEnable, 2, 2) |
3368 __gen_field(values->_16PixelDispatchEnable, 1, 1) |
3369 __gen_field(values->_8PixelDispatchEnable, 0, 0) |
3370 0;
3371
3372 dw[7] =
3373 __gen_field(values->DispatchGRFStartRegisterForConstantSetupData0, 16, 22) |
3374 __gen_field(values->DispatchGRFStartRegisterForConstantSetupData1, 8, 14) |
3375 __gen_field(values->DispatchGRFStartRegisterForConstantSetupData2, 0, 6) |
3376 0;
3377
3378 uint64_t qw8 =
3379 __gen_offset(values->KernelStartPointer1, 6, 63) |
3380 0;
3381
3382 dw[8] = qw8;
3383 dw[9] = qw8 >> 32;
3384
3385 uint64_t qw10 =
3386 __gen_offset(values->KernelStartPointer2, 6, 63) |
3387 0;
3388
3389 dw[10] = qw10;
3390 dw[11] = qw10 >> 32;
3391
3392 }
3393
3394 #define GEN8_3DSTATE_PS_BLEND_length 0x00000002
3395 #define GEN8_3DSTATE_PS_BLEND_length_bias 0x00000002
3396 #define GEN8_3DSTATE_PS_BLEND_header \
3397 .CommandType = 3, \
3398 .CommandSubType = 3, \
3399 ._3DCommandOpcode = 0, \
3400 ._3DCommandSubOpcode = 77, \
3401 .DwordLength = 0
3402
3403 struct GEN8_3DSTATE_PS_BLEND {
3404 uint32_t CommandType;
3405 uint32_t CommandSubType;
3406 uint32_t _3DCommandOpcode;
3407 uint32_t _3DCommandSubOpcode;
3408 uint32_t DwordLength;
3409 uint32_t AlphaToCoverageEnable;
3410 uint32_t HasWriteableRT;
3411 uint32_t ColorBufferBlendEnable;
3412 uint32_t SourceAlphaBlendFactor;
3413 uint32_t DestinationAlphaBlendFactor;
3414 uint32_t SourceBlendFactor;
3415 uint32_t DestinationBlendFactor;
3416 uint32_t AlphaTestEnable;
3417 uint32_t IndependentAlphaBlendEnable;
3418 };
3419
3420 static inline void
3421 GEN8_3DSTATE_PS_BLEND_pack(__gen_user_data *data, void * restrict dst,
3422 const struct GEN8_3DSTATE_PS_BLEND * restrict values)
3423 {
3424 uint32_t *dw = (uint32_t * restrict) dst;
3425
3426 dw[0] =
3427 __gen_field(values->CommandType, 29, 31) |
3428 __gen_field(values->CommandSubType, 27, 28) |
3429 __gen_field(values->_3DCommandOpcode, 24, 26) |
3430 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3431 __gen_field(values->DwordLength, 0, 7) |
3432 0;
3433
3434 dw[1] =
3435 __gen_field(values->AlphaToCoverageEnable, 31, 31) |
3436 __gen_field(values->HasWriteableRT, 30, 30) |
3437 __gen_field(values->ColorBufferBlendEnable, 29, 29) |
3438 __gen_field(values->SourceAlphaBlendFactor, 24, 28) |
3439 __gen_field(values->DestinationAlphaBlendFactor, 19, 23) |
3440 __gen_field(values->SourceBlendFactor, 14, 18) |
3441 __gen_field(values->DestinationBlendFactor, 9, 13) |
3442 __gen_field(values->AlphaTestEnable, 8, 8) |
3443 __gen_field(values->IndependentAlphaBlendEnable, 7, 7) |
3444 0;
3445
3446 }
3447
3448 #define GEN8_3DSTATE_PS_EXTRA_length 0x00000002
3449 #define GEN8_3DSTATE_PS_EXTRA_length_bias 0x00000002
3450 #define GEN8_3DSTATE_PS_EXTRA_header \
3451 .CommandType = 3, \
3452 .CommandSubType = 3, \
3453 ._3DCommandOpcode = 0, \
3454 ._3DCommandSubOpcode = 79, \
3455 .DwordLength = 0
3456
3457 struct GEN8_3DSTATE_PS_EXTRA {
3458 uint32_t CommandType;
3459 uint32_t CommandSubType;
3460 uint32_t _3DCommandOpcode;
3461 uint32_t _3DCommandSubOpcode;
3462 uint32_t DwordLength;
3463 uint32_t PixelShaderValid;
3464 uint32_t PixelShaderDoesnotwritetoRT;
3465 uint32_t oMaskPresenttoRenderTarget;
3466 uint32_t PixelShaderKillsPixel;
3467 #define PSCDEPTH_OFF 0
3468 #define PSCDEPTH_ON 1
3469 #define PSCDEPTH_ON_GE 2
3470 #define PSCDEPTH_ON_LE 3
3471 uint32_t PixelShaderComputedDepthMode;
3472 uint32_t ForceComputedDepth;
3473 uint32_t PixelShaderUsesSourceDepth;
3474 uint32_t PixelShaderUsesSourceW;
3475 uint32_t Removed;
3476 uint32_t AttributeEnable;
3477 uint32_t PixelShaderDisablesAlphaToCoverage;
3478 uint32_t PixelShaderIsPerSample;
3479 uint32_t PixelShaderHasUAV;
3480 uint32_t PixelShaderUsesInputCoverageMask;
3481 };
3482
3483 static inline void
3484 GEN8_3DSTATE_PS_EXTRA_pack(__gen_user_data *data, void * restrict dst,
3485 const struct GEN8_3DSTATE_PS_EXTRA * restrict values)
3486 {
3487 uint32_t *dw = (uint32_t * restrict) dst;
3488
3489 dw[0] =
3490 __gen_field(values->CommandType, 29, 31) |
3491 __gen_field(values->CommandSubType, 27, 28) |
3492 __gen_field(values->_3DCommandOpcode, 24, 26) |
3493 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3494 __gen_field(values->DwordLength, 0, 7) |
3495 0;
3496
3497 dw[1] =
3498 __gen_field(values->PixelShaderValid, 31, 31) |
3499 __gen_field(values->PixelShaderDoesnotwritetoRT, 30, 30) |
3500 __gen_field(values->oMaskPresenttoRenderTarget, 29, 29) |
3501 __gen_field(values->PixelShaderKillsPixel, 28, 28) |
3502 __gen_field(values->PixelShaderComputedDepthMode, 26, 27) |
3503 __gen_field(values->ForceComputedDepth, 25, 25) |
3504 __gen_field(values->PixelShaderUsesSourceDepth, 24, 24) |
3505 __gen_field(values->PixelShaderUsesSourceW, 23, 23) |
3506 __gen_field(values->Removed, 17, 17) |
3507 __gen_field(values->AttributeEnable, 8, 8) |
3508 __gen_field(values->PixelShaderDisablesAlphaToCoverage, 7, 7) |
3509 __gen_field(values->PixelShaderIsPerSample, 6, 6) |
3510 __gen_field(values->PixelShaderHasUAV, 2, 2) |
3511 __gen_field(values->PixelShaderUsesInputCoverageMask, 1, 1) |
3512 0;
3513
3514 }
3515
3516 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length 0x00000002
3517 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length_bias 0x00000002
3518 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_header\
3519 .CommandType = 3, \
3520 .CommandSubType = 3, \
3521 ._3DCommandOpcode = 1, \
3522 ._3DCommandSubOpcode = 20, \
3523 .DwordLength = 0
3524
3525 struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS {
3526 uint32_t CommandType;
3527 uint32_t CommandSubType;
3528 uint32_t _3DCommandOpcode;
3529 uint32_t _3DCommandSubOpcode;
3530 uint32_t DwordLength;
3531 uint32_t ConstantBufferOffset;
3532 uint32_t ConstantBufferSize;
3533 };
3534
3535 static inline void
3536 GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_pack(__gen_user_data *data, void * restrict dst,
3537 const struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS * restrict values)
3538 {
3539 uint32_t *dw = (uint32_t * restrict) dst;
3540
3541 dw[0] =
3542 __gen_field(values->CommandType, 29, 31) |
3543 __gen_field(values->CommandSubType, 27, 28) |
3544 __gen_field(values->_3DCommandOpcode, 24, 26) |
3545 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3546 __gen_field(values->DwordLength, 0, 7) |
3547 0;
3548
3549 dw[1] =
3550 __gen_field(values->ConstantBufferOffset, 16, 20) |
3551 __gen_field(values->ConstantBufferSize, 0, 5) |
3552 0;
3553
3554 }
3555
3556 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length 0x00000002
3557 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length_bias 0x00000002
3558 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_header\
3559 .CommandType = 3, \
3560 .CommandSubType = 3, \
3561 ._3DCommandOpcode = 1, \
3562 ._3DCommandSubOpcode = 21, \
3563 .DwordLength = 0
3564
3565 struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS {
3566 uint32_t CommandType;
3567 uint32_t CommandSubType;
3568 uint32_t _3DCommandOpcode;
3569 uint32_t _3DCommandSubOpcode;
3570 uint32_t DwordLength;
3571 uint32_t ConstantBufferOffset;
3572 uint32_t ConstantBufferSize;
3573 };
3574
3575 static inline void
3576 GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_pack(__gen_user_data *data, void * restrict dst,
3577 const struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS * restrict values)
3578 {
3579 uint32_t *dw = (uint32_t * restrict) dst;
3580
3581 dw[0] =
3582 __gen_field(values->CommandType, 29, 31) |
3583 __gen_field(values->CommandSubType, 27, 28) |
3584 __gen_field(values->_3DCommandOpcode, 24, 26) |
3585 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3586 __gen_field(values->DwordLength, 0, 7) |
3587 0;
3588
3589 dw[1] =
3590 __gen_field(values->ConstantBufferOffset, 16, 20) |
3591 __gen_field(values->ConstantBufferSize, 0, 5) |
3592 0;
3593
3594 }
3595
3596 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length 0x00000002
3597 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length_bias 0x00000002
3598 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_header\
3599 .CommandType = 3, \
3600 .CommandSubType = 3, \
3601 ._3DCommandOpcode = 1, \
3602 ._3DCommandSubOpcode = 19, \
3603 .DwordLength = 0
3604
3605 struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS {
3606 uint32_t CommandType;
3607 uint32_t CommandSubType;
3608 uint32_t _3DCommandOpcode;
3609 uint32_t _3DCommandSubOpcode;
3610 uint32_t DwordLength;
3611 uint32_t ConstantBufferOffset;
3612 uint32_t ConstantBufferSize;
3613 };
3614
3615 static inline void
3616 GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_pack(__gen_user_data *data, void * restrict dst,
3617 const struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS * restrict values)
3618 {
3619 uint32_t *dw = (uint32_t * restrict) dst;
3620
3621 dw[0] =
3622 __gen_field(values->CommandType, 29, 31) |
3623 __gen_field(values->CommandSubType, 27, 28) |
3624 __gen_field(values->_3DCommandOpcode, 24, 26) |
3625 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3626 __gen_field(values->DwordLength, 0, 7) |
3627 0;
3628
3629 dw[1] =
3630 __gen_field(values->ConstantBufferOffset, 16, 20) |
3631 __gen_field(values->ConstantBufferSize, 0, 5) |
3632 0;
3633
3634 }
3635
3636 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length 0x00000002
3637 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length_bias 0x00000002
3638 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_header\
3639 .CommandType = 3, \
3640 .CommandSubType = 3, \
3641 ._3DCommandOpcode = 1, \
3642 ._3DCommandSubOpcode = 22, \
3643 .DwordLength = 0
3644
3645 struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS {
3646 uint32_t CommandType;
3647 uint32_t CommandSubType;
3648 uint32_t _3DCommandOpcode;
3649 uint32_t _3DCommandSubOpcode;
3650 uint32_t DwordLength;
3651 uint32_t ConstantBufferOffset;
3652 uint32_t ConstantBufferSize;
3653 };
3654
3655 static inline void
3656 GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_pack(__gen_user_data *data, void * restrict dst,
3657 const struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS * restrict values)
3658 {
3659 uint32_t *dw = (uint32_t * restrict) dst;
3660
3661 dw[0] =
3662 __gen_field(values->CommandType, 29, 31) |
3663 __gen_field(values->CommandSubType, 27, 28) |
3664 __gen_field(values->_3DCommandOpcode, 24, 26) |
3665 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3666 __gen_field(values->DwordLength, 0, 7) |
3667 0;
3668
3669 dw[1] =
3670 __gen_field(values->ConstantBufferOffset, 16, 20) |
3671 __gen_field(values->ConstantBufferSize, 0, 5) |
3672 0;
3673
3674 }
3675
3676 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length 0x00000002
3677 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length_bias 0x00000002
3678 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_header\
3679 .CommandType = 3, \
3680 .CommandSubType = 3, \
3681 ._3DCommandOpcode = 1, \
3682 ._3DCommandSubOpcode = 18, \
3683 .DwordLength = 0
3684
3685 struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS {
3686 uint32_t CommandType;
3687 uint32_t CommandSubType;
3688 uint32_t _3DCommandOpcode;
3689 uint32_t _3DCommandSubOpcode;
3690 uint32_t DwordLength;
3691 uint32_t ConstantBufferOffset;
3692 uint32_t ConstantBufferSize;
3693 };
3694
3695 static inline void
3696 GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_pack(__gen_user_data *data, void * restrict dst,
3697 const struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS * restrict values)
3698 {
3699 uint32_t *dw = (uint32_t * restrict) dst;
3700
3701 dw[0] =
3702 __gen_field(values->CommandType, 29, 31) |
3703 __gen_field(values->CommandSubType, 27, 28) |
3704 __gen_field(values->_3DCommandOpcode, 24, 26) |
3705 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3706 __gen_field(values->DwordLength, 0, 7) |
3707 0;
3708
3709 dw[1] =
3710 __gen_field(values->ConstantBufferOffset, 16, 20) |
3711 __gen_field(values->ConstantBufferSize, 0, 5) |
3712 0;
3713
3714 }
3715
3716 #define GEN8_3DSTATE_RASTER_length 0x00000005
3717 #define GEN8_3DSTATE_RASTER_length_bias 0x00000002
3718 #define GEN8_3DSTATE_RASTER_header \
3719 .CommandType = 3, \
3720 .CommandSubType = 3, \
3721 ._3DCommandOpcode = 0, \
3722 ._3DCommandSubOpcode = 80, \
3723 .DwordLength = 3
3724
3725 struct GEN8_3DSTATE_RASTER {
3726 uint32_t CommandType;
3727 uint32_t CommandSubType;
3728 uint32_t _3DCommandOpcode;
3729 uint32_t _3DCommandSubOpcode;
3730 uint32_t DwordLength;
3731 #define DX9OGL 0
3732 #define DX100 1
3733 #define DX101 2
3734 uint32_t APIMode;
3735 #define Clockwise 0
3736 #define CounterClockwise 1
3737 uint32_t FrontWinding;
3738 #define FSC_NUMRASTSAMPLES_0 0
3739 #define FSC_NUMRASTSAMPLES_1 1
3740 #define FSC_NUMRASTSAMPLES_2 2
3741 #define FSC_NUMRASTSAMPLES_4 3
3742 #define FSC_NUMRASTSAMPLES_8 4
3743 #define FSC_NUMRASTSAMPLES_16 5
3744 uint32_t ForcedSampleCount;
3745 #define CULLMODE_BOTH 0
3746 #define CULLMODE_NONE 1
3747 #define CULLMODE_FRONT 2
3748 #define CULLMODE_BACK 3
3749 uint32_t CullMode;
3750 #define Normal 0
3751 #define Force 1
3752 uint32_t ForceMultisampling;
3753 uint32_t SmoothPointEnable;
3754 uint32_t DXMultisampleRasterizationEnable;
3755 #define MSRASTMODE_OFF_PIXEL 0
3756 #define MSRASTMODE_OFF_PATTERN 1
3757 #define MSRASTMODE_ON_PIXEL 2
3758 #define MSRASTMODE_ON_PATTERN 3
3759 uint32_t DXMultisampleRasterizationMode;
3760 uint32_t GlobalDepthOffsetEnableSolid;
3761 uint32_t GlobalDepthOffsetEnableWireframe;
3762 uint32_t GlobalDepthOffsetEnablePoint;
3763 #define RASTER_SOLID 0
3764 #define RASTER_WIREFRAME 1
3765 #define RASTER_POINT 2
3766 uint32_t FrontFaceFillMode;
3767 #define RASTER_SOLID 0
3768 #define RASTER_WIREFRAME 1
3769 #define RASTER_POINT 2
3770 uint32_t BackFaceFillMode;
3771 uint32_t AntialiasingEnable;
3772 uint32_t ScissorRectangleEnable;
3773 uint32_t ViewportZClipTestEnable;
3774 float GlobalDepthOffsetConstant;
3775 float GlobalDepthOffsetScale;
3776 float GlobalDepthOffsetClamp;
3777 };
3778
3779 static inline void
3780 GEN8_3DSTATE_RASTER_pack(__gen_user_data *data, void * restrict dst,
3781 const struct GEN8_3DSTATE_RASTER * restrict values)
3782 {
3783 uint32_t *dw = (uint32_t * restrict) dst;
3784
3785 dw[0] =
3786 __gen_field(values->CommandType, 29, 31) |
3787 __gen_field(values->CommandSubType, 27, 28) |
3788 __gen_field(values->_3DCommandOpcode, 24, 26) |
3789 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3790 __gen_field(values->DwordLength, 0, 7) |
3791 0;
3792
3793 dw[1] =
3794 __gen_field(values->APIMode, 22, 23) |
3795 __gen_field(values->FrontWinding, 21, 21) |
3796 __gen_field(values->ForcedSampleCount, 18, 20) |
3797 __gen_field(values->CullMode, 16, 17) |
3798 __gen_field(values->ForceMultisampling, 14, 14) |
3799 __gen_field(values->SmoothPointEnable, 13, 13) |
3800 __gen_field(values->DXMultisampleRasterizationEnable, 12, 12) |
3801 __gen_field(values->DXMultisampleRasterizationMode, 10, 11) |
3802 __gen_field(values->GlobalDepthOffsetEnableSolid, 9, 9) |
3803 __gen_field(values->GlobalDepthOffsetEnableWireframe, 8, 8) |
3804 __gen_field(values->GlobalDepthOffsetEnablePoint, 7, 7) |
3805 __gen_field(values->FrontFaceFillMode, 5, 6) |
3806 __gen_field(values->BackFaceFillMode, 3, 4) |
3807 __gen_field(values->AntialiasingEnable, 2, 2) |
3808 __gen_field(values->ScissorRectangleEnable, 1, 1) |
3809 __gen_field(values->ViewportZClipTestEnable, 0, 0) |
3810 0;
3811
3812 dw[2] =
3813 __gen_float(values->GlobalDepthOffsetConstant) |
3814 0;
3815
3816 dw[3] =
3817 __gen_float(values->GlobalDepthOffsetScale) |
3818 0;
3819
3820 dw[4] =
3821 __gen_float(values->GlobalDepthOffsetClamp) |
3822 0;
3823
3824 }
3825
3826 #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_length_bias 0x00000002
3827 #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_header\
3828 .CommandType = 3, \
3829 .CommandSubType = 3, \
3830 ._3DCommandOpcode = 1, \
3831 ._3DCommandSubOpcode = 2
3832
3833 struct GEN8_PALETTE_ENTRY {
3834 uint32_t Alpha;
3835 uint32_t Red;
3836 uint32_t Green;
3837 uint32_t Blue;
3838 };
3839
3840 static inline void
3841 GEN8_PALETTE_ENTRY_pack(__gen_user_data *data, void * restrict dst,
3842 const struct GEN8_PALETTE_ENTRY * restrict values)
3843 {
3844 uint32_t *dw = (uint32_t * restrict) dst;
3845
3846 dw[0] =
3847 __gen_field(values->Alpha, 24, 31) |
3848 __gen_field(values->Red, 16, 23) |
3849 __gen_field(values->Green, 8, 15) |
3850 __gen_field(values->Blue, 0, 7) |
3851 0;
3852
3853 }
3854
3855 struct GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0 {
3856 uint32_t CommandType;
3857 uint32_t CommandSubType;
3858 uint32_t _3DCommandOpcode;
3859 uint32_t _3DCommandSubOpcode;
3860 uint32_t DwordLength;
3861 /* variable length fields follow */
3862 };
3863
3864 static inline void
3865 GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_pack(__gen_user_data *data, void * restrict dst,
3866 const struct GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0 * restrict values)
3867 {
3868 uint32_t *dw = (uint32_t * restrict) dst;
3869
3870 dw[0] =
3871 __gen_field(values->CommandType, 29, 31) |
3872 __gen_field(values->CommandSubType, 27, 28) |
3873 __gen_field(values->_3DCommandOpcode, 24, 26) |
3874 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3875 __gen_field(values->DwordLength, 0, 7) |
3876 0;
3877
3878 /* variable length fields follow */
3879 }
3880
3881 #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_length_bias 0x00000002
3882 #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_header\
3883 .CommandType = 3, \
3884 .CommandSubType = 3, \
3885 ._3DCommandOpcode = 1, \
3886 ._3DCommandSubOpcode = 12
3887
3888 struct GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1 {
3889 uint32_t CommandType;
3890 uint32_t CommandSubType;
3891 uint32_t _3DCommandOpcode;
3892 uint32_t _3DCommandSubOpcode;
3893 uint32_t DwordLength;
3894 /* variable length fields follow */
3895 };
3896
3897 static inline void
3898 GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_pack(__gen_user_data *data, void * restrict dst,
3899 const struct GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1 * restrict values)
3900 {
3901 uint32_t *dw = (uint32_t * restrict) dst;
3902
3903 dw[0] =
3904 __gen_field(values->CommandType, 29, 31) |
3905 __gen_field(values->CommandSubType, 27, 28) |
3906 __gen_field(values->_3DCommandOpcode, 24, 26) |
3907 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3908 __gen_field(values->DwordLength, 0, 7) |
3909 0;
3910
3911 /* variable length fields follow */
3912 }
3913
3914 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_length 0x00000002
3915 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_length_bias 0x00000002
3916 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_header\
3917 .CommandType = 3, \
3918 .CommandSubType = 3, \
3919 ._3DCommandOpcode = 0, \
3920 ._3DCommandSubOpcode = 45, \
3921 .DwordLength = 0
3922
3923 struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS {
3924 uint32_t CommandType;
3925 uint32_t CommandSubType;
3926 uint32_t _3DCommandOpcode;
3927 uint32_t _3DCommandSubOpcode;
3928 uint32_t DwordLength;
3929 uint32_t PointertoDSSamplerState;
3930 };
3931
3932 static inline void
3933 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
3934 const struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS * restrict values)
3935 {
3936 uint32_t *dw = (uint32_t * restrict) dst;
3937
3938 dw[0] =
3939 __gen_field(values->CommandType, 29, 31) |
3940 __gen_field(values->CommandSubType, 27, 28) |
3941 __gen_field(values->_3DCommandOpcode, 24, 26) |
3942 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3943 __gen_field(values->DwordLength, 0, 7) |
3944 0;
3945
3946 dw[1] =
3947 __gen_offset(values->PointertoDSSamplerState, 5, 31) |
3948 0;
3949
3950 }
3951
3952 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_length 0x00000002
3953 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_length_bias 0x00000002
3954 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_header\
3955 .CommandType = 3, \
3956 .CommandSubType = 3, \
3957 ._3DCommandOpcode = 0, \
3958 ._3DCommandSubOpcode = 46, \
3959 .DwordLength = 0
3960
3961 struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS {
3962 uint32_t CommandType;
3963 uint32_t CommandSubType;
3964 uint32_t _3DCommandOpcode;
3965 uint32_t _3DCommandSubOpcode;
3966 uint32_t DwordLength;
3967 uint32_t PointertoGSSamplerState;
3968 };
3969
3970 static inline void
3971 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
3972 const struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS * restrict values)
3973 {
3974 uint32_t *dw = (uint32_t * restrict) dst;
3975
3976 dw[0] =
3977 __gen_field(values->CommandType, 29, 31) |
3978 __gen_field(values->CommandSubType, 27, 28) |
3979 __gen_field(values->_3DCommandOpcode, 24, 26) |
3980 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3981 __gen_field(values->DwordLength, 0, 7) |
3982 0;
3983
3984 dw[1] =
3985 __gen_offset(values->PointertoGSSamplerState, 5, 31) |
3986 0;
3987
3988 }
3989
3990 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_length 0x00000002
3991 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_length_bias 0x00000002
3992 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_header\
3993 .CommandType = 3, \
3994 .CommandSubType = 3, \
3995 ._3DCommandOpcode = 0, \
3996 ._3DCommandSubOpcode = 44, \
3997 .DwordLength = 0
3998
3999 struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS {
4000 uint32_t CommandType;
4001 uint32_t CommandSubType;
4002 uint32_t _3DCommandOpcode;
4003 uint32_t _3DCommandSubOpcode;
4004 uint32_t DwordLength;
4005 uint32_t PointertoHSSamplerState;
4006 };
4007
4008 static inline void
4009 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
4010 const struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS * restrict values)
4011 {
4012 uint32_t *dw = (uint32_t * restrict) dst;
4013
4014 dw[0] =
4015 __gen_field(values->CommandType, 29, 31) |
4016 __gen_field(values->CommandSubType, 27, 28) |
4017 __gen_field(values->_3DCommandOpcode, 24, 26) |
4018 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4019 __gen_field(values->DwordLength, 0, 7) |
4020 0;
4021
4022 dw[1] =
4023 __gen_offset(values->PointertoHSSamplerState, 5, 31) |
4024 0;
4025
4026 }
4027
4028 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_length 0x00000002
4029 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_length_bias 0x00000002
4030 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_header\
4031 .CommandType = 3, \
4032 .CommandSubType = 3, \
4033 ._3DCommandOpcode = 0, \
4034 ._3DCommandSubOpcode = 47, \
4035 .DwordLength = 0
4036
4037 struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS {
4038 uint32_t CommandType;
4039 uint32_t CommandSubType;
4040 uint32_t _3DCommandOpcode;
4041 uint32_t _3DCommandSubOpcode;
4042 uint32_t DwordLength;
4043 uint32_t PointertoPSSamplerState;
4044 };
4045
4046 static inline void
4047 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
4048 const struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS * restrict values)
4049 {
4050 uint32_t *dw = (uint32_t * restrict) dst;
4051
4052 dw[0] =
4053 __gen_field(values->CommandType, 29, 31) |
4054 __gen_field(values->CommandSubType, 27, 28) |
4055 __gen_field(values->_3DCommandOpcode, 24, 26) |
4056 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4057 __gen_field(values->DwordLength, 0, 7) |
4058 0;
4059
4060 dw[1] =
4061 __gen_offset(values->PointertoPSSamplerState, 5, 31) |
4062 0;
4063
4064 }
4065
4066 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_length 0x00000002
4067 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_length_bias 0x00000002
4068 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_header\
4069 .CommandType = 3, \
4070 .CommandSubType = 3, \
4071 ._3DCommandOpcode = 0, \
4072 ._3DCommandSubOpcode = 43, \
4073 .DwordLength = 0
4074
4075 struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS {
4076 uint32_t CommandType;
4077 uint32_t CommandSubType;
4078 uint32_t _3DCommandOpcode;
4079 uint32_t _3DCommandSubOpcode;
4080 uint32_t DwordLength;
4081 uint32_t PointertoVSSamplerState;
4082 };
4083
4084 static inline void
4085 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
4086 const struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS * restrict values)
4087 {
4088 uint32_t *dw = (uint32_t * restrict) dst;
4089
4090 dw[0] =
4091 __gen_field(values->CommandType, 29, 31) |
4092 __gen_field(values->CommandSubType, 27, 28) |
4093 __gen_field(values->_3DCommandOpcode, 24, 26) |
4094 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4095 __gen_field(values->DwordLength, 0, 7) |
4096 0;
4097
4098 dw[1] =
4099 __gen_offset(values->PointertoVSSamplerState, 5, 31) |
4100 0;
4101
4102 }
4103
4104 #define GEN8_3DSTATE_SAMPLE_MASK_length 0x00000002
4105 #define GEN8_3DSTATE_SAMPLE_MASK_length_bias 0x00000002
4106 #define GEN8_3DSTATE_SAMPLE_MASK_header \
4107 .CommandType = 3, \
4108 .CommandSubType = 3, \
4109 ._3DCommandOpcode = 0, \
4110 ._3DCommandSubOpcode = 24, \
4111 .DwordLength = 0
4112
4113 struct GEN8_3DSTATE_SAMPLE_MASK {
4114 uint32_t CommandType;
4115 uint32_t CommandSubType;
4116 uint32_t _3DCommandOpcode;
4117 uint32_t _3DCommandSubOpcode;
4118 uint32_t DwordLength;
4119 uint32_t SampleMask;
4120 };
4121
4122 static inline void
4123 GEN8_3DSTATE_SAMPLE_MASK_pack(__gen_user_data *data, void * restrict dst,
4124 const struct GEN8_3DSTATE_SAMPLE_MASK * restrict values)
4125 {
4126 uint32_t *dw = (uint32_t * restrict) dst;
4127
4128 dw[0] =
4129 __gen_field(values->CommandType, 29, 31) |
4130 __gen_field(values->CommandSubType, 27, 28) |
4131 __gen_field(values->_3DCommandOpcode, 24, 26) |
4132 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4133 __gen_field(values->DwordLength, 0, 7) |
4134 0;
4135
4136 dw[1] =
4137 __gen_field(values->SampleMask, 0, 15) |
4138 0;
4139
4140 }
4141
4142 #define GEN8_3DSTATE_SAMPLE_PATTERN_length 0x00000009
4143 #define GEN8_3DSTATE_SAMPLE_PATTERN_length_bias 0x00000002
4144 #define GEN8_3DSTATE_SAMPLE_PATTERN_header \
4145 .CommandType = 3, \
4146 .CommandSubType = 3, \
4147 ._3DCommandOpcode = 1, \
4148 ._3DCommandSubOpcode = 28, \
4149 .DwordLength = 7
4150
4151 struct GEN8_3DSTATE_SAMPLE_PATTERN {
4152 uint32_t CommandType;
4153 uint32_t CommandSubType;
4154 uint32_t _3DCommandOpcode;
4155 uint32_t _3DCommandSubOpcode;
4156 uint32_t DwordLength;
4157 float _8xSample7XOffset;
4158 float _8xSample7YOffset;
4159 float _8xSample6XOffset;
4160 float _8xSample6YOffset;
4161 float _8xSample5XOffset;
4162 float _8xSample5YOffset;
4163 float _8xSample4XOffset;
4164 float _8xSample4YOffset;
4165 float _8xSample3XOffset;
4166 float _8xSample3YOffset;
4167 float _8xSample2XOffset;
4168 float _8xSample2YOffset;
4169 float _8xSample1XOffset;
4170 float _8xSample1YOffset;
4171 float _8xSample0XOffset;
4172 float _8xSample0YOffset;
4173 float _4xSample3XOffset;
4174 float _4xSample3YOffset;
4175 float _4xSample2XOffset;
4176 float _4xSample2YOffset;
4177 float _4xSample1XOffset;
4178 float _4xSample1YOffset;
4179 float _4xSample0XOffset;
4180 float _4xSample0YOffset;
4181 float _1xSample0XOffset;
4182 float _1xSample0YOffset;
4183 float _2xSample1XOffset;
4184 float _2xSample1YOffset;
4185 float _2xSample0XOffset;
4186 float _2xSample0YOffset;
4187 };
4188
4189 static inline void
4190 GEN8_3DSTATE_SAMPLE_PATTERN_pack(__gen_user_data *data, void * restrict dst,
4191 const struct GEN8_3DSTATE_SAMPLE_PATTERN * restrict values)
4192 {
4193 uint32_t *dw = (uint32_t * restrict) dst;
4194
4195 dw[0] =
4196 __gen_field(values->CommandType, 29, 31) |
4197 __gen_field(values->CommandSubType, 27, 28) |
4198 __gen_field(values->_3DCommandOpcode, 24, 26) |
4199 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4200 __gen_field(values->DwordLength, 0, 7) |
4201 0;
4202
4203 dw[1] =
4204 0;
4205
4206 dw[5] =
4207 __gen_field(values->_8xSample7XOffset * (1 << 4), 28, 31) |
4208 __gen_field(values->_8xSample7YOffset * (1 << 4), 24, 27) |
4209 __gen_field(values->_8xSample6XOffset * (1 << 4), 20, 23) |
4210 __gen_field(values->_8xSample6YOffset * (1 << 4), 16, 19) |
4211 __gen_field(values->_8xSample5XOffset * (1 << 4), 12, 15) |
4212 __gen_field(values->_8xSample5YOffset * (1 << 4), 8, 11) |
4213 __gen_field(values->_8xSample4XOffset * (1 << 4), 4, 7) |
4214 __gen_field(values->_8xSample4YOffset * (1 << 4), 0, 3) |
4215 0;
4216
4217 dw[6] =
4218 __gen_field(values->_8xSample3XOffset * (1 << 4), 28, 31) |
4219 __gen_field(values->_8xSample3YOffset * (1 << 4), 24, 27) |
4220 __gen_field(values->_8xSample2XOffset * (1 << 4), 20, 23) |
4221 __gen_field(values->_8xSample2YOffset * (1 << 4), 16, 19) |
4222 __gen_field(values->_8xSample1XOffset * (1 << 4), 12, 15) |
4223 __gen_field(values->_8xSample1YOffset * (1 << 4), 8, 11) |
4224 __gen_field(values->_8xSample0XOffset * (1 << 4), 4, 7) |
4225 __gen_field(values->_8xSample0YOffset * (1 << 4), 0, 3) |
4226 0;
4227
4228 dw[7] =
4229 __gen_field(values->_4xSample3XOffset * (1 << 4), 28, 31) |
4230 __gen_field(values->_4xSample3YOffset * (1 << 4), 24, 27) |
4231 __gen_field(values->_4xSample2XOffset * (1 << 4), 20, 23) |
4232 __gen_field(values->_4xSample2YOffset * (1 << 4), 16, 19) |
4233 __gen_field(values->_4xSample1XOffset * (1 << 4), 12, 15) |
4234 __gen_field(values->_4xSample1YOffset * (1 << 4), 8, 11) |
4235 __gen_field(values->_4xSample0XOffset * (1 << 4), 4, 7) |
4236 __gen_field(values->_4xSample0YOffset * (1 << 4), 0, 3) |
4237 0;
4238
4239 dw[8] =
4240 __gen_field(values->_1xSample0XOffset * (1 << 4), 20, 23) |
4241 __gen_field(values->_1xSample0YOffset * (1 << 4), 16, 19) |
4242 __gen_field(values->_2xSample1XOffset * (1 << 4), 12, 15) |
4243 __gen_field(values->_2xSample1YOffset * (1 << 4), 8, 11) |
4244 __gen_field(values->_2xSample0XOffset * (1 << 4), 4, 7) |
4245 __gen_field(values->_2xSample0YOffset * (1 << 4), 0, 3) |
4246 0;
4247
4248 }
4249
4250 #define GEN8_3DSTATE_SBE_length 0x00000004
4251 #define GEN8_3DSTATE_SBE_length_bias 0x00000002
4252 #define GEN8_3DSTATE_SBE_header \
4253 .CommandType = 3, \
4254 .CommandSubType = 3, \
4255 ._3DCommandOpcode = 0, \
4256 ._3DCommandSubOpcode = 31, \
4257 .DwordLength = 2
4258
4259 struct GEN8_3DSTATE_SBE {
4260 uint32_t CommandType;
4261 uint32_t CommandSubType;
4262 uint32_t _3DCommandOpcode;
4263 uint32_t _3DCommandSubOpcode;
4264 uint32_t DwordLength;
4265 uint32_t ForceVertexURBEntryReadLength;
4266 uint32_t ForceVertexURBEntryReadOffset;
4267 uint32_t NumberofSFOutputAttributes;
4268 uint32_t AttributeSwizzleEnable;
4269 #define UPPERLEFT 0
4270 #define LOWERLEFT 1
4271 uint32_t PointSpriteTextureCoordinateOrigin;
4272 uint32_t PrimitiveIDOverrideComponentW;
4273 uint32_t PrimitiveIDOverrideComponentZ;
4274 uint32_t PrimitiveIDOverrideComponentY;
4275 uint32_t PrimitiveIDOverrideComponentX;
4276 uint32_t VertexURBEntryReadLength;
4277 uint32_t VertexURBEntryReadOffset;
4278 uint32_t PrimitiveIDOverrideAttributeSelect;
4279 uint32_t PointSpriteTextureCoordinateEnable;
4280 uint32_t ConstantInterpolationEnable;
4281 };
4282
4283 static inline void
4284 GEN8_3DSTATE_SBE_pack(__gen_user_data *data, void * restrict dst,
4285 const struct GEN8_3DSTATE_SBE * restrict values)
4286 {
4287 uint32_t *dw = (uint32_t * restrict) dst;
4288
4289 dw[0] =
4290 __gen_field(values->CommandType, 29, 31) |
4291 __gen_field(values->CommandSubType, 27, 28) |
4292 __gen_field(values->_3DCommandOpcode, 24, 26) |
4293 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4294 __gen_field(values->DwordLength, 0, 7) |
4295 0;
4296
4297 dw[1] =
4298 __gen_field(values->ForceVertexURBEntryReadLength, 29, 29) |
4299 __gen_field(values->ForceVertexURBEntryReadOffset, 28, 28) |
4300 __gen_field(values->NumberofSFOutputAttributes, 22, 27) |
4301 __gen_field(values->AttributeSwizzleEnable, 21, 21) |
4302 __gen_field(values->PointSpriteTextureCoordinateOrigin, 20, 20) |
4303 __gen_field(values->PrimitiveIDOverrideComponentW, 19, 19) |
4304 __gen_field(values->PrimitiveIDOverrideComponentZ, 18, 18) |
4305 __gen_field(values->PrimitiveIDOverrideComponentY, 17, 17) |
4306 __gen_field(values->PrimitiveIDOverrideComponentX, 16, 16) |
4307 __gen_field(values->VertexURBEntryReadLength, 11, 15) |
4308 __gen_field(values->VertexURBEntryReadOffset, 5, 10) |
4309 __gen_field(values->PrimitiveIDOverrideAttributeSelect, 0, 4) |
4310 0;
4311
4312 dw[2] =
4313 __gen_field(values->PointSpriteTextureCoordinateEnable, 0, 31) |
4314 0;
4315
4316 dw[3] =
4317 __gen_field(values->ConstantInterpolationEnable, 0, 31) |
4318 0;
4319
4320 }
4321
4322 #define GEN8_3DSTATE_SBE_SWIZ_length 0x0000000b
4323 #define GEN8_3DSTATE_SBE_SWIZ_length_bias 0x00000002
4324 #define GEN8_3DSTATE_SBE_SWIZ_header \
4325 .CommandType = 3, \
4326 .CommandSubType = 3, \
4327 ._3DCommandOpcode = 0, \
4328 ._3DCommandSubOpcode = 81, \
4329 .DwordLength = 9
4330
4331 struct GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL {
4332 uint32_t ComponentOverrideW;
4333 uint32_t ComponentOverrideZ;
4334 uint32_t ComponentOverrideY;
4335 uint32_t ComponentOverrideX;
4336 uint32_t SwizzleControlMode;
4337 #define CONST_0000 0
4338 #define CONST_0001_FLOAT 1
4339 #define CONST_1111_FLOAT 2
4340 #define PRIM_ID 3
4341 uint32_t ConstantSource;
4342 #define INPUTATTR 0
4343 #define INPUTATTR_FACING 1
4344 #define INPUTATTR_W 2
4345 #define INPUTATTR_FACING_W 3
4346 uint32_t SwizzleSelect;
4347 uint32_t SourceAttribute;
4348 };
4349
4350 static inline void
4351 GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(__gen_user_data *data, void * restrict dst,
4352 const struct GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL * restrict values)
4353 {
4354 uint32_t *dw = (uint32_t * restrict) dst;
4355
4356 dw[0] =
4357 __gen_field(values->ComponentOverrideW, 15, 15) |
4358 __gen_field(values->ComponentOverrideZ, 14, 14) |
4359 __gen_field(values->ComponentOverrideY, 13, 13) |
4360 __gen_field(values->ComponentOverrideX, 12, 12) |
4361 __gen_field(values->SwizzleControlMode, 11, 11) |
4362 __gen_field(values->ConstantSource, 9, 10) |
4363 __gen_field(values->SwizzleSelect, 6, 7) |
4364 __gen_field(values->SourceAttribute, 0, 4) |
4365 0;
4366
4367 }
4368
4369 struct GEN8_3DSTATE_SBE_SWIZ {
4370 uint32_t CommandType;
4371 uint32_t CommandSubType;
4372 uint32_t _3DCommandOpcode;
4373 uint32_t _3DCommandSubOpcode;
4374 uint32_t DwordLength;
4375 struct GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL Attribute;
4376 uint32_t Attribute15WrapShortestEnables;
4377 uint32_t Attribute14WrapShortestEnables;
4378 uint32_t Attribute13WrapShortestEnables;
4379 uint32_t Attribute12WrapShortestEnables;
4380 uint32_t Attribute11WrapShortestEnables;
4381 uint32_t Attribute10WrapShortestEnables;
4382 uint32_t Attribute09WrapShortestEnables;
4383 uint32_t Attribute08WrapShortestEnables;
4384 uint32_t Attribute07WrapShortestEnables;
4385 uint32_t Attribute06WrapShortestEnables;
4386 uint32_t Attribute05WrapShortestEnables;
4387 uint32_t Attribute04WrapShortestEnables;
4388 uint32_t Attribute03WrapShortestEnables;
4389 uint32_t Attribute02WrapShortestEnables;
4390 uint32_t Attribute01WrapShortestEnables;
4391 uint32_t Attribute00WrapShortestEnables;
4392 };
4393
4394 static inline void
4395 GEN8_3DSTATE_SBE_SWIZ_pack(__gen_user_data *data, void * restrict dst,
4396 const struct GEN8_3DSTATE_SBE_SWIZ * restrict values)
4397 {
4398 uint32_t *dw = (uint32_t * restrict) dst;
4399
4400 dw[0] =
4401 __gen_field(values->CommandType, 29, 31) |
4402 __gen_field(values->CommandSubType, 27, 28) |
4403 __gen_field(values->_3DCommandOpcode, 24, 26) |
4404 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4405 __gen_field(values->DwordLength, 0, 7) |
4406 0;
4407
4408 uint32_t dw_Attribute;
4409 GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &dw_Attribute, &values->Attribute);
4410 dw[1] =
4411 __gen_field(dw_Attribute, 0, 15) |
4412 0;
4413
4414 uint64_t qw9 =
4415 __gen_field(values->Attribute15WrapShortestEnables, 60, 63) |
4416 __gen_field(values->Attribute14WrapShortestEnables, 56, 59) |
4417 __gen_field(values->Attribute13WrapShortestEnables, 52, 55) |
4418 __gen_field(values->Attribute12WrapShortestEnables, 48, 51) |
4419 __gen_field(values->Attribute11WrapShortestEnables, 44, 47) |
4420 __gen_field(values->Attribute10WrapShortestEnables, 40, 43) |
4421 __gen_field(values->Attribute09WrapShortestEnables, 36, 39) |
4422 __gen_field(values->Attribute08WrapShortestEnables, 32, 35) |
4423 __gen_field(values->Attribute07WrapShortestEnables, 28, 31) |
4424 __gen_field(values->Attribute06WrapShortestEnables, 24, 27) |
4425 __gen_field(values->Attribute05WrapShortestEnables, 20, 23) |
4426 __gen_field(values->Attribute04WrapShortestEnables, 16, 19) |
4427 __gen_field(values->Attribute03WrapShortestEnables, 12, 15) |
4428 __gen_field(values->Attribute02WrapShortestEnables, 8, 11) |
4429 __gen_field(values->Attribute01WrapShortestEnables, 4, 7) |
4430 __gen_field(values->Attribute00WrapShortestEnables, 0, 3) |
4431 0;
4432
4433 dw[9] = qw9;
4434 dw[10] = qw9 >> 32;
4435
4436 }
4437
4438 #define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_length 0x00000002
4439 #define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_length_bias 0x00000002
4440 #define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_header\
4441 .CommandType = 3, \
4442 .CommandSubType = 3, \
4443 ._3DCommandOpcode = 0, \
4444 ._3DCommandSubOpcode = 15, \
4445 .DwordLength = 0
4446
4447 struct GEN8_3DSTATE_SCISSOR_STATE_POINTERS {
4448 uint32_t CommandType;
4449 uint32_t CommandSubType;
4450 uint32_t _3DCommandOpcode;
4451 uint32_t _3DCommandSubOpcode;
4452 uint32_t DwordLength;
4453 uint32_t ScissorRectPointer;
4454 };
4455
4456 static inline void
4457 GEN8_3DSTATE_SCISSOR_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
4458 const struct GEN8_3DSTATE_SCISSOR_STATE_POINTERS * restrict values)
4459 {
4460 uint32_t *dw = (uint32_t * restrict) dst;
4461
4462 dw[0] =
4463 __gen_field(values->CommandType, 29, 31) |
4464 __gen_field(values->CommandSubType, 27, 28) |
4465 __gen_field(values->_3DCommandOpcode, 24, 26) |
4466 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4467 __gen_field(values->DwordLength, 0, 7) |
4468 0;
4469
4470 dw[1] =
4471 __gen_offset(values->ScissorRectPointer, 5, 31) |
4472 0;
4473
4474 }
4475
4476 #define GEN8_3DSTATE_SF_length 0x00000004
4477 #define GEN8_3DSTATE_SF_length_bias 0x00000002
4478 #define GEN8_3DSTATE_SF_header \
4479 .CommandType = 3, \
4480 .CommandSubType = 3, \
4481 ._3DCommandOpcode = 0, \
4482 ._3DCommandSubOpcode = 19, \
4483 .DwordLength = 2
4484
4485 struct GEN8_3DSTATE_SF {
4486 uint32_t CommandType;
4487 uint32_t CommandSubType;
4488 uint32_t _3DCommandOpcode;
4489 uint32_t _3DCommandSubOpcode;
4490 uint32_t DwordLength;
4491 uint32_t LegacyGlobalDepthBiasEnable;
4492 uint32_t StatisticsEnable;
4493 uint32_t ViewportTransformEnable;
4494 float LineWidth;
4495 #define _05pixels 0
4496 #define _10pixels 1
4497 #define _20pixels 2
4498 #define _40pixels 3
4499 uint32_t LineEndCapAntialiasingRegionWidth;
4500 uint32_t LastPixelEnable;
4501 uint32_t TriangleStripListProvokingVertexSelect;
4502 uint32_t LineStripListProvokingVertexSelect;
4503 uint32_t TriangleFanProvokingVertexSelect;
4504 #define AALINEDISTANCE_TRUE 1
4505 uint32_t AALineDistanceMode;
4506 uint32_t SmoothPointEnable;
4507 uint32_t VertexSubPixelPrecisionSelect;
4508 #define Vertex 0
4509 #define State 1
4510 uint32_t PointWidthSource;
4511 float PointWidth;
4512 };
4513
4514 static inline void
4515 GEN8_3DSTATE_SF_pack(__gen_user_data *data, void * restrict dst,
4516 const struct GEN8_3DSTATE_SF * restrict values)
4517 {
4518 uint32_t *dw = (uint32_t * restrict) dst;
4519
4520 dw[0] =
4521 __gen_field(values->CommandType, 29, 31) |
4522 __gen_field(values->CommandSubType, 27, 28) |
4523 __gen_field(values->_3DCommandOpcode, 24, 26) |
4524 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4525 __gen_field(values->DwordLength, 0, 7) |
4526 0;
4527
4528 dw[1] =
4529 __gen_field(values->LegacyGlobalDepthBiasEnable, 11, 11) |
4530 __gen_field(values->StatisticsEnable, 10, 10) |
4531 __gen_field(values->ViewportTransformEnable, 1, 1) |
4532 0;
4533
4534 dw[2] =
4535 __gen_field(values->LineWidth * (1 << 7), 18, 27) |
4536 __gen_field(values->LineEndCapAntialiasingRegionWidth, 16, 17) |
4537 0;
4538
4539 dw[3] =
4540 __gen_field(values->LastPixelEnable, 31, 31) |
4541 __gen_field(values->TriangleStripListProvokingVertexSelect, 29, 30) |
4542 __gen_field(values->LineStripListProvokingVertexSelect, 27, 28) |
4543 __gen_field(values->TriangleFanProvokingVertexSelect, 25, 26) |
4544 __gen_field(values->AALineDistanceMode, 14, 14) |
4545 __gen_field(values->SmoothPointEnable, 13, 13) |
4546 __gen_field(values->VertexSubPixelPrecisionSelect, 12, 12) |
4547 __gen_field(values->PointWidthSource, 11, 11) |
4548 __gen_field(values->PointWidth * (1 << 3), 0, 10) |
4549 0;
4550
4551 }
4552
4553 #define GEN8_3DSTATE_SO_BUFFER_length 0x00000008
4554 #define GEN8_3DSTATE_SO_BUFFER_length_bias 0x00000002
4555 #define GEN8_3DSTATE_SO_BUFFER_header \
4556 .CommandType = 3, \
4557 .CommandSubType = 3, \
4558 ._3DCommandOpcode = 1, \
4559 ._3DCommandSubOpcode = 24, \
4560 .DwordLength = 6
4561
4562 struct GEN8_3DSTATE_SO_BUFFER {
4563 uint32_t CommandType;
4564 uint32_t CommandSubType;
4565 uint32_t _3DCommandOpcode;
4566 uint32_t _3DCommandSubOpcode;
4567 uint32_t DwordLength;
4568 uint32_t SOBufferEnable;
4569 uint32_t SOBufferIndex;
4570 struct GEN8_MEMORY_OBJECT_CONTROL_STATE SOBufferObjectControlState;
4571 uint32_t StreamOffsetWriteEnable;
4572 uint32_t StreamOutputBufferOffsetAddressEnable;
4573 __gen_address_type SurfaceBaseAddress;
4574 uint32_t SurfaceSize;
4575 __gen_address_type StreamOutputBufferOffsetAddress;
4576 uint32_t StreamOffset;
4577 };
4578
4579 static inline void
4580 GEN8_3DSTATE_SO_BUFFER_pack(__gen_user_data *data, void * restrict dst,
4581 const struct GEN8_3DSTATE_SO_BUFFER * restrict values)
4582 {
4583 uint32_t *dw = (uint32_t * restrict) dst;
4584
4585 dw[0] =
4586 __gen_field(values->CommandType, 29, 31) |
4587 __gen_field(values->CommandSubType, 27, 28) |
4588 __gen_field(values->_3DCommandOpcode, 24, 26) |
4589 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4590 __gen_field(values->DwordLength, 0, 7) |
4591 0;
4592
4593 uint32_t dw_SOBufferObjectControlState;
4594 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SOBufferObjectControlState, &values->SOBufferObjectControlState);
4595 dw[1] =
4596 __gen_field(values->SOBufferEnable, 31, 31) |
4597 __gen_field(values->SOBufferIndex, 29, 30) |
4598 __gen_field(dw_SOBufferObjectControlState, 22, 28) |
4599 __gen_field(values->StreamOffsetWriteEnable, 21, 21) |
4600 __gen_field(values->StreamOutputBufferOffsetAddressEnable, 20, 20) |
4601 0;
4602
4603 uint32_t dw2 =
4604 0;
4605
4606 uint64_t qw2 =
4607 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
4608
4609 dw[2] = qw2;
4610 dw[3] = qw2 >> 32;
4611
4612 dw[4] =
4613 __gen_field(values->SurfaceSize, 0, 29) |
4614 0;
4615
4616 uint32_t dw5 =
4617 0;
4618
4619 uint64_t qw5 =
4620 __gen_combine_address(data, &dw[5], values->StreamOutputBufferOffsetAddress, dw5);
4621
4622 dw[5] = qw5;
4623 dw[6] = qw5 >> 32;
4624
4625 dw[7] =
4626 __gen_field(values->StreamOffset, 0, 31) |
4627 0;
4628
4629 }
4630
4631 #define GEN8_3DSTATE_SO_DECL_LIST_length_bias 0x00000002
4632 #define GEN8_3DSTATE_SO_DECL_LIST_header \
4633 .CommandType = 3, \
4634 .CommandSubType = 3, \
4635 ._3DCommandOpcode = 1, \
4636 ._3DCommandSubOpcode = 23
4637
4638 struct GEN8_SO_DECL {
4639 uint32_t OutputBufferSlot;
4640 uint32_t HoleFlag;
4641 uint32_t RegisterIndex;
4642 uint32_t ComponentMask;
4643 };
4644
4645 static inline void
4646 GEN8_SO_DECL_pack(__gen_user_data *data, void * restrict dst,
4647 const struct GEN8_SO_DECL * restrict values)
4648 {
4649 uint32_t *dw = (uint32_t * restrict) dst;
4650
4651 dw[0] =
4652 __gen_field(values->OutputBufferSlot, 12, 13) |
4653 __gen_field(values->HoleFlag, 11, 11) |
4654 __gen_field(values->RegisterIndex, 4, 9) |
4655 __gen_field(values->ComponentMask, 0, 3) |
4656 0;
4657
4658 }
4659
4660 struct GEN8_SO_DECL_ENTRY {
4661 struct GEN8_SO_DECL Stream3Decl;
4662 struct GEN8_SO_DECL Stream2Decl;
4663 struct GEN8_SO_DECL Stream1Decl;
4664 struct GEN8_SO_DECL Stream0Decl;
4665 };
4666
4667 static inline void
4668 GEN8_SO_DECL_ENTRY_pack(__gen_user_data *data, void * restrict dst,
4669 const struct GEN8_SO_DECL_ENTRY * restrict values)
4670 {
4671 uint32_t *dw = (uint32_t * restrict) dst;
4672
4673 uint32_t dw_Stream3Decl;
4674 GEN8_SO_DECL_pack(data, &dw_Stream3Decl, &values->Stream3Decl);
4675 uint32_t dw_Stream2Decl;
4676 GEN8_SO_DECL_pack(data, &dw_Stream2Decl, &values->Stream2Decl);
4677 uint32_t dw_Stream1Decl;
4678 GEN8_SO_DECL_pack(data, &dw_Stream1Decl, &values->Stream1Decl);
4679 uint32_t dw_Stream0Decl;
4680 GEN8_SO_DECL_pack(data, &dw_Stream0Decl, &values->Stream0Decl);
4681 uint64_t qw0 =
4682 __gen_field(dw_Stream3Decl, 48, 63) |
4683 __gen_field(dw_Stream2Decl, 32, 47) |
4684 __gen_field(dw_Stream1Decl, 16, 31) |
4685 __gen_field(dw_Stream0Decl, 0, 15) |
4686 0;
4687
4688 dw[0] = qw0;
4689 dw[1] = qw0 >> 32;
4690
4691 }
4692
4693 struct GEN8_3DSTATE_SO_DECL_LIST {
4694 uint32_t CommandType;
4695 uint32_t CommandSubType;
4696 uint32_t _3DCommandOpcode;
4697 uint32_t _3DCommandSubOpcode;
4698 uint32_t DwordLength;
4699 uint32_t StreamtoBufferSelects3;
4700 uint32_t StreamtoBufferSelects2;
4701 uint32_t StreamtoBufferSelects1;
4702 uint32_t StreamtoBufferSelects0;
4703 uint32_t NumEntries3;
4704 uint32_t NumEntries2;
4705 uint32_t NumEntries1;
4706 uint32_t NumEntries0;
4707 /* variable length fields follow */
4708 };
4709
4710 static inline void
4711 GEN8_3DSTATE_SO_DECL_LIST_pack(__gen_user_data *data, void * restrict dst,
4712 const struct GEN8_3DSTATE_SO_DECL_LIST * restrict values)
4713 {
4714 uint32_t *dw = (uint32_t * restrict) dst;
4715
4716 dw[0] =
4717 __gen_field(values->CommandType, 29, 31) |
4718 __gen_field(values->CommandSubType, 27, 28) |
4719 __gen_field(values->_3DCommandOpcode, 24, 26) |
4720 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4721 __gen_field(values->DwordLength, 0, 8) |
4722 0;
4723
4724 dw[1] =
4725 __gen_field(values->StreamtoBufferSelects3, 12, 15) |
4726 __gen_field(values->StreamtoBufferSelects2, 8, 11) |
4727 __gen_field(values->StreamtoBufferSelects1, 4, 7) |
4728 __gen_field(values->StreamtoBufferSelects0, 0, 3) |
4729 0;
4730
4731 dw[2] =
4732 __gen_field(values->NumEntries3, 24, 31) |
4733 __gen_field(values->NumEntries2, 16, 23) |
4734 __gen_field(values->NumEntries1, 8, 15) |
4735 __gen_field(values->NumEntries0, 0, 7) |
4736 0;
4737
4738 /* variable length fields follow */
4739 }
4740
4741 #define GEN8_3DSTATE_STENCIL_BUFFER_length 0x00000005
4742 #define GEN8_3DSTATE_STENCIL_BUFFER_length_bias 0x00000002
4743 #define GEN8_3DSTATE_STENCIL_BUFFER_header \
4744 .CommandType = 3, \
4745 .CommandSubType = 3, \
4746 ._3DCommandOpcode = 0, \
4747 ._3DCommandSubOpcode = 6, \
4748 .DwordLength = 3
4749
4750 struct GEN8_3DSTATE_STENCIL_BUFFER {
4751 uint32_t CommandType;
4752 uint32_t CommandSubType;
4753 uint32_t _3DCommandOpcode;
4754 uint32_t _3DCommandSubOpcode;
4755 uint32_t DwordLength;
4756 uint32_t StencilBufferEnable;
4757 struct GEN8_MEMORY_OBJECT_CONTROL_STATE StencilBufferObjectControlState;
4758 uint32_t SurfacePitch;
4759 __gen_address_type SurfaceBaseAddress;
4760 uint32_t SurfaceQPitch;
4761 };
4762
4763 static inline void
4764 GEN8_3DSTATE_STENCIL_BUFFER_pack(__gen_user_data *data, void * restrict dst,
4765 const struct GEN8_3DSTATE_STENCIL_BUFFER * restrict values)
4766 {
4767 uint32_t *dw = (uint32_t * restrict) dst;
4768
4769 dw[0] =
4770 __gen_field(values->CommandType, 29, 31) |
4771 __gen_field(values->CommandSubType, 27, 28) |
4772 __gen_field(values->_3DCommandOpcode, 24, 26) |
4773 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4774 __gen_field(values->DwordLength, 0, 7) |
4775 0;
4776
4777 uint32_t dw_StencilBufferObjectControlState;
4778 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StencilBufferObjectControlState, &values->StencilBufferObjectControlState);
4779 dw[1] =
4780 __gen_field(values->StencilBufferEnable, 31, 31) |
4781 __gen_field(dw_StencilBufferObjectControlState, 22, 28) |
4782 __gen_field(values->SurfacePitch, 0, 16) |
4783 0;
4784
4785 uint32_t dw2 =
4786 0;
4787
4788 uint64_t qw2 =
4789 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
4790
4791 dw[2] = qw2;
4792 dw[3] = qw2 >> 32;
4793
4794 dw[4] =
4795 __gen_field(values->SurfaceQPitch, 0, 14) |
4796 0;
4797
4798 }
4799
4800 #define GEN8_3DSTATE_STREAMOUT_length 0x00000005
4801 #define GEN8_3DSTATE_STREAMOUT_length_bias 0x00000002
4802 #define GEN8_3DSTATE_STREAMOUT_header \
4803 .CommandType = 3, \
4804 .CommandSubType = 3, \
4805 ._3DCommandOpcode = 0, \
4806 ._3DCommandSubOpcode = 30, \
4807 .DwordLength = 3
4808
4809 struct GEN8_3DSTATE_STREAMOUT {
4810 uint32_t CommandType;
4811 uint32_t CommandSubType;
4812 uint32_t _3DCommandOpcode;
4813 uint32_t _3DCommandSubOpcode;
4814 uint32_t DwordLength;
4815 uint32_t SOFunctionEnable;
4816 uint32_t APIRenderingDisable;
4817 uint32_t RenderStreamSelect;
4818 #define LEADING 0
4819 #define TRAILING 1
4820 uint32_t ReorderMode;
4821 uint32_t SOStatisticsEnable;
4822 #define Normal 0
4823 #define Resreved 1
4824 #define Force_Off 2
4825 #define Force_on 3
4826 uint32_t ForceRendering;
4827 uint32_t Stream3VertexReadOffset;
4828 uint32_t Stream3VertexReadLength;
4829 uint32_t Stream2VertexReadOffset;
4830 uint32_t Stream2VertexReadLength;
4831 uint32_t Stream1VertexReadOffset;
4832 uint32_t Stream1VertexReadLength;
4833 uint32_t Stream0VertexReadOffset;
4834 uint32_t Stream0VertexReadLength;
4835 uint32_t Buffer1SurfacePitch;
4836 uint32_t Buffer0SurfacePitch;
4837 uint32_t Buffer3SurfacePitch;
4838 uint32_t Buffer2SurfacePitch;
4839 };
4840
4841 static inline void
4842 GEN8_3DSTATE_STREAMOUT_pack(__gen_user_data *data, void * restrict dst,
4843 const struct GEN8_3DSTATE_STREAMOUT * restrict values)
4844 {
4845 uint32_t *dw = (uint32_t * restrict) dst;
4846
4847 dw[0] =
4848 __gen_field(values->CommandType, 29, 31) |
4849 __gen_field(values->CommandSubType, 27, 28) |
4850 __gen_field(values->_3DCommandOpcode, 24, 26) |
4851 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4852 __gen_field(values->DwordLength, 0, 7) |
4853 0;
4854
4855 dw[1] =
4856 __gen_field(values->SOFunctionEnable, 31, 31) |
4857 __gen_field(values->APIRenderingDisable, 30, 30) |
4858 __gen_field(values->RenderStreamSelect, 27, 28) |
4859 __gen_field(values->ReorderMode, 26, 26) |
4860 __gen_field(values->SOStatisticsEnable, 25, 25) |
4861 __gen_field(values->ForceRendering, 23, 24) |
4862 0;
4863
4864 dw[2] =
4865 __gen_field(values->Stream3VertexReadOffset, 29, 29) |
4866 __gen_field(values->Stream3VertexReadLength, 24, 28) |
4867 __gen_field(values->Stream2VertexReadOffset, 21, 21) |
4868 __gen_field(values->Stream2VertexReadLength, 16, 20) |
4869 __gen_field(values->Stream1VertexReadOffset, 13, 13) |
4870 __gen_field(values->Stream1VertexReadLength, 8, 12) |
4871 __gen_field(values->Stream0VertexReadOffset, 5, 5) |
4872 __gen_field(values->Stream0VertexReadLength, 0, 4) |
4873 0;
4874
4875 dw[3] =
4876 __gen_field(values->Buffer1SurfacePitch, 16, 27) |
4877 __gen_field(values->Buffer0SurfacePitch, 0, 11) |
4878 0;
4879
4880 dw[4] =
4881 __gen_field(values->Buffer3SurfacePitch, 16, 27) |
4882 __gen_field(values->Buffer2SurfacePitch, 0, 11) |
4883 0;
4884
4885 }
4886
4887 #define GEN8_3DSTATE_TE_length 0x00000004
4888 #define GEN8_3DSTATE_TE_length_bias 0x00000002
4889 #define GEN8_3DSTATE_TE_header \
4890 .CommandType = 3, \
4891 .CommandSubType = 3, \
4892 ._3DCommandOpcode = 0, \
4893 ._3DCommandSubOpcode = 28, \
4894 .DwordLength = 2
4895
4896 struct GEN8_3DSTATE_TE {
4897 uint32_t CommandType;
4898 uint32_t CommandSubType;
4899 uint32_t _3DCommandOpcode;
4900 uint32_t _3DCommandSubOpcode;
4901 uint32_t DwordLength;
4902 #define INTEGER 0
4903 #define ODD_FRACTIONAL 1
4904 #define EVEN_FRACTIONAL 2
4905 uint32_t Partitioning;
4906 #define POINT 0
4907 #define LINE 1
4908 #define TRI_CW 2
4909 #define TRI_CCW 3
4910 uint32_t OutputTopology;
4911 #define QUAD 0
4912 #define TRI 1
4913 #define ISOLINE 2
4914 uint32_t TEDomain;
4915 #define HW_TESS 0
4916 #define SW_TESS 1
4917 uint32_t TEMode;
4918 uint32_t TEEnable;
4919 float MaximumTessellationFactorOdd;
4920 float MaximumTessellationFactorNotOdd;
4921 };
4922
4923 static inline void
4924 GEN8_3DSTATE_TE_pack(__gen_user_data *data, void * restrict dst,
4925 const struct GEN8_3DSTATE_TE * restrict values)
4926 {
4927 uint32_t *dw = (uint32_t * restrict) dst;
4928
4929 dw[0] =
4930 __gen_field(values->CommandType, 29, 31) |
4931 __gen_field(values->CommandSubType, 27, 28) |
4932 __gen_field(values->_3DCommandOpcode, 24, 26) |
4933 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4934 __gen_field(values->DwordLength, 0, 7) |
4935 0;
4936
4937 dw[1] =
4938 __gen_field(values->Partitioning, 12, 13) |
4939 __gen_field(values->OutputTopology, 8, 9) |
4940 __gen_field(values->TEDomain, 4, 5) |
4941 __gen_field(values->TEMode, 1, 2) |
4942 __gen_field(values->TEEnable, 0, 0) |
4943 0;
4944
4945 dw[2] =
4946 __gen_float(values->MaximumTessellationFactorOdd) |
4947 0;
4948
4949 dw[3] =
4950 __gen_float(values->MaximumTessellationFactorNotOdd) |
4951 0;
4952
4953 }
4954
4955 #define GEN8_3DSTATE_URB_DS_length 0x00000002
4956 #define GEN8_3DSTATE_URB_DS_length_bias 0x00000002
4957 #define GEN8_3DSTATE_URB_DS_header \
4958 .CommandType = 3, \
4959 .CommandSubType = 3, \
4960 ._3DCommandOpcode = 0, \
4961 ._3DCommandSubOpcode = 50, \
4962 .DwordLength = 0
4963
4964 struct GEN8_3DSTATE_URB_DS {
4965 uint32_t CommandType;
4966 uint32_t CommandSubType;
4967 uint32_t _3DCommandOpcode;
4968 uint32_t _3DCommandSubOpcode;
4969 uint32_t DwordLength;
4970 uint32_t DSURBStartingAddress;
4971 uint32_t DSURBEntryAllocationSize;
4972 uint32_t DSNumberofURBEntries;
4973 };
4974
4975 static inline void
4976 GEN8_3DSTATE_URB_DS_pack(__gen_user_data *data, void * restrict dst,
4977 const struct GEN8_3DSTATE_URB_DS * restrict values)
4978 {
4979 uint32_t *dw = (uint32_t * restrict) dst;
4980
4981 dw[0] =
4982 __gen_field(values->CommandType, 29, 31) |
4983 __gen_field(values->CommandSubType, 27, 28) |
4984 __gen_field(values->_3DCommandOpcode, 24, 26) |
4985 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4986 __gen_field(values->DwordLength, 0, 7) |
4987 0;
4988
4989 dw[1] =
4990 __gen_field(values->DSURBStartingAddress, 25, 31) |
4991 __gen_field(values->DSURBEntryAllocationSize, 16, 24) |
4992 __gen_field(values->DSNumberofURBEntries, 0, 15) |
4993 0;
4994
4995 }
4996
4997 #define GEN8_3DSTATE_URB_GS_length 0x00000002
4998 #define GEN8_3DSTATE_URB_GS_length_bias 0x00000002
4999 #define GEN8_3DSTATE_URB_GS_header \
5000 .CommandType = 3, \
5001 .CommandSubType = 3, \
5002 ._3DCommandOpcode = 0, \
5003 ._3DCommandSubOpcode = 51, \
5004 .DwordLength = 0
5005
5006 struct GEN8_3DSTATE_URB_GS {
5007 uint32_t CommandType;
5008 uint32_t CommandSubType;
5009 uint32_t _3DCommandOpcode;
5010 uint32_t _3DCommandSubOpcode;
5011 uint32_t DwordLength;
5012 uint32_t GSURBStartingAddress;
5013 uint32_t GSURBEntryAllocationSize;
5014 uint32_t GSNumberofURBEntries;
5015 };
5016
5017 static inline void
5018 GEN8_3DSTATE_URB_GS_pack(__gen_user_data *data, void * restrict dst,
5019 const struct GEN8_3DSTATE_URB_GS * restrict values)
5020 {
5021 uint32_t *dw = (uint32_t * restrict) dst;
5022
5023 dw[0] =
5024 __gen_field(values->CommandType, 29, 31) |
5025 __gen_field(values->CommandSubType, 27, 28) |
5026 __gen_field(values->_3DCommandOpcode, 24, 26) |
5027 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5028 __gen_field(values->DwordLength, 0, 7) |
5029 0;
5030
5031 dw[1] =
5032 __gen_field(values->GSURBStartingAddress, 25, 31) |
5033 __gen_field(values->GSURBEntryAllocationSize, 16, 24) |
5034 __gen_field(values->GSNumberofURBEntries, 0, 15) |
5035 0;
5036
5037 }
5038
5039 #define GEN8_3DSTATE_URB_HS_length 0x00000002
5040 #define GEN8_3DSTATE_URB_HS_length_bias 0x00000002
5041 #define GEN8_3DSTATE_URB_HS_header \
5042 .CommandType = 3, \
5043 .CommandSubType = 3, \
5044 ._3DCommandOpcode = 0, \
5045 ._3DCommandSubOpcode = 49, \
5046 .DwordLength = 0
5047
5048 struct GEN8_3DSTATE_URB_HS {
5049 uint32_t CommandType;
5050 uint32_t CommandSubType;
5051 uint32_t _3DCommandOpcode;
5052 uint32_t _3DCommandSubOpcode;
5053 uint32_t DwordLength;
5054 uint32_t HSURBStartingAddress;
5055 uint32_t HSURBEntryAllocationSize;
5056 uint32_t HSNumberofURBEntries;
5057 };
5058
5059 static inline void
5060 GEN8_3DSTATE_URB_HS_pack(__gen_user_data *data, void * restrict dst,
5061 const struct GEN8_3DSTATE_URB_HS * restrict values)
5062 {
5063 uint32_t *dw = (uint32_t * restrict) dst;
5064
5065 dw[0] =
5066 __gen_field(values->CommandType, 29, 31) |
5067 __gen_field(values->CommandSubType, 27, 28) |
5068 __gen_field(values->_3DCommandOpcode, 24, 26) |
5069 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5070 __gen_field(values->DwordLength, 0, 7) |
5071 0;
5072
5073 dw[1] =
5074 __gen_field(values->HSURBStartingAddress, 25, 31) |
5075 __gen_field(values->HSURBEntryAllocationSize, 16, 24) |
5076 __gen_field(values->HSNumberofURBEntries, 0, 15) |
5077 0;
5078
5079 }
5080
5081 #define GEN8_3DSTATE_VERTEX_BUFFERS_length_bias 0x00000002
5082 #define GEN8_3DSTATE_VERTEX_BUFFERS_header \
5083 .CommandType = 3, \
5084 .CommandSubType = 3, \
5085 ._3DCommandOpcode = 0, \
5086 ._3DCommandSubOpcode = 8
5087
5088 struct GEN8_VERTEX_BUFFER_STATE {
5089 uint32_t VertexBufferIndex;
5090 struct GEN8_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
5091 uint32_t AddressModifyEnable;
5092 uint32_t NullVertexBuffer;
5093 uint32_t BufferPitch;
5094 __gen_address_type BufferStartingAddress;
5095 uint32_t BufferSize;
5096 };
5097
5098 static inline void
5099 GEN8_VERTEX_BUFFER_STATE_pack(__gen_user_data *data, void * restrict dst,
5100 const struct GEN8_VERTEX_BUFFER_STATE * restrict values)
5101 {
5102 uint32_t *dw = (uint32_t * restrict) dst;
5103
5104 uint32_t dw_MemoryObjectControlState;
5105 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
5106 dw[0] =
5107 __gen_field(values->VertexBufferIndex, 26, 31) |
5108 __gen_field(dw_MemoryObjectControlState, 16, 22) |
5109 __gen_field(values->AddressModifyEnable, 14, 14) |
5110 __gen_field(values->NullVertexBuffer, 13, 13) |
5111 __gen_field(values->BufferPitch, 0, 11) |
5112 0;
5113
5114 uint32_t dw1 =
5115 0;
5116
5117 uint64_t qw1 =
5118 __gen_combine_address(data, &dw[1], values->BufferStartingAddress, dw1);
5119
5120 dw[1] = qw1;
5121 dw[2] = qw1 >> 32;
5122
5123 dw[3] =
5124 __gen_field(values->BufferSize, 0, 31) |
5125 0;
5126
5127 }
5128
5129 struct GEN8_3DSTATE_VERTEX_BUFFERS {
5130 uint32_t CommandType;
5131 uint32_t CommandSubType;
5132 uint32_t _3DCommandOpcode;
5133 uint32_t _3DCommandSubOpcode;
5134 uint32_t DwordLength;
5135 /* variable length fields follow */
5136 };
5137
5138 static inline void
5139 GEN8_3DSTATE_VERTEX_BUFFERS_pack(__gen_user_data *data, void * restrict dst,
5140 const struct GEN8_3DSTATE_VERTEX_BUFFERS * restrict values)
5141 {
5142 uint32_t *dw = (uint32_t * restrict) dst;
5143
5144 dw[0] =
5145 __gen_field(values->CommandType, 29, 31) |
5146 __gen_field(values->CommandSubType, 27, 28) |
5147 __gen_field(values->_3DCommandOpcode, 24, 26) |
5148 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5149 __gen_field(values->DwordLength, 0, 7) |
5150 0;
5151
5152 /* variable length fields follow */
5153 }
5154
5155 #define GEN8_3DSTATE_VERTEX_ELEMENTS_length_bias 0x00000002
5156 #define GEN8_3DSTATE_VERTEX_ELEMENTS_header \
5157 .CommandType = 3, \
5158 .CommandSubType = 3, \
5159 ._3DCommandOpcode = 0, \
5160 ._3DCommandSubOpcode = 9
5161
5162 struct GEN8_VERTEX_ELEMENT_STATE {
5163 uint32_t VertexBufferIndex;
5164 uint32_t Valid;
5165 uint32_t SourceElementFormat;
5166 uint32_t EdgeFlagEnable;
5167 uint32_t SourceElementOffset;
5168 uint32_t Component0Control;
5169 uint32_t Component1Control;
5170 uint32_t Component2Control;
5171 uint32_t Component3Control;
5172 };
5173
5174 static inline void
5175 GEN8_VERTEX_ELEMENT_STATE_pack(__gen_user_data *data, void * restrict dst,
5176 const struct GEN8_VERTEX_ELEMENT_STATE * restrict values)
5177 {
5178 uint32_t *dw = (uint32_t * restrict) dst;
5179
5180 dw[0] =
5181 __gen_field(values->VertexBufferIndex, 26, 31) |
5182 __gen_field(values->Valid, 25, 25) |
5183 __gen_field(values->SourceElementFormat, 16, 24) |
5184 __gen_field(values->EdgeFlagEnable, 15, 15) |
5185 __gen_field(values->SourceElementOffset, 0, 11) |
5186 0;
5187
5188 dw[1] =
5189 __gen_field(values->Component0Control, 28, 30) |
5190 __gen_field(values->Component1Control, 24, 26) |
5191 __gen_field(values->Component2Control, 20, 22) |
5192 __gen_field(values->Component3Control, 16, 18) |
5193 0;
5194
5195 }
5196
5197 struct GEN8_3DSTATE_VERTEX_ELEMENTS {
5198 uint32_t CommandType;
5199 uint32_t CommandSubType;
5200 uint32_t _3DCommandOpcode;
5201 uint32_t _3DCommandSubOpcode;
5202 uint32_t DwordLength;
5203 /* variable length fields follow */
5204 };
5205
5206 static inline void
5207 GEN8_3DSTATE_VERTEX_ELEMENTS_pack(__gen_user_data *data, void * restrict dst,
5208 const struct GEN8_3DSTATE_VERTEX_ELEMENTS * restrict values)
5209 {
5210 uint32_t *dw = (uint32_t * restrict) dst;
5211
5212 dw[0] =
5213 __gen_field(values->CommandType, 29, 31) |
5214 __gen_field(values->CommandSubType, 27, 28) |
5215 __gen_field(values->_3DCommandOpcode, 24, 26) |
5216 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5217 __gen_field(values->DwordLength, 0, 7) |
5218 0;
5219
5220 /* variable length fields follow */
5221 }
5222
5223 #define GEN8_3DSTATE_VF_length 0x00000002
5224 #define GEN8_3DSTATE_VF_length_bias 0x00000002
5225 #define GEN8_3DSTATE_VF_header \
5226 .CommandType = 3, \
5227 .CommandSubType = 3, \
5228 ._3DCommandOpcode = 0, \
5229 ._3DCommandSubOpcode = 12, \
5230 .DwordLength = 0
5231
5232 struct GEN8_3DSTATE_VF {
5233 uint32_t CommandType;
5234 uint32_t CommandSubType;
5235 uint32_t _3DCommandOpcode;
5236 uint32_t _3DCommandSubOpcode;
5237 uint32_t IndexedDrawCutIndexEnable;
5238 uint32_t DwordLength;
5239 uint32_t CutIndex;
5240 };
5241
5242 static inline void
5243 GEN8_3DSTATE_VF_pack(__gen_user_data *data, void * restrict dst,
5244 const struct GEN8_3DSTATE_VF * restrict values)
5245 {
5246 uint32_t *dw = (uint32_t * restrict) dst;
5247
5248 dw[0] =
5249 __gen_field(values->CommandType, 29, 31) |
5250 __gen_field(values->CommandSubType, 27, 28) |
5251 __gen_field(values->_3DCommandOpcode, 24, 26) |
5252 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5253 __gen_field(values->IndexedDrawCutIndexEnable, 8, 8) |
5254 __gen_field(values->DwordLength, 0, 7) |
5255 0;
5256
5257 dw[1] =
5258 __gen_field(values->CutIndex, 0, 31) |
5259 0;
5260
5261 }
5262
5263 #define GEN8_3DSTATE_VF_INSTANCING_length 0x00000003
5264 #define GEN8_3DSTATE_VF_INSTANCING_length_bias 0x00000002
5265 #define GEN8_3DSTATE_VF_INSTANCING_header \
5266 .CommandType = 3, \
5267 .CommandSubType = 3, \
5268 ._3DCommandOpcode = 0, \
5269 ._3DCommandSubOpcode = 73, \
5270 .DwordLength = 1
5271
5272 struct GEN8_3DSTATE_VF_INSTANCING {
5273 uint32_t CommandType;
5274 uint32_t CommandSubType;
5275 uint32_t _3DCommandOpcode;
5276 uint32_t _3DCommandSubOpcode;
5277 uint32_t DwordLength;
5278 uint32_t InstancingEnable;
5279 uint32_t VertexElementIndex;
5280 uint32_t InstanceDataStepRate;
5281 };
5282
5283 static inline void
5284 GEN8_3DSTATE_VF_INSTANCING_pack(__gen_user_data *data, void * restrict dst,
5285 const struct GEN8_3DSTATE_VF_INSTANCING * restrict values)
5286 {
5287 uint32_t *dw = (uint32_t * restrict) dst;
5288
5289 dw[0] =
5290 __gen_field(values->CommandType, 29, 31) |
5291 __gen_field(values->CommandSubType, 27, 28) |
5292 __gen_field(values->_3DCommandOpcode, 24, 26) |
5293 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5294 __gen_field(values->DwordLength, 0, 7) |
5295 0;
5296
5297 dw[1] =
5298 __gen_field(values->InstancingEnable, 8, 8) |
5299 __gen_field(values->VertexElementIndex, 0, 5) |
5300 0;
5301
5302 dw[2] =
5303 __gen_field(values->InstanceDataStepRate, 0, 31) |
5304 0;
5305
5306 }
5307
5308 #define GEN8_3DSTATE_VF_SGVS_length 0x00000002
5309 #define GEN8_3DSTATE_VF_SGVS_length_bias 0x00000002
5310 #define GEN8_3DSTATE_VF_SGVS_header \
5311 .CommandType = 3, \
5312 .CommandSubType = 3, \
5313 ._3DCommandOpcode = 0, \
5314 ._3DCommandSubOpcode = 74, \
5315 .DwordLength = 0
5316
5317 struct GEN8_3DSTATE_VF_SGVS {
5318 uint32_t CommandType;
5319 uint32_t CommandSubType;
5320 uint32_t _3DCommandOpcode;
5321 uint32_t _3DCommandSubOpcode;
5322 uint32_t DwordLength;
5323 uint32_t InstanceIDEnable;
5324 #define COMP_0 0
5325 #define COMP_1 1
5326 #define COMP_2 2
5327 #define COMP_3 3
5328 uint32_t InstanceIDComponentNumber;
5329 uint32_t InstanceIDElementOffset;
5330 uint32_t VertexIDEnable;
5331 #define COMP_0 0
5332 #define COMP_1 1
5333 #define COMP_2 2
5334 #define COMP_3 3
5335 uint32_t VertexIDComponentNumber;
5336 uint32_t VertexIDElementOffset;
5337 };
5338
5339 static inline void
5340 GEN8_3DSTATE_VF_SGVS_pack(__gen_user_data *data, void * restrict dst,
5341 const struct GEN8_3DSTATE_VF_SGVS * restrict values)
5342 {
5343 uint32_t *dw = (uint32_t * restrict) dst;
5344
5345 dw[0] =
5346 __gen_field(values->CommandType, 29, 31) |
5347 __gen_field(values->CommandSubType, 27, 28) |
5348 __gen_field(values->_3DCommandOpcode, 24, 26) |
5349 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5350 __gen_field(values->DwordLength, 0, 7) |
5351 0;
5352
5353 dw[1] =
5354 __gen_field(values->InstanceIDEnable, 31, 31) |
5355 __gen_field(values->InstanceIDComponentNumber, 29, 30) |
5356 __gen_field(values->InstanceIDElementOffset, 16, 21) |
5357 __gen_field(values->VertexIDEnable, 15, 15) |
5358 __gen_field(values->VertexIDComponentNumber, 13, 14) |
5359 __gen_field(values->VertexIDElementOffset, 0, 5) |
5360 0;
5361
5362 }
5363
5364 #define GEN8_3DSTATE_VF_STATISTICS_length 0x00000001
5365 #define GEN8_3DSTATE_VF_STATISTICS_length_bias 0x00000001
5366 #define GEN8_3DSTATE_VF_STATISTICS_header \
5367 .CommandType = 3, \
5368 .CommandSubType = 1, \
5369 ._3DCommandOpcode = 0, \
5370 ._3DCommandSubOpcode = 11
5371
5372 struct GEN8_3DSTATE_VF_STATISTICS {
5373 uint32_t CommandType;
5374 uint32_t CommandSubType;
5375 uint32_t _3DCommandOpcode;
5376 uint32_t _3DCommandSubOpcode;
5377 uint32_t StatisticsEnable;
5378 };
5379
5380 static inline void
5381 GEN8_3DSTATE_VF_STATISTICS_pack(__gen_user_data *data, void * restrict dst,
5382 const struct GEN8_3DSTATE_VF_STATISTICS * restrict values)
5383 {
5384 uint32_t *dw = (uint32_t * restrict) dst;
5385
5386 dw[0] =
5387 __gen_field(values->CommandType, 29, 31) |
5388 __gen_field(values->CommandSubType, 27, 28) |
5389 __gen_field(values->_3DCommandOpcode, 24, 26) |
5390 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5391 __gen_field(values->StatisticsEnable, 0, 0) |
5392 0;
5393
5394 }
5395
5396 #define GEN8_3DSTATE_VF_TOPOLOGY_length 0x00000002
5397 #define GEN8_3DSTATE_VF_TOPOLOGY_length_bias 0x00000002
5398 #define GEN8_3DSTATE_VF_TOPOLOGY_header \
5399 .CommandType = 3, \
5400 .CommandSubType = 3, \
5401 ._3DCommandOpcode = 0, \
5402 ._3DCommandSubOpcode = 75, \
5403 .DwordLength = 0
5404
5405 struct GEN8_3DSTATE_VF_TOPOLOGY {
5406 uint32_t CommandType;
5407 uint32_t CommandSubType;
5408 uint32_t _3DCommandOpcode;
5409 uint32_t _3DCommandSubOpcode;
5410 uint32_t DwordLength;
5411 uint32_t PrimitiveTopologyType;
5412 };
5413
5414 static inline void
5415 GEN8_3DSTATE_VF_TOPOLOGY_pack(__gen_user_data *data, void * restrict dst,
5416 const struct GEN8_3DSTATE_VF_TOPOLOGY * restrict values)
5417 {
5418 uint32_t *dw = (uint32_t * restrict) dst;
5419
5420 dw[0] =
5421 __gen_field(values->CommandType, 29, 31) |
5422 __gen_field(values->CommandSubType, 27, 28) |
5423 __gen_field(values->_3DCommandOpcode, 24, 26) |
5424 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5425 __gen_field(values->DwordLength, 0, 7) |
5426 0;
5427
5428 dw[1] =
5429 __gen_field(values->PrimitiveTopologyType, 0, 5) |
5430 0;
5431
5432 }
5433
5434 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length 0x00000002
5435 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length_bias 0x00000002
5436 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_header\
5437 .CommandType = 3, \
5438 .CommandSubType = 3, \
5439 ._3DCommandOpcode = 0, \
5440 ._3DCommandSubOpcode = 35, \
5441 .DwordLength = 0
5442
5443 struct GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC {
5444 uint32_t CommandType;
5445 uint32_t CommandSubType;
5446 uint32_t _3DCommandOpcode;
5447 uint32_t _3DCommandSubOpcode;
5448 uint32_t DwordLength;
5449 uint32_t CCViewportPointer;
5450 };
5451
5452 static inline void
5453 GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_pack(__gen_user_data *data, void * restrict dst,
5454 const struct GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC * restrict values)
5455 {
5456 uint32_t *dw = (uint32_t * restrict) dst;
5457
5458 dw[0] =
5459 __gen_field(values->CommandType, 29, 31) |
5460 __gen_field(values->CommandSubType, 27, 28) |
5461 __gen_field(values->_3DCommandOpcode, 24, 26) |
5462 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5463 __gen_field(values->DwordLength, 0, 7) |
5464 0;
5465
5466 dw[1] =
5467 __gen_offset(values->CCViewportPointer, 5, 31) |
5468 0;
5469
5470 }
5471
5472 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length 0x00000002
5473 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length_bias 0x00000002
5474 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_header\
5475 .CommandType = 3, \
5476 .CommandSubType = 3, \
5477 ._3DCommandOpcode = 0, \
5478 ._3DCommandSubOpcode = 33, \
5479 .DwordLength = 0
5480
5481 struct GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP {
5482 uint32_t CommandType;
5483 uint32_t CommandSubType;
5484 uint32_t _3DCommandOpcode;
5485 uint32_t _3DCommandSubOpcode;
5486 uint32_t DwordLength;
5487 uint32_t SFClipViewportPointer;
5488 };
5489
5490 static inline void
5491 GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_pack(__gen_user_data *data, void * restrict dst,
5492 const struct GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP * restrict values)
5493 {
5494 uint32_t *dw = (uint32_t * restrict) dst;
5495
5496 dw[0] =
5497 __gen_field(values->CommandType, 29, 31) |
5498 __gen_field(values->CommandSubType, 27, 28) |
5499 __gen_field(values->_3DCommandOpcode, 24, 26) |
5500 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5501 __gen_field(values->DwordLength, 0, 7) |
5502 0;
5503
5504 dw[1] =
5505 __gen_offset(values->SFClipViewportPointer, 6, 31) |
5506 0;
5507
5508 }
5509
5510 #define GEN8_3DSTATE_WM_length 0x00000002
5511 #define GEN8_3DSTATE_WM_length_bias 0x00000002
5512 #define GEN8_3DSTATE_WM_header \
5513 .CommandType = 3, \
5514 .CommandSubType = 3, \
5515 ._3DCommandOpcode = 0, \
5516 ._3DCommandSubOpcode = 20, \
5517 .DwordLength = 0
5518
5519 struct GEN8_3DSTATE_WM {
5520 uint32_t CommandType;
5521 uint32_t CommandSubType;
5522 uint32_t _3DCommandOpcode;
5523 uint32_t _3DCommandSubOpcode;
5524 uint32_t DwordLength;
5525 uint32_t StatisticsEnable;
5526 uint32_t LegacyDepthBufferClearEnable;
5527 uint32_t LegacyDepthBufferResolveEnable;
5528 uint32_t LegacyHierarchicalDepthBufferResolveEnable;
5529 uint32_t LegacyDiamondLineRasterization;
5530 #define NORMAL 0
5531 #define PSEXEC 1
5532 #define PREPS 2
5533 uint32_t EarlyDepthStencilControl;
5534 #define Normal 0
5535 #define ForceOff 1
5536 #define ForceON 2
5537 uint32_t ForceThreadDispatchEnable;
5538 #define INTERP_PIXEL 0
5539 #define INTERP_CENTROID 2
5540 #define INTERP_SAMPLE 3
5541 uint32_t PositionZWInterpolationMode;
5542 uint32_t BarycentricInterpolationMode;
5543 #define _05pixels 0
5544 #define _10pixels 1
5545 #define _20pixels 2
5546 #define _40pixels 3
5547 uint32_t LineEndCapAntialiasingRegionWidth;
5548 #define _05pixels 0
5549 #define _10pixels 1
5550 #define _20pixels 2
5551 #define _40pixels 3
5552 uint32_t LineAntialiasingRegionWidth;
5553 uint32_t PolygonStippleEnable;
5554 uint32_t LineStippleEnable;
5555 #define RASTRULE_UPPER_LEFT 0
5556 #define RASTRULE_UPPER_RIGHT 1
5557 uint32_t PointRasterizationRule;
5558 #define Normal 0
5559 #define ForceOff 1
5560 #define ForceON 2
5561 uint32_t ForceKillPixelEnable;
5562 };
5563
5564 static inline void
5565 GEN8_3DSTATE_WM_pack(__gen_user_data *data, void * restrict dst,
5566 const struct GEN8_3DSTATE_WM * restrict values)
5567 {
5568 uint32_t *dw = (uint32_t * restrict) dst;
5569
5570 dw[0] =
5571 __gen_field(values->CommandType, 29, 31) |
5572 __gen_field(values->CommandSubType, 27, 28) |
5573 __gen_field(values->_3DCommandOpcode, 24, 26) |
5574 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5575 __gen_field(values->DwordLength, 0, 7) |
5576 0;
5577
5578 dw[1] =
5579 __gen_field(values->StatisticsEnable, 31, 31) |
5580 __gen_field(values->LegacyDepthBufferClearEnable, 30, 30) |
5581 __gen_field(values->LegacyDepthBufferResolveEnable, 28, 28) |
5582 __gen_field(values->LegacyHierarchicalDepthBufferResolveEnable, 27, 27) |
5583 __gen_field(values->LegacyDiamondLineRasterization, 26, 26) |
5584 __gen_field(values->EarlyDepthStencilControl, 21, 22) |
5585 __gen_field(values->ForceThreadDispatchEnable, 19, 20) |
5586 __gen_field(values->PositionZWInterpolationMode, 17, 18) |
5587 __gen_field(values->BarycentricInterpolationMode, 11, 16) |
5588 __gen_field(values->LineEndCapAntialiasingRegionWidth, 8, 9) |
5589 __gen_field(values->LineAntialiasingRegionWidth, 6, 7) |
5590 __gen_field(values->PolygonStippleEnable, 4, 4) |
5591 __gen_field(values->LineStippleEnable, 3, 3) |
5592 __gen_field(values->PointRasterizationRule, 2, 2) |
5593 __gen_field(values->ForceKillPixelEnable, 0, 1) |
5594 0;
5595
5596 }
5597
5598 #define GEN8_3DSTATE_WM_CHROMAKEY_length 0x00000002
5599 #define GEN8_3DSTATE_WM_CHROMAKEY_length_bias 0x00000002
5600 #define GEN8_3DSTATE_WM_CHROMAKEY_header \
5601 .CommandType = 3, \
5602 .CommandSubType = 3, \
5603 ._3DCommandOpcode = 0, \
5604 ._3DCommandSubOpcode = 76, \
5605 .DwordLength = 0
5606
5607 struct GEN8_3DSTATE_WM_CHROMAKEY {
5608 uint32_t CommandType;
5609 uint32_t CommandSubType;
5610 uint32_t _3DCommandOpcode;
5611 uint32_t _3DCommandSubOpcode;
5612 uint32_t DwordLength;
5613 uint32_t ChromaKeyKillEnable;
5614 };
5615
5616 static inline void
5617 GEN8_3DSTATE_WM_CHROMAKEY_pack(__gen_user_data *data, void * restrict dst,
5618 const struct GEN8_3DSTATE_WM_CHROMAKEY * restrict values)
5619 {
5620 uint32_t *dw = (uint32_t * restrict) dst;
5621
5622 dw[0] =
5623 __gen_field(values->CommandType, 29, 31) |
5624 __gen_field(values->CommandSubType, 27, 28) |
5625 __gen_field(values->_3DCommandOpcode, 24, 26) |
5626 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5627 __gen_field(values->DwordLength, 0, 7) |
5628 0;
5629
5630 dw[1] =
5631 __gen_field(values->ChromaKeyKillEnable, 31, 31) |
5632 0;
5633
5634 }
5635
5636 #define GEN8_3DSTATE_WM_DEPTH_STENCIL_length 0x00000003
5637 #define GEN8_3DSTATE_WM_DEPTH_STENCIL_length_bias 0x00000002
5638 #define GEN8_3DSTATE_WM_DEPTH_STENCIL_header \
5639 .CommandType = 3, \
5640 .CommandSubType = 3, \
5641 ._3DCommandOpcode = 0, \
5642 ._3DCommandSubOpcode = 78, \
5643 .DwordLength = 1
5644
5645 struct GEN8_3DSTATE_WM_DEPTH_STENCIL {
5646 uint32_t CommandType;
5647 uint32_t CommandSubType;
5648 uint32_t _3DCommandOpcode;
5649 uint32_t _3DCommandSubOpcode;
5650 uint32_t DwordLength;
5651 uint32_t StencilFailOp;
5652 uint32_t StencilPassDepthFailOp;
5653 uint32_t StencilPassDepthPassOp;
5654 uint32_t BackfaceStencilTestFunction;
5655 uint32_t BackfaceStencilFailOp;
5656 uint32_t BackfaceStencilPassDepthFailOp;
5657 uint32_t BackfaceStencilPassDepthPassOp;
5658 uint32_t StencilTestFunction;
5659 uint32_t DepthTestFunction;
5660 #define False 0
5661 #define True 1
5662 uint32_t DoubleSidedStencilEnable;
5663 uint32_t StencilTestEnable;
5664 uint32_t StencilBufferWriteEnable;
5665 uint32_t DepthTestEnable;
5666 uint32_t DepthBufferWriteEnable;
5667 uint32_t StencilTestMask;
5668 uint32_t StencilWriteMask;
5669 uint32_t BackfaceStencilTestMask;
5670 uint32_t BackfaceStencilWriteMask;
5671 };
5672
5673 static inline void
5674 GEN8_3DSTATE_WM_DEPTH_STENCIL_pack(__gen_user_data *data, void * restrict dst,
5675 const struct GEN8_3DSTATE_WM_DEPTH_STENCIL * restrict values)
5676 {
5677 uint32_t *dw = (uint32_t * restrict) dst;
5678
5679 dw[0] =
5680 __gen_field(values->CommandType, 29, 31) |
5681 __gen_field(values->CommandSubType, 27, 28) |
5682 __gen_field(values->_3DCommandOpcode, 24, 26) |
5683 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5684 __gen_field(values->DwordLength, 0, 7) |
5685 0;
5686
5687 dw[1] =
5688 __gen_field(values->StencilFailOp, 29, 31) |
5689 __gen_field(values->StencilPassDepthFailOp, 26, 28) |
5690 __gen_field(values->StencilPassDepthPassOp, 23, 25) |
5691 __gen_field(values->BackfaceStencilTestFunction, 20, 22) |
5692 __gen_field(values->BackfaceStencilFailOp, 17, 19) |
5693 __gen_field(values->BackfaceStencilPassDepthFailOp, 14, 16) |
5694 __gen_field(values->BackfaceStencilPassDepthPassOp, 11, 13) |
5695 __gen_field(values->StencilTestFunction, 8, 10) |
5696 __gen_field(values->DepthTestFunction, 5, 7) |
5697 __gen_field(values->DoubleSidedStencilEnable, 4, 4) |
5698 __gen_field(values->StencilTestEnable, 3, 3) |
5699 __gen_field(values->StencilBufferWriteEnable, 2, 2) |
5700 __gen_field(values->DepthTestEnable, 1, 1) |
5701 __gen_field(values->DepthBufferWriteEnable, 0, 0) |
5702 0;
5703
5704 dw[2] =
5705 __gen_field(values->StencilTestMask, 24, 31) |
5706 __gen_field(values->StencilWriteMask, 16, 23) |
5707 __gen_field(values->BackfaceStencilTestMask, 8, 15) |
5708 __gen_field(values->BackfaceStencilWriteMask, 0, 7) |
5709 0;
5710
5711 }
5712
5713 #define GEN8_3DSTATE_WM_HZ_OP_length 0x00000005
5714 #define GEN8_3DSTATE_WM_HZ_OP_length_bias 0x00000002
5715 #define GEN8_3DSTATE_WM_HZ_OP_header \
5716 .CommandType = 3, \
5717 .CommandSubType = 3, \
5718 ._3DCommandOpcode = 0, \
5719 ._3DCommandSubOpcode = 82, \
5720 .DwordLength = 3
5721
5722 struct GEN8_3DSTATE_WM_HZ_OP {
5723 uint32_t CommandType;
5724 uint32_t CommandSubType;
5725 uint32_t _3DCommandOpcode;
5726 uint32_t _3DCommandSubOpcode;
5727 uint32_t DwordLength;
5728 uint32_t StencilBufferClearEnable;
5729 uint32_t DepthBufferClearEnable;
5730 uint32_t ScissorRectangleEnable;
5731 uint32_t DepthBufferResolveEnable;
5732 uint32_t HierarchicalDepthBufferResolveEnable;
5733 uint32_t PixelPositionOffsetEnable;
5734 uint32_t FullSurfaceDepthClear;
5735 uint32_t StencilClearValue;
5736 uint32_t NumberofMultisamples;
5737 uint32_t ClearRectangleYMin;
5738 uint32_t ClearRectangleXMin;
5739 uint32_t ClearRectangleYMax;
5740 uint32_t ClearRectangleXMax;
5741 uint32_t SampleMask;
5742 };
5743
5744 static inline void
5745 GEN8_3DSTATE_WM_HZ_OP_pack(__gen_user_data *data, void * restrict dst,
5746 const struct GEN8_3DSTATE_WM_HZ_OP * restrict values)
5747 {
5748 uint32_t *dw = (uint32_t * restrict) dst;
5749
5750 dw[0] =
5751 __gen_field(values->CommandType, 29, 31) |
5752 __gen_field(values->CommandSubType, 27, 28) |
5753 __gen_field(values->_3DCommandOpcode, 24, 26) |
5754 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5755 __gen_field(values->DwordLength, 0, 7) |
5756 0;
5757
5758 dw[1] =
5759 __gen_field(values->StencilBufferClearEnable, 31, 31) |
5760 __gen_field(values->DepthBufferClearEnable, 30, 30) |
5761 __gen_field(values->ScissorRectangleEnable, 29, 29) |
5762 __gen_field(values->DepthBufferResolveEnable, 28, 28) |
5763 __gen_field(values->HierarchicalDepthBufferResolveEnable, 27, 27) |
5764 __gen_field(values->PixelPositionOffsetEnable, 26, 26) |
5765 __gen_field(values->FullSurfaceDepthClear, 25, 25) |
5766 __gen_field(values->StencilClearValue, 16, 23) |
5767 __gen_field(values->NumberofMultisamples, 13, 15) |
5768 0;
5769
5770 dw[2] =
5771 __gen_field(values->ClearRectangleYMin, 16, 31) |
5772 __gen_field(values->ClearRectangleXMin, 0, 15) |
5773 0;
5774
5775 dw[3] =
5776 __gen_field(values->ClearRectangleYMax, 16, 31) |
5777 __gen_field(values->ClearRectangleXMax, 0, 15) |
5778 0;
5779
5780 dw[4] =
5781 __gen_field(values->SampleMask, 0, 15) |
5782 0;
5783
5784 }
5785
5786 #define GEN8_GPGPU_WALKER_length 0x0000000f
5787 #define GEN8_GPGPU_WALKER_length_bias 0x00000002
5788 #define GEN8_GPGPU_WALKER_header \
5789 .CommandType = 3, \
5790 .Pipeline = 2, \
5791 .MediaCommandOpcode = 1, \
5792 .SubOpcode = 5, \
5793 .DwordLength = 13
5794
5795 struct GEN8_GPGPU_WALKER {
5796 uint32_t CommandType;
5797 uint32_t Pipeline;
5798 uint32_t MediaCommandOpcode;
5799 uint32_t SubOpcode;
5800 uint32_t IndirectParameterEnable;
5801 uint32_t PredicateEnable;
5802 uint32_t DwordLength;
5803 uint32_t InterfaceDescriptorOffset;
5804 uint32_t IndirectDataLength;
5805 uint32_t IndirectDataStartAddress;
5806 #define SIMD8 0
5807 #define SIMD16 1
5808 #define SIMD32 2
5809 uint32_t SIMDSize;
5810 uint32_t ThreadDepthCounterMaximum;
5811 uint32_t ThreadHeightCounterMaximum;
5812 uint32_t ThreadWidthCounterMaximum;
5813 uint32_t ThreadGroupIDStartingX;
5814 uint32_t ThreadGroupIDXDimension;
5815 uint32_t ThreadGroupIDStartingY;
5816 uint32_t ThreadGroupIDYDimension;
5817 uint32_t ThreadGroupIDStartingResumeZ;
5818 uint32_t ThreadGroupIDZDimension;
5819 uint32_t RightExecutionMask;
5820 uint32_t BottomExecutionMask;
5821 };
5822
5823 static inline void
5824 GEN8_GPGPU_WALKER_pack(__gen_user_data *data, void * restrict dst,
5825 const struct GEN8_GPGPU_WALKER * restrict values)
5826 {
5827 uint32_t *dw = (uint32_t * restrict) dst;
5828
5829 dw[0] =
5830 __gen_field(values->CommandType, 29, 31) |
5831 __gen_field(values->Pipeline, 27, 28) |
5832 __gen_field(values->MediaCommandOpcode, 24, 26) |
5833 __gen_field(values->SubOpcode, 16, 23) |
5834 __gen_field(values->IndirectParameterEnable, 10, 10) |
5835 __gen_field(values->PredicateEnable, 8, 8) |
5836 __gen_field(values->DwordLength, 0, 7) |
5837 0;
5838
5839 dw[1] =
5840 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
5841 0;
5842
5843 dw[2] =
5844 __gen_field(values->IndirectDataLength, 0, 16) |
5845 0;
5846
5847 dw[3] =
5848 __gen_offset(values->IndirectDataStartAddress, 6, 31) |
5849 0;
5850
5851 dw[4] =
5852 __gen_field(values->SIMDSize, 30, 31) |
5853 __gen_field(values->ThreadDepthCounterMaximum, 16, 21) |
5854 __gen_field(values->ThreadHeightCounterMaximum, 8, 13) |
5855 __gen_field(values->ThreadWidthCounterMaximum, 0, 5) |
5856 0;
5857
5858 dw[5] =
5859 __gen_field(values->ThreadGroupIDStartingX, 0, 31) |
5860 0;
5861
5862 dw[6] =
5863 0;
5864
5865 dw[7] =
5866 __gen_field(values->ThreadGroupIDXDimension, 0, 31) |
5867 0;
5868
5869 dw[8] =
5870 __gen_field(values->ThreadGroupIDStartingY, 0, 31) |
5871 0;
5872
5873 dw[9] =
5874 0;
5875
5876 dw[10] =
5877 __gen_field(values->ThreadGroupIDYDimension, 0, 31) |
5878 0;
5879
5880 dw[11] =
5881 __gen_field(values->ThreadGroupIDStartingResumeZ, 0, 31) |
5882 0;
5883
5884 dw[12] =
5885 __gen_field(values->ThreadGroupIDZDimension, 0, 31) |
5886 0;
5887
5888 dw[13] =
5889 __gen_field(values->RightExecutionMask, 0, 31) |
5890 0;
5891
5892 dw[14] =
5893 __gen_field(values->BottomExecutionMask, 0, 31) |
5894 0;
5895
5896 }
5897
5898 #define GEN8_MEDIA_CURBE_LOAD_length 0x00000004
5899 #define GEN8_MEDIA_CURBE_LOAD_length_bias 0x00000002
5900 #define GEN8_MEDIA_CURBE_LOAD_header \
5901 .CommandType = 3, \
5902 .Pipeline = 2, \
5903 .MediaCommandOpcode = 0, \
5904 .SubOpcode = 1, \
5905 .DwordLength = 2
5906
5907 struct GEN8_MEDIA_CURBE_LOAD {
5908 uint32_t CommandType;
5909 uint32_t Pipeline;
5910 uint32_t MediaCommandOpcode;
5911 uint32_t SubOpcode;
5912 uint32_t DwordLength;
5913 uint32_t CURBETotalDataLength;
5914 uint32_t CURBEDataStartAddress;
5915 };
5916
5917 static inline void
5918 GEN8_MEDIA_CURBE_LOAD_pack(__gen_user_data *data, void * restrict dst,
5919 const struct GEN8_MEDIA_CURBE_LOAD * restrict values)
5920 {
5921 uint32_t *dw = (uint32_t * restrict) dst;
5922
5923 dw[0] =
5924 __gen_field(values->CommandType, 29, 31) |
5925 __gen_field(values->Pipeline, 27, 28) |
5926 __gen_field(values->MediaCommandOpcode, 24, 26) |
5927 __gen_field(values->SubOpcode, 16, 23) |
5928 __gen_field(values->DwordLength, 0, 15) |
5929 0;
5930
5931 dw[1] =
5932 0;
5933
5934 dw[2] =
5935 __gen_field(values->CURBETotalDataLength, 0, 16) |
5936 0;
5937
5938 dw[3] =
5939 __gen_field(values->CURBEDataStartAddress, 0, 31) |
5940 0;
5941
5942 }
5943
5944 #define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 0x00000004
5945 #define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length_bias 0x00000002
5946 #define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_header\
5947 .CommandType = 3, \
5948 .Pipeline = 2, \
5949 .MediaCommandOpcode = 0, \
5950 .SubOpcode = 2, \
5951 .DwordLength = 2
5952
5953 struct GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD {
5954 uint32_t CommandType;
5955 uint32_t Pipeline;
5956 uint32_t MediaCommandOpcode;
5957 uint32_t SubOpcode;
5958 uint32_t DwordLength;
5959 uint32_t InterfaceDescriptorTotalLength;
5960 uint32_t InterfaceDescriptorDataStartAddress;
5961 };
5962
5963 static inline void
5964 GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_pack(__gen_user_data *data, void * restrict dst,
5965 const struct GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD * restrict values)
5966 {
5967 uint32_t *dw = (uint32_t * restrict) dst;
5968
5969 dw[0] =
5970 __gen_field(values->CommandType, 29, 31) |
5971 __gen_field(values->Pipeline, 27, 28) |
5972 __gen_field(values->MediaCommandOpcode, 24, 26) |
5973 __gen_field(values->SubOpcode, 16, 23) |
5974 __gen_field(values->DwordLength, 0, 15) |
5975 0;
5976
5977 dw[1] =
5978 0;
5979
5980 dw[2] =
5981 __gen_field(values->InterfaceDescriptorTotalLength, 0, 16) |
5982 0;
5983
5984 dw[3] =
5985 __gen_offset(values->InterfaceDescriptorDataStartAddress, 0, 31) |
5986 0;
5987
5988 }
5989
5990 #define GEN8_MEDIA_OBJECT_length_bias 0x00000002
5991 #define GEN8_MEDIA_OBJECT_header \
5992 .CommandType = 3, \
5993 .MediaCommandPipeline = 2, \
5994 .MediaCommandOpcode = 1, \
5995 .MediaCommandSubOpcode = 0
5996
5997 struct GEN8_MEDIA_OBJECT {
5998 uint32_t CommandType;
5999 uint32_t MediaCommandPipeline;
6000 uint32_t MediaCommandOpcode;
6001 uint32_t MediaCommandSubOpcode;
6002 uint32_t DwordLength;
6003 uint32_t InterfaceDescriptorOffset;
6004 uint32_t ChildrenPresent;
6005 #define Nothreadsynchronization 0
6006 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
6007 uint32_t ThreadSynchronization;
6008 uint32_t ForceDestination;
6009 #define Notusingscoreboard 0
6010 #define Usingscoreboard 1
6011 uint32_t UseScoreboard;
6012 #define Slice0 0
6013 #define Slice1 1
6014 #define Slice2 2
6015 uint32_t SliceDestinationSelect;
6016 #define SubSlice2 2
6017 #define SubSlice1 1
6018 #define SubSlice0 0
6019 uint32_t SubSliceDestinationSelect;
6020 uint32_t IndirectDataLength;
6021 __gen_address_type IndirectDataStartAddress;
6022 uint32_t ScoredboardY;
6023 uint32_t ScoreboardX;
6024 uint32_t ScoreboardColor;
6025 uint32_t ScoreboardMask;
6026 /* variable length fields follow */
6027 };
6028
6029 static inline void
6030 GEN8_MEDIA_OBJECT_pack(__gen_user_data *data, void * restrict dst,
6031 const struct GEN8_MEDIA_OBJECT * restrict values)
6032 {
6033 uint32_t *dw = (uint32_t * restrict) dst;
6034
6035 dw[0] =
6036 __gen_field(values->CommandType, 29, 31) |
6037 __gen_field(values->MediaCommandPipeline, 27, 28) |
6038 __gen_field(values->MediaCommandOpcode, 24, 26) |
6039 __gen_field(values->MediaCommandSubOpcode, 16, 23) |
6040 __gen_field(values->DwordLength, 0, 15) |
6041 0;
6042
6043 dw[1] =
6044 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6045 0;
6046
6047 dw[2] =
6048 __gen_field(values->ChildrenPresent, 31, 31) |
6049 __gen_field(values->ThreadSynchronization, 24, 24) |
6050 __gen_field(values->ForceDestination, 22, 22) |
6051 __gen_field(values->UseScoreboard, 21, 21) |
6052 __gen_field(values->SliceDestinationSelect, 19, 20) |
6053 __gen_field(values->SubSliceDestinationSelect, 17, 18) |
6054 __gen_field(values->IndirectDataLength, 0, 16) |
6055 0;
6056
6057 uint32_t dw3 =
6058 0;
6059
6060 dw[3] =
6061 __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, dw3);
6062
6063 dw[4] =
6064 __gen_field(values->ScoredboardY, 16, 24) |
6065 __gen_field(values->ScoreboardX, 0, 8) |
6066 0;
6067
6068 dw[5] =
6069 __gen_field(values->ScoreboardColor, 16, 19) |
6070 __gen_field(values->ScoreboardMask, 0, 7) |
6071 0;
6072
6073 /* variable length fields follow */
6074 }
6075
6076 #define GEN8_MEDIA_OBJECT_GRPID_length_bias 0x00000002
6077 #define GEN8_MEDIA_OBJECT_GRPID_header \
6078 .CommandType = 3, \
6079 .MediaCommandPipeline = 2, \
6080 .MediaCommandOpcode = 1, \
6081 .MediaCommandSubOpcode = 6
6082
6083 struct GEN8_MEDIA_OBJECT_GRPID {
6084 uint32_t CommandType;
6085 uint32_t MediaCommandPipeline;
6086 uint32_t MediaCommandOpcode;
6087 uint32_t MediaCommandSubOpcode;
6088 uint32_t DwordLength;
6089 uint32_t InterfaceDescriptorOffset;
6090 uint32_t EndofThreadGroup;
6091 uint32_t ForceDestination;
6092 #define Notusingscoreboard 0
6093 #define Usingscoreboard 1
6094 uint32_t UseScoreboard;
6095 #define Slice0 0
6096 #define Slice1 1
6097 #define Slice2 2
6098 uint32_t SliceDestinationSelect;
6099 #define SubSlice2 2
6100 #define SubSlice1 1
6101 #define SubSlice0 0
6102 uint32_t SubSliceDestinationSelect;
6103 uint32_t IndirectDataLength;
6104 __gen_address_type IndirectDataStartAddress;
6105 uint32_t ScoredboardY;
6106 uint32_t ScoreboardX;
6107 uint32_t ScoreboardColor;
6108 uint32_t ScoreboardMask;
6109 uint32_t GroupID;
6110 /* variable length fields follow */
6111 };
6112
6113 static inline void
6114 GEN8_MEDIA_OBJECT_GRPID_pack(__gen_user_data *data, void * restrict dst,
6115 const struct GEN8_MEDIA_OBJECT_GRPID * restrict values)
6116 {
6117 uint32_t *dw = (uint32_t * restrict) dst;
6118
6119 dw[0] =
6120 __gen_field(values->CommandType, 29, 31) |
6121 __gen_field(values->MediaCommandPipeline, 27, 28) |
6122 __gen_field(values->MediaCommandOpcode, 24, 26) |
6123 __gen_field(values->MediaCommandSubOpcode, 16, 23) |
6124 __gen_field(values->DwordLength, 0, 15) |
6125 0;
6126
6127 dw[1] =
6128 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6129 0;
6130
6131 dw[2] =
6132 __gen_field(values->EndofThreadGroup, 23, 23) |
6133 __gen_field(values->ForceDestination, 22, 22) |
6134 __gen_field(values->UseScoreboard, 21, 21) |
6135 __gen_field(values->SliceDestinationSelect, 19, 20) |
6136 __gen_field(values->SubSliceDestinationSelect, 17, 18) |
6137 __gen_field(values->IndirectDataLength, 0, 16) |
6138 0;
6139
6140 uint32_t dw3 =
6141 0;
6142
6143 dw[3] =
6144 __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, dw3);
6145
6146 dw[4] =
6147 __gen_field(values->ScoredboardY, 16, 24) |
6148 __gen_field(values->ScoreboardX, 0, 8) |
6149 0;
6150
6151 dw[5] =
6152 __gen_field(values->ScoreboardColor, 16, 19) |
6153 __gen_field(values->ScoreboardMask, 0, 7) |
6154 0;
6155
6156 dw[6] =
6157 __gen_field(values->GroupID, 0, 31) |
6158 0;
6159
6160 /* variable length fields follow */
6161 }
6162
6163 #define GEN8_MEDIA_OBJECT_PRT_length 0x00000010
6164 #define GEN8_MEDIA_OBJECT_PRT_length_bias 0x00000002
6165 #define GEN8_MEDIA_OBJECT_PRT_header \
6166 .CommandType = 3, \
6167 .Pipeline = 2, \
6168 .MediaCommandOpcode = 1, \
6169 .SubOpcode = 2, \
6170 .DwordLength = 14
6171
6172 struct GEN8_MEDIA_OBJECT_PRT {
6173 uint32_t CommandType;
6174 uint32_t Pipeline;
6175 uint32_t MediaCommandOpcode;
6176 uint32_t SubOpcode;
6177 uint32_t DwordLength;
6178 uint32_t InterfaceDescriptorOffset;
6179 uint32_t ChildrenPresent;
6180 uint32_t PRT_FenceNeeded;
6181 #define Rootthreadqueue 0
6182 #define VFEstateflush 1
6183 uint32_t PRT_FenceType;
6184 uint32_t InlineData;
6185 };
6186
6187 static inline void
6188 GEN8_MEDIA_OBJECT_PRT_pack(__gen_user_data *data, void * restrict dst,
6189 const struct GEN8_MEDIA_OBJECT_PRT * restrict values)
6190 {
6191 uint32_t *dw = (uint32_t * restrict) dst;
6192
6193 dw[0] =
6194 __gen_field(values->CommandType, 29, 31) |
6195 __gen_field(values->Pipeline, 27, 28) |
6196 __gen_field(values->MediaCommandOpcode, 24, 26) |
6197 __gen_field(values->SubOpcode, 16, 23) |
6198 __gen_field(values->DwordLength, 0, 15) |
6199 0;
6200
6201 dw[1] =
6202 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6203 0;
6204
6205 dw[2] =
6206 __gen_field(values->ChildrenPresent, 31, 31) |
6207 __gen_field(values->PRT_FenceNeeded, 23, 23) |
6208 __gen_field(values->PRT_FenceType, 22, 22) |
6209 0;
6210
6211 dw[3] =
6212 0;
6213
6214 dw[4] =
6215 __gen_field(values->InlineData, 0, 31) |
6216 0;
6217
6218 }
6219
6220 #define GEN8_MEDIA_OBJECT_WALKER_length_bias 0x00000002
6221 #define GEN8_MEDIA_OBJECT_WALKER_header \
6222 .CommandType = 3, \
6223 .Pipeline = 2, \
6224 .MediaCommandOpcode = 1, \
6225 .SubOpcode = 3
6226
6227 struct GEN8_MEDIA_OBJECT_WALKER {
6228 uint32_t CommandType;
6229 uint32_t Pipeline;
6230 uint32_t MediaCommandOpcode;
6231 uint32_t SubOpcode;
6232 uint32_t DwordLength;
6233 uint32_t InterfaceDescriptorOffset;
6234 uint32_t ChildrenPresent;
6235 #define Nothreadsynchronization 0
6236 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
6237 uint32_t ThreadSynchronization;
6238 #define Notusingscoreboard 0
6239 #define Usingscoreboard 1
6240 uint32_t UseScoreboard;
6241 uint32_t IndirectDataLength;
6242 uint32_t IndirectDataStartAddress;
6243 uint32_t GroupIDLoopSelect;
6244 uint32_t ScoreboardMask;
6245 uint32_t ColorCountMinusOne;
6246 uint32_t MiddleLoopExtraSteps;
6247 uint32_t LocalMidLoopUnitY;
6248 uint32_t MidLoopUnitX;
6249 uint32_t GlobalLoopExecCount;
6250 uint32_t LocalLoopExecCount;
6251 uint32_t BlockResolutionY;
6252 uint32_t BlockResolutionX;
6253 uint32_t LocalStartY;
6254 uint32_t LocalStartX;
6255 uint32_t LocalOuterLoopStrideY;
6256 uint32_t LocalOuterLoopStrideX;
6257 uint32_t LocalInnerLoopUnitY;
6258 uint32_t LocalInnerLoopUnitX;
6259 uint32_t GlobalResolutionY;
6260 uint32_t GlobalResolutionX;
6261 uint32_t GlobalStartY;
6262 uint32_t GlobalStartX;
6263 uint32_t GlobalOuterLoopStrideY;
6264 uint32_t GlobalOuterLoopStrideX;
6265 uint32_t GlobalInnerLoopUnitY;
6266 uint32_t GlobalInnerLoopUnitX;
6267 /* variable length fields follow */
6268 };
6269
6270 static inline void
6271 GEN8_MEDIA_OBJECT_WALKER_pack(__gen_user_data *data, void * restrict dst,
6272 const struct GEN8_MEDIA_OBJECT_WALKER * restrict values)
6273 {
6274 uint32_t *dw = (uint32_t * restrict) dst;
6275
6276 dw[0] =
6277 __gen_field(values->CommandType, 29, 31) |
6278 __gen_field(values->Pipeline, 27, 28) |
6279 __gen_field(values->MediaCommandOpcode, 24, 26) |
6280 __gen_field(values->SubOpcode, 16, 23) |
6281 __gen_field(values->DwordLength, 0, 15) |
6282 0;
6283
6284 dw[1] =
6285 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6286 0;
6287
6288 dw[2] =
6289 __gen_field(values->ChildrenPresent, 31, 31) |
6290 __gen_field(values->ThreadSynchronization, 24, 24) |
6291 __gen_field(values->UseScoreboard, 21, 21) |
6292 __gen_field(values->IndirectDataLength, 0, 16) |
6293 0;
6294
6295 dw[3] =
6296 __gen_offset(values->IndirectDataStartAddress, 0, 31) |
6297 0;
6298
6299 dw[4] =
6300 0;
6301
6302 dw[5] =
6303 __gen_field(values->GroupIDLoopSelect, 8, 31) |
6304 __gen_field(values->ScoreboardMask, 0, 7) |
6305 0;
6306
6307 dw[6] =
6308 __gen_field(values->ColorCountMinusOne, 24, 27) |
6309 __gen_field(values->MiddleLoopExtraSteps, 16, 20) |
6310 __gen_field(values->LocalMidLoopUnitY, 12, 13) |
6311 __gen_field(values->MidLoopUnitX, 8, 9) |
6312 0;
6313
6314 dw[7] =
6315 __gen_field(values->GlobalLoopExecCount, 16, 25) |
6316 __gen_field(values->LocalLoopExecCount, 0, 9) |
6317 0;
6318
6319 dw[8] =
6320 __gen_field(values->BlockResolutionY, 16, 24) |
6321 __gen_field(values->BlockResolutionX, 0, 8) |
6322 0;
6323
6324 dw[9] =
6325 __gen_field(values->LocalStartY, 16, 24) |
6326 __gen_field(values->LocalStartX, 0, 8) |
6327 0;
6328
6329 dw[10] =
6330 0;
6331
6332 dw[11] =
6333 __gen_field(values->LocalOuterLoopStrideY, 16, 25) |
6334 __gen_field(values->LocalOuterLoopStrideX, 0, 9) |
6335 0;
6336
6337 dw[12] =
6338 __gen_field(values->LocalInnerLoopUnitY, 16, 25) |
6339 __gen_field(values->LocalInnerLoopUnitX, 0, 9) |
6340 0;
6341
6342 dw[13] =
6343 __gen_field(values->GlobalResolutionY, 16, 24) |
6344 __gen_field(values->GlobalResolutionX, 0, 8) |
6345 0;
6346
6347 dw[14] =
6348 __gen_field(values->GlobalStartY, 16, 25) |
6349 __gen_field(values->GlobalStartX, 0, 9) |
6350 0;
6351
6352 dw[15] =
6353 __gen_field(values->GlobalOuterLoopStrideY, 16, 25) |
6354 __gen_field(values->GlobalOuterLoopStrideX, 0, 9) |
6355 0;
6356
6357 dw[16] =
6358 __gen_field(values->GlobalInnerLoopUnitY, 16, 25) |
6359 __gen_field(values->GlobalInnerLoopUnitX, 0, 9) |
6360 0;
6361
6362 /* variable length fields follow */
6363 }
6364
6365 #define GEN8_MEDIA_STATE_FLUSH_length 0x00000002
6366 #define GEN8_MEDIA_STATE_FLUSH_length_bias 0x00000002
6367 #define GEN8_MEDIA_STATE_FLUSH_header \
6368 .CommandType = 3, \
6369 .Pipeline = 2, \
6370 .MediaCommandOpcode = 0, \
6371 .SubOpcode = 4, \
6372 .DwordLength = 0
6373
6374 struct GEN8_MEDIA_STATE_FLUSH {
6375 uint32_t CommandType;
6376 uint32_t Pipeline;
6377 uint32_t MediaCommandOpcode;
6378 uint32_t SubOpcode;
6379 uint32_t DwordLength;
6380 uint32_t FlushtoGO;
6381 uint32_t WatermarkRequired;
6382 uint32_t InterfaceDescriptorOffset;
6383 };
6384
6385 static inline void
6386 GEN8_MEDIA_STATE_FLUSH_pack(__gen_user_data *data, void * restrict dst,
6387 const struct GEN8_MEDIA_STATE_FLUSH * restrict values)
6388 {
6389 uint32_t *dw = (uint32_t * restrict) dst;
6390
6391 dw[0] =
6392 __gen_field(values->CommandType, 29, 31) |
6393 __gen_field(values->Pipeline, 27, 28) |
6394 __gen_field(values->MediaCommandOpcode, 24, 26) |
6395 __gen_field(values->SubOpcode, 16, 23) |
6396 __gen_field(values->DwordLength, 0, 15) |
6397 0;
6398
6399 dw[1] =
6400 __gen_field(values->FlushtoGO, 7, 7) |
6401 __gen_field(values->WatermarkRequired, 6, 6) |
6402 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6403 0;
6404
6405 }
6406
6407 #define GEN8_MEDIA_VFE_STATE_length 0x00000009
6408 #define GEN8_MEDIA_VFE_STATE_length_bias 0x00000002
6409 #define GEN8_MEDIA_VFE_STATE_header \
6410 .CommandType = 3, \
6411 .Pipeline = 2, \
6412 .MediaCommandOpcode = 0, \
6413 .SubOpcode = 0, \
6414 .DwordLength = 7
6415
6416 struct GEN8_MEDIA_VFE_STATE {
6417 uint32_t CommandType;
6418 uint32_t Pipeline;
6419 uint32_t MediaCommandOpcode;
6420 uint32_t SubOpcode;
6421 uint32_t DwordLength;
6422 __gen_address_type ScratchSpaceBasePointer;
6423 uint32_t StackSize;
6424 uint32_t PerThreadScratchSpace;
6425 __gen_address_type ScratchSpaceBasePointerHigh;
6426 uint32_t MaximumNumberofThreads;
6427 uint32_t NumberofURBEntries;
6428 #define Maintainingtheexistingtimestampstate 0
6429 #define Resettingrelativetimerandlatchingtheglobaltimestamp 1
6430 uint32_t ResetGatewayTimer;
6431 #define MaintainingOpenGatewayForwardMsgCloseGatewayprotocollegacymode 0
6432 #define BypassingOpenGatewayCloseGatewayprotocol 1
6433 uint32_t BypassGatewayControl;
6434 uint32_t SliceDisable;
6435 uint32_t URBEntryAllocationSize;
6436 uint32_t CURBEAllocationSize;
6437 #define Scoreboarddisabled 0
6438 #define Scoreboardenabled 1
6439 uint32_t ScoreboardEnable;
6440 #define StallingScoreboard 0
6441 #define NonStallingScoreboard 1
6442 uint32_t ScoreboardType;
6443 uint32_t ScoreboardMask;
6444 uint32_t Scoreboard3DeltaY;
6445 uint32_t Scoreboard3DeltaX;
6446 uint32_t Scoreboard2DeltaY;
6447 uint32_t Scoreboard2DeltaX;
6448 uint32_t Scoreboard1DeltaY;
6449 uint32_t Scoreboard1DeltaX;
6450 uint32_t Scoreboard0DeltaY;
6451 uint32_t Scoreboard0DeltaX;
6452 uint32_t Scoreboard7DeltaY;
6453 uint32_t Scoreboard7DeltaX;
6454 uint32_t Scoreboard6DeltaY;
6455 uint32_t Scoreboard6DeltaX;
6456 uint32_t Scoreboard5DeltaY;
6457 uint32_t Scoreboard5DeltaX;
6458 uint32_t Scoreboard4DeltaY;
6459 uint32_t Scoreboard4DeltaX;
6460 };
6461
6462 static inline void
6463 GEN8_MEDIA_VFE_STATE_pack(__gen_user_data *data, void * restrict dst,
6464 const struct GEN8_MEDIA_VFE_STATE * restrict values)
6465 {
6466 uint32_t *dw = (uint32_t * restrict) dst;
6467
6468 dw[0] =
6469 __gen_field(values->CommandType, 29, 31) |
6470 __gen_field(values->Pipeline, 27, 28) |
6471 __gen_field(values->MediaCommandOpcode, 24, 26) |
6472 __gen_field(values->SubOpcode, 16, 23) |
6473 __gen_field(values->DwordLength, 0, 15) |
6474 0;
6475
6476 uint32_t dw1 =
6477 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
6478 __gen_field(values->StackSize, 4, 7) |
6479 __gen_field(values->PerThreadScratchSpace, 0, 3) |
6480 0;
6481
6482 dw[1] =
6483 __gen_combine_address(data, &dw[1], values->ScratchSpaceBasePointer, dw1);
6484
6485 uint32_t dw2 =
6486 __gen_offset(values->ScratchSpaceBasePointerHigh, 0, 15) |
6487 0;
6488
6489 dw[2] =
6490 __gen_combine_address(data, &dw[2], values->ScratchSpaceBasePointerHigh, dw2);
6491
6492 dw[3] =
6493 __gen_field(values->MaximumNumberofThreads, 16, 31) |
6494 __gen_field(values->NumberofURBEntries, 8, 15) |
6495 __gen_field(values->ResetGatewayTimer, 7, 7) |
6496 __gen_field(values->BypassGatewayControl, 6, 6) |
6497 0;
6498
6499 dw[4] =
6500 __gen_field(values->SliceDisable, 0, 1) |
6501 0;
6502
6503 dw[5] =
6504 __gen_field(values->URBEntryAllocationSize, 16, 31) |
6505 __gen_field(values->CURBEAllocationSize, 0, 15) |
6506 0;
6507
6508 dw[6] =
6509 __gen_field(values->ScoreboardEnable, 31, 31) |
6510 __gen_field(values->ScoreboardType, 30, 30) |
6511 __gen_field(values->ScoreboardMask, 0, 7) |
6512 0;
6513
6514 dw[7] =
6515 __gen_field(values->Scoreboard3DeltaY, 28, 31) |
6516 __gen_field(values->Scoreboard3DeltaX, 24, 27) |
6517 __gen_field(values->Scoreboard2DeltaY, 20, 23) |
6518 __gen_field(values->Scoreboard2DeltaX, 16, 19) |
6519 __gen_field(values->Scoreboard1DeltaY, 12, 15) |
6520 __gen_field(values->Scoreboard1DeltaX, 8, 11) |
6521 __gen_field(values->Scoreboard0DeltaY, 4, 7) |
6522 __gen_field(values->Scoreboard0DeltaX, 0, 3) |
6523 0;
6524
6525 dw[8] =
6526 __gen_field(values->Scoreboard7DeltaY, 28, 31) |
6527 __gen_field(values->Scoreboard7DeltaX, 24, 27) |
6528 __gen_field(values->Scoreboard6DeltaY, 20, 23) |
6529 __gen_field(values->Scoreboard6DeltaX, 16, 19) |
6530 __gen_field(values->Scoreboard5DeltaY, 12, 15) |
6531 __gen_field(values->Scoreboard5DeltaX, 8, 11) |
6532 __gen_field(values->Scoreboard4DeltaY, 4, 7) |
6533 __gen_field(values->Scoreboard4DeltaX, 0, 3) |
6534 0;
6535
6536 }
6537
6538 #define GEN8_MI_ARB_CHECK_length 0x00000001
6539 #define GEN8_MI_ARB_CHECK_length_bias 0x00000001
6540 #define GEN8_MI_ARB_CHECK_header \
6541 .CommandType = 0, \
6542 .MICommandOpcode = 5
6543
6544 struct GEN8_MI_ARB_CHECK {
6545 uint32_t CommandType;
6546 uint32_t MICommandOpcode;
6547 };
6548
6549 static inline void
6550 GEN8_MI_ARB_CHECK_pack(__gen_user_data *data, void * restrict dst,
6551 const struct GEN8_MI_ARB_CHECK * restrict values)
6552 {
6553 uint32_t *dw = (uint32_t * restrict) dst;
6554
6555 dw[0] =
6556 __gen_field(values->CommandType, 29, 31) |
6557 __gen_field(values->MICommandOpcode, 23, 28) |
6558 0;
6559
6560 }
6561
6562 #define GEN8_MI_BATCH_BUFFER_END_length 0x00000001
6563 #define GEN8_MI_BATCH_BUFFER_END_length_bias 0x00000001
6564 #define GEN8_MI_BATCH_BUFFER_END_header \
6565 .CommandType = 0, \
6566 .MICommandOpcode = 10
6567
6568 struct GEN8_MI_BATCH_BUFFER_END {
6569 uint32_t CommandType;
6570 uint32_t MICommandOpcode;
6571 };
6572
6573 static inline void
6574 GEN8_MI_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
6575 const struct GEN8_MI_BATCH_BUFFER_END * restrict values)
6576 {
6577 uint32_t *dw = (uint32_t * restrict) dst;
6578
6579 dw[0] =
6580 __gen_field(values->CommandType, 29, 31) |
6581 __gen_field(values->MICommandOpcode, 23, 28) |
6582 0;
6583
6584 }
6585
6586 #define GEN8_MI_BATCH_BUFFER_START_length 0x00000003
6587 #define GEN8_MI_BATCH_BUFFER_START_length_bias 0x00000002
6588 #define GEN8_MI_BATCH_BUFFER_START_header \
6589 .CommandType = 0, \
6590 .MICommandOpcode = 49, \
6591 .DwordLength = 1
6592
6593 struct GEN8_MI_BATCH_BUFFER_START {
6594 uint32_t CommandType;
6595 uint32_t MICommandOpcode;
6596 #define _1stlevelbatch 0
6597 #define _2ndlevelbatch 1
6598 uint32_t _2ndLevelBatchBuffer;
6599 uint32_t AddOffsetEnable;
6600 uint32_t PredicationEnable;
6601 uint32_t ResourceStreamerEnable;
6602 #define ASI_GGTT 0
6603 #define ASI_PPGTT 1
6604 uint32_t AddressSpaceIndicator;
6605 uint32_t DwordLength;
6606 __gen_address_type BatchBufferStartAddress;
6607 __gen_address_type BatchBufferStartAddressHigh;
6608 };
6609
6610 static inline void
6611 GEN8_MI_BATCH_BUFFER_START_pack(__gen_user_data *data, void * restrict dst,
6612 const struct GEN8_MI_BATCH_BUFFER_START * restrict values)
6613 {
6614 uint32_t *dw = (uint32_t * restrict) dst;
6615
6616 dw[0] =
6617 __gen_field(values->CommandType, 29, 31) |
6618 __gen_field(values->MICommandOpcode, 23, 28) |
6619 __gen_field(values->_2ndLevelBatchBuffer, 22, 22) |
6620 __gen_field(values->AddOffsetEnable, 16, 16) |
6621 __gen_field(values->PredicationEnable, 15, 15) |
6622 __gen_field(values->ResourceStreamerEnable, 10, 10) |
6623 __gen_field(values->AddressSpaceIndicator, 8, 8) |
6624 __gen_field(values->DwordLength, 0, 7) |
6625 0;
6626
6627 uint32_t dw1 =
6628 0;
6629
6630 dw[1] =
6631 __gen_combine_address(data, &dw[1], values->BatchBufferStartAddress, dw1);
6632
6633 uint32_t dw2 =
6634 0;
6635
6636 dw[2] =
6637 __gen_combine_address(data, &dw[2], values->BatchBufferStartAddressHigh, dw2);
6638
6639 }
6640
6641 #define GEN8_MI_CLFLUSH_length_bias 0x00000002
6642 #define GEN8_MI_CLFLUSH_header \
6643 .CommandType = 0, \
6644 .MICommandOpcode = 39
6645
6646 struct GEN8_MI_CLFLUSH {
6647 uint32_t CommandType;
6648 uint32_t MICommandOpcode;
6649 #define PerProcessGraphicsAddress 0
6650 #define GlobalGraphicsAddress 1
6651 uint32_t UseGlobalGTT;
6652 uint32_t DwordLength;
6653 __gen_address_type PageBaseAddress;
6654 uint32_t StartingCachelineOffset;
6655 __gen_address_type PageBaseAddressHigh;
6656 /* variable length fields follow */
6657 };
6658
6659 static inline void
6660 GEN8_MI_CLFLUSH_pack(__gen_user_data *data, void * restrict dst,
6661 const struct GEN8_MI_CLFLUSH * restrict values)
6662 {
6663 uint32_t *dw = (uint32_t * restrict) dst;
6664
6665 dw[0] =
6666 __gen_field(values->CommandType, 29, 31) |
6667 __gen_field(values->MICommandOpcode, 23, 28) |
6668 __gen_field(values->UseGlobalGTT, 22, 22) |
6669 __gen_field(values->DwordLength, 0, 9) |
6670 0;
6671
6672 uint32_t dw1 =
6673 __gen_field(values->StartingCachelineOffset, 6, 11) |
6674 0;
6675
6676 dw[1] =
6677 __gen_combine_address(data, &dw[1], values->PageBaseAddress, dw1);
6678
6679 uint32_t dw2 =
6680 0;
6681
6682 dw[2] =
6683 __gen_combine_address(data, &dw[2], values->PageBaseAddressHigh, dw2);
6684
6685 /* variable length fields follow */
6686 }
6687
6688 #define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_length 0x00000003
6689 #define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_length_bias 0x00000002
6690 #define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_header\
6691 .CommandType = 0, \
6692 .MICommandOpcode = 54, \
6693 .UseGlobalGTT = 0, \
6694 .CompareSemaphore = 0, \
6695 .DwordLength = 1
6696
6697 struct GEN8_MI_CONDITIONAL_BATCH_BUFFER_END {
6698 uint32_t CommandType;
6699 uint32_t MICommandOpcode;
6700 uint32_t UseGlobalGTT;
6701 uint32_t CompareSemaphore;
6702 uint32_t DwordLength;
6703 uint32_t CompareDataDword;
6704 __gen_address_type CompareAddress;
6705 __gen_address_type CompareAddressHigh;
6706 };
6707
6708 static inline void
6709 GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
6710 const struct GEN8_MI_CONDITIONAL_BATCH_BUFFER_END * restrict values)
6711 {
6712 uint32_t *dw = (uint32_t * restrict) dst;
6713
6714 dw[0] =
6715 __gen_field(values->CommandType, 29, 31) |
6716 __gen_field(values->MICommandOpcode, 23, 28) |
6717 __gen_field(values->UseGlobalGTT, 22, 22) |
6718 __gen_field(values->CompareSemaphore, 21, 21) |
6719 __gen_field(values->DwordLength, 0, 7) |
6720 0;
6721
6722 dw[1] =
6723 __gen_field(values->CompareDataDword, 0, 31) |
6724 0;
6725
6726 uint32_t dw2 =
6727 0;
6728
6729 dw[2] =
6730 __gen_combine_address(data, &dw[2], values->CompareAddress, dw2);
6731
6732 uint32_t dw3 =
6733 0;
6734
6735 dw[3] =
6736 __gen_combine_address(data, &dw[3], values->CompareAddressHigh, dw3);
6737
6738 }
6739
6740 #define GEN8_MI_COPY_MEM_MEM_length 0x00000005
6741 #define GEN8_MI_COPY_MEM_MEM_length_bias 0x00000002
6742 #define GEN8_MI_COPY_MEM_MEM_header \
6743 .CommandType = 0, \
6744 .MICommandOpcode = 46, \
6745 .DwordLength = 3
6746
6747 struct GEN8_MI_COPY_MEM_MEM {
6748 uint32_t CommandType;
6749 uint32_t MICommandOpcode;
6750 #define PerProcessGraphicsAddress 0
6751 #define GlobalGraphicsAddress 1
6752 uint32_t UseGlobalGTTSource;
6753 #define PerProcessGraphicsAddress 0
6754 #define GlobalGraphicsAddress 1
6755 uint32_t UseGlobalGTTDestination;
6756 uint32_t DwordLength;
6757 __gen_address_type DestinationMemoryAddress;
6758 __gen_address_type SourceMemoryAddress;
6759 };
6760
6761 static inline void
6762 GEN8_MI_COPY_MEM_MEM_pack(__gen_user_data *data, void * restrict dst,
6763 const struct GEN8_MI_COPY_MEM_MEM * restrict values)
6764 {
6765 uint32_t *dw = (uint32_t * restrict) dst;
6766
6767 dw[0] =
6768 __gen_field(values->CommandType, 29, 31) |
6769 __gen_field(values->MICommandOpcode, 23, 28) |
6770 __gen_field(values->UseGlobalGTTSource, 22, 22) |
6771 __gen_field(values->UseGlobalGTTDestination, 21, 21) |
6772 __gen_field(values->DwordLength, 0, 7) |
6773 0;
6774
6775 uint32_t dw1 =
6776 0;
6777
6778 uint64_t qw1 =
6779 __gen_combine_address(data, &dw[1], values->DestinationMemoryAddress, dw1);
6780
6781 dw[1] = qw1;
6782 dw[2] = qw1 >> 32;
6783
6784 uint32_t dw3 =
6785 0;
6786
6787 uint64_t qw3 =
6788 __gen_combine_address(data, &dw[3], values->SourceMemoryAddress, dw3);
6789
6790 dw[3] = qw3;
6791 dw[4] = qw3 >> 32;
6792
6793 }
6794
6795 #define GEN8_MI_LOAD_REGISTER_IMM_length 0x00000003
6796 #define GEN8_MI_LOAD_REGISTER_IMM_length_bias 0x00000002
6797 #define GEN8_MI_LOAD_REGISTER_IMM_header \
6798 .CommandType = 0, \
6799 .MICommandOpcode = 34, \
6800 .DwordLength = 1
6801
6802 struct GEN8_MI_LOAD_REGISTER_IMM {
6803 uint32_t CommandType;
6804 uint32_t MICommandOpcode;
6805 uint32_t ByteWriteDisables;
6806 uint32_t DwordLength;
6807 uint32_t RegisterOffset;
6808 uint32_t DataDWord;
6809 };
6810
6811 static inline void
6812 GEN8_MI_LOAD_REGISTER_IMM_pack(__gen_user_data *data, void * restrict dst,
6813 const struct GEN8_MI_LOAD_REGISTER_IMM * restrict values)
6814 {
6815 uint32_t *dw = (uint32_t * restrict) dst;
6816
6817 dw[0] =
6818 __gen_field(values->CommandType, 29, 31) |
6819 __gen_field(values->MICommandOpcode, 23, 28) |
6820 __gen_field(values->ByteWriteDisables, 8, 11) |
6821 __gen_field(values->DwordLength, 0, 7) |
6822 0;
6823
6824 dw[1] =
6825 __gen_offset(values->RegisterOffset, 2, 22) |
6826 0;
6827
6828 dw[2] =
6829 __gen_field(values->DataDWord, 0, 31) |
6830 0;
6831
6832 }
6833
6834 #define GEN8_MI_LOAD_REGISTER_MEM_length 0x00000004
6835 #define GEN8_MI_LOAD_REGISTER_MEM_length_bias 0x00000002
6836 #define GEN8_MI_LOAD_REGISTER_MEM_header \
6837 .CommandType = 0, \
6838 .MICommandOpcode = 41, \
6839 .DwordLength = 2
6840
6841 struct GEN8_MI_LOAD_REGISTER_MEM {
6842 uint32_t CommandType;
6843 uint32_t MICommandOpcode;
6844 uint32_t UseGlobalGTT;
6845 uint32_t AsyncModeEnable;
6846 uint32_t DwordLength;
6847 uint32_t RegisterAddress;
6848 __gen_address_type MemoryAddress;
6849 };
6850
6851 static inline void
6852 GEN8_MI_LOAD_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
6853 const struct GEN8_MI_LOAD_REGISTER_MEM * restrict values)
6854 {
6855 uint32_t *dw = (uint32_t * restrict) dst;
6856
6857 dw[0] =
6858 __gen_field(values->CommandType, 29, 31) |
6859 __gen_field(values->MICommandOpcode, 23, 28) |
6860 __gen_field(values->UseGlobalGTT, 22, 22) |
6861 __gen_field(values->AsyncModeEnable, 21, 21) |
6862 __gen_field(values->DwordLength, 0, 7) |
6863 0;
6864
6865 dw[1] =
6866 __gen_offset(values->RegisterAddress, 2, 22) |
6867 0;
6868
6869 uint32_t dw2 =
6870 0;
6871
6872 uint64_t qw2 =
6873 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
6874
6875 dw[2] = qw2;
6876 dw[3] = qw2 >> 32;
6877
6878 }
6879
6880 #define GEN8_MI_LOAD_SCAN_LINES_EXCL_length 0x00000002
6881 #define GEN8_MI_LOAD_SCAN_LINES_EXCL_length_bias 0x00000002
6882 #define GEN8_MI_LOAD_SCAN_LINES_EXCL_header \
6883 .CommandType = 0, \
6884 .MICommandOpcode = 19, \
6885 .DwordLength = 0
6886
6887 struct GEN8_MI_LOAD_SCAN_LINES_EXCL {
6888 uint32_t CommandType;
6889 uint32_t MICommandOpcode;
6890 #define DisplayPlaneA 0
6891 #define DisplayPlaneB 1
6892 #define DisplayPlaneC 4
6893 uint32_t DisplayPlaneSelect;
6894 uint32_t DwordLength;
6895 uint32_t StartScanLineNumber;
6896 uint32_t EndScanLineNumber;
6897 };
6898
6899 static inline void
6900 GEN8_MI_LOAD_SCAN_LINES_EXCL_pack(__gen_user_data *data, void * restrict dst,
6901 const struct GEN8_MI_LOAD_SCAN_LINES_EXCL * restrict values)
6902 {
6903 uint32_t *dw = (uint32_t * restrict) dst;
6904
6905 dw[0] =
6906 __gen_field(values->CommandType, 29, 31) |
6907 __gen_field(values->MICommandOpcode, 23, 28) |
6908 __gen_field(values->DisplayPlaneSelect, 19, 21) |
6909 __gen_field(values->DwordLength, 0, 5) |
6910 0;
6911
6912 dw[1] =
6913 __gen_field(values->StartScanLineNumber, 16, 28) |
6914 __gen_field(values->EndScanLineNumber, 0, 12) |
6915 0;
6916
6917 }
6918
6919 #define GEN8_MI_LOAD_SCAN_LINES_INCL_length 0x00000002
6920 #define GEN8_MI_LOAD_SCAN_LINES_INCL_length_bias 0x00000002
6921 #define GEN8_MI_LOAD_SCAN_LINES_INCL_header \
6922 .CommandType = 0, \
6923 .MICommandOpcode = 18, \
6924 .DwordLength = 0
6925
6926 struct GEN8_MI_LOAD_SCAN_LINES_INCL {
6927 uint32_t CommandType;
6928 uint32_t MICommandOpcode;
6929 #define DisplayPlaneA 0
6930 #define DisplayPlaneB 1
6931 #define DisplayPlaneC 4
6932 uint32_t DisplayPlaneSelect;
6933 #define NeverForward 0
6934 #define AlwaysForward 1
6935 #define ConditionallyForward 2
6936 uint32_t ScanLineEventDoneForward;
6937 uint32_t DwordLength;
6938 uint32_t StartScanLineNumber;
6939 uint32_t EndScanLineNumber;
6940 };
6941
6942 static inline void
6943 GEN8_MI_LOAD_SCAN_LINES_INCL_pack(__gen_user_data *data, void * restrict dst,
6944 const struct GEN8_MI_LOAD_SCAN_LINES_INCL * restrict values)
6945 {
6946 uint32_t *dw = (uint32_t * restrict) dst;
6947
6948 dw[0] =
6949 __gen_field(values->CommandType, 29, 31) |
6950 __gen_field(values->MICommandOpcode, 23, 28) |
6951 __gen_field(values->DisplayPlaneSelect, 19, 21) |
6952 __gen_field(values->ScanLineEventDoneForward, 17, 18) |
6953 __gen_field(values->DwordLength, 0, 5) |
6954 0;
6955
6956 dw[1] =
6957 __gen_field(values->StartScanLineNumber, 16, 28) |
6958 __gen_field(values->EndScanLineNumber, 0, 12) |
6959 0;
6960
6961 }
6962
6963 #define GEN8_MI_LOAD_URB_MEM_length 0x00000004
6964 #define GEN8_MI_LOAD_URB_MEM_length_bias 0x00000002
6965 #define GEN8_MI_LOAD_URB_MEM_header \
6966 .CommandType = 0, \
6967 .MICommandOpcode = 44, \
6968 .DwordLength = 2
6969
6970 struct GEN8_MI_LOAD_URB_MEM {
6971 uint32_t CommandType;
6972 uint32_t MICommandOpcode;
6973 uint32_t DwordLength;
6974 uint32_t URBAddress;
6975 __gen_address_type MemoryAddress;
6976 };
6977
6978 static inline void
6979 GEN8_MI_LOAD_URB_MEM_pack(__gen_user_data *data, void * restrict dst,
6980 const struct GEN8_MI_LOAD_URB_MEM * restrict values)
6981 {
6982 uint32_t *dw = (uint32_t * restrict) dst;
6983
6984 dw[0] =
6985 __gen_field(values->CommandType, 29, 31) |
6986 __gen_field(values->MICommandOpcode, 23, 28) |
6987 __gen_field(values->DwordLength, 0, 7) |
6988 0;
6989
6990 dw[1] =
6991 __gen_field(values->URBAddress, 2, 14) |
6992 0;
6993
6994 uint32_t dw2 =
6995 0;
6996
6997 uint64_t qw2 =
6998 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
6999
7000 dw[2] = qw2;
7001 dw[3] = qw2 >> 32;
7002
7003 }
7004
7005 #define GEN8_MI_MATH_length_bias 0x00000002
7006 #define GEN8_MI_MATH_header \
7007 .CommandType = 0, \
7008 .MICommandOpcode = 26
7009
7010 struct GEN8_MI_MATH {
7011 uint32_t CommandType;
7012 uint32_t MICommandOpcode;
7013 uint32_t DwordLength;
7014 uint32_t ALUINSTRUCTION1;
7015 uint32_t ALUINSTRUCTION2;
7016 /* variable length fields follow */
7017 };
7018
7019 static inline void
7020 GEN8_MI_MATH_pack(__gen_user_data *data, void * restrict dst,
7021 const struct GEN8_MI_MATH * restrict values)
7022 {
7023 uint32_t *dw = (uint32_t * restrict) dst;
7024
7025 dw[0] =
7026 __gen_field(values->CommandType, 29, 31) |
7027 __gen_field(values->MICommandOpcode, 23, 28) |
7028 __gen_field(values->DwordLength, 0, 5) |
7029 0;
7030
7031 dw[1] =
7032 __gen_field(values->ALUINSTRUCTION1, 0, 31) |
7033 0;
7034
7035 dw[2] =
7036 __gen_field(values->ALUINSTRUCTION2, 0, 31) |
7037 0;
7038
7039 /* variable length fields follow */
7040 }
7041
7042 #define GEN8_MI_NOOP_length 0x00000001
7043 #define GEN8_MI_NOOP_length_bias 0x00000001
7044 #define GEN8_MI_NOOP_header \
7045 .CommandType = 0, \
7046 .MICommandOpcode = 0
7047
7048 struct GEN8_MI_NOOP {
7049 uint32_t CommandType;
7050 uint32_t MICommandOpcode;
7051 uint32_t IdentificationNumberRegisterWriteEnable;
7052 uint32_t IdentificationNumber;
7053 };
7054
7055 static inline void
7056 GEN8_MI_NOOP_pack(__gen_user_data *data, void * restrict dst,
7057 const struct GEN8_MI_NOOP * restrict values)
7058 {
7059 uint32_t *dw = (uint32_t * restrict) dst;
7060
7061 dw[0] =
7062 __gen_field(values->CommandType, 29, 31) |
7063 __gen_field(values->MICommandOpcode, 23, 28) |
7064 __gen_field(values->IdentificationNumberRegisterWriteEnable, 22, 22) |
7065 __gen_field(values->IdentificationNumber, 0, 21) |
7066 0;
7067
7068 }
7069
7070 #define GEN8_MI_PREDICATE_length 0x00000001
7071 #define GEN8_MI_PREDICATE_length_bias 0x00000001
7072 #define GEN8_MI_PREDICATE_header \
7073 .CommandType = 0, \
7074 .MICommandOpcode = 12
7075
7076 struct GEN8_MI_PREDICATE {
7077 uint32_t CommandType;
7078 uint32_t MICommandOpcode;
7079 #define KEEP 0
7080 #define LOAD 2
7081 #define LOADINV 3
7082 uint32_t LoadOperation;
7083 #define COMBINE_SET 0
7084 #define COMBINE_AND 1
7085 #define COMBINE_OR 2
7086 #define COMBINE_XOR 3
7087 uint32_t CombineOperation;
7088 #define COMPARE_SRCS_EQUAL 2
7089 #define COMPARE_DELTAS_EQUAL 3
7090 uint32_t CompareOperation;
7091 };
7092
7093 static inline void
7094 GEN8_MI_PREDICATE_pack(__gen_user_data *data, void * restrict dst,
7095 const struct GEN8_MI_PREDICATE * restrict values)
7096 {
7097 uint32_t *dw = (uint32_t * restrict) dst;
7098
7099 dw[0] =
7100 __gen_field(values->CommandType, 29, 31) |
7101 __gen_field(values->MICommandOpcode, 23, 28) |
7102 __gen_field(values->LoadOperation, 6, 7) |
7103 __gen_field(values->CombineOperation, 3, 4) |
7104 __gen_field(values->CompareOperation, 0, 1) |
7105 0;
7106
7107 }
7108
7109 #define GEN8_MI_REPORT_HEAD_length 0x00000001
7110 #define GEN8_MI_REPORT_HEAD_length_bias 0x00000001
7111 #define GEN8_MI_REPORT_HEAD_header \
7112 .CommandType = 0, \
7113 .MICommandOpcode = 7
7114
7115 struct GEN8_MI_REPORT_HEAD {
7116 uint32_t CommandType;
7117 uint32_t MICommandOpcode;
7118 };
7119
7120 static inline void
7121 GEN8_MI_REPORT_HEAD_pack(__gen_user_data *data, void * restrict dst,
7122 const struct GEN8_MI_REPORT_HEAD * restrict values)
7123 {
7124 uint32_t *dw = (uint32_t * restrict) dst;
7125
7126 dw[0] =
7127 __gen_field(values->CommandType, 29, 31) |
7128 __gen_field(values->MICommandOpcode, 23, 28) |
7129 0;
7130
7131 }
7132
7133 #define GEN8_MI_RS_CONTEXT_length 0x00000001
7134 #define GEN8_MI_RS_CONTEXT_length_bias 0x00000001
7135 #define GEN8_MI_RS_CONTEXT_header \
7136 .CommandType = 0, \
7137 .MICommandOpcode = 15
7138
7139 struct GEN8_MI_RS_CONTEXT {
7140 uint32_t CommandType;
7141 uint32_t MICommandOpcode;
7142 #define Restore 0
7143 #define Save 1
7144 uint32_t ResourceStreamerSave;
7145 };
7146
7147 static inline void
7148 GEN8_MI_RS_CONTEXT_pack(__gen_user_data *data, void * restrict dst,
7149 const struct GEN8_MI_RS_CONTEXT * restrict values)
7150 {
7151 uint32_t *dw = (uint32_t * restrict) dst;
7152
7153 dw[0] =
7154 __gen_field(values->CommandType, 29, 31) |
7155 __gen_field(values->MICommandOpcode, 23, 28) |
7156 __gen_field(values->ResourceStreamerSave, 0, 0) |
7157 0;
7158
7159 }
7160
7161 #define GEN8_MI_RS_CONTROL_length 0x00000001
7162 #define GEN8_MI_RS_CONTROL_length_bias 0x00000001
7163 #define GEN8_MI_RS_CONTROL_header \
7164 .CommandType = 0, \
7165 .MICommandOpcode = 6
7166
7167 struct GEN8_MI_RS_CONTROL {
7168 uint32_t CommandType;
7169 uint32_t MICommandOpcode;
7170 #define Stop 0
7171 #define Start 1
7172 uint32_t ResourceStreamerControl;
7173 };
7174
7175 static inline void
7176 GEN8_MI_RS_CONTROL_pack(__gen_user_data *data, void * restrict dst,
7177 const struct GEN8_MI_RS_CONTROL * restrict values)
7178 {
7179 uint32_t *dw = (uint32_t * restrict) dst;
7180
7181 dw[0] =
7182 __gen_field(values->CommandType, 29, 31) |
7183 __gen_field(values->MICommandOpcode, 23, 28) |
7184 __gen_field(values->ResourceStreamerControl, 0, 0) |
7185 0;
7186
7187 }
7188
7189 #define GEN8_MI_RS_STORE_DATA_IMM_length 0x00000004
7190 #define GEN8_MI_RS_STORE_DATA_IMM_length_bias 0x00000002
7191 #define GEN8_MI_RS_STORE_DATA_IMM_header \
7192 .CommandType = 0, \
7193 .MICommandOpcode = 43, \
7194 .DwordLength = 2
7195
7196 struct GEN8_MI_RS_STORE_DATA_IMM {
7197 uint32_t CommandType;
7198 uint32_t MICommandOpcode;
7199 uint32_t DwordLength;
7200 __gen_address_type DestinationAddress;
7201 uint32_t CoreModeEnable;
7202 uint32_t DataDWord0;
7203 };
7204
7205 static inline void
7206 GEN8_MI_RS_STORE_DATA_IMM_pack(__gen_user_data *data, void * restrict dst,
7207 const struct GEN8_MI_RS_STORE_DATA_IMM * restrict values)
7208 {
7209 uint32_t *dw = (uint32_t * restrict) dst;
7210
7211 dw[0] =
7212 __gen_field(values->CommandType, 29, 31) |
7213 __gen_field(values->MICommandOpcode, 23, 28) |
7214 __gen_field(values->DwordLength, 0, 7) |
7215 0;
7216
7217 uint32_t dw1 =
7218 __gen_field(values->CoreModeEnable, 0, 0) |
7219 0;
7220
7221 uint64_t qw1 =
7222 __gen_combine_address(data, &dw[1], values->DestinationAddress, dw1);
7223
7224 dw[1] = qw1;
7225 dw[2] = qw1 >> 32;
7226
7227 dw[3] =
7228 __gen_field(values->DataDWord0, 0, 31) |
7229 0;
7230
7231 }
7232
7233 #define GEN8_MI_SET_CONTEXT_length 0x00000002
7234 #define GEN8_MI_SET_CONTEXT_length_bias 0x00000002
7235 #define GEN8_MI_SET_CONTEXT_header \
7236 .CommandType = 0, \
7237 .MICommandOpcode = 24, \
7238 .DwordLength = 0
7239
7240 struct GEN8_MI_SET_CONTEXT {
7241 uint32_t CommandType;
7242 uint32_t MICommandOpcode;
7243 uint32_t DwordLength;
7244 __gen_address_type LogicalContextAddress;
7245 uint32_t ReservedMustbe1;
7246 uint32_t CoreModeEnable;
7247 uint32_t ResourceStreamerStateSaveEnable;
7248 uint32_t ResourceStreamerStateRestoreEnable;
7249 uint32_t ForceRestore;
7250 uint32_t RestoreInhibit;
7251 };
7252
7253 static inline void
7254 GEN8_MI_SET_CONTEXT_pack(__gen_user_data *data, void * restrict dst,
7255 const struct GEN8_MI_SET_CONTEXT * restrict values)
7256 {
7257 uint32_t *dw = (uint32_t * restrict) dst;
7258
7259 dw[0] =
7260 __gen_field(values->CommandType, 29, 31) |
7261 __gen_field(values->MICommandOpcode, 23, 28) |
7262 __gen_field(values->DwordLength, 0, 7) |
7263 0;
7264
7265 uint32_t dw1 =
7266 __gen_field(values->ReservedMustbe1, 8, 8) |
7267 __gen_field(values->CoreModeEnable, 4, 4) |
7268 __gen_field(values->ResourceStreamerStateSaveEnable, 3, 3) |
7269 __gen_field(values->ResourceStreamerStateRestoreEnable, 2, 2) |
7270 __gen_field(values->ForceRestore, 1, 1) |
7271 __gen_field(values->RestoreInhibit, 0, 0) |
7272 0;
7273
7274 dw[1] =
7275 __gen_combine_address(data, &dw[1], values->LogicalContextAddress, dw1);
7276
7277 }
7278
7279 #define GEN8_MI_SET_PREDICATE_length 0x00000001
7280 #define GEN8_MI_SET_PREDICATE_length_bias 0x00000001
7281 #define GEN8_MI_SET_PREDICATE_header \
7282 .CommandType = 0, \
7283 .MICommandOpcode = 1
7284
7285 struct GEN8_MI_SET_PREDICATE {
7286 uint32_t CommandType;
7287 uint32_t MICommandOpcode;
7288 #define NOOPNever 0
7289 #define NOOPonResult2clear 1
7290 #define NOOPonResult2set 2
7291 #define NOOPonResultclear 3
7292 #define NOOPonResultset 4
7293 #define Executewhenonesliceenabled 5
7294 #define Executewhentwoslicesareenabled 6
7295 #define Executewhenthreeslicesareenabled 7
7296 #define NOOPAlways 15
7297 uint32_t PREDICATEENABLE;
7298 };
7299
7300 static inline void
7301 GEN8_MI_SET_PREDICATE_pack(__gen_user_data *data, void * restrict dst,
7302 const struct GEN8_MI_SET_PREDICATE * restrict values)
7303 {
7304 uint32_t *dw = (uint32_t * restrict) dst;
7305
7306 dw[0] =
7307 __gen_field(values->CommandType, 29, 31) |
7308 __gen_field(values->MICommandOpcode, 23, 28) |
7309 __gen_field(values->PREDICATEENABLE, 0, 3) |
7310 0;
7311
7312 }
7313
7314 #define GEN8_MI_STORE_DATA_IMM_length 0x00000004
7315 #define GEN8_MI_STORE_DATA_IMM_length_bias 0x00000002
7316 #define GEN8_MI_STORE_DATA_IMM_header \
7317 .CommandType = 0, \
7318 .MICommandOpcode = 32, \
7319 .DwordLength = 2
7320
7321 struct GEN8_MI_STORE_DATA_IMM {
7322 uint32_t CommandType;
7323 uint32_t MICommandOpcode;
7324 uint32_t UseGlobalGTT;
7325 uint32_t StoreQword;
7326 uint32_t DwordLength;
7327 __gen_address_type Address;
7328 uint32_t CoreModeEnable;
7329 uint32_t DataDWord0;
7330 uint32_t DataDWord1;
7331 };
7332
7333 static inline void
7334 GEN8_MI_STORE_DATA_IMM_pack(__gen_user_data *data, void * restrict dst,
7335 const struct GEN8_MI_STORE_DATA_IMM * restrict values)
7336 {
7337 uint32_t *dw = (uint32_t * restrict) dst;
7338
7339 dw[0] =
7340 __gen_field(values->CommandType, 29, 31) |
7341 __gen_field(values->MICommandOpcode, 23, 28) |
7342 __gen_field(values->UseGlobalGTT, 22, 22) |
7343 __gen_field(values->StoreQword, 21, 21) |
7344 __gen_field(values->DwordLength, 0, 9) |
7345 0;
7346
7347 uint32_t dw1 =
7348 __gen_field(values->CoreModeEnable, 0, 0) |
7349 0;
7350
7351 uint64_t qw1 =
7352 __gen_combine_address(data, &dw[1], values->Address, dw1);
7353
7354 dw[1] = qw1;
7355 dw[2] = qw1 >> 32;
7356
7357 dw[3] =
7358 __gen_field(values->DataDWord0, 0, 31) |
7359 0;
7360
7361 dw[4] =
7362 __gen_field(values->DataDWord1, 0, 31) |
7363 0;
7364
7365 }
7366
7367 #define GEN8_MI_STORE_DATA_INDEX_length 0x00000003
7368 #define GEN8_MI_STORE_DATA_INDEX_length_bias 0x00000002
7369 #define GEN8_MI_STORE_DATA_INDEX_header \
7370 .CommandType = 0, \
7371 .MICommandOpcode = 33, \
7372 .DwordLength = 1
7373
7374 struct GEN8_MI_STORE_DATA_INDEX {
7375 uint32_t CommandType;
7376 uint32_t MICommandOpcode;
7377 uint32_t UsePerProcessHardwareStatusPage;
7378 uint32_t DwordLength;
7379 uint32_t Offset;
7380 uint32_t DataDWord0;
7381 uint32_t DataDWord1;
7382 };
7383
7384 static inline void
7385 GEN8_MI_STORE_DATA_INDEX_pack(__gen_user_data *data, void * restrict dst,
7386 const struct GEN8_MI_STORE_DATA_INDEX * restrict values)
7387 {
7388 uint32_t *dw = (uint32_t * restrict) dst;
7389
7390 dw[0] =
7391 __gen_field(values->CommandType, 29, 31) |
7392 __gen_field(values->MICommandOpcode, 23, 28) |
7393 __gen_field(values->UsePerProcessHardwareStatusPage, 21, 21) |
7394 __gen_field(values->DwordLength, 0, 7) |
7395 0;
7396
7397 dw[1] =
7398 __gen_field(values->Offset, 2, 11) |
7399 0;
7400
7401 dw[2] =
7402 __gen_field(values->DataDWord0, 0, 31) |
7403 0;
7404
7405 dw[3] =
7406 __gen_field(values->DataDWord1, 0, 31) |
7407 0;
7408
7409 }
7410
7411 #define GEN8_MI_STORE_URB_MEM_length 0x00000004
7412 #define GEN8_MI_STORE_URB_MEM_length_bias 0x00000002
7413 #define GEN8_MI_STORE_URB_MEM_header \
7414 .CommandType = 0, \
7415 .MICommandOpcode = 45, \
7416 .DwordLength = 2
7417
7418 struct GEN8_MI_STORE_URB_MEM {
7419 uint32_t CommandType;
7420 uint32_t MICommandOpcode;
7421 uint32_t DwordLength;
7422 uint32_t URBAddress;
7423 __gen_address_type MemoryAddress;
7424 };
7425
7426 static inline void
7427 GEN8_MI_STORE_URB_MEM_pack(__gen_user_data *data, void * restrict dst,
7428 const struct GEN8_MI_STORE_URB_MEM * restrict values)
7429 {
7430 uint32_t *dw = (uint32_t * restrict) dst;
7431
7432 dw[0] =
7433 __gen_field(values->CommandType, 29, 31) |
7434 __gen_field(values->MICommandOpcode, 23, 28) |
7435 __gen_field(values->DwordLength, 0, 7) |
7436 0;
7437
7438 dw[1] =
7439 __gen_field(values->URBAddress, 2, 14) |
7440 0;
7441
7442 uint32_t dw2 =
7443 0;
7444
7445 uint64_t qw2 =
7446 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
7447
7448 dw[2] = qw2;
7449 dw[3] = qw2 >> 32;
7450
7451 }
7452
7453 #define GEN8_MI_SUSPEND_FLUSH_length 0x00000001
7454 #define GEN8_MI_SUSPEND_FLUSH_length_bias 0x00000001
7455 #define GEN8_MI_SUSPEND_FLUSH_header \
7456 .CommandType = 0, \
7457 .MICommandOpcode = 11
7458
7459 struct GEN8_MI_SUSPEND_FLUSH {
7460 uint32_t CommandType;
7461 uint32_t MICommandOpcode;
7462 uint32_t SuspendFlush;
7463 };
7464
7465 static inline void
7466 GEN8_MI_SUSPEND_FLUSH_pack(__gen_user_data *data, void * restrict dst,
7467 const struct GEN8_MI_SUSPEND_FLUSH * restrict values)
7468 {
7469 uint32_t *dw = (uint32_t * restrict) dst;
7470
7471 dw[0] =
7472 __gen_field(values->CommandType, 29, 31) |
7473 __gen_field(values->MICommandOpcode, 23, 28) |
7474 __gen_field(values->SuspendFlush, 0, 0) |
7475 0;
7476
7477 }
7478
7479 #define GEN8_MI_TOPOLOGY_FILTER_length 0x00000001
7480 #define GEN8_MI_TOPOLOGY_FILTER_length_bias 0x00000001
7481 #define GEN8_MI_TOPOLOGY_FILTER_header \
7482 .CommandType = 0, \
7483 .MICommandOpcode = 13
7484
7485 struct GEN8_MI_TOPOLOGY_FILTER {
7486 uint32_t CommandType;
7487 uint32_t MICommandOpcode;
7488 uint32_t TopologyFilterValue;
7489 };
7490
7491 static inline void
7492 GEN8_MI_TOPOLOGY_FILTER_pack(__gen_user_data *data, void * restrict dst,
7493 const struct GEN8_MI_TOPOLOGY_FILTER * restrict values)
7494 {
7495 uint32_t *dw = (uint32_t * restrict) dst;
7496
7497 dw[0] =
7498 __gen_field(values->CommandType, 29, 31) |
7499 __gen_field(values->MICommandOpcode, 23, 28) |
7500 __gen_field(values->TopologyFilterValue, 0, 5) |
7501 0;
7502
7503 }
7504
7505 #define GEN8_MI_UPDATE_GTT_length_bias 0x00000002
7506 #define GEN8_MI_UPDATE_GTT_header \
7507 .CommandType = 0, \
7508 .MICommandOpcode = 35
7509
7510 struct GEN8_MI_UPDATE_GTT {
7511 uint32_t CommandType;
7512 uint32_t MICommandOpcode;
7513 uint32_t DwordLength;
7514 __gen_address_type EntryAddress;
7515 /* variable length fields follow */
7516 };
7517
7518 static inline void
7519 GEN8_MI_UPDATE_GTT_pack(__gen_user_data *data, void * restrict dst,
7520 const struct GEN8_MI_UPDATE_GTT * restrict values)
7521 {
7522 uint32_t *dw = (uint32_t * restrict) dst;
7523
7524 dw[0] =
7525 __gen_field(values->CommandType, 29, 31) |
7526 __gen_field(values->MICommandOpcode, 23, 28) |
7527 __gen_field(values->DwordLength, 0, 9) |
7528 0;
7529
7530 uint32_t dw1 =
7531 0;
7532
7533 dw[1] =
7534 __gen_combine_address(data, &dw[1], values->EntryAddress, dw1);
7535
7536 /* variable length fields follow */
7537 }
7538
7539 #define GEN8_MI_URB_ATOMIC_ALLOC_length 0x00000001
7540 #define GEN8_MI_URB_ATOMIC_ALLOC_length_bias 0x00000001
7541 #define GEN8_MI_URB_ATOMIC_ALLOC_header \
7542 .CommandType = 0, \
7543 .MICommandOpcode = 9
7544
7545 struct GEN8_MI_URB_ATOMIC_ALLOC {
7546 uint32_t CommandType;
7547 uint32_t MICommandOpcode;
7548 uint32_t URBAtomicStorageOffset;
7549 uint32_t URBAtomicStorageSize;
7550 };
7551
7552 static inline void
7553 GEN8_MI_URB_ATOMIC_ALLOC_pack(__gen_user_data *data, void * restrict dst,
7554 const struct GEN8_MI_URB_ATOMIC_ALLOC * restrict values)
7555 {
7556 uint32_t *dw = (uint32_t * restrict) dst;
7557
7558 dw[0] =
7559 __gen_field(values->CommandType, 29, 31) |
7560 __gen_field(values->MICommandOpcode, 23, 28) |
7561 __gen_field(values->URBAtomicStorageOffset, 12, 19) |
7562 __gen_field(values->URBAtomicStorageSize, 0, 8) |
7563 0;
7564
7565 }
7566
7567 #define GEN8_MI_URB_CLEAR_length 0x00000002
7568 #define GEN8_MI_URB_CLEAR_length_bias 0x00000002
7569 #define GEN8_MI_URB_CLEAR_header \
7570 .CommandType = 0, \
7571 .MICommandOpcode = 25, \
7572 .DwordLength = 0
7573
7574 struct GEN8_MI_URB_CLEAR {
7575 uint32_t CommandType;
7576 uint32_t MICommandOpcode;
7577 uint32_t DwordLength;
7578 uint32_t URBClearLength;
7579 uint32_t URBAddress;
7580 };
7581
7582 static inline void
7583 GEN8_MI_URB_CLEAR_pack(__gen_user_data *data, void * restrict dst,
7584 const struct GEN8_MI_URB_CLEAR * restrict values)
7585 {
7586 uint32_t *dw = (uint32_t * restrict) dst;
7587
7588 dw[0] =
7589 __gen_field(values->CommandType, 29, 31) |
7590 __gen_field(values->MICommandOpcode, 23, 28) |
7591 __gen_field(values->DwordLength, 0, 7) |
7592 0;
7593
7594 dw[1] =
7595 __gen_field(values->URBClearLength, 16, 29) |
7596 __gen_offset(values->URBAddress, 0, 14) |
7597 0;
7598
7599 }
7600
7601 #define GEN8_MI_USER_INTERRUPT_length 0x00000001
7602 #define GEN8_MI_USER_INTERRUPT_length_bias 0x00000001
7603 #define GEN8_MI_USER_INTERRUPT_header \
7604 .CommandType = 0, \
7605 .MICommandOpcode = 2
7606
7607 struct GEN8_MI_USER_INTERRUPT {
7608 uint32_t CommandType;
7609 uint32_t MICommandOpcode;
7610 };
7611
7612 static inline void
7613 GEN8_MI_USER_INTERRUPT_pack(__gen_user_data *data, void * restrict dst,
7614 const struct GEN8_MI_USER_INTERRUPT * restrict values)
7615 {
7616 uint32_t *dw = (uint32_t * restrict) dst;
7617
7618 dw[0] =
7619 __gen_field(values->CommandType, 29, 31) |
7620 __gen_field(values->MICommandOpcode, 23, 28) |
7621 0;
7622
7623 }
7624
7625 #define GEN8_MI_WAIT_FOR_EVENT_length 0x00000001
7626 #define GEN8_MI_WAIT_FOR_EVENT_length_bias 0x00000001
7627 #define GEN8_MI_WAIT_FOR_EVENT_header \
7628 .CommandType = 0, \
7629 .MICommandOpcode = 3
7630
7631 struct GEN8_MI_WAIT_FOR_EVENT {
7632 uint32_t CommandType;
7633 uint32_t MICommandOpcode;
7634 uint32_t DisplayPipeCVerticalBlankWaitEnable;
7635 uint32_t DisplaySpriteCFlipPendingWaitEnable;
7636 uint32_t DisplayPlaneCFlipPendingWaitEnable;
7637 uint32_t DisplayPipeCScanLineWaitEnable;
7638 uint32_t DisplayPipeBVerticalBlankWaitEnable;
7639 uint32_t DisplaySpriteBFlipPendingWaitEnable;
7640 uint32_t DisplayPlaneBFlipPendingWaitEnable;
7641 uint32_t DisplayPipeBScanLineWaitEnable;
7642 uint32_t DisplayPipeAVerticalBlankWaitEnable;
7643 uint32_t DisplaySpriteAFlipPendingWaitEnable;
7644 uint32_t DisplayPlaneAFlipPendingWaitEnable;
7645 uint32_t DisplayPipeAScanLineWaitEnable;
7646 };
7647
7648 static inline void
7649 GEN8_MI_WAIT_FOR_EVENT_pack(__gen_user_data *data, void * restrict dst,
7650 const struct GEN8_MI_WAIT_FOR_EVENT * restrict values)
7651 {
7652 uint32_t *dw = (uint32_t * restrict) dst;
7653
7654 dw[0] =
7655 __gen_field(values->CommandType, 29, 31) |
7656 __gen_field(values->MICommandOpcode, 23, 28) |
7657 __gen_field(values->DisplayPipeCVerticalBlankWaitEnable, 21, 21) |
7658 __gen_field(values->DisplaySpriteCFlipPendingWaitEnable, 20, 20) |
7659 __gen_field(values->DisplayPlaneCFlipPendingWaitEnable, 15, 15) |
7660 __gen_field(values->DisplayPipeCScanLineWaitEnable, 14, 14) |
7661 __gen_field(values->DisplayPipeBVerticalBlankWaitEnable, 11, 11) |
7662 __gen_field(values->DisplaySpriteBFlipPendingWaitEnable, 10, 10) |
7663 __gen_field(values->DisplayPlaneBFlipPendingWaitEnable, 9, 9) |
7664 __gen_field(values->DisplayPipeBScanLineWaitEnable, 8, 8) |
7665 __gen_field(values->DisplayPipeAVerticalBlankWaitEnable, 3, 3) |
7666 __gen_field(values->DisplaySpriteAFlipPendingWaitEnable, 2, 2) |
7667 __gen_field(values->DisplayPlaneAFlipPendingWaitEnable, 1, 1) |
7668 __gen_field(values->DisplayPipeAScanLineWaitEnable, 0, 0) |
7669 0;
7670
7671 }
7672
7673 #define GEN8_PIPE_CONTROL_length 0x00000006
7674 #define GEN8_PIPE_CONTROL_length_bias 0x00000002
7675 #define GEN8_PIPE_CONTROL_header \
7676 .CommandType = 3, \
7677 .CommandSubType = 3, \
7678 ._3DCommandOpcode = 2, \
7679 ._3DCommandSubOpcode = 0, \
7680 .DwordLength = 4
7681
7682 struct GEN8_PIPE_CONTROL {
7683 uint32_t CommandType;
7684 uint32_t CommandSubType;
7685 uint32_t _3DCommandOpcode;
7686 uint32_t _3DCommandSubOpcode;
7687 uint32_t DwordLength;
7688 #define DAT_PPGTT 0
7689 #define DAT_GGTT 1
7690 uint32_t DestinationAddressType;
7691 #define NoLRIOperation 0
7692 #define MMIOWriteImmediateData 1
7693 uint32_t LRIPostSyncOperation;
7694 uint32_t StoreDataIndex;
7695 uint32_t CommandStreamerStallEnable;
7696 #define DontReset 0
7697 #define Reset 1
7698 uint32_t GlobalSnapshotCountReset;
7699 uint32_t TLBInvalidate;
7700 uint32_t GenericMediaStateClear;
7701 #define NoWrite 0
7702 #define WriteImmediateData 1
7703 #define WritePSDepthCount 2
7704 #define WriteTimestamp 3
7705 uint32_t PostSyncOperation;
7706 uint32_t DepthStallEnable;
7707 #define DisableFlush 0
7708 #define EnableFlush 1
7709 uint32_t RenderTargetCacheFlushEnable;
7710 uint32_t InstructionCacheInvalidateEnable;
7711 uint32_t TextureCacheInvalidationEnable;
7712 uint32_t IndirectStatePointersDisable;
7713 uint32_t NotifyEnable;
7714 uint32_t PipeControlFlushEnable;
7715 uint32_t DCFlushEnable;
7716 uint32_t VFCacheInvalidationEnable;
7717 uint32_t ConstantCacheInvalidationEnable;
7718 uint32_t StateCacheInvalidationEnable;
7719 uint32_t StallAtPixelScoreboard;
7720 #define FlushDisabled 0
7721 #define FlushEnabled 1
7722 uint32_t DepthCacheFlushEnable;
7723 __gen_address_type Address;
7724 __gen_address_type AddressHigh;
7725 uint64_t ImmediateData;
7726 };
7727
7728 static inline void
7729 GEN8_PIPE_CONTROL_pack(__gen_user_data *data, void * restrict dst,
7730 const struct GEN8_PIPE_CONTROL * restrict values)
7731 {
7732 uint32_t *dw = (uint32_t * restrict) dst;
7733
7734 dw[0] =
7735 __gen_field(values->CommandType, 29, 31) |
7736 __gen_field(values->CommandSubType, 27, 28) |
7737 __gen_field(values->_3DCommandOpcode, 24, 26) |
7738 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
7739 __gen_field(values->DwordLength, 0, 7) |
7740 0;
7741
7742 dw[1] =
7743 __gen_field(values->DestinationAddressType, 24, 24) |
7744 __gen_field(values->LRIPostSyncOperation, 23, 23) |
7745 __gen_field(values->StoreDataIndex, 21, 21) |
7746 __gen_field(values->CommandStreamerStallEnable, 20, 20) |
7747 __gen_field(values->GlobalSnapshotCountReset, 19, 19) |
7748 __gen_field(values->TLBInvalidate, 18, 18) |
7749 __gen_field(values->GenericMediaStateClear, 16, 16) |
7750 __gen_field(values->PostSyncOperation, 14, 15) |
7751 __gen_field(values->DepthStallEnable, 13, 13) |
7752 __gen_field(values->RenderTargetCacheFlushEnable, 12, 12) |
7753 __gen_field(values->InstructionCacheInvalidateEnable, 11, 11) |
7754 __gen_field(values->TextureCacheInvalidationEnable, 10, 10) |
7755 __gen_field(values->IndirectStatePointersDisable, 9, 9) |
7756 __gen_field(values->NotifyEnable, 8, 8) |
7757 __gen_field(values->PipeControlFlushEnable, 7, 7) |
7758 __gen_field(values->DCFlushEnable, 5, 5) |
7759 __gen_field(values->VFCacheInvalidationEnable, 4, 4) |
7760 __gen_field(values->ConstantCacheInvalidationEnable, 3, 3) |
7761 __gen_field(values->StateCacheInvalidationEnable, 2, 2) |
7762 __gen_field(values->StallAtPixelScoreboard, 1, 1) |
7763 __gen_field(values->DepthCacheFlushEnable, 0, 0) |
7764 0;
7765
7766 uint32_t dw2 =
7767 0;
7768
7769 dw[2] =
7770 __gen_combine_address(data, &dw[2], values->Address, dw2);
7771
7772 uint32_t dw3 =
7773 0;
7774
7775 dw[3] =
7776 __gen_combine_address(data, &dw[3], values->AddressHigh, dw3);
7777
7778 uint64_t qw4 =
7779 __gen_field(values->ImmediateData, 0, 63) |
7780 0;
7781
7782 dw[4] = qw4;
7783 dw[5] = qw4 >> 32;
7784
7785 }
7786
7787 #define GEN8_3DSTATE_CONSTANT_BODY_length 0x0000000a
7788
7789 #define GEN8_BINDING_TABLE_EDIT_ENTRY_length 0x00000001
7790
7791 #define GEN8_GATHER_CONSTANT_ENTRY_length 0x00000001
7792
7793 #define GEN8_VERTEX_BUFFER_STATE_length 0x00000004
7794
7795 #define GEN8_VERTEX_ELEMENT_STATE_length 0x00000002
7796
7797 #define GEN8_SO_DECL_ENTRY_length 0x00000002
7798
7799 #define GEN8_SO_DECL_length 0x00000001
7800
7801 #define GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_length 0x00000001
7802
7803 #define GEN8_SCISSOR_RECT_length 0x00000002
7804
7805 struct GEN8_SCISSOR_RECT {
7806 uint32_t ScissorRectangleYMin;
7807 uint32_t ScissorRectangleXMin;
7808 uint32_t ScissorRectangleYMax;
7809 uint32_t ScissorRectangleXMax;
7810 };
7811
7812 static inline void
7813 GEN8_SCISSOR_RECT_pack(__gen_user_data *data, void * restrict dst,
7814 const struct GEN8_SCISSOR_RECT * restrict values)
7815 {
7816 uint32_t *dw = (uint32_t * restrict) dst;
7817
7818 dw[0] =
7819 __gen_field(values->ScissorRectangleYMin, 16, 31) |
7820 __gen_field(values->ScissorRectangleXMin, 0, 15) |
7821 0;
7822
7823 dw[1] =
7824 __gen_field(values->ScissorRectangleYMax, 16, 31) |
7825 __gen_field(values->ScissorRectangleXMax, 0, 15) |
7826 0;
7827
7828 }
7829
7830 #define GEN8_SF_CLIP_VIEWPORT_length 0x00000010
7831
7832 struct GEN8_SF_CLIP_VIEWPORT {
7833 float ViewportMatrixElementm00;
7834 float ViewportMatrixElementm11;
7835 float ViewportMatrixElementm22;
7836 float ViewportMatrixElementm30;
7837 float ViewportMatrixElementm31;
7838 float ViewportMatrixElementm32;
7839 float XMinClipGuardband;
7840 float XMaxClipGuardband;
7841 float YMinClipGuardband;
7842 float YMaxClipGuardband;
7843 float XMinViewPort;
7844 float XMaxViewPort;
7845 float YMinViewPort;
7846 float YMaxViewPort;
7847 };
7848
7849 static inline void
7850 GEN8_SF_CLIP_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
7851 const struct GEN8_SF_CLIP_VIEWPORT * restrict values)
7852 {
7853 uint32_t *dw = (uint32_t * restrict) dst;
7854
7855 dw[0] =
7856 __gen_float(values->ViewportMatrixElementm00) |
7857 0;
7858
7859 dw[1] =
7860 __gen_float(values->ViewportMatrixElementm11) |
7861 0;
7862
7863 dw[2] =
7864 __gen_float(values->ViewportMatrixElementm22) |
7865 0;
7866
7867 dw[3] =
7868 __gen_float(values->ViewportMatrixElementm30) |
7869 0;
7870
7871 dw[4] =
7872 __gen_float(values->ViewportMatrixElementm31) |
7873 0;
7874
7875 dw[5] =
7876 __gen_float(values->ViewportMatrixElementm32) |
7877 0;
7878
7879 dw[6] =
7880 0;
7881
7882 dw[7] =
7883 0;
7884
7885 dw[8] =
7886 __gen_float(values->XMinClipGuardband) |
7887 0;
7888
7889 dw[9] =
7890 __gen_float(values->XMaxClipGuardband) |
7891 0;
7892
7893 dw[10] =
7894 __gen_float(values->YMinClipGuardband) |
7895 0;
7896
7897 dw[11] =
7898 __gen_float(values->YMaxClipGuardband) |
7899 0;
7900
7901 dw[12] =
7902 __gen_float(values->XMinViewPort) |
7903 0;
7904
7905 dw[13] =
7906 __gen_float(values->XMaxViewPort) |
7907 0;
7908
7909 dw[14] =
7910 __gen_float(values->YMinViewPort) |
7911 0;
7912
7913 dw[15] =
7914 __gen_float(values->YMaxViewPort) |
7915 0;
7916
7917 }
7918
7919 #define GEN8_BLEND_STATE_length 0x00000011
7920
7921 struct GEN8_BLEND_STATE_ENTRY {
7922 uint32_t LogicOpEnable;
7923 uint32_t LogicOpFunction;
7924 uint32_t PreBlendSourceOnlyClampEnable;
7925 #define COLORCLAMP_UNORM 0
7926 #define COLORCLAMP_SNORM 1
7927 #define COLORCLAMP_RTFORMAT 2
7928 uint32_t ColorClampRange;
7929 uint32_t PreBlendColorClampEnable;
7930 uint32_t PostBlendColorClampEnable;
7931 uint32_t ColorBufferBlendEnable;
7932 uint32_t SourceBlendFactor;
7933 uint32_t DestinationBlendFactor;
7934 uint32_t ColorBlendFunction;
7935 uint32_t SourceAlphaBlendFactor;
7936 uint32_t DestinationAlphaBlendFactor;
7937 uint32_t AlphaBlendFunction;
7938 uint32_t WriteDisableAlpha;
7939 uint32_t WriteDisableRed;
7940 uint32_t WriteDisableGreen;
7941 uint32_t WriteDisableBlue;
7942 };
7943
7944 static inline void
7945 GEN8_BLEND_STATE_ENTRY_pack(__gen_user_data *data, void * restrict dst,
7946 const struct GEN8_BLEND_STATE_ENTRY * restrict values)
7947 {
7948 uint32_t *dw = (uint32_t * restrict) dst;
7949
7950 dw[0] =
7951 __gen_field(values->LogicOpEnable, 63, 63) |
7952 __gen_field(values->LogicOpFunction, 59, 62) |
7953 __gen_field(values->PreBlendSourceOnlyClampEnable, 36, 36) |
7954 __gen_field(values->ColorClampRange, 34, 35) |
7955 __gen_field(values->PreBlendColorClampEnable, 33, 33) |
7956 __gen_field(values->PostBlendColorClampEnable, 32, 32) |
7957 __gen_field(values->ColorBufferBlendEnable, 31, 31) |
7958 __gen_field(values->SourceBlendFactor, 26, 30) |
7959 __gen_field(values->DestinationBlendFactor, 21, 25) |
7960 __gen_field(values->ColorBlendFunction, 18, 20) |
7961 __gen_field(values->SourceAlphaBlendFactor, 13, 17) |
7962 __gen_field(values->DestinationAlphaBlendFactor, 8, 12) |
7963 __gen_field(values->AlphaBlendFunction, 5, 7) |
7964 __gen_field(values->WriteDisableAlpha, 3, 3) |
7965 __gen_field(values->WriteDisableRed, 2, 2) |
7966 __gen_field(values->WriteDisableGreen, 1, 1) |
7967 __gen_field(values->WriteDisableBlue, 0, 0) |
7968 0;
7969
7970 }
7971
7972 struct GEN8_BLEND_STATE {
7973 uint32_t AlphaToCoverageEnable;
7974 uint32_t IndependentAlphaBlendEnable;
7975 uint32_t AlphaToOneEnable;
7976 uint32_t AlphaToCoverageDitherEnable;
7977 uint32_t AlphaTestEnable;
7978 uint32_t AlphaTestFunction;
7979 uint32_t ColorDitherEnable;
7980 uint32_t XDitherOffset;
7981 uint32_t YDitherOffset;
7982 struct GEN8_BLEND_STATE_ENTRY Entry;
7983 };
7984
7985 static inline void
7986 GEN8_BLEND_STATE_pack(__gen_user_data *data, void * restrict dst,
7987 const struct GEN8_BLEND_STATE * restrict values)
7988 {
7989 uint32_t *dw = (uint32_t * restrict) dst;
7990
7991 dw[0] =
7992 __gen_field(values->AlphaToCoverageEnable, 31, 31) |
7993 __gen_field(values->IndependentAlphaBlendEnable, 30, 30) |
7994 __gen_field(values->AlphaToOneEnable, 29, 29) |
7995 __gen_field(values->AlphaToCoverageDitherEnable, 28, 28) |
7996 __gen_field(values->AlphaTestEnable, 27, 27) |
7997 __gen_field(values->AlphaTestFunction, 24, 26) |
7998 __gen_field(values->ColorDitherEnable, 23, 23) |
7999 __gen_field(values->XDitherOffset, 21, 22) |
8000 __gen_field(values->YDitherOffset, 19, 20) |
8001 0;
8002
8003 GEN8_BLEND_STATE_ENTRY_pack(data, &dw[1], &values->Entry);
8004 }
8005
8006 #define GEN8_BLEND_STATE_ENTRY_length 0x00000001
8007
8008 #define GEN8_CC_VIEWPORT_length 0x00000002
8009
8010 struct GEN8_CC_VIEWPORT {
8011 float MinimumDepth;
8012 float MaximumDepth;
8013 };
8014
8015 static inline void
8016 GEN8_CC_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
8017 const struct GEN8_CC_VIEWPORT * restrict values)
8018 {
8019 uint32_t *dw = (uint32_t * restrict) dst;
8020
8021 dw[0] =
8022 __gen_float(values->MinimumDepth) |
8023 0;
8024
8025 dw[1] =
8026 __gen_float(values->MaximumDepth) |
8027 0;
8028
8029 }
8030
8031 #define GEN8_COLOR_CALC_STATE_length 0x00000006
8032
8033 struct GEN8_COLOR_CALC_STATE {
8034 uint32_t StencilReferenceValue;
8035 uint32_t BackFaceStencilReferenceValue;
8036 #define Cancelled 0
8037 #define NotCancelled 1
8038 uint32_t RoundDisableFunctionDisable;
8039 #define ALPHATEST_UNORM8 0
8040 #define ALPHATEST_FLOAT32 1
8041 uint32_t AlphaTestFormat;
8042 uint32_t AlphaReferenceValueAsUNORM8;
8043 float AlphaReferenceValueAsFLOAT32;
8044 float BlendConstantColorRed;
8045 float BlendConstantColorGreen;
8046 float BlendConstantColorBlue;
8047 float BlendConstantColorAlpha;
8048 };
8049
8050 static inline void
8051 GEN8_COLOR_CALC_STATE_pack(__gen_user_data *data, void * restrict dst,
8052 const struct GEN8_COLOR_CALC_STATE * restrict values)
8053 {
8054 uint32_t *dw = (uint32_t * restrict) dst;
8055
8056 dw[0] =
8057 __gen_field(values->StencilReferenceValue, 24, 31) |
8058 __gen_field(values->BackFaceStencilReferenceValue, 16, 23) |
8059 __gen_field(values->RoundDisableFunctionDisable, 15, 15) |
8060 __gen_field(values->AlphaTestFormat, 0, 0) |
8061 0;
8062
8063 dw[1] =
8064 __gen_field(values->AlphaReferenceValueAsUNORM8, 0, 31) |
8065 __gen_float(values->AlphaReferenceValueAsFLOAT32) |
8066 0;
8067
8068 dw[2] =
8069 __gen_float(values->BlendConstantColorRed) |
8070 0;
8071
8072 dw[3] =
8073 __gen_float(values->BlendConstantColorGreen) |
8074 0;
8075
8076 dw[4] =
8077 __gen_float(values->BlendConstantColorBlue) |
8078 0;
8079
8080 dw[5] =
8081 __gen_float(values->BlendConstantColorAlpha) |
8082 0;
8083
8084 }
8085
8086 #define GEN8_MEMORY_OBJECT_CONTROL_STATE_length 0x00000001
8087
8088 #define GEN8_VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_length 0x00000001
8089
8090 struct GEN8_VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS {
8091 #define UseCacheabilityControlsfrompagetableUCwithFenceifcoherentcycle 0
8092 #define UncacheableUCnoncacheable 1
8093 #define WritethroughWT 2
8094 #define WritebackWB 3
8095 uint32_t MemoryTypeLLCeLLCCacheabilityControlLeLLCCC;
8096 #define eLLCOnly 0
8097 #define LLCOnly 1
8098 #define LLCeLLCAllowed 2
8099 #define L3LLCeLLCAllowed 3
8100 uint32_t TargetCacheTC;
8101 uint32_t EncryptedData;
8102 #define PoorChance 3
8103 #define NormalChance 2
8104 #define BetterChance 1
8105 #define BestChance 0
8106 uint32_t AgeforQUADLRUAGE;
8107 };
8108
8109 static inline void
8110 GEN8_VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_pack(__gen_user_data *data, void * restrict dst,
8111 const struct GEN8_VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS * restrict values)
8112 {
8113 uint32_t *dw = (uint32_t * restrict) dst;
8114
8115 dw[0] =
8116 __gen_field(values->MemoryTypeLLCeLLCCacheabilityControlLeLLCCC, 5, 6) |
8117 __gen_field(values->TargetCacheTC, 3, 4) |
8118 __gen_field(values->EncryptedData, 2, 2) |
8119 __gen_field(values->AgeforQUADLRUAGE, 0, 1) |
8120 0;
8121
8122 }
8123
8124 #define GEN8_INTERFACE_DESCRIPTOR_DATA_length 0x00000008
8125
8126 struct GEN8_INTERFACE_DESCRIPTOR_DATA {
8127 uint32_t KernelStartPointer;
8128 uint32_t KernelStartPointerHigh;
8129 #define Ftz 0
8130 #define SetByKernel 1
8131 uint32_t DenormMode;
8132 #define Multiple 0
8133 #define Single 1
8134 uint32_t SingleProgramFlow;
8135 #define NormalPriority 0
8136 #define HighPriority 1
8137 uint32_t ThreadPriority;
8138 #define IEEE754 0
8139 #define Alternate 1
8140 uint32_t FloatingPointMode;
8141 uint32_t IllegalOpcodeExceptionEnable;
8142 uint32_t MaskStackExceptionEnable;
8143 uint32_t SoftwareExceptionEnable;
8144 uint32_t SamplerStatePointer;
8145 #define Nosamplersused 0
8146 #define Between1and4samplersused 1
8147 #define Between5and8samplersused 2
8148 #define Between9and12samplersused 3
8149 #define Between13and16samplersused 4
8150 uint32_t SamplerCount;
8151 uint32_t BindingTablePointer;
8152 uint32_t BindingTableEntryCount;
8153 uint32_t ConstantIndirectURBEntryReadLength;
8154 uint32_t ConstantURBEntryReadOffset;
8155 #define RTNE 0
8156 #define RU 1
8157 #define RD 2
8158 #define RTZ 3
8159 uint32_t RoundingMode;
8160 uint32_t BarrierEnable;
8161 #define Encodes0k 0
8162 #define Encodes4k 1
8163 #define Encodes8k 2
8164 #define Encodes16k 4
8165 #define Encodes32k 8
8166 #define Encodes64k 16
8167 uint32_t SharedLocalMemorySize;
8168 uint32_t NumberofThreadsinGPGPUThreadGroup;
8169 uint32_t CrossThreadConstantDataReadLength;
8170 };
8171
8172 static inline void
8173 GEN8_INTERFACE_DESCRIPTOR_DATA_pack(__gen_user_data *data, void * restrict dst,
8174 const struct GEN8_INTERFACE_DESCRIPTOR_DATA * restrict values)
8175 {
8176 uint32_t *dw = (uint32_t * restrict) dst;
8177
8178 dw[0] =
8179 __gen_offset(values->KernelStartPointer, 6, 31) |
8180 0;
8181
8182 dw[1] =
8183 __gen_offset(values->KernelStartPointerHigh, 0, 15) |
8184 0;
8185
8186 dw[2] =
8187 __gen_field(values->DenormMode, 19, 19) |
8188 __gen_field(values->SingleProgramFlow, 18, 18) |
8189 __gen_field(values->ThreadPriority, 17, 17) |
8190 __gen_field(values->FloatingPointMode, 16, 16) |
8191 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
8192 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
8193 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
8194 0;
8195
8196 dw[3] =
8197 __gen_offset(values->SamplerStatePointer, 5, 31) |
8198 __gen_field(values->SamplerCount, 2, 4) |
8199 0;
8200
8201 dw[4] =
8202 __gen_offset(values->BindingTablePointer, 5, 15) |
8203 __gen_field(values->BindingTableEntryCount, 0, 4) |
8204 0;
8205
8206 dw[5] =
8207 __gen_field(values->ConstantIndirectURBEntryReadLength, 16, 31) |
8208 __gen_field(values->ConstantURBEntryReadOffset, 0, 15) |
8209 0;
8210
8211 dw[6] =
8212 __gen_field(values->RoundingMode, 22, 23) |
8213 __gen_field(values->BarrierEnable, 21, 21) |
8214 __gen_field(values->SharedLocalMemorySize, 16, 20) |
8215 __gen_field(values->NumberofThreadsinGPGPUThreadGroup, 0, 9) |
8216 0;
8217
8218 dw[7] =
8219 __gen_field(values->CrossThreadConstantDataReadLength, 0, 7) |
8220 0;
8221
8222 }
8223
8224 #define GEN8_PALETTE_ENTRY_length 0x00000001
8225
8226 #define GEN8_BINDING_TABLE_STATE_length 0x00000001
8227
8228 struct GEN8_BINDING_TABLE_STATE {
8229 uint32_t SurfaceStatePointer;
8230 };
8231
8232 static inline void
8233 GEN8_BINDING_TABLE_STATE_pack(__gen_user_data *data, void * restrict dst,
8234 const struct GEN8_BINDING_TABLE_STATE * restrict values)
8235 {
8236 uint32_t *dw = (uint32_t * restrict) dst;
8237
8238 dw[0] =
8239 __gen_offset(values->SurfaceStatePointer, 6, 31) |
8240 0;
8241
8242 }
8243
8244 #define GEN8_RENDER_SURFACE_STATE_length 0x00000010
8245
8246 struct GEN8_RENDER_SURFACE_STATE {
8247 #define SURFTYPE_1D 0
8248 #define SURFTYPE_2D 1
8249 #define SURFTYPE_3D 2
8250 #define SURFTYPE_CUBE 3
8251 #define SURFTYPE_BUFFER 4
8252 #define SURFTYPE_STRBUF 5
8253 #define SURFTYPE_NULL 7
8254 uint32_t SurfaceType;
8255 uint32_t SurfaceArray;
8256 uint32_t SurfaceFormat;
8257 #define VALIGN4 1
8258 #define VALIGN8 2
8259 #define VALIGN16 3
8260 uint32_t SurfaceVerticalAlignment;
8261 #define HALIGN4 1
8262 #define HALIGN8 2
8263 #define HALIGN16 3
8264 uint32_t SurfaceHorizontalAlignment;
8265 #define LINEAR 0
8266 #define WMAJOR 1
8267 #define XMAJOR 2
8268 #define YMAJOR 3
8269 uint32_t TileMode;
8270 uint32_t VerticalLineStride;
8271 uint32_t VerticalLineStrideOffset;
8272 uint32_t SamplerL2BypassModeDisable;
8273 #define WriteOnlyCache 0
8274 #define ReadWriteCache 1
8275 uint32_t RenderCacheReadWriteMode;
8276 #define NORMAL_MODE 0
8277 #define PROGRESSIVE_FRAME 2
8278 #define INTERLACED_FRAME 3
8279 uint32_t MediaBoundaryPixelMode;
8280 uint32_t CubeFaceEnablePositiveZ;
8281 uint32_t CubeFaceEnableNegativeZ;
8282 uint32_t CubeFaceEnablePositiveY;
8283 uint32_t CubeFaceEnableNegativeY;
8284 uint32_t CubeFaceEnablePositiveX;
8285 uint32_t CubeFaceEnableNegativeX;
8286 struct GEN8_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
8287 float BaseMipLevel;
8288 uint32_t SurfaceQPitch;
8289 uint32_t Height;
8290 uint32_t Width;
8291 uint32_t Depth;
8292 uint32_t SurfacePitch;
8293 #define _0DEG 0
8294 #define _90DEG 1
8295 #define _270DEG 3
8296 uint32_t RenderTargetAndSampleUnormRotation;
8297 uint32_t MinimumArrayElement;
8298 uint32_t RenderTargetViewExtent;
8299 #define MSS 0
8300 #define DEPTH_STENCIL 1
8301 uint32_t MultisampledSurfaceStorageFormat;
8302 #define MULTISAMPLECOUNT_1 0
8303 #define MULTISAMPLECOUNT_2 1
8304 #define MULTISAMPLECOUNT_4 2
8305 #define MULTISAMPLECOUNT_8 3
8306 uint32_t NumberofMultisamples;
8307 uint32_t MultisamplePositionPaletteIndex;
8308 uint32_t XOffset;
8309 uint32_t YOffset;
8310 uint32_t EWADisableForCube;
8311 #define GPUcoherent 0
8312 #define IAcoherent 1
8313 uint32_t CoherencyType;
8314 uint32_t SurfaceMinLOD;
8315 uint32_t MIPCountLOD;
8316 uint32_t AuxiliarySurfaceQPitch;
8317 uint32_t AuxiliarySurfacePitch;
8318 #define AUX_NONE 0
8319 #define AUX_MCS 1
8320 #define AUX_APPEND 2
8321 #define AUX_HIZ 3
8322 uint32_t AuxiliarySurfaceMode;
8323 uint32_t SeparateUVPlaneEnable;
8324 uint32_t XOffsetforUorUVPlane;
8325 uint32_t YOffsetforUorUVPlane;
8326 uint32_t RedClearColor;
8327 uint32_t GreenClearColor;
8328 uint32_t BlueClearColor;
8329 uint32_t AlphaClearColor;
8330 uint32_t ShaderChannelSelectRed;
8331 uint32_t ShaderChannelSelectGreen;
8332 uint32_t ShaderChannelSelectBlue;
8333 uint32_t ShaderChannelSelectAlpha;
8334 float ResourceMinLOD;
8335 __gen_address_type SurfaceBaseAddress;
8336 uint32_t XOffsetforVPlane;
8337 uint32_t YOffsetforVPlane;
8338 uint32_t AuxiliaryTableIndexforMediaCompressedSurface;
8339 __gen_address_type AuxiliarySurfaceBaseAddress;
8340 };
8341
8342 static inline void
8343 GEN8_RENDER_SURFACE_STATE_pack(__gen_user_data *data, void * restrict dst,
8344 const struct GEN8_RENDER_SURFACE_STATE * restrict values)
8345 {
8346 uint32_t *dw = (uint32_t * restrict) dst;
8347
8348 dw[0] =
8349 __gen_field(values->SurfaceType, 29, 31) |
8350 __gen_field(values->SurfaceArray, 28, 28) |
8351 __gen_field(values->SurfaceFormat, 18, 26) |
8352 __gen_field(values->SurfaceVerticalAlignment, 16, 17) |
8353 __gen_field(values->SurfaceHorizontalAlignment, 14, 15) |
8354 __gen_field(values->TileMode, 12, 13) |
8355 __gen_field(values->VerticalLineStride, 11, 11) |
8356 __gen_field(values->VerticalLineStrideOffset, 10, 10) |
8357 __gen_field(values->SamplerL2BypassModeDisable, 9, 9) |
8358 __gen_field(values->RenderCacheReadWriteMode, 8, 8) |
8359 __gen_field(values->MediaBoundaryPixelMode, 6, 7) |
8360 __gen_field(values->CubeFaceEnablePositiveZ, 0, 0) |
8361 __gen_field(values->CubeFaceEnableNegativeZ, 1, 1) |
8362 __gen_field(values->CubeFaceEnablePositiveY, 2, 2) |
8363 __gen_field(values->CubeFaceEnableNegativeY, 3, 3) |
8364 __gen_field(values->CubeFaceEnablePositiveX, 4, 4) |
8365 __gen_field(values->CubeFaceEnableNegativeX, 5, 5) |
8366 0;
8367
8368 uint32_t dw_MemoryObjectControlState;
8369 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
8370 dw[1] =
8371 __gen_field(dw_MemoryObjectControlState, 24, 30) |
8372 __gen_field(values->BaseMipLevel * (1 << 1), 19, 23) |
8373 __gen_field(values->SurfaceQPitch, 0, 14) |
8374 0;
8375
8376 dw[2] =
8377 __gen_field(values->Height, 16, 29) |
8378 __gen_field(values->Width, 0, 13) |
8379 0;
8380
8381 dw[3] =
8382 __gen_field(values->Depth, 21, 31) |
8383 __gen_field(values->SurfacePitch, 0, 17) |
8384 0;
8385
8386 dw[4] =
8387 __gen_field(values->RenderTargetAndSampleUnormRotation, 29, 30) |
8388 __gen_field(values->MinimumArrayElement, 18, 28) |
8389 __gen_field(values->RenderTargetViewExtent, 7, 17) |
8390 __gen_field(values->MultisampledSurfaceStorageFormat, 6, 6) |
8391 __gen_field(values->NumberofMultisamples, 3, 5) |
8392 __gen_field(values->MultisamplePositionPaletteIndex, 0, 2) |
8393 0;
8394
8395 dw[5] =
8396 __gen_offset(values->XOffset, 25, 31) |
8397 __gen_offset(values->YOffset, 21, 23) |
8398 __gen_field(values->EWADisableForCube, 20, 20) |
8399 __gen_field(values->CoherencyType, 14, 14) |
8400 __gen_field(values->SurfaceMinLOD, 4, 7) |
8401 __gen_field(values->MIPCountLOD, 0, 3) |
8402 0;
8403
8404 dw[6] =
8405 __gen_field(values->AuxiliarySurfaceQPitch, 16, 30) |
8406 __gen_field(values->AuxiliarySurfacePitch, 3, 11) |
8407 __gen_field(values->AuxiliarySurfaceMode, 0, 2) |
8408 __gen_field(values->SeparateUVPlaneEnable, 31, 31) |
8409 __gen_field(values->XOffsetforUorUVPlane, 16, 29) |
8410 __gen_field(values->YOffsetforUorUVPlane, 0, 13) |
8411 0;
8412
8413 dw[7] =
8414 __gen_field(values->RedClearColor, 31, 31) |
8415 __gen_field(values->GreenClearColor, 30, 30) |
8416 __gen_field(values->BlueClearColor, 29, 29) |
8417 __gen_field(values->AlphaClearColor, 28, 28) |
8418 __gen_field(values->ShaderChannelSelectRed, 25, 27) |
8419 __gen_field(values->ShaderChannelSelectGreen, 22, 24) |
8420 __gen_field(values->ShaderChannelSelectBlue, 19, 21) |
8421 __gen_field(values->ShaderChannelSelectAlpha, 16, 18) |
8422 __gen_field(values->ResourceMinLOD * (1 << 8), 0, 11) |
8423 0;
8424
8425 uint32_t dw8 =
8426 0;
8427
8428 uint64_t qw8 =
8429 __gen_combine_address(data, &dw[8], values->SurfaceBaseAddress, dw8);
8430
8431 dw[8] = qw8;
8432 dw[9] = qw8 >> 32;
8433
8434 uint32_t dw10 =
8435 __gen_field(values->XOffsetforVPlane, 48, 61) |
8436 __gen_field(values->YOffsetforVPlane, 32, 45) |
8437 __gen_field(values->AuxiliaryTableIndexforMediaCompressedSurface, 21, 31) |
8438 0;
8439
8440 uint64_t qw10 =
8441 __gen_combine_address(data, &dw[10], values->AuxiliarySurfaceBaseAddress, dw10);
8442
8443 dw[10] = qw10;
8444 dw[11] = qw10 >> 32;
8445
8446 dw[12] =
8447 0;
8448
8449 dw[13] =
8450 0;
8451
8452 dw[14] =
8453 0;
8454
8455 dw[15] =
8456 0;
8457
8458 }
8459
8460 #define GEN8_SAMPLER_STATE_length 0x00000004
8461
8462 struct GEN8_SAMPLER_STATE {
8463 uint32_t SamplerDisable;
8464 #define DX10OGL 0
8465 #define DX9 1
8466 uint32_t TextureBorderColorMode;
8467 #define CLAMP_NONE 0
8468 #define CLAMP_OGL 2
8469 uint32_t LODPreClampMode;
8470 float BaseMipLevel;
8471 #define MIPFILTER_NONE 0
8472 #define MIPFILTER_NEAREST 1
8473 #define MIPFILTER_LINEAR 3
8474 uint32_t MipModeFilter;
8475 #define MAPFILTER_NEAREST 0
8476 #define MAPFILTER_LINEAR 1
8477 #define MAPFILTER_ANISOTROPIC 2
8478 #define MAPFILTER_MONO 6
8479 uint32_t MagModeFilter;
8480 #define MAPFILTER_NEAREST 0
8481 #define MAPFILTER_LINEAR 1
8482 #define MAPFILTER_ANISOTROPIC 2
8483 #define MAPFILTER_MONO 6
8484 uint32_t MinModeFilter;
8485 uint32_t TextureLODBias;
8486 #define LEGACY 0
8487 #define EWAApproximation 1
8488 uint32_t AnisotropicAlgorithm;
8489 float MinLOD;
8490 float MaxLOD;
8491 uint32_t ChromaKeyEnable;
8492 uint32_t ChromaKeyIndex;
8493 #define KEYFILTER_KILL_ON_ANY_MATCH 0
8494 #define KEYFILTER_REPLACE_BLACK 1
8495 uint32_t ChromaKeyMode;
8496 #define PREFILTEROPALWAYS 0
8497 #define PREFILTEROPNEVER 1
8498 #define PREFILTEROPLESS 2
8499 #define PREFILTEROPEQUAL 3
8500 #define PREFILTEROPLEQUAL 4
8501 #define PREFILTEROPGREATER 5
8502 #define PREFILTEROPNOTEQUAL 6
8503 #define PREFILTEROPGEQUAL 7
8504 uint32_t ShadowFunction;
8505 #define PROGRAMMED 0
8506 #define OVERRIDE 1
8507 uint32_t CubeSurfaceControlMode;
8508 uint32_t IndirectStatePointer;
8509 #define MIPNONE 0
8510 #define MIPFILTER 1
8511 uint32_t LODClampMagnificationMode;
8512 #define RATIO21 0
8513 #define RATIO41 1
8514 #define RATIO61 2
8515 #define RATIO81 3
8516 #define RATIO101 4
8517 #define RATIO121 5
8518 #define RATIO141 6
8519 #define RATIO161 7
8520 uint32_t MaximumAnisotropy;
8521 uint32_t RAddressMinFilterRoundingEnable;
8522 uint32_t RAddressMagFilterRoundingEnable;
8523 uint32_t VAddressMinFilterRoundingEnable;
8524 uint32_t VAddressMagFilterRoundingEnable;
8525 uint32_t UAddressMinFilterRoundingEnable;
8526 uint32_t UAddressMagFilterRoundingEnable;
8527 #define FULL 0
8528 #define HIGH 1
8529 #define MED 2
8530 #define LOW 3
8531 uint32_t TrilinearFilterQuality;
8532 uint32_t NonnormalizedCoordinateEnable;
8533 uint32_t TCXAddressControlMode;
8534 uint32_t TCYAddressControlMode;
8535 uint32_t TCZAddressControlMode;
8536 };
8537
8538 static inline void
8539 GEN8_SAMPLER_STATE_pack(__gen_user_data *data, void * restrict dst,
8540 const struct GEN8_SAMPLER_STATE * restrict values)
8541 {
8542 uint32_t *dw = (uint32_t * restrict) dst;
8543
8544 dw[0] =
8545 __gen_field(values->SamplerDisable, 31, 31) |
8546 __gen_field(values->TextureBorderColorMode, 29, 29) |
8547 __gen_field(values->LODPreClampMode, 27, 28) |
8548 __gen_field(values->BaseMipLevel * (1 << 1), 22, 26) |
8549 __gen_field(values->MipModeFilter, 20, 21) |
8550 __gen_field(values->MagModeFilter, 17, 19) |
8551 __gen_field(values->MinModeFilter, 14, 16) |
8552 __gen_field(values->TextureLODBias, 1, 13) |
8553 __gen_field(values->AnisotropicAlgorithm, 0, 0) |
8554 0;
8555
8556 dw[1] =
8557 __gen_field(values->MinLOD * (1 << 8), 20, 31) |
8558 __gen_field(values->MaxLOD * (1 << 8), 8, 19) |
8559 __gen_field(values->ChromaKeyEnable, 7, 7) |
8560 __gen_field(values->ChromaKeyIndex, 5, 6) |
8561 __gen_field(values->ChromaKeyMode, 4, 4) |
8562 __gen_field(values->ShadowFunction, 1, 3) |
8563 __gen_field(values->CubeSurfaceControlMode, 0, 0) |
8564 0;
8565
8566 dw[2] =
8567 __gen_field(values->IndirectStatePointer, 6, 23) |
8568 __gen_field(values->LODClampMagnificationMode, 0, 0) |
8569 0;
8570
8571 dw[3] =
8572 __gen_field(values->MaximumAnisotropy, 19, 21) |
8573 __gen_field(values->RAddressMinFilterRoundingEnable, 13, 13) |
8574 __gen_field(values->RAddressMagFilterRoundingEnable, 14, 14) |
8575 __gen_field(values->VAddressMinFilterRoundingEnable, 15, 15) |
8576 __gen_field(values->VAddressMagFilterRoundingEnable, 16, 16) |
8577 __gen_field(values->UAddressMinFilterRoundingEnable, 17, 17) |
8578 __gen_field(values->UAddressMagFilterRoundingEnable, 18, 18) |
8579 __gen_field(values->TrilinearFilterQuality, 11, 12) |
8580 __gen_field(values->NonnormalizedCoordinateEnable, 10, 10) |
8581 __gen_field(values->TCXAddressControlMode, 6, 8) |
8582 __gen_field(values->TCYAddressControlMode, 3, 5) |
8583 __gen_field(values->TCZAddressControlMode, 0, 2) |
8584 0;
8585
8586 }
8587
8588 /* Enum 3D_Prim_Topo_Type */
8589 #define _3DPRIM_POINTLIST 1
8590 #define _3DPRIM_LINELIST 2
8591 #define _3DPRIM_LINESTRIP 3
8592 #define _3DPRIM_TRILIST 4
8593 #define _3DPRIM_TRISTRIP 5
8594 #define _3DPRIM_TRIFAN 6
8595 #define _3DPRIM_QUADLIST 7
8596 #define _3DPRIM_QUADSTRIP 8
8597 #define _3DPRIM_LINELIST_ADJ 9
8598 #define _3DPRIM_LISTSTRIP_ADJ 10
8599 #define _3DPRIM_TRILIST_ADJ 11
8600 #define _3DPRIM_TRISTRIP_ADJ 12
8601 #define _3DPRIM_TRISTRIP_REVERSE 13
8602 #define _3DPRIM_POLYGON 14
8603 #define _3DPRIM_RECTLIST 15
8604 #define _3DPRIM_LINELOOP 16
8605 #define _3DPRIM_POINTLIST_BF 17
8606 #define _3DPRIM_LINESTRIP_CONT 18
8607 #define _3DPRIM_LINESTRIP_BF 19
8608 #define _3DPRIM_LINESTRIP_CONT_BF 20
8609 #define _3DPRIM_TRIFAN_NOSTIPPLE 22
8610 #define _3DPRIM_PATCHLIST_1 32
8611 #define _3DPRIM_PATCHLIST_2 33
8612 #define _3DPRIM_PATCHLIST_3 34
8613 #define _3DPRIM_PATCHLIST_4 35
8614 #define _3DPRIM_PATCHLIST_5 36
8615 #define _3DPRIM_PATCHLIST_6 37
8616 #define _3DPRIM_PATCHLIST_7 38
8617 #define _3DPRIM_PATCHLIST_8 39
8618 #define _3DPRIM_PATCHLIST_9 40
8619 #define _3DPRIM_PATCHLIST_10 41
8620 #define _3DPRIM_PATCHLIST_11 42
8621 #define _3DPRIM_PATCHLIST_12 43
8622 #define _3DPRIM_PATCHLIST_13 44
8623 #define _3DPRIM_PATCHLIST_14 45
8624 #define _3DPRIM_PATCHLIST_15 46
8625 #define _3DPRIM_PATCHLIST_16 47
8626 #define _3DPRIM_PATCHLIST_17 48
8627 #define _3DPRIM_PATCHLIST_18 49
8628 #define _3DPRIM_PATCHLIST_19 50
8629 #define _3DPRIM_PATCHLIST_20 51
8630 #define _3DPRIM_PATCHLIST_21 52
8631 #define _3DPRIM_PATCHLIST_22 53
8632 #define _3DPRIM_PATCHLIST_23 54
8633 #define _3DPRIM_PATCHLIST_24 55
8634 #define _3DPRIM_PATCHLIST_25 56
8635 #define _3DPRIM_PATCHLIST_26 57
8636 #define _3DPRIM_PATCHLIST_27 58
8637 #define _3DPRIM_PATCHLIST_28 59
8638 #define _3DPRIM_PATCHLIST_29 60
8639 #define _3DPRIM_PATCHLIST_30 61
8640 #define _3DPRIM_PATCHLIST_31 62
8641 #define _3DPRIM_PATCHLIST_32 63
8642
8643 /* Enum 3D_Vertex_Component_Control */
8644 #define VFCOMP_NOSTORE 0
8645 #define VFCOMP_STORE_SRC 1
8646 #define VFCOMP_STORE_0 2
8647 #define VFCOMP_STORE_1_FP 3
8648 #define VFCOMP_STORE_1_INT 4
8649 #define VFCOMP_STORE_PID 7
8650
8651 /* Enum WRAP_SHORTEST_ENABLE */
8652 #define X 1
8653 #define Y 2
8654 #define XY 3
8655 #define Z 4
8656 #define XZ 5
8657 #define YZ 6
8658 #define XYZ 7
8659 #define W 8
8660 #define XW 9
8661 #define YW 10
8662 #define XYW 11
8663 #define ZW 12
8664 #define XZW 13
8665 #define YZW 14
8666 #define XYZW 15
8667
8668 /* Enum 3D_Stencil_Operation */
8669 #define STENCILOP_KEEP 0
8670 #define STENCILOP_ZERO 1
8671 #define STENCILOP_REPLACE 2
8672 #define STENCILOP_INCRSAT 3
8673 #define STENCILOP_DECRSAT 4
8674 #define STENCILOP_INCR 5
8675 #define STENCILOP_DECR 6
8676 #define STENCILOP_INVERT 7
8677
8678 /* Enum 3D_Color_Buffer_Blend_Factor */
8679 #define BLENDFACTOR_ONE 1
8680 #define BLENDFACTOR_SRC_COLOR 2
8681 #define BLENDFACTOR_SRC_ALPHA 3
8682 #define BLENDFACTOR_DST_ALPHA 4
8683 #define BLENDFACTOR_DST_COLOR 5
8684 #define BLENDFACTOR_SRC_ALPHA_SATURATE 6
8685 #define BLENDFACTOR_CONST_COLOR 7
8686 #define BLENDFACTOR_CONST_ALPHA 8
8687 #define BLENDFACTOR_SRC1_COLOR 9
8688 #define BLENDFACTOR_SRC1_ALPHA 10
8689 #define BLENDFACTOR_ZERO 17
8690 #define BLENDFACTOR_INV_SRC_COLOR 18
8691 #define BLENDFACTOR_INV_SRC_ALPHA 19
8692 #define BLENDFACTOR_INV_DST_ALPHA 20
8693 #define BLENDFACTOR_INV_DST_COLOR 21
8694 #define BLENDFACTOR_INV_CONST_COLOR 23
8695 #define BLENDFACTOR_INV_CONST_ALPHA 24
8696 #define BLENDFACTOR_INV_SRC1_COLOR 25
8697 #define BLENDFACTOR_INV_SRC1_ALPHA 26
8698
8699 /* Enum 3D_Color_Buffer_Blend_Function */
8700 #define BLENDFUNCTION_ADD 0
8701 #define BLENDFUNCTION_SUBTRACT 1
8702 #define BLENDFUNCTION_REVERSE_SUBTRACT 2
8703 #define BLENDFUNCTION_MIN 3
8704 #define BLENDFUNCTION_MAX 4
8705
8706 /* Enum 3D_Compare_Function */
8707 #define COMPAREFUNCTION_ALWAYS 0
8708 #define COMPAREFUNCTION_NEVER 1
8709 #define COMPAREFUNCTION_LESS 2
8710 #define COMPAREFUNCTION_EQUAL 3
8711 #define COMPAREFUNCTION_LEQUAL 4
8712 #define COMPAREFUNCTION_GREATER 5
8713 #define COMPAREFUNCTION_NOTEQUAL 6
8714 #define COMPAREFUNCTION_GEQUAL 7
8715
8716 /* Enum 3D_Logic_Op_Function */
8717 #define LOGICOP_CLEAR 0
8718 #define LOGICOP_NOR 1
8719 #define LOGICOP_AND_INVERTED 2
8720 #define LOGICOP_COPY_INVERTED 3
8721 #define LOGICOP_AND_REVERSE 4
8722 #define LOGICOP_INVERT 5
8723 #define LOGICOP_XOR 6
8724 #define LOGICOP_NAND 7
8725 #define LOGICOP_AND 8
8726 #define LOGICOP_EQUIV 9
8727 #define LOGICOP_NOOP 10
8728 #define LOGICOP_OR_INVERTED 11
8729 #define LOGICOP_COPY 12
8730 #define LOGICOP_OR_REVERSE 13
8731 #define LOGICOP_OR 14
8732 #define LOGICOP_SET 15
8733
8734 /* Enum SURFACE_FORMAT */
8735 #define R32G32B32A32_FLOAT 0
8736 #define R32G32B32A32_SINT 1
8737 #define R32G32B32A32_UINT 2
8738 #define R32G32B32A32_UNORM 3
8739 #define R32G32B32A32_SNORM 4
8740 #define R64G64_FLOAT 5
8741 #define R32G32B32X32_FLOAT 6
8742 #define R32G32B32A32_SSCALED 7
8743 #define R32G32B32A32_USCALED 8
8744 #define R32G32B32A32_SFIXED 32
8745 #define R64G64_PASSTHRU 33
8746 #define R32G32B32_FLOAT 64
8747 #define R32G32B32_SINT 65
8748 #define R32G32B32_UINT 66
8749 #define R32G32B32_UNORM 67
8750 #define R32G32B32_SNORM 68
8751 #define R32G32B32_SSCALED 69
8752 #define R32G32B32_USCALED 70
8753 #define R32G32B32_SFIXED 80
8754 #define R16G16B16A16_UNORM 128
8755 #define R16G16B16A16_SNORM 129
8756 #define R16G16B16A16_SINT 130
8757 #define R16G16B16A16_UINT 131
8758 #define R16G16B16A16_FLOAT 132
8759 #define R32G32_FLOAT 133
8760 #define R32G32_SINT 134
8761 #define R32G32_UINT 135
8762 #define R32_FLOAT_X8X24_TYPELESS 136
8763 #define X32_TYPELESS_G8X24_UINT 137
8764 #define L32A32_FLOAT 138
8765 #define R32G32_UNORM 139
8766 #define R32G32_SNORM 140
8767 #define R64_FLOAT 141
8768 #define R16G16B16X16_UNORM 142
8769 #define R16G16B16X16_FLOAT 143
8770 #define A32X32_FLOAT 144
8771 #define L32X32_FLOAT 145
8772 #define I32X32_FLOAT 146
8773 #define R16G16B16A16_SSCALED 147
8774 #define R16G16B16A16_USCALED 148
8775 #define R32G32_SSCALED 149
8776 #define R32G32_USCALED 150
8777 #define R32G32_SFIXED 160
8778 #define R64_PASSTHRU 161
8779 #define B8G8R8A8_UNORM 192
8780 #define B8G8R8A8_UNORM_SRGB 193
8781 #define R10G10B10A2_UNORM 194
8782 #define R10G10B10A2_UNORM_SRGB 195
8783 #define R10G10B10A2_UINT 196
8784 #define R10G10B10_SNORM_A2_UNORM 197
8785 #define R8G8B8A8_UNORM 199
8786 #define R8G8B8A8_UNORM_SRGB 200
8787 #define R8G8B8A8_SNORM 201
8788 #define R8G8B8A8_SINT 202
8789 #define R8G8B8A8_UINT 203
8790 #define R16G16_UNORM 204
8791 #define R16G16_SNORM 205
8792 #define R16G16_SINT 206
8793 #define R16G16_UINT 207
8794 #define R16G16_FLOAT 208
8795 #define B10G10R10A2_UNORM 209
8796 #define B10G10R10A2_UNORM_SRGB 210
8797 #define R11G11B10_FLOAT 211
8798 #define R32_SINT 214
8799 #define R32_UINT 215
8800 #define R32_FLOAT 216
8801 #define R24_UNORM_X8_TYPELESS 217
8802 #define X24_TYPELESS_G8_UINT 218
8803 #define L32_UNORM 221
8804 #define A32_UNORM 222
8805 #define L16A16_UNORM 223
8806 #define I24X8_UNORM 224
8807 #define L24X8_UNORM 225
8808 #define A24X8_UNORM 226
8809 #define I32_FLOAT 227
8810 #define L32_FLOAT 228
8811 #define A32_FLOAT 229
8812 #define X8B8_UNORM_G8R8_SNORM 230
8813 #define A8X8_UNORM_G8R8_SNORM 231
8814 #define B8X8_UNORM_G8R8_SNORM 232
8815 #define B8G8R8X8_UNORM 233
8816 #define B8G8R8X8_UNORM_SRGB 234
8817 #define R8G8B8X8_UNORM 235
8818 #define R8G8B8X8_UNORM_SRGB 236
8819 #define R9G9B9E5_SHAREDEXP 237
8820 #define B10G10R10X2_UNORM 238
8821 #define L16A16_FLOAT 240
8822 #define R32_UNORM 241
8823 #define R32_SNORM 242
8824 #define R10G10B10X2_USCALED 243
8825 #define R8G8B8A8_SSCALED 244
8826 #define R8G8B8A8_USCALED 245
8827 #define R16G16_SSCALED 246
8828 #define R16G16_USCALED 247
8829 #define R32_SSCALED 248
8830 #define R32_USCALED 249
8831 #define B5G6R5_UNORM 256
8832 #define B5G6R5_UNORM_SRGB 257
8833 #define B5G5R5A1_UNORM 258
8834 #define B5G5R5A1_UNORM_SRGB 259
8835 #define B4G4R4A4_UNORM 260
8836 #define B4G4R4A4_UNORM_SRGB 261
8837 #define R8G8_UNORM 262
8838 #define R8G8_SNORM 263
8839 #define R8G8_SINT 264
8840 #define R8G8_UINT 265
8841 #define R16_UNORM 266
8842 #define R16_SNORM 267
8843 #define R16_SINT 268
8844 #define R16_UINT 269
8845 #define R16_FLOAT 270
8846 #define A8P8_UNORM_PALETTE0 271
8847 #define A8P8_UNORM_PALETTE1 272
8848 #define I16_UNORM 273
8849 #define L16_UNORM 274
8850 #define A16_UNORM 275
8851 #define L8A8_UNORM 276
8852 #define I16_FLOAT 277
8853 #define L16_FLOAT 278
8854 #define A16_FLOAT 279
8855 #define L8A8_UNORM_SRGB 280
8856 #define R5G5_SNORM_B6_UNORM 281
8857 #define B5G5R5X1_UNORM 282
8858 #define B5G5R5X1_UNORM_SRGB 283
8859 #define R8G8_SSCALED 284
8860 #define R8G8_USCALED 285
8861 #define R16_SSCALED 286
8862 #define R16_USCALED 287
8863 #define P8A8_UNORM_PALETTE0 290
8864 #define P8A8_UNORM_PALETTE1 291
8865 #define A1B5G5R5_UNORM 292
8866 #define A4B4G4R4_UNORM 293
8867 #define L8A8_UINT 294
8868 #define L8A8_SINT 295
8869 #define R8_UNORM 320
8870 #define R8_SNORM 321
8871 #define R8_SINT 322
8872 #define R8_UINT 323
8873 #define A8_UNORM 324
8874 #define I8_UNORM 325
8875 #define L8_UNORM 326
8876 #define P4A4_UNORM_PALETTE0 327
8877 #define A4P4_UNORM_PALETTE0 328
8878 #define R8_SSCALED 329
8879 #define R8_USCALED 330
8880 #define P8_UNORM_PALETTE0 331
8881 #define L8_UNORM_SRGB 332
8882 #define P8_UNORM_PALETTE1 333
8883 #define P4A4_UNORM_PALETTE1 334
8884 #define A4P4_UNORM_PALETTE1 335
8885 #define Y8_UNORM 336
8886 #define L8_UINT 338
8887 #define L8_SINT 339
8888 #define I8_UINT 340
8889 #define I8_SINT 341
8890 #define DXT1_RGB_SRGB 384
8891 #define R1_UNORM 385
8892 #define YCRCB_NORMAL 386
8893 #define YCRCB_SWAPUVY 387
8894 #define P2_UNORM_PALETTE0 388
8895 #define P2_UNORM_PALETTE1 389
8896 #define BC1_UNORM 390
8897 #define BC2_UNORM 391
8898 #define BC3_UNORM 392
8899 #define BC4_UNORM 393
8900 #define BC5_UNORM 394
8901 #define BC1_UNORM_SRGB 395
8902 #define BC2_UNORM_SRGB 396
8903 #define BC3_UNORM_SRGB 397
8904 #define MONO8 398
8905 #define YCRCB_SWAPUV 399
8906 #define YCRCB_SWAPY 400
8907 #define DXT1_RGB 401
8908 #define FXT1 402
8909 #define R8G8B8_UNORM 403
8910 #define R8G8B8_SNORM 404
8911 #define R8G8B8_SSCALED 405
8912 #define R8G8B8_USCALED 406
8913 #define R64G64B64A64_FLOAT 407
8914 #define R64G64B64_FLOAT 408
8915 #define BC4_SNORM 409
8916 #define BC5_SNORM 410
8917 #define R16G16B16_FLOAT 411
8918 #define R16G16B16_UNORM 412
8919 #define R16G16B16_SNORM 413
8920 #define R16G16B16_SSCALED 414
8921 #define R16G16B16_USCALED 415
8922 #define BC6H_SF16 417
8923 #define BC7_UNORM 418
8924 #define BC7_UNORM_SRGB 419
8925 #define BC6H_UF16 420
8926 #define PLANAR_420_8 421
8927 #define R8G8B8_UNORM_SRGB 424
8928 #define ETC1_RGB8 425
8929 #define ETC2_RGB8 426
8930 #define EAC_R11 427
8931 #define EAC_RG11 428
8932 #define EAC_SIGNED_R11 429
8933 #define EAC_SIGNED_RG11 430
8934 #define ETC2_SRGB8 431
8935 #define R16G16B16_UINT 432
8936 #define R16G16B16_SINT 433
8937 #define R32_SFIXED 434
8938 #define R10G10B10A2_SNORM 435
8939 #define R10G10B10A2_USCALED 436
8940 #define R10G10B10A2_SSCALED 437
8941 #define R10G10B10A2_SINT 438
8942 #define B10G10R10A2_SNORM 439
8943 #define B10G10R10A2_USCALED 440
8944 #define B10G10R10A2_SSCALED 441
8945 #define B10G10R10A2_UINT 442
8946 #define B10G10R10A2_SINT 443
8947 #define R64G64B64A64_PASSTHRU 444
8948 #define R64G64B64_PASSTHRU 445
8949 #define ETC2_RGB8_PTA 448
8950 #define ETC2_SRGB8_PTA 449
8951 #define ETC2_EAC_RGBA8 450
8952 #define ETC2_EAC_SRGB8_A8 451
8953 #define R8G8B8_UINT 456
8954 #define R8G8B8_SINT 457
8955 #define RAW 511
8956
8957 /* Enum Shader Channel Select */
8958 #define SCS_ZERO 0
8959 #define SCS_ONE 1
8960 #define SCS_RED 4
8961 #define SCS_GREEN 5
8962 #define SCS_BLUE 6
8963 #define SCS_ALPHA 7
8964
8965 /* Enum Clear Color */
8966 #define CC_ZERO 0
8967 #define CC_ONE 1
8968
8969 /* Enum Texture Coordinate Mode */
8970 #define TCM_WRAP 0
8971 #define TCM_MIRROR 1
8972 #define TCM_CLAMP 2
8973 #define TCM_CUBE 3
8974 #define TCM_CLAMP_BORDER 4
8975 #define TCM_MIRROR_ONCE 5
8976 #define TCM_HALF_BORDER 6
8977