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vk: Update generated headers
[mesa.git] / src / vulkan / gen8_pack.h
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24
25 /* Instructions, enums and structures for BDW.
26 *
27 * This file has been generated, do not hand edit.
28 */
29
30 #pragma once
31
32 #include <stdio.h>
33 #include <assert.h>
34
35 #ifndef __gen_validate_value
36 #define __gen_validate_value(x)
37 #endif
38
39 #ifndef __gen_field_functions
40 #define __gen_field_functions
41
42 union __gen_value {
43 float f;
44 uint32_t dw;
45 };
46
47 static inline uint64_t
48 __gen_mbo(uint32_t start, uint32_t end)
49 {
50 return (~0ul >> (64 - (end - start + 1))) << start;
51 }
52
53 static inline uint64_t
54 __gen_field(uint64_t v, uint32_t start, uint32_t end)
55 {
56 __gen_validate_value(v);
57 #if DEBUG
58 if (end - start + 1 < 64)
59 assert(v < 1ul << (end - start + 1));
60 #endif
61
62 return v << start;
63 }
64
65 static inline uint64_t
66 __gen_offset(uint64_t v, uint32_t start, uint32_t end)
67 {
68 __gen_validate_value(v);
69 #if DEBUG
70 uint64_t mask = (~0ul >> (64 - (end - start + 1))) << start;
71
72 assert((v & ~mask) == 0);
73 #endif
74
75 return v;
76 }
77
78 static inline uint32_t
79 __gen_float(float v)
80 {
81 __gen_validate_value(v);
82 return ((union __gen_value) { .f = (v) }).dw;
83 }
84
85 #ifndef __gen_address_type
86 #error #define __gen_address_type before including this file
87 #endif
88
89 #ifndef __gen_user_data
90 #error #define __gen_combine_address before including this file
91 #endif
92
93 #endif
94
95 #define GEN8_3DSTATE_URB_VS_length 0x00000002
96 #define GEN8_3DSTATE_URB_VS_length_bias 0x00000002
97 #define GEN8_3DSTATE_URB_VS_header \
98 .CommandType = 3, \
99 .CommandSubType = 3, \
100 ._3DCommandOpcode = 0, \
101 ._3DCommandSubOpcode = 48, \
102 .DwordLength = 0
103
104 struct GEN8_3DSTATE_URB_VS {
105 uint32_t CommandType;
106 uint32_t CommandSubType;
107 uint32_t _3DCommandOpcode;
108 uint32_t _3DCommandSubOpcode;
109 uint32_t DwordLength;
110 uint32_t VSURBStartingAddress;
111 uint32_t VSURBEntryAllocationSize;
112 uint32_t VSNumberofURBEntries;
113 };
114
115 static inline void
116 GEN8_3DSTATE_URB_VS_pack(__gen_user_data *data, void * restrict dst,
117 const struct GEN8_3DSTATE_URB_VS * restrict values)
118 {
119 uint32_t *dw = (uint32_t * restrict) dst;
120
121 dw[0] =
122 __gen_field(values->CommandType, 29, 31) |
123 __gen_field(values->CommandSubType, 27, 28) |
124 __gen_field(values->_3DCommandOpcode, 24, 26) |
125 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
126 __gen_field(values->DwordLength, 0, 7) |
127 0;
128
129 dw[1] =
130 __gen_field(values->VSURBStartingAddress, 25, 31) |
131 __gen_field(values->VSURBEntryAllocationSize, 16, 24) |
132 __gen_field(values->VSNumberofURBEntries, 0, 15) |
133 0;
134
135 }
136
137 #define GEN8_3DSTATE_VS_length 0x00000009
138 #define GEN8_3DSTATE_VS_length_bias 0x00000002
139 #define GEN8_3DSTATE_VS_header \
140 .CommandType = 3, \
141 .CommandSubType = 3, \
142 ._3DCommandOpcode = 0, \
143 ._3DCommandSubOpcode = 16, \
144 .DwordLength = 7
145
146 struct GEN8_3DSTATE_VS {
147 uint32_t CommandType;
148 uint32_t CommandSubType;
149 uint32_t _3DCommandOpcode;
150 uint32_t _3DCommandSubOpcode;
151 uint32_t DwordLength;
152 uint64_t KernelStartPointer;
153 #define Multiple 0
154 #define Single 1
155 uint32_t SingleVertexDispatch;
156 #define Dmask 0
157 #define Vmask 1
158 uint32_t VectorMaskEnable;
159 #define NoSamplers 0
160 #define _14Samplers 1
161 #define _58Samplers 2
162 #define _912Samplers 3
163 #define _1316Samplers 4
164 uint32_t SamplerCount;
165 uint32_t BindingTableEntryCount;
166 #define Normal 0
167 #define High 1
168 uint32_t ThreadDispatchPriority;
169 #define IEEE754 0
170 #define Alternate 1
171 uint32_t FloatingPointMode;
172 bool IllegalOpcodeExceptionEnable;
173 bool AccessesUAV;
174 bool SoftwareExceptionEnable;
175 uint64_t ScratchSpaceBasePointer;
176 uint32_t PerThreadScratchSpace;
177 uint32_t DispatchGRFStartRegisterForURBData;
178 uint32_t VertexURBEntryReadLength;
179 uint32_t VertexURBEntryReadOffset;
180 uint32_t MaximumNumberofThreads;
181 bool StatisticsEnable;
182 bool SIMD8DispatchEnable;
183 bool VertexCacheDisable;
184 bool FunctionEnable;
185 uint32_t VertexURBEntryOutputReadOffset;
186 uint32_t VertexURBEntryOutputLength;
187 uint32_t UserClipDistanceClipTestEnableBitmask;
188 uint32_t UserClipDistanceCullTestEnableBitmask;
189 };
190
191 static inline void
192 GEN8_3DSTATE_VS_pack(__gen_user_data *data, void * restrict dst,
193 const struct GEN8_3DSTATE_VS * restrict values)
194 {
195 uint32_t *dw = (uint32_t * restrict) dst;
196
197 dw[0] =
198 __gen_field(values->CommandType, 29, 31) |
199 __gen_field(values->CommandSubType, 27, 28) |
200 __gen_field(values->_3DCommandOpcode, 24, 26) |
201 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
202 __gen_field(values->DwordLength, 0, 7) |
203 0;
204
205 uint64_t qw1 =
206 __gen_offset(values->KernelStartPointer, 6, 63) |
207 0;
208
209 dw[1] = qw1;
210 dw[2] = qw1 >> 32;
211
212 dw[3] =
213 __gen_field(values->SingleVertexDispatch, 31, 31) |
214 __gen_field(values->VectorMaskEnable, 30, 30) |
215 __gen_field(values->SamplerCount, 27, 29) |
216 __gen_field(values->BindingTableEntryCount, 18, 25) |
217 __gen_field(values->ThreadDispatchPriority, 17, 17) |
218 __gen_field(values->FloatingPointMode, 16, 16) |
219 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
220 __gen_field(values->AccessesUAV, 12, 12) |
221 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
222 0;
223
224 uint64_t qw4 =
225 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
226 __gen_field(values->PerThreadScratchSpace, 0, 3) |
227 0;
228
229 dw[4] = qw4;
230 dw[5] = qw4 >> 32;
231
232 dw[6] =
233 __gen_field(values->DispatchGRFStartRegisterForURBData, 20, 24) |
234 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
235 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
236 0;
237
238 dw[7] =
239 __gen_field(values->MaximumNumberofThreads, 23, 31) |
240 __gen_field(values->StatisticsEnable, 10, 10) |
241 __gen_field(values->SIMD8DispatchEnable, 2, 2) |
242 __gen_field(values->VertexCacheDisable, 1, 1) |
243 __gen_field(values->FunctionEnable, 0, 0) |
244 0;
245
246 dw[8] =
247 __gen_field(values->VertexURBEntryOutputReadOffset, 21, 26) |
248 __gen_field(values->VertexURBEntryOutputLength, 16, 20) |
249 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 8, 15) |
250 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
251 0;
252
253 }
254
255 #define GEN8_GPGPU_CSR_BASE_ADDRESS_length 0x00000003
256 #define GEN8_GPGPU_CSR_BASE_ADDRESS_length_bias 0x00000002
257 #define GEN8_GPGPU_CSR_BASE_ADDRESS_header \
258 .CommandType = 3, \
259 .CommandSubType = 0, \
260 ._3DCommandOpcode = 1, \
261 ._3DCommandSubOpcode = 4, \
262 .DwordLength = 1
263
264 struct GEN8_GPGPU_CSR_BASE_ADDRESS {
265 uint32_t CommandType;
266 uint32_t CommandSubType;
267 uint32_t _3DCommandOpcode;
268 uint32_t _3DCommandSubOpcode;
269 uint32_t DwordLength;
270 __gen_address_type GPGPUCSRBaseAddress;
271 };
272
273 static inline void
274 GEN8_GPGPU_CSR_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
275 const struct GEN8_GPGPU_CSR_BASE_ADDRESS * restrict values)
276 {
277 uint32_t *dw = (uint32_t * restrict) dst;
278
279 dw[0] =
280 __gen_field(values->CommandType, 29, 31) |
281 __gen_field(values->CommandSubType, 27, 28) |
282 __gen_field(values->_3DCommandOpcode, 24, 26) |
283 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
284 __gen_field(values->DwordLength, 0, 7) |
285 0;
286
287 uint32_t dw1 =
288 0;
289
290 uint64_t qw1 =
291 __gen_combine_address(data, &dw[1], values->GPGPUCSRBaseAddress, dw1);
292
293 dw[1] = qw1;
294 dw[2] = qw1 >> 32;
295
296 }
297
298 #define GEN8_MI_ATOMIC_length 0x00000003
299 #define GEN8_MI_ATOMIC_length_bias 0x00000002
300 #define GEN8_MI_ATOMIC_header \
301 .CommandType = 0, \
302 .MICommandOpcode = 47
303
304 struct GEN8_MI_ATOMIC {
305 uint32_t CommandType;
306 uint32_t MICommandOpcode;
307 #define PerProcessGraphicsAddress 0
308 #define GlobalGraphicsAddress 1
309 uint32_t MemoryType;
310 uint32_t PostSyncOperation;
311 #define DWORD 0
312 #define QWORD 1
313 #define OCTWORD 2
314 #define RESERVED 3
315 uint32_t DataSize;
316 uint32_t InlineData;
317 uint32_t CSSTALL;
318 uint32_t ReturnDataControl;
319 uint32_t ATOMICOPCODE;
320 uint32_t DwordLength;
321 __gen_address_type MemoryAddress;
322 uint32_t Operand1DataDword0;
323 uint32_t Operand2DataDword0;
324 uint32_t Operand1DataDword1;
325 uint32_t Operand2DataDword1;
326 uint32_t Operand1DataDword2;
327 uint32_t Operand2DataDword2;
328 uint32_t Operand1DataDword3;
329 uint32_t Operand2DataDword3;
330 };
331
332 static inline void
333 GEN8_MI_ATOMIC_pack(__gen_user_data *data, void * restrict dst,
334 const struct GEN8_MI_ATOMIC * restrict values)
335 {
336 uint32_t *dw = (uint32_t * restrict) dst;
337
338 dw[0] =
339 __gen_field(values->CommandType, 29, 31) |
340 __gen_field(values->MICommandOpcode, 23, 28) |
341 __gen_field(values->MemoryType, 22, 22) |
342 __gen_field(values->PostSyncOperation, 21, 21) |
343 __gen_field(values->DataSize, 19, 20) |
344 __gen_field(values->InlineData, 18, 18) |
345 __gen_field(values->CSSTALL, 17, 17) |
346 __gen_field(values->ReturnDataControl, 16, 16) |
347 __gen_field(values->ATOMICOPCODE, 8, 15) |
348 __gen_field(values->DwordLength, 0, 7) |
349 0;
350
351 uint32_t dw1 =
352 0;
353
354 uint64_t qw1 =
355 __gen_combine_address(data, &dw[1], values->MemoryAddress, dw1);
356
357 dw[1] = qw1;
358 dw[2] = qw1 >> 32;
359
360 dw[3] =
361 __gen_field(values->Operand1DataDword0, 0, 31) |
362 0;
363
364 dw[4] =
365 __gen_field(values->Operand2DataDword0, 0, 31) |
366 0;
367
368 dw[5] =
369 __gen_field(values->Operand1DataDword1, 0, 31) |
370 0;
371
372 dw[6] =
373 __gen_field(values->Operand2DataDword1, 0, 31) |
374 0;
375
376 dw[7] =
377 __gen_field(values->Operand1DataDword2, 0, 31) |
378 0;
379
380 dw[8] =
381 __gen_field(values->Operand2DataDword2, 0, 31) |
382 0;
383
384 dw[9] =
385 __gen_field(values->Operand1DataDword3, 0, 31) |
386 0;
387
388 dw[10] =
389 __gen_field(values->Operand2DataDword3, 0, 31) |
390 0;
391
392 }
393
394 #define GEN8_MI_LOAD_REGISTER_REG_length 0x00000003
395 #define GEN8_MI_LOAD_REGISTER_REG_length_bias 0x00000002
396 #define GEN8_MI_LOAD_REGISTER_REG_header \
397 .CommandType = 0, \
398 .MICommandOpcode = 42, \
399 .DwordLength = 1
400
401 struct GEN8_MI_LOAD_REGISTER_REG {
402 uint32_t CommandType;
403 uint32_t MICommandOpcode;
404 uint32_t DwordLength;
405 uint32_t SourceRegisterAddress;
406 uint32_t DestinationRegisterAddress;
407 };
408
409 static inline void
410 GEN8_MI_LOAD_REGISTER_REG_pack(__gen_user_data *data, void * restrict dst,
411 const struct GEN8_MI_LOAD_REGISTER_REG * restrict values)
412 {
413 uint32_t *dw = (uint32_t * restrict) dst;
414
415 dw[0] =
416 __gen_field(values->CommandType, 29, 31) |
417 __gen_field(values->MICommandOpcode, 23, 28) |
418 __gen_field(values->DwordLength, 0, 7) |
419 0;
420
421 dw[1] =
422 __gen_offset(values->SourceRegisterAddress, 2, 22) |
423 0;
424
425 dw[2] =
426 __gen_offset(values->DestinationRegisterAddress, 2, 22) |
427 0;
428
429 }
430
431 #define GEN8_MI_SEMAPHORE_SIGNAL_length 0x00000002
432 #define GEN8_MI_SEMAPHORE_SIGNAL_length_bias 0x00000002
433 #define GEN8_MI_SEMAPHORE_SIGNAL_header \
434 .CommandType = 0, \
435 .MICommandOpcode = 27, \
436 .DwordLength = 0
437
438 struct GEN8_MI_SEMAPHORE_SIGNAL {
439 uint32_t CommandType;
440 uint32_t MICommandOpcode;
441 uint32_t PostSyncOperation;
442 #define RCS 0
443 #define VCS0 1
444 #define BCS 2
445 #define VECS 3
446 #define VCS1 4
447 uint32_t TargetEngineSelect;
448 uint32_t DwordLength;
449 uint32_t TargetContextID;
450 };
451
452 static inline void
453 GEN8_MI_SEMAPHORE_SIGNAL_pack(__gen_user_data *data, void * restrict dst,
454 const struct GEN8_MI_SEMAPHORE_SIGNAL * restrict values)
455 {
456 uint32_t *dw = (uint32_t * restrict) dst;
457
458 dw[0] =
459 __gen_field(values->CommandType, 29, 31) |
460 __gen_field(values->MICommandOpcode, 23, 28) |
461 __gen_field(values->PostSyncOperation, 21, 21) |
462 __gen_field(values->TargetEngineSelect, 15, 17) |
463 __gen_field(values->DwordLength, 0, 7) |
464 0;
465
466 dw[1] =
467 __gen_field(values->TargetContextID, 0, 31) |
468 0;
469
470 }
471
472 #define GEN8_MI_SEMAPHORE_WAIT_length 0x00000004
473 #define GEN8_MI_SEMAPHORE_WAIT_length_bias 0x00000002
474 #define GEN8_MI_SEMAPHORE_WAIT_header \
475 .CommandType = 0, \
476 .MICommandOpcode = 28, \
477 .DwordLength = 2
478
479 struct GEN8_MI_SEMAPHORE_WAIT {
480 uint32_t CommandType;
481 uint32_t MICommandOpcode;
482 #define PerProcessGraphicsAddress 0
483 #define GlobalGraphicsAddress 1
484 uint32_t MemoryType;
485 #define PollingMode 1
486 #define SignalMode 0
487 uint32_t WaitMode;
488 #define SAD_GREATER_THAN_SDD 0
489 #define SAD_GREATER_THAN_OR_EQUAL_SDD 1
490 #define SAD_LESS_THAN_SDD 2
491 #define SAD_LESS_THAN_OR_EQUAL_SDD 3
492 #define SAD_EQUAL_SDD 4
493 #define SAD_NOT_EQUAL_SDD 5
494 uint32_t CompareOperation;
495 uint32_t DwordLength;
496 uint32_t SemaphoreDataDword;
497 __gen_address_type SemaphoreAddress;
498 };
499
500 static inline void
501 GEN8_MI_SEMAPHORE_WAIT_pack(__gen_user_data *data, void * restrict dst,
502 const struct GEN8_MI_SEMAPHORE_WAIT * restrict values)
503 {
504 uint32_t *dw = (uint32_t * restrict) dst;
505
506 dw[0] =
507 __gen_field(values->CommandType, 29, 31) |
508 __gen_field(values->MICommandOpcode, 23, 28) |
509 __gen_field(values->MemoryType, 22, 22) |
510 __gen_field(values->WaitMode, 15, 15) |
511 __gen_field(values->CompareOperation, 12, 14) |
512 __gen_field(values->DwordLength, 0, 7) |
513 0;
514
515 dw[1] =
516 __gen_field(values->SemaphoreDataDword, 0, 31) |
517 0;
518
519 uint32_t dw2 =
520 0;
521
522 uint64_t qw2 =
523 __gen_combine_address(data, &dw[2], values->SemaphoreAddress, dw2);
524
525 dw[2] = qw2;
526 dw[3] = qw2 >> 32;
527
528 }
529
530 #define GEN8_MI_STORE_REGISTER_MEM_length 0x00000004
531 #define GEN8_MI_STORE_REGISTER_MEM_length_bias 0x00000002
532 #define GEN8_MI_STORE_REGISTER_MEM_header \
533 .CommandType = 0, \
534 .MICommandOpcode = 36, \
535 .DwordLength = 2
536
537 struct GEN8_MI_STORE_REGISTER_MEM {
538 uint32_t CommandType;
539 uint32_t MICommandOpcode;
540 bool UseGlobalGTT;
541 uint32_t PredicateEnable;
542 uint32_t DwordLength;
543 uint32_t RegisterAddress;
544 __gen_address_type MemoryAddress;
545 };
546
547 static inline void
548 GEN8_MI_STORE_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
549 const struct GEN8_MI_STORE_REGISTER_MEM * restrict values)
550 {
551 uint32_t *dw = (uint32_t * restrict) dst;
552
553 dw[0] =
554 __gen_field(values->CommandType, 29, 31) |
555 __gen_field(values->MICommandOpcode, 23, 28) |
556 __gen_field(values->UseGlobalGTT, 22, 22) |
557 __gen_field(values->PredicateEnable, 21, 21) |
558 __gen_field(values->DwordLength, 0, 7) |
559 0;
560
561 dw[1] =
562 __gen_offset(values->RegisterAddress, 2, 22) |
563 0;
564
565 uint32_t dw2 =
566 0;
567
568 uint64_t qw2 =
569 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
570
571 dw[2] = qw2;
572 dw[3] = qw2 >> 32;
573
574 }
575
576 #define GEN8_PIPELINE_SELECT_length 0x00000001
577 #define GEN8_PIPELINE_SELECT_length_bias 0x00000001
578 #define GEN8_PIPELINE_SELECT_header \
579 .CommandType = 3, \
580 .CommandSubType = 1, \
581 ._3DCommandOpcode = 1, \
582 ._3DCommandSubOpcode = 4
583
584 struct GEN8_PIPELINE_SELECT {
585 uint32_t CommandType;
586 uint32_t CommandSubType;
587 uint32_t _3DCommandOpcode;
588 uint32_t _3DCommandSubOpcode;
589 #define _3D 0
590 #define Media 1
591 #define GPGPU 2
592 uint32_t PipelineSelection;
593 };
594
595 static inline void
596 GEN8_PIPELINE_SELECT_pack(__gen_user_data *data, void * restrict dst,
597 const struct GEN8_PIPELINE_SELECT * restrict values)
598 {
599 uint32_t *dw = (uint32_t * restrict) dst;
600
601 dw[0] =
602 __gen_field(values->CommandType, 29, 31) |
603 __gen_field(values->CommandSubType, 27, 28) |
604 __gen_field(values->_3DCommandOpcode, 24, 26) |
605 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
606 __gen_field(values->PipelineSelection, 0, 1) |
607 0;
608
609 }
610
611 #define GEN8_STATE_BASE_ADDRESS_length 0x00000010
612 #define GEN8_STATE_BASE_ADDRESS_length_bias 0x00000002
613 #define GEN8_STATE_BASE_ADDRESS_header \
614 .CommandType = 3, \
615 .CommandSubType = 0, \
616 ._3DCommandOpcode = 1, \
617 ._3DCommandSubOpcode = 1, \
618 .DwordLength = 14
619
620 struct GEN8_MEMORY_OBJECT_CONTROL_STATE {
621 #define UCwithFenceifcoherentcycle 0
622 #define UCUncacheable 1
623 #define WT 2
624 #define WB 3
625 uint32_t MemoryTypeLLCeLLCCacheabilityControl;
626 #define eLLCOnlywheneDRAMispresentelsegetsallocatedinLLC 0
627 #define LLCOnly 1
628 #define LLCeLLCAllowed 2
629 #define L3DefertoPATforLLCeLLCselection 3
630 uint32_t TargetCache;
631 uint32_t AgeforQUADLRU;
632 };
633
634 static inline void
635 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(__gen_user_data *data, void * restrict dst,
636 const struct GEN8_MEMORY_OBJECT_CONTROL_STATE * restrict values)
637 {
638 uint32_t *dw = (uint32_t * restrict) dst;
639
640 dw[0] =
641 __gen_field(values->MemoryTypeLLCeLLCCacheabilityControl, 5, 6) |
642 __gen_field(values->TargetCache, 3, 4) |
643 __gen_field(values->AgeforQUADLRU, 0, 1) |
644 0;
645
646 }
647
648 struct GEN8_STATE_BASE_ADDRESS {
649 uint32_t CommandType;
650 uint32_t CommandSubType;
651 uint32_t _3DCommandOpcode;
652 uint32_t _3DCommandSubOpcode;
653 uint32_t DwordLength;
654 __gen_address_type GeneralStateBaseAddress;
655 struct GEN8_MEMORY_OBJECT_CONTROL_STATE GeneralStateMemoryObjectControlState;
656 bool GeneralStateBaseAddressModifyEnable;
657 struct GEN8_MEMORY_OBJECT_CONTROL_STATE StatelessDataPortAccessMemoryObjectControlState;
658 __gen_address_type SurfaceStateBaseAddress;
659 struct GEN8_MEMORY_OBJECT_CONTROL_STATE SurfaceStateMemoryObjectControlState;
660 bool SurfaceStateBaseAddressModifyEnable;
661 __gen_address_type DynamicStateBaseAddress;
662 struct GEN8_MEMORY_OBJECT_CONTROL_STATE DynamicStateMemoryObjectControlState;
663 bool DynamicStateBaseAddressModifyEnable;
664 __gen_address_type IndirectObjectBaseAddress;
665 struct GEN8_MEMORY_OBJECT_CONTROL_STATE IndirectObjectMemoryObjectControlState;
666 bool IndirectObjectBaseAddressModifyEnable;
667 __gen_address_type InstructionBaseAddress;
668 struct GEN8_MEMORY_OBJECT_CONTROL_STATE InstructionMemoryObjectControlState;
669 bool InstructionBaseAddressModifyEnable;
670 uint32_t GeneralStateBufferSize;
671 bool GeneralStateBufferSizeModifyEnable;
672 uint32_t DynamicStateBufferSize;
673 bool DynamicStateBufferSizeModifyEnable;
674 uint32_t IndirectObjectBufferSize;
675 bool IndirectObjectBufferSizeModifyEnable;
676 uint32_t InstructionBufferSize;
677 bool InstructionBuffersizeModifyEnable;
678 };
679
680 static inline void
681 GEN8_STATE_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
682 const struct GEN8_STATE_BASE_ADDRESS * restrict values)
683 {
684 uint32_t *dw = (uint32_t * restrict) dst;
685
686 dw[0] =
687 __gen_field(values->CommandType, 29, 31) |
688 __gen_field(values->CommandSubType, 27, 28) |
689 __gen_field(values->_3DCommandOpcode, 24, 26) |
690 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
691 __gen_field(values->DwordLength, 0, 7) |
692 0;
693
694 uint32_t dw_GeneralStateMemoryObjectControlState;
695 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_GeneralStateMemoryObjectControlState, &values->GeneralStateMemoryObjectControlState);
696 uint32_t dw1 =
697 __gen_field(dw_GeneralStateMemoryObjectControlState, 4, 10) |
698 __gen_field(values->GeneralStateBaseAddressModifyEnable, 0, 0) |
699 0;
700
701 uint64_t qw1 =
702 __gen_combine_address(data, &dw[1], values->GeneralStateBaseAddress, dw1);
703
704 dw[1] = qw1;
705 dw[2] = qw1 >> 32;
706
707 uint32_t dw_StatelessDataPortAccessMemoryObjectControlState;
708 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StatelessDataPortAccessMemoryObjectControlState, &values->StatelessDataPortAccessMemoryObjectControlState);
709 dw[3] =
710 __gen_field(dw_StatelessDataPortAccessMemoryObjectControlState, 16, 22) |
711 0;
712
713 uint32_t dw_SurfaceStateMemoryObjectControlState;
714 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceStateMemoryObjectControlState, &values->SurfaceStateMemoryObjectControlState);
715 uint32_t dw4 =
716 __gen_field(dw_SurfaceStateMemoryObjectControlState, 4, 10) |
717 __gen_field(values->SurfaceStateBaseAddressModifyEnable, 0, 0) |
718 0;
719
720 uint64_t qw4 =
721 __gen_combine_address(data, &dw[4], values->SurfaceStateBaseAddress, dw4);
722
723 dw[4] = qw4;
724 dw[5] = qw4 >> 32;
725
726 uint32_t dw_DynamicStateMemoryObjectControlState;
727 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DynamicStateMemoryObjectControlState, &values->DynamicStateMemoryObjectControlState);
728 uint32_t dw6 =
729 __gen_field(dw_DynamicStateMemoryObjectControlState, 4, 10) |
730 __gen_field(values->DynamicStateBaseAddressModifyEnable, 0, 0) |
731 0;
732
733 uint64_t qw6 =
734 __gen_combine_address(data, &dw[6], values->DynamicStateBaseAddress, dw6);
735
736 dw[6] = qw6;
737 dw[7] = qw6 >> 32;
738
739 uint32_t dw_IndirectObjectMemoryObjectControlState;
740 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_IndirectObjectMemoryObjectControlState, &values->IndirectObjectMemoryObjectControlState);
741 uint32_t dw8 =
742 __gen_field(dw_IndirectObjectMemoryObjectControlState, 4, 10) |
743 __gen_field(values->IndirectObjectBaseAddressModifyEnable, 0, 0) |
744 0;
745
746 uint64_t qw8 =
747 __gen_combine_address(data, &dw[8], values->IndirectObjectBaseAddress, dw8);
748
749 dw[8] = qw8;
750 dw[9] = qw8 >> 32;
751
752 uint32_t dw_InstructionMemoryObjectControlState;
753 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_InstructionMemoryObjectControlState, &values->InstructionMemoryObjectControlState);
754 uint32_t dw10 =
755 __gen_field(dw_InstructionMemoryObjectControlState, 4, 10) |
756 __gen_field(values->InstructionBaseAddressModifyEnable, 0, 0) |
757 0;
758
759 uint64_t qw10 =
760 __gen_combine_address(data, &dw[10], values->InstructionBaseAddress, dw10);
761
762 dw[10] = qw10;
763 dw[11] = qw10 >> 32;
764
765 dw[12] =
766 __gen_field(values->GeneralStateBufferSize, 12, 31) |
767 __gen_field(values->GeneralStateBufferSizeModifyEnable, 0, 0) |
768 0;
769
770 dw[13] =
771 __gen_field(values->DynamicStateBufferSize, 12, 31) |
772 __gen_field(values->DynamicStateBufferSizeModifyEnable, 0, 0) |
773 0;
774
775 dw[14] =
776 __gen_field(values->IndirectObjectBufferSize, 12, 31) |
777 __gen_field(values->IndirectObjectBufferSizeModifyEnable, 0, 0) |
778 0;
779
780 dw[15] =
781 __gen_field(values->InstructionBufferSize, 12, 31) |
782 __gen_field(values->InstructionBuffersizeModifyEnable, 0, 0) |
783 0;
784
785 }
786
787 #define GEN8_STATE_PREFETCH_length 0x00000002
788 #define GEN8_STATE_PREFETCH_length_bias 0x00000002
789 #define GEN8_STATE_PREFETCH_header \
790 .CommandType = 3, \
791 .CommandSubType = 0, \
792 ._3DCommandOpcode = 0, \
793 ._3DCommandSubOpcode = 3, \
794 .DwordLength = 0
795
796 struct GEN8_STATE_PREFETCH {
797 uint32_t CommandType;
798 uint32_t CommandSubType;
799 uint32_t _3DCommandOpcode;
800 uint32_t _3DCommandSubOpcode;
801 uint32_t DwordLength;
802 __gen_address_type PrefetchPointer;
803 uint32_t PrefetchCount;
804 };
805
806 static inline void
807 GEN8_STATE_PREFETCH_pack(__gen_user_data *data, void * restrict dst,
808 const struct GEN8_STATE_PREFETCH * restrict values)
809 {
810 uint32_t *dw = (uint32_t * restrict) dst;
811
812 dw[0] =
813 __gen_field(values->CommandType, 29, 31) |
814 __gen_field(values->CommandSubType, 27, 28) |
815 __gen_field(values->_3DCommandOpcode, 24, 26) |
816 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
817 __gen_field(values->DwordLength, 0, 7) |
818 0;
819
820 uint32_t dw1 =
821 __gen_field(values->PrefetchCount, 0, 2) |
822 0;
823
824 dw[1] =
825 __gen_combine_address(data, &dw[1], values->PrefetchPointer, dw1);
826
827 }
828
829 #define GEN8_STATE_SIP_length 0x00000003
830 #define GEN8_STATE_SIP_length_bias 0x00000002
831 #define GEN8_STATE_SIP_header \
832 .CommandType = 3, \
833 .CommandSubType = 0, \
834 ._3DCommandOpcode = 1, \
835 ._3DCommandSubOpcode = 2, \
836 .DwordLength = 1
837
838 struct GEN8_STATE_SIP {
839 uint32_t CommandType;
840 uint32_t CommandSubType;
841 uint32_t _3DCommandOpcode;
842 uint32_t _3DCommandSubOpcode;
843 uint32_t DwordLength;
844 uint64_t SystemInstructionPointer;
845 };
846
847 static inline void
848 GEN8_STATE_SIP_pack(__gen_user_data *data, void * restrict dst,
849 const struct GEN8_STATE_SIP * restrict values)
850 {
851 uint32_t *dw = (uint32_t * restrict) dst;
852
853 dw[0] =
854 __gen_field(values->CommandType, 29, 31) |
855 __gen_field(values->CommandSubType, 27, 28) |
856 __gen_field(values->_3DCommandOpcode, 24, 26) |
857 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
858 __gen_field(values->DwordLength, 0, 7) |
859 0;
860
861 uint64_t qw1 =
862 __gen_offset(values->SystemInstructionPointer, 4, 63) |
863 0;
864
865 dw[1] = qw1;
866 dw[2] = qw1 >> 32;
867
868 }
869
870 #define GEN8_SWTESS_BASE_ADDRESS_length 0x00000002
871 #define GEN8_SWTESS_BASE_ADDRESS_length_bias 0x00000002
872 #define GEN8_SWTESS_BASE_ADDRESS_header \
873 .CommandType = 3, \
874 .CommandSubType = 0, \
875 ._3DCommandOpcode = 1, \
876 ._3DCommandSubOpcode = 3, \
877 .DwordLength = 0
878
879 struct GEN8_SWTESS_BASE_ADDRESS {
880 uint32_t CommandType;
881 uint32_t CommandSubType;
882 uint32_t _3DCommandOpcode;
883 uint32_t _3DCommandSubOpcode;
884 uint32_t DwordLength;
885 __gen_address_type SWTessellationBaseAddress;
886 struct GEN8_MEMORY_OBJECT_CONTROL_STATE SWTessellationMemoryObjectControlState;
887 };
888
889 static inline void
890 GEN8_SWTESS_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
891 const struct GEN8_SWTESS_BASE_ADDRESS * restrict values)
892 {
893 uint32_t *dw = (uint32_t * restrict) dst;
894
895 dw[0] =
896 __gen_field(values->CommandType, 29, 31) |
897 __gen_field(values->CommandSubType, 27, 28) |
898 __gen_field(values->_3DCommandOpcode, 24, 26) |
899 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
900 __gen_field(values->DwordLength, 0, 7) |
901 0;
902
903 uint32_t dw_SWTessellationMemoryObjectControlState;
904 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SWTessellationMemoryObjectControlState, &values->SWTessellationMemoryObjectControlState);
905 uint32_t dw1 =
906 __gen_field(dw_SWTessellationMemoryObjectControlState, 8, 11) |
907 0;
908
909 uint64_t qw1 =
910 __gen_combine_address(data, &dw[1], values->SWTessellationBaseAddress, dw1);
911
912 dw[1] = qw1;
913 dw[2] = qw1 >> 32;
914
915 }
916
917 #define GEN8_3DPRIMITIVE_length 0x00000007
918 #define GEN8_3DPRIMITIVE_length_bias 0x00000002
919 #define GEN8_3DPRIMITIVE_header \
920 .CommandType = 3, \
921 .CommandSubType = 3, \
922 ._3DCommandOpcode = 3, \
923 ._3DCommandSubOpcode = 0, \
924 .DwordLength = 5
925
926 struct GEN8_3DPRIMITIVE {
927 uint32_t CommandType;
928 uint32_t CommandSubType;
929 uint32_t _3DCommandOpcode;
930 uint32_t _3DCommandSubOpcode;
931 bool IndirectParameterEnable;
932 uint32_t UAVCoherencyRequired;
933 bool PredicateEnable;
934 uint32_t DwordLength;
935 bool EndOffsetEnable;
936 #define SEQUENTIAL 0
937 #define RANDOM 1
938 uint32_t VertexAccessType;
939 uint32_t PrimitiveTopologyType;
940 uint32_t VertexCountPerInstance;
941 uint32_t StartVertexLocation;
942 uint32_t InstanceCount;
943 uint32_t StartInstanceLocation;
944 uint32_t BaseVertexLocation;
945 };
946
947 static inline void
948 GEN8_3DPRIMITIVE_pack(__gen_user_data *data, void * restrict dst,
949 const struct GEN8_3DPRIMITIVE * restrict values)
950 {
951 uint32_t *dw = (uint32_t * restrict) dst;
952
953 dw[0] =
954 __gen_field(values->CommandType, 29, 31) |
955 __gen_field(values->CommandSubType, 27, 28) |
956 __gen_field(values->_3DCommandOpcode, 24, 26) |
957 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
958 __gen_field(values->IndirectParameterEnable, 10, 10) |
959 __gen_field(values->UAVCoherencyRequired, 9, 9) |
960 __gen_field(values->PredicateEnable, 8, 8) |
961 __gen_field(values->DwordLength, 0, 7) |
962 0;
963
964 dw[1] =
965 __gen_field(values->EndOffsetEnable, 9, 9) |
966 __gen_field(values->VertexAccessType, 8, 8) |
967 __gen_field(values->PrimitiveTopologyType, 0, 5) |
968 0;
969
970 dw[2] =
971 __gen_field(values->VertexCountPerInstance, 0, 31) |
972 0;
973
974 dw[3] =
975 __gen_field(values->StartVertexLocation, 0, 31) |
976 0;
977
978 dw[4] =
979 __gen_field(values->InstanceCount, 0, 31) |
980 0;
981
982 dw[5] =
983 __gen_field(values->StartInstanceLocation, 0, 31) |
984 0;
985
986 dw[6] =
987 __gen_field(values->BaseVertexLocation, 0, 31) |
988 0;
989
990 }
991
992 #define GEN8_3DSTATE_AA_LINE_PARAMETERS_length 0x00000003
993 #define GEN8_3DSTATE_AA_LINE_PARAMETERS_length_bias 0x00000002
994 #define GEN8_3DSTATE_AA_LINE_PARAMETERS_header \
995 .CommandType = 3, \
996 .CommandSubType = 3, \
997 ._3DCommandOpcode = 1, \
998 ._3DCommandSubOpcode = 10, \
999 .DwordLength = 1
1000
1001 struct GEN8_3DSTATE_AA_LINE_PARAMETERS {
1002 uint32_t CommandType;
1003 uint32_t CommandSubType;
1004 uint32_t _3DCommandOpcode;
1005 uint32_t _3DCommandSubOpcode;
1006 uint32_t DwordLength;
1007 float AAPointCoverageBias;
1008 float AACoverageBias;
1009 float AAPointCoverageSlope;
1010 float AACoverageSlope;
1011 float AAPointCoverageEndCapBias;
1012 float AACoverageEndCapBias;
1013 float AAPointCoverageEndCapSlope;
1014 float AACoverageEndCapSlope;
1015 };
1016
1017 static inline void
1018 GEN8_3DSTATE_AA_LINE_PARAMETERS_pack(__gen_user_data *data, void * restrict dst,
1019 const struct GEN8_3DSTATE_AA_LINE_PARAMETERS * restrict values)
1020 {
1021 uint32_t *dw = (uint32_t * restrict) dst;
1022
1023 dw[0] =
1024 __gen_field(values->CommandType, 29, 31) |
1025 __gen_field(values->CommandSubType, 27, 28) |
1026 __gen_field(values->_3DCommandOpcode, 24, 26) |
1027 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1028 __gen_field(values->DwordLength, 0, 7) |
1029 0;
1030
1031 dw[1] =
1032 __gen_field(values->AAPointCoverageBias * (1 << 8), 24, 31) |
1033 __gen_field(values->AACoverageBias * (1 << 8), 16, 23) |
1034 __gen_field(values->AAPointCoverageSlope * (1 << 8), 8, 15) |
1035 __gen_field(values->AACoverageSlope * (1 << 8), 0, 7) |
1036 0;
1037
1038 dw[2] =
1039 __gen_field(values->AAPointCoverageEndCapBias * (1 << 8), 24, 31) |
1040 __gen_field(values->AACoverageEndCapBias * (1 << 8), 16, 23) |
1041 __gen_field(values->AAPointCoverageEndCapSlope * (1 << 8), 8, 15) |
1042 __gen_field(values->AACoverageEndCapSlope * (1 << 8), 0, 7) |
1043 0;
1044
1045 }
1046
1047 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_length_bias 0x00000002
1048 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_header\
1049 .CommandType = 3, \
1050 .CommandSubType = 3, \
1051 ._3DCommandOpcode = 0, \
1052 ._3DCommandSubOpcode = 70
1053
1054 struct GEN8_BINDING_TABLE_EDIT_ENTRY {
1055 uint32_t BindingTableIndex;
1056 uint32_t SurfaceStatePointer;
1057 };
1058
1059 static inline void
1060 GEN8_BINDING_TABLE_EDIT_ENTRY_pack(__gen_user_data *data, void * restrict dst,
1061 const struct GEN8_BINDING_TABLE_EDIT_ENTRY * restrict values)
1062 {
1063 uint32_t *dw = (uint32_t * restrict) dst;
1064
1065 dw[0] =
1066 __gen_field(values->BindingTableIndex, 16, 23) |
1067 __gen_offset(values->SurfaceStatePointer, 0, 15) |
1068 0;
1069
1070 }
1071
1072 struct GEN8_3DSTATE_BINDING_TABLE_EDIT_DS {
1073 uint32_t CommandType;
1074 uint32_t CommandSubType;
1075 uint32_t _3DCommandOpcode;
1076 uint32_t _3DCommandSubOpcode;
1077 uint32_t DwordLength;
1078 uint32_t BindingTableBlockClear;
1079 #define AllCores 3
1080 #define Core1 2
1081 #define Core0 1
1082 uint32_t BindingTableEditTarget;
1083 /* variable length fields follow */
1084 };
1085
1086 static inline void
1087 GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_pack(__gen_user_data *data, void * restrict dst,
1088 const struct GEN8_3DSTATE_BINDING_TABLE_EDIT_DS * restrict values)
1089 {
1090 uint32_t *dw = (uint32_t * restrict) dst;
1091
1092 dw[0] =
1093 __gen_field(values->CommandType, 29, 31) |
1094 __gen_field(values->CommandSubType, 27, 28) |
1095 __gen_field(values->_3DCommandOpcode, 24, 26) |
1096 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1097 __gen_field(values->DwordLength, 0, 8) |
1098 0;
1099
1100 dw[1] =
1101 __gen_field(values->BindingTableBlockClear, 16, 31) |
1102 __gen_field(values->BindingTableEditTarget, 0, 1) |
1103 0;
1104
1105 /* variable length fields follow */
1106 }
1107
1108 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_length_bias 0x00000002
1109 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_header\
1110 .CommandType = 3, \
1111 .CommandSubType = 3, \
1112 ._3DCommandOpcode = 0, \
1113 ._3DCommandSubOpcode = 68
1114
1115 struct GEN8_3DSTATE_BINDING_TABLE_EDIT_GS {
1116 uint32_t CommandType;
1117 uint32_t CommandSubType;
1118 uint32_t _3DCommandOpcode;
1119 uint32_t _3DCommandSubOpcode;
1120 uint32_t DwordLength;
1121 uint32_t BindingTableBlockClear;
1122 #define AllCores 3
1123 #define Core1 2
1124 #define Core0 1
1125 uint32_t BindingTableEditTarget;
1126 /* variable length fields follow */
1127 };
1128
1129 static inline void
1130 GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_pack(__gen_user_data *data, void * restrict dst,
1131 const struct GEN8_3DSTATE_BINDING_TABLE_EDIT_GS * restrict values)
1132 {
1133 uint32_t *dw = (uint32_t * restrict) dst;
1134
1135 dw[0] =
1136 __gen_field(values->CommandType, 29, 31) |
1137 __gen_field(values->CommandSubType, 27, 28) |
1138 __gen_field(values->_3DCommandOpcode, 24, 26) |
1139 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1140 __gen_field(values->DwordLength, 0, 8) |
1141 0;
1142
1143 dw[1] =
1144 __gen_field(values->BindingTableBlockClear, 16, 31) |
1145 __gen_field(values->BindingTableEditTarget, 0, 1) |
1146 0;
1147
1148 /* variable length fields follow */
1149 }
1150
1151 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_length_bias 0x00000002
1152 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_header\
1153 .CommandType = 3, \
1154 .CommandSubType = 3, \
1155 ._3DCommandOpcode = 0, \
1156 ._3DCommandSubOpcode = 69
1157
1158 struct GEN8_3DSTATE_BINDING_TABLE_EDIT_HS {
1159 uint32_t CommandType;
1160 uint32_t CommandSubType;
1161 uint32_t _3DCommandOpcode;
1162 uint32_t _3DCommandSubOpcode;
1163 uint32_t DwordLength;
1164 uint32_t BindingTableBlockClear;
1165 #define AllCores 3
1166 #define Core1 2
1167 #define Core0 1
1168 uint32_t BindingTableEditTarget;
1169 /* variable length fields follow */
1170 };
1171
1172 static inline void
1173 GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_pack(__gen_user_data *data, void * restrict dst,
1174 const struct GEN8_3DSTATE_BINDING_TABLE_EDIT_HS * restrict values)
1175 {
1176 uint32_t *dw = (uint32_t * restrict) dst;
1177
1178 dw[0] =
1179 __gen_field(values->CommandType, 29, 31) |
1180 __gen_field(values->CommandSubType, 27, 28) |
1181 __gen_field(values->_3DCommandOpcode, 24, 26) |
1182 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1183 __gen_field(values->DwordLength, 0, 8) |
1184 0;
1185
1186 dw[1] =
1187 __gen_field(values->BindingTableBlockClear, 16, 31) |
1188 __gen_field(values->BindingTableEditTarget, 0, 1) |
1189 0;
1190
1191 /* variable length fields follow */
1192 }
1193
1194 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_length_bias 0x00000002
1195 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_header\
1196 .CommandType = 3, \
1197 .CommandSubType = 3, \
1198 ._3DCommandOpcode = 0, \
1199 ._3DCommandSubOpcode = 71
1200
1201 struct GEN8_3DSTATE_BINDING_TABLE_EDIT_PS {
1202 uint32_t CommandType;
1203 uint32_t CommandSubType;
1204 uint32_t _3DCommandOpcode;
1205 uint32_t _3DCommandSubOpcode;
1206 uint32_t DwordLength;
1207 uint32_t BindingTableBlockClear;
1208 #define AllCores 3
1209 #define Core1 2
1210 #define Core0 1
1211 uint32_t BindingTableEditTarget;
1212 /* variable length fields follow */
1213 };
1214
1215 static inline void
1216 GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_pack(__gen_user_data *data, void * restrict dst,
1217 const struct GEN8_3DSTATE_BINDING_TABLE_EDIT_PS * restrict values)
1218 {
1219 uint32_t *dw = (uint32_t * restrict) dst;
1220
1221 dw[0] =
1222 __gen_field(values->CommandType, 29, 31) |
1223 __gen_field(values->CommandSubType, 27, 28) |
1224 __gen_field(values->_3DCommandOpcode, 24, 26) |
1225 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1226 __gen_field(values->DwordLength, 0, 8) |
1227 0;
1228
1229 dw[1] =
1230 __gen_field(values->BindingTableBlockClear, 16, 31) |
1231 __gen_field(values->BindingTableEditTarget, 0, 1) |
1232 0;
1233
1234 /* variable length fields follow */
1235 }
1236
1237 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_length_bias 0x00000002
1238 #define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_header\
1239 .CommandType = 3, \
1240 .CommandSubType = 3, \
1241 ._3DCommandOpcode = 0, \
1242 ._3DCommandSubOpcode = 67
1243
1244 struct GEN8_3DSTATE_BINDING_TABLE_EDIT_VS {
1245 uint32_t CommandType;
1246 uint32_t CommandSubType;
1247 uint32_t _3DCommandOpcode;
1248 uint32_t _3DCommandSubOpcode;
1249 uint32_t DwordLength;
1250 uint32_t BindingTableBlockClear;
1251 #define AllCores 3
1252 #define Core1 2
1253 #define Core0 1
1254 uint32_t BindingTableEditTarget;
1255 /* variable length fields follow */
1256 };
1257
1258 static inline void
1259 GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_pack(__gen_user_data *data, void * restrict dst,
1260 const struct GEN8_3DSTATE_BINDING_TABLE_EDIT_VS * restrict values)
1261 {
1262 uint32_t *dw = (uint32_t * restrict) dst;
1263
1264 dw[0] =
1265 __gen_field(values->CommandType, 29, 31) |
1266 __gen_field(values->CommandSubType, 27, 28) |
1267 __gen_field(values->_3DCommandOpcode, 24, 26) |
1268 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1269 __gen_field(values->DwordLength, 0, 8) |
1270 0;
1271
1272 dw[1] =
1273 __gen_field(values->BindingTableBlockClear, 16, 31) |
1274 __gen_field(values->BindingTableEditTarget, 0, 1) |
1275 0;
1276
1277 /* variable length fields follow */
1278 }
1279
1280 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_length 0x00000002
1281 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_length_bias 0x00000002
1282 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_header\
1283 .CommandType = 3, \
1284 .CommandSubType = 3, \
1285 ._3DCommandOpcode = 0, \
1286 ._3DCommandSubOpcode = 40, \
1287 .DwordLength = 0
1288
1289 struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS {
1290 uint32_t CommandType;
1291 uint32_t CommandSubType;
1292 uint32_t _3DCommandOpcode;
1293 uint32_t _3DCommandSubOpcode;
1294 uint32_t DwordLength;
1295 uint32_t PointertoDSBindingTable;
1296 };
1297
1298 static inline void
1299 GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
1300 const struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS * restrict values)
1301 {
1302 uint32_t *dw = (uint32_t * restrict) dst;
1303
1304 dw[0] =
1305 __gen_field(values->CommandType, 29, 31) |
1306 __gen_field(values->CommandSubType, 27, 28) |
1307 __gen_field(values->_3DCommandOpcode, 24, 26) |
1308 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1309 __gen_field(values->DwordLength, 0, 7) |
1310 0;
1311
1312 dw[1] =
1313 __gen_offset(values->PointertoDSBindingTable, 5, 15) |
1314 0;
1315
1316 }
1317
1318 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_length 0x00000002
1319 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_length_bias 0x00000002
1320 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_header\
1321 .CommandType = 3, \
1322 .CommandSubType = 3, \
1323 ._3DCommandOpcode = 0, \
1324 ._3DCommandSubOpcode = 41, \
1325 .DwordLength = 0
1326
1327 struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS {
1328 uint32_t CommandType;
1329 uint32_t CommandSubType;
1330 uint32_t _3DCommandOpcode;
1331 uint32_t _3DCommandSubOpcode;
1332 uint32_t DwordLength;
1333 uint32_t PointertoGSBindingTable;
1334 };
1335
1336 static inline void
1337 GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
1338 const struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS * restrict values)
1339 {
1340 uint32_t *dw = (uint32_t * restrict) dst;
1341
1342 dw[0] =
1343 __gen_field(values->CommandType, 29, 31) |
1344 __gen_field(values->CommandSubType, 27, 28) |
1345 __gen_field(values->_3DCommandOpcode, 24, 26) |
1346 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1347 __gen_field(values->DwordLength, 0, 7) |
1348 0;
1349
1350 dw[1] =
1351 __gen_offset(values->PointertoGSBindingTable, 5, 15) |
1352 0;
1353
1354 }
1355
1356 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_length 0x00000002
1357 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_length_bias 0x00000002
1358 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_header\
1359 .CommandType = 3, \
1360 .CommandSubType = 3, \
1361 ._3DCommandOpcode = 0, \
1362 ._3DCommandSubOpcode = 39, \
1363 .DwordLength = 0
1364
1365 struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS {
1366 uint32_t CommandType;
1367 uint32_t CommandSubType;
1368 uint32_t _3DCommandOpcode;
1369 uint32_t _3DCommandSubOpcode;
1370 uint32_t DwordLength;
1371 uint32_t PointertoHSBindingTable;
1372 };
1373
1374 static inline void
1375 GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
1376 const struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS * restrict values)
1377 {
1378 uint32_t *dw = (uint32_t * restrict) dst;
1379
1380 dw[0] =
1381 __gen_field(values->CommandType, 29, 31) |
1382 __gen_field(values->CommandSubType, 27, 28) |
1383 __gen_field(values->_3DCommandOpcode, 24, 26) |
1384 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1385 __gen_field(values->DwordLength, 0, 7) |
1386 0;
1387
1388 dw[1] =
1389 __gen_offset(values->PointertoHSBindingTable, 5, 15) |
1390 0;
1391
1392 }
1393
1394 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_length 0x00000002
1395 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_length_bias 0x00000002
1396 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_header\
1397 .CommandType = 3, \
1398 .CommandSubType = 3, \
1399 ._3DCommandOpcode = 0, \
1400 ._3DCommandSubOpcode = 42, \
1401 .DwordLength = 0
1402
1403 struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS {
1404 uint32_t CommandType;
1405 uint32_t CommandSubType;
1406 uint32_t _3DCommandOpcode;
1407 uint32_t _3DCommandSubOpcode;
1408 uint32_t DwordLength;
1409 uint32_t PointertoPSBindingTable;
1410 };
1411
1412 static inline void
1413 GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
1414 const struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS * restrict values)
1415 {
1416 uint32_t *dw = (uint32_t * restrict) dst;
1417
1418 dw[0] =
1419 __gen_field(values->CommandType, 29, 31) |
1420 __gen_field(values->CommandSubType, 27, 28) |
1421 __gen_field(values->_3DCommandOpcode, 24, 26) |
1422 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1423 __gen_field(values->DwordLength, 0, 7) |
1424 0;
1425
1426 dw[1] =
1427 __gen_offset(values->PointertoPSBindingTable, 5, 15) |
1428 0;
1429
1430 }
1431
1432 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_length 0x00000002
1433 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_length_bias 0x00000002
1434 #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_header\
1435 .CommandType = 3, \
1436 .CommandSubType = 3, \
1437 ._3DCommandOpcode = 0, \
1438 ._3DCommandSubOpcode = 38, \
1439 .DwordLength = 0
1440
1441 struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS {
1442 uint32_t CommandType;
1443 uint32_t CommandSubType;
1444 uint32_t _3DCommandOpcode;
1445 uint32_t _3DCommandSubOpcode;
1446 uint32_t DwordLength;
1447 uint32_t PointertoVSBindingTable;
1448 };
1449
1450 static inline void
1451 GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
1452 const struct GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS * restrict values)
1453 {
1454 uint32_t *dw = (uint32_t * restrict) dst;
1455
1456 dw[0] =
1457 __gen_field(values->CommandType, 29, 31) |
1458 __gen_field(values->CommandSubType, 27, 28) |
1459 __gen_field(values->_3DCommandOpcode, 24, 26) |
1460 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1461 __gen_field(values->DwordLength, 0, 7) |
1462 0;
1463
1464 dw[1] =
1465 __gen_offset(values->PointertoVSBindingTable, 5, 15) |
1466 0;
1467
1468 }
1469
1470 #define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_length 0x00000004
1471 #define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_length_bias 0x00000002
1472 #define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_header\
1473 .CommandType = 3, \
1474 .CommandSubType = 3, \
1475 ._3DCommandOpcode = 1, \
1476 ._3DCommandSubOpcode = 25, \
1477 .DwordLength = 2
1478
1479 struct GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC {
1480 uint32_t CommandType;
1481 uint32_t CommandSubType;
1482 uint32_t _3DCommandOpcode;
1483 uint32_t _3DCommandSubOpcode;
1484 uint32_t DwordLength;
1485 __gen_address_type BindingTablePoolBaseAddress;
1486 uint32_t BindingTablePoolEnable;
1487 struct GEN8_MEMORY_OBJECT_CONTROL_STATE SurfaceObjectControlState;
1488 #define NoValidData 0
1489 uint32_t BindingTablePoolBufferSize;
1490 };
1491
1492 static inline void
1493 GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_pack(__gen_user_data *data, void * restrict dst,
1494 const struct GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC * restrict values)
1495 {
1496 uint32_t *dw = (uint32_t * restrict) dst;
1497
1498 dw[0] =
1499 __gen_field(values->CommandType, 29, 31) |
1500 __gen_field(values->CommandSubType, 27, 28) |
1501 __gen_field(values->_3DCommandOpcode, 24, 26) |
1502 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1503 __gen_field(values->DwordLength, 0, 7) |
1504 0;
1505
1506 uint32_t dw_SurfaceObjectControlState;
1507 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceObjectControlState, &values->SurfaceObjectControlState);
1508 uint32_t dw1 =
1509 __gen_field(values->BindingTablePoolEnable, 11, 11) |
1510 __gen_field(dw_SurfaceObjectControlState, 0, 6) |
1511 0;
1512
1513 uint64_t qw1 =
1514 __gen_combine_address(data, &dw[1], values->BindingTablePoolBaseAddress, dw1);
1515
1516 dw[1] = qw1;
1517 dw[2] = qw1 >> 32;
1518
1519 dw[3] =
1520 __gen_field(values->BindingTablePoolBufferSize, 12, 31) |
1521 0;
1522
1523 }
1524
1525 #define GEN8_3DSTATE_BLEND_STATE_POINTERS_length 0x00000002
1526 #define GEN8_3DSTATE_BLEND_STATE_POINTERS_length_bias 0x00000002
1527 #define GEN8_3DSTATE_BLEND_STATE_POINTERS_header\
1528 .CommandType = 3, \
1529 .CommandSubType = 3, \
1530 ._3DCommandOpcode = 0, \
1531 ._3DCommandSubOpcode = 36, \
1532 .DwordLength = 0
1533
1534 struct GEN8_3DSTATE_BLEND_STATE_POINTERS {
1535 uint32_t CommandType;
1536 uint32_t CommandSubType;
1537 uint32_t _3DCommandOpcode;
1538 uint32_t _3DCommandSubOpcode;
1539 uint32_t DwordLength;
1540 uint32_t BlendStatePointer;
1541 bool BlendStatePointerValid;
1542 };
1543
1544 static inline void
1545 GEN8_3DSTATE_BLEND_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
1546 const struct GEN8_3DSTATE_BLEND_STATE_POINTERS * restrict values)
1547 {
1548 uint32_t *dw = (uint32_t * restrict) dst;
1549
1550 dw[0] =
1551 __gen_field(values->CommandType, 29, 31) |
1552 __gen_field(values->CommandSubType, 27, 28) |
1553 __gen_field(values->_3DCommandOpcode, 24, 26) |
1554 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1555 __gen_field(values->DwordLength, 0, 7) |
1556 0;
1557
1558 dw[1] =
1559 __gen_offset(values->BlendStatePointer, 6, 31) |
1560 __gen_field(values->BlendStatePointerValid, 0, 0) |
1561 0;
1562
1563 }
1564
1565 #define GEN8_3DSTATE_CC_STATE_POINTERS_length 0x00000002
1566 #define GEN8_3DSTATE_CC_STATE_POINTERS_length_bias 0x00000002
1567 #define GEN8_3DSTATE_CC_STATE_POINTERS_header \
1568 .CommandType = 3, \
1569 .CommandSubType = 3, \
1570 ._3DCommandOpcode = 0, \
1571 ._3DCommandSubOpcode = 14, \
1572 .DwordLength = 0
1573
1574 struct GEN8_3DSTATE_CC_STATE_POINTERS {
1575 uint32_t CommandType;
1576 uint32_t CommandSubType;
1577 uint32_t _3DCommandOpcode;
1578 uint32_t _3DCommandSubOpcode;
1579 uint32_t DwordLength;
1580 uint32_t ColorCalcStatePointer;
1581 bool ColorCalcStatePointerValid;
1582 };
1583
1584 static inline void
1585 GEN8_3DSTATE_CC_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
1586 const struct GEN8_3DSTATE_CC_STATE_POINTERS * restrict values)
1587 {
1588 uint32_t *dw = (uint32_t * restrict) dst;
1589
1590 dw[0] =
1591 __gen_field(values->CommandType, 29, 31) |
1592 __gen_field(values->CommandSubType, 27, 28) |
1593 __gen_field(values->_3DCommandOpcode, 24, 26) |
1594 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1595 __gen_field(values->DwordLength, 0, 7) |
1596 0;
1597
1598 dw[1] =
1599 __gen_offset(values->ColorCalcStatePointer, 6, 31) |
1600 __gen_field(values->ColorCalcStatePointerValid, 0, 0) |
1601 0;
1602
1603 }
1604
1605 #define GEN8_3DSTATE_CHROMA_KEY_length 0x00000004
1606 #define GEN8_3DSTATE_CHROMA_KEY_length_bias 0x00000002
1607 #define GEN8_3DSTATE_CHROMA_KEY_header \
1608 .CommandType = 3, \
1609 .CommandSubType = 3, \
1610 ._3DCommandOpcode = 1, \
1611 ._3DCommandSubOpcode = 4, \
1612 .DwordLength = 2
1613
1614 struct GEN8_3DSTATE_CHROMA_KEY {
1615 uint32_t CommandType;
1616 uint32_t CommandSubType;
1617 uint32_t _3DCommandOpcode;
1618 uint32_t _3DCommandSubOpcode;
1619 uint32_t DwordLength;
1620 uint32_t ChromaKeyTableIndex;
1621 uint32_t ChromaKeyLowValue;
1622 uint32_t ChromaKeyHighValue;
1623 };
1624
1625 static inline void
1626 GEN8_3DSTATE_CHROMA_KEY_pack(__gen_user_data *data, void * restrict dst,
1627 const struct GEN8_3DSTATE_CHROMA_KEY * restrict values)
1628 {
1629 uint32_t *dw = (uint32_t * restrict) dst;
1630
1631 dw[0] =
1632 __gen_field(values->CommandType, 29, 31) |
1633 __gen_field(values->CommandSubType, 27, 28) |
1634 __gen_field(values->_3DCommandOpcode, 24, 26) |
1635 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1636 __gen_field(values->DwordLength, 0, 7) |
1637 0;
1638
1639 dw[1] =
1640 __gen_field(values->ChromaKeyTableIndex, 30, 31) |
1641 0;
1642
1643 dw[2] =
1644 __gen_field(values->ChromaKeyLowValue, 0, 31) |
1645 0;
1646
1647 dw[3] =
1648 __gen_field(values->ChromaKeyHighValue, 0, 31) |
1649 0;
1650
1651 }
1652
1653 #define GEN8_3DSTATE_CLEAR_PARAMS_length 0x00000003
1654 #define GEN8_3DSTATE_CLEAR_PARAMS_length_bias 0x00000002
1655 #define GEN8_3DSTATE_CLEAR_PARAMS_header \
1656 .CommandType = 3, \
1657 .CommandSubType = 3, \
1658 ._3DCommandOpcode = 0, \
1659 ._3DCommandSubOpcode = 4, \
1660 .DwordLength = 1
1661
1662 struct GEN8_3DSTATE_CLEAR_PARAMS {
1663 uint32_t CommandType;
1664 uint32_t CommandSubType;
1665 uint32_t _3DCommandOpcode;
1666 uint32_t _3DCommandSubOpcode;
1667 uint32_t DwordLength;
1668 float DepthClearValue;
1669 bool DepthClearValueValid;
1670 };
1671
1672 static inline void
1673 GEN8_3DSTATE_CLEAR_PARAMS_pack(__gen_user_data *data, void * restrict dst,
1674 const struct GEN8_3DSTATE_CLEAR_PARAMS * restrict values)
1675 {
1676 uint32_t *dw = (uint32_t * restrict) dst;
1677
1678 dw[0] =
1679 __gen_field(values->CommandType, 29, 31) |
1680 __gen_field(values->CommandSubType, 27, 28) |
1681 __gen_field(values->_3DCommandOpcode, 24, 26) |
1682 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1683 __gen_field(values->DwordLength, 0, 7) |
1684 0;
1685
1686 dw[1] =
1687 __gen_float(values->DepthClearValue) |
1688 0;
1689
1690 dw[2] =
1691 __gen_field(values->DepthClearValueValid, 0, 0) |
1692 0;
1693
1694 }
1695
1696 #define GEN8_3DSTATE_CLIP_length 0x00000004
1697 #define GEN8_3DSTATE_CLIP_length_bias 0x00000002
1698 #define GEN8_3DSTATE_CLIP_header \
1699 .CommandType = 3, \
1700 .CommandSubType = 3, \
1701 ._3DCommandOpcode = 0, \
1702 ._3DCommandSubOpcode = 18, \
1703 .DwordLength = 2
1704
1705 struct GEN8_3DSTATE_CLIP {
1706 uint32_t CommandType;
1707 uint32_t CommandSubType;
1708 uint32_t _3DCommandOpcode;
1709 uint32_t _3DCommandSubOpcode;
1710 uint32_t DwordLength;
1711 #define Normal 0
1712 #define Force 1
1713 bool ForceUserClipDistanceCullTestEnableBitmask;
1714 #define _8Bit 0
1715 #define _4Bit 1
1716 uint32_t VertexSubPixelPrecisionSelect;
1717 bool EarlyCullEnable;
1718 #define Normal 0
1719 #define Force 1
1720 bool ForceUserClipDistanceClipTestEnableBitmask;
1721 #define Normal 0
1722 #define Force 1
1723 bool ForceClipMode;
1724 bool ClipperStatisticsEnable;
1725 uint32_t UserClipDistanceCullTestEnableBitmask;
1726 bool ClipEnable;
1727 #define API_OGL 0
1728 uint32_t APIMode;
1729 bool ViewportXYClipTestEnable;
1730 bool GuardbandClipTestEnable;
1731 uint32_t UserClipDistanceClipTestEnableBitmask;
1732 #define NORMAL 0
1733 #define REJECT_ALL 3
1734 #define ACCEPT_ALL 4
1735 uint32_t ClipMode;
1736 bool PerspectiveDivideDisable;
1737 bool NonPerspectiveBarycentricEnable;
1738 uint32_t TriangleStripListProvokingVertexSelect;
1739 uint32_t LineStripListProvokingVertexSelect;
1740 uint32_t TriangleFanProvokingVertexSelect;
1741 float MinimumPointWidth;
1742 float MaximumPointWidth;
1743 bool ForceZeroRTAIndexEnable;
1744 uint32_t MaximumVPIndex;
1745 };
1746
1747 static inline void
1748 GEN8_3DSTATE_CLIP_pack(__gen_user_data *data, void * restrict dst,
1749 const struct GEN8_3DSTATE_CLIP * restrict values)
1750 {
1751 uint32_t *dw = (uint32_t * restrict) dst;
1752
1753 dw[0] =
1754 __gen_field(values->CommandType, 29, 31) |
1755 __gen_field(values->CommandSubType, 27, 28) |
1756 __gen_field(values->_3DCommandOpcode, 24, 26) |
1757 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1758 __gen_field(values->DwordLength, 0, 7) |
1759 0;
1760
1761 dw[1] =
1762 __gen_field(values->ForceUserClipDistanceCullTestEnableBitmask, 20, 20) |
1763 __gen_field(values->VertexSubPixelPrecisionSelect, 19, 19) |
1764 __gen_field(values->EarlyCullEnable, 18, 18) |
1765 __gen_field(values->ForceUserClipDistanceClipTestEnableBitmask, 17, 17) |
1766 __gen_field(values->ForceClipMode, 16, 16) |
1767 __gen_field(values->ClipperStatisticsEnable, 10, 10) |
1768 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
1769 0;
1770
1771 dw[2] =
1772 __gen_field(values->ClipEnable, 31, 31) |
1773 __gen_field(values->APIMode, 30, 30) |
1774 __gen_field(values->ViewportXYClipTestEnable, 28, 28) |
1775 __gen_field(values->GuardbandClipTestEnable, 26, 26) |
1776 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 16, 23) |
1777 __gen_field(values->ClipMode, 13, 15) |
1778 __gen_field(values->PerspectiveDivideDisable, 9, 9) |
1779 __gen_field(values->NonPerspectiveBarycentricEnable, 8, 8) |
1780 __gen_field(values->TriangleStripListProvokingVertexSelect, 4, 5) |
1781 __gen_field(values->LineStripListProvokingVertexSelect, 2, 3) |
1782 __gen_field(values->TriangleFanProvokingVertexSelect, 0, 1) |
1783 0;
1784
1785 dw[3] =
1786 __gen_field(values->MinimumPointWidth * (1 << 3), 17, 27) |
1787 __gen_field(values->MaximumPointWidth * (1 << 3), 6, 16) |
1788 __gen_field(values->ForceZeroRTAIndexEnable, 5, 5) |
1789 __gen_field(values->MaximumVPIndex, 0, 3) |
1790 0;
1791
1792 }
1793
1794 #define GEN8_3DSTATE_CONSTANT_DS_length 0x0000000b
1795 #define GEN8_3DSTATE_CONSTANT_DS_length_bias 0x00000002
1796 #define GEN8_3DSTATE_CONSTANT_DS_header \
1797 .CommandType = 3, \
1798 .CommandSubType = 3, \
1799 ._3DCommandOpcode = 0, \
1800 ._3DCommandSubOpcode = 26, \
1801 .DwordLength = 9
1802
1803 struct GEN8_3DSTATE_CONSTANT_BODY {
1804 uint32_t ConstantBuffer1ReadLength;
1805 uint32_t ConstantBuffer0ReadLength;
1806 uint32_t ConstantBuffer3ReadLength;
1807 uint32_t ConstantBuffer2ReadLength;
1808 __gen_address_type PointerToConstantBuffer0;
1809 __gen_address_type PointerToConstantBuffer1;
1810 __gen_address_type PointerToConstantBuffer2;
1811 __gen_address_type PointerToConstantBuffer3;
1812 };
1813
1814 static inline void
1815 GEN8_3DSTATE_CONSTANT_BODY_pack(__gen_user_data *data, void * restrict dst,
1816 const struct GEN8_3DSTATE_CONSTANT_BODY * restrict values)
1817 {
1818 uint32_t *dw = (uint32_t * restrict) dst;
1819
1820 dw[0] =
1821 __gen_field(values->ConstantBuffer1ReadLength, 16, 31) |
1822 __gen_field(values->ConstantBuffer0ReadLength, 0, 15) |
1823 0;
1824
1825 dw[1] =
1826 __gen_field(values->ConstantBuffer3ReadLength, 16, 31) |
1827 __gen_field(values->ConstantBuffer2ReadLength, 0, 15) |
1828 0;
1829
1830 uint32_t dw2 =
1831 0;
1832
1833 uint64_t qw2 =
1834 __gen_combine_address(data, &dw[2], values->PointerToConstantBuffer0, dw2);
1835
1836 dw[2] = qw2;
1837 dw[3] = qw2 >> 32;
1838
1839 uint32_t dw4 =
1840 0;
1841
1842 uint64_t qw4 =
1843 __gen_combine_address(data, &dw[4], values->PointerToConstantBuffer1, dw4);
1844
1845 dw[4] = qw4;
1846 dw[5] = qw4 >> 32;
1847
1848 uint32_t dw6 =
1849 0;
1850
1851 uint64_t qw6 =
1852 __gen_combine_address(data, &dw[6], values->PointerToConstantBuffer2, dw6);
1853
1854 dw[6] = qw6;
1855 dw[7] = qw6 >> 32;
1856
1857 uint32_t dw8 =
1858 0;
1859
1860 uint64_t qw8 =
1861 __gen_combine_address(data, &dw[8], values->PointerToConstantBuffer3, dw8);
1862
1863 dw[8] = qw8;
1864 dw[9] = qw8 >> 32;
1865
1866 }
1867
1868 struct GEN8_3DSTATE_CONSTANT_DS {
1869 uint32_t CommandType;
1870 uint32_t CommandSubType;
1871 uint32_t _3DCommandOpcode;
1872 uint32_t _3DCommandSubOpcode;
1873 struct GEN8_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
1874 uint32_t DwordLength;
1875 struct GEN8_3DSTATE_CONSTANT_BODY ConstantBody;
1876 };
1877
1878 static inline void
1879 GEN8_3DSTATE_CONSTANT_DS_pack(__gen_user_data *data, void * restrict dst,
1880 const struct GEN8_3DSTATE_CONSTANT_DS * restrict values)
1881 {
1882 uint32_t *dw = (uint32_t * restrict) dst;
1883
1884 uint32_t dw_ConstantBufferObjectControlState;
1885 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
1886 dw[0] =
1887 __gen_field(values->CommandType, 29, 31) |
1888 __gen_field(values->CommandSubType, 27, 28) |
1889 __gen_field(values->_3DCommandOpcode, 24, 26) |
1890 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1891 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
1892 __gen_field(values->DwordLength, 0, 7) |
1893 0;
1894
1895 GEN8_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1896 }
1897
1898 #define GEN8_3DSTATE_CONSTANT_GS_length 0x0000000b
1899 #define GEN8_3DSTATE_CONSTANT_GS_length_bias 0x00000002
1900 #define GEN8_3DSTATE_CONSTANT_GS_header \
1901 .CommandType = 3, \
1902 .CommandSubType = 3, \
1903 ._3DCommandOpcode = 0, \
1904 ._3DCommandSubOpcode = 22, \
1905 .DwordLength = 9
1906
1907 struct GEN8_3DSTATE_CONSTANT_GS {
1908 uint32_t CommandType;
1909 uint32_t CommandSubType;
1910 uint32_t _3DCommandOpcode;
1911 uint32_t _3DCommandSubOpcode;
1912 struct GEN8_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
1913 uint32_t DwordLength;
1914 struct GEN8_3DSTATE_CONSTANT_BODY ConstantBody;
1915 };
1916
1917 static inline void
1918 GEN8_3DSTATE_CONSTANT_GS_pack(__gen_user_data *data, void * restrict dst,
1919 const struct GEN8_3DSTATE_CONSTANT_GS * restrict values)
1920 {
1921 uint32_t *dw = (uint32_t * restrict) dst;
1922
1923 uint32_t dw_ConstantBufferObjectControlState;
1924 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
1925 dw[0] =
1926 __gen_field(values->CommandType, 29, 31) |
1927 __gen_field(values->CommandSubType, 27, 28) |
1928 __gen_field(values->_3DCommandOpcode, 24, 26) |
1929 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1930 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
1931 __gen_field(values->DwordLength, 0, 7) |
1932 0;
1933
1934 GEN8_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1935 }
1936
1937 #define GEN8_3DSTATE_CONSTANT_HS_length 0x0000000b
1938 #define GEN8_3DSTATE_CONSTANT_HS_length_bias 0x00000002
1939 #define GEN8_3DSTATE_CONSTANT_HS_header \
1940 .CommandType = 3, \
1941 .CommandSubType = 3, \
1942 ._3DCommandOpcode = 0, \
1943 ._3DCommandSubOpcode = 25, \
1944 .DwordLength = 9
1945
1946 struct GEN8_3DSTATE_CONSTANT_HS {
1947 uint32_t CommandType;
1948 uint32_t CommandSubType;
1949 uint32_t _3DCommandOpcode;
1950 uint32_t _3DCommandSubOpcode;
1951 struct GEN8_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
1952 uint32_t DwordLength;
1953 struct GEN8_3DSTATE_CONSTANT_BODY ConstantBody;
1954 };
1955
1956 static inline void
1957 GEN8_3DSTATE_CONSTANT_HS_pack(__gen_user_data *data, void * restrict dst,
1958 const struct GEN8_3DSTATE_CONSTANT_HS * restrict values)
1959 {
1960 uint32_t *dw = (uint32_t * restrict) dst;
1961
1962 uint32_t dw_ConstantBufferObjectControlState;
1963 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
1964 dw[0] =
1965 __gen_field(values->CommandType, 29, 31) |
1966 __gen_field(values->CommandSubType, 27, 28) |
1967 __gen_field(values->_3DCommandOpcode, 24, 26) |
1968 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1969 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
1970 __gen_field(values->DwordLength, 0, 7) |
1971 0;
1972
1973 GEN8_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
1974 }
1975
1976 #define GEN8_3DSTATE_CONSTANT_PS_length 0x0000000b
1977 #define GEN8_3DSTATE_CONSTANT_PS_length_bias 0x00000002
1978 #define GEN8_3DSTATE_CONSTANT_PS_header \
1979 .CommandType = 3, \
1980 .CommandSubType = 3, \
1981 ._3DCommandOpcode = 0, \
1982 ._3DCommandSubOpcode = 23, \
1983 .DwordLength = 9
1984
1985 struct GEN8_3DSTATE_CONSTANT_PS {
1986 uint32_t CommandType;
1987 uint32_t CommandSubType;
1988 uint32_t _3DCommandOpcode;
1989 uint32_t _3DCommandSubOpcode;
1990 struct GEN8_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
1991 uint32_t DwordLength;
1992 struct GEN8_3DSTATE_CONSTANT_BODY ConstantBody;
1993 };
1994
1995 static inline void
1996 GEN8_3DSTATE_CONSTANT_PS_pack(__gen_user_data *data, void * restrict dst,
1997 const struct GEN8_3DSTATE_CONSTANT_PS * restrict values)
1998 {
1999 uint32_t *dw = (uint32_t * restrict) dst;
2000
2001 uint32_t dw_ConstantBufferObjectControlState;
2002 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
2003 dw[0] =
2004 __gen_field(values->CommandType, 29, 31) |
2005 __gen_field(values->CommandSubType, 27, 28) |
2006 __gen_field(values->_3DCommandOpcode, 24, 26) |
2007 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2008 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
2009 __gen_field(values->DwordLength, 0, 7) |
2010 0;
2011
2012 GEN8_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
2013 }
2014
2015 #define GEN8_3DSTATE_CONSTANT_VS_length 0x0000000b
2016 #define GEN8_3DSTATE_CONSTANT_VS_length_bias 0x00000002
2017 #define GEN8_3DSTATE_CONSTANT_VS_header \
2018 .CommandType = 3, \
2019 .CommandSubType = 3, \
2020 ._3DCommandOpcode = 0, \
2021 ._3DCommandSubOpcode = 21, \
2022 .DwordLength = 9
2023
2024 struct GEN8_3DSTATE_CONSTANT_VS {
2025 uint32_t CommandType;
2026 uint32_t CommandSubType;
2027 uint32_t _3DCommandOpcode;
2028 uint32_t _3DCommandSubOpcode;
2029 struct GEN8_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
2030 uint32_t DwordLength;
2031 struct GEN8_3DSTATE_CONSTANT_BODY ConstantBody;
2032 };
2033
2034 static inline void
2035 GEN8_3DSTATE_CONSTANT_VS_pack(__gen_user_data *data, void * restrict dst,
2036 const struct GEN8_3DSTATE_CONSTANT_VS * restrict values)
2037 {
2038 uint32_t *dw = (uint32_t * restrict) dst;
2039
2040 uint32_t dw_ConstantBufferObjectControlState;
2041 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
2042 dw[0] =
2043 __gen_field(values->CommandType, 29, 31) |
2044 __gen_field(values->CommandSubType, 27, 28) |
2045 __gen_field(values->_3DCommandOpcode, 24, 26) |
2046 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2047 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
2048 __gen_field(values->DwordLength, 0, 7) |
2049 0;
2050
2051 GEN8_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
2052 }
2053
2054 #define GEN8_3DSTATE_DEPTH_BUFFER_length 0x00000008
2055 #define GEN8_3DSTATE_DEPTH_BUFFER_length_bias 0x00000002
2056 #define GEN8_3DSTATE_DEPTH_BUFFER_header \
2057 .CommandType = 3, \
2058 .CommandSubType = 3, \
2059 ._3DCommandOpcode = 0, \
2060 ._3DCommandSubOpcode = 5, \
2061 .DwordLength = 6
2062
2063 struct GEN8_3DSTATE_DEPTH_BUFFER {
2064 uint32_t CommandType;
2065 uint32_t CommandSubType;
2066 uint32_t _3DCommandOpcode;
2067 uint32_t _3DCommandSubOpcode;
2068 uint32_t DwordLength;
2069 #define SURFTYPE_1D 0
2070 #define SURFTYPE_2D 1
2071 #define SURFTYPE_3D 2
2072 #define SURFTYPE_CUBE 3
2073 #define SURFTYPE_NULL 7
2074 uint32_t SurfaceType;
2075 bool DepthWriteEnable;
2076 bool StencilWriteEnable;
2077 bool HierarchicalDepthBufferEnable;
2078 #define D32_FLOAT 1
2079 #define D24_UNORM_X8_UINT 3
2080 #define D16_UNORM 5
2081 uint32_t SurfaceFormat;
2082 uint32_t SurfacePitch;
2083 __gen_address_type SurfaceBaseAddress;
2084 uint32_t Height;
2085 uint32_t Width;
2086 uint32_t LOD;
2087 uint32_t Depth;
2088 uint32_t MinimumArrayElement;
2089 struct GEN8_MEMORY_OBJECT_CONTROL_STATE DepthBufferObjectControlState;
2090 uint32_t RenderTargetViewExtent;
2091 uint32_t SurfaceQPitch;
2092 };
2093
2094 static inline void
2095 GEN8_3DSTATE_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
2096 const struct GEN8_3DSTATE_DEPTH_BUFFER * restrict values)
2097 {
2098 uint32_t *dw = (uint32_t * restrict) dst;
2099
2100 dw[0] =
2101 __gen_field(values->CommandType, 29, 31) |
2102 __gen_field(values->CommandSubType, 27, 28) |
2103 __gen_field(values->_3DCommandOpcode, 24, 26) |
2104 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2105 __gen_field(values->DwordLength, 0, 7) |
2106 0;
2107
2108 dw[1] =
2109 __gen_field(values->SurfaceType, 29, 31) |
2110 __gen_field(values->DepthWriteEnable, 28, 28) |
2111 __gen_field(values->StencilWriteEnable, 27, 27) |
2112 __gen_field(values->HierarchicalDepthBufferEnable, 22, 22) |
2113 __gen_field(values->SurfaceFormat, 18, 20) |
2114 __gen_field(values->SurfacePitch, 0, 17) |
2115 0;
2116
2117 uint32_t dw2 =
2118 0;
2119
2120 uint64_t qw2 =
2121 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
2122
2123 dw[2] = qw2;
2124 dw[3] = qw2 >> 32;
2125
2126 dw[4] =
2127 __gen_field(values->Height, 18, 31) |
2128 __gen_field(values->Width, 4, 17) |
2129 __gen_field(values->LOD, 0, 3) |
2130 0;
2131
2132 uint32_t dw_DepthBufferObjectControlState;
2133 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DepthBufferObjectControlState, &values->DepthBufferObjectControlState);
2134 dw[5] =
2135 __gen_field(values->Depth, 21, 31) |
2136 __gen_field(values->MinimumArrayElement, 10, 20) |
2137 __gen_field(dw_DepthBufferObjectControlState, 0, 6) |
2138 0;
2139
2140 dw[6] =
2141 0;
2142
2143 dw[7] =
2144 __gen_field(values->RenderTargetViewExtent, 21, 31) |
2145 __gen_field(values->SurfaceQPitch, 0, 14) |
2146 0;
2147
2148 }
2149
2150 #define GEN8_3DSTATE_DRAWING_RECTANGLE_length 0x00000004
2151 #define GEN8_3DSTATE_DRAWING_RECTANGLE_length_bias 0x00000002
2152 #define GEN8_3DSTATE_DRAWING_RECTANGLE_header \
2153 .CommandType = 3, \
2154 .CommandSubType = 3, \
2155 ._3DCommandOpcode = 1, \
2156 ._3DCommandSubOpcode = 0, \
2157 .DwordLength = 2
2158
2159 struct GEN8_3DSTATE_DRAWING_RECTANGLE {
2160 uint32_t CommandType;
2161 uint32_t CommandSubType;
2162 uint32_t _3DCommandOpcode;
2163 uint32_t _3DCommandSubOpcode;
2164 #define Legacy 0
2165 #define Core0Enabled 1
2166 #define Core1Enabled 2
2167 uint32_t CoreModeSelect;
2168 uint32_t DwordLength;
2169 uint32_t ClippedDrawingRectangleYMin;
2170 uint32_t ClippedDrawingRectangleXMin;
2171 uint32_t ClippedDrawingRectangleYMax;
2172 uint32_t ClippedDrawingRectangleXMax;
2173 uint32_t DrawingRectangleOriginY;
2174 uint32_t DrawingRectangleOriginX;
2175 };
2176
2177 static inline void
2178 GEN8_3DSTATE_DRAWING_RECTANGLE_pack(__gen_user_data *data, void * restrict dst,
2179 const struct GEN8_3DSTATE_DRAWING_RECTANGLE * restrict values)
2180 {
2181 uint32_t *dw = (uint32_t * restrict) dst;
2182
2183 dw[0] =
2184 __gen_field(values->CommandType, 29, 31) |
2185 __gen_field(values->CommandSubType, 27, 28) |
2186 __gen_field(values->_3DCommandOpcode, 24, 26) |
2187 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2188 __gen_field(values->CoreModeSelect, 14, 15) |
2189 __gen_field(values->DwordLength, 0, 7) |
2190 0;
2191
2192 dw[1] =
2193 __gen_field(values->ClippedDrawingRectangleYMin, 16, 31) |
2194 __gen_field(values->ClippedDrawingRectangleXMin, 0, 15) |
2195 0;
2196
2197 dw[2] =
2198 __gen_field(values->ClippedDrawingRectangleYMax, 16, 31) |
2199 __gen_field(values->ClippedDrawingRectangleXMax, 0, 15) |
2200 0;
2201
2202 dw[3] =
2203 __gen_field(values->DrawingRectangleOriginY, 16, 31) |
2204 __gen_field(values->DrawingRectangleOriginX, 0, 15) |
2205 0;
2206
2207 }
2208
2209 #define GEN8_3DSTATE_DS_length 0x00000009
2210 #define GEN8_3DSTATE_DS_length_bias 0x00000002
2211 #define GEN8_3DSTATE_DS_header \
2212 .CommandType = 3, \
2213 .CommandSubType = 3, \
2214 ._3DCommandOpcode = 0, \
2215 ._3DCommandSubOpcode = 29, \
2216 .DwordLength = 7
2217
2218 struct GEN8_3DSTATE_DS {
2219 uint32_t CommandType;
2220 uint32_t CommandSubType;
2221 uint32_t _3DCommandOpcode;
2222 uint32_t _3DCommandSubOpcode;
2223 uint32_t DwordLength;
2224 uint64_t KernelStartPointer;
2225 #define Multiple 0
2226 #define Single 1
2227 uint32_t SingleDomainPointDispatch;
2228 #define Dmask 0
2229 #define Vmask 1
2230 uint32_t VectorMaskEnable;
2231 #define NoSamplers 0
2232 #define _14Samplers 1
2233 #define _58Samplers 2
2234 #define _912Samplers 3
2235 #define _1316Samplers 4
2236 uint32_t SamplerCount;
2237 uint32_t BindingTableEntryCount;
2238 #define Normal 0
2239 #define High 1
2240 uint32_t ThreadDispatchPriority;
2241 #define IEEE754 0
2242 #define Alternate 1
2243 uint32_t FloatingPointMode;
2244 bool AccessesUAV;
2245 bool IllegalOpcodeExceptionEnable;
2246 bool SoftwareExceptionEnable;
2247 uint64_t ScratchSpaceBasePointer;
2248 uint32_t PerThreadScratchSpace;
2249 uint32_t DispatchGRFStartRegisterForURBData;
2250 uint32_t PatchURBEntryReadLength;
2251 uint32_t PatchURBEntryReadOffset;
2252 uint32_t MaximumNumberofThreads;
2253 bool StatisticsEnable;
2254 bool SIMD8DispatchEnable;
2255 bool ComputeWCoordinateEnable;
2256 bool CacheDisable;
2257 bool FunctionEnable;
2258 uint32_t VertexURBEntryOutputReadOffset;
2259 uint32_t VertexURBEntryOutputLength;
2260 uint32_t UserClipDistanceClipTestEnableBitmask;
2261 uint32_t UserClipDistanceCullTestEnableBitmask;
2262 };
2263
2264 static inline void
2265 GEN8_3DSTATE_DS_pack(__gen_user_data *data, void * restrict dst,
2266 const struct GEN8_3DSTATE_DS * restrict values)
2267 {
2268 uint32_t *dw = (uint32_t * restrict) dst;
2269
2270 dw[0] =
2271 __gen_field(values->CommandType, 29, 31) |
2272 __gen_field(values->CommandSubType, 27, 28) |
2273 __gen_field(values->_3DCommandOpcode, 24, 26) |
2274 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2275 __gen_field(values->DwordLength, 0, 7) |
2276 0;
2277
2278 uint64_t qw1 =
2279 __gen_offset(values->KernelStartPointer, 6, 63) |
2280 0;
2281
2282 dw[1] = qw1;
2283 dw[2] = qw1 >> 32;
2284
2285 dw[3] =
2286 __gen_field(values->SingleDomainPointDispatch, 31, 31) |
2287 __gen_field(values->VectorMaskEnable, 30, 30) |
2288 __gen_field(values->SamplerCount, 27, 29) |
2289 __gen_field(values->BindingTableEntryCount, 18, 25) |
2290 __gen_field(values->ThreadDispatchPriority, 17, 17) |
2291 __gen_field(values->FloatingPointMode, 16, 16) |
2292 __gen_field(values->AccessesUAV, 14, 14) |
2293 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2294 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
2295 0;
2296
2297 uint64_t qw4 =
2298 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
2299 __gen_field(values->PerThreadScratchSpace, 0, 3) |
2300 0;
2301
2302 dw[4] = qw4;
2303 dw[5] = qw4 >> 32;
2304
2305 dw[6] =
2306 __gen_field(values->DispatchGRFStartRegisterForURBData, 20, 24) |
2307 __gen_field(values->PatchURBEntryReadLength, 11, 17) |
2308 __gen_field(values->PatchURBEntryReadOffset, 4, 9) |
2309 0;
2310
2311 dw[7] =
2312 __gen_field(values->MaximumNumberofThreads, 21, 29) |
2313 __gen_field(values->StatisticsEnable, 10, 10) |
2314 __gen_field(values->SIMD8DispatchEnable, 3, 3) |
2315 __gen_field(values->ComputeWCoordinateEnable, 2, 2) |
2316 __gen_field(values->CacheDisable, 1, 1) |
2317 __gen_field(values->FunctionEnable, 0, 0) |
2318 0;
2319
2320 dw[8] =
2321 __gen_field(values->VertexURBEntryOutputReadOffset, 21, 26) |
2322 __gen_field(values->VertexURBEntryOutputLength, 16, 20) |
2323 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 8, 15) |
2324 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
2325 0;
2326
2327 }
2328
2329 #define GEN8_3DSTATE_GATHER_CONSTANT_DS_length_bias 0x00000002
2330 #define GEN8_3DSTATE_GATHER_CONSTANT_DS_header \
2331 .CommandType = 3, \
2332 .CommandSubType = 3, \
2333 ._3DCommandOpcode = 0, \
2334 ._3DCommandSubOpcode = 55
2335
2336 struct GEN8_GATHER_CONSTANT_ENTRY {
2337 uint32_t ConstantBufferOffset;
2338 uint32_t ChannelMask;
2339 uint32_t BindingTableIndexOffset;
2340 };
2341
2342 static inline void
2343 GEN8_GATHER_CONSTANT_ENTRY_pack(__gen_user_data *data, void * restrict dst,
2344 const struct GEN8_GATHER_CONSTANT_ENTRY * restrict values)
2345 {
2346 uint32_t *dw = (uint32_t * restrict) dst;
2347
2348 dw[0] =
2349 __gen_offset(values->ConstantBufferOffset, 8, 15) |
2350 __gen_field(values->ChannelMask, 4, 7) |
2351 __gen_field(values->BindingTableIndexOffset, 0, 3) |
2352 0;
2353
2354 }
2355
2356 struct GEN8_3DSTATE_GATHER_CONSTANT_DS {
2357 uint32_t CommandType;
2358 uint32_t CommandSubType;
2359 uint32_t _3DCommandOpcode;
2360 uint32_t _3DCommandSubOpcode;
2361 uint32_t DwordLength;
2362 uint32_t ConstantBufferValid;
2363 uint32_t ConstantBufferBindingTableBlock;
2364 uint32_t GatherBufferOffset;
2365 bool ConstantBufferDx9GenerateStall;
2366 /* variable length fields follow */
2367 };
2368
2369 static inline void
2370 GEN8_3DSTATE_GATHER_CONSTANT_DS_pack(__gen_user_data *data, void * restrict dst,
2371 const struct GEN8_3DSTATE_GATHER_CONSTANT_DS * restrict values)
2372 {
2373 uint32_t *dw = (uint32_t * restrict) dst;
2374
2375 dw[0] =
2376 __gen_field(values->CommandType, 29, 31) |
2377 __gen_field(values->CommandSubType, 27, 28) |
2378 __gen_field(values->_3DCommandOpcode, 24, 26) |
2379 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2380 __gen_field(values->DwordLength, 0, 7) |
2381 0;
2382
2383 dw[1] =
2384 __gen_field(values->ConstantBufferValid, 16, 31) |
2385 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2386 0;
2387
2388 dw[2] =
2389 __gen_offset(values->GatherBufferOffset, 6, 22) |
2390 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2391 0;
2392
2393 /* variable length fields follow */
2394 }
2395
2396 #define GEN8_3DSTATE_GATHER_CONSTANT_GS_length_bias 0x00000002
2397 #define GEN8_3DSTATE_GATHER_CONSTANT_GS_header \
2398 .CommandType = 3, \
2399 .CommandSubType = 3, \
2400 ._3DCommandOpcode = 0, \
2401 ._3DCommandSubOpcode = 53
2402
2403 struct GEN8_3DSTATE_GATHER_CONSTANT_GS {
2404 uint32_t CommandType;
2405 uint32_t CommandSubType;
2406 uint32_t _3DCommandOpcode;
2407 uint32_t _3DCommandSubOpcode;
2408 uint32_t DwordLength;
2409 uint32_t ConstantBufferValid;
2410 uint32_t ConstantBufferBindingTableBlock;
2411 uint32_t GatherBufferOffset;
2412 bool ConstantBufferDx9GenerateStall;
2413 /* variable length fields follow */
2414 };
2415
2416 static inline void
2417 GEN8_3DSTATE_GATHER_CONSTANT_GS_pack(__gen_user_data *data, void * restrict dst,
2418 const struct GEN8_3DSTATE_GATHER_CONSTANT_GS * restrict values)
2419 {
2420 uint32_t *dw = (uint32_t * restrict) dst;
2421
2422 dw[0] =
2423 __gen_field(values->CommandType, 29, 31) |
2424 __gen_field(values->CommandSubType, 27, 28) |
2425 __gen_field(values->_3DCommandOpcode, 24, 26) |
2426 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2427 __gen_field(values->DwordLength, 0, 7) |
2428 0;
2429
2430 dw[1] =
2431 __gen_field(values->ConstantBufferValid, 16, 31) |
2432 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2433 0;
2434
2435 dw[2] =
2436 __gen_offset(values->GatherBufferOffset, 6, 22) |
2437 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2438 0;
2439
2440 /* variable length fields follow */
2441 }
2442
2443 #define GEN8_3DSTATE_GATHER_CONSTANT_HS_length_bias 0x00000002
2444 #define GEN8_3DSTATE_GATHER_CONSTANT_HS_header \
2445 .CommandType = 3, \
2446 .CommandSubType = 3, \
2447 ._3DCommandOpcode = 0, \
2448 ._3DCommandSubOpcode = 54
2449
2450 struct GEN8_3DSTATE_GATHER_CONSTANT_HS {
2451 uint32_t CommandType;
2452 uint32_t CommandSubType;
2453 uint32_t _3DCommandOpcode;
2454 uint32_t _3DCommandSubOpcode;
2455 uint32_t DwordLength;
2456 uint32_t ConstantBufferValid;
2457 uint32_t ConstantBufferBindingTableBlock;
2458 uint32_t GatherBufferOffset;
2459 bool ConstantBufferDx9GenerateStall;
2460 /* variable length fields follow */
2461 };
2462
2463 static inline void
2464 GEN8_3DSTATE_GATHER_CONSTANT_HS_pack(__gen_user_data *data, void * restrict dst,
2465 const struct GEN8_3DSTATE_GATHER_CONSTANT_HS * restrict values)
2466 {
2467 uint32_t *dw = (uint32_t * restrict) dst;
2468
2469 dw[0] =
2470 __gen_field(values->CommandType, 29, 31) |
2471 __gen_field(values->CommandSubType, 27, 28) |
2472 __gen_field(values->_3DCommandOpcode, 24, 26) |
2473 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2474 __gen_field(values->DwordLength, 0, 7) |
2475 0;
2476
2477 dw[1] =
2478 __gen_field(values->ConstantBufferValid, 16, 31) |
2479 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2480 0;
2481
2482 dw[2] =
2483 __gen_offset(values->GatherBufferOffset, 6, 22) |
2484 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2485 0;
2486
2487 /* variable length fields follow */
2488 }
2489
2490 #define GEN8_3DSTATE_GATHER_CONSTANT_PS_length_bias 0x00000002
2491 #define GEN8_3DSTATE_GATHER_CONSTANT_PS_header \
2492 .CommandType = 3, \
2493 .CommandSubType = 3, \
2494 ._3DCommandOpcode = 0, \
2495 ._3DCommandSubOpcode = 56
2496
2497 struct GEN8_3DSTATE_GATHER_CONSTANT_PS {
2498 uint32_t CommandType;
2499 uint32_t CommandSubType;
2500 uint32_t _3DCommandOpcode;
2501 uint32_t _3DCommandSubOpcode;
2502 uint32_t DwordLength;
2503 uint32_t ConstantBufferValid;
2504 uint32_t ConstantBufferBindingTableBlock;
2505 uint32_t GatherBufferOffset;
2506 bool ConstantBufferDx9GenerateStall;
2507 bool ConstantBufferDx9Enable;
2508 /* variable length fields follow */
2509 };
2510
2511 static inline void
2512 GEN8_3DSTATE_GATHER_CONSTANT_PS_pack(__gen_user_data *data, void * restrict dst,
2513 const struct GEN8_3DSTATE_GATHER_CONSTANT_PS * restrict values)
2514 {
2515 uint32_t *dw = (uint32_t * restrict) dst;
2516
2517 dw[0] =
2518 __gen_field(values->CommandType, 29, 31) |
2519 __gen_field(values->CommandSubType, 27, 28) |
2520 __gen_field(values->_3DCommandOpcode, 24, 26) |
2521 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2522 __gen_field(values->DwordLength, 0, 7) |
2523 0;
2524
2525 dw[1] =
2526 __gen_field(values->ConstantBufferValid, 16, 31) |
2527 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2528 0;
2529
2530 dw[2] =
2531 __gen_offset(values->GatherBufferOffset, 6, 22) |
2532 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2533 __gen_field(values->ConstantBufferDx9Enable, 4, 4) |
2534 0;
2535
2536 /* variable length fields follow */
2537 }
2538
2539 #define GEN8_3DSTATE_GATHER_CONSTANT_VS_length_bias 0x00000002
2540 #define GEN8_3DSTATE_GATHER_CONSTANT_VS_header \
2541 .CommandType = 3, \
2542 .CommandSubType = 3, \
2543 ._3DCommandOpcode = 0, \
2544 ._3DCommandSubOpcode = 52
2545
2546 struct GEN8_3DSTATE_GATHER_CONSTANT_VS {
2547 uint32_t CommandType;
2548 uint32_t CommandSubType;
2549 uint32_t _3DCommandOpcode;
2550 uint32_t _3DCommandSubOpcode;
2551 uint32_t DwordLength;
2552 uint32_t ConstantBufferValid;
2553 uint32_t ConstantBufferBindingTableBlock;
2554 uint32_t GatherBufferOffset;
2555 bool ConstantBufferDx9GenerateStall;
2556 bool ConstantBufferDx9Enable;
2557 /* variable length fields follow */
2558 };
2559
2560 static inline void
2561 GEN8_3DSTATE_GATHER_CONSTANT_VS_pack(__gen_user_data *data, void * restrict dst,
2562 const struct GEN8_3DSTATE_GATHER_CONSTANT_VS * restrict values)
2563 {
2564 uint32_t *dw = (uint32_t * restrict) dst;
2565
2566 dw[0] =
2567 __gen_field(values->CommandType, 29, 31) |
2568 __gen_field(values->CommandSubType, 27, 28) |
2569 __gen_field(values->_3DCommandOpcode, 24, 26) |
2570 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2571 __gen_field(values->DwordLength, 0, 7) |
2572 0;
2573
2574 dw[1] =
2575 __gen_field(values->ConstantBufferValid, 16, 31) |
2576 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2577 0;
2578
2579 dw[2] =
2580 __gen_offset(values->GatherBufferOffset, 6, 22) |
2581 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2582 __gen_field(values->ConstantBufferDx9Enable, 4, 4) |
2583 0;
2584
2585 /* variable length fields follow */
2586 }
2587
2588 #define GEN8_3DSTATE_GATHER_POOL_ALLOC_length 0x00000004
2589 #define GEN8_3DSTATE_GATHER_POOL_ALLOC_length_bias 0x00000002
2590 #define GEN8_3DSTATE_GATHER_POOL_ALLOC_header \
2591 .CommandType = 3, \
2592 .CommandSubType = 3, \
2593 ._3DCommandOpcode = 1, \
2594 ._3DCommandSubOpcode = 26, \
2595 .DwordLength = 2
2596
2597 struct GEN8_3DSTATE_GATHER_POOL_ALLOC {
2598 uint32_t CommandType;
2599 uint32_t CommandSubType;
2600 uint32_t _3DCommandOpcode;
2601 uint32_t _3DCommandSubOpcode;
2602 uint32_t DwordLength;
2603 __gen_address_type GatherPoolBaseAddress;
2604 bool GatherPoolEnable;
2605 struct GEN8_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
2606 uint32_t GatherPoolBufferSize;
2607 };
2608
2609 static inline void
2610 GEN8_3DSTATE_GATHER_POOL_ALLOC_pack(__gen_user_data *data, void * restrict dst,
2611 const struct GEN8_3DSTATE_GATHER_POOL_ALLOC * restrict values)
2612 {
2613 uint32_t *dw = (uint32_t * restrict) dst;
2614
2615 dw[0] =
2616 __gen_field(values->CommandType, 29, 31) |
2617 __gen_field(values->CommandSubType, 27, 28) |
2618 __gen_field(values->_3DCommandOpcode, 24, 26) |
2619 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2620 __gen_field(values->DwordLength, 0, 7) |
2621 0;
2622
2623 uint32_t dw_MemoryObjectControlState;
2624 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
2625 uint32_t dw1 =
2626 __gen_field(values->GatherPoolEnable, 11, 11) |
2627 __gen_field(dw_MemoryObjectControlState, 0, 6) |
2628 0;
2629
2630 uint64_t qw1 =
2631 __gen_combine_address(data, &dw[1], values->GatherPoolBaseAddress, dw1);
2632
2633 dw[1] = qw1;
2634 dw[2] = qw1 >> 32;
2635
2636 dw[3] =
2637 __gen_field(values->GatherPoolBufferSize, 12, 31) |
2638 0;
2639
2640 }
2641
2642 #define GEN8_3DSTATE_GS_length 0x0000000a
2643 #define GEN8_3DSTATE_GS_length_bias 0x00000002
2644 #define GEN8_3DSTATE_GS_header \
2645 .CommandType = 3, \
2646 .CommandSubType = 3, \
2647 ._3DCommandOpcode = 0, \
2648 ._3DCommandSubOpcode = 17, \
2649 .DwordLength = 8
2650
2651 struct GEN8_3DSTATE_GS {
2652 uint32_t CommandType;
2653 uint32_t CommandSubType;
2654 uint32_t _3DCommandOpcode;
2655 uint32_t _3DCommandSubOpcode;
2656 uint32_t DwordLength;
2657 uint64_t KernelStartPointer;
2658 uint32_t SingleProgramFlow;
2659 #define Dmask 0
2660 #define Vmask 1
2661 uint32_t VectorMaskEnable;
2662 #define NoSamplers 0
2663 #define _14Samplers 1
2664 #define _58Samplers 2
2665 #define _912Samplers 3
2666 #define _1316Samplers 4
2667 uint32_t SamplerCount;
2668 uint32_t BindingTableEntryCount;
2669 #define Normal 0
2670 #define High 1
2671 uint32_t ThreadDispatchPriority;
2672 #define IEEE754 0
2673 #define Alternate 1
2674 uint32_t FloatingPointMode;
2675 bool IllegalOpcodeExceptionEnable;
2676 bool AccessesUAV;
2677 bool MaskStackExceptionEnable;
2678 bool SoftwareExceptionEnable;
2679 uint32_t ExpectedVertexCount;
2680 uint64_t ScratchSpaceBasePointer;
2681 uint32_t PerThreadScratchSpace;
2682 uint32_t OutputVertexSize;
2683 uint32_t OutputTopology;
2684 uint32_t VertexURBEntryReadLength;
2685 bool IncludeVertexHandles;
2686 uint32_t VertexURBEntryReadOffset;
2687 uint32_t DispatchGRFStartRegisterForURBData;
2688 uint32_t MaximumNumberofThreads;
2689 uint32_t ControlDataHeaderSize;
2690 uint32_t InstanceControl;
2691 uint32_t DefaultStreamId;
2692 #define DispatchModeSingle 0
2693 #define DispatchModeDualInstance 1
2694 #define DispatchModeDualObject 2
2695 #define DispatchModeSIMD8 3
2696 uint32_t DispatchMode;
2697 bool StatisticsEnable;
2698 uint32_t InvocationsIncrementValue;
2699 bool IncludePrimitiveID;
2700 uint32_t Hint;
2701 #define LEADING 0
2702 #define TRAILING 1
2703 uint32_t ReorderMode;
2704 bool DiscardAdjacency;
2705 bool Enable;
2706 #define CUT 0
2707 #define SID 1
2708 uint32_t ControlDataFormat;
2709 bool StaticOutput;
2710 uint32_t StaticOutputVertexCount;
2711 uint32_t VertexURBEntryOutputReadOffset;
2712 uint32_t VertexURBEntryOutputLength;
2713 uint32_t UserClipDistanceClipTestEnableBitmask;
2714 uint32_t UserClipDistanceCullTestEnableBitmask;
2715 };
2716
2717 static inline void
2718 GEN8_3DSTATE_GS_pack(__gen_user_data *data, void * restrict dst,
2719 const struct GEN8_3DSTATE_GS * restrict values)
2720 {
2721 uint32_t *dw = (uint32_t * restrict) dst;
2722
2723 dw[0] =
2724 __gen_field(values->CommandType, 29, 31) |
2725 __gen_field(values->CommandSubType, 27, 28) |
2726 __gen_field(values->_3DCommandOpcode, 24, 26) |
2727 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2728 __gen_field(values->DwordLength, 0, 7) |
2729 0;
2730
2731 uint64_t qw1 =
2732 __gen_offset(values->KernelStartPointer, 6, 63) |
2733 0;
2734
2735 dw[1] = qw1;
2736 dw[2] = qw1 >> 32;
2737
2738 dw[3] =
2739 __gen_field(values->SingleProgramFlow, 31, 31) |
2740 __gen_field(values->VectorMaskEnable, 30, 30) |
2741 __gen_field(values->SamplerCount, 27, 29) |
2742 __gen_field(values->BindingTableEntryCount, 18, 25) |
2743 __gen_field(values->ThreadDispatchPriority, 17, 17) |
2744 __gen_field(values->FloatingPointMode, 16, 16) |
2745 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2746 __gen_field(values->AccessesUAV, 12, 12) |
2747 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
2748 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
2749 __gen_field(values->ExpectedVertexCount, 0, 5) |
2750 0;
2751
2752 uint64_t qw4 =
2753 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
2754 __gen_field(values->PerThreadScratchSpace, 0, 3) |
2755 0;
2756
2757 dw[4] = qw4;
2758 dw[5] = qw4 >> 32;
2759
2760 dw[6] =
2761 __gen_field(values->OutputVertexSize, 23, 28) |
2762 __gen_field(values->OutputTopology, 17, 22) |
2763 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
2764 __gen_field(values->IncludeVertexHandles, 10, 10) |
2765 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
2766 __gen_field(values->DispatchGRFStartRegisterForURBData, 0, 3) |
2767 0;
2768
2769 dw[7] =
2770 __gen_field(values->MaximumNumberofThreads, 24, 31) |
2771 __gen_field(values->ControlDataHeaderSize, 20, 23) |
2772 __gen_field(values->InstanceControl, 15, 19) |
2773 __gen_field(values->DefaultStreamId, 13, 14) |
2774 __gen_field(values->DispatchMode, 11, 12) |
2775 __gen_field(values->StatisticsEnable, 10, 10) |
2776 __gen_field(values->InvocationsIncrementValue, 5, 9) |
2777 __gen_field(values->IncludePrimitiveID, 4, 4) |
2778 __gen_field(values->Hint, 3, 3) |
2779 __gen_field(values->ReorderMode, 2, 2) |
2780 __gen_field(values->DiscardAdjacency, 1, 1) |
2781 __gen_field(values->Enable, 0, 0) |
2782 0;
2783
2784 dw[8] =
2785 __gen_field(values->ControlDataFormat, 31, 31) |
2786 __gen_field(values->StaticOutput, 30, 30) |
2787 __gen_field(values->StaticOutputVertexCount, 16, 26) |
2788 0;
2789
2790 dw[9] =
2791 __gen_field(values->VertexURBEntryOutputReadOffset, 21, 26) |
2792 __gen_field(values->VertexURBEntryOutputLength, 16, 20) |
2793 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 8, 15) |
2794 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
2795 0;
2796
2797 }
2798
2799 #define GEN8_3DSTATE_HIER_DEPTH_BUFFER_length 0x00000005
2800 #define GEN8_3DSTATE_HIER_DEPTH_BUFFER_length_bias 0x00000002
2801 #define GEN8_3DSTATE_HIER_DEPTH_BUFFER_header \
2802 .CommandType = 3, \
2803 .CommandSubType = 3, \
2804 ._3DCommandOpcode = 0, \
2805 ._3DCommandSubOpcode = 7, \
2806 .DwordLength = 3
2807
2808 struct GEN8_3DSTATE_HIER_DEPTH_BUFFER {
2809 uint32_t CommandType;
2810 uint32_t CommandSubType;
2811 uint32_t _3DCommandOpcode;
2812 uint32_t _3DCommandSubOpcode;
2813 uint32_t DwordLength;
2814 struct GEN8_MEMORY_OBJECT_CONTROL_STATE HierarchicalDepthBufferObjectControlState;
2815 uint32_t SurfacePitch;
2816 __gen_address_type SurfaceBaseAddress;
2817 uint32_t SurfaceQPitch;
2818 };
2819
2820 static inline void
2821 GEN8_3DSTATE_HIER_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
2822 const struct GEN8_3DSTATE_HIER_DEPTH_BUFFER * restrict values)
2823 {
2824 uint32_t *dw = (uint32_t * restrict) dst;
2825
2826 dw[0] =
2827 __gen_field(values->CommandType, 29, 31) |
2828 __gen_field(values->CommandSubType, 27, 28) |
2829 __gen_field(values->_3DCommandOpcode, 24, 26) |
2830 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2831 __gen_field(values->DwordLength, 0, 7) |
2832 0;
2833
2834 uint32_t dw_HierarchicalDepthBufferObjectControlState;
2835 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_HierarchicalDepthBufferObjectControlState, &values->HierarchicalDepthBufferObjectControlState);
2836 dw[1] =
2837 __gen_field(dw_HierarchicalDepthBufferObjectControlState, 25, 31) |
2838 __gen_field(values->SurfacePitch, 0, 16) |
2839 0;
2840
2841 uint32_t dw2 =
2842 0;
2843
2844 uint64_t qw2 =
2845 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
2846
2847 dw[2] = qw2;
2848 dw[3] = qw2 >> 32;
2849
2850 dw[4] =
2851 __gen_field(values->SurfaceQPitch, 0, 14) |
2852 0;
2853
2854 }
2855
2856 #define GEN8_3DSTATE_HS_length 0x00000009
2857 #define GEN8_3DSTATE_HS_length_bias 0x00000002
2858 #define GEN8_3DSTATE_HS_header \
2859 .CommandType = 3, \
2860 .CommandSubType = 3, \
2861 ._3DCommandOpcode = 0, \
2862 ._3DCommandSubOpcode = 27, \
2863 .DwordLength = 7
2864
2865 struct GEN8_3DSTATE_HS {
2866 uint32_t CommandType;
2867 uint32_t CommandSubType;
2868 uint32_t _3DCommandOpcode;
2869 uint32_t _3DCommandSubOpcode;
2870 uint32_t DwordLength;
2871 #define NoSamplers 0
2872 #define _14Samplers 1
2873 #define _58Samplers 2
2874 #define _912Samplers 3
2875 #define _1316Samplers 4
2876 uint32_t SamplerCount;
2877 uint32_t BindingTableEntryCount;
2878 #define Normal 0
2879 #define High 1
2880 uint32_t ThreadDispatchPriority;
2881 #define IEEE754 0
2882 #define alternate 1
2883 uint32_t FloatingPointMode;
2884 bool IllegalOpcodeExceptionEnable;
2885 bool SoftwareExceptionEnable;
2886 bool Enable;
2887 bool StatisticsEnable;
2888 uint32_t MaximumNumberofThreads;
2889 uint32_t InstanceCount;
2890 uint64_t KernelStartPointer;
2891 uint64_t ScratchSpaceBasePointer;
2892 uint32_t PerThreadScratchSpace;
2893 bool SingleProgramFlow;
2894 #define Dmask 0
2895 #define Vmask 1
2896 uint32_t VectorMaskEnable;
2897 bool AccessesUAV;
2898 bool IncludeVertexHandles;
2899 uint32_t DispatchGRFStartRegisterForURBData;
2900 uint32_t VertexURBEntryReadLength;
2901 uint32_t VertexURBEntryReadOffset;
2902 };
2903
2904 static inline void
2905 GEN8_3DSTATE_HS_pack(__gen_user_data *data, void * restrict dst,
2906 const struct GEN8_3DSTATE_HS * restrict values)
2907 {
2908 uint32_t *dw = (uint32_t * restrict) dst;
2909
2910 dw[0] =
2911 __gen_field(values->CommandType, 29, 31) |
2912 __gen_field(values->CommandSubType, 27, 28) |
2913 __gen_field(values->_3DCommandOpcode, 24, 26) |
2914 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2915 __gen_field(values->DwordLength, 0, 7) |
2916 0;
2917
2918 dw[1] =
2919 __gen_field(values->SamplerCount, 27, 29) |
2920 __gen_field(values->BindingTableEntryCount, 18, 25) |
2921 __gen_field(values->ThreadDispatchPriority, 17, 17) |
2922 __gen_field(values->FloatingPointMode, 16, 16) |
2923 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2924 __gen_field(values->SoftwareExceptionEnable, 12, 12) |
2925 0;
2926
2927 dw[2] =
2928 __gen_field(values->Enable, 31, 31) |
2929 __gen_field(values->StatisticsEnable, 29, 29) |
2930 __gen_field(values->MaximumNumberofThreads, 8, 16) |
2931 __gen_field(values->InstanceCount, 0, 3) |
2932 0;
2933
2934 uint64_t qw3 =
2935 __gen_offset(values->KernelStartPointer, 6, 63) |
2936 0;
2937
2938 dw[3] = qw3;
2939 dw[4] = qw3 >> 32;
2940
2941 uint64_t qw5 =
2942 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
2943 __gen_field(values->PerThreadScratchSpace, 0, 3) |
2944 0;
2945
2946 dw[5] = qw5;
2947 dw[6] = qw5 >> 32;
2948
2949 dw[7] =
2950 __gen_field(values->SingleProgramFlow, 27, 27) |
2951 __gen_field(values->VectorMaskEnable, 26, 26) |
2952 __gen_field(values->AccessesUAV, 25, 25) |
2953 __gen_field(values->IncludeVertexHandles, 24, 24) |
2954 __gen_field(values->DispatchGRFStartRegisterForURBData, 19, 23) |
2955 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
2956 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
2957 0;
2958
2959 dw[8] =
2960 0;
2961
2962 }
2963
2964 #define GEN8_3DSTATE_INDEX_BUFFER_length 0x00000005
2965 #define GEN8_3DSTATE_INDEX_BUFFER_length_bias 0x00000002
2966 #define GEN8_3DSTATE_INDEX_BUFFER_header \
2967 .CommandType = 3, \
2968 .CommandSubType = 3, \
2969 ._3DCommandOpcode = 0, \
2970 ._3DCommandSubOpcode = 10, \
2971 .DwordLength = 3
2972
2973 struct GEN8_3DSTATE_INDEX_BUFFER {
2974 uint32_t CommandType;
2975 uint32_t CommandSubType;
2976 uint32_t _3DCommandOpcode;
2977 uint32_t _3DCommandSubOpcode;
2978 uint32_t DwordLength;
2979 #define INDEX_BYTE 0
2980 #define INDEX_WORD 1
2981 #define INDEX_DWORD 2
2982 uint32_t IndexFormat;
2983 struct GEN8_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
2984 __gen_address_type BufferStartingAddress;
2985 uint32_t BufferSize;
2986 };
2987
2988 static inline void
2989 GEN8_3DSTATE_INDEX_BUFFER_pack(__gen_user_data *data, void * restrict dst,
2990 const struct GEN8_3DSTATE_INDEX_BUFFER * restrict values)
2991 {
2992 uint32_t *dw = (uint32_t * restrict) dst;
2993
2994 dw[0] =
2995 __gen_field(values->CommandType, 29, 31) |
2996 __gen_field(values->CommandSubType, 27, 28) |
2997 __gen_field(values->_3DCommandOpcode, 24, 26) |
2998 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2999 __gen_field(values->DwordLength, 0, 7) |
3000 0;
3001
3002 uint32_t dw_MemoryObjectControlState;
3003 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
3004 dw[1] =
3005 __gen_field(values->IndexFormat, 8, 9) |
3006 __gen_field(dw_MemoryObjectControlState, 0, 6) |
3007 0;
3008
3009 uint32_t dw2 =
3010 0;
3011
3012 uint64_t qw2 =
3013 __gen_combine_address(data, &dw[2], values->BufferStartingAddress, dw2);
3014
3015 dw[2] = qw2;
3016 dw[3] = qw2 >> 32;
3017
3018 dw[4] =
3019 __gen_field(values->BufferSize, 0, 31) |
3020 0;
3021
3022 }
3023
3024 #define GEN8_3DSTATE_LINE_STIPPLE_length 0x00000003
3025 #define GEN8_3DSTATE_LINE_STIPPLE_length_bias 0x00000002
3026 #define GEN8_3DSTATE_LINE_STIPPLE_header \
3027 .CommandType = 3, \
3028 .CommandSubType = 3, \
3029 ._3DCommandOpcode = 1, \
3030 ._3DCommandSubOpcode = 8, \
3031 .DwordLength = 1
3032
3033 struct GEN8_3DSTATE_LINE_STIPPLE {
3034 uint32_t CommandType;
3035 uint32_t CommandSubType;
3036 uint32_t _3DCommandOpcode;
3037 uint32_t _3DCommandSubOpcode;
3038 uint32_t DwordLength;
3039 bool ModifyEnableCurrentRepeatCounterCurrentStippleIndex;
3040 uint32_t CurrentRepeatCounter;
3041 uint32_t CurrentStippleIndex;
3042 uint32_t LineStipplePattern;
3043 float LineStippleInverseRepeatCount;
3044 uint32_t LineStippleRepeatCount;
3045 };
3046
3047 static inline void
3048 GEN8_3DSTATE_LINE_STIPPLE_pack(__gen_user_data *data, void * restrict dst,
3049 const struct GEN8_3DSTATE_LINE_STIPPLE * restrict values)
3050 {
3051 uint32_t *dw = (uint32_t * restrict) dst;
3052
3053 dw[0] =
3054 __gen_field(values->CommandType, 29, 31) |
3055 __gen_field(values->CommandSubType, 27, 28) |
3056 __gen_field(values->_3DCommandOpcode, 24, 26) |
3057 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3058 __gen_field(values->DwordLength, 0, 7) |
3059 0;
3060
3061 dw[1] =
3062 __gen_field(values->ModifyEnableCurrentRepeatCounterCurrentStippleIndex, 31, 31) |
3063 __gen_field(values->CurrentRepeatCounter, 21, 29) |
3064 __gen_field(values->CurrentStippleIndex, 16, 19) |
3065 __gen_field(values->LineStipplePattern, 0, 15) |
3066 0;
3067
3068 dw[2] =
3069 __gen_field(values->LineStippleInverseRepeatCount * (1 << 16), 15, 31) |
3070 __gen_field(values->LineStippleRepeatCount, 0, 8) |
3071 0;
3072
3073 }
3074
3075 #define GEN8_3DSTATE_MONOFILTER_SIZE_length 0x00000002
3076 #define GEN8_3DSTATE_MONOFILTER_SIZE_length_bias 0x00000002
3077 #define GEN8_3DSTATE_MONOFILTER_SIZE_header \
3078 .CommandType = 3, \
3079 .CommandSubType = 3, \
3080 ._3DCommandOpcode = 1, \
3081 ._3DCommandSubOpcode = 17, \
3082 .DwordLength = 0
3083
3084 struct GEN8_3DSTATE_MONOFILTER_SIZE {
3085 uint32_t CommandType;
3086 uint32_t CommandSubType;
3087 uint32_t _3DCommandOpcode;
3088 uint32_t _3DCommandSubOpcode;
3089 uint32_t DwordLength;
3090 uint32_t MonochromeFilterWidth;
3091 uint32_t MonochromeFilterHeight;
3092 };
3093
3094 static inline void
3095 GEN8_3DSTATE_MONOFILTER_SIZE_pack(__gen_user_data *data, void * restrict dst,
3096 const struct GEN8_3DSTATE_MONOFILTER_SIZE * restrict values)
3097 {
3098 uint32_t *dw = (uint32_t * restrict) dst;
3099
3100 dw[0] =
3101 __gen_field(values->CommandType, 29, 31) |
3102 __gen_field(values->CommandSubType, 27, 28) |
3103 __gen_field(values->_3DCommandOpcode, 24, 26) |
3104 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3105 __gen_field(values->DwordLength, 0, 7) |
3106 0;
3107
3108 dw[1] =
3109 __gen_field(values->MonochromeFilterWidth, 3, 5) |
3110 __gen_field(values->MonochromeFilterHeight, 0, 2) |
3111 0;
3112
3113 }
3114
3115 #define GEN8_3DSTATE_MULTISAMPLE_length 0x00000002
3116 #define GEN8_3DSTATE_MULTISAMPLE_length_bias 0x00000002
3117 #define GEN8_3DSTATE_MULTISAMPLE_header \
3118 .CommandType = 3, \
3119 .CommandSubType = 3, \
3120 ._3DCommandOpcode = 0, \
3121 ._3DCommandSubOpcode = 13, \
3122 .DwordLength = 0
3123
3124 struct GEN8_3DSTATE_MULTISAMPLE {
3125 uint32_t CommandType;
3126 uint32_t CommandSubType;
3127 uint32_t _3DCommandOpcode;
3128 uint32_t _3DCommandSubOpcode;
3129 uint32_t DwordLength;
3130 uint32_t PixelPositionOffsetEnable;
3131 #define CENTER 0
3132 #define UL_CORNER 1
3133 uint32_t PixelLocation;
3134 uint32_t NumberofMultisamples;
3135 };
3136
3137 static inline void
3138 GEN8_3DSTATE_MULTISAMPLE_pack(__gen_user_data *data, void * restrict dst,
3139 const struct GEN8_3DSTATE_MULTISAMPLE * restrict values)
3140 {
3141 uint32_t *dw = (uint32_t * restrict) dst;
3142
3143 dw[0] =
3144 __gen_field(values->CommandType, 29, 31) |
3145 __gen_field(values->CommandSubType, 27, 28) |
3146 __gen_field(values->_3DCommandOpcode, 24, 26) |
3147 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3148 __gen_field(values->DwordLength, 0, 7) |
3149 0;
3150
3151 dw[1] =
3152 __gen_field(values->PixelPositionOffsetEnable, 5, 5) |
3153 __gen_field(values->PixelLocation, 4, 4) |
3154 __gen_field(values->NumberofMultisamples, 1, 3) |
3155 0;
3156
3157 }
3158
3159 #define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_length 0x00000002
3160 #define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_length_bias 0x00000002
3161 #define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_header \
3162 .CommandType = 3, \
3163 .CommandSubType = 3, \
3164 ._3DCommandOpcode = 1, \
3165 ._3DCommandSubOpcode = 6, \
3166 .DwordLength = 0
3167
3168 struct GEN8_3DSTATE_POLY_STIPPLE_OFFSET {
3169 uint32_t CommandType;
3170 uint32_t CommandSubType;
3171 uint32_t _3DCommandOpcode;
3172 uint32_t _3DCommandSubOpcode;
3173 uint32_t DwordLength;
3174 uint32_t PolygonStippleXOffset;
3175 uint32_t PolygonStippleYOffset;
3176 };
3177
3178 static inline void
3179 GEN8_3DSTATE_POLY_STIPPLE_OFFSET_pack(__gen_user_data *data, void * restrict dst,
3180 const struct GEN8_3DSTATE_POLY_STIPPLE_OFFSET * restrict values)
3181 {
3182 uint32_t *dw = (uint32_t * restrict) dst;
3183
3184 dw[0] =
3185 __gen_field(values->CommandType, 29, 31) |
3186 __gen_field(values->CommandSubType, 27, 28) |
3187 __gen_field(values->_3DCommandOpcode, 24, 26) |
3188 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3189 __gen_field(values->DwordLength, 0, 7) |
3190 0;
3191
3192 dw[1] =
3193 __gen_field(values->PolygonStippleXOffset, 8, 12) |
3194 __gen_field(values->PolygonStippleYOffset, 0, 4) |
3195 0;
3196
3197 }
3198
3199 #define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_length 0x00000021
3200 #define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_length_bias 0x00000002
3201 #define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_header\
3202 .CommandType = 3, \
3203 .CommandSubType = 3, \
3204 ._3DCommandOpcode = 1, \
3205 ._3DCommandSubOpcode = 7, \
3206 .DwordLength = 31
3207
3208 struct GEN8_3DSTATE_POLY_STIPPLE_PATTERN {
3209 uint32_t CommandType;
3210 uint32_t CommandSubType;
3211 uint32_t _3DCommandOpcode;
3212 uint32_t _3DCommandSubOpcode;
3213 uint32_t DwordLength;
3214 uint32_t PatternRow[32];
3215 };
3216
3217 static inline void
3218 GEN8_3DSTATE_POLY_STIPPLE_PATTERN_pack(__gen_user_data *data, void * restrict dst,
3219 const struct GEN8_3DSTATE_POLY_STIPPLE_PATTERN * restrict values)
3220 {
3221 uint32_t *dw = (uint32_t * restrict) dst;
3222
3223 dw[0] =
3224 __gen_field(values->CommandType, 29, 31) |
3225 __gen_field(values->CommandSubType, 27, 28) |
3226 __gen_field(values->_3DCommandOpcode, 24, 26) |
3227 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3228 __gen_field(values->DwordLength, 0, 7) |
3229 0;
3230
3231 for (uint32_t i = 0, j = 1; i < 32; i += 1, j++) {
3232 dw[j] =
3233 __gen_field(values->PatternRow[i + 0], 0, 31) |
3234 0;
3235 }
3236
3237 }
3238
3239 #define GEN8_3DSTATE_PS_length 0x0000000c
3240 #define GEN8_3DSTATE_PS_length_bias 0x00000002
3241 #define GEN8_3DSTATE_PS_header \
3242 .CommandType = 3, \
3243 .CommandSubType = 3, \
3244 ._3DCommandOpcode = 0, \
3245 ._3DCommandSubOpcode = 32, \
3246 .DwordLength = 10
3247
3248 struct GEN8_3DSTATE_PS {
3249 uint32_t CommandType;
3250 uint32_t CommandSubType;
3251 uint32_t _3DCommandOpcode;
3252 uint32_t _3DCommandSubOpcode;
3253 uint32_t DwordLength;
3254 uint64_t KernelStartPointer0;
3255 #define Multiple 0
3256 #define Single 1
3257 uint32_t SingleProgramFlow;
3258 #define Dmask 0
3259 #define Vmask 1
3260 uint32_t VectorMaskEnable;
3261 #define NoSamplers 0
3262 #define _14Samplers 1
3263 #define _58Samplers 2
3264 #define _912Samplers 3
3265 #define _1316Samplers 4
3266 uint32_t SamplerCount;
3267 #define FlushedtoZero 0
3268 #define Retained 1
3269 uint32_t SinglePrecisionDenormalMode;
3270 uint32_t BindingTableEntryCount;
3271 #define Normal 0
3272 #define High 1
3273 uint32_t ThreadDispatchPriority;
3274 #define IEEE754 0
3275 #define Alternate 1
3276 uint32_t FloatingPointMode;
3277 #define RTNE 0
3278 #define RU 1
3279 #define RD 2
3280 #define RTZ 3
3281 uint32_t RoundingMode;
3282 bool IllegalOpcodeExceptionEnable;
3283 bool MaskStackExceptionEnable;
3284 bool SoftwareExceptionEnable;
3285 uint64_t ScratchSpaceBasePointer;
3286 uint32_t PerThreadScratchSpace;
3287 uint32_t MaximumNumberofThreadsPerPSD;
3288 bool PushConstantEnable;
3289 bool RenderTargetFastClearEnable;
3290 bool RenderTargetResolveEnable;
3291 #define POSOFFSET_NONE 0
3292 #define POSOFFSET_CENTROID 2
3293 #define POSOFFSET_SAMPLE 3
3294 uint32_t PositionXYOffsetSelect;
3295 bool _32PixelDispatchEnable;
3296 bool _16PixelDispatchEnable;
3297 bool _8PixelDispatchEnable;
3298 uint32_t DispatchGRFStartRegisterForConstantSetupData0;
3299 uint32_t DispatchGRFStartRegisterForConstantSetupData1;
3300 uint32_t DispatchGRFStartRegisterForConstantSetupData2;
3301 uint64_t KernelStartPointer1;
3302 uint64_t KernelStartPointer2;
3303 };
3304
3305 static inline void
3306 GEN8_3DSTATE_PS_pack(__gen_user_data *data, void * restrict dst,
3307 const struct GEN8_3DSTATE_PS * restrict values)
3308 {
3309 uint32_t *dw = (uint32_t * restrict) dst;
3310
3311 dw[0] =
3312 __gen_field(values->CommandType, 29, 31) |
3313 __gen_field(values->CommandSubType, 27, 28) |
3314 __gen_field(values->_3DCommandOpcode, 24, 26) |
3315 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3316 __gen_field(values->DwordLength, 0, 7) |
3317 0;
3318
3319 uint64_t qw1 =
3320 __gen_offset(values->KernelStartPointer0, 6, 63) |
3321 0;
3322
3323 dw[1] = qw1;
3324 dw[2] = qw1 >> 32;
3325
3326 dw[3] =
3327 __gen_field(values->SingleProgramFlow, 31, 31) |
3328 __gen_field(values->VectorMaskEnable, 30, 30) |
3329 __gen_field(values->SamplerCount, 27, 29) |
3330 __gen_field(values->SinglePrecisionDenormalMode, 26, 26) |
3331 __gen_field(values->BindingTableEntryCount, 18, 25) |
3332 __gen_field(values->ThreadDispatchPriority, 17, 17) |
3333 __gen_field(values->FloatingPointMode, 16, 16) |
3334 __gen_field(values->RoundingMode, 14, 15) |
3335 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
3336 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
3337 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
3338 0;
3339
3340 uint64_t qw4 =
3341 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
3342 __gen_field(values->PerThreadScratchSpace, 0, 3) |
3343 0;
3344
3345 dw[4] = qw4;
3346 dw[5] = qw4 >> 32;
3347
3348 dw[6] =
3349 __gen_field(values->MaximumNumberofThreadsPerPSD, 23, 31) |
3350 __gen_field(values->PushConstantEnable, 11, 11) |
3351 __gen_field(values->RenderTargetFastClearEnable, 8, 8) |
3352 __gen_field(values->RenderTargetResolveEnable, 6, 6) |
3353 __gen_field(values->PositionXYOffsetSelect, 3, 4) |
3354 __gen_field(values->_32PixelDispatchEnable, 2, 2) |
3355 __gen_field(values->_16PixelDispatchEnable, 1, 1) |
3356 __gen_field(values->_8PixelDispatchEnable, 0, 0) |
3357 0;
3358
3359 dw[7] =
3360 __gen_field(values->DispatchGRFStartRegisterForConstantSetupData0, 16, 22) |
3361 __gen_field(values->DispatchGRFStartRegisterForConstantSetupData1, 8, 14) |
3362 __gen_field(values->DispatchGRFStartRegisterForConstantSetupData2, 0, 6) |
3363 0;
3364
3365 uint64_t qw8 =
3366 __gen_offset(values->KernelStartPointer1, 6, 63) |
3367 0;
3368
3369 dw[8] = qw8;
3370 dw[9] = qw8 >> 32;
3371
3372 uint64_t qw10 =
3373 __gen_offset(values->KernelStartPointer2, 6, 63) |
3374 0;
3375
3376 dw[10] = qw10;
3377 dw[11] = qw10 >> 32;
3378
3379 }
3380
3381 #define GEN8_3DSTATE_PS_BLEND_length 0x00000002
3382 #define GEN8_3DSTATE_PS_BLEND_length_bias 0x00000002
3383 #define GEN8_3DSTATE_PS_BLEND_header \
3384 .CommandType = 3, \
3385 .CommandSubType = 3, \
3386 ._3DCommandOpcode = 0, \
3387 ._3DCommandSubOpcode = 77, \
3388 .DwordLength = 0
3389
3390 struct GEN8_3DSTATE_PS_BLEND {
3391 uint32_t CommandType;
3392 uint32_t CommandSubType;
3393 uint32_t _3DCommandOpcode;
3394 uint32_t _3DCommandSubOpcode;
3395 uint32_t DwordLength;
3396 bool AlphaToCoverageEnable;
3397 bool HasWriteableRT;
3398 bool ColorBufferBlendEnable;
3399 uint32_t SourceAlphaBlendFactor;
3400 uint32_t DestinationAlphaBlendFactor;
3401 uint32_t SourceBlendFactor;
3402 uint32_t DestinationBlendFactor;
3403 bool AlphaTestEnable;
3404 bool IndependentAlphaBlendEnable;
3405 };
3406
3407 static inline void
3408 GEN8_3DSTATE_PS_BLEND_pack(__gen_user_data *data, void * restrict dst,
3409 const struct GEN8_3DSTATE_PS_BLEND * restrict values)
3410 {
3411 uint32_t *dw = (uint32_t * restrict) dst;
3412
3413 dw[0] =
3414 __gen_field(values->CommandType, 29, 31) |
3415 __gen_field(values->CommandSubType, 27, 28) |
3416 __gen_field(values->_3DCommandOpcode, 24, 26) |
3417 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3418 __gen_field(values->DwordLength, 0, 7) |
3419 0;
3420
3421 dw[1] =
3422 __gen_field(values->AlphaToCoverageEnable, 31, 31) |
3423 __gen_field(values->HasWriteableRT, 30, 30) |
3424 __gen_field(values->ColorBufferBlendEnable, 29, 29) |
3425 __gen_field(values->SourceAlphaBlendFactor, 24, 28) |
3426 __gen_field(values->DestinationAlphaBlendFactor, 19, 23) |
3427 __gen_field(values->SourceBlendFactor, 14, 18) |
3428 __gen_field(values->DestinationBlendFactor, 9, 13) |
3429 __gen_field(values->AlphaTestEnable, 8, 8) |
3430 __gen_field(values->IndependentAlphaBlendEnable, 7, 7) |
3431 0;
3432
3433 }
3434
3435 #define GEN8_3DSTATE_PS_EXTRA_length 0x00000002
3436 #define GEN8_3DSTATE_PS_EXTRA_length_bias 0x00000002
3437 #define GEN8_3DSTATE_PS_EXTRA_header \
3438 .CommandType = 3, \
3439 .CommandSubType = 3, \
3440 ._3DCommandOpcode = 0, \
3441 ._3DCommandSubOpcode = 79, \
3442 .DwordLength = 0
3443
3444 struct GEN8_3DSTATE_PS_EXTRA {
3445 uint32_t CommandType;
3446 uint32_t CommandSubType;
3447 uint32_t _3DCommandOpcode;
3448 uint32_t _3DCommandSubOpcode;
3449 uint32_t DwordLength;
3450 bool PixelShaderValid;
3451 bool PixelShaderDoesnotwritetoRT;
3452 bool oMaskPresenttoRenderTarget;
3453 bool PixelShaderKillsPixel;
3454 #define PSCDEPTH_OFF 0
3455 #define PSCDEPTH_ON 1
3456 #define PSCDEPTH_ON_GE 2
3457 #define PSCDEPTH_ON_LE 3
3458 uint32_t PixelShaderComputedDepthMode;
3459 bool ForceComputedDepth;
3460 bool PixelShaderUsesSourceDepth;
3461 bool PixelShaderUsesSourceW;
3462 uint32_t Removed;
3463 bool AttributeEnable;
3464 bool PixelShaderDisablesAlphaToCoverage;
3465 bool PixelShaderIsPerSample;
3466 bool PixelShaderHasUAV;
3467 bool PixelShaderUsesInputCoverageMask;
3468 };
3469
3470 static inline void
3471 GEN8_3DSTATE_PS_EXTRA_pack(__gen_user_data *data, void * restrict dst,
3472 const struct GEN8_3DSTATE_PS_EXTRA * restrict values)
3473 {
3474 uint32_t *dw = (uint32_t * restrict) dst;
3475
3476 dw[0] =
3477 __gen_field(values->CommandType, 29, 31) |
3478 __gen_field(values->CommandSubType, 27, 28) |
3479 __gen_field(values->_3DCommandOpcode, 24, 26) |
3480 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3481 __gen_field(values->DwordLength, 0, 7) |
3482 0;
3483
3484 dw[1] =
3485 __gen_field(values->PixelShaderValid, 31, 31) |
3486 __gen_field(values->PixelShaderDoesnotwritetoRT, 30, 30) |
3487 __gen_field(values->oMaskPresenttoRenderTarget, 29, 29) |
3488 __gen_field(values->PixelShaderKillsPixel, 28, 28) |
3489 __gen_field(values->PixelShaderComputedDepthMode, 26, 27) |
3490 __gen_field(values->ForceComputedDepth, 25, 25) |
3491 __gen_field(values->PixelShaderUsesSourceDepth, 24, 24) |
3492 __gen_field(values->PixelShaderUsesSourceW, 23, 23) |
3493 __gen_field(values->Removed, 17, 17) |
3494 __gen_field(values->AttributeEnable, 8, 8) |
3495 __gen_field(values->PixelShaderDisablesAlphaToCoverage, 7, 7) |
3496 __gen_field(values->PixelShaderIsPerSample, 6, 6) |
3497 __gen_field(values->PixelShaderHasUAV, 2, 2) |
3498 __gen_field(values->PixelShaderUsesInputCoverageMask, 1, 1) |
3499 0;
3500
3501 }
3502
3503 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length 0x00000002
3504 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length_bias 0x00000002
3505 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_header\
3506 .CommandType = 3, \
3507 .CommandSubType = 3, \
3508 ._3DCommandOpcode = 1, \
3509 ._3DCommandSubOpcode = 20, \
3510 .DwordLength = 0
3511
3512 struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS {
3513 uint32_t CommandType;
3514 uint32_t CommandSubType;
3515 uint32_t _3DCommandOpcode;
3516 uint32_t _3DCommandSubOpcode;
3517 uint32_t DwordLength;
3518 uint32_t ConstantBufferOffset;
3519 uint32_t ConstantBufferSize;
3520 };
3521
3522 static inline void
3523 GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_pack(__gen_user_data *data, void * restrict dst,
3524 const struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS * restrict values)
3525 {
3526 uint32_t *dw = (uint32_t * restrict) dst;
3527
3528 dw[0] =
3529 __gen_field(values->CommandType, 29, 31) |
3530 __gen_field(values->CommandSubType, 27, 28) |
3531 __gen_field(values->_3DCommandOpcode, 24, 26) |
3532 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3533 __gen_field(values->DwordLength, 0, 7) |
3534 0;
3535
3536 dw[1] =
3537 __gen_field(values->ConstantBufferOffset, 16, 20) |
3538 __gen_field(values->ConstantBufferSize, 0, 5) |
3539 0;
3540
3541 }
3542
3543 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length 0x00000002
3544 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length_bias 0x00000002
3545 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_header\
3546 .CommandType = 3, \
3547 .CommandSubType = 3, \
3548 ._3DCommandOpcode = 1, \
3549 ._3DCommandSubOpcode = 21, \
3550 .DwordLength = 0
3551
3552 struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS {
3553 uint32_t CommandType;
3554 uint32_t CommandSubType;
3555 uint32_t _3DCommandOpcode;
3556 uint32_t _3DCommandSubOpcode;
3557 uint32_t DwordLength;
3558 uint32_t ConstantBufferOffset;
3559 uint32_t ConstantBufferSize;
3560 };
3561
3562 static inline void
3563 GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_pack(__gen_user_data *data, void * restrict dst,
3564 const struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS * restrict values)
3565 {
3566 uint32_t *dw = (uint32_t * restrict) dst;
3567
3568 dw[0] =
3569 __gen_field(values->CommandType, 29, 31) |
3570 __gen_field(values->CommandSubType, 27, 28) |
3571 __gen_field(values->_3DCommandOpcode, 24, 26) |
3572 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3573 __gen_field(values->DwordLength, 0, 7) |
3574 0;
3575
3576 dw[1] =
3577 __gen_field(values->ConstantBufferOffset, 16, 20) |
3578 __gen_field(values->ConstantBufferSize, 0, 5) |
3579 0;
3580
3581 }
3582
3583 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length 0x00000002
3584 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length_bias 0x00000002
3585 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_header\
3586 .CommandType = 3, \
3587 .CommandSubType = 3, \
3588 ._3DCommandOpcode = 1, \
3589 ._3DCommandSubOpcode = 19, \
3590 .DwordLength = 0
3591
3592 struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS {
3593 uint32_t CommandType;
3594 uint32_t CommandSubType;
3595 uint32_t _3DCommandOpcode;
3596 uint32_t _3DCommandSubOpcode;
3597 uint32_t DwordLength;
3598 uint32_t ConstantBufferOffset;
3599 uint32_t ConstantBufferSize;
3600 };
3601
3602 static inline void
3603 GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_pack(__gen_user_data *data, void * restrict dst,
3604 const struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS * restrict values)
3605 {
3606 uint32_t *dw = (uint32_t * restrict) dst;
3607
3608 dw[0] =
3609 __gen_field(values->CommandType, 29, 31) |
3610 __gen_field(values->CommandSubType, 27, 28) |
3611 __gen_field(values->_3DCommandOpcode, 24, 26) |
3612 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3613 __gen_field(values->DwordLength, 0, 7) |
3614 0;
3615
3616 dw[1] =
3617 __gen_field(values->ConstantBufferOffset, 16, 20) |
3618 __gen_field(values->ConstantBufferSize, 0, 5) |
3619 0;
3620
3621 }
3622
3623 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length 0x00000002
3624 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length_bias 0x00000002
3625 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_header\
3626 .CommandType = 3, \
3627 .CommandSubType = 3, \
3628 ._3DCommandOpcode = 1, \
3629 ._3DCommandSubOpcode = 22, \
3630 .DwordLength = 0
3631
3632 struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS {
3633 uint32_t CommandType;
3634 uint32_t CommandSubType;
3635 uint32_t _3DCommandOpcode;
3636 uint32_t _3DCommandSubOpcode;
3637 uint32_t DwordLength;
3638 uint32_t ConstantBufferOffset;
3639 uint32_t ConstantBufferSize;
3640 };
3641
3642 static inline void
3643 GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_pack(__gen_user_data *data, void * restrict dst,
3644 const struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS * restrict values)
3645 {
3646 uint32_t *dw = (uint32_t * restrict) dst;
3647
3648 dw[0] =
3649 __gen_field(values->CommandType, 29, 31) |
3650 __gen_field(values->CommandSubType, 27, 28) |
3651 __gen_field(values->_3DCommandOpcode, 24, 26) |
3652 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3653 __gen_field(values->DwordLength, 0, 7) |
3654 0;
3655
3656 dw[1] =
3657 __gen_field(values->ConstantBufferOffset, 16, 20) |
3658 __gen_field(values->ConstantBufferSize, 0, 5) |
3659 0;
3660
3661 }
3662
3663 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length 0x00000002
3664 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length_bias 0x00000002
3665 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_header\
3666 .CommandType = 3, \
3667 .CommandSubType = 3, \
3668 ._3DCommandOpcode = 1, \
3669 ._3DCommandSubOpcode = 18, \
3670 .DwordLength = 0
3671
3672 struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS {
3673 uint32_t CommandType;
3674 uint32_t CommandSubType;
3675 uint32_t _3DCommandOpcode;
3676 uint32_t _3DCommandSubOpcode;
3677 uint32_t DwordLength;
3678 uint32_t ConstantBufferOffset;
3679 uint32_t ConstantBufferSize;
3680 };
3681
3682 static inline void
3683 GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_pack(__gen_user_data *data, void * restrict dst,
3684 const struct GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS * restrict values)
3685 {
3686 uint32_t *dw = (uint32_t * restrict) dst;
3687
3688 dw[0] =
3689 __gen_field(values->CommandType, 29, 31) |
3690 __gen_field(values->CommandSubType, 27, 28) |
3691 __gen_field(values->_3DCommandOpcode, 24, 26) |
3692 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3693 __gen_field(values->DwordLength, 0, 7) |
3694 0;
3695
3696 dw[1] =
3697 __gen_field(values->ConstantBufferOffset, 16, 20) |
3698 __gen_field(values->ConstantBufferSize, 0, 5) |
3699 0;
3700
3701 }
3702
3703 #define GEN8_3DSTATE_RASTER_length 0x00000005
3704 #define GEN8_3DSTATE_RASTER_length_bias 0x00000002
3705 #define GEN8_3DSTATE_RASTER_header \
3706 .CommandType = 3, \
3707 .CommandSubType = 3, \
3708 ._3DCommandOpcode = 0, \
3709 ._3DCommandSubOpcode = 80, \
3710 .DwordLength = 3
3711
3712 struct GEN8_3DSTATE_RASTER {
3713 uint32_t CommandType;
3714 uint32_t CommandSubType;
3715 uint32_t _3DCommandOpcode;
3716 uint32_t _3DCommandSubOpcode;
3717 uint32_t DwordLength;
3718 #define DX9OGL 0
3719 #define DX100 1
3720 #define DX101 2
3721 uint32_t APIMode;
3722 #define Clockwise 0
3723 #define CounterClockwise 1
3724 uint32_t FrontWinding;
3725 #define FSC_NUMRASTSAMPLES_0 0
3726 #define FSC_NUMRASTSAMPLES_1 1
3727 #define FSC_NUMRASTSAMPLES_2 2
3728 #define FSC_NUMRASTSAMPLES_4 3
3729 #define FSC_NUMRASTSAMPLES_8 4
3730 #define FSC_NUMRASTSAMPLES_16 5
3731 uint32_t ForcedSampleCount;
3732 #define CULLMODE_BOTH 0
3733 #define CULLMODE_NONE 1
3734 #define CULLMODE_FRONT 2
3735 #define CULLMODE_BACK 3
3736 uint32_t CullMode;
3737 #define Normal 0
3738 #define Force 1
3739 uint32_t ForceMultisampling;
3740 bool SmoothPointEnable;
3741 bool DXMultisampleRasterizationEnable;
3742 #define MSRASTMODE_OFF_PIXEL 0
3743 #define MSRASTMODE_OFF_PATTERN 1
3744 #define MSRASTMODE_ON_PIXEL 2
3745 #define MSRASTMODE_ON_PATTERN 3
3746 uint32_t DXMultisampleRasterizationMode;
3747 bool GlobalDepthOffsetEnableSolid;
3748 bool GlobalDepthOffsetEnableWireframe;
3749 bool GlobalDepthOffsetEnablePoint;
3750 #define RASTER_SOLID 0
3751 #define RASTER_WIREFRAME 1
3752 #define RASTER_POINT 2
3753 uint32_t FrontFaceFillMode;
3754 #define RASTER_SOLID 0
3755 #define RASTER_WIREFRAME 1
3756 #define RASTER_POINT 2
3757 uint32_t BackFaceFillMode;
3758 bool AntialiasingEnable;
3759 bool ScissorRectangleEnable;
3760 bool ViewportZClipTestEnable;
3761 float GlobalDepthOffsetConstant;
3762 float GlobalDepthOffsetScale;
3763 float GlobalDepthOffsetClamp;
3764 };
3765
3766 static inline void
3767 GEN8_3DSTATE_RASTER_pack(__gen_user_data *data, void * restrict dst,
3768 const struct GEN8_3DSTATE_RASTER * restrict values)
3769 {
3770 uint32_t *dw = (uint32_t * restrict) dst;
3771
3772 dw[0] =
3773 __gen_field(values->CommandType, 29, 31) |
3774 __gen_field(values->CommandSubType, 27, 28) |
3775 __gen_field(values->_3DCommandOpcode, 24, 26) |
3776 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3777 __gen_field(values->DwordLength, 0, 7) |
3778 0;
3779
3780 dw[1] =
3781 __gen_field(values->APIMode, 22, 23) |
3782 __gen_field(values->FrontWinding, 21, 21) |
3783 __gen_field(values->ForcedSampleCount, 18, 20) |
3784 __gen_field(values->CullMode, 16, 17) |
3785 __gen_field(values->ForceMultisampling, 14, 14) |
3786 __gen_field(values->SmoothPointEnable, 13, 13) |
3787 __gen_field(values->DXMultisampleRasterizationEnable, 12, 12) |
3788 __gen_field(values->DXMultisampleRasterizationMode, 10, 11) |
3789 __gen_field(values->GlobalDepthOffsetEnableSolid, 9, 9) |
3790 __gen_field(values->GlobalDepthOffsetEnableWireframe, 8, 8) |
3791 __gen_field(values->GlobalDepthOffsetEnablePoint, 7, 7) |
3792 __gen_field(values->FrontFaceFillMode, 5, 6) |
3793 __gen_field(values->BackFaceFillMode, 3, 4) |
3794 __gen_field(values->AntialiasingEnable, 2, 2) |
3795 __gen_field(values->ScissorRectangleEnable, 1, 1) |
3796 __gen_field(values->ViewportZClipTestEnable, 0, 0) |
3797 0;
3798
3799 dw[2] =
3800 __gen_float(values->GlobalDepthOffsetConstant) |
3801 0;
3802
3803 dw[3] =
3804 __gen_float(values->GlobalDepthOffsetScale) |
3805 0;
3806
3807 dw[4] =
3808 __gen_float(values->GlobalDepthOffsetClamp) |
3809 0;
3810
3811 }
3812
3813 #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_length_bias 0x00000002
3814 #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_header\
3815 .CommandType = 3, \
3816 .CommandSubType = 3, \
3817 ._3DCommandOpcode = 1, \
3818 ._3DCommandSubOpcode = 2
3819
3820 struct GEN8_PALETTE_ENTRY {
3821 uint32_t Alpha;
3822 uint32_t Red;
3823 uint32_t Green;
3824 uint32_t Blue;
3825 };
3826
3827 static inline void
3828 GEN8_PALETTE_ENTRY_pack(__gen_user_data *data, void * restrict dst,
3829 const struct GEN8_PALETTE_ENTRY * restrict values)
3830 {
3831 uint32_t *dw = (uint32_t * restrict) dst;
3832
3833 dw[0] =
3834 __gen_field(values->Alpha, 24, 31) |
3835 __gen_field(values->Red, 16, 23) |
3836 __gen_field(values->Green, 8, 15) |
3837 __gen_field(values->Blue, 0, 7) |
3838 0;
3839
3840 }
3841
3842 struct GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0 {
3843 uint32_t CommandType;
3844 uint32_t CommandSubType;
3845 uint32_t _3DCommandOpcode;
3846 uint32_t _3DCommandSubOpcode;
3847 uint32_t DwordLength;
3848 /* variable length fields follow */
3849 };
3850
3851 static inline void
3852 GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_pack(__gen_user_data *data, void * restrict dst,
3853 const struct GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0 * restrict values)
3854 {
3855 uint32_t *dw = (uint32_t * restrict) dst;
3856
3857 dw[0] =
3858 __gen_field(values->CommandType, 29, 31) |
3859 __gen_field(values->CommandSubType, 27, 28) |
3860 __gen_field(values->_3DCommandOpcode, 24, 26) |
3861 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3862 __gen_field(values->DwordLength, 0, 7) |
3863 0;
3864
3865 /* variable length fields follow */
3866 }
3867
3868 #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_length_bias 0x00000002
3869 #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_header\
3870 .CommandType = 3, \
3871 .CommandSubType = 3, \
3872 ._3DCommandOpcode = 1, \
3873 ._3DCommandSubOpcode = 12
3874
3875 struct GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1 {
3876 uint32_t CommandType;
3877 uint32_t CommandSubType;
3878 uint32_t _3DCommandOpcode;
3879 uint32_t _3DCommandSubOpcode;
3880 uint32_t DwordLength;
3881 /* variable length fields follow */
3882 };
3883
3884 static inline void
3885 GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_pack(__gen_user_data *data, void * restrict dst,
3886 const struct GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1 * restrict values)
3887 {
3888 uint32_t *dw = (uint32_t * restrict) dst;
3889
3890 dw[0] =
3891 __gen_field(values->CommandType, 29, 31) |
3892 __gen_field(values->CommandSubType, 27, 28) |
3893 __gen_field(values->_3DCommandOpcode, 24, 26) |
3894 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3895 __gen_field(values->DwordLength, 0, 7) |
3896 0;
3897
3898 /* variable length fields follow */
3899 }
3900
3901 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_length 0x00000002
3902 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_length_bias 0x00000002
3903 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_header\
3904 .CommandType = 3, \
3905 .CommandSubType = 3, \
3906 ._3DCommandOpcode = 0, \
3907 ._3DCommandSubOpcode = 45, \
3908 .DwordLength = 0
3909
3910 struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS {
3911 uint32_t CommandType;
3912 uint32_t CommandSubType;
3913 uint32_t _3DCommandOpcode;
3914 uint32_t _3DCommandSubOpcode;
3915 uint32_t DwordLength;
3916 uint32_t PointertoDSSamplerState;
3917 };
3918
3919 static inline void
3920 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
3921 const struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS * restrict values)
3922 {
3923 uint32_t *dw = (uint32_t * restrict) dst;
3924
3925 dw[0] =
3926 __gen_field(values->CommandType, 29, 31) |
3927 __gen_field(values->CommandSubType, 27, 28) |
3928 __gen_field(values->_3DCommandOpcode, 24, 26) |
3929 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3930 __gen_field(values->DwordLength, 0, 7) |
3931 0;
3932
3933 dw[1] =
3934 __gen_offset(values->PointertoDSSamplerState, 5, 31) |
3935 0;
3936
3937 }
3938
3939 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_length 0x00000002
3940 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_length_bias 0x00000002
3941 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_header\
3942 .CommandType = 3, \
3943 .CommandSubType = 3, \
3944 ._3DCommandOpcode = 0, \
3945 ._3DCommandSubOpcode = 46, \
3946 .DwordLength = 0
3947
3948 struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS {
3949 uint32_t CommandType;
3950 uint32_t CommandSubType;
3951 uint32_t _3DCommandOpcode;
3952 uint32_t _3DCommandSubOpcode;
3953 uint32_t DwordLength;
3954 uint32_t PointertoGSSamplerState;
3955 };
3956
3957 static inline void
3958 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
3959 const struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS * restrict values)
3960 {
3961 uint32_t *dw = (uint32_t * restrict) dst;
3962
3963 dw[0] =
3964 __gen_field(values->CommandType, 29, 31) |
3965 __gen_field(values->CommandSubType, 27, 28) |
3966 __gen_field(values->_3DCommandOpcode, 24, 26) |
3967 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3968 __gen_field(values->DwordLength, 0, 7) |
3969 0;
3970
3971 dw[1] =
3972 __gen_offset(values->PointertoGSSamplerState, 5, 31) |
3973 0;
3974
3975 }
3976
3977 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_length 0x00000002
3978 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_length_bias 0x00000002
3979 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_header\
3980 .CommandType = 3, \
3981 .CommandSubType = 3, \
3982 ._3DCommandOpcode = 0, \
3983 ._3DCommandSubOpcode = 44, \
3984 .DwordLength = 0
3985
3986 struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS {
3987 uint32_t CommandType;
3988 uint32_t CommandSubType;
3989 uint32_t _3DCommandOpcode;
3990 uint32_t _3DCommandSubOpcode;
3991 uint32_t DwordLength;
3992 uint32_t PointertoHSSamplerState;
3993 };
3994
3995 static inline void
3996 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
3997 const struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS * restrict values)
3998 {
3999 uint32_t *dw = (uint32_t * restrict) dst;
4000
4001 dw[0] =
4002 __gen_field(values->CommandType, 29, 31) |
4003 __gen_field(values->CommandSubType, 27, 28) |
4004 __gen_field(values->_3DCommandOpcode, 24, 26) |
4005 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4006 __gen_field(values->DwordLength, 0, 7) |
4007 0;
4008
4009 dw[1] =
4010 __gen_offset(values->PointertoHSSamplerState, 5, 31) |
4011 0;
4012
4013 }
4014
4015 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_length 0x00000002
4016 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_length_bias 0x00000002
4017 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_header\
4018 .CommandType = 3, \
4019 .CommandSubType = 3, \
4020 ._3DCommandOpcode = 0, \
4021 ._3DCommandSubOpcode = 47, \
4022 .DwordLength = 0
4023
4024 struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS {
4025 uint32_t CommandType;
4026 uint32_t CommandSubType;
4027 uint32_t _3DCommandOpcode;
4028 uint32_t _3DCommandSubOpcode;
4029 uint32_t DwordLength;
4030 uint32_t PointertoPSSamplerState;
4031 };
4032
4033 static inline void
4034 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
4035 const struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS * restrict values)
4036 {
4037 uint32_t *dw = (uint32_t * restrict) dst;
4038
4039 dw[0] =
4040 __gen_field(values->CommandType, 29, 31) |
4041 __gen_field(values->CommandSubType, 27, 28) |
4042 __gen_field(values->_3DCommandOpcode, 24, 26) |
4043 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4044 __gen_field(values->DwordLength, 0, 7) |
4045 0;
4046
4047 dw[1] =
4048 __gen_offset(values->PointertoPSSamplerState, 5, 31) |
4049 0;
4050
4051 }
4052
4053 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_length 0x00000002
4054 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_length_bias 0x00000002
4055 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_header\
4056 .CommandType = 3, \
4057 .CommandSubType = 3, \
4058 ._3DCommandOpcode = 0, \
4059 ._3DCommandSubOpcode = 43, \
4060 .DwordLength = 0
4061
4062 struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS {
4063 uint32_t CommandType;
4064 uint32_t CommandSubType;
4065 uint32_t _3DCommandOpcode;
4066 uint32_t _3DCommandSubOpcode;
4067 uint32_t DwordLength;
4068 uint32_t PointertoVSSamplerState;
4069 };
4070
4071 static inline void
4072 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
4073 const struct GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS * restrict values)
4074 {
4075 uint32_t *dw = (uint32_t * restrict) dst;
4076
4077 dw[0] =
4078 __gen_field(values->CommandType, 29, 31) |
4079 __gen_field(values->CommandSubType, 27, 28) |
4080 __gen_field(values->_3DCommandOpcode, 24, 26) |
4081 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4082 __gen_field(values->DwordLength, 0, 7) |
4083 0;
4084
4085 dw[1] =
4086 __gen_offset(values->PointertoVSSamplerState, 5, 31) |
4087 0;
4088
4089 }
4090
4091 #define GEN8_3DSTATE_SAMPLE_MASK_length 0x00000002
4092 #define GEN8_3DSTATE_SAMPLE_MASK_length_bias 0x00000002
4093 #define GEN8_3DSTATE_SAMPLE_MASK_header \
4094 .CommandType = 3, \
4095 .CommandSubType = 3, \
4096 ._3DCommandOpcode = 0, \
4097 ._3DCommandSubOpcode = 24, \
4098 .DwordLength = 0
4099
4100 struct GEN8_3DSTATE_SAMPLE_MASK {
4101 uint32_t CommandType;
4102 uint32_t CommandSubType;
4103 uint32_t _3DCommandOpcode;
4104 uint32_t _3DCommandSubOpcode;
4105 uint32_t DwordLength;
4106 uint32_t SampleMask;
4107 };
4108
4109 static inline void
4110 GEN8_3DSTATE_SAMPLE_MASK_pack(__gen_user_data *data, void * restrict dst,
4111 const struct GEN8_3DSTATE_SAMPLE_MASK * restrict values)
4112 {
4113 uint32_t *dw = (uint32_t * restrict) dst;
4114
4115 dw[0] =
4116 __gen_field(values->CommandType, 29, 31) |
4117 __gen_field(values->CommandSubType, 27, 28) |
4118 __gen_field(values->_3DCommandOpcode, 24, 26) |
4119 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4120 __gen_field(values->DwordLength, 0, 7) |
4121 0;
4122
4123 dw[1] =
4124 __gen_field(values->SampleMask, 0, 15) |
4125 0;
4126
4127 }
4128
4129 #define GEN8_3DSTATE_SAMPLE_PATTERN_length 0x00000009
4130 #define GEN8_3DSTATE_SAMPLE_PATTERN_length_bias 0x00000002
4131 #define GEN8_3DSTATE_SAMPLE_PATTERN_header \
4132 .CommandType = 3, \
4133 .CommandSubType = 3, \
4134 ._3DCommandOpcode = 1, \
4135 ._3DCommandSubOpcode = 28, \
4136 .DwordLength = 7
4137
4138 struct GEN8_3DSTATE_SAMPLE_PATTERN {
4139 uint32_t CommandType;
4140 uint32_t CommandSubType;
4141 uint32_t _3DCommandOpcode;
4142 uint32_t _3DCommandSubOpcode;
4143 uint32_t DwordLength;
4144 float _8xSample7XOffset;
4145 float _8xSample7YOffset;
4146 float _8xSample6XOffset;
4147 float _8xSample6YOffset;
4148 float _8xSample5XOffset;
4149 float _8xSample5YOffset;
4150 float _8xSample4XOffset;
4151 float _8xSample4YOffset;
4152 float _8xSample3XOffset;
4153 float _8xSample3YOffset;
4154 float _8xSample2XOffset;
4155 float _8xSample2YOffset;
4156 float _8xSample1XOffset;
4157 float _8xSample1YOffset;
4158 float _8xSample0XOffset;
4159 float _8xSample0YOffset;
4160 float _4xSample3XOffset;
4161 float _4xSample3YOffset;
4162 float _4xSample2XOffset;
4163 float _4xSample2YOffset;
4164 float _4xSample1XOffset;
4165 float _4xSample1YOffset;
4166 float _4xSample0XOffset;
4167 float _4xSample0YOffset;
4168 float _1xSample0XOffset;
4169 float _1xSample0YOffset;
4170 float _2xSample1XOffset;
4171 float _2xSample1YOffset;
4172 float _2xSample0XOffset;
4173 float _2xSample0YOffset;
4174 };
4175
4176 static inline void
4177 GEN8_3DSTATE_SAMPLE_PATTERN_pack(__gen_user_data *data, void * restrict dst,
4178 const struct GEN8_3DSTATE_SAMPLE_PATTERN * restrict values)
4179 {
4180 uint32_t *dw = (uint32_t * restrict) dst;
4181
4182 dw[0] =
4183 __gen_field(values->CommandType, 29, 31) |
4184 __gen_field(values->CommandSubType, 27, 28) |
4185 __gen_field(values->_3DCommandOpcode, 24, 26) |
4186 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4187 __gen_field(values->DwordLength, 0, 7) |
4188 0;
4189
4190 for (uint32_t i = 0, j = 1; i < 4; i += 1, j++) {
4191 dw[j] =
4192 0;
4193 }
4194
4195 dw[5] =
4196 __gen_field(values->_8xSample7XOffset * (1 << 4), 28, 31) |
4197 __gen_field(values->_8xSample7YOffset * (1 << 4), 24, 27) |
4198 __gen_field(values->_8xSample6XOffset * (1 << 4), 20, 23) |
4199 __gen_field(values->_8xSample6YOffset * (1 << 4), 16, 19) |
4200 __gen_field(values->_8xSample5XOffset * (1 << 4), 12, 15) |
4201 __gen_field(values->_8xSample5YOffset * (1 << 4), 8, 11) |
4202 __gen_field(values->_8xSample4XOffset * (1 << 4), 4, 7) |
4203 __gen_field(values->_8xSample4YOffset * (1 << 4), 0, 3) |
4204 0;
4205
4206 dw[6] =
4207 __gen_field(values->_8xSample3XOffset * (1 << 4), 28, 31) |
4208 __gen_field(values->_8xSample3YOffset * (1 << 4), 24, 27) |
4209 __gen_field(values->_8xSample2XOffset * (1 << 4), 20, 23) |
4210 __gen_field(values->_8xSample2YOffset * (1 << 4), 16, 19) |
4211 __gen_field(values->_8xSample1XOffset * (1 << 4), 12, 15) |
4212 __gen_field(values->_8xSample1YOffset * (1 << 4), 8, 11) |
4213 __gen_field(values->_8xSample0XOffset * (1 << 4), 4, 7) |
4214 __gen_field(values->_8xSample0YOffset * (1 << 4), 0, 3) |
4215 0;
4216
4217 dw[7] =
4218 __gen_field(values->_4xSample3XOffset * (1 << 4), 28, 31) |
4219 __gen_field(values->_4xSample3YOffset * (1 << 4), 24, 27) |
4220 __gen_field(values->_4xSample2XOffset * (1 << 4), 20, 23) |
4221 __gen_field(values->_4xSample2YOffset * (1 << 4), 16, 19) |
4222 __gen_field(values->_4xSample1XOffset * (1 << 4), 12, 15) |
4223 __gen_field(values->_4xSample1YOffset * (1 << 4), 8, 11) |
4224 __gen_field(values->_4xSample0XOffset * (1 << 4), 4, 7) |
4225 __gen_field(values->_4xSample0YOffset * (1 << 4), 0, 3) |
4226 0;
4227
4228 dw[8] =
4229 __gen_field(values->_1xSample0XOffset * (1 << 4), 20, 23) |
4230 __gen_field(values->_1xSample0YOffset * (1 << 4), 16, 19) |
4231 __gen_field(values->_2xSample1XOffset * (1 << 4), 12, 15) |
4232 __gen_field(values->_2xSample1YOffset * (1 << 4), 8, 11) |
4233 __gen_field(values->_2xSample0XOffset * (1 << 4), 4, 7) |
4234 __gen_field(values->_2xSample0YOffset * (1 << 4), 0, 3) |
4235 0;
4236
4237 }
4238
4239 #define GEN8_3DSTATE_SBE_length 0x00000004
4240 #define GEN8_3DSTATE_SBE_length_bias 0x00000002
4241 #define GEN8_3DSTATE_SBE_header \
4242 .CommandType = 3, \
4243 .CommandSubType = 3, \
4244 ._3DCommandOpcode = 0, \
4245 ._3DCommandSubOpcode = 31, \
4246 .DwordLength = 2
4247
4248 struct GEN8_3DSTATE_SBE {
4249 uint32_t CommandType;
4250 uint32_t CommandSubType;
4251 uint32_t _3DCommandOpcode;
4252 uint32_t _3DCommandSubOpcode;
4253 uint32_t DwordLength;
4254 bool ForceVertexURBEntryReadLength;
4255 bool ForceVertexURBEntryReadOffset;
4256 uint32_t NumberofSFOutputAttributes;
4257 bool AttributeSwizzleEnable;
4258 #define UPPERLEFT 0
4259 #define LOWERLEFT 1
4260 uint32_t PointSpriteTextureCoordinateOrigin;
4261 bool PrimitiveIDOverrideComponentW;
4262 bool PrimitiveIDOverrideComponentZ;
4263 bool PrimitiveIDOverrideComponentY;
4264 bool PrimitiveIDOverrideComponentX;
4265 uint32_t VertexURBEntryReadLength;
4266 uint32_t VertexURBEntryReadOffset;
4267 uint32_t PrimitiveIDOverrideAttributeSelect;
4268 uint32_t PointSpriteTextureCoordinateEnable;
4269 uint32_t ConstantInterpolationEnable;
4270 };
4271
4272 static inline void
4273 GEN8_3DSTATE_SBE_pack(__gen_user_data *data, void * restrict dst,
4274 const struct GEN8_3DSTATE_SBE * restrict values)
4275 {
4276 uint32_t *dw = (uint32_t * restrict) dst;
4277
4278 dw[0] =
4279 __gen_field(values->CommandType, 29, 31) |
4280 __gen_field(values->CommandSubType, 27, 28) |
4281 __gen_field(values->_3DCommandOpcode, 24, 26) |
4282 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4283 __gen_field(values->DwordLength, 0, 7) |
4284 0;
4285
4286 dw[1] =
4287 __gen_field(values->ForceVertexURBEntryReadLength, 29, 29) |
4288 __gen_field(values->ForceVertexURBEntryReadOffset, 28, 28) |
4289 __gen_field(values->NumberofSFOutputAttributes, 22, 27) |
4290 __gen_field(values->AttributeSwizzleEnable, 21, 21) |
4291 __gen_field(values->PointSpriteTextureCoordinateOrigin, 20, 20) |
4292 __gen_field(values->PrimitiveIDOverrideComponentW, 19, 19) |
4293 __gen_field(values->PrimitiveIDOverrideComponentZ, 18, 18) |
4294 __gen_field(values->PrimitiveIDOverrideComponentY, 17, 17) |
4295 __gen_field(values->PrimitiveIDOverrideComponentX, 16, 16) |
4296 __gen_field(values->VertexURBEntryReadLength, 11, 15) |
4297 __gen_field(values->VertexURBEntryReadOffset, 5, 10) |
4298 __gen_field(values->PrimitiveIDOverrideAttributeSelect, 0, 4) |
4299 0;
4300
4301 dw[2] =
4302 __gen_field(values->PointSpriteTextureCoordinateEnable, 0, 31) |
4303 0;
4304
4305 dw[3] =
4306 __gen_field(values->ConstantInterpolationEnable, 0, 31) |
4307 0;
4308
4309 }
4310
4311 #define GEN8_3DSTATE_SBE_SWIZ_length 0x0000000b
4312 #define GEN8_3DSTATE_SBE_SWIZ_length_bias 0x00000002
4313 #define GEN8_3DSTATE_SBE_SWIZ_header \
4314 .CommandType = 3, \
4315 .CommandSubType = 3, \
4316 ._3DCommandOpcode = 0, \
4317 ._3DCommandSubOpcode = 81, \
4318 .DwordLength = 9
4319
4320 struct GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL {
4321 bool ComponentOverrideW;
4322 bool ComponentOverrideZ;
4323 bool ComponentOverrideY;
4324 bool ComponentOverrideX;
4325 uint32_t SwizzleControlMode;
4326 #define CONST_0000 0
4327 #define CONST_0001_FLOAT 1
4328 #define CONST_1111_FLOAT 2
4329 #define PRIM_ID 3
4330 uint32_t ConstantSource;
4331 #define INPUTATTR 0
4332 #define INPUTATTR_FACING 1
4333 #define INPUTATTR_W 2
4334 #define INPUTATTR_FACING_W 3
4335 uint32_t SwizzleSelect;
4336 uint32_t SourceAttribute;
4337 };
4338
4339 static inline void
4340 GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(__gen_user_data *data, void * restrict dst,
4341 const struct GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL * restrict values)
4342 {
4343 uint32_t *dw = (uint32_t * restrict) dst;
4344
4345 dw[0] =
4346 __gen_field(values->ComponentOverrideW, 15, 15) |
4347 __gen_field(values->ComponentOverrideZ, 14, 14) |
4348 __gen_field(values->ComponentOverrideY, 13, 13) |
4349 __gen_field(values->ComponentOverrideX, 12, 12) |
4350 __gen_field(values->SwizzleControlMode, 11, 11) |
4351 __gen_field(values->ConstantSource, 9, 10) |
4352 __gen_field(values->SwizzleSelect, 6, 7) |
4353 __gen_field(values->SourceAttribute, 0, 4) |
4354 0;
4355
4356 }
4357
4358 struct GEN8_3DSTATE_SBE_SWIZ {
4359 uint32_t CommandType;
4360 uint32_t CommandSubType;
4361 uint32_t _3DCommandOpcode;
4362 uint32_t _3DCommandSubOpcode;
4363 uint32_t DwordLength;
4364 struct GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL Attribute[16];
4365 uint32_t AttributeWrapShortestEnables[16];
4366 };
4367
4368 static inline void
4369 GEN8_3DSTATE_SBE_SWIZ_pack(__gen_user_data *data, void * restrict dst,
4370 const struct GEN8_3DSTATE_SBE_SWIZ * restrict values)
4371 {
4372 uint32_t *dw = (uint32_t * restrict) dst;
4373
4374 dw[0] =
4375 __gen_field(values->CommandType, 29, 31) |
4376 __gen_field(values->CommandSubType, 27, 28) |
4377 __gen_field(values->_3DCommandOpcode, 24, 26) |
4378 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4379 __gen_field(values->DwordLength, 0, 7) |
4380 0;
4381
4382 for (uint32_t i = 0, j = 1; i < 16; i += 2, j++) {
4383 uint32_t dw_Attribute0;
4384 GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &dw_Attribute0, &values->Attribute[i + 0]);
4385 uint32_t dw_Attribute1;
4386 GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &dw_Attribute1, &values->Attribute[i + 1]);
4387 dw[j] =
4388 __gen_field(dw_Attribute0, 0, 15) |
4389 __gen_field(dw_Attribute1, 16, 31) |
4390 0;
4391 }
4392
4393 for (uint32_t i = 0, j = 9; i < 16; i += 8, j++) {
4394 dw[j] =
4395 __gen_field(values->AttributeWrapShortestEnables[i + 0], 0, 3) |
4396 __gen_field(values->AttributeWrapShortestEnables[i + 1], 4, 7) |
4397 __gen_field(values->AttributeWrapShortestEnables[i + 2], 8, 11) |
4398 __gen_field(values->AttributeWrapShortestEnables[i + 3], 12, 15) |
4399 __gen_field(values->AttributeWrapShortestEnables[i + 4], 16, 19) |
4400 __gen_field(values->AttributeWrapShortestEnables[i + 5], 20, 23) |
4401 __gen_field(values->AttributeWrapShortestEnables[i + 6], 24, 27) |
4402 __gen_field(values->AttributeWrapShortestEnables[i + 7], 28, 31) |
4403 0;
4404 }
4405
4406 }
4407
4408 #define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_length 0x00000002
4409 #define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_length_bias 0x00000002
4410 #define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_header\
4411 .CommandType = 3, \
4412 .CommandSubType = 3, \
4413 ._3DCommandOpcode = 0, \
4414 ._3DCommandSubOpcode = 15, \
4415 .DwordLength = 0
4416
4417 struct GEN8_3DSTATE_SCISSOR_STATE_POINTERS {
4418 uint32_t CommandType;
4419 uint32_t CommandSubType;
4420 uint32_t _3DCommandOpcode;
4421 uint32_t _3DCommandSubOpcode;
4422 uint32_t DwordLength;
4423 uint32_t ScissorRectPointer;
4424 };
4425
4426 static inline void
4427 GEN8_3DSTATE_SCISSOR_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
4428 const struct GEN8_3DSTATE_SCISSOR_STATE_POINTERS * restrict values)
4429 {
4430 uint32_t *dw = (uint32_t * restrict) dst;
4431
4432 dw[0] =
4433 __gen_field(values->CommandType, 29, 31) |
4434 __gen_field(values->CommandSubType, 27, 28) |
4435 __gen_field(values->_3DCommandOpcode, 24, 26) |
4436 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4437 __gen_field(values->DwordLength, 0, 7) |
4438 0;
4439
4440 dw[1] =
4441 __gen_offset(values->ScissorRectPointer, 5, 31) |
4442 0;
4443
4444 }
4445
4446 #define GEN8_3DSTATE_SF_length 0x00000004
4447 #define GEN8_3DSTATE_SF_length_bias 0x00000002
4448 #define GEN8_3DSTATE_SF_header \
4449 .CommandType = 3, \
4450 .CommandSubType = 3, \
4451 ._3DCommandOpcode = 0, \
4452 ._3DCommandSubOpcode = 19, \
4453 .DwordLength = 2
4454
4455 struct GEN8_3DSTATE_SF {
4456 uint32_t CommandType;
4457 uint32_t CommandSubType;
4458 uint32_t _3DCommandOpcode;
4459 uint32_t _3DCommandSubOpcode;
4460 uint32_t DwordLength;
4461 bool LegacyGlobalDepthBiasEnable;
4462 bool StatisticsEnable;
4463 bool ViewportTransformEnable;
4464 float LineWidth;
4465 #define _05pixels 0
4466 #define _10pixels 1
4467 #define _20pixels 2
4468 #define _40pixels 3
4469 uint32_t LineEndCapAntialiasingRegionWidth;
4470 bool LastPixelEnable;
4471 uint32_t TriangleStripListProvokingVertexSelect;
4472 uint32_t LineStripListProvokingVertexSelect;
4473 uint32_t TriangleFanProvokingVertexSelect;
4474 #define AALINEDISTANCE_TRUE 1
4475 uint32_t AALineDistanceMode;
4476 bool SmoothPointEnable;
4477 uint32_t VertexSubPixelPrecisionSelect;
4478 #define Vertex 0
4479 #define State 1
4480 uint32_t PointWidthSource;
4481 float PointWidth;
4482 };
4483
4484 static inline void
4485 GEN8_3DSTATE_SF_pack(__gen_user_data *data, void * restrict dst,
4486 const struct GEN8_3DSTATE_SF * restrict values)
4487 {
4488 uint32_t *dw = (uint32_t * restrict) dst;
4489
4490 dw[0] =
4491 __gen_field(values->CommandType, 29, 31) |
4492 __gen_field(values->CommandSubType, 27, 28) |
4493 __gen_field(values->_3DCommandOpcode, 24, 26) |
4494 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4495 __gen_field(values->DwordLength, 0, 7) |
4496 0;
4497
4498 dw[1] =
4499 __gen_field(values->LegacyGlobalDepthBiasEnable, 11, 11) |
4500 __gen_field(values->StatisticsEnable, 10, 10) |
4501 __gen_field(values->ViewportTransformEnable, 1, 1) |
4502 0;
4503
4504 dw[2] =
4505 __gen_field(values->LineWidth * (1 << 7), 18, 27) |
4506 __gen_field(values->LineEndCapAntialiasingRegionWidth, 16, 17) |
4507 0;
4508
4509 dw[3] =
4510 __gen_field(values->LastPixelEnable, 31, 31) |
4511 __gen_field(values->TriangleStripListProvokingVertexSelect, 29, 30) |
4512 __gen_field(values->LineStripListProvokingVertexSelect, 27, 28) |
4513 __gen_field(values->TriangleFanProvokingVertexSelect, 25, 26) |
4514 __gen_field(values->AALineDistanceMode, 14, 14) |
4515 __gen_field(values->SmoothPointEnable, 13, 13) |
4516 __gen_field(values->VertexSubPixelPrecisionSelect, 12, 12) |
4517 __gen_field(values->PointWidthSource, 11, 11) |
4518 __gen_field(values->PointWidth * (1 << 3), 0, 10) |
4519 0;
4520
4521 }
4522
4523 #define GEN8_3DSTATE_SO_BUFFER_length 0x00000008
4524 #define GEN8_3DSTATE_SO_BUFFER_length_bias 0x00000002
4525 #define GEN8_3DSTATE_SO_BUFFER_header \
4526 .CommandType = 3, \
4527 .CommandSubType = 3, \
4528 ._3DCommandOpcode = 1, \
4529 ._3DCommandSubOpcode = 24, \
4530 .DwordLength = 6
4531
4532 struct GEN8_3DSTATE_SO_BUFFER {
4533 uint32_t CommandType;
4534 uint32_t CommandSubType;
4535 uint32_t _3DCommandOpcode;
4536 uint32_t _3DCommandSubOpcode;
4537 uint32_t DwordLength;
4538 bool SOBufferEnable;
4539 uint32_t SOBufferIndex;
4540 struct GEN8_MEMORY_OBJECT_CONTROL_STATE SOBufferObjectControlState;
4541 bool StreamOffsetWriteEnable;
4542 bool StreamOutputBufferOffsetAddressEnable;
4543 __gen_address_type SurfaceBaseAddress;
4544 uint32_t SurfaceSize;
4545 __gen_address_type StreamOutputBufferOffsetAddress;
4546 uint32_t StreamOffset;
4547 };
4548
4549 static inline void
4550 GEN8_3DSTATE_SO_BUFFER_pack(__gen_user_data *data, void * restrict dst,
4551 const struct GEN8_3DSTATE_SO_BUFFER * restrict values)
4552 {
4553 uint32_t *dw = (uint32_t * restrict) dst;
4554
4555 dw[0] =
4556 __gen_field(values->CommandType, 29, 31) |
4557 __gen_field(values->CommandSubType, 27, 28) |
4558 __gen_field(values->_3DCommandOpcode, 24, 26) |
4559 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4560 __gen_field(values->DwordLength, 0, 7) |
4561 0;
4562
4563 uint32_t dw_SOBufferObjectControlState;
4564 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SOBufferObjectControlState, &values->SOBufferObjectControlState);
4565 dw[1] =
4566 __gen_field(values->SOBufferEnable, 31, 31) |
4567 __gen_field(values->SOBufferIndex, 29, 30) |
4568 __gen_field(dw_SOBufferObjectControlState, 22, 28) |
4569 __gen_field(values->StreamOffsetWriteEnable, 21, 21) |
4570 __gen_field(values->StreamOutputBufferOffsetAddressEnable, 20, 20) |
4571 0;
4572
4573 uint32_t dw2 =
4574 0;
4575
4576 uint64_t qw2 =
4577 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
4578
4579 dw[2] = qw2;
4580 dw[3] = qw2 >> 32;
4581
4582 dw[4] =
4583 __gen_field(values->SurfaceSize, 0, 29) |
4584 0;
4585
4586 uint32_t dw5 =
4587 0;
4588
4589 uint64_t qw5 =
4590 __gen_combine_address(data, &dw[5], values->StreamOutputBufferOffsetAddress, dw5);
4591
4592 dw[5] = qw5;
4593 dw[6] = qw5 >> 32;
4594
4595 dw[7] =
4596 __gen_field(values->StreamOffset, 0, 31) |
4597 0;
4598
4599 }
4600
4601 #define GEN8_3DSTATE_SO_DECL_LIST_length_bias 0x00000002
4602 #define GEN8_3DSTATE_SO_DECL_LIST_header \
4603 .CommandType = 3, \
4604 .CommandSubType = 3, \
4605 ._3DCommandOpcode = 1, \
4606 ._3DCommandSubOpcode = 23
4607
4608 struct GEN8_SO_DECL {
4609 uint32_t OutputBufferSlot;
4610 uint32_t HoleFlag;
4611 uint32_t RegisterIndex;
4612 uint32_t ComponentMask;
4613 };
4614
4615 static inline void
4616 GEN8_SO_DECL_pack(__gen_user_data *data, void * restrict dst,
4617 const struct GEN8_SO_DECL * restrict values)
4618 {
4619 uint32_t *dw = (uint32_t * restrict) dst;
4620
4621 dw[0] =
4622 __gen_field(values->OutputBufferSlot, 12, 13) |
4623 __gen_field(values->HoleFlag, 11, 11) |
4624 __gen_field(values->RegisterIndex, 4, 9) |
4625 __gen_field(values->ComponentMask, 0, 3) |
4626 0;
4627
4628 }
4629
4630 struct GEN8_SO_DECL_ENTRY {
4631 struct GEN8_SO_DECL Stream3Decl;
4632 struct GEN8_SO_DECL Stream2Decl;
4633 struct GEN8_SO_DECL Stream1Decl;
4634 struct GEN8_SO_DECL Stream0Decl;
4635 };
4636
4637 static inline void
4638 GEN8_SO_DECL_ENTRY_pack(__gen_user_data *data, void * restrict dst,
4639 const struct GEN8_SO_DECL_ENTRY * restrict values)
4640 {
4641 uint32_t *dw = (uint32_t * restrict) dst;
4642
4643 uint32_t dw_Stream3Decl;
4644 GEN8_SO_DECL_pack(data, &dw_Stream3Decl, &values->Stream3Decl);
4645 uint32_t dw_Stream2Decl;
4646 GEN8_SO_DECL_pack(data, &dw_Stream2Decl, &values->Stream2Decl);
4647 uint32_t dw_Stream1Decl;
4648 GEN8_SO_DECL_pack(data, &dw_Stream1Decl, &values->Stream1Decl);
4649 uint32_t dw_Stream0Decl;
4650 GEN8_SO_DECL_pack(data, &dw_Stream0Decl, &values->Stream0Decl);
4651 uint64_t qw0 =
4652 __gen_field(dw_Stream3Decl, 48, 63) |
4653 __gen_field(dw_Stream2Decl, 32, 47) |
4654 __gen_field(dw_Stream1Decl, 16, 31) |
4655 __gen_field(dw_Stream0Decl, 0, 15) |
4656 0;
4657
4658 dw[0] = qw0;
4659 dw[1] = qw0 >> 32;
4660
4661 }
4662
4663 struct GEN8_3DSTATE_SO_DECL_LIST {
4664 uint32_t CommandType;
4665 uint32_t CommandSubType;
4666 uint32_t _3DCommandOpcode;
4667 uint32_t _3DCommandSubOpcode;
4668 uint32_t DwordLength;
4669 uint32_t StreamtoBufferSelects3;
4670 uint32_t StreamtoBufferSelects2;
4671 uint32_t StreamtoBufferSelects1;
4672 uint32_t StreamtoBufferSelects0;
4673 uint32_t NumEntries3;
4674 uint32_t NumEntries2;
4675 uint32_t NumEntries1;
4676 uint32_t NumEntries0;
4677 /* variable length fields follow */
4678 };
4679
4680 static inline void
4681 GEN8_3DSTATE_SO_DECL_LIST_pack(__gen_user_data *data, void * restrict dst,
4682 const struct GEN8_3DSTATE_SO_DECL_LIST * restrict values)
4683 {
4684 uint32_t *dw = (uint32_t * restrict) dst;
4685
4686 dw[0] =
4687 __gen_field(values->CommandType, 29, 31) |
4688 __gen_field(values->CommandSubType, 27, 28) |
4689 __gen_field(values->_3DCommandOpcode, 24, 26) |
4690 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4691 __gen_field(values->DwordLength, 0, 8) |
4692 0;
4693
4694 dw[1] =
4695 __gen_field(values->StreamtoBufferSelects3, 12, 15) |
4696 __gen_field(values->StreamtoBufferSelects2, 8, 11) |
4697 __gen_field(values->StreamtoBufferSelects1, 4, 7) |
4698 __gen_field(values->StreamtoBufferSelects0, 0, 3) |
4699 0;
4700
4701 dw[2] =
4702 __gen_field(values->NumEntries3, 24, 31) |
4703 __gen_field(values->NumEntries2, 16, 23) |
4704 __gen_field(values->NumEntries1, 8, 15) |
4705 __gen_field(values->NumEntries0, 0, 7) |
4706 0;
4707
4708 /* variable length fields follow */
4709 }
4710
4711 #define GEN8_3DSTATE_STENCIL_BUFFER_length 0x00000005
4712 #define GEN8_3DSTATE_STENCIL_BUFFER_length_bias 0x00000002
4713 #define GEN8_3DSTATE_STENCIL_BUFFER_header \
4714 .CommandType = 3, \
4715 .CommandSubType = 3, \
4716 ._3DCommandOpcode = 0, \
4717 ._3DCommandSubOpcode = 6, \
4718 .DwordLength = 3
4719
4720 struct GEN8_3DSTATE_STENCIL_BUFFER {
4721 uint32_t CommandType;
4722 uint32_t CommandSubType;
4723 uint32_t _3DCommandOpcode;
4724 uint32_t _3DCommandSubOpcode;
4725 uint32_t DwordLength;
4726 uint32_t StencilBufferEnable;
4727 struct GEN8_MEMORY_OBJECT_CONTROL_STATE StencilBufferObjectControlState;
4728 uint32_t SurfacePitch;
4729 __gen_address_type SurfaceBaseAddress;
4730 uint32_t SurfaceQPitch;
4731 };
4732
4733 static inline void
4734 GEN8_3DSTATE_STENCIL_BUFFER_pack(__gen_user_data *data, void * restrict dst,
4735 const struct GEN8_3DSTATE_STENCIL_BUFFER * restrict values)
4736 {
4737 uint32_t *dw = (uint32_t * restrict) dst;
4738
4739 dw[0] =
4740 __gen_field(values->CommandType, 29, 31) |
4741 __gen_field(values->CommandSubType, 27, 28) |
4742 __gen_field(values->_3DCommandOpcode, 24, 26) |
4743 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4744 __gen_field(values->DwordLength, 0, 7) |
4745 0;
4746
4747 uint32_t dw_StencilBufferObjectControlState;
4748 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StencilBufferObjectControlState, &values->StencilBufferObjectControlState);
4749 dw[1] =
4750 __gen_field(values->StencilBufferEnable, 31, 31) |
4751 __gen_field(dw_StencilBufferObjectControlState, 22, 28) |
4752 __gen_field(values->SurfacePitch, 0, 16) |
4753 0;
4754
4755 uint32_t dw2 =
4756 0;
4757
4758 uint64_t qw2 =
4759 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
4760
4761 dw[2] = qw2;
4762 dw[3] = qw2 >> 32;
4763
4764 dw[4] =
4765 __gen_field(values->SurfaceQPitch, 0, 14) |
4766 0;
4767
4768 }
4769
4770 #define GEN8_3DSTATE_STREAMOUT_length 0x00000005
4771 #define GEN8_3DSTATE_STREAMOUT_length_bias 0x00000002
4772 #define GEN8_3DSTATE_STREAMOUT_header \
4773 .CommandType = 3, \
4774 .CommandSubType = 3, \
4775 ._3DCommandOpcode = 0, \
4776 ._3DCommandSubOpcode = 30, \
4777 .DwordLength = 3
4778
4779 struct GEN8_3DSTATE_STREAMOUT {
4780 uint32_t CommandType;
4781 uint32_t CommandSubType;
4782 uint32_t _3DCommandOpcode;
4783 uint32_t _3DCommandSubOpcode;
4784 uint32_t DwordLength;
4785 uint32_t SOFunctionEnable;
4786 uint32_t APIRenderingDisable;
4787 uint32_t RenderStreamSelect;
4788 #define LEADING 0
4789 #define TRAILING 1
4790 uint32_t ReorderMode;
4791 bool SOStatisticsEnable;
4792 #define Normal 0
4793 #define Resreved 1
4794 #define Force_Off 2
4795 #define Force_on 3
4796 uint32_t ForceRendering;
4797 uint32_t Stream3VertexReadOffset;
4798 uint32_t Stream3VertexReadLength;
4799 uint32_t Stream2VertexReadOffset;
4800 uint32_t Stream2VertexReadLength;
4801 uint32_t Stream1VertexReadOffset;
4802 uint32_t Stream1VertexReadLength;
4803 uint32_t Stream0VertexReadOffset;
4804 uint32_t Stream0VertexReadLength;
4805 uint32_t Buffer1SurfacePitch;
4806 uint32_t Buffer0SurfacePitch;
4807 uint32_t Buffer3SurfacePitch;
4808 uint32_t Buffer2SurfacePitch;
4809 };
4810
4811 static inline void
4812 GEN8_3DSTATE_STREAMOUT_pack(__gen_user_data *data, void * restrict dst,
4813 const struct GEN8_3DSTATE_STREAMOUT * restrict values)
4814 {
4815 uint32_t *dw = (uint32_t * restrict) dst;
4816
4817 dw[0] =
4818 __gen_field(values->CommandType, 29, 31) |
4819 __gen_field(values->CommandSubType, 27, 28) |
4820 __gen_field(values->_3DCommandOpcode, 24, 26) |
4821 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4822 __gen_field(values->DwordLength, 0, 7) |
4823 0;
4824
4825 dw[1] =
4826 __gen_field(values->SOFunctionEnable, 31, 31) |
4827 __gen_field(values->APIRenderingDisable, 30, 30) |
4828 __gen_field(values->RenderStreamSelect, 27, 28) |
4829 __gen_field(values->ReorderMode, 26, 26) |
4830 __gen_field(values->SOStatisticsEnable, 25, 25) |
4831 __gen_field(values->ForceRendering, 23, 24) |
4832 0;
4833
4834 dw[2] =
4835 __gen_field(values->Stream3VertexReadOffset, 29, 29) |
4836 __gen_field(values->Stream3VertexReadLength, 24, 28) |
4837 __gen_field(values->Stream2VertexReadOffset, 21, 21) |
4838 __gen_field(values->Stream2VertexReadLength, 16, 20) |
4839 __gen_field(values->Stream1VertexReadOffset, 13, 13) |
4840 __gen_field(values->Stream1VertexReadLength, 8, 12) |
4841 __gen_field(values->Stream0VertexReadOffset, 5, 5) |
4842 __gen_field(values->Stream0VertexReadLength, 0, 4) |
4843 0;
4844
4845 dw[3] =
4846 __gen_field(values->Buffer1SurfacePitch, 16, 27) |
4847 __gen_field(values->Buffer0SurfacePitch, 0, 11) |
4848 0;
4849
4850 dw[4] =
4851 __gen_field(values->Buffer3SurfacePitch, 16, 27) |
4852 __gen_field(values->Buffer2SurfacePitch, 0, 11) |
4853 0;
4854
4855 }
4856
4857 #define GEN8_3DSTATE_TE_length 0x00000004
4858 #define GEN8_3DSTATE_TE_length_bias 0x00000002
4859 #define GEN8_3DSTATE_TE_header \
4860 .CommandType = 3, \
4861 .CommandSubType = 3, \
4862 ._3DCommandOpcode = 0, \
4863 ._3DCommandSubOpcode = 28, \
4864 .DwordLength = 2
4865
4866 struct GEN8_3DSTATE_TE {
4867 uint32_t CommandType;
4868 uint32_t CommandSubType;
4869 uint32_t _3DCommandOpcode;
4870 uint32_t _3DCommandSubOpcode;
4871 uint32_t DwordLength;
4872 #define INTEGER 0
4873 #define ODD_FRACTIONAL 1
4874 #define EVEN_FRACTIONAL 2
4875 uint32_t Partitioning;
4876 #define POINT 0
4877 #define OUTPUT_LINE 1
4878 #define OUTPUT_TRI_CW 2
4879 #define OUTPUT_TRI_CCW 3
4880 uint32_t OutputTopology;
4881 #define QUAD 0
4882 #define TRI 1
4883 #define ISOLINE 2
4884 uint32_t TEDomain;
4885 #define HW_TESS 0
4886 #define SW_TESS 1
4887 uint32_t TEMode;
4888 bool TEEnable;
4889 float MaximumTessellationFactorOdd;
4890 float MaximumTessellationFactorNotOdd;
4891 };
4892
4893 static inline void
4894 GEN8_3DSTATE_TE_pack(__gen_user_data *data, void * restrict dst,
4895 const struct GEN8_3DSTATE_TE * restrict values)
4896 {
4897 uint32_t *dw = (uint32_t * restrict) dst;
4898
4899 dw[0] =
4900 __gen_field(values->CommandType, 29, 31) |
4901 __gen_field(values->CommandSubType, 27, 28) |
4902 __gen_field(values->_3DCommandOpcode, 24, 26) |
4903 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4904 __gen_field(values->DwordLength, 0, 7) |
4905 0;
4906
4907 dw[1] =
4908 __gen_field(values->Partitioning, 12, 13) |
4909 __gen_field(values->OutputTopology, 8, 9) |
4910 __gen_field(values->TEDomain, 4, 5) |
4911 __gen_field(values->TEMode, 1, 2) |
4912 __gen_field(values->TEEnable, 0, 0) |
4913 0;
4914
4915 dw[2] =
4916 __gen_float(values->MaximumTessellationFactorOdd) |
4917 0;
4918
4919 dw[3] =
4920 __gen_float(values->MaximumTessellationFactorNotOdd) |
4921 0;
4922
4923 }
4924
4925 #define GEN8_3DSTATE_URB_DS_length 0x00000002
4926 #define GEN8_3DSTATE_URB_DS_length_bias 0x00000002
4927 #define GEN8_3DSTATE_URB_DS_header \
4928 .CommandType = 3, \
4929 .CommandSubType = 3, \
4930 ._3DCommandOpcode = 0, \
4931 ._3DCommandSubOpcode = 50, \
4932 .DwordLength = 0
4933
4934 struct GEN8_3DSTATE_URB_DS {
4935 uint32_t CommandType;
4936 uint32_t CommandSubType;
4937 uint32_t _3DCommandOpcode;
4938 uint32_t _3DCommandSubOpcode;
4939 uint32_t DwordLength;
4940 uint32_t DSURBStartingAddress;
4941 uint32_t DSURBEntryAllocationSize;
4942 uint32_t DSNumberofURBEntries;
4943 };
4944
4945 static inline void
4946 GEN8_3DSTATE_URB_DS_pack(__gen_user_data *data, void * restrict dst,
4947 const struct GEN8_3DSTATE_URB_DS * restrict values)
4948 {
4949 uint32_t *dw = (uint32_t * restrict) dst;
4950
4951 dw[0] =
4952 __gen_field(values->CommandType, 29, 31) |
4953 __gen_field(values->CommandSubType, 27, 28) |
4954 __gen_field(values->_3DCommandOpcode, 24, 26) |
4955 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4956 __gen_field(values->DwordLength, 0, 7) |
4957 0;
4958
4959 dw[1] =
4960 __gen_field(values->DSURBStartingAddress, 25, 31) |
4961 __gen_field(values->DSURBEntryAllocationSize, 16, 24) |
4962 __gen_field(values->DSNumberofURBEntries, 0, 15) |
4963 0;
4964
4965 }
4966
4967 #define GEN8_3DSTATE_URB_GS_length 0x00000002
4968 #define GEN8_3DSTATE_URB_GS_length_bias 0x00000002
4969 #define GEN8_3DSTATE_URB_GS_header \
4970 .CommandType = 3, \
4971 .CommandSubType = 3, \
4972 ._3DCommandOpcode = 0, \
4973 ._3DCommandSubOpcode = 51, \
4974 .DwordLength = 0
4975
4976 struct GEN8_3DSTATE_URB_GS {
4977 uint32_t CommandType;
4978 uint32_t CommandSubType;
4979 uint32_t _3DCommandOpcode;
4980 uint32_t _3DCommandSubOpcode;
4981 uint32_t DwordLength;
4982 uint32_t GSURBStartingAddress;
4983 uint32_t GSURBEntryAllocationSize;
4984 uint32_t GSNumberofURBEntries;
4985 };
4986
4987 static inline void
4988 GEN8_3DSTATE_URB_GS_pack(__gen_user_data *data, void * restrict dst,
4989 const struct GEN8_3DSTATE_URB_GS * restrict values)
4990 {
4991 uint32_t *dw = (uint32_t * restrict) dst;
4992
4993 dw[0] =
4994 __gen_field(values->CommandType, 29, 31) |
4995 __gen_field(values->CommandSubType, 27, 28) |
4996 __gen_field(values->_3DCommandOpcode, 24, 26) |
4997 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4998 __gen_field(values->DwordLength, 0, 7) |
4999 0;
5000
5001 dw[1] =
5002 __gen_field(values->GSURBStartingAddress, 25, 31) |
5003 __gen_field(values->GSURBEntryAllocationSize, 16, 24) |
5004 __gen_field(values->GSNumberofURBEntries, 0, 15) |
5005 0;
5006
5007 }
5008
5009 #define GEN8_3DSTATE_URB_HS_length 0x00000002
5010 #define GEN8_3DSTATE_URB_HS_length_bias 0x00000002
5011 #define GEN8_3DSTATE_URB_HS_header \
5012 .CommandType = 3, \
5013 .CommandSubType = 3, \
5014 ._3DCommandOpcode = 0, \
5015 ._3DCommandSubOpcode = 49, \
5016 .DwordLength = 0
5017
5018 struct GEN8_3DSTATE_URB_HS {
5019 uint32_t CommandType;
5020 uint32_t CommandSubType;
5021 uint32_t _3DCommandOpcode;
5022 uint32_t _3DCommandSubOpcode;
5023 uint32_t DwordLength;
5024 uint32_t HSURBStartingAddress;
5025 uint32_t HSURBEntryAllocationSize;
5026 uint32_t HSNumberofURBEntries;
5027 };
5028
5029 static inline void
5030 GEN8_3DSTATE_URB_HS_pack(__gen_user_data *data, void * restrict dst,
5031 const struct GEN8_3DSTATE_URB_HS * restrict values)
5032 {
5033 uint32_t *dw = (uint32_t * restrict) dst;
5034
5035 dw[0] =
5036 __gen_field(values->CommandType, 29, 31) |
5037 __gen_field(values->CommandSubType, 27, 28) |
5038 __gen_field(values->_3DCommandOpcode, 24, 26) |
5039 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5040 __gen_field(values->DwordLength, 0, 7) |
5041 0;
5042
5043 dw[1] =
5044 __gen_field(values->HSURBStartingAddress, 25, 31) |
5045 __gen_field(values->HSURBEntryAllocationSize, 16, 24) |
5046 __gen_field(values->HSNumberofURBEntries, 0, 15) |
5047 0;
5048
5049 }
5050
5051 #define GEN8_3DSTATE_VERTEX_BUFFERS_length_bias 0x00000002
5052 #define GEN8_3DSTATE_VERTEX_BUFFERS_header \
5053 .CommandType = 3, \
5054 .CommandSubType = 3, \
5055 ._3DCommandOpcode = 0, \
5056 ._3DCommandSubOpcode = 8
5057
5058 struct GEN8_VERTEX_BUFFER_STATE {
5059 uint32_t VertexBufferIndex;
5060 struct GEN8_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
5061 uint32_t AddressModifyEnable;
5062 bool NullVertexBuffer;
5063 uint32_t BufferPitch;
5064 __gen_address_type BufferStartingAddress;
5065 uint32_t BufferSize;
5066 };
5067
5068 static inline void
5069 GEN8_VERTEX_BUFFER_STATE_pack(__gen_user_data *data, void * restrict dst,
5070 const struct GEN8_VERTEX_BUFFER_STATE * restrict values)
5071 {
5072 uint32_t *dw = (uint32_t * restrict) dst;
5073
5074 uint32_t dw_MemoryObjectControlState;
5075 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
5076 dw[0] =
5077 __gen_field(values->VertexBufferIndex, 26, 31) |
5078 __gen_field(dw_MemoryObjectControlState, 16, 22) |
5079 __gen_field(values->AddressModifyEnable, 14, 14) |
5080 __gen_field(values->NullVertexBuffer, 13, 13) |
5081 __gen_field(values->BufferPitch, 0, 11) |
5082 0;
5083
5084 uint32_t dw1 =
5085 0;
5086
5087 uint64_t qw1 =
5088 __gen_combine_address(data, &dw[1], values->BufferStartingAddress, dw1);
5089
5090 dw[1] = qw1;
5091 dw[2] = qw1 >> 32;
5092
5093 dw[3] =
5094 __gen_field(values->BufferSize, 0, 31) |
5095 0;
5096
5097 }
5098
5099 struct GEN8_3DSTATE_VERTEX_BUFFERS {
5100 uint32_t CommandType;
5101 uint32_t CommandSubType;
5102 uint32_t _3DCommandOpcode;
5103 uint32_t _3DCommandSubOpcode;
5104 uint32_t DwordLength;
5105 /* variable length fields follow */
5106 };
5107
5108 static inline void
5109 GEN8_3DSTATE_VERTEX_BUFFERS_pack(__gen_user_data *data, void * restrict dst,
5110 const struct GEN8_3DSTATE_VERTEX_BUFFERS * restrict values)
5111 {
5112 uint32_t *dw = (uint32_t * restrict) dst;
5113
5114 dw[0] =
5115 __gen_field(values->CommandType, 29, 31) |
5116 __gen_field(values->CommandSubType, 27, 28) |
5117 __gen_field(values->_3DCommandOpcode, 24, 26) |
5118 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5119 __gen_field(values->DwordLength, 0, 7) |
5120 0;
5121
5122 /* variable length fields follow */
5123 }
5124
5125 #define GEN8_3DSTATE_VERTEX_ELEMENTS_length_bias 0x00000002
5126 #define GEN8_3DSTATE_VERTEX_ELEMENTS_header \
5127 .CommandType = 3, \
5128 .CommandSubType = 3, \
5129 ._3DCommandOpcode = 0, \
5130 ._3DCommandSubOpcode = 9
5131
5132 struct GEN8_VERTEX_ELEMENT_STATE {
5133 uint32_t VertexBufferIndex;
5134 bool Valid;
5135 uint32_t SourceElementFormat;
5136 bool EdgeFlagEnable;
5137 uint32_t SourceElementOffset;
5138 uint32_t Component0Control;
5139 uint32_t Component1Control;
5140 uint32_t Component2Control;
5141 uint32_t Component3Control;
5142 };
5143
5144 static inline void
5145 GEN8_VERTEX_ELEMENT_STATE_pack(__gen_user_data *data, void * restrict dst,
5146 const struct GEN8_VERTEX_ELEMENT_STATE * restrict values)
5147 {
5148 uint32_t *dw = (uint32_t * restrict) dst;
5149
5150 dw[0] =
5151 __gen_field(values->VertexBufferIndex, 26, 31) |
5152 __gen_field(values->Valid, 25, 25) |
5153 __gen_field(values->SourceElementFormat, 16, 24) |
5154 __gen_field(values->EdgeFlagEnable, 15, 15) |
5155 __gen_field(values->SourceElementOffset, 0, 11) |
5156 0;
5157
5158 dw[1] =
5159 __gen_field(values->Component0Control, 28, 30) |
5160 __gen_field(values->Component1Control, 24, 26) |
5161 __gen_field(values->Component2Control, 20, 22) |
5162 __gen_field(values->Component3Control, 16, 18) |
5163 0;
5164
5165 }
5166
5167 struct GEN8_3DSTATE_VERTEX_ELEMENTS {
5168 uint32_t CommandType;
5169 uint32_t CommandSubType;
5170 uint32_t _3DCommandOpcode;
5171 uint32_t _3DCommandSubOpcode;
5172 uint32_t DwordLength;
5173 /* variable length fields follow */
5174 };
5175
5176 static inline void
5177 GEN8_3DSTATE_VERTEX_ELEMENTS_pack(__gen_user_data *data, void * restrict dst,
5178 const struct GEN8_3DSTATE_VERTEX_ELEMENTS * restrict values)
5179 {
5180 uint32_t *dw = (uint32_t * restrict) dst;
5181
5182 dw[0] =
5183 __gen_field(values->CommandType, 29, 31) |
5184 __gen_field(values->CommandSubType, 27, 28) |
5185 __gen_field(values->_3DCommandOpcode, 24, 26) |
5186 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5187 __gen_field(values->DwordLength, 0, 7) |
5188 0;
5189
5190 /* variable length fields follow */
5191 }
5192
5193 #define GEN8_3DSTATE_VF_length 0x00000002
5194 #define GEN8_3DSTATE_VF_length_bias 0x00000002
5195 #define GEN8_3DSTATE_VF_header \
5196 .CommandType = 3, \
5197 .CommandSubType = 3, \
5198 ._3DCommandOpcode = 0, \
5199 ._3DCommandSubOpcode = 12, \
5200 .DwordLength = 0
5201
5202 struct GEN8_3DSTATE_VF {
5203 uint32_t CommandType;
5204 uint32_t CommandSubType;
5205 uint32_t _3DCommandOpcode;
5206 uint32_t _3DCommandSubOpcode;
5207 bool IndexedDrawCutIndexEnable;
5208 uint32_t DwordLength;
5209 uint32_t CutIndex;
5210 };
5211
5212 static inline void
5213 GEN8_3DSTATE_VF_pack(__gen_user_data *data, void * restrict dst,
5214 const struct GEN8_3DSTATE_VF * restrict values)
5215 {
5216 uint32_t *dw = (uint32_t * restrict) dst;
5217
5218 dw[0] =
5219 __gen_field(values->CommandType, 29, 31) |
5220 __gen_field(values->CommandSubType, 27, 28) |
5221 __gen_field(values->_3DCommandOpcode, 24, 26) |
5222 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5223 __gen_field(values->IndexedDrawCutIndexEnable, 8, 8) |
5224 __gen_field(values->DwordLength, 0, 7) |
5225 0;
5226
5227 dw[1] =
5228 __gen_field(values->CutIndex, 0, 31) |
5229 0;
5230
5231 }
5232
5233 #define GEN8_3DSTATE_VF_INSTANCING_length 0x00000003
5234 #define GEN8_3DSTATE_VF_INSTANCING_length_bias 0x00000002
5235 #define GEN8_3DSTATE_VF_INSTANCING_header \
5236 .CommandType = 3, \
5237 .CommandSubType = 3, \
5238 ._3DCommandOpcode = 0, \
5239 ._3DCommandSubOpcode = 73, \
5240 .DwordLength = 1
5241
5242 struct GEN8_3DSTATE_VF_INSTANCING {
5243 uint32_t CommandType;
5244 uint32_t CommandSubType;
5245 uint32_t _3DCommandOpcode;
5246 uint32_t _3DCommandSubOpcode;
5247 uint32_t DwordLength;
5248 bool InstancingEnable;
5249 uint32_t VertexElementIndex;
5250 uint32_t InstanceDataStepRate;
5251 };
5252
5253 static inline void
5254 GEN8_3DSTATE_VF_INSTANCING_pack(__gen_user_data *data, void * restrict dst,
5255 const struct GEN8_3DSTATE_VF_INSTANCING * restrict values)
5256 {
5257 uint32_t *dw = (uint32_t * restrict) dst;
5258
5259 dw[0] =
5260 __gen_field(values->CommandType, 29, 31) |
5261 __gen_field(values->CommandSubType, 27, 28) |
5262 __gen_field(values->_3DCommandOpcode, 24, 26) |
5263 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5264 __gen_field(values->DwordLength, 0, 7) |
5265 0;
5266
5267 dw[1] =
5268 __gen_field(values->InstancingEnable, 8, 8) |
5269 __gen_field(values->VertexElementIndex, 0, 5) |
5270 0;
5271
5272 dw[2] =
5273 __gen_field(values->InstanceDataStepRate, 0, 31) |
5274 0;
5275
5276 }
5277
5278 #define GEN8_3DSTATE_VF_SGVS_length 0x00000002
5279 #define GEN8_3DSTATE_VF_SGVS_length_bias 0x00000002
5280 #define GEN8_3DSTATE_VF_SGVS_header \
5281 .CommandType = 3, \
5282 .CommandSubType = 3, \
5283 ._3DCommandOpcode = 0, \
5284 ._3DCommandSubOpcode = 74, \
5285 .DwordLength = 0
5286
5287 struct GEN8_3DSTATE_VF_SGVS {
5288 uint32_t CommandType;
5289 uint32_t CommandSubType;
5290 uint32_t _3DCommandOpcode;
5291 uint32_t _3DCommandSubOpcode;
5292 uint32_t DwordLength;
5293 bool InstanceIDEnable;
5294 #define COMP_0 0
5295 #define COMP_1 1
5296 #define COMP_2 2
5297 #define COMP_3 3
5298 uint32_t InstanceIDComponentNumber;
5299 uint32_t InstanceIDElementOffset;
5300 bool VertexIDEnable;
5301 #define COMP_0 0
5302 #define COMP_1 1
5303 #define COMP_2 2
5304 #define COMP_3 3
5305 uint32_t VertexIDComponentNumber;
5306 uint32_t VertexIDElementOffset;
5307 };
5308
5309 static inline void
5310 GEN8_3DSTATE_VF_SGVS_pack(__gen_user_data *data, void * restrict dst,
5311 const struct GEN8_3DSTATE_VF_SGVS * restrict values)
5312 {
5313 uint32_t *dw = (uint32_t * restrict) dst;
5314
5315 dw[0] =
5316 __gen_field(values->CommandType, 29, 31) |
5317 __gen_field(values->CommandSubType, 27, 28) |
5318 __gen_field(values->_3DCommandOpcode, 24, 26) |
5319 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5320 __gen_field(values->DwordLength, 0, 7) |
5321 0;
5322
5323 dw[1] =
5324 __gen_field(values->InstanceIDEnable, 31, 31) |
5325 __gen_field(values->InstanceIDComponentNumber, 29, 30) |
5326 __gen_field(values->InstanceIDElementOffset, 16, 21) |
5327 __gen_field(values->VertexIDEnable, 15, 15) |
5328 __gen_field(values->VertexIDComponentNumber, 13, 14) |
5329 __gen_field(values->VertexIDElementOffset, 0, 5) |
5330 0;
5331
5332 }
5333
5334 #define GEN8_3DSTATE_VF_STATISTICS_length 0x00000001
5335 #define GEN8_3DSTATE_VF_STATISTICS_length_bias 0x00000001
5336 #define GEN8_3DSTATE_VF_STATISTICS_header \
5337 .CommandType = 3, \
5338 .CommandSubType = 1, \
5339 ._3DCommandOpcode = 0, \
5340 ._3DCommandSubOpcode = 11
5341
5342 struct GEN8_3DSTATE_VF_STATISTICS {
5343 uint32_t CommandType;
5344 uint32_t CommandSubType;
5345 uint32_t _3DCommandOpcode;
5346 uint32_t _3DCommandSubOpcode;
5347 bool StatisticsEnable;
5348 };
5349
5350 static inline void
5351 GEN8_3DSTATE_VF_STATISTICS_pack(__gen_user_data *data, void * restrict dst,
5352 const struct GEN8_3DSTATE_VF_STATISTICS * restrict values)
5353 {
5354 uint32_t *dw = (uint32_t * restrict) dst;
5355
5356 dw[0] =
5357 __gen_field(values->CommandType, 29, 31) |
5358 __gen_field(values->CommandSubType, 27, 28) |
5359 __gen_field(values->_3DCommandOpcode, 24, 26) |
5360 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5361 __gen_field(values->StatisticsEnable, 0, 0) |
5362 0;
5363
5364 }
5365
5366 #define GEN8_3DSTATE_VF_TOPOLOGY_length 0x00000002
5367 #define GEN8_3DSTATE_VF_TOPOLOGY_length_bias 0x00000002
5368 #define GEN8_3DSTATE_VF_TOPOLOGY_header \
5369 .CommandType = 3, \
5370 .CommandSubType = 3, \
5371 ._3DCommandOpcode = 0, \
5372 ._3DCommandSubOpcode = 75, \
5373 .DwordLength = 0
5374
5375 struct GEN8_3DSTATE_VF_TOPOLOGY {
5376 uint32_t CommandType;
5377 uint32_t CommandSubType;
5378 uint32_t _3DCommandOpcode;
5379 uint32_t _3DCommandSubOpcode;
5380 uint32_t DwordLength;
5381 uint32_t PrimitiveTopologyType;
5382 };
5383
5384 static inline void
5385 GEN8_3DSTATE_VF_TOPOLOGY_pack(__gen_user_data *data, void * restrict dst,
5386 const struct GEN8_3DSTATE_VF_TOPOLOGY * restrict values)
5387 {
5388 uint32_t *dw = (uint32_t * restrict) dst;
5389
5390 dw[0] =
5391 __gen_field(values->CommandType, 29, 31) |
5392 __gen_field(values->CommandSubType, 27, 28) |
5393 __gen_field(values->_3DCommandOpcode, 24, 26) |
5394 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5395 __gen_field(values->DwordLength, 0, 7) |
5396 0;
5397
5398 dw[1] =
5399 __gen_field(values->PrimitiveTopologyType, 0, 5) |
5400 0;
5401
5402 }
5403
5404 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length 0x00000002
5405 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length_bias 0x00000002
5406 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_header\
5407 .CommandType = 3, \
5408 .CommandSubType = 3, \
5409 ._3DCommandOpcode = 0, \
5410 ._3DCommandSubOpcode = 35, \
5411 .DwordLength = 0
5412
5413 struct GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC {
5414 uint32_t CommandType;
5415 uint32_t CommandSubType;
5416 uint32_t _3DCommandOpcode;
5417 uint32_t _3DCommandSubOpcode;
5418 uint32_t DwordLength;
5419 uint32_t CCViewportPointer;
5420 };
5421
5422 static inline void
5423 GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_pack(__gen_user_data *data, void * restrict dst,
5424 const struct GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC * restrict values)
5425 {
5426 uint32_t *dw = (uint32_t * restrict) dst;
5427
5428 dw[0] =
5429 __gen_field(values->CommandType, 29, 31) |
5430 __gen_field(values->CommandSubType, 27, 28) |
5431 __gen_field(values->_3DCommandOpcode, 24, 26) |
5432 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5433 __gen_field(values->DwordLength, 0, 7) |
5434 0;
5435
5436 dw[1] =
5437 __gen_offset(values->CCViewportPointer, 5, 31) |
5438 0;
5439
5440 }
5441
5442 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length 0x00000002
5443 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length_bias 0x00000002
5444 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_header\
5445 .CommandType = 3, \
5446 .CommandSubType = 3, \
5447 ._3DCommandOpcode = 0, \
5448 ._3DCommandSubOpcode = 33, \
5449 .DwordLength = 0
5450
5451 struct GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP {
5452 uint32_t CommandType;
5453 uint32_t CommandSubType;
5454 uint32_t _3DCommandOpcode;
5455 uint32_t _3DCommandSubOpcode;
5456 uint32_t DwordLength;
5457 uint32_t SFClipViewportPointer;
5458 };
5459
5460 static inline void
5461 GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_pack(__gen_user_data *data, void * restrict dst,
5462 const struct GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP * restrict values)
5463 {
5464 uint32_t *dw = (uint32_t * restrict) dst;
5465
5466 dw[0] =
5467 __gen_field(values->CommandType, 29, 31) |
5468 __gen_field(values->CommandSubType, 27, 28) |
5469 __gen_field(values->_3DCommandOpcode, 24, 26) |
5470 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5471 __gen_field(values->DwordLength, 0, 7) |
5472 0;
5473
5474 dw[1] =
5475 __gen_offset(values->SFClipViewportPointer, 6, 31) |
5476 0;
5477
5478 }
5479
5480 #define GEN8_3DSTATE_WM_length 0x00000002
5481 #define GEN8_3DSTATE_WM_length_bias 0x00000002
5482 #define GEN8_3DSTATE_WM_header \
5483 .CommandType = 3, \
5484 .CommandSubType = 3, \
5485 ._3DCommandOpcode = 0, \
5486 ._3DCommandSubOpcode = 20, \
5487 .DwordLength = 0
5488
5489 struct GEN8_3DSTATE_WM {
5490 uint32_t CommandType;
5491 uint32_t CommandSubType;
5492 uint32_t _3DCommandOpcode;
5493 uint32_t _3DCommandSubOpcode;
5494 uint32_t DwordLength;
5495 bool StatisticsEnable;
5496 bool LegacyDepthBufferClearEnable;
5497 bool LegacyDepthBufferResolveEnable;
5498 bool LegacyHierarchicalDepthBufferResolveEnable;
5499 bool LegacyDiamondLineRasterization;
5500 #define NORMAL 0
5501 #define PSEXEC 1
5502 #define PREPS 2
5503 uint32_t EarlyDepthStencilControl;
5504 #define Normal 0
5505 #define ForceOff 1
5506 #define ForceON 2
5507 uint32_t ForceThreadDispatchEnable;
5508 #define INTERP_PIXEL 0
5509 #define INTERP_CENTROID 2
5510 #define INTERP_SAMPLE 3
5511 uint32_t PositionZWInterpolationMode;
5512 uint32_t BarycentricInterpolationMode;
5513 #define _05pixels 0
5514 #define _10pixels 1
5515 #define _20pixels 2
5516 #define _40pixels 3
5517 uint32_t LineEndCapAntialiasingRegionWidth;
5518 #define _05pixels 0
5519 #define _10pixels 1
5520 #define _20pixels 2
5521 #define _40pixels 3
5522 uint32_t LineAntialiasingRegionWidth;
5523 bool PolygonStippleEnable;
5524 bool LineStippleEnable;
5525 #define RASTRULE_UPPER_LEFT 0
5526 #define RASTRULE_UPPER_RIGHT 1
5527 uint32_t PointRasterizationRule;
5528 #define Normal 0
5529 #define ForceOff 1
5530 #define ForceON 2
5531 uint32_t ForceKillPixelEnable;
5532 };
5533
5534 static inline void
5535 GEN8_3DSTATE_WM_pack(__gen_user_data *data, void * restrict dst,
5536 const struct GEN8_3DSTATE_WM * restrict values)
5537 {
5538 uint32_t *dw = (uint32_t * restrict) dst;
5539
5540 dw[0] =
5541 __gen_field(values->CommandType, 29, 31) |
5542 __gen_field(values->CommandSubType, 27, 28) |
5543 __gen_field(values->_3DCommandOpcode, 24, 26) |
5544 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5545 __gen_field(values->DwordLength, 0, 7) |
5546 0;
5547
5548 dw[1] =
5549 __gen_field(values->StatisticsEnable, 31, 31) |
5550 __gen_field(values->LegacyDepthBufferClearEnable, 30, 30) |
5551 __gen_field(values->LegacyDepthBufferResolveEnable, 28, 28) |
5552 __gen_field(values->LegacyHierarchicalDepthBufferResolveEnable, 27, 27) |
5553 __gen_field(values->LegacyDiamondLineRasterization, 26, 26) |
5554 __gen_field(values->EarlyDepthStencilControl, 21, 22) |
5555 __gen_field(values->ForceThreadDispatchEnable, 19, 20) |
5556 __gen_field(values->PositionZWInterpolationMode, 17, 18) |
5557 __gen_field(values->BarycentricInterpolationMode, 11, 16) |
5558 __gen_field(values->LineEndCapAntialiasingRegionWidth, 8, 9) |
5559 __gen_field(values->LineAntialiasingRegionWidth, 6, 7) |
5560 __gen_field(values->PolygonStippleEnable, 4, 4) |
5561 __gen_field(values->LineStippleEnable, 3, 3) |
5562 __gen_field(values->PointRasterizationRule, 2, 2) |
5563 __gen_field(values->ForceKillPixelEnable, 0, 1) |
5564 0;
5565
5566 }
5567
5568 #define GEN8_3DSTATE_WM_CHROMAKEY_length 0x00000002
5569 #define GEN8_3DSTATE_WM_CHROMAKEY_length_bias 0x00000002
5570 #define GEN8_3DSTATE_WM_CHROMAKEY_header \
5571 .CommandType = 3, \
5572 .CommandSubType = 3, \
5573 ._3DCommandOpcode = 0, \
5574 ._3DCommandSubOpcode = 76, \
5575 .DwordLength = 0
5576
5577 struct GEN8_3DSTATE_WM_CHROMAKEY {
5578 uint32_t CommandType;
5579 uint32_t CommandSubType;
5580 uint32_t _3DCommandOpcode;
5581 uint32_t _3DCommandSubOpcode;
5582 uint32_t DwordLength;
5583 bool ChromaKeyKillEnable;
5584 };
5585
5586 static inline void
5587 GEN8_3DSTATE_WM_CHROMAKEY_pack(__gen_user_data *data, void * restrict dst,
5588 const struct GEN8_3DSTATE_WM_CHROMAKEY * restrict values)
5589 {
5590 uint32_t *dw = (uint32_t * restrict) dst;
5591
5592 dw[0] =
5593 __gen_field(values->CommandType, 29, 31) |
5594 __gen_field(values->CommandSubType, 27, 28) |
5595 __gen_field(values->_3DCommandOpcode, 24, 26) |
5596 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5597 __gen_field(values->DwordLength, 0, 7) |
5598 0;
5599
5600 dw[1] =
5601 __gen_field(values->ChromaKeyKillEnable, 31, 31) |
5602 0;
5603
5604 }
5605
5606 #define GEN8_3DSTATE_WM_DEPTH_STENCIL_length 0x00000003
5607 #define GEN8_3DSTATE_WM_DEPTH_STENCIL_length_bias 0x00000002
5608 #define GEN8_3DSTATE_WM_DEPTH_STENCIL_header \
5609 .CommandType = 3, \
5610 .CommandSubType = 3, \
5611 ._3DCommandOpcode = 0, \
5612 ._3DCommandSubOpcode = 78, \
5613 .DwordLength = 1
5614
5615 struct GEN8_3DSTATE_WM_DEPTH_STENCIL {
5616 uint32_t CommandType;
5617 uint32_t CommandSubType;
5618 uint32_t _3DCommandOpcode;
5619 uint32_t _3DCommandSubOpcode;
5620 uint32_t DwordLength;
5621 uint32_t StencilFailOp;
5622 uint32_t StencilPassDepthFailOp;
5623 uint32_t StencilPassDepthPassOp;
5624 uint32_t BackfaceStencilTestFunction;
5625 uint32_t BackfaceStencilFailOp;
5626 uint32_t BackfaceStencilPassDepthFailOp;
5627 uint32_t BackfaceStencilPassDepthPassOp;
5628 uint32_t StencilTestFunction;
5629 uint32_t DepthTestFunction;
5630 bool DoubleSidedStencilEnable;
5631 bool StencilTestEnable;
5632 bool StencilBufferWriteEnable;
5633 bool DepthTestEnable;
5634 bool DepthBufferWriteEnable;
5635 uint32_t StencilTestMask;
5636 uint32_t StencilWriteMask;
5637 uint32_t BackfaceStencilTestMask;
5638 uint32_t BackfaceStencilWriteMask;
5639 };
5640
5641 static inline void
5642 GEN8_3DSTATE_WM_DEPTH_STENCIL_pack(__gen_user_data *data, void * restrict dst,
5643 const struct GEN8_3DSTATE_WM_DEPTH_STENCIL * restrict values)
5644 {
5645 uint32_t *dw = (uint32_t * restrict) dst;
5646
5647 dw[0] =
5648 __gen_field(values->CommandType, 29, 31) |
5649 __gen_field(values->CommandSubType, 27, 28) |
5650 __gen_field(values->_3DCommandOpcode, 24, 26) |
5651 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5652 __gen_field(values->DwordLength, 0, 7) |
5653 0;
5654
5655 dw[1] =
5656 __gen_field(values->StencilFailOp, 29, 31) |
5657 __gen_field(values->StencilPassDepthFailOp, 26, 28) |
5658 __gen_field(values->StencilPassDepthPassOp, 23, 25) |
5659 __gen_field(values->BackfaceStencilTestFunction, 20, 22) |
5660 __gen_field(values->BackfaceStencilFailOp, 17, 19) |
5661 __gen_field(values->BackfaceStencilPassDepthFailOp, 14, 16) |
5662 __gen_field(values->BackfaceStencilPassDepthPassOp, 11, 13) |
5663 __gen_field(values->StencilTestFunction, 8, 10) |
5664 __gen_field(values->DepthTestFunction, 5, 7) |
5665 __gen_field(values->DoubleSidedStencilEnable, 4, 4) |
5666 __gen_field(values->StencilTestEnable, 3, 3) |
5667 __gen_field(values->StencilBufferWriteEnable, 2, 2) |
5668 __gen_field(values->DepthTestEnable, 1, 1) |
5669 __gen_field(values->DepthBufferWriteEnable, 0, 0) |
5670 0;
5671
5672 dw[2] =
5673 __gen_field(values->StencilTestMask, 24, 31) |
5674 __gen_field(values->StencilWriteMask, 16, 23) |
5675 __gen_field(values->BackfaceStencilTestMask, 8, 15) |
5676 __gen_field(values->BackfaceStencilWriteMask, 0, 7) |
5677 0;
5678
5679 }
5680
5681 #define GEN8_3DSTATE_WM_HZ_OP_length 0x00000005
5682 #define GEN8_3DSTATE_WM_HZ_OP_length_bias 0x00000002
5683 #define GEN8_3DSTATE_WM_HZ_OP_header \
5684 .CommandType = 3, \
5685 .CommandSubType = 3, \
5686 ._3DCommandOpcode = 0, \
5687 ._3DCommandSubOpcode = 82, \
5688 .DwordLength = 3
5689
5690 struct GEN8_3DSTATE_WM_HZ_OP {
5691 uint32_t CommandType;
5692 uint32_t CommandSubType;
5693 uint32_t _3DCommandOpcode;
5694 uint32_t _3DCommandSubOpcode;
5695 uint32_t DwordLength;
5696 bool StencilBufferClearEnable;
5697 bool DepthBufferClearEnable;
5698 bool ScissorRectangleEnable;
5699 bool DepthBufferResolveEnable;
5700 bool HierarchicalDepthBufferResolveEnable;
5701 uint32_t PixelPositionOffsetEnable;
5702 bool FullSurfaceDepthClear;
5703 uint32_t StencilClearValue;
5704 uint32_t NumberofMultisamples;
5705 uint32_t ClearRectangleYMin;
5706 uint32_t ClearRectangleXMin;
5707 uint32_t ClearRectangleYMax;
5708 uint32_t ClearRectangleXMax;
5709 uint32_t SampleMask;
5710 };
5711
5712 static inline void
5713 GEN8_3DSTATE_WM_HZ_OP_pack(__gen_user_data *data, void * restrict dst,
5714 const struct GEN8_3DSTATE_WM_HZ_OP * restrict values)
5715 {
5716 uint32_t *dw = (uint32_t * restrict) dst;
5717
5718 dw[0] =
5719 __gen_field(values->CommandType, 29, 31) |
5720 __gen_field(values->CommandSubType, 27, 28) |
5721 __gen_field(values->_3DCommandOpcode, 24, 26) |
5722 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5723 __gen_field(values->DwordLength, 0, 7) |
5724 0;
5725
5726 dw[1] =
5727 __gen_field(values->StencilBufferClearEnable, 31, 31) |
5728 __gen_field(values->DepthBufferClearEnable, 30, 30) |
5729 __gen_field(values->ScissorRectangleEnable, 29, 29) |
5730 __gen_field(values->DepthBufferResolveEnable, 28, 28) |
5731 __gen_field(values->HierarchicalDepthBufferResolveEnable, 27, 27) |
5732 __gen_field(values->PixelPositionOffsetEnable, 26, 26) |
5733 __gen_field(values->FullSurfaceDepthClear, 25, 25) |
5734 __gen_field(values->StencilClearValue, 16, 23) |
5735 __gen_field(values->NumberofMultisamples, 13, 15) |
5736 0;
5737
5738 dw[2] =
5739 __gen_field(values->ClearRectangleYMin, 16, 31) |
5740 __gen_field(values->ClearRectangleXMin, 0, 15) |
5741 0;
5742
5743 dw[3] =
5744 __gen_field(values->ClearRectangleYMax, 16, 31) |
5745 __gen_field(values->ClearRectangleXMax, 0, 15) |
5746 0;
5747
5748 dw[4] =
5749 __gen_field(values->SampleMask, 0, 15) |
5750 0;
5751
5752 }
5753
5754 #define GEN8_GPGPU_WALKER_length 0x0000000f
5755 #define GEN8_GPGPU_WALKER_length_bias 0x00000002
5756 #define GEN8_GPGPU_WALKER_header \
5757 .CommandType = 3, \
5758 .Pipeline = 2, \
5759 .MediaCommandOpcode = 1, \
5760 .SubOpcode = 5, \
5761 .DwordLength = 13
5762
5763 struct GEN8_GPGPU_WALKER {
5764 uint32_t CommandType;
5765 uint32_t Pipeline;
5766 uint32_t MediaCommandOpcode;
5767 uint32_t SubOpcode;
5768 bool IndirectParameterEnable;
5769 bool PredicateEnable;
5770 uint32_t DwordLength;
5771 uint32_t InterfaceDescriptorOffset;
5772 uint32_t IndirectDataLength;
5773 uint32_t IndirectDataStartAddress;
5774 #define SIMD8 0
5775 #define SIMD16 1
5776 #define SIMD32 2
5777 uint32_t SIMDSize;
5778 uint32_t ThreadDepthCounterMaximum;
5779 uint32_t ThreadHeightCounterMaximum;
5780 uint32_t ThreadWidthCounterMaximum;
5781 uint32_t ThreadGroupIDStartingX;
5782 uint32_t ThreadGroupIDXDimension;
5783 uint32_t ThreadGroupIDStartingY;
5784 uint32_t ThreadGroupIDYDimension;
5785 uint32_t ThreadGroupIDStartingResumeZ;
5786 uint32_t ThreadGroupIDZDimension;
5787 uint32_t RightExecutionMask;
5788 uint32_t BottomExecutionMask;
5789 };
5790
5791 static inline void
5792 GEN8_GPGPU_WALKER_pack(__gen_user_data *data, void * restrict dst,
5793 const struct GEN8_GPGPU_WALKER * restrict values)
5794 {
5795 uint32_t *dw = (uint32_t * restrict) dst;
5796
5797 dw[0] =
5798 __gen_field(values->CommandType, 29, 31) |
5799 __gen_field(values->Pipeline, 27, 28) |
5800 __gen_field(values->MediaCommandOpcode, 24, 26) |
5801 __gen_field(values->SubOpcode, 16, 23) |
5802 __gen_field(values->IndirectParameterEnable, 10, 10) |
5803 __gen_field(values->PredicateEnable, 8, 8) |
5804 __gen_field(values->DwordLength, 0, 7) |
5805 0;
5806
5807 dw[1] =
5808 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
5809 0;
5810
5811 dw[2] =
5812 __gen_field(values->IndirectDataLength, 0, 16) |
5813 0;
5814
5815 dw[3] =
5816 __gen_offset(values->IndirectDataStartAddress, 6, 31) |
5817 0;
5818
5819 dw[4] =
5820 __gen_field(values->SIMDSize, 30, 31) |
5821 __gen_field(values->ThreadDepthCounterMaximum, 16, 21) |
5822 __gen_field(values->ThreadHeightCounterMaximum, 8, 13) |
5823 __gen_field(values->ThreadWidthCounterMaximum, 0, 5) |
5824 0;
5825
5826 dw[5] =
5827 __gen_field(values->ThreadGroupIDStartingX, 0, 31) |
5828 0;
5829
5830 dw[6] =
5831 0;
5832
5833 dw[7] =
5834 __gen_field(values->ThreadGroupIDXDimension, 0, 31) |
5835 0;
5836
5837 dw[8] =
5838 __gen_field(values->ThreadGroupIDStartingY, 0, 31) |
5839 0;
5840
5841 dw[9] =
5842 0;
5843
5844 dw[10] =
5845 __gen_field(values->ThreadGroupIDYDimension, 0, 31) |
5846 0;
5847
5848 dw[11] =
5849 __gen_field(values->ThreadGroupIDStartingResumeZ, 0, 31) |
5850 0;
5851
5852 dw[12] =
5853 __gen_field(values->ThreadGroupIDZDimension, 0, 31) |
5854 0;
5855
5856 dw[13] =
5857 __gen_field(values->RightExecutionMask, 0, 31) |
5858 0;
5859
5860 dw[14] =
5861 __gen_field(values->BottomExecutionMask, 0, 31) |
5862 0;
5863
5864 }
5865
5866 #define GEN8_MEDIA_CURBE_LOAD_length 0x00000004
5867 #define GEN8_MEDIA_CURBE_LOAD_length_bias 0x00000002
5868 #define GEN8_MEDIA_CURBE_LOAD_header \
5869 .CommandType = 3, \
5870 .Pipeline = 2, \
5871 .MediaCommandOpcode = 0, \
5872 .SubOpcode = 1, \
5873 .DwordLength = 2
5874
5875 struct GEN8_MEDIA_CURBE_LOAD {
5876 uint32_t CommandType;
5877 uint32_t Pipeline;
5878 uint32_t MediaCommandOpcode;
5879 uint32_t SubOpcode;
5880 uint32_t DwordLength;
5881 uint32_t CURBETotalDataLength;
5882 uint32_t CURBEDataStartAddress;
5883 };
5884
5885 static inline void
5886 GEN8_MEDIA_CURBE_LOAD_pack(__gen_user_data *data, void * restrict dst,
5887 const struct GEN8_MEDIA_CURBE_LOAD * restrict values)
5888 {
5889 uint32_t *dw = (uint32_t * restrict) dst;
5890
5891 dw[0] =
5892 __gen_field(values->CommandType, 29, 31) |
5893 __gen_field(values->Pipeline, 27, 28) |
5894 __gen_field(values->MediaCommandOpcode, 24, 26) |
5895 __gen_field(values->SubOpcode, 16, 23) |
5896 __gen_field(values->DwordLength, 0, 15) |
5897 0;
5898
5899 dw[1] =
5900 0;
5901
5902 dw[2] =
5903 __gen_field(values->CURBETotalDataLength, 0, 16) |
5904 0;
5905
5906 dw[3] =
5907 __gen_field(values->CURBEDataStartAddress, 0, 31) |
5908 0;
5909
5910 }
5911
5912 #define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 0x00000004
5913 #define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length_bias 0x00000002
5914 #define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_header\
5915 .CommandType = 3, \
5916 .Pipeline = 2, \
5917 .MediaCommandOpcode = 0, \
5918 .SubOpcode = 2, \
5919 .DwordLength = 2
5920
5921 struct GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD {
5922 uint32_t CommandType;
5923 uint32_t Pipeline;
5924 uint32_t MediaCommandOpcode;
5925 uint32_t SubOpcode;
5926 uint32_t DwordLength;
5927 uint32_t InterfaceDescriptorTotalLength;
5928 uint32_t InterfaceDescriptorDataStartAddress;
5929 };
5930
5931 static inline void
5932 GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_pack(__gen_user_data *data, void * restrict dst,
5933 const struct GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD * restrict values)
5934 {
5935 uint32_t *dw = (uint32_t * restrict) dst;
5936
5937 dw[0] =
5938 __gen_field(values->CommandType, 29, 31) |
5939 __gen_field(values->Pipeline, 27, 28) |
5940 __gen_field(values->MediaCommandOpcode, 24, 26) |
5941 __gen_field(values->SubOpcode, 16, 23) |
5942 __gen_field(values->DwordLength, 0, 15) |
5943 0;
5944
5945 dw[1] =
5946 0;
5947
5948 dw[2] =
5949 __gen_field(values->InterfaceDescriptorTotalLength, 0, 16) |
5950 0;
5951
5952 dw[3] =
5953 __gen_offset(values->InterfaceDescriptorDataStartAddress, 0, 31) |
5954 0;
5955
5956 }
5957
5958 #define GEN8_MEDIA_OBJECT_length_bias 0x00000002
5959 #define GEN8_MEDIA_OBJECT_header \
5960 .CommandType = 3, \
5961 .MediaCommandPipeline = 2, \
5962 .MediaCommandOpcode = 1, \
5963 .MediaCommandSubOpcode = 0
5964
5965 struct GEN8_MEDIA_OBJECT {
5966 uint32_t CommandType;
5967 uint32_t MediaCommandPipeline;
5968 uint32_t MediaCommandOpcode;
5969 uint32_t MediaCommandSubOpcode;
5970 uint32_t DwordLength;
5971 uint32_t InterfaceDescriptorOffset;
5972 bool ChildrenPresent;
5973 #define Nothreadsynchronization 0
5974 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
5975 uint32_t ThreadSynchronization;
5976 uint32_t ForceDestination;
5977 #define Notusingscoreboard 0
5978 #define Usingscoreboard 1
5979 uint32_t UseScoreboard;
5980 #define Slice0 0
5981 #define Slice1 1
5982 #define Slice2 2
5983 uint32_t SliceDestinationSelect;
5984 #define SubSlice2 2
5985 #define SubSlice1 1
5986 #define SubSlice0 0
5987 uint32_t SubSliceDestinationSelect;
5988 uint32_t IndirectDataLength;
5989 __gen_address_type IndirectDataStartAddress;
5990 uint32_t ScoredboardY;
5991 uint32_t ScoreboardX;
5992 uint32_t ScoreboardColor;
5993 bool ScoreboardMask;
5994 /* variable length fields follow */
5995 };
5996
5997 static inline void
5998 GEN8_MEDIA_OBJECT_pack(__gen_user_data *data, void * restrict dst,
5999 const struct GEN8_MEDIA_OBJECT * restrict values)
6000 {
6001 uint32_t *dw = (uint32_t * restrict) dst;
6002
6003 dw[0] =
6004 __gen_field(values->CommandType, 29, 31) |
6005 __gen_field(values->MediaCommandPipeline, 27, 28) |
6006 __gen_field(values->MediaCommandOpcode, 24, 26) |
6007 __gen_field(values->MediaCommandSubOpcode, 16, 23) |
6008 __gen_field(values->DwordLength, 0, 15) |
6009 0;
6010
6011 dw[1] =
6012 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6013 0;
6014
6015 dw[2] =
6016 __gen_field(values->ChildrenPresent, 31, 31) |
6017 __gen_field(values->ThreadSynchronization, 24, 24) |
6018 __gen_field(values->ForceDestination, 22, 22) |
6019 __gen_field(values->UseScoreboard, 21, 21) |
6020 __gen_field(values->SliceDestinationSelect, 19, 20) |
6021 __gen_field(values->SubSliceDestinationSelect, 17, 18) |
6022 __gen_field(values->IndirectDataLength, 0, 16) |
6023 0;
6024
6025 uint32_t dw3 =
6026 0;
6027
6028 dw[3] =
6029 __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, dw3);
6030
6031 dw[4] =
6032 __gen_field(values->ScoredboardY, 16, 24) |
6033 __gen_field(values->ScoreboardX, 0, 8) |
6034 0;
6035
6036 dw[5] =
6037 __gen_field(values->ScoreboardColor, 16, 19) |
6038 __gen_field(values->ScoreboardMask, 0, 7) |
6039 0;
6040
6041 /* variable length fields follow */
6042 }
6043
6044 #define GEN8_MEDIA_OBJECT_GRPID_length_bias 0x00000002
6045 #define GEN8_MEDIA_OBJECT_GRPID_header \
6046 .CommandType = 3, \
6047 .MediaCommandPipeline = 2, \
6048 .MediaCommandOpcode = 1, \
6049 .MediaCommandSubOpcode = 6
6050
6051 struct GEN8_MEDIA_OBJECT_GRPID {
6052 uint32_t CommandType;
6053 uint32_t MediaCommandPipeline;
6054 uint32_t MediaCommandOpcode;
6055 uint32_t MediaCommandSubOpcode;
6056 uint32_t DwordLength;
6057 uint32_t InterfaceDescriptorOffset;
6058 uint32_t EndofThreadGroup;
6059 uint32_t ForceDestination;
6060 #define Notusingscoreboard 0
6061 #define Usingscoreboard 1
6062 uint32_t UseScoreboard;
6063 #define Slice0 0
6064 #define Slice1 1
6065 #define Slice2 2
6066 uint32_t SliceDestinationSelect;
6067 #define SubSlice2 2
6068 #define SubSlice1 1
6069 #define SubSlice0 0
6070 uint32_t SubSliceDestinationSelect;
6071 uint32_t IndirectDataLength;
6072 __gen_address_type IndirectDataStartAddress;
6073 uint32_t ScoreboardY;
6074 uint32_t ScoreboardX;
6075 uint32_t ScoreboardColor;
6076 bool ScoreboardMask;
6077 uint32_t GroupID;
6078 /* variable length fields follow */
6079 };
6080
6081 static inline void
6082 GEN8_MEDIA_OBJECT_GRPID_pack(__gen_user_data *data, void * restrict dst,
6083 const struct GEN8_MEDIA_OBJECT_GRPID * restrict values)
6084 {
6085 uint32_t *dw = (uint32_t * restrict) dst;
6086
6087 dw[0] =
6088 __gen_field(values->CommandType, 29, 31) |
6089 __gen_field(values->MediaCommandPipeline, 27, 28) |
6090 __gen_field(values->MediaCommandOpcode, 24, 26) |
6091 __gen_field(values->MediaCommandSubOpcode, 16, 23) |
6092 __gen_field(values->DwordLength, 0, 15) |
6093 0;
6094
6095 dw[1] =
6096 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6097 0;
6098
6099 dw[2] =
6100 __gen_field(values->EndofThreadGroup, 23, 23) |
6101 __gen_field(values->ForceDestination, 22, 22) |
6102 __gen_field(values->UseScoreboard, 21, 21) |
6103 __gen_field(values->SliceDestinationSelect, 19, 20) |
6104 __gen_field(values->SubSliceDestinationSelect, 17, 18) |
6105 __gen_field(values->IndirectDataLength, 0, 16) |
6106 0;
6107
6108 uint32_t dw3 =
6109 0;
6110
6111 dw[3] =
6112 __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, dw3);
6113
6114 dw[4] =
6115 __gen_field(values->ScoreboardY, 16, 24) |
6116 __gen_field(values->ScoreboardX, 0, 8) |
6117 0;
6118
6119 dw[5] =
6120 __gen_field(values->ScoreboardColor, 16, 19) |
6121 __gen_field(values->ScoreboardMask, 0, 7) |
6122 0;
6123
6124 dw[6] =
6125 __gen_field(values->GroupID, 0, 31) |
6126 0;
6127
6128 /* variable length fields follow */
6129 }
6130
6131 #define GEN8_MEDIA_OBJECT_PRT_length 0x00000010
6132 #define GEN8_MEDIA_OBJECT_PRT_length_bias 0x00000002
6133 #define GEN8_MEDIA_OBJECT_PRT_header \
6134 .CommandType = 3, \
6135 .Pipeline = 2, \
6136 .MediaCommandOpcode = 1, \
6137 .SubOpcode = 2, \
6138 .DwordLength = 14
6139
6140 struct GEN8_MEDIA_OBJECT_PRT {
6141 uint32_t CommandType;
6142 uint32_t Pipeline;
6143 uint32_t MediaCommandOpcode;
6144 uint32_t SubOpcode;
6145 uint32_t DwordLength;
6146 uint32_t InterfaceDescriptorOffset;
6147 bool ChildrenPresent;
6148 bool PRT_FenceNeeded;
6149 #define Rootthreadqueue 0
6150 #define VFEstateflush 1
6151 uint32_t PRT_FenceType;
6152 uint32_t InlineData[12];
6153 };
6154
6155 static inline void
6156 GEN8_MEDIA_OBJECT_PRT_pack(__gen_user_data *data, void * restrict dst,
6157 const struct GEN8_MEDIA_OBJECT_PRT * restrict values)
6158 {
6159 uint32_t *dw = (uint32_t * restrict) dst;
6160
6161 dw[0] =
6162 __gen_field(values->CommandType, 29, 31) |
6163 __gen_field(values->Pipeline, 27, 28) |
6164 __gen_field(values->MediaCommandOpcode, 24, 26) |
6165 __gen_field(values->SubOpcode, 16, 23) |
6166 __gen_field(values->DwordLength, 0, 15) |
6167 0;
6168
6169 dw[1] =
6170 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6171 0;
6172
6173 dw[2] =
6174 __gen_field(values->ChildrenPresent, 31, 31) |
6175 __gen_field(values->PRT_FenceNeeded, 23, 23) |
6176 __gen_field(values->PRT_FenceType, 22, 22) |
6177 0;
6178
6179 dw[3] =
6180 0;
6181
6182 for (uint32_t i = 0, j = 4; i < 12; i += 1, j++) {
6183 dw[j] =
6184 __gen_field(values->InlineData[i + 0], 0, 31) |
6185 0;
6186 }
6187
6188 }
6189
6190 #define GEN8_MEDIA_OBJECT_WALKER_length_bias 0x00000002
6191 #define GEN8_MEDIA_OBJECT_WALKER_header \
6192 .CommandType = 3, \
6193 .Pipeline = 2, \
6194 .MediaCommandOpcode = 1, \
6195 .SubOpcode = 3
6196
6197 struct GEN8_MEDIA_OBJECT_WALKER {
6198 uint32_t CommandType;
6199 uint32_t Pipeline;
6200 uint32_t MediaCommandOpcode;
6201 uint32_t SubOpcode;
6202 uint32_t DwordLength;
6203 uint32_t InterfaceDescriptorOffset;
6204 bool ChildrenPresent;
6205 #define Nothreadsynchronization 0
6206 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
6207 uint32_t ThreadSynchronization;
6208 #define Notusingscoreboard 0
6209 #define Usingscoreboard 1
6210 uint32_t UseScoreboard;
6211 uint32_t IndirectDataLength;
6212 uint32_t IndirectDataStartAddress;
6213 uint32_t GroupIDLoopSelect;
6214 bool ScoreboardMask;
6215 uint32_t ColorCountMinusOne;
6216 uint32_t MiddleLoopExtraSteps;
6217 uint32_t LocalMidLoopUnitY;
6218 uint32_t MidLoopUnitX;
6219 uint32_t GlobalLoopExecCount;
6220 uint32_t LocalLoopExecCount;
6221 uint32_t BlockResolutionY;
6222 uint32_t BlockResolutionX;
6223 uint32_t LocalStartY;
6224 uint32_t LocalStartX;
6225 uint32_t LocalOuterLoopStrideY;
6226 uint32_t LocalOuterLoopStrideX;
6227 uint32_t LocalInnerLoopUnitY;
6228 uint32_t LocalInnerLoopUnitX;
6229 uint32_t GlobalResolutionY;
6230 uint32_t GlobalResolutionX;
6231 uint32_t GlobalStartY;
6232 uint32_t GlobalStartX;
6233 uint32_t GlobalOuterLoopStrideY;
6234 uint32_t GlobalOuterLoopStrideX;
6235 uint32_t GlobalInnerLoopUnitY;
6236 uint32_t GlobalInnerLoopUnitX;
6237 /* variable length fields follow */
6238 };
6239
6240 static inline void
6241 GEN8_MEDIA_OBJECT_WALKER_pack(__gen_user_data *data, void * restrict dst,
6242 const struct GEN8_MEDIA_OBJECT_WALKER * restrict values)
6243 {
6244 uint32_t *dw = (uint32_t * restrict) dst;
6245
6246 dw[0] =
6247 __gen_field(values->CommandType, 29, 31) |
6248 __gen_field(values->Pipeline, 27, 28) |
6249 __gen_field(values->MediaCommandOpcode, 24, 26) |
6250 __gen_field(values->SubOpcode, 16, 23) |
6251 __gen_field(values->DwordLength, 0, 15) |
6252 0;
6253
6254 dw[1] =
6255 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6256 0;
6257
6258 dw[2] =
6259 __gen_field(values->ChildrenPresent, 31, 31) |
6260 __gen_field(values->ThreadSynchronization, 24, 24) |
6261 __gen_field(values->UseScoreboard, 21, 21) |
6262 __gen_field(values->IndirectDataLength, 0, 16) |
6263 0;
6264
6265 dw[3] =
6266 __gen_offset(values->IndirectDataStartAddress, 0, 31) |
6267 0;
6268
6269 dw[4] =
6270 0;
6271
6272 dw[5] =
6273 __gen_field(values->GroupIDLoopSelect, 8, 31) |
6274 __gen_field(values->ScoreboardMask, 0, 7) |
6275 0;
6276
6277 dw[6] =
6278 __gen_field(values->ColorCountMinusOne, 24, 27) |
6279 __gen_field(values->MiddleLoopExtraSteps, 16, 20) |
6280 __gen_field(values->LocalMidLoopUnitY, 12, 13) |
6281 __gen_field(values->MidLoopUnitX, 8, 9) |
6282 0;
6283
6284 dw[7] =
6285 __gen_field(values->GlobalLoopExecCount, 16, 25) |
6286 __gen_field(values->LocalLoopExecCount, 0, 9) |
6287 0;
6288
6289 dw[8] =
6290 __gen_field(values->BlockResolutionY, 16, 24) |
6291 __gen_field(values->BlockResolutionX, 0, 8) |
6292 0;
6293
6294 dw[9] =
6295 __gen_field(values->LocalStartY, 16, 24) |
6296 __gen_field(values->LocalStartX, 0, 8) |
6297 0;
6298
6299 dw[10] =
6300 0;
6301
6302 dw[11] =
6303 __gen_field(values->LocalOuterLoopStrideY, 16, 25) |
6304 __gen_field(values->LocalOuterLoopStrideX, 0, 9) |
6305 0;
6306
6307 dw[12] =
6308 __gen_field(values->LocalInnerLoopUnitY, 16, 25) |
6309 __gen_field(values->LocalInnerLoopUnitX, 0, 9) |
6310 0;
6311
6312 dw[13] =
6313 __gen_field(values->GlobalResolutionY, 16, 24) |
6314 __gen_field(values->GlobalResolutionX, 0, 8) |
6315 0;
6316
6317 dw[14] =
6318 __gen_field(values->GlobalStartY, 16, 25) |
6319 __gen_field(values->GlobalStartX, 0, 9) |
6320 0;
6321
6322 dw[15] =
6323 __gen_field(values->GlobalOuterLoopStrideY, 16, 25) |
6324 __gen_field(values->GlobalOuterLoopStrideX, 0, 9) |
6325 0;
6326
6327 dw[16] =
6328 __gen_field(values->GlobalInnerLoopUnitY, 16, 25) |
6329 __gen_field(values->GlobalInnerLoopUnitX, 0, 9) |
6330 0;
6331
6332 /* variable length fields follow */
6333 }
6334
6335 #define GEN8_MEDIA_STATE_FLUSH_length 0x00000002
6336 #define GEN8_MEDIA_STATE_FLUSH_length_bias 0x00000002
6337 #define GEN8_MEDIA_STATE_FLUSH_header \
6338 .CommandType = 3, \
6339 .Pipeline = 2, \
6340 .MediaCommandOpcode = 0, \
6341 .SubOpcode = 4, \
6342 .DwordLength = 0
6343
6344 struct GEN8_MEDIA_STATE_FLUSH {
6345 uint32_t CommandType;
6346 uint32_t Pipeline;
6347 uint32_t MediaCommandOpcode;
6348 uint32_t SubOpcode;
6349 uint32_t DwordLength;
6350 bool FlushtoGO;
6351 uint32_t WatermarkRequired;
6352 uint32_t InterfaceDescriptorOffset;
6353 };
6354
6355 static inline void
6356 GEN8_MEDIA_STATE_FLUSH_pack(__gen_user_data *data, void * restrict dst,
6357 const struct GEN8_MEDIA_STATE_FLUSH * restrict values)
6358 {
6359 uint32_t *dw = (uint32_t * restrict) dst;
6360
6361 dw[0] =
6362 __gen_field(values->CommandType, 29, 31) |
6363 __gen_field(values->Pipeline, 27, 28) |
6364 __gen_field(values->MediaCommandOpcode, 24, 26) |
6365 __gen_field(values->SubOpcode, 16, 23) |
6366 __gen_field(values->DwordLength, 0, 15) |
6367 0;
6368
6369 dw[1] =
6370 __gen_field(values->FlushtoGO, 7, 7) |
6371 __gen_field(values->WatermarkRequired, 6, 6) |
6372 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6373 0;
6374
6375 }
6376
6377 #define GEN8_MEDIA_VFE_STATE_length 0x00000009
6378 #define GEN8_MEDIA_VFE_STATE_length_bias 0x00000002
6379 #define GEN8_MEDIA_VFE_STATE_header \
6380 .CommandType = 3, \
6381 .Pipeline = 2, \
6382 .MediaCommandOpcode = 0, \
6383 .SubOpcode = 0, \
6384 .DwordLength = 7
6385
6386 struct GEN8_MEDIA_VFE_STATE {
6387 uint32_t CommandType;
6388 uint32_t Pipeline;
6389 uint32_t MediaCommandOpcode;
6390 uint32_t SubOpcode;
6391 uint32_t DwordLength;
6392 uint32_t ScratchSpaceBasePointer;
6393 uint32_t StackSize;
6394 uint32_t PerThreadScratchSpace;
6395 uint32_t ScratchSpaceBasePointerHigh;
6396 uint32_t MaximumNumberofThreads;
6397 uint32_t NumberofURBEntries;
6398 #define Maintainingtheexistingtimestampstate 0
6399 #define Resettingrelativetimerandlatchingtheglobaltimestamp 1
6400 uint32_t ResetGatewayTimer;
6401 #define MaintainingOpenGatewayForwardMsgCloseGatewayprotocollegacymode 0
6402 #define BypassingOpenGatewayCloseGatewayprotocol 1
6403 uint32_t BypassGatewayControl;
6404 uint32_t SliceDisable;
6405 uint32_t URBEntryAllocationSize;
6406 uint32_t CURBEAllocationSize;
6407 #define Scoreboarddisabled 0
6408 #define Scoreboardenabled 1
6409 uint32_t ScoreboardEnable;
6410 #define StallingScoreboard 0
6411 #define NonStallingScoreboard 1
6412 uint32_t ScoreboardType;
6413 uint32_t ScoreboardMask;
6414 uint32_t Scoreboard3DeltaY;
6415 uint32_t Scoreboard3DeltaX;
6416 uint32_t Scoreboard2DeltaY;
6417 uint32_t Scoreboard2DeltaX;
6418 uint32_t Scoreboard1DeltaY;
6419 uint32_t Scoreboard1DeltaX;
6420 uint32_t Scoreboard0DeltaY;
6421 uint32_t Scoreboard0DeltaX;
6422 uint32_t Scoreboard7DeltaY;
6423 uint32_t Scoreboard7DeltaX;
6424 uint32_t Scoreboard6DeltaY;
6425 uint32_t Scoreboard6DeltaX;
6426 uint32_t Scoreboard5DeltaY;
6427 uint32_t Scoreboard5DeltaX;
6428 uint32_t Scoreboard4DeltaY;
6429 uint32_t Scoreboard4DeltaX;
6430 };
6431
6432 static inline void
6433 GEN8_MEDIA_VFE_STATE_pack(__gen_user_data *data, void * restrict dst,
6434 const struct GEN8_MEDIA_VFE_STATE * restrict values)
6435 {
6436 uint32_t *dw = (uint32_t * restrict) dst;
6437
6438 dw[0] =
6439 __gen_field(values->CommandType, 29, 31) |
6440 __gen_field(values->Pipeline, 27, 28) |
6441 __gen_field(values->MediaCommandOpcode, 24, 26) |
6442 __gen_field(values->SubOpcode, 16, 23) |
6443 __gen_field(values->DwordLength, 0, 15) |
6444 0;
6445
6446 dw[1] =
6447 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
6448 __gen_field(values->StackSize, 4, 7) |
6449 __gen_field(values->PerThreadScratchSpace, 0, 3) |
6450 0;
6451
6452 dw[2] =
6453 __gen_offset(values->ScratchSpaceBasePointerHigh, 0, 15) |
6454 0;
6455
6456 dw[3] =
6457 __gen_field(values->MaximumNumberofThreads, 16, 31) |
6458 __gen_field(values->NumberofURBEntries, 8, 15) |
6459 __gen_field(values->ResetGatewayTimer, 7, 7) |
6460 __gen_field(values->BypassGatewayControl, 6, 6) |
6461 0;
6462
6463 dw[4] =
6464 __gen_field(values->SliceDisable, 0, 1) |
6465 0;
6466
6467 dw[5] =
6468 __gen_field(values->URBEntryAllocationSize, 16, 31) |
6469 __gen_field(values->CURBEAllocationSize, 0, 15) |
6470 0;
6471
6472 dw[6] =
6473 __gen_field(values->ScoreboardEnable, 31, 31) |
6474 __gen_field(values->ScoreboardType, 30, 30) |
6475 __gen_field(values->ScoreboardMask, 0, 7) |
6476 0;
6477
6478 dw[7] =
6479 __gen_field(values->Scoreboard3DeltaY, 28, 31) |
6480 __gen_field(values->Scoreboard3DeltaX, 24, 27) |
6481 __gen_field(values->Scoreboard2DeltaY, 20, 23) |
6482 __gen_field(values->Scoreboard2DeltaX, 16, 19) |
6483 __gen_field(values->Scoreboard1DeltaY, 12, 15) |
6484 __gen_field(values->Scoreboard1DeltaX, 8, 11) |
6485 __gen_field(values->Scoreboard0DeltaY, 4, 7) |
6486 __gen_field(values->Scoreboard0DeltaX, 0, 3) |
6487 0;
6488
6489 dw[8] =
6490 __gen_field(values->Scoreboard7DeltaY, 28, 31) |
6491 __gen_field(values->Scoreboard7DeltaX, 24, 27) |
6492 __gen_field(values->Scoreboard6DeltaY, 20, 23) |
6493 __gen_field(values->Scoreboard6DeltaX, 16, 19) |
6494 __gen_field(values->Scoreboard5DeltaY, 12, 15) |
6495 __gen_field(values->Scoreboard5DeltaX, 8, 11) |
6496 __gen_field(values->Scoreboard4DeltaY, 4, 7) |
6497 __gen_field(values->Scoreboard4DeltaX, 0, 3) |
6498 0;
6499
6500 }
6501
6502 #define GEN8_MI_ARB_CHECK_length 0x00000001
6503 #define GEN8_MI_ARB_CHECK_length_bias 0x00000001
6504 #define GEN8_MI_ARB_CHECK_header \
6505 .CommandType = 0, \
6506 .MICommandOpcode = 5
6507
6508 struct GEN8_MI_ARB_CHECK {
6509 uint32_t CommandType;
6510 uint32_t MICommandOpcode;
6511 };
6512
6513 static inline void
6514 GEN8_MI_ARB_CHECK_pack(__gen_user_data *data, void * restrict dst,
6515 const struct GEN8_MI_ARB_CHECK * restrict values)
6516 {
6517 uint32_t *dw = (uint32_t * restrict) dst;
6518
6519 dw[0] =
6520 __gen_field(values->CommandType, 29, 31) |
6521 __gen_field(values->MICommandOpcode, 23, 28) |
6522 0;
6523
6524 }
6525
6526 #define GEN8_MI_BATCH_BUFFER_END_length 0x00000001
6527 #define GEN8_MI_BATCH_BUFFER_END_length_bias 0x00000001
6528 #define GEN8_MI_BATCH_BUFFER_END_header \
6529 .CommandType = 0, \
6530 .MICommandOpcode = 10
6531
6532 struct GEN8_MI_BATCH_BUFFER_END {
6533 uint32_t CommandType;
6534 uint32_t MICommandOpcode;
6535 };
6536
6537 static inline void
6538 GEN8_MI_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
6539 const struct GEN8_MI_BATCH_BUFFER_END * restrict values)
6540 {
6541 uint32_t *dw = (uint32_t * restrict) dst;
6542
6543 dw[0] =
6544 __gen_field(values->CommandType, 29, 31) |
6545 __gen_field(values->MICommandOpcode, 23, 28) |
6546 0;
6547
6548 }
6549
6550 #define GEN8_MI_BATCH_BUFFER_START_length 0x00000003
6551 #define GEN8_MI_BATCH_BUFFER_START_length_bias 0x00000002
6552 #define GEN8_MI_BATCH_BUFFER_START_header \
6553 .CommandType = 0, \
6554 .MICommandOpcode = 49, \
6555 .DwordLength = 1
6556
6557 struct GEN8_MI_BATCH_BUFFER_START {
6558 uint32_t CommandType;
6559 uint32_t MICommandOpcode;
6560 #define _1stlevelbatch 0
6561 #define _2ndlevelbatch 1
6562 uint32_t _2ndLevelBatchBuffer;
6563 bool AddOffsetEnable;
6564 uint32_t PredicationEnable;
6565 bool ResourceStreamerEnable;
6566 #define ASI_GGTT 0
6567 #define ASI_PPGTT 1
6568 uint32_t AddressSpaceIndicator;
6569 uint32_t DwordLength;
6570 __gen_address_type BatchBufferStartAddress;
6571 };
6572
6573 static inline void
6574 GEN8_MI_BATCH_BUFFER_START_pack(__gen_user_data *data, void * restrict dst,
6575 const struct GEN8_MI_BATCH_BUFFER_START * restrict values)
6576 {
6577 uint32_t *dw = (uint32_t * restrict) dst;
6578
6579 dw[0] =
6580 __gen_field(values->CommandType, 29, 31) |
6581 __gen_field(values->MICommandOpcode, 23, 28) |
6582 __gen_field(values->_2ndLevelBatchBuffer, 22, 22) |
6583 __gen_field(values->AddOffsetEnable, 16, 16) |
6584 __gen_field(values->PredicationEnable, 15, 15) |
6585 __gen_field(values->ResourceStreamerEnable, 10, 10) |
6586 __gen_field(values->AddressSpaceIndicator, 8, 8) |
6587 __gen_field(values->DwordLength, 0, 7) |
6588 0;
6589
6590 uint32_t dw1 =
6591 0;
6592
6593 uint64_t qw1 =
6594 __gen_combine_address(data, &dw[1], values->BatchBufferStartAddress, dw1);
6595
6596 dw[1] = qw1;
6597 dw[2] = qw1 >> 32;
6598
6599 }
6600
6601 #define GEN8_MI_CLFLUSH_length_bias 0x00000002
6602 #define GEN8_MI_CLFLUSH_header \
6603 .CommandType = 0, \
6604 .MICommandOpcode = 39
6605
6606 struct GEN8_MI_CLFLUSH {
6607 uint32_t CommandType;
6608 uint32_t MICommandOpcode;
6609 #define PerProcessGraphicsAddress 0
6610 #define GlobalGraphicsAddress 1
6611 uint32_t UseGlobalGTT;
6612 uint32_t DwordLength;
6613 __gen_address_type PageBaseAddress;
6614 uint32_t StartingCachelineOffset;
6615 /* variable length fields follow */
6616 };
6617
6618 static inline void
6619 GEN8_MI_CLFLUSH_pack(__gen_user_data *data, void * restrict dst,
6620 const struct GEN8_MI_CLFLUSH * restrict values)
6621 {
6622 uint32_t *dw = (uint32_t * restrict) dst;
6623
6624 dw[0] =
6625 __gen_field(values->CommandType, 29, 31) |
6626 __gen_field(values->MICommandOpcode, 23, 28) |
6627 __gen_field(values->UseGlobalGTT, 22, 22) |
6628 __gen_field(values->DwordLength, 0, 9) |
6629 0;
6630
6631 uint32_t dw1 =
6632 __gen_field(values->StartingCachelineOffset, 6, 11) |
6633 0;
6634
6635 uint64_t qw1 =
6636 __gen_combine_address(data, &dw[1], values->PageBaseAddress, dw1);
6637
6638 dw[1] = qw1;
6639 dw[2] = qw1 >> 32;
6640
6641 /* variable length fields follow */
6642 }
6643
6644 #define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_length 0x00000003
6645 #define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_length_bias 0x00000002
6646 #define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_header\
6647 .CommandType = 0, \
6648 .MICommandOpcode = 54, \
6649 .UseGlobalGTT = 0, \
6650 .CompareSemaphore = 0, \
6651 .DwordLength = 1
6652
6653 struct GEN8_MI_CONDITIONAL_BATCH_BUFFER_END {
6654 uint32_t CommandType;
6655 uint32_t MICommandOpcode;
6656 uint32_t UseGlobalGTT;
6657 uint32_t CompareSemaphore;
6658 uint32_t DwordLength;
6659 uint32_t CompareDataDword;
6660 __gen_address_type CompareAddress;
6661 };
6662
6663 static inline void
6664 GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
6665 const struct GEN8_MI_CONDITIONAL_BATCH_BUFFER_END * restrict values)
6666 {
6667 uint32_t *dw = (uint32_t * restrict) dst;
6668
6669 dw[0] =
6670 __gen_field(values->CommandType, 29, 31) |
6671 __gen_field(values->MICommandOpcode, 23, 28) |
6672 __gen_field(values->UseGlobalGTT, 22, 22) |
6673 __gen_field(values->CompareSemaphore, 21, 21) |
6674 __gen_field(values->DwordLength, 0, 7) |
6675 0;
6676
6677 dw[1] =
6678 __gen_field(values->CompareDataDword, 0, 31) |
6679 0;
6680
6681 uint32_t dw2 =
6682 0;
6683
6684 uint64_t qw2 =
6685 __gen_combine_address(data, &dw[2], values->CompareAddress, dw2);
6686
6687 dw[2] = qw2;
6688 dw[3] = qw2 >> 32;
6689
6690 }
6691
6692 #define GEN8_MI_COPY_MEM_MEM_length 0x00000005
6693 #define GEN8_MI_COPY_MEM_MEM_length_bias 0x00000002
6694 #define GEN8_MI_COPY_MEM_MEM_header \
6695 .CommandType = 0, \
6696 .MICommandOpcode = 46, \
6697 .DwordLength = 3
6698
6699 struct GEN8_MI_COPY_MEM_MEM {
6700 uint32_t CommandType;
6701 uint32_t MICommandOpcode;
6702 #define PerProcessGraphicsAddress 0
6703 #define GlobalGraphicsAddress 1
6704 uint32_t UseGlobalGTTSource;
6705 #define PerProcessGraphicsAddress 0
6706 #define GlobalGraphicsAddress 1
6707 uint32_t UseGlobalGTTDestination;
6708 uint32_t DwordLength;
6709 __gen_address_type DestinationMemoryAddress;
6710 __gen_address_type SourceMemoryAddress;
6711 };
6712
6713 static inline void
6714 GEN8_MI_COPY_MEM_MEM_pack(__gen_user_data *data, void * restrict dst,
6715 const struct GEN8_MI_COPY_MEM_MEM * restrict values)
6716 {
6717 uint32_t *dw = (uint32_t * restrict) dst;
6718
6719 dw[0] =
6720 __gen_field(values->CommandType, 29, 31) |
6721 __gen_field(values->MICommandOpcode, 23, 28) |
6722 __gen_field(values->UseGlobalGTTSource, 22, 22) |
6723 __gen_field(values->UseGlobalGTTDestination, 21, 21) |
6724 __gen_field(values->DwordLength, 0, 7) |
6725 0;
6726
6727 uint32_t dw1 =
6728 0;
6729
6730 uint64_t qw1 =
6731 __gen_combine_address(data, &dw[1], values->DestinationMemoryAddress, dw1);
6732
6733 dw[1] = qw1;
6734 dw[2] = qw1 >> 32;
6735
6736 uint32_t dw3 =
6737 0;
6738
6739 uint64_t qw3 =
6740 __gen_combine_address(data, &dw[3], values->SourceMemoryAddress, dw3);
6741
6742 dw[3] = qw3;
6743 dw[4] = qw3 >> 32;
6744
6745 }
6746
6747 #define GEN8_MI_LOAD_REGISTER_IMM_length 0x00000003
6748 #define GEN8_MI_LOAD_REGISTER_IMM_length_bias 0x00000002
6749 #define GEN8_MI_LOAD_REGISTER_IMM_header \
6750 .CommandType = 0, \
6751 .MICommandOpcode = 34, \
6752 .DwordLength = 1
6753
6754 struct GEN8_MI_LOAD_REGISTER_IMM {
6755 uint32_t CommandType;
6756 uint32_t MICommandOpcode;
6757 uint32_t ByteWriteDisables;
6758 uint32_t DwordLength;
6759 uint32_t RegisterOffset;
6760 uint32_t DataDWord;
6761 };
6762
6763 static inline void
6764 GEN8_MI_LOAD_REGISTER_IMM_pack(__gen_user_data *data, void * restrict dst,
6765 const struct GEN8_MI_LOAD_REGISTER_IMM * restrict values)
6766 {
6767 uint32_t *dw = (uint32_t * restrict) dst;
6768
6769 dw[0] =
6770 __gen_field(values->CommandType, 29, 31) |
6771 __gen_field(values->MICommandOpcode, 23, 28) |
6772 __gen_field(values->ByteWriteDisables, 8, 11) |
6773 __gen_field(values->DwordLength, 0, 7) |
6774 0;
6775
6776 dw[1] =
6777 __gen_offset(values->RegisterOffset, 2, 22) |
6778 0;
6779
6780 dw[2] =
6781 __gen_field(values->DataDWord, 0, 31) |
6782 0;
6783
6784 }
6785
6786 #define GEN8_MI_LOAD_REGISTER_MEM_length 0x00000004
6787 #define GEN8_MI_LOAD_REGISTER_MEM_length_bias 0x00000002
6788 #define GEN8_MI_LOAD_REGISTER_MEM_header \
6789 .CommandType = 0, \
6790 .MICommandOpcode = 41, \
6791 .DwordLength = 2
6792
6793 struct GEN8_MI_LOAD_REGISTER_MEM {
6794 uint32_t CommandType;
6795 uint32_t MICommandOpcode;
6796 bool UseGlobalGTT;
6797 uint32_t AsyncModeEnable;
6798 uint32_t DwordLength;
6799 uint32_t RegisterAddress;
6800 __gen_address_type MemoryAddress;
6801 };
6802
6803 static inline void
6804 GEN8_MI_LOAD_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
6805 const struct GEN8_MI_LOAD_REGISTER_MEM * restrict values)
6806 {
6807 uint32_t *dw = (uint32_t * restrict) dst;
6808
6809 dw[0] =
6810 __gen_field(values->CommandType, 29, 31) |
6811 __gen_field(values->MICommandOpcode, 23, 28) |
6812 __gen_field(values->UseGlobalGTT, 22, 22) |
6813 __gen_field(values->AsyncModeEnable, 21, 21) |
6814 __gen_field(values->DwordLength, 0, 7) |
6815 0;
6816
6817 dw[1] =
6818 __gen_offset(values->RegisterAddress, 2, 22) |
6819 0;
6820
6821 uint32_t dw2 =
6822 0;
6823
6824 uint64_t qw2 =
6825 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
6826
6827 dw[2] = qw2;
6828 dw[3] = qw2 >> 32;
6829
6830 }
6831
6832 #define GEN8_MI_LOAD_SCAN_LINES_EXCL_length 0x00000002
6833 #define GEN8_MI_LOAD_SCAN_LINES_EXCL_length_bias 0x00000002
6834 #define GEN8_MI_LOAD_SCAN_LINES_EXCL_header \
6835 .CommandType = 0, \
6836 .MICommandOpcode = 19, \
6837 .DwordLength = 0
6838
6839 struct GEN8_MI_LOAD_SCAN_LINES_EXCL {
6840 uint32_t CommandType;
6841 uint32_t MICommandOpcode;
6842 #define DisplayPlaneA 0
6843 #define DisplayPlaneB 1
6844 #define DisplayPlaneC 4
6845 uint32_t DisplayPlaneSelect;
6846 uint32_t DwordLength;
6847 uint32_t StartScanLineNumber;
6848 uint32_t EndScanLineNumber;
6849 };
6850
6851 static inline void
6852 GEN8_MI_LOAD_SCAN_LINES_EXCL_pack(__gen_user_data *data, void * restrict dst,
6853 const struct GEN8_MI_LOAD_SCAN_LINES_EXCL * restrict values)
6854 {
6855 uint32_t *dw = (uint32_t * restrict) dst;
6856
6857 dw[0] =
6858 __gen_field(values->CommandType, 29, 31) |
6859 __gen_field(values->MICommandOpcode, 23, 28) |
6860 __gen_field(values->DisplayPlaneSelect, 19, 21) |
6861 __gen_field(values->DwordLength, 0, 5) |
6862 0;
6863
6864 dw[1] =
6865 __gen_field(values->StartScanLineNumber, 16, 28) |
6866 __gen_field(values->EndScanLineNumber, 0, 12) |
6867 0;
6868
6869 }
6870
6871 #define GEN8_MI_LOAD_SCAN_LINES_INCL_length 0x00000002
6872 #define GEN8_MI_LOAD_SCAN_LINES_INCL_length_bias 0x00000002
6873 #define GEN8_MI_LOAD_SCAN_LINES_INCL_header \
6874 .CommandType = 0, \
6875 .MICommandOpcode = 18, \
6876 .DwordLength = 0
6877
6878 struct GEN8_MI_LOAD_SCAN_LINES_INCL {
6879 uint32_t CommandType;
6880 uint32_t MICommandOpcode;
6881 #define DisplayPlaneA 0
6882 #define DisplayPlaneB 1
6883 #define DisplayPlaneC 4
6884 uint32_t DisplayPlaneSelect;
6885 #define NeverForward 0
6886 #define AlwaysForward 1
6887 #define ConditionallyForward 2
6888 bool ScanLineEventDoneForward;
6889 uint32_t DwordLength;
6890 uint32_t StartScanLineNumber;
6891 uint32_t EndScanLineNumber;
6892 };
6893
6894 static inline void
6895 GEN8_MI_LOAD_SCAN_LINES_INCL_pack(__gen_user_data *data, void * restrict dst,
6896 const struct GEN8_MI_LOAD_SCAN_LINES_INCL * restrict values)
6897 {
6898 uint32_t *dw = (uint32_t * restrict) dst;
6899
6900 dw[0] =
6901 __gen_field(values->CommandType, 29, 31) |
6902 __gen_field(values->MICommandOpcode, 23, 28) |
6903 __gen_field(values->DisplayPlaneSelect, 19, 21) |
6904 __gen_field(values->ScanLineEventDoneForward, 17, 18) |
6905 __gen_field(values->DwordLength, 0, 5) |
6906 0;
6907
6908 dw[1] =
6909 __gen_field(values->StartScanLineNumber, 16, 28) |
6910 __gen_field(values->EndScanLineNumber, 0, 12) |
6911 0;
6912
6913 }
6914
6915 #define GEN8_MI_LOAD_URB_MEM_length 0x00000004
6916 #define GEN8_MI_LOAD_URB_MEM_length_bias 0x00000002
6917 #define GEN8_MI_LOAD_URB_MEM_header \
6918 .CommandType = 0, \
6919 .MICommandOpcode = 44, \
6920 .DwordLength = 2
6921
6922 struct GEN8_MI_LOAD_URB_MEM {
6923 uint32_t CommandType;
6924 uint32_t MICommandOpcode;
6925 uint32_t DwordLength;
6926 uint32_t URBAddress;
6927 __gen_address_type MemoryAddress;
6928 };
6929
6930 static inline void
6931 GEN8_MI_LOAD_URB_MEM_pack(__gen_user_data *data, void * restrict dst,
6932 const struct GEN8_MI_LOAD_URB_MEM * restrict values)
6933 {
6934 uint32_t *dw = (uint32_t * restrict) dst;
6935
6936 dw[0] =
6937 __gen_field(values->CommandType, 29, 31) |
6938 __gen_field(values->MICommandOpcode, 23, 28) |
6939 __gen_field(values->DwordLength, 0, 7) |
6940 0;
6941
6942 dw[1] =
6943 __gen_field(values->URBAddress, 2, 14) |
6944 0;
6945
6946 uint32_t dw2 =
6947 0;
6948
6949 uint64_t qw2 =
6950 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
6951
6952 dw[2] = qw2;
6953 dw[3] = qw2 >> 32;
6954
6955 }
6956
6957 #define GEN8_MI_MATH_length_bias 0x00000002
6958 #define GEN8_MI_MATH_header \
6959 .CommandType = 0, \
6960 .MICommandOpcode = 26
6961
6962 struct GEN8_MI_MATH {
6963 uint32_t CommandType;
6964 uint32_t MICommandOpcode;
6965 uint32_t DwordLength;
6966 uint32_t ALUINSTRUCTION1;
6967 uint32_t ALUINSTRUCTION2;
6968 /* variable length fields follow */
6969 };
6970
6971 static inline void
6972 GEN8_MI_MATH_pack(__gen_user_data *data, void * restrict dst,
6973 const struct GEN8_MI_MATH * restrict values)
6974 {
6975 uint32_t *dw = (uint32_t * restrict) dst;
6976
6977 dw[0] =
6978 __gen_field(values->CommandType, 29, 31) |
6979 __gen_field(values->MICommandOpcode, 23, 28) |
6980 __gen_field(values->DwordLength, 0, 5) |
6981 0;
6982
6983 dw[1] =
6984 __gen_field(values->ALUINSTRUCTION1, 0, 31) |
6985 0;
6986
6987 dw[2] =
6988 __gen_field(values->ALUINSTRUCTION2, 0, 31) |
6989 0;
6990
6991 /* variable length fields follow */
6992 }
6993
6994 #define GEN8_MI_NOOP_length 0x00000001
6995 #define GEN8_MI_NOOP_length_bias 0x00000001
6996 #define GEN8_MI_NOOP_header \
6997 .CommandType = 0, \
6998 .MICommandOpcode = 0
6999
7000 struct GEN8_MI_NOOP {
7001 uint32_t CommandType;
7002 uint32_t MICommandOpcode;
7003 bool IdentificationNumberRegisterWriteEnable;
7004 uint32_t IdentificationNumber;
7005 };
7006
7007 static inline void
7008 GEN8_MI_NOOP_pack(__gen_user_data *data, void * restrict dst,
7009 const struct GEN8_MI_NOOP * restrict values)
7010 {
7011 uint32_t *dw = (uint32_t * restrict) dst;
7012
7013 dw[0] =
7014 __gen_field(values->CommandType, 29, 31) |
7015 __gen_field(values->MICommandOpcode, 23, 28) |
7016 __gen_field(values->IdentificationNumberRegisterWriteEnable, 22, 22) |
7017 __gen_field(values->IdentificationNumber, 0, 21) |
7018 0;
7019
7020 }
7021
7022 #define GEN8_MI_PREDICATE_length 0x00000001
7023 #define GEN8_MI_PREDICATE_length_bias 0x00000001
7024 #define GEN8_MI_PREDICATE_header \
7025 .CommandType = 0, \
7026 .MICommandOpcode = 12
7027
7028 struct GEN8_MI_PREDICATE {
7029 uint32_t CommandType;
7030 uint32_t MICommandOpcode;
7031 #define LOAD_KEEP 0
7032 #define LOAD_LOAD 2
7033 #define LOAD_LOADINV 3
7034 uint32_t LoadOperation;
7035 #define COMBINE_SET 0
7036 #define COMBINE_AND 1
7037 #define COMBINE_OR 2
7038 #define COMBINE_XOR 3
7039 uint32_t CombineOperation;
7040 #define COMPARE_SRCS_EQUAL 2
7041 #define COMPARE_DELTAS_EQUAL 3
7042 uint32_t CompareOperation;
7043 };
7044
7045 static inline void
7046 GEN8_MI_PREDICATE_pack(__gen_user_data *data, void * restrict dst,
7047 const struct GEN8_MI_PREDICATE * restrict values)
7048 {
7049 uint32_t *dw = (uint32_t * restrict) dst;
7050
7051 dw[0] =
7052 __gen_field(values->CommandType, 29, 31) |
7053 __gen_field(values->MICommandOpcode, 23, 28) |
7054 __gen_field(values->LoadOperation, 6, 7) |
7055 __gen_field(values->CombineOperation, 3, 4) |
7056 __gen_field(values->CompareOperation, 0, 1) |
7057 0;
7058
7059 }
7060
7061 #define GEN8_MI_REPORT_HEAD_length 0x00000001
7062 #define GEN8_MI_REPORT_HEAD_length_bias 0x00000001
7063 #define GEN8_MI_REPORT_HEAD_header \
7064 .CommandType = 0, \
7065 .MICommandOpcode = 7
7066
7067 struct GEN8_MI_REPORT_HEAD {
7068 uint32_t CommandType;
7069 uint32_t MICommandOpcode;
7070 };
7071
7072 static inline void
7073 GEN8_MI_REPORT_HEAD_pack(__gen_user_data *data, void * restrict dst,
7074 const struct GEN8_MI_REPORT_HEAD * restrict values)
7075 {
7076 uint32_t *dw = (uint32_t * restrict) dst;
7077
7078 dw[0] =
7079 __gen_field(values->CommandType, 29, 31) |
7080 __gen_field(values->MICommandOpcode, 23, 28) |
7081 0;
7082
7083 }
7084
7085 #define GEN8_MI_RS_CONTEXT_length 0x00000001
7086 #define GEN8_MI_RS_CONTEXT_length_bias 0x00000001
7087 #define GEN8_MI_RS_CONTEXT_header \
7088 .CommandType = 0, \
7089 .MICommandOpcode = 15
7090
7091 struct GEN8_MI_RS_CONTEXT {
7092 uint32_t CommandType;
7093 uint32_t MICommandOpcode;
7094 #define RS_RESTORE 0
7095 #define RS_SAVE 1
7096 uint32_t ResourceStreamerSave;
7097 };
7098
7099 static inline void
7100 GEN8_MI_RS_CONTEXT_pack(__gen_user_data *data, void * restrict dst,
7101 const struct GEN8_MI_RS_CONTEXT * restrict values)
7102 {
7103 uint32_t *dw = (uint32_t * restrict) dst;
7104
7105 dw[0] =
7106 __gen_field(values->CommandType, 29, 31) |
7107 __gen_field(values->MICommandOpcode, 23, 28) |
7108 __gen_field(values->ResourceStreamerSave, 0, 0) |
7109 0;
7110
7111 }
7112
7113 #define GEN8_MI_RS_CONTROL_length 0x00000001
7114 #define GEN8_MI_RS_CONTROL_length_bias 0x00000001
7115 #define GEN8_MI_RS_CONTROL_header \
7116 .CommandType = 0, \
7117 .MICommandOpcode = 6
7118
7119 struct GEN8_MI_RS_CONTROL {
7120 uint32_t CommandType;
7121 uint32_t MICommandOpcode;
7122 #define RS_STOP 0
7123 #define RS_START 1
7124 uint32_t ResourceStreamerControl;
7125 };
7126
7127 static inline void
7128 GEN8_MI_RS_CONTROL_pack(__gen_user_data *data, void * restrict dst,
7129 const struct GEN8_MI_RS_CONTROL * restrict values)
7130 {
7131 uint32_t *dw = (uint32_t * restrict) dst;
7132
7133 dw[0] =
7134 __gen_field(values->CommandType, 29, 31) |
7135 __gen_field(values->MICommandOpcode, 23, 28) |
7136 __gen_field(values->ResourceStreamerControl, 0, 0) |
7137 0;
7138
7139 }
7140
7141 #define GEN8_MI_RS_STORE_DATA_IMM_length 0x00000004
7142 #define GEN8_MI_RS_STORE_DATA_IMM_length_bias 0x00000002
7143 #define GEN8_MI_RS_STORE_DATA_IMM_header \
7144 .CommandType = 0, \
7145 .MICommandOpcode = 43, \
7146 .DwordLength = 2
7147
7148 struct GEN8_MI_RS_STORE_DATA_IMM {
7149 uint32_t CommandType;
7150 uint32_t MICommandOpcode;
7151 uint32_t DwordLength;
7152 __gen_address_type DestinationAddress;
7153 uint32_t CoreModeEnable;
7154 uint32_t DataDWord0;
7155 };
7156
7157 static inline void
7158 GEN8_MI_RS_STORE_DATA_IMM_pack(__gen_user_data *data, void * restrict dst,
7159 const struct GEN8_MI_RS_STORE_DATA_IMM * restrict values)
7160 {
7161 uint32_t *dw = (uint32_t * restrict) dst;
7162
7163 dw[0] =
7164 __gen_field(values->CommandType, 29, 31) |
7165 __gen_field(values->MICommandOpcode, 23, 28) |
7166 __gen_field(values->DwordLength, 0, 7) |
7167 0;
7168
7169 uint32_t dw1 =
7170 __gen_field(values->CoreModeEnable, 0, 0) |
7171 0;
7172
7173 uint64_t qw1 =
7174 __gen_combine_address(data, &dw[1], values->DestinationAddress, dw1);
7175
7176 dw[1] = qw1;
7177 dw[2] = qw1 >> 32;
7178
7179 dw[3] =
7180 __gen_field(values->DataDWord0, 0, 31) |
7181 0;
7182
7183 }
7184
7185 #define GEN8_MI_SET_CONTEXT_length 0x00000002
7186 #define GEN8_MI_SET_CONTEXT_length_bias 0x00000002
7187 #define GEN8_MI_SET_CONTEXT_header \
7188 .CommandType = 0, \
7189 .MICommandOpcode = 24, \
7190 .DwordLength = 0
7191
7192 struct GEN8_MI_SET_CONTEXT {
7193 uint32_t CommandType;
7194 uint32_t MICommandOpcode;
7195 uint32_t DwordLength;
7196 __gen_address_type LogicalContextAddress;
7197 uint32_t ReservedMustbe1;
7198 bool CoreModeEnable;
7199 bool ResourceStreamerStateSaveEnable;
7200 bool ResourceStreamerStateRestoreEnable;
7201 uint32_t ForceRestore;
7202 uint32_t RestoreInhibit;
7203 };
7204
7205 static inline void
7206 GEN8_MI_SET_CONTEXT_pack(__gen_user_data *data, void * restrict dst,
7207 const struct GEN8_MI_SET_CONTEXT * restrict values)
7208 {
7209 uint32_t *dw = (uint32_t * restrict) dst;
7210
7211 dw[0] =
7212 __gen_field(values->CommandType, 29, 31) |
7213 __gen_field(values->MICommandOpcode, 23, 28) |
7214 __gen_field(values->DwordLength, 0, 7) |
7215 0;
7216
7217 uint32_t dw1 =
7218 __gen_field(values->ReservedMustbe1, 8, 8) |
7219 __gen_field(values->CoreModeEnable, 4, 4) |
7220 __gen_field(values->ResourceStreamerStateSaveEnable, 3, 3) |
7221 __gen_field(values->ResourceStreamerStateRestoreEnable, 2, 2) |
7222 __gen_field(values->ForceRestore, 1, 1) |
7223 __gen_field(values->RestoreInhibit, 0, 0) |
7224 0;
7225
7226 dw[1] =
7227 __gen_combine_address(data, &dw[1], values->LogicalContextAddress, dw1);
7228
7229 }
7230
7231 #define GEN8_MI_SET_PREDICATE_length 0x00000001
7232 #define GEN8_MI_SET_PREDICATE_length_bias 0x00000001
7233 #define GEN8_MI_SET_PREDICATE_header \
7234 .CommandType = 0, \
7235 .MICommandOpcode = 1
7236
7237 struct GEN8_MI_SET_PREDICATE {
7238 uint32_t CommandType;
7239 uint32_t MICommandOpcode;
7240 #define NOOPNever 0
7241 #define NOOPonResult2clear 1
7242 #define NOOPonResult2set 2
7243 #define NOOPonResultclear 3
7244 #define NOOPonResultset 4
7245 #define Executewhenonesliceenabled 5
7246 #define Executewhentwoslicesareenabled 6
7247 #define Executewhenthreeslicesareenabled 7
7248 #define NOOPAlways 15
7249 uint32_t PREDICATEENABLE;
7250 };
7251
7252 static inline void
7253 GEN8_MI_SET_PREDICATE_pack(__gen_user_data *data, void * restrict dst,
7254 const struct GEN8_MI_SET_PREDICATE * restrict values)
7255 {
7256 uint32_t *dw = (uint32_t * restrict) dst;
7257
7258 dw[0] =
7259 __gen_field(values->CommandType, 29, 31) |
7260 __gen_field(values->MICommandOpcode, 23, 28) |
7261 __gen_field(values->PREDICATEENABLE, 0, 3) |
7262 0;
7263
7264 }
7265
7266 #define GEN8_MI_STORE_DATA_IMM_length 0x00000004
7267 #define GEN8_MI_STORE_DATA_IMM_length_bias 0x00000002
7268 #define GEN8_MI_STORE_DATA_IMM_header \
7269 .CommandType = 0, \
7270 .MICommandOpcode = 32, \
7271 .DwordLength = 2
7272
7273 struct GEN8_MI_STORE_DATA_IMM {
7274 uint32_t CommandType;
7275 uint32_t MICommandOpcode;
7276 bool UseGlobalGTT;
7277 bool StoreQword;
7278 uint32_t DwordLength;
7279 __gen_address_type Address;
7280 uint32_t CoreModeEnable;
7281 uint32_t DataDWord0;
7282 uint32_t DataDWord1;
7283 };
7284
7285 static inline void
7286 GEN8_MI_STORE_DATA_IMM_pack(__gen_user_data *data, void * restrict dst,
7287 const struct GEN8_MI_STORE_DATA_IMM * restrict values)
7288 {
7289 uint32_t *dw = (uint32_t * restrict) dst;
7290
7291 dw[0] =
7292 __gen_field(values->CommandType, 29, 31) |
7293 __gen_field(values->MICommandOpcode, 23, 28) |
7294 __gen_field(values->UseGlobalGTT, 22, 22) |
7295 __gen_field(values->StoreQword, 21, 21) |
7296 __gen_field(values->DwordLength, 0, 9) |
7297 0;
7298
7299 uint32_t dw1 =
7300 __gen_field(values->CoreModeEnable, 0, 0) |
7301 0;
7302
7303 uint64_t qw1 =
7304 __gen_combine_address(data, &dw[1], values->Address, dw1);
7305
7306 dw[1] = qw1;
7307 dw[2] = qw1 >> 32;
7308
7309 dw[3] =
7310 __gen_field(values->DataDWord0, 0, 31) |
7311 0;
7312
7313 dw[4] =
7314 __gen_field(values->DataDWord1, 0, 31) |
7315 0;
7316
7317 }
7318
7319 #define GEN8_MI_STORE_DATA_INDEX_length 0x00000003
7320 #define GEN8_MI_STORE_DATA_INDEX_length_bias 0x00000002
7321 #define GEN8_MI_STORE_DATA_INDEX_header \
7322 .CommandType = 0, \
7323 .MICommandOpcode = 33, \
7324 .DwordLength = 1
7325
7326 struct GEN8_MI_STORE_DATA_INDEX {
7327 uint32_t CommandType;
7328 uint32_t MICommandOpcode;
7329 uint32_t UsePerProcessHardwareStatusPage;
7330 uint32_t DwordLength;
7331 uint32_t Offset;
7332 uint32_t DataDWord0;
7333 uint32_t DataDWord1;
7334 };
7335
7336 static inline void
7337 GEN8_MI_STORE_DATA_INDEX_pack(__gen_user_data *data, void * restrict dst,
7338 const struct GEN8_MI_STORE_DATA_INDEX * restrict values)
7339 {
7340 uint32_t *dw = (uint32_t * restrict) dst;
7341
7342 dw[0] =
7343 __gen_field(values->CommandType, 29, 31) |
7344 __gen_field(values->MICommandOpcode, 23, 28) |
7345 __gen_field(values->UsePerProcessHardwareStatusPage, 21, 21) |
7346 __gen_field(values->DwordLength, 0, 7) |
7347 0;
7348
7349 dw[1] =
7350 __gen_field(values->Offset, 2, 11) |
7351 0;
7352
7353 dw[2] =
7354 __gen_field(values->DataDWord0, 0, 31) |
7355 0;
7356
7357 dw[3] =
7358 __gen_field(values->DataDWord1, 0, 31) |
7359 0;
7360
7361 }
7362
7363 #define GEN8_MI_STORE_URB_MEM_length 0x00000004
7364 #define GEN8_MI_STORE_URB_MEM_length_bias 0x00000002
7365 #define GEN8_MI_STORE_URB_MEM_header \
7366 .CommandType = 0, \
7367 .MICommandOpcode = 45, \
7368 .DwordLength = 2
7369
7370 struct GEN8_MI_STORE_URB_MEM {
7371 uint32_t CommandType;
7372 uint32_t MICommandOpcode;
7373 uint32_t DwordLength;
7374 uint32_t URBAddress;
7375 __gen_address_type MemoryAddress;
7376 };
7377
7378 static inline void
7379 GEN8_MI_STORE_URB_MEM_pack(__gen_user_data *data, void * restrict dst,
7380 const struct GEN8_MI_STORE_URB_MEM * restrict values)
7381 {
7382 uint32_t *dw = (uint32_t * restrict) dst;
7383
7384 dw[0] =
7385 __gen_field(values->CommandType, 29, 31) |
7386 __gen_field(values->MICommandOpcode, 23, 28) |
7387 __gen_field(values->DwordLength, 0, 7) |
7388 0;
7389
7390 dw[1] =
7391 __gen_field(values->URBAddress, 2, 14) |
7392 0;
7393
7394 uint32_t dw2 =
7395 0;
7396
7397 uint64_t qw2 =
7398 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
7399
7400 dw[2] = qw2;
7401 dw[3] = qw2 >> 32;
7402
7403 }
7404
7405 #define GEN8_MI_SUSPEND_FLUSH_length 0x00000001
7406 #define GEN8_MI_SUSPEND_FLUSH_length_bias 0x00000001
7407 #define GEN8_MI_SUSPEND_FLUSH_header \
7408 .CommandType = 0, \
7409 .MICommandOpcode = 11
7410
7411 struct GEN8_MI_SUSPEND_FLUSH {
7412 uint32_t CommandType;
7413 uint32_t MICommandOpcode;
7414 bool SuspendFlush;
7415 };
7416
7417 static inline void
7418 GEN8_MI_SUSPEND_FLUSH_pack(__gen_user_data *data, void * restrict dst,
7419 const struct GEN8_MI_SUSPEND_FLUSH * restrict values)
7420 {
7421 uint32_t *dw = (uint32_t * restrict) dst;
7422
7423 dw[0] =
7424 __gen_field(values->CommandType, 29, 31) |
7425 __gen_field(values->MICommandOpcode, 23, 28) |
7426 __gen_field(values->SuspendFlush, 0, 0) |
7427 0;
7428
7429 }
7430
7431 #define GEN8_MI_TOPOLOGY_FILTER_length 0x00000001
7432 #define GEN8_MI_TOPOLOGY_FILTER_length_bias 0x00000001
7433 #define GEN8_MI_TOPOLOGY_FILTER_header \
7434 .CommandType = 0, \
7435 .MICommandOpcode = 13
7436
7437 struct GEN8_MI_TOPOLOGY_FILTER {
7438 uint32_t CommandType;
7439 uint32_t MICommandOpcode;
7440 uint32_t TopologyFilterValue;
7441 };
7442
7443 static inline void
7444 GEN8_MI_TOPOLOGY_FILTER_pack(__gen_user_data *data, void * restrict dst,
7445 const struct GEN8_MI_TOPOLOGY_FILTER * restrict values)
7446 {
7447 uint32_t *dw = (uint32_t * restrict) dst;
7448
7449 dw[0] =
7450 __gen_field(values->CommandType, 29, 31) |
7451 __gen_field(values->MICommandOpcode, 23, 28) |
7452 __gen_field(values->TopologyFilterValue, 0, 5) |
7453 0;
7454
7455 }
7456
7457 #define GEN8_MI_UPDATE_GTT_length_bias 0x00000002
7458 #define GEN8_MI_UPDATE_GTT_header \
7459 .CommandType = 0, \
7460 .MICommandOpcode = 35
7461
7462 struct GEN8_MI_UPDATE_GTT {
7463 uint32_t CommandType;
7464 uint32_t MICommandOpcode;
7465 uint32_t DwordLength;
7466 __gen_address_type EntryAddress;
7467 /* variable length fields follow */
7468 };
7469
7470 static inline void
7471 GEN8_MI_UPDATE_GTT_pack(__gen_user_data *data, void * restrict dst,
7472 const struct GEN8_MI_UPDATE_GTT * restrict values)
7473 {
7474 uint32_t *dw = (uint32_t * restrict) dst;
7475
7476 dw[0] =
7477 __gen_field(values->CommandType, 29, 31) |
7478 __gen_field(values->MICommandOpcode, 23, 28) |
7479 __gen_field(values->DwordLength, 0, 9) |
7480 0;
7481
7482 uint32_t dw1 =
7483 0;
7484
7485 dw[1] =
7486 __gen_combine_address(data, &dw[1], values->EntryAddress, dw1);
7487
7488 /* variable length fields follow */
7489 }
7490
7491 #define GEN8_MI_URB_ATOMIC_ALLOC_length 0x00000001
7492 #define GEN8_MI_URB_ATOMIC_ALLOC_length_bias 0x00000001
7493 #define GEN8_MI_URB_ATOMIC_ALLOC_header \
7494 .CommandType = 0, \
7495 .MICommandOpcode = 9
7496
7497 struct GEN8_MI_URB_ATOMIC_ALLOC {
7498 uint32_t CommandType;
7499 uint32_t MICommandOpcode;
7500 uint32_t URBAtomicStorageOffset;
7501 uint32_t URBAtomicStorageSize;
7502 };
7503
7504 static inline void
7505 GEN8_MI_URB_ATOMIC_ALLOC_pack(__gen_user_data *data, void * restrict dst,
7506 const struct GEN8_MI_URB_ATOMIC_ALLOC * restrict values)
7507 {
7508 uint32_t *dw = (uint32_t * restrict) dst;
7509
7510 dw[0] =
7511 __gen_field(values->CommandType, 29, 31) |
7512 __gen_field(values->MICommandOpcode, 23, 28) |
7513 __gen_field(values->URBAtomicStorageOffset, 12, 19) |
7514 __gen_field(values->URBAtomicStorageSize, 0, 8) |
7515 0;
7516
7517 }
7518
7519 #define GEN8_MI_URB_CLEAR_length 0x00000002
7520 #define GEN8_MI_URB_CLEAR_length_bias 0x00000002
7521 #define GEN8_MI_URB_CLEAR_header \
7522 .CommandType = 0, \
7523 .MICommandOpcode = 25, \
7524 .DwordLength = 0
7525
7526 struct GEN8_MI_URB_CLEAR {
7527 uint32_t CommandType;
7528 uint32_t MICommandOpcode;
7529 uint32_t DwordLength;
7530 uint32_t URBClearLength;
7531 uint32_t URBAddress;
7532 };
7533
7534 static inline void
7535 GEN8_MI_URB_CLEAR_pack(__gen_user_data *data, void * restrict dst,
7536 const struct GEN8_MI_URB_CLEAR * restrict values)
7537 {
7538 uint32_t *dw = (uint32_t * restrict) dst;
7539
7540 dw[0] =
7541 __gen_field(values->CommandType, 29, 31) |
7542 __gen_field(values->MICommandOpcode, 23, 28) |
7543 __gen_field(values->DwordLength, 0, 7) |
7544 0;
7545
7546 dw[1] =
7547 __gen_field(values->URBClearLength, 16, 29) |
7548 __gen_offset(values->URBAddress, 0, 14) |
7549 0;
7550
7551 }
7552
7553 #define GEN8_MI_USER_INTERRUPT_length 0x00000001
7554 #define GEN8_MI_USER_INTERRUPT_length_bias 0x00000001
7555 #define GEN8_MI_USER_INTERRUPT_header \
7556 .CommandType = 0, \
7557 .MICommandOpcode = 2
7558
7559 struct GEN8_MI_USER_INTERRUPT {
7560 uint32_t CommandType;
7561 uint32_t MICommandOpcode;
7562 };
7563
7564 static inline void
7565 GEN8_MI_USER_INTERRUPT_pack(__gen_user_data *data, void * restrict dst,
7566 const struct GEN8_MI_USER_INTERRUPT * restrict values)
7567 {
7568 uint32_t *dw = (uint32_t * restrict) dst;
7569
7570 dw[0] =
7571 __gen_field(values->CommandType, 29, 31) |
7572 __gen_field(values->MICommandOpcode, 23, 28) |
7573 0;
7574
7575 }
7576
7577 #define GEN8_MI_WAIT_FOR_EVENT_length 0x00000001
7578 #define GEN8_MI_WAIT_FOR_EVENT_length_bias 0x00000001
7579 #define GEN8_MI_WAIT_FOR_EVENT_header \
7580 .CommandType = 0, \
7581 .MICommandOpcode = 3
7582
7583 struct GEN8_MI_WAIT_FOR_EVENT {
7584 uint32_t CommandType;
7585 uint32_t MICommandOpcode;
7586 bool DisplayPipeCVerticalBlankWaitEnable;
7587 bool DisplaySpriteCFlipPendingWaitEnable;
7588 bool DisplayPlaneCFlipPendingWaitEnable;
7589 bool DisplayPipeCScanLineWaitEnable;
7590 bool DisplayPipeBVerticalBlankWaitEnable;
7591 bool DisplaySpriteBFlipPendingWaitEnable;
7592 bool DisplayPlaneBFlipPendingWaitEnable;
7593 bool DisplayPipeBScanLineWaitEnable;
7594 bool DisplayPipeAVerticalBlankWaitEnable;
7595 bool DisplaySpriteAFlipPendingWaitEnable;
7596 bool DisplayPlaneAFlipPendingWaitEnable;
7597 bool DisplayPipeAScanLineWaitEnable;
7598 };
7599
7600 static inline void
7601 GEN8_MI_WAIT_FOR_EVENT_pack(__gen_user_data *data, void * restrict dst,
7602 const struct GEN8_MI_WAIT_FOR_EVENT * restrict values)
7603 {
7604 uint32_t *dw = (uint32_t * restrict) dst;
7605
7606 dw[0] =
7607 __gen_field(values->CommandType, 29, 31) |
7608 __gen_field(values->MICommandOpcode, 23, 28) |
7609 __gen_field(values->DisplayPipeCVerticalBlankWaitEnable, 21, 21) |
7610 __gen_field(values->DisplaySpriteCFlipPendingWaitEnable, 20, 20) |
7611 __gen_field(values->DisplayPlaneCFlipPendingWaitEnable, 15, 15) |
7612 __gen_field(values->DisplayPipeCScanLineWaitEnable, 14, 14) |
7613 __gen_field(values->DisplayPipeBVerticalBlankWaitEnable, 11, 11) |
7614 __gen_field(values->DisplaySpriteBFlipPendingWaitEnable, 10, 10) |
7615 __gen_field(values->DisplayPlaneBFlipPendingWaitEnable, 9, 9) |
7616 __gen_field(values->DisplayPipeBScanLineWaitEnable, 8, 8) |
7617 __gen_field(values->DisplayPipeAVerticalBlankWaitEnable, 3, 3) |
7618 __gen_field(values->DisplaySpriteAFlipPendingWaitEnable, 2, 2) |
7619 __gen_field(values->DisplayPlaneAFlipPendingWaitEnable, 1, 1) |
7620 __gen_field(values->DisplayPipeAScanLineWaitEnable, 0, 0) |
7621 0;
7622
7623 }
7624
7625 #define GEN8_PIPE_CONTROL_length 0x00000006
7626 #define GEN8_PIPE_CONTROL_length_bias 0x00000002
7627 #define GEN8_PIPE_CONTROL_header \
7628 .CommandType = 3, \
7629 .CommandSubType = 3, \
7630 ._3DCommandOpcode = 2, \
7631 ._3DCommandSubOpcode = 0, \
7632 .DwordLength = 4
7633
7634 struct GEN8_PIPE_CONTROL {
7635 uint32_t CommandType;
7636 uint32_t CommandSubType;
7637 uint32_t _3DCommandOpcode;
7638 uint32_t _3DCommandSubOpcode;
7639 uint32_t DwordLength;
7640 #define DAT_PPGTT 0
7641 #define DAT_GGTT 1
7642 uint32_t DestinationAddressType;
7643 #define NoLRIOperation 0
7644 #define MMIOWriteImmediateData 1
7645 uint32_t LRIPostSyncOperation;
7646 uint32_t StoreDataIndex;
7647 uint32_t CommandStreamerStallEnable;
7648 #define DontReset 0
7649 #define Reset 1
7650 uint32_t GlobalSnapshotCountReset;
7651 uint32_t TLBInvalidate;
7652 bool GenericMediaStateClear;
7653 #define NoWrite 0
7654 #define WriteImmediateData 1
7655 #define WritePSDepthCount 2
7656 #define WriteTimestamp 3
7657 uint32_t PostSyncOperation;
7658 bool DepthStallEnable;
7659 #define DisableFlush 0
7660 #define EnableFlush 1
7661 bool RenderTargetCacheFlushEnable;
7662 bool InstructionCacheInvalidateEnable;
7663 bool TextureCacheInvalidationEnable;
7664 bool IndirectStatePointersDisable;
7665 bool NotifyEnable;
7666 bool PipeControlFlushEnable;
7667 bool DCFlushEnable;
7668 bool VFCacheInvalidationEnable;
7669 bool ConstantCacheInvalidationEnable;
7670 bool StateCacheInvalidationEnable;
7671 bool StallAtPixelScoreboard;
7672 #define FlushDisabled 0
7673 #define FlushEnabled 1
7674 bool DepthCacheFlushEnable;
7675 __gen_address_type Address;
7676 uint64_t ImmediateData;
7677 };
7678
7679 static inline void
7680 GEN8_PIPE_CONTROL_pack(__gen_user_data *data, void * restrict dst,
7681 const struct GEN8_PIPE_CONTROL * restrict values)
7682 {
7683 uint32_t *dw = (uint32_t * restrict) dst;
7684
7685 dw[0] =
7686 __gen_field(values->CommandType, 29, 31) |
7687 __gen_field(values->CommandSubType, 27, 28) |
7688 __gen_field(values->_3DCommandOpcode, 24, 26) |
7689 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
7690 __gen_field(values->DwordLength, 0, 7) |
7691 0;
7692
7693 dw[1] =
7694 __gen_field(values->DestinationAddressType, 24, 24) |
7695 __gen_field(values->LRIPostSyncOperation, 23, 23) |
7696 __gen_field(values->StoreDataIndex, 21, 21) |
7697 __gen_field(values->CommandStreamerStallEnable, 20, 20) |
7698 __gen_field(values->GlobalSnapshotCountReset, 19, 19) |
7699 __gen_field(values->TLBInvalidate, 18, 18) |
7700 __gen_field(values->GenericMediaStateClear, 16, 16) |
7701 __gen_field(values->PostSyncOperation, 14, 15) |
7702 __gen_field(values->DepthStallEnable, 13, 13) |
7703 __gen_field(values->RenderTargetCacheFlushEnable, 12, 12) |
7704 __gen_field(values->InstructionCacheInvalidateEnable, 11, 11) |
7705 __gen_field(values->TextureCacheInvalidationEnable, 10, 10) |
7706 __gen_field(values->IndirectStatePointersDisable, 9, 9) |
7707 __gen_field(values->NotifyEnable, 8, 8) |
7708 __gen_field(values->PipeControlFlushEnable, 7, 7) |
7709 __gen_field(values->DCFlushEnable, 5, 5) |
7710 __gen_field(values->VFCacheInvalidationEnable, 4, 4) |
7711 __gen_field(values->ConstantCacheInvalidationEnable, 3, 3) |
7712 __gen_field(values->StateCacheInvalidationEnable, 2, 2) |
7713 __gen_field(values->StallAtPixelScoreboard, 1, 1) |
7714 __gen_field(values->DepthCacheFlushEnable, 0, 0) |
7715 0;
7716
7717 uint32_t dw2 =
7718 0;
7719
7720 uint64_t qw2 =
7721 __gen_combine_address(data, &dw[2], values->Address, dw2);
7722
7723 dw[2] = qw2;
7724 dw[3] = qw2 >> 32;
7725
7726 uint64_t qw4 =
7727 __gen_field(values->ImmediateData, 0, 63) |
7728 0;
7729
7730 dw[4] = qw4;
7731 dw[5] = qw4 >> 32;
7732
7733 }
7734
7735 #define GEN8_3DSTATE_CONSTANT_BODY_length 0x0000000a
7736
7737 #define GEN8_BINDING_TABLE_EDIT_ENTRY_length 0x00000001
7738
7739 #define GEN8_GATHER_CONSTANT_ENTRY_length 0x00000001
7740
7741 #define GEN8_VERTEX_BUFFER_STATE_length 0x00000004
7742
7743 #define GEN8_VERTEX_ELEMENT_STATE_length 0x00000002
7744
7745 #define GEN8_SO_DECL_ENTRY_length 0x00000002
7746
7747 #define GEN8_SO_DECL_length 0x00000001
7748
7749 #define GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_length 0x00000001
7750
7751 #define GEN8_SCISSOR_RECT_length 0x00000002
7752
7753 struct GEN8_SCISSOR_RECT {
7754 uint32_t ScissorRectangleYMin;
7755 uint32_t ScissorRectangleXMin;
7756 uint32_t ScissorRectangleYMax;
7757 uint32_t ScissorRectangleXMax;
7758 };
7759
7760 static inline void
7761 GEN8_SCISSOR_RECT_pack(__gen_user_data *data, void * restrict dst,
7762 const struct GEN8_SCISSOR_RECT * restrict values)
7763 {
7764 uint32_t *dw = (uint32_t * restrict) dst;
7765
7766 dw[0] =
7767 __gen_field(values->ScissorRectangleYMin, 16, 31) |
7768 __gen_field(values->ScissorRectangleXMin, 0, 15) |
7769 0;
7770
7771 dw[1] =
7772 __gen_field(values->ScissorRectangleYMax, 16, 31) |
7773 __gen_field(values->ScissorRectangleXMax, 0, 15) |
7774 0;
7775
7776 }
7777
7778 #define GEN8_SF_CLIP_VIEWPORT_length 0x00000010
7779
7780 struct GEN8_SF_CLIP_VIEWPORT {
7781 float ViewportMatrixElementm00;
7782 float ViewportMatrixElementm11;
7783 float ViewportMatrixElementm22;
7784 float ViewportMatrixElementm30;
7785 float ViewportMatrixElementm31;
7786 float ViewportMatrixElementm32;
7787 float XMinClipGuardband;
7788 float XMaxClipGuardband;
7789 float YMinClipGuardband;
7790 float YMaxClipGuardband;
7791 float XMinViewPort;
7792 float XMaxViewPort;
7793 float YMinViewPort;
7794 float YMaxViewPort;
7795 };
7796
7797 static inline void
7798 GEN8_SF_CLIP_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
7799 const struct GEN8_SF_CLIP_VIEWPORT * restrict values)
7800 {
7801 uint32_t *dw = (uint32_t * restrict) dst;
7802
7803 dw[0] =
7804 __gen_float(values->ViewportMatrixElementm00) |
7805 0;
7806
7807 dw[1] =
7808 __gen_float(values->ViewportMatrixElementm11) |
7809 0;
7810
7811 dw[2] =
7812 __gen_float(values->ViewportMatrixElementm22) |
7813 0;
7814
7815 dw[3] =
7816 __gen_float(values->ViewportMatrixElementm30) |
7817 0;
7818
7819 dw[4] =
7820 __gen_float(values->ViewportMatrixElementm31) |
7821 0;
7822
7823 dw[5] =
7824 __gen_float(values->ViewportMatrixElementm32) |
7825 0;
7826
7827 dw[6] =
7828 0;
7829
7830 dw[7] =
7831 0;
7832
7833 dw[8] =
7834 __gen_float(values->XMinClipGuardband) |
7835 0;
7836
7837 dw[9] =
7838 __gen_float(values->XMaxClipGuardband) |
7839 0;
7840
7841 dw[10] =
7842 __gen_float(values->YMinClipGuardband) |
7843 0;
7844
7845 dw[11] =
7846 __gen_float(values->YMaxClipGuardband) |
7847 0;
7848
7849 dw[12] =
7850 __gen_float(values->XMinViewPort) |
7851 0;
7852
7853 dw[13] =
7854 __gen_float(values->XMaxViewPort) |
7855 0;
7856
7857 dw[14] =
7858 __gen_float(values->YMinViewPort) |
7859 0;
7860
7861 dw[15] =
7862 __gen_float(values->YMaxViewPort) |
7863 0;
7864
7865 }
7866
7867 #define GEN8_BLEND_STATE_length 0x00000011
7868
7869 struct GEN8_BLEND_STATE_ENTRY {
7870 bool LogicOpEnable;
7871 uint32_t LogicOpFunction;
7872 uint32_t PreBlendSourceOnlyClampEnable;
7873 #define COLORCLAMP_UNORM 0
7874 #define COLORCLAMP_SNORM 1
7875 #define COLORCLAMP_RTFORMAT 2
7876 uint32_t ColorClampRange;
7877 bool PreBlendColorClampEnable;
7878 bool PostBlendColorClampEnable;
7879 bool ColorBufferBlendEnable;
7880 uint32_t SourceBlendFactor;
7881 uint32_t DestinationBlendFactor;
7882 uint32_t ColorBlendFunction;
7883 uint32_t SourceAlphaBlendFactor;
7884 uint32_t DestinationAlphaBlendFactor;
7885 uint32_t AlphaBlendFunction;
7886 bool WriteDisableAlpha;
7887 bool WriteDisableRed;
7888 bool WriteDisableGreen;
7889 bool WriteDisableBlue;
7890 };
7891
7892 static inline void
7893 GEN8_BLEND_STATE_ENTRY_pack(__gen_user_data *data, void * restrict dst,
7894 const struct GEN8_BLEND_STATE_ENTRY * restrict values)
7895 {
7896 uint32_t *dw = (uint32_t * restrict) dst;
7897
7898 uint64_t qw0 =
7899 __gen_field(values->LogicOpEnable, 63, 63) |
7900 __gen_field(values->LogicOpFunction, 59, 62) |
7901 __gen_field(values->PreBlendSourceOnlyClampEnable, 36, 36) |
7902 __gen_field(values->ColorClampRange, 34, 35) |
7903 __gen_field(values->PreBlendColorClampEnable, 33, 33) |
7904 __gen_field(values->PostBlendColorClampEnable, 32, 32) |
7905 __gen_field(values->ColorBufferBlendEnable, 31, 31) |
7906 __gen_field(values->SourceBlendFactor, 26, 30) |
7907 __gen_field(values->DestinationBlendFactor, 21, 25) |
7908 __gen_field(values->ColorBlendFunction, 18, 20) |
7909 __gen_field(values->SourceAlphaBlendFactor, 13, 17) |
7910 __gen_field(values->DestinationAlphaBlendFactor, 8, 12) |
7911 __gen_field(values->AlphaBlendFunction, 5, 7) |
7912 __gen_field(values->WriteDisableAlpha, 3, 3) |
7913 __gen_field(values->WriteDisableRed, 2, 2) |
7914 __gen_field(values->WriteDisableGreen, 1, 1) |
7915 __gen_field(values->WriteDisableBlue, 0, 0) |
7916 0;
7917
7918 dw[0] = qw0;
7919 dw[1] = qw0 >> 32;
7920
7921 }
7922
7923 struct GEN8_BLEND_STATE {
7924 bool AlphaToCoverageEnable;
7925 bool IndependentAlphaBlendEnable;
7926 bool AlphaToOneEnable;
7927 bool AlphaToCoverageDitherEnable;
7928 bool AlphaTestEnable;
7929 uint32_t AlphaTestFunction;
7930 bool ColorDitherEnable;
7931 uint32_t XDitherOffset;
7932 uint32_t YDitherOffset;
7933 struct GEN8_BLEND_STATE_ENTRY Entry[8];
7934 };
7935
7936 static inline void
7937 GEN8_BLEND_STATE_pack(__gen_user_data *data, void * restrict dst,
7938 const struct GEN8_BLEND_STATE * restrict values)
7939 {
7940 uint32_t *dw = (uint32_t * restrict) dst;
7941
7942 dw[0] =
7943 __gen_field(values->AlphaToCoverageEnable, 31, 31) |
7944 __gen_field(values->IndependentAlphaBlendEnable, 30, 30) |
7945 __gen_field(values->AlphaToOneEnable, 29, 29) |
7946 __gen_field(values->AlphaToCoverageDitherEnable, 28, 28) |
7947 __gen_field(values->AlphaTestEnable, 27, 27) |
7948 __gen_field(values->AlphaTestFunction, 24, 26) |
7949 __gen_field(values->ColorDitherEnable, 23, 23) |
7950 __gen_field(values->XDitherOffset, 21, 22) |
7951 __gen_field(values->YDitherOffset, 19, 20) |
7952 0;
7953
7954 for (uint32_t i = 0, j = 1; i < 8; i++, j += 2)
7955 GEN8_BLEND_STATE_ENTRY_pack(data, &dw[j], &values->Entry[i]);
7956 }
7957
7958 #define GEN8_BLEND_STATE_ENTRY_length 0x00000002
7959
7960 #define GEN8_CC_VIEWPORT_length 0x00000002
7961
7962 struct GEN8_CC_VIEWPORT {
7963 float MinimumDepth;
7964 float MaximumDepth;
7965 };
7966
7967 static inline void
7968 GEN8_CC_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
7969 const struct GEN8_CC_VIEWPORT * restrict values)
7970 {
7971 uint32_t *dw = (uint32_t * restrict) dst;
7972
7973 dw[0] =
7974 __gen_float(values->MinimumDepth) |
7975 0;
7976
7977 dw[1] =
7978 __gen_float(values->MaximumDepth) |
7979 0;
7980
7981 }
7982
7983 #define GEN8_COLOR_CALC_STATE_length 0x00000006
7984
7985 struct GEN8_COLOR_CALC_STATE {
7986 uint32_t StencilReferenceValue;
7987 uint32_t BackFaceStencilReferenceValue;
7988 #define Cancelled 0
7989 #define NotCancelled 1
7990 uint32_t RoundDisableFunctionDisable;
7991 #define ALPHATEST_UNORM8 0
7992 #define ALPHATEST_FLOAT32 1
7993 uint32_t AlphaTestFormat;
7994 uint32_t AlphaReferenceValueAsUNORM8;
7995 float AlphaReferenceValueAsFLOAT32;
7996 float BlendConstantColorRed;
7997 float BlendConstantColorGreen;
7998 float BlendConstantColorBlue;
7999 float BlendConstantColorAlpha;
8000 };
8001
8002 static inline void
8003 GEN8_COLOR_CALC_STATE_pack(__gen_user_data *data, void * restrict dst,
8004 const struct GEN8_COLOR_CALC_STATE * restrict values)
8005 {
8006 uint32_t *dw = (uint32_t * restrict) dst;
8007
8008 dw[0] =
8009 __gen_field(values->StencilReferenceValue, 24, 31) |
8010 __gen_field(values->BackFaceStencilReferenceValue, 16, 23) |
8011 __gen_field(values->RoundDisableFunctionDisable, 15, 15) |
8012 __gen_field(values->AlphaTestFormat, 0, 0) |
8013 0;
8014
8015 dw[1] =
8016 __gen_field(values->AlphaReferenceValueAsUNORM8, 0, 31) |
8017 __gen_float(values->AlphaReferenceValueAsFLOAT32) |
8018 0;
8019
8020 dw[2] =
8021 __gen_float(values->BlendConstantColorRed) |
8022 0;
8023
8024 dw[3] =
8025 __gen_float(values->BlendConstantColorGreen) |
8026 0;
8027
8028 dw[4] =
8029 __gen_float(values->BlendConstantColorBlue) |
8030 0;
8031
8032 dw[5] =
8033 __gen_float(values->BlendConstantColorAlpha) |
8034 0;
8035
8036 }
8037
8038 #define GEN8_MEMORY_OBJECT_CONTROL_STATE_length 0x00000001
8039
8040 #define GEN8_INTERFACE_DESCRIPTOR_DATA_length 0x00000008
8041
8042 struct GEN8_INTERFACE_DESCRIPTOR_DATA {
8043 uint32_t KernelStartPointer;
8044 uint32_t KernelStartPointerHigh;
8045 #define Ftz 0
8046 #define SetByKernel 1
8047 uint32_t DenormMode;
8048 #define Multiple 0
8049 #define Single 1
8050 uint32_t SingleProgramFlow;
8051 #define NormalPriority 0
8052 #define HighPriority 1
8053 uint32_t ThreadPriority;
8054 #define IEEE754 0
8055 #define Alternate 1
8056 uint32_t FloatingPointMode;
8057 bool IllegalOpcodeExceptionEnable;
8058 bool MaskStackExceptionEnable;
8059 bool SoftwareExceptionEnable;
8060 uint32_t SamplerStatePointer;
8061 #define Nosamplersused 0
8062 #define Between1and4samplersused 1
8063 #define Between5and8samplersused 2
8064 #define Between9and12samplersused 3
8065 #define Between13and16samplersused 4
8066 uint32_t SamplerCount;
8067 uint32_t BindingTablePointer;
8068 uint32_t BindingTableEntryCount;
8069 uint32_t ConstantIndirectURBEntryReadLength;
8070 uint32_t ConstantURBEntryReadOffset;
8071 #define RTNE 0
8072 #define RU 1
8073 #define RD 2
8074 #define RTZ 3
8075 uint32_t RoundingMode;
8076 bool BarrierEnable;
8077 #define Encodes0k 0
8078 #define Encodes4k 1
8079 #define Encodes8k 2
8080 #define Encodes16k 4
8081 #define Encodes32k 8
8082 #define Encodes64k 16
8083 uint32_t SharedLocalMemorySize;
8084 uint32_t NumberofThreadsinGPGPUThreadGroup;
8085 uint32_t CrossThreadConstantDataReadLength;
8086 };
8087
8088 static inline void
8089 GEN8_INTERFACE_DESCRIPTOR_DATA_pack(__gen_user_data *data, void * restrict dst,
8090 const struct GEN8_INTERFACE_DESCRIPTOR_DATA * restrict values)
8091 {
8092 uint32_t *dw = (uint32_t * restrict) dst;
8093
8094 dw[0] =
8095 __gen_offset(values->KernelStartPointer, 6, 31) |
8096 0;
8097
8098 dw[1] =
8099 __gen_offset(values->KernelStartPointerHigh, 0, 15) |
8100 0;
8101
8102 dw[2] =
8103 __gen_field(values->DenormMode, 19, 19) |
8104 __gen_field(values->SingleProgramFlow, 18, 18) |
8105 __gen_field(values->ThreadPriority, 17, 17) |
8106 __gen_field(values->FloatingPointMode, 16, 16) |
8107 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
8108 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
8109 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
8110 0;
8111
8112 dw[3] =
8113 __gen_offset(values->SamplerStatePointer, 5, 31) |
8114 __gen_field(values->SamplerCount, 2, 4) |
8115 0;
8116
8117 dw[4] =
8118 __gen_offset(values->BindingTablePointer, 5, 15) |
8119 __gen_field(values->BindingTableEntryCount, 0, 4) |
8120 0;
8121
8122 dw[5] =
8123 __gen_field(values->ConstantIndirectURBEntryReadLength, 16, 31) |
8124 __gen_field(values->ConstantURBEntryReadOffset, 0, 15) |
8125 0;
8126
8127 dw[6] =
8128 __gen_field(values->RoundingMode, 22, 23) |
8129 __gen_field(values->BarrierEnable, 21, 21) |
8130 __gen_field(values->SharedLocalMemorySize, 16, 20) |
8131 __gen_field(values->NumberofThreadsinGPGPUThreadGroup, 0, 9) |
8132 0;
8133
8134 dw[7] =
8135 __gen_field(values->CrossThreadConstantDataReadLength, 0, 7) |
8136 0;
8137
8138 }
8139
8140 #define GEN8_PALETTE_ENTRY_length 0x00000001
8141
8142 #define GEN8_BINDING_TABLE_STATE_length 0x00000001
8143
8144 struct GEN8_BINDING_TABLE_STATE {
8145 uint32_t SurfaceStatePointer;
8146 };
8147
8148 static inline void
8149 GEN8_BINDING_TABLE_STATE_pack(__gen_user_data *data, void * restrict dst,
8150 const struct GEN8_BINDING_TABLE_STATE * restrict values)
8151 {
8152 uint32_t *dw = (uint32_t * restrict) dst;
8153
8154 dw[0] =
8155 __gen_offset(values->SurfaceStatePointer, 6, 31) |
8156 0;
8157
8158 }
8159
8160 #define GEN8_RENDER_SURFACE_STATE_length 0x00000010
8161
8162 struct GEN8_RENDER_SURFACE_STATE {
8163 #define SURFTYPE_1D 0
8164 #define SURFTYPE_2D 1
8165 #define SURFTYPE_3D 2
8166 #define SURFTYPE_CUBE 3
8167 #define SURFTYPE_BUFFER 4
8168 #define SURFTYPE_STRBUF 5
8169 #define SURFTYPE_NULL 7
8170 uint32_t SurfaceType;
8171 bool SurfaceArray;
8172 uint32_t SurfaceFormat;
8173 #define VALIGN4 1
8174 #define VALIGN8 2
8175 #define VALIGN16 3
8176 uint32_t SurfaceVerticalAlignment;
8177 #define HALIGN4 1
8178 #define HALIGN8 2
8179 #define HALIGN16 3
8180 uint32_t SurfaceHorizontalAlignment;
8181 #define LINEAR 0
8182 #define WMAJOR 1
8183 #define XMAJOR 2
8184 #define YMAJOR 3
8185 uint32_t TileMode;
8186 uint32_t VerticalLineStride;
8187 uint32_t VerticalLineStrideOffset;
8188 bool SamplerL2BypassModeDisable;
8189 #define WriteOnlyCache 0
8190 #define ReadWriteCache 1
8191 uint32_t RenderCacheReadWriteMode;
8192 #define NORMAL_MODE 0
8193 #define PROGRESSIVE_FRAME 2
8194 #define INTERLACED_FRAME 3
8195 uint32_t MediaBoundaryPixelMode;
8196 bool CubeFaceEnablePositiveZ;
8197 bool CubeFaceEnableNegativeZ;
8198 bool CubeFaceEnablePositiveY;
8199 bool CubeFaceEnableNegativeY;
8200 bool CubeFaceEnablePositiveX;
8201 bool CubeFaceEnableNegativeX;
8202 struct GEN8_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
8203 float BaseMipLevel;
8204 uint32_t SurfaceQPitch;
8205 uint32_t Height;
8206 uint32_t Width;
8207 uint32_t Depth;
8208 uint32_t SurfacePitch;
8209 #define _0DEG 0
8210 #define _90DEG 1
8211 #define _270DEG 3
8212 uint32_t RenderTargetAndSampleUnormRotation;
8213 uint32_t MinimumArrayElement;
8214 uint32_t RenderTargetViewExtent;
8215 #define MSS 0
8216 #define DEPTH_STENCIL 1
8217 uint32_t MultisampledSurfaceStorageFormat;
8218 #define MULTISAMPLECOUNT_1 0
8219 #define MULTISAMPLECOUNT_2 1
8220 #define MULTISAMPLECOUNT_4 2
8221 #define MULTISAMPLECOUNT_8 3
8222 uint32_t NumberofMultisamples;
8223 uint32_t MultisamplePositionPaletteIndex;
8224 uint32_t XOffset;
8225 uint32_t YOffset;
8226 bool EWADisableForCube;
8227 #define GPUcoherent 0
8228 #define IAcoherent 1
8229 uint32_t CoherencyType;
8230 uint32_t SurfaceMinLOD;
8231 uint32_t MIPCountLOD;
8232 uint32_t AuxiliarySurfaceQPitch;
8233 uint32_t AuxiliarySurfacePitch;
8234 #define AUX_NONE 0
8235 #define AUX_MCS 1
8236 #define AUX_APPEND 2
8237 #define AUX_HIZ 3
8238 uint32_t AuxiliarySurfaceMode;
8239 bool SeparateUVPlaneEnable;
8240 uint32_t XOffsetforUorUVPlane;
8241 uint32_t YOffsetforUorUVPlane;
8242 uint32_t RedClearColor;
8243 uint32_t GreenClearColor;
8244 uint32_t BlueClearColor;
8245 uint32_t AlphaClearColor;
8246 uint32_t ShaderChannelSelectRed;
8247 uint32_t ShaderChannelSelectGreen;
8248 uint32_t ShaderChannelSelectBlue;
8249 uint32_t ShaderChannelSelectAlpha;
8250 float ResourceMinLOD;
8251 __gen_address_type SurfaceBaseAddress;
8252 uint32_t XOffsetforVPlane;
8253 uint32_t YOffsetforVPlane;
8254 uint32_t AuxiliaryTableIndexforMediaCompressedSurface;
8255 __gen_address_type AuxiliarySurfaceBaseAddress;
8256 };
8257
8258 static inline void
8259 GEN8_RENDER_SURFACE_STATE_pack(__gen_user_data *data, void * restrict dst,
8260 const struct GEN8_RENDER_SURFACE_STATE * restrict values)
8261 {
8262 uint32_t *dw = (uint32_t * restrict) dst;
8263
8264 dw[0] =
8265 __gen_field(values->SurfaceType, 29, 31) |
8266 __gen_field(values->SurfaceArray, 28, 28) |
8267 __gen_field(values->SurfaceFormat, 18, 26) |
8268 __gen_field(values->SurfaceVerticalAlignment, 16, 17) |
8269 __gen_field(values->SurfaceHorizontalAlignment, 14, 15) |
8270 __gen_field(values->TileMode, 12, 13) |
8271 __gen_field(values->VerticalLineStride, 11, 11) |
8272 __gen_field(values->VerticalLineStrideOffset, 10, 10) |
8273 __gen_field(values->SamplerL2BypassModeDisable, 9, 9) |
8274 __gen_field(values->RenderCacheReadWriteMode, 8, 8) |
8275 __gen_field(values->MediaBoundaryPixelMode, 6, 7) |
8276 __gen_field(values->CubeFaceEnablePositiveZ, 0, 0) |
8277 __gen_field(values->CubeFaceEnableNegativeZ, 1, 1) |
8278 __gen_field(values->CubeFaceEnablePositiveY, 2, 2) |
8279 __gen_field(values->CubeFaceEnableNegativeY, 3, 3) |
8280 __gen_field(values->CubeFaceEnablePositiveX, 4, 4) |
8281 __gen_field(values->CubeFaceEnableNegativeX, 5, 5) |
8282 0;
8283
8284 uint32_t dw_MemoryObjectControlState;
8285 GEN8_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
8286 dw[1] =
8287 __gen_field(dw_MemoryObjectControlState, 24, 30) |
8288 __gen_field(values->BaseMipLevel * (1 << 1), 19, 23) |
8289 __gen_field(values->SurfaceQPitch, 0, 14) |
8290 0;
8291
8292 dw[2] =
8293 __gen_field(values->Height, 16, 29) |
8294 __gen_field(values->Width, 0, 13) |
8295 0;
8296
8297 dw[3] =
8298 __gen_field(values->Depth, 21, 31) |
8299 __gen_field(values->SurfacePitch, 0, 17) |
8300 0;
8301
8302 dw[4] =
8303 __gen_field(values->RenderTargetAndSampleUnormRotation, 29, 30) |
8304 __gen_field(values->MinimumArrayElement, 18, 28) |
8305 __gen_field(values->RenderTargetViewExtent, 7, 17) |
8306 __gen_field(values->MultisampledSurfaceStorageFormat, 6, 6) |
8307 __gen_field(values->NumberofMultisamples, 3, 5) |
8308 __gen_field(values->MultisamplePositionPaletteIndex, 0, 2) |
8309 0;
8310
8311 dw[5] =
8312 __gen_offset(values->XOffset, 25, 31) |
8313 __gen_offset(values->YOffset, 21, 23) |
8314 __gen_field(values->EWADisableForCube, 20, 20) |
8315 __gen_field(values->CoherencyType, 14, 14) |
8316 __gen_field(values->SurfaceMinLOD, 4, 7) |
8317 __gen_field(values->MIPCountLOD, 0, 3) |
8318 0;
8319
8320 dw[6] =
8321 __gen_field(values->AuxiliarySurfaceQPitch, 16, 30) |
8322 __gen_field(values->AuxiliarySurfacePitch, 3, 11) |
8323 __gen_field(values->AuxiliarySurfaceMode, 0, 2) |
8324 __gen_field(values->SeparateUVPlaneEnable, 31, 31) |
8325 __gen_field(values->XOffsetforUorUVPlane, 16, 29) |
8326 __gen_field(values->YOffsetforUorUVPlane, 0, 13) |
8327 0;
8328
8329 dw[7] =
8330 __gen_field(values->RedClearColor, 31, 31) |
8331 __gen_field(values->GreenClearColor, 30, 30) |
8332 __gen_field(values->BlueClearColor, 29, 29) |
8333 __gen_field(values->AlphaClearColor, 28, 28) |
8334 __gen_field(values->ShaderChannelSelectRed, 25, 27) |
8335 __gen_field(values->ShaderChannelSelectGreen, 22, 24) |
8336 __gen_field(values->ShaderChannelSelectBlue, 19, 21) |
8337 __gen_field(values->ShaderChannelSelectAlpha, 16, 18) |
8338 __gen_field(values->ResourceMinLOD * (1 << 8), 0, 11) |
8339 0;
8340
8341 uint32_t dw8 =
8342 0;
8343
8344 uint64_t qw8 =
8345 __gen_combine_address(data, &dw[8], values->SurfaceBaseAddress, dw8);
8346
8347 dw[8] = qw8;
8348 dw[9] = qw8 >> 32;
8349
8350 uint32_t dw10 =
8351 __gen_field(values->XOffsetforVPlane, 48, 61) |
8352 __gen_field(values->YOffsetforVPlane, 32, 45) |
8353 __gen_field(values->AuxiliaryTableIndexforMediaCompressedSurface, 21, 31) |
8354 0;
8355
8356 uint64_t qw10 =
8357 __gen_combine_address(data, &dw[10], values->AuxiliarySurfaceBaseAddress, dw10);
8358
8359 dw[10] = qw10;
8360 dw[11] = qw10 >> 32;
8361
8362 dw[12] =
8363 0;
8364
8365 dw[13] =
8366 0;
8367
8368 dw[14] =
8369 0;
8370
8371 dw[15] =
8372 0;
8373
8374 }
8375
8376 #define GEN8_SAMPLER_STATE_length 0x00000004
8377
8378 struct GEN8_SAMPLER_STATE {
8379 bool SamplerDisable;
8380 #define DX10OGL 0
8381 #define DX9 1
8382 uint32_t TextureBorderColorMode;
8383 #define CLAMP_NONE 0
8384 #define CLAMP_OGL 2
8385 uint32_t LODPreClampMode;
8386 float BaseMipLevel;
8387 #define MIPFILTER_NONE 0
8388 #define MIPFILTER_NEAREST 1
8389 #define MIPFILTER_LINEAR 3
8390 uint32_t MipModeFilter;
8391 #define MAPFILTER_NEAREST 0
8392 #define MAPFILTER_LINEAR 1
8393 #define MAPFILTER_ANISOTROPIC 2
8394 #define MAPFILTER_MONO 6
8395 uint32_t MagModeFilter;
8396 #define MAPFILTER_NEAREST 0
8397 #define MAPFILTER_LINEAR 1
8398 #define MAPFILTER_ANISOTROPIC 2
8399 #define MAPFILTER_MONO 6
8400 uint32_t MinModeFilter;
8401 uint32_t TextureLODBias;
8402 #define LEGACY 0
8403 #define EWAApproximation 1
8404 uint32_t AnisotropicAlgorithm;
8405 float MinLOD;
8406 float MaxLOD;
8407 bool ChromaKeyEnable;
8408 uint32_t ChromaKeyIndex;
8409 #define KEYFILTER_KILL_ON_ANY_MATCH 0
8410 #define KEYFILTER_REPLACE_BLACK 1
8411 uint32_t ChromaKeyMode;
8412 #define PREFILTEROPALWAYS 0
8413 #define PREFILTEROPNEVER 1
8414 #define PREFILTEROPLESS 2
8415 #define PREFILTEROPEQUAL 3
8416 #define PREFILTEROPLEQUAL 4
8417 #define PREFILTEROPGREATER 5
8418 #define PREFILTEROPNOTEQUAL 6
8419 #define PREFILTEROPGEQUAL 7
8420 uint32_t ShadowFunction;
8421 #define PROGRAMMED 0
8422 #define OVERRIDE 1
8423 uint32_t CubeSurfaceControlMode;
8424 uint32_t IndirectStatePointer;
8425 #define MIPNONE 0
8426 #define MIPFILTER 1
8427 uint32_t LODClampMagnificationMode;
8428 #define RATIO21 0
8429 #define RATIO41 1
8430 #define RATIO61 2
8431 #define RATIO81 3
8432 #define RATIO101 4
8433 #define RATIO121 5
8434 #define RATIO141 6
8435 #define RATIO161 7
8436 uint32_t MaximumAnisotropy;
8437 bool RAddressMinFilterRoundingEnable;
8438 bool RAddressMagFilterRoundingEnable;
8439 bool VAddressMinFilterRoundingEnable;
8440 bool VAddressMagFilterRoundingEnable;
8441 bool UAddressMinFilterRoundingEnable;
8442 bool UAddressMagFilterRoundingEnable;
8443 #define FULL 0
8444 #define HIGH 1
8445 #define MED 2
8446 #define LOW 3
8447 uint32_t TrilinearFilterQuality;
8448 bool NonnormalizedCoordinateEnable;
8449 uint32_t TCXAddressControlMode;
8450 uint32_t TCYAddressControlMode;
8451 uint32_t TCZAddressControlMode;
8452 };
8453
8454 static inline void
8455 GEN8_SAMPLER_STATE_pack(__gen_user_data *data, void * restrict dst,
8456 const struct GEN8_SAMPLER_STATE * restrict values)
8457 {
8458 uint32_t *dw = (uint32_t * restrict) dst;
8459
8460 dw[0] =
8461 __gen_field(values->SamplerDisable, 31, 31) |
8462 __gen_field(values->TextureBorderColorMode, 29, 29) |
8463 __gen_field(values->LODPreClampMode, 27, 28) |
8464 __gen_field(values->BaseMipLevel * (1 << 1), 22, 26) |
8465 __gen_field(values->MipModeFilter, 20, 21) |
8466 __gen_field(values->MagModeFilter, 17, 19) |
8467 __gen_field(values->MinModeFilter, 14, 16) |
8468 __gen_field(values->TextureLODBias, 1, 13) |
8469 __gen_field(values->AnisotropicAlgorithm, 0, 0) |
8470 0;
8471
8472 dw[1] =
8473 __gen_field(values->MinLOD * (1 << 8), 20, 31) |
8474 __gen_field(values->MaxLOD * (1 << 8), 8, 19) |
8475 __gen_field(values->ChromaKeyEnable, 7, 7) |
8476 __gen_field(values->ChromaKeyIndex, 5, 6) |
8477 __gen_field(values->ChromaKeyMode, 4, 4) |
8478 __gen_field(values->ShadowFunction, 1, 3) |
8479 __gen_field(values->CubeSurfaceControlMode, 0, 0) |
8480 0;
8481
8482 dw[2] =
8483 __gen_field(values->IndirectStatePointer, 6, 23) |
8484 __gen_field(values->LODClampMagnificationMode, 0, 0) |
8485 0;
8486
8487 dw[3] =
8488 __gen_field(values->MaximumAnisotropy, 19, 21) |
8489 __gen_field(values->RAddressMinFilterRoundingEnable, 13, 13) |
8490 __gen_field(values->RAddressMagFilterRoundingEnable, 14, 14) |
8491 __gen_field(values->VAddressMinFilterRoundingEnable, 15, 15) |
8492 __gen_field(values->VAddressMagFilterRoundingEnable, 16, 16) |
8493 __gen_field(values->UAddressMinFilterRoundingEnable, 17, 17) |
8494 __gen_field(values->UAddressMagFilterRoundingEnable, 18, 18) |
8495 __gen_field(values->TrilinearFilterQuality, 11, 12) |
8496 __gen_field(values->NonnormalizedCoordinateEnable, 10, 10) |
8497 __gen_field(values->TCXAddressControlMode, 6, 8) |
8498 __gen_field(values->TCYAddressControlMode, 3, 5) |
8499 __gen_field(values->TCZAddressControlMode, 0, 2) |
8500 0;
8501
8502 }
8503
8504 /* Enum 3D_Prim_Topo_Type */
8505 #define _3DPRIM_POINTLIST 1
8506 #define _3DPRIM_LINELIST 2
8507 #define _3DPRIM_LINESTRIP 3
8508 #define _3DPRIM_TRILIST 4
8509 #define _3DPRIM_TRISTRIP 5
8510 #define _3DPRIM_TRIFAN 6
8511 #define _3DPRIM_QUADLIST 7
8512 #define _3DPRIM_QUADSTRIP 8
8513 #define _3DPRIM_LINELIST_ADJ 9
8514 #define _3DPRIM_LINESTRIP_ADJ 10
8515 #define _3DPRIM_TRILIST_ADJ 11
8516 #define _3DPRIM_TRISTRIP_ADJ 12
8517 #define _3DPRIM_TRISTRIP_REVERSE 13
8518 #define _3DPRIM_POLYGON 14
8519 #define _3DPRIM_RECTLIST 15
8520 #define _3DPRIM_LINELOOP 16
8521 #define _3DPRIM_POINTLIST_BF 17
8522 #define _3DPRIM_LINESTRIP_CONT 18
8523 #define _3DPRIM_LINESTRIP_BF 19
8524 #define _3DPRIM_LINESTRIP_CONT_BF 20
8525 #define _3DPRIM_TRIFAN_NOSTIPPLE 22
8526 #define _3DPRIM_PATCHLIST_1 32
8527 #define _3DPRIM_PATCHLIST_2 33
8528 #define _3DPRIM_PATCHLIST_3 34
8529 #define _3DPRIM_PATCHLIST_4 35
8530 #define _3DPRIM_PATCHLIST_5 36
8531 #define _3DPRIM_PATCHLIST_6 37
8532 #define _3DPRIM_PATCHLIST_7 38
8533 #define _3DPRIM_PATCHLIST_8 39
8534 #define _3DPRIM_PATCHLIST_9 40
8535 #define _3DPRIM_PATCHLIST_10 41
8536 #define _3DPRIM_PATCHLIST_11 42
8537 #define _3DPRIM_PATCHLIST_12 43
8538 #define _3DPRIM_PATCHLIST_13 44
8539 #define _3DPRIM_PATCHLIST_14 45
8540 #define _3DPRIM_PATCHLIST_15 46
8541 #define _3DPRIM_PATCHLIST_16 47
8542 #define _3DPRIM_PATCHLIST_17 48
8543 #define _3DPRIM_PATCHLIST_18 49
8544 #define _3DPRIM_PATCHLIST_19 50
8545 #define _3DPRIM_PATCHLIST_20 51
8546 #define _3DPRIM_PATCHLIST_21 52
8547 #define _3DPRIM_PATCHLIST_22 53
8548 #define _3DPRIM_PATCHLIST_23 54
8549 #define _3DPRIM_PATCHLIST_24 55
8550 #define _3DPRIM_PATCHLIST_25 56
8551 #define _3DPRIM_PATCHLIST_26 57
8552 #define _3DPRIM_PATCHLIST_27 58
8553 #define _3DPRIM_PATCHLIST_28 59
8554 #define _3DPRIM_PATCHLIST_29 60
8555 #define _3DPRIM_PATCHLIST_30 61
8556 #define _3DPRIM_PATCHLIST_31 62
8557 #define _3DPRIM_PATCHLIST_32 63
8558
8559 /* Enum 3D_Vertex_Component_Control */
8560 #define VFCOMP_NOSTORE 0
8561 #define VFCOMP_STORE_SRC 1
8562 #define VFCOMP_STORE_0 2
8563 #define VFCOMP_STORE_1_FP 3
8564 #define VFCOMP_STORE_1_INT 4
8565 #define VFCOMP_STORE_PID 7
8566
8567 /* Enum WRAP_SHORTEST_ENABLE */
8568 #define WSE_X 1
8569 #define WSE_Y 2
8570 #define WSE_XY 3
8571 #define WSE_Z 4
8572 #define WSE_XZ 5
8573 #define WSE_YZ 6
8574 #define WSE_XYZ 7
8575 #define WSE_W 8
8576 #define WSE_XW 9
8577 #define WSE_YW 10
8578 #define WSE_XYW 11
8579 #define WSE_ZW 12
8580 #define WSE_XZW 13
8581 #define WSE_YZW 14
8582 #define WSE_XYZW 15
8583
8584 /* Enum 3D_Stencil_Operation */
8585 #define STENCILOP_KEEP 0
8586 #define STENCILOP_ZERO 1
8587 #define STENCILOP_REPLACE 2
8588 #define STENCILOP_INCRSAT 3
8589 #define STENCILOP_DECRSAT 4
8590 #define STENCILOP_INCR 5
8591 #define STENCILOP_DECR 6
8592 #define STENCILOP_INVERT 7
8593
8594 /* Enum 3D_Color_Buffer_Blend_Factor */
8595 #define BLENDFACTOR_ONE 1
8596 #define BLENDFACTOR_SRC_COLOR 2
8597 #define BLENDFACTOR_SRC_ALPHA 3
8598 #define BLENDFACTOR_DST_ALPHA 4
8599 #define BLENDFACTOR_DST_COLOR 5
8600 #define BLENDFACTOR_SRC_ALPHA_SATURATE 6
8601 #define BLENDFACTOR_CONST_COLOR 7
8602 #define BLENDFACTOR_CONST_ALPHA 8
8603 #define BLENDFACTOR_SRC1_COLOR 9
8604 #define BLENDFACTOR_SRC1_ALPHA 10
8605 #define BLENDFACTOR_ZERO 17
8606 #define BLENDFACTOR_INV_SRC_COLOR 18
8607 #define BLENDFACTOR_INV_SRC_ALPHA 19
8608 #define BLENDFACTOR_INV_DST_ALPHA 20
8609 #define BLENDFACTOR_INV_DST_COLOR 21
8610 #define BLENDFACTOR_INV_CONST_COLOR 23
8611 #define BLENDFACTOR_INV_CONST_ALPHA 24
8612 #define BLENDFACTOR_INV_SRC1_COLOR 25
8613 #define BLENDFACTOR_INV_SRC1_ALPHA 26
8614
8615 /* Enum 3D_Color_Buffer_Blend_Function */
8616 #define BLENDFUNCTION_ADD 0
8617 #define BLENDFUNCTION_SUBTRACT 1
8618 #define BLENDFUNCTION_REVERSE_SUBTRACT 2
8619 #define BLENDFUNCTION_MIN 3
8620 #define BLENDFUNCTION_MAX 4
8621
8622 /* Enum 3D_Compare_Function */
8623 #define COMPAREFUNCTION_ALWAYS 0
8624 #define COMPAREFUNCTION_NEVER 1
8625 #define COMPAREFUNCTION_LESS 2
8626 #define COMPAREFUNCTION_EQUAL 3
8627 #define COMPAREFUNCTION_LEQUAL 4
8628 #define COMPAREFUNCTION_GREATER 5
8629 #define COMPAREFUNCTION_NOTEQUAL 6
8630 #define COMPAREFUNCTION_GEQUAL 7
8631
8632 /* Enum 3D_Logic_Op_Function */
8633 #define LOGICOP_CLEAR 0
8634 #define LOGICOP_NOR 1
8635 #define LOGICOP_AND_INVERTED 2
8636 #define LOGICOP_COPY_INVERTED 3
8637 #define LOGICOP_AND_REVERSE 4
8638 #define LOGICOP_INVERT 5
8639 #define LOGICOP_XOR 6
8640 #define LOGICOP_NAND 7
8641 #define LOGICOP_AND 8
8642 #define LOGICOP_EQUIV 9
8643 #define LOGICOP_NOOP 10
8644 #define LOGICOP_OR_INVERTED 11
8645 #define LOGICOP_COPY 12
8646 #define LOGICOP_OR_REVERSE 13
8647 #define LOGICOP_OR 14
8648 #define LOGICOP_SET 15
8649
8650 /* Enum SURFACE_FORMAT */
8651 #define R32G32B32A32_FLOAT 0
8652 #define R32G32B32A32_SINT 1
8653 #define R32G32B32A32_UINT 2
8654 #define R32G32B32A32_UNORM 3
8655 #define R32G32B32A32_SNORM 4
8656 #define R64G64_FLOAT 5
8657 #define R32G32B32X32_FLOAT 6
8658 #define R32G32B32A32_SSCALED 7
8659 #define R32G32B32A32_USCALED 8
8660 #define R32G32B32A32_SFIXED 32
8661 #define R64G64_PASSTHRU 33
8662 #define R32G32B32_FLOAT 64
8663 #define R32G32B32_SINT 65
8664 #define R32G32B32_UINT 66
8665 #define R32G32B32_UNORM 67
8666 #define R32G32B32_SNORM 68
8667 #define R32G32B32_SSCALED 69
8668 #define R32G32B32_USCALED 70
8669 #define R32G32B32_SFIXED 80
8670 #define R16G16B16A16_UNORM 128
8671 #define R16G16B16A16_SNORM 129
8672 #define R16G16B16A16_SINT 130
8673 #define R16G16B16A16_UINT 131
8674 #define R16G16B16A16_FLOAT 132
8675 #define R32G32_FLOAT 133
8676 #define R32G32_SINT 134
8677 #define R32G32_UINT 135
8678 #define R32_FLOAT_X8X24_TYPELESS 136
8679 #define X32_TYPELESS_G8X24_UINT 137
8680 #define L32A32_FLOAT 138
8681 #define R32G32_UNORM 139
8682 #define R32G32_SNORM 140
8683 #define R64_FLOAT 141
8684 #define R16G16B16X16_UNORM 142
8685 #define R16G16B16X16_FLOAT 143
8686 #define A32X32_FLOAT 144
8687 #define L32X32_FLOAT 145
8688 #define I32X32_FLOAT 146
8689 #define R16G16B16A16_SSCALED 147
8690 #define R16G16B16A16_USCALED 148
8691 #define R32G32_SSCALED 149
8692 #define R32G32_USCALED 150
8693 #define R32G32_SFIXED 160
8694 #define R64_PASSTHRU 161
8695 #define B8G8R8A8_UNORM 192
8696 #define B8G8R8A8_UNORM_SRGB 193
8697 #define R10G10B10A2_UNORM 194
8698 #define R10G10B10A2_UNORM_SRGB 195
8699 #define R10G10B10A2_UINT 196
8700 #define R10G10B10_SNORM_A2_UNORM 197
8701 #define R8G8B8A8_UNORM 199
8702 #define R8G8B8A8_UNORM_SRGB 200
8703 #define R8G8B8A8_SNORM 201
8704 #define R8G8B8A8_SINT 202
8705 #define R8G8B8A8_UINT 203
8706 #define R16G16_UNORM 204
8707 #define R16G16_SNORM 205
8708 #define R16G16_SINT 206
8709 #define R16G16_UINT 207
8710 #define R16G16_FLOAT 208
8711 #define B10G10R10A2_UNORM 209
8712 #define B10G10R10A2_UNORM_SRGB 210
8713 #define R11G11B10_FLOAT 211
8714 #define R32_SINT 214
8715 #define R32_UINT 215
8716 #define R32_FLOAT 216
8717 #define R24_UNORM_X8_TYPELESS 217
8718 #define X24_TYPELESS_G8_UINT 218
8719 #define L32_UNORM 221
8720 #define A32_UNORM 222
8721 #define L16A16_UNORM 223
8722 #define I24X8_UNORM 224
8723 #define L24X8_UNORM 225
8724 #define A24X8_UNORM 226
8725 #define I32_FLOAT 227
8726 #define L32_FLOAT 228
8727 #define A32_FLOAT 229
8728 #define X8B8_UNORM_G8R8_SNORM 230
8729 #define A8X8_UNORM_G8R8_SNORM 231
8730 #define B8X8_UNORM_G8R8_SNORM 232
8731 #define B8G8R8X8_UNORM 233
8732 #define B8G8R8X8_UNORM_SRGB 234
8733 #define R8G8B8X8_UNORM 235
8734 #define R8G8B8X8_UNORM_SRGB 236
8735 #define R9G9B9E5_SHAREDEXP 237
8736 #define B10G10R10X2_UNORM 238
8737 #define L16A16_FLOAT 240
8738 #define R32_UNORM 241
8739 #define R32_SNORM 242
8740 #define R10G10B10X2_USCALED 243
8741 #define R8G8B8A8_SSCALED 244
8742 #define R8G8B8A8_USCALED 245
8743 #define R16G16_SSCALED 246
8744 #define R16G16_USCALED 247
8745 #define R32_SSCALED 248
8746 #define R32_USCALED 249
8747 #define B5G6R5_UNORM 256
8748 #define B5G6R5_UNORM_SRGB 257
8749 #define B5G5R5A1_UNORM 258
8750 #define B5G5R5A1_UNORM_SRGB 259
8751 #define B4G4R4A4_UNORM 260
8752 #define B4G4R4A4_UNORM_SRGB 261
8753 #define R8G8_UNORM 262
8754 #define R8G8_SNORM 263
8755 #define R8G8_SINT 264
8756 #define R8G8_UINT 265
8757 #define R16_UNORM 266
8758 #define R16_SNORM 267
8759 #define R16_SINT 268
8760 #define R16_UINT 269
8761 #define R16_FLOAT 270
8762 #define A8P8_UNORM_PALETTE0 271
8763 #define A8P8_UNORM_PALETTE1 272
8764 #define I16_UNORM 273
8765 #define L16_UNORM 274
8766 #define A16_UNORM 275
8767 #define L8A8_UNORM 276
8768 #define I16_FLOAT 277
8769 #define L16_FLOAT 278
8770 #define A16_FLOAT 279
8771 #define L8A8_UNORM_SRGB 280
8772 #define R5G5_SNORM_B6_UNORM 281
8773 #define B5G5R5X1_UNORM 282
8774 #define B5G5R5X1_UNORM_SRGB 283
8775 #define R8G8_SSCALED 284
8776 #define R8G8_USCALED 285
8777 #define R16_SSCALED 286
8778 #define R16_USCALED 287
8779 #define P8A8_UNORM_PALETTE0 290
8780 #define P8A8_UNORM_PALETTE1 291
8781 #define A1B5G5R5_UNORM 292
8782 #define A4B4G4R4_UNORM 293
8783 #define L8A8_UINT 294
8784 #define L8A8_SINT 295
8785 #define R8_UNORM 320
8786 #define R8_SNORM 321
8787 #define R8_SINT 322
8788 #define R8_UINT 323
8789 #define A8_UNORM 324
8790 #define I8_UNORM 325
8791 #define L8_UNORM 326
8792 #define P4A4_UNORM_PALETTE0 327
8793 #define A4P4_UNORM_PALETTE0 328
8794 #define R8_SSCALED 329
8795 #define R8_USCALED 330
8796 #define P8_UNORM_PALETTE0 331
8797 #define L8_UNORM_SRGB 332
8798 #define P8_UNORM_PALETTE1 333
8799 #define P4A4_UNORM_PALETTE1 334
8800 #define A4P4_UNORM_PALETTE1 335
8801 #define Y8_UNORM 336
8802 #define L8_UINT 338
8803 #define L8_SINT 339
8804 #define I8_UINT 340
8805 #define I8_SINT 341
8806 #define DXT1_RGB_SRGB 384
8807 #define R1_UNORM 385
8808 #define YCRCB_NORMAL 386
8809 #define YCRCB_SWAPUVY 387
8810 #define P2_UNORM_PALETTE0 388
8811 #define P2_UNORM_PALETTE1 389
8812 #define BC1_UNORM 390
8813 #define BC2_UNORM 391
8814 #define BC3_UNORM 392
8815 #define BC4_UNORM 393
8816 #define BC5_UNORM 394
8817 #define BC1_UNORM_SRGB 395
8818 #define BC2_UNORM_SRGB 396
8819 #define BC3_UNORM_SRGB 397
8820 #define MONO8 398
8821 #define YCRCB_SWAPUV 399
8822 #define YCRCB_SWAPY 400
8823 #define DXT1_RGB 401
8824 #define FXT1 402
8825 #define R8G8B8_UNORM 403
8826 #define R8G8B8_SNORM 404
8827 #define R8G8B8_SSCALED 405
8828 #define R8G8B8_USCALED 406
8829 #define R64G64B64A64_FLOAT 407
8830 #define R64G64B64_FLOAT 408
8831 #define BC4_SNORM 409
8832 #define BC5_SNORM 410
8833 #define R16G16B16_FLOAT 411
8834 #define R16G16B16_UNORM 412
8835 #define R16G16B16_SNORM 413
8836 #define R16G16B16_SSCALED 414
8837 #define R16G16B16_USCALED 415
8838 #define BC6H_SF16 417
8839 #define BC7_UNORM 418
8840 #define BC7_UNORM_SRGB 419
8841 #define BC6H_UF16 420
8842 #define PLANAR_420_8 421
8843 #define R8G8B8_UNORM_SRGB 424
8844 #define ETC1_RGB8 425
8845 #define ETC2_RGB8 426
8846 #define EAC_R11 427
8847 #define EAC_RG11 428
8848 #define EAC_SIGNED_R11 429
8849 #define EAC_SIGNED_RG11 430
8850 #define ETC2_SRGB8 431
8851 #define R16G16B16_UINT 432
8852 #define R16G16B16_SINT 433
8853 #define R32_SFIXED 434
8854 #define R10G10B10A2_SNORM 435
8855 #define R10G10B10A2_USCALED 436
8856 #define R10G10B10A2_SSCALED 437
8857 #define R10G10B10A2_SINT 438
8858 #define B10G10R10A2_SNORM 439
8859 #define B10G10R10A2_USCALED 440
8860 #define B10G10R10A2_SSCALED 441
8861 #define B10G10R10A2_UINT 442
8862 #define B10G10R10A2_SINT 443
8863 #define R64G64B64A64_PASSTHRU 444
8864 #define R64G64B64_PASSTHRU 445
8865 #define ETC2_RGB8_PTA 448
8866 #define ETC2_SRGB8_PTA 449
8867 #define ETC2_EAC_RGBA8 450
8868 #define ETC2_EAC_SRGB8_A8 451
8869 #define R8G8B8_UINT 456
8870 #define R8G8B8_SINT 457
8871 #define RAW 511
8872
8873 /* Enum Shader Channel Select */
8874 #define SCS_ZERO 0
8875 #define SCS_ONE 1
8876 #define SCS_RED 4
8877 #define SCS_GREEN 5
8878 #define SCS_BLUE 6
8879 #define SCS_ALPHA 7
8880
8881 /* Enum Clear Color */
8882 #define CC_ZERO 0
8883 #define CC_ONE 1
8884
8885 /* Enum Texture Coordinate Mode */
8886 #define TCM_WRAP 0
8887 #define TCM_MIRROR 1
8888 #define TCM_CLAMP 2
8889 #define TCM_CUBE 3
8890 #define TCM_CLAMP_BORDER 4
8891 #define TCM_MIRROR_ONCE 5
8892 #define TCM_HALF_BORDER 6
8893