src/vulkan/gen8_pipeline.c

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <assert.h>
  25 #include <stdbool.h>
  26 #include <string.h>
  27 #include <unistd.h>
  28 #include <fcntl.h>
  29
  30 #include "anv_private.h"
  31
  32 static void
  33 emit_vertex_input(struct anv_pipeline *pipeline,
  34                   const VkPipelineVertexInputStateCreateInfo *info)
  35 {
  36    const uint32_t num_dwords = 1 + info->attributeCount * 2;
  37    uint32_t *p;
  38    bool instancing_enable[32];
  39
  40    pipeline->vb_used = 0;
  41    for (uint32_t i = 0; i < info->bindingCount; i++) {
  42       const VkVertexInputBindingDescription *desc =
  43          &info->pVertexBindingDescriptions[i];
  44
  45       pipeline->vb_used |= 1 << desc->binding;
  46       pipeline->binding_stride[desc->binding] = desc->strideInBytes;
  47
  48       /* Step rate is programmed per vertex element (attribute), not
  49        * binding. Set up a map of which bindings step per instance, for
  50        * reference by vertex element setup. */
  51       switch (desc->stepRate) {
  52       default:
  53       case VK_VERTEX_INPUT_STEP_RATE_VERTEX:
  54          instancing_enable[desc->binding] = false;
  55          break;
  56       case VK_VERTEX_INPUT_STEP_RATE_INSTANCE:
  57          instancing_enable[desc->binding] = true;
  58          break;
  59       }
  60    }
  61
  62    p = anv_batch_emitn(&pipeline->batch, num_dwords,
  63                        GEN8_3DSTATE_VERTEX_ELEMENTS);
  64
  65    for (uint32_t i = 0; i < info->attributeCount; i++) {
  66       const VkVertexInputAttributeDescription *desc =
  67          &info->pVertexAttributeDescriptions[i];
  68       const struct anv_format *format = anv_format_for_vk_format(desc->format);
  69
  70       struct GEN8_VERTEX_ELEMENT_STATE element = {
  71          .VertexBufferIndex = desc->binding,
  72          .Valid = true,
  73          .SourceElementFormat = format->surface_format,
  74          .EdgeFlagEnable = false,
  75          .SourceElementOffset = desc->offsetInBytes,
  76          .Component0Control = VFCOMP_STORE_SRC,
  77          .Component1Control = format->num_channels >= 2 ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
  78          .Component2Control = format->num_channels >= 3 ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
  79          .Component3Control = format->num_channels >= 4 ? VFCOMP_STORE_SRC : VFCOMP_STORE_1_FP
  80       };
  81       GEN8_VERTEX_ELEMENT_STATE_pack(NULL, &p[1 + i * 2], &element);
  82
  83       anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_INSTANCING,
  84                      .InstancingEnable = instancing_enable[desc->binding],
  85                      .VertexElementIndex = i,
  86                      /* Vulkan so far doesn't have an instance divisor, so
  87                       * this is always 1 (ignored if not instancing). */
  88                      .InstanceDataStepRate = 1);
  89    }
  90
  91    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_SGVS,
  92                   .VertexIDEnable = pipeline->vs_prog_data.uses_vertexid,
  93                   .VertexIDComponentNumber = 2,
  94                   .VertexIDElementOffset = info->bindingCount,
  95                   .InstanceIDEnable = pipeline->vs_prog_data.uses_instanceid,
  96                   .InstanceIDComponentNumber = 3,
  97                   .InstanceIDElementOffset = info->bindingCount);
  98 }
  99
 100 static void
 101 emit_ia_state(struct anv_pipeline *pipeline,
 102               const VkPipelineInputAssemblyStateCreateInfo *info,
 103               const struct anv_graphics_pipeline_create_info *extra)
 104 {
 105    static const uint32_t vk_to_gen_primitive_type[] = {
 106       [VK_PRIMITIVE_TOPOLOGY_POINT_LIST]        = _3DPRIM_POINTLIST,
 107       [VK_PRIMITIVE_TOPOLOGY_LINE_LIST]         = _3DPRIM_LINELIST,
 108       [VK_PRIMITIVE_TOPOLOGY_LINE_STRIP]        = _3DPRIM_LINESTRIP,
 109       [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST]     = _3DPRIM_TRILIST,
 110       [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP]    = _3DPRIM_TRISTRIP,
 111       [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_FAN]      = _3DPRIM_TRIFAN,
 112       [VK_PRIMITIVE_TOPOLOGY_LINE_LIST_ADJ]     = _3DPRIM_LINELIST_ADJ,
 113       [VK_PRIMITIVE_TOPOLOGY_LINE_STRIP_ADJ]    = _3DPRIM_LINESTRIP_ADJ,
 114       [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST_ADJ] = _3DPRIM_TRILIST_ADJ,
 115       [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP_ADJ] = _3DPRIM_TRISTRIP_ADJ,
 116       [VK_PRIMITIVE_TOPOLOGY_PATCH]             = _3DPRIM_PATCHLIST_1
 117    };
 118    uint32_t topology = vk_to_gen_primitive_type[info->topology];
 119
 120    if (extra && extra->use_rectlist)
 121       topology = _3DPRIM_RECTLIST;
 122
 123    struct GEN8_3DSTATE_VF vf = {
 124       GEN8_3DSTATE_VF_header,
 125       .IndexedDrawCutIndexEnable = info->primitiveRestartEnable,
 126    };
 127    GEN8_3DSTATE_VF_pack(NULL, pipeline->state_vf, &vf);
 128
 129    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_TOPOLOGY,
 130                   .PrimitiveTopologyType = topology);
 131 }
 132
 133 static void
 134 emit_rs_state(struct anv_pipeline *pipeline,
 135               const VkPipelineRasterStateCreateInfo *info,
 136               const struct anv_graphics_pipeline_create_info *extra)
 137 {
 138    static const uint32_t vk_to_gen_cullmode[] = {
 139       [VK_CULL_MODE_NONE]                       = CULLMODE_NONE,
 140       [VK_CULL_MODE_FRONT]                      = CULLMODE_FRONT,
 141       [VK_CULL_MODE_BACK]                       = CULLMODE_BACK,
 142       [VK_CULL_MODE_FRONT_AND_BACK]             = CULLMODE_BOTH
 143    };
 144
 145    static const uint32_t vk_to_gen_fillmode[] = {
 146       [VK_FILL_MODE_POINTS]                     = RASTER_POINT,
 147       [VK_FILL_MODE_WIREFRAME]                  = RASTER_WIREFRAME,
 148       [VK_FILL_MODE_SOLID]                      = RASTER_SOLID
 149    };
 150
 151    static const uint32_t vk_to_gen_front_face[] = {
 152       [VK_FRONT_FACE_CCW]                       = CounterClockwise,
 153       [VK_FRONT_FACE_CW]                        = Clockwise
 154    };
 155
 156    struct GEN8_3DSTATE_SF sf = {
 157       GEN8_3DSTATE_SF_header,
 158       .ViewportTransformEnable = !(extra && extra->disable_viewport),
 159       .TriangleStripListProvokingVertexSelect = 0,
 160       .LineStripListProvokingVertexSelect = 0,
 161       .TriangleFanProvokingVertexSelect = 0,
 162       .PointWidthSource = pipeline->writes_point_size ? Vertex : State,
 163       .PointWidth = 1.0,
 164    };
 165
 166    /* FINISHME: VkBool32 rasterizerDiscardEnable; */
 167
 168    GEN8_3DSTATE_SF_pack(NULL, pipeline->state_sf, &sf);
 169
 170    struct GEN8_3DSTATE_RASTER raster = {
 171       GEN8_3DSTATE_RASTER_header,
 172       .FrontWinding = vk_to_gen_front_face[info->frontFace],
 173       .CullMode = vk_to_gen_cullmode[info->cullMode],
 174       .FrontFaceFillMode = vk_to_gen_fillmode[info->fillMode],
 175       .BackFaceFillMode = vk_to_gen_fillmode[info->fillMode],
 176       .ScissorRectangleEnable = !(extra && extra->disable_scissor),
 177       .ViewportZClipTestEnable = info->depthClipEnable
 178    };
 179
 180    GEN8_3DSTATE_RASTER_pack(NULL, pipeline->state_raster, &raster);
 181
 182    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_SBE,
 183                   .ForceVertexURBEntryReadLength = false,
 184                   .ForceVertexURBEntryReadOffset = false,
 185                   .PointSpriteTextureCoordinateOrigin = UPPERLEFT,
 186                   .NumberofSFOutputAttributes =
 187                      pipeline->wm_prog_data.num_varying_inputs);
 188
 189 }
 190
 191 static void
 192 emit_cb_state(struct anv_pipeline *pipeline,
 193               const VkPipelineColorBlendStateCreateInfo *info)
 194 {
 195    struct anv_device *device = pipeline->device;
 196
 197    static const uint32_t vk_to_gen_logic_op[] = {
 198       [VK_LOGIC_OP_COPY]                        = LOGICOP_COPY,
 199       [VK_LOGIC_OP_CLEAR]                       = LOGICOP_CLEAR,
 200       [VK_LOGIC_OP_AND]                         = LOGICOP_AND,
 201       [VK_LOGIC_OP_AND_REVERSE]                 = LOGICOP_AND_REVERSE,
 202       [VK_LOGIC_OP_AND_INVERTED]                = LOGICOP_AND_INVERTED,
 203       [VK_LOGIC_OP_NOOP]                        = LOGICOP_NOOP,
 204       [VK_LOGIC_OP_XOR]                         = LOGICOP_XOR,
 205       [VK_LOGIC_OP_OR]                          = LOGICOP_OR,
 206       [VK_LOGIC_OP_NOR]                         = LOGICOP_NOR,
 207       [VK_LOGIC_OP_EQUIV]                       = LOGICOP_EQUIV,
 208       [VK_LOGIC_OP_INVERT]                      = LOGICOP_INVERT,
 209       [VK_LOGIC_OP_OR_REVERSE]                  = LOGICOP_OR_REVERSE,
 210       [VK_LOGIC_OP_COPY_INVERTED]               = LOGICOP_COPY_INVERTED,
 211       [VK_LOGIC_OP_OR_INVERTED]                 = LOGICOP_OR_INVERTED,
 212       [VK_LOGIC_OP_NAND]                        = LOGICOP_NAND,
 213       [VK_LOGIC_OP_SET]                         = LOGICOP_SET,
 214    };
 215
 216    static const uint32_t vk_to_gen_blend[] = {
 217       [VK_BLEND_ZERO]                           = BLENDFACTOR_ZERO,
 218       [VK_BLEND_ONE]                            = BLENDFACTOR_ONE,
 219       [VK_BLEND_SRC_COLOR]                      = BLENDFACTOR_SRC_COLOR,
 220       [VK_BLEND_ONE_MINUS_SRC_COLOR]            = BLENDFACTOR_INV_SRC_COLOR,
 221       [VK_BLEND_DEST_COLOR]                     = BLENDFACTOR_DST_COLOR,
 222       [VK_BLEND_ONE_MINUS_DEST_COLOR]           = BLENDFACTOR_INV_DST_COLOR,
 223       [VK_BLEND_SRC_ALPHA]                      = BLENDFACTOR_SRC_ALPHA,
 224       [VK_BLEND_ONE_MINUS_SRC_ALPHA]            = BLENDFACTOR_INV_SRC_ALPHA,
 225       [VK_BLEND_DEST_ALPHA]                     = BLENDFACTOR_DST_ALPHA,
 226       [VK_BLEND_ONE_MINUS_DEST_ALPHA]           = BLENDFACTOR_INV_DST_ALPHA,
 227       [VK_BLEND_CONSTANT_COLOR]                 = BLENDFACTOR_CONST_COLOR,
 228       [VK_BLEND_ONE_MINUS_CONSTANT_COLOR]       = BLENDFACTOR_INV_CONST_COLOR,
 229       [VK_BLEND_CONSTANT_ALPHA]                 = BLENDFACTOR_CONST_ALPHA,
 230       [VK_BLEND_ONE_MINUS_CONSTANT_ALPHA]       = BLENDFACTOR_INV_CONST_ALPHA,
 231       [VK_BLEND_SRC_ALPHA_SATURATE]             = BLENDFACTOR_SRC_ALPHA_SATURATE,
 232       [VK_BLEND_SRC1_COLOR]                     = BLENDFACTOR_SRC1_COLOR,
 233       [VK_BLEND_ONE_MINUS_SRC1_COLOR]           = BLENDFACTOR_INV_SRC1_COLOR,
 234       [VK_BLEND_SRC1_ALPHA]                     = BLENDFACTOR_SRC1_ALPHA,
 235       [VK_BLEND_ONE_MINUS_SRC1_ALPHA]           = BLENDFACTOR_INV_SRC1_ALPHA,
 236    };
 237
 238    static const uint32_t vk_to_gen_blend_op[] = {
 239       [VK_BLEND_OP_ADD]                         = BLENDFUNCTION_ADD,
 240       [VK_BLEND_OP_SUBTRACT]                    = BLENDFUNCTION_SUBTRACT,
 241       [VK_BLEND_OP_REVERSE_SUBTRACT]            = BLENDFUNCTION_REVERSE_SUBTRACT,
 242       [VK_BLEND_OP_MIN]                         = BLENDFUNCTION_MIN,
 243       [VK_BLEND_OP_MAX]                         = BLENDFUNCTION_MAX,
 244    };
 245
 246    uint32_t num_dwords = GEN8_BLEND_STATE_length;
 247    pipeline->blend_state =
 248       anv_state_pool_alloc(&device->dynamic_state_pool, num_dwords * 4, 64);
 249
 250    struct GEN8_BLEND_STATE blend_state = {
 251       .AlphaToCoverageEnable = info->alphaToCoverageEnable,
 252    };
 253
 254    for (uint32_t i = 0; i < info->attachmentCount; i++) {
 255       const VkPipelineColorBlendAttachmentState *a = &info->pAttachments[i];
 256
 257       blend_state.Entry[i] = (struct GEN8_BLEND_STATE_ENTRY) {
 258          .LogicOpEnable = info->logicOpEnable,
 259          .LogicOpFunction = vk_to_gen_logic_op[info->logicOp],
 260          .ColorBufferBlendEnable = a->blendEnable,
 261          .PreBlendSourceOnlyClampEnable = false,
 262          .PreBlendColorClampEnable = false,
 263          .PostBlendColorClampEnable = false,
 264          .SourceBlendFactor = vk_to_gen_blend[a->srcBlendColor],
 265          .DestinationBlendFactor = vk_to_gen_blend[a->destBlendColor],
 266          .ColorBlendFunction = vk_to_gen_blend_op[a->blendOpColor],
 267          .SourceAlphaBlendFactor = vk_to_gen_blend[a->srcBlendAlpha],
 268          .DestinationAlphaBlendFactor = vk_to_gen_blend[a->destBlendAlpha],
 269          .AlphaBlendFunction = vk_to_gen_blend_op[a->blendOpAlpha],
 270          .WriteDisableAlpha = !(a->channelWriteMask & VK_CHANNEL_A_BIT),
 271          .WriteDisableRed = !(a->channelWriteMask & VK_CHANNEL_R_BIT),
 272          .WriteDisableGreen = !(a->channelWriteMask & VK_CHANNEL_G_BIT),
 273          .WriteDisableBlue = !(a->channelWriteMask & VK_CHANNEL_B_BIT),
 274       };
 275    }
 276
 277    GEN8_BLEND_STATE_pack(NULL, pipeline->blend_state.map, &blend_state);
 278
 279    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_BLEND_STATE_POINTERS,
 280                   .BlendStatePointer = pipeline->blend_state.offset,
 281                   .BlendStatePointerValid = true);
 282 }
 283
 284 static const uint32_t vk_to_gen_compare_op[] = {
 285    [VK_COMPARE_OP_NEVER]                        = COMPAREFUNCTION_NEVER,
 286    [VK_COMPARE_OP_LESS]                         = COMPAREFUNCTION_LESS,
 287    [VK_COMPARE_OP_EQUAL]                        = COMPAREFUNCTION_EQUAL,
 288    [VK_COMPARE_OP_LESS_EQUAL]                   = COMPAREFUNCTION_LEQUAL,
 289    [VK_COMPARE_OP_GREATER]                      = COMPAREFUNCTION_GREATER,
 290    [VK_COMPARE_OP_NOT_EQUAL]                    = COMPAREFUNCTION_NOTEQUAL,
 291    [VK_COMPARE_OP_GREATER_EQUAL]                = COMPAREFUNCTION_GEQUAL,
 292    [VK_COMPARE_OP_ALWAYS]                       = COMPAREFUNCTION_ALWAYS,
 293 };
 294
 295 static const uint32_t vk_to_gen_stencil_op[] = {
 296    [VK_STENCIL_OP_KEEP]                         = 0,
 297    [VK_STENCIL_OP_ZERO]                         = 0,
 298    [VK_STENCIL_OP_REPLACE]                      = 0,
 299    [VK_STENCIL_OP_INC_CLAMP]                    = 0,
 300    [VK_STENCIL_OP_DEC_CLAMP]                    = 0,
 301    [VK_STENCIL_OP_INVERT]                       = 0,
 302    [VK_STENCIL_OP_INC_WRAP]                     = 0,
 303    [VK_STENCIL_OP_DEC_WRAP]                     = 0
 304 };
 305
 306 static void
 307 emit_ds_state(struct anv_pipeline *pipeline,
 308               const VkPipelineDepthStencilStateCreateInfo *info)
 309 {
 310    if (info == NULL) {
 311       /* We're going to OR this together with the dynamic state.  We need
 312        * to make sure it's initialized to something useful.
 313        */
 314       memset(pipeline->state_wm_depth_stencil, 0,
 315              sizeof(pipeline->state_wm_depth_stencil));
 316       return;
 317    }
 318
 319    /* VkBool32 depthBoundsEnable;          // optional (depth_bounds_test) */
 320
 321    struct GEN8_3DSTATE_WM_DEPTH_STENCIL wm_depth_stencil = {
 322       .DepthTestEnable = info->depthTestEnable,
 323       .DepthBufferWriteEnable = info->depthWriteEnable,
 324       .DepthTestFunction = vk_to_gen_compare_op[info->depthCompareOp],
 325       .DoubleSidedStencilEnable = true,
 326
 327       .StencilTestEnable = info->stencilTestEnable,
 328       .StencilFailOp = vk_to_gen_stencil_op[info->front.stencilFailOp],
 329       .StencilPassDepthPassOp = vk_to_gen_stencil_op[info->front.stencilPassOp],
 330       .StencilPassDepthFailOp = vk_to_gen_stencil_op[info->front.stencilDepthFailOp],
 331       .StencilTestFunction = vk_to_gen_compare_op[info->front.stencilCompareOp],
 332       .BackfaceStencilFailOp = vk_to_gen_stencil_op[info->back.stencilFailOp],
 333       .BackfaceStencilPassDepthPassOp = vk_to_gen_stencil_op[info->back.stencilPassOp],
 334       .BackfaceStencilPassDepthFailOp =vk_to_gen_stencil_op[info->back.stencilDepthFailOp],
 335       .BackfaceStencilTestFunction = vk_to_gen_compare_op[info->back.stencilCompareOp],
 336    };
 337
 338    GEN8_3DSTATE_WM_DEPTH_STENCIL_pack(NULL, pipeline->state_wm_depth_stencil, &wm_depth_stencil);
 339 }
 340
 341 VkResult
 342 gen8_graphics_pipeline_create(
 343     VkDevice                                    _device,
 344     const VkGraphicsPipelineCreateInfo*         pCreateInfo,
 345     const struct anv_graphics_pipeline_create_info *extra,
 346     VkPipeline*                                 pPipeline)
 347 {
 348    ANV_FROM_HANDLE(anv_device, device, _device);
 349    struct anv_pipeline *pipeline;
 350    VkResult result;
 351    uint32_t offset, length;
 352
 353    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO);
 354
 355    pipeline = anv_device_alloc(device, sizeof(*pipeline), 8,
 356                                VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
 357    if (pipeline == NULL)
 358       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
 359
 360    pipeline->device = device;
 361    pipeline->layout = anv_pipeline_layout_from_handle(pCreateInfo->layout);
 362    memset(pipeline->shaders, 0, sizeof(pipeline->shaders));
 363
 364    result = anv_reloc_list_init(&pipeline->batch_relocs, device);
 365    if (result != VK_SUCCESS) {
 366       anv_device_free(device, pipeline);
 367       return result;
 368    }
 369    pipeline->batch.next = pipeline->batch.start = pipeline->batch_data;
 370    pipeline->batch.end = pipeline->batch.start + sizeof(pipeline->batch_data);
 371    pipeline->batch.relocs = &pipeline->batch_relocs;
 372
 373    anv_state_stream_init(&pipeline->program_stream,
 374                          &device->instruction_block_pool);
 375
 376    for (uint32_t i = 0; i < pCreateInfo->stageCount; i++) {
 377       pipeline->shaders[pCreateInfo->pStages[i].stage] =
 378          anv_shader_from_handle(pCreateInfo->pStages[i].shader);
 379    }
 380
 381    if (pCreateInfo->pTessellationState)
 382       anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_TESSELLATION_STATE_CREATE_INFO");
 383    if (pCreateInfo->pViewportState)
 384       anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO");
 385    if (pCreateInfo->pMultisampleState)
 386       anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO");
 387
 388    pipeline->use_repclear = extra && extra->use_repclear;
 389
 390    anv_compiler_run(device->compiler, pipeline);
 391
 392    /* FIXME: The compiler dead-codes FS inputs when we don't have a VS, so we
 393     * hard code this to num_attributes - 2. This is because the attributes
 394     * include VUE header and position, which aren't counted as varying
 395     * inputs. */
 396    if (pipeline->vs_simd8 == NO_KERNEL) {
 397       pipeline->wm_prog_data.num_varying_inputs =
 398          pCreateInfo->pVertexInputState->attributeCount - 2;
 399    }
 400
 401    assert(pCreateInfo->pVertexInputState);
 402    emit_vertex_input(pipeline, pCreateInfo->pVertexInputState);
 403    assert(pCreateInfo->pInputAssemblyState);
 404    emit_ia_state(pipeline, pCreateInfo->pInputAssemblyState, extra);
 405    assert(pCreateInfo->pRasterState);
 406    emit_rs_state(pipeline, pCreateInfo->pRasterState, extra);
 407    emit_ds_state(pipeline, pCreateInfo->pDepthStencilState);
 408    emit_cb_state(pipeline, pCreateInfo->pColorBlendState);
 409
 410    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_STATISTICS,
 411                    .StatisticsEnable = true);
 412    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_HS, .Enable = false);
 413    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_TE, .TEEnable = false);
 414    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_DS, .FunctionEnable = false);
 415    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_STREAMOUT, .SOFunctionEnable = false);
 416
 417    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS,
 418                   .ConstantBufferOffset = 0,
 419                   .ConstantBufferSize = 4);
 420    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS,
 421                   .ConstantBufferOffset = 4,
 422                   .ConstantBufferSize = 4);
 423    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS,
 424                   .ConstantBufferOffset = 8,
 425                   .ConstantBufferSize = 4);
 426
 427    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_WM_CHROMAKEY,
 428                   .ChromaKeyKillEnable = false);
 429    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_SBE_SWIZ);
 430    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_AA_LINE_PARAMETERS);
 431
 432    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_CLIP,
 433                   .ClipEnable = true,
 434                   .ViewportXYClipTestEnable = !(extra && extra->disable_viewport),
 435                   .MinimumPointWidth = 0.125,
 436                   .MaximumPointWidth = 255.875);
 437
 438    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_WM,
 439                   .StatisticsEnable = true,
 440                   .LineEndCapAntialiasingRegionWidth = _05pixels,
 441                   .LineAntialiasingRegionWidth = _10pixels,
 442                   .EarlyDepthStencilControl = NORMAL,
 443                   .ForceThreadDispatchEnable = NORMAL,
 444                   .PointRasterizationRule = RASTRULE_UPPER_RIGHT,
 445                   .BarycentricInterpolationMode =
 446                      pipeline->wm_prog_data.barycentric_interp_modes);
 447
 448    uint32_t samples = 1;
 449    uint32_t log2_samples = __builtin_ffs(samples) - 1;
 450    bool enable_sampling = samples > 1 ? true : false;
 451
 452    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_MULTISAMPLE,
 453                   .PixelPositionOffsetEnable = enable_sampling,
 454                   .PixelLocation = CENTER,
 455                   .NumberofMultisamples = log2_samples);
 456
 457    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_SAMPLE_MASK,
 458                   .SampleMask = 0xffff);
 459
 460    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_VS,
 461                   .VSURBStartingAddress = pipeline->urb.vs_start,
 462                   .VSURBEntryAllocationSize = pipeline->urb.vs_size - 1,
 463                   .VSNumberofURBEntries = pipeline->urb.nr_vs_entries);
 464
 465    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_GS,
 466                   .GSURBStartingAddress = pipeline->urb.gs_start,
 467                   .GSURBEntryAllocationSize = pipeline->urb.gs_size - 1,
 468                   .GSNumberofURBEntries = pipeline->urb.nr_gs_entries);
 469
 470    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_HS,
 471                   .HSURBStartingAddress = pipeline->urb.vs_start,
 472                   .HSURBEntryAllocationSize = 0,
 473                   .HSNumberofURBEntries = 0);
 474
 475    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_DS,
 476                   .DSURBStartingAddress = pipeline->urb.vs_start,
 477                   .DSURBEntryAllocationSize = 0,
 478                   .DSNumberofURBEntries = 0);
 479
 480    const struct brw_gs_prog_data *gs_prog_data = &pipeline->gs_prog_data;
 481    offset = 1;
 482    length = (gs_prog_data->base.vue_map.num_slots + 1) / 2 - offset;
 483
 484    if (pipeline->gs_vec4 == NO_KERNEL)
 485       anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_GS, .Enable = false);
 486    else
 487       anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_GS,
 488                      .SingleProgramFlow = false,
 489                      .KernelStartPointer = pipeline->gs_vec4,
 490                      .VectorMaskEnable = Vmask,
 491                      .SamplerCount = 0,
 492                      .BindingTableEntryCount = 0,
 493                      .ExpectedVertexCount = pipeline->gs_vertex_count,
 494
 495                      .ScratchSpaceBasePointer = pipeline->scratch_start[VK_SHADER_STAGE_GEOMETRY],
 496                      .PerThreadScratchSpace = ffs(gs_prog_data->base.base.total_scratch / 2048),
 497
 498                      .OutputVertexSize = gs_prog_data->output_vertex_size_hwords * 2 - 1,
 499                      .OutputTopology = gs_prog_data->output_topology,
 500                      .VertexURBEntryReadLength = gs_prog_data->base.urb_read_length,
 501                      .DispatchGRFStartRegisterForURBData =
 502                         gs_prog_data->base.base.dispatch_grf_start_reg,
 503
 504                      .MaximumNumberofThreads = device->info.max_gs_threads,
 505                      .ControlDataHeaderSize = gs_prog_data->control_data_header_size_hwords,
 506                      //pipeline->gs_prog_data.dispatch_mode |
 507                      .StatisticsEnable = true,
 508                      .IncludePrimitiveID = gs_prog_data->include_primitive_id,
 509                      .ReorderMode = TRAILING,
 510                      .Enable = true,
 511
 512                      .ControlDataFormat = gs_prog_data->control_data_format,
 513
 514                      /* FIXME: mesa sets this based on ctx->Transform.ClipPlanesEnabled:
 515                       * UserClipDistanceClipTestEnableBitmask_3DSTATE_GS(v)
 516                       * UserClipDistanceCullTestEnableBitmask(v)
 517                       */
 518
 519                      .VertexURBEntryOutputReadOffset = offset,
 520                      .VertexURBEntryOutputLength = length);
 521
 522    const struct brw_vue_prog_data *vue_prog_data = &pipeline->vs_prog_data.base;
 523    /* Skip the VUE header and position slots */
 524    offset = 1;
 525    length = (vue_prog_data->vue_map.num_slots + 1) / 2 - offset;
 526
 527    if (pipeline->vs_simd8 == NO_KERNEL || (extra && extra->disable_vs))
 528       anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VS,
 529                      .FunctionEnable = false,
 530                      /* Even if VS is disabled, SBE still gets the amount of
 531                       * vertex data to read from this field. */
 532                      .VertexURBEntryOutputReadOffset = offset,
 533                      .VertexURBEntryOutputLength = length);
 534    else
 535       anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VS,
 536                      .KernelStartPointer = pipeline->vs_simd8,
 537                      .SingleVertexDispatch = Multiple,
 538                      .VectorMaskEnable = Dmask,
 539                      .SamplerCount = 0,
 540                      .BindingTableEntryCount =
 541                      vue_prog_data->base.binding_table.size_bytes / 4,
 542                      .ThreadDispatchPriority = Normal,
 543                      .FloatingPointMode = IEEE754,
 544                      .IllegalOpcodeExceptionEnable = false,
 545                      .AccessesUAV = false,
 546                      .SoftwareExceptionEnable = false,
 547
 548                      .ScratchSpaceBasePointer = pipeline->scratch_start[VK_SHADER_STAGE_VERTEX],
 549                      .PerThreadScratchSpace = ffs(vue_prog_data->base.total_scratch / 2048),
 550
 551                      .DispatchGRFStartRegisterForURBData =
 552                      vue_prog_data->base.dispatch_grf_start_reg,
 553                      .VertexURBEntryReadLength = vue_prog_data->urb_read_length,
 554                      .VertexURBEntryReadOffset = 0,
 555
 556                      .MaximumNumberofThreads = device->info.max_vs_threads - 1,
 557                      .StatisticsEnable = false,
 558                      .SIMD8DispatchEnable = true,
 559                      .VertexCacheDisable = false,
 560                      .FunctionEnable = true,
 561
 562                      .VertexURBEntryOutputReadOffset = offset,
 563                      .VertexURBEntryOutputLength = length,
 564                      .UserClipDistanceClipTestEnableBitmask = 0,
 565                      .UserClipDistanceCullTestEnableBitmask = 0);
 566
 567    const struct brw_wm_prog_data *wm_prog_data = &pipeline->wm_prog_data;
 568    uint32_t ksp0, ksp2, grf_start0, grf_start2;
 569
 570    ksp2 = 0;
 571    grf_start2 = 0;
 572    if (pipeline->ps_simd8 != NO_KERNEL) {
 573       ksp0 = pipeline->ps_simd8;
 574       grf_start0 = wm_prog_data->base.dispatch_grf_start_reg;
 575       if (pipeline->ps_simd16 != NO_KERNEL) {
 576          ksp2 = pipeline->ps_simd16;
 577          grf_start2 = wm_prog_data->dispatch_grf_start_reg_16;
 578       }
 579    } else if (pipeline->ps_simd16 != NO_KERNEL) {
 580       ksp0 = pipeline->ps_simd16;
 581       grf_start0 = wm_prog_data->dispatch_grf_start_reg_16;
 582    } else {
 583       unreachable("no ps shader");
 584    }
 585
 586    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PS,
 587                   .KernelStartPointer0 = ksp0,
 588
 589                   .SingleProgramFlow = false,
 590                   .VectorMaskEnable = true,
 591                   .SamplerCount = 1,
 592
 593                   .ScratchSpaceBasePointer = pipeline->scratch_start[VK_SHADER_STAGE_FRAGMENT],
 594                   .PerThreadScratchSpace = ffs(wm_prog_data->base.total_scratch / 2048),
 595
 596                   .MaximumNumberofThreadsPerPSD = 64 - 2,
 597                   .PositionXYOffsetSelect = wm_prog_data->uses_pos_offset ?
 598                      POSOFFSET_SAMPLE: POSOFFSET_NONE,
 599                   .PushConstantEnable = wm_prog_data->base.nr_params > 0,
 600                   ._8PixelDispatchEnable = pipeline->ps_simd8 != NO_KERNEL,
 601                   ._16PixelDispatchEnable = pipeline->ps_simd16 != NO_KERNEL,
 602                   ._32PixelDispatchEnable = false,
 603
 604                   .DispatchGRFStartRegisterForConstantSetupData0 = grf_start0,
 605                   .DispatchGRFStartRegisterForConstantSetupData1 = 0,
 606                   .DispatchGRFStartRegisterForConstantSetupData2 = grf_start2,
 607
 608                   .KernelStartPointer1 = 0,
 609                   .KernelStartPointer2 = ksp2);
 610
 611    bool per_sample_ps = false;
 612    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PS_EXTRA,
 613                   .PixelShaderValid = true,
 614                   .PixelShaderKillsPixel = wm_prog_data->uses_kill,
 615                   .PixelShaderComputedDepthMode = wm_prog_data->computed_depth_mode,
 616                   .AttributeEnable = wm_prog_data->num_varying_inputs > 0,
 617                   .oMaskPresenttoRenderTarget = wm_prog_data->uses_omask,
 618                   .PixelShaderIsPerSample = per_sample_ps);
 619
 620    *pPipeline = anv_pipeline_to_handle(pipeline);
 621
 622    return VK_SUCCESS;
 623 }
 624
 625 VkResult gen8_compute_pipeline_create(
 626     VkDevice                                    _device,
 627     const VkComputePipelineCreateInfo*          pCreateInfo,
 628     VkPipeline*                                 pPipeline)
 629 {
 630    ANV_FROM_HANDLE(anv_device, device, _device);
 631    struct anv_pipeline *pipeline;
 632    VkResult result;
 633
 634    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO);
 635
 636    pipeline = anv_device_alloc(device, sizeof(*pipeline), 8,
 637                                VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
 638    if (pipeline == NULL)
 639       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
 640
 641    pipeline->device = device;
 642    pipeline->layout = anv_pipeline_layout_from_handle(pCreateInfo->layout);
 643
 644    result = anv_reloc_list_init(&pipeline->batch_relocs, device);
 645    if (result != VK_SUCCESS) {
 646       anv_device_free(device, pipeline);
 647       return result;
 648    }
 649    pipeline->batch.next = pipeline->batch.start = pipeline->batch_data;
 650    pipeline->batch.end = pipeline->batch.start + sizeof(pipeline->batch_data);
 651    pipeline->batch.relocs = &pipeline->batch_relocs;
 652
 653    anv_state_stream_init(&pipeline->program_stream,
 654                          &device->instruction_block_pool);
 655
 656    memset(pipeline->shaders, 0, sizeof(pipeline->shaders));
 657
 658    pipeline->shaders[VK_SHADER_STAGE_COMPUTE] =
 659       anv_shader_from_handle(pCreateInfo->cs.shader);
 660
 661    pipeline->use_repclear = false;
 662
 663    anv_compiler_run(device->compiler, pipeline);
 664
 665    const struct brw_cs_prog_data *cs_prog_data = &pipeline->cs_prog_data;
 666
 667    anv_batch_emit(&pipeline->batch, GEN8_MEDIA_VFE_STATE,
 668                   .ScratchSpaceBasePointer = pipeline->scratch_start[VK_SHADER_STAGE_FRAGMENT],
 669                   .PerThreadScratchSpace = ffs(cs_prog_data->base.total_scratch / 2048),
 670                   .ScratchSpaceBasePointerHigh = 0,
 671                   .StackSize = 0,
 672
 673                   .MaximumNumberofThreads = device->info.max_cs_threads - 1,
 674                   .NumberofURBEntries = 2,
 675                   .ResetGatewayTimer = true,
 676                   .BypassGatewayControl = true,
 677                   .URBEntryAllocationSize = 2,
 678                   .CURBEAllocationSize = 0);
 679
 680    struct brw_cs_prog_data *prog_data = &pipeline->cs_prog_data;
 681    uint32_t group_size = prog_data->local_size[0] *
 682       prog_data->local_size[1] * prog_data->local_size[2];
 683    pipeline->cs_thread_width_max = DIV_ROUND_UP(group_size, prog_data->simd_size);
 684    uint32_t remainder = group_size & (prog_data->simd_size - 1);
 685
 686    if (remainder > 0)
 687       pipeline->cs_right_mask = ~0u >> (32 - remainder);
 688    else
 689       pipeline->cs_right_mask = ~0u >> (32 - prog_data->simd_size);
 690
 691
 692    *pPipeline = anv_pipeline_to_handle(pipeline);
 693
 694    return VK_SUCCESS;
 695 }