src/vulkan/gen8_pipeline.c

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <assert.h>
  25 #include <stdbool.h>
  26 #include <string.h>
  27 #include <unistd.h>
  28 #include <fcntl.h>
  29
  30 #include "anv_private.h"
  31
  32 #include "gen8_pack.h"
  33
  34 static void
  35 emit_vertex_input(struct anv_pipeline *pipeline,
  36                   const VkPipelineVertexInputStateCreateInfo *info)
  37 {
  38    const uint32_t num_dwords = 1 + info->attributeCount * 2;
  39    uint32_t *p;
  40
  41    if (info->attributeCount > 0) {
  42       p = anv_batch_emitn(&pipeline->batch, num_dwords,
  43                           GEN8_3DSTATE_VERTEX_ELEMENTS);
  44    }
  45
  46    for (uint32_t i = 0; i < info->attributeCount; i++) {
  47       const VkVertexInputAttributeDescription *desc =
  48          &info->pVertexAttributeDescriptions[i];
  49       const struct anv_format *format = anv_format_for_vk_format(desc->format);
  50
  51       struct GEN8_VERTEX_ELEMENT_STATE element = {
  52          .VertexBufferIndex = desc->binding,
  53          .Valid = true,
  54          .SourceElementFormat = format->surface_format,
  55          .EdgeFlagEnable = false,
  56          .SourceElementOffset = desc->offsetInBytes,
  57          .Component0Control = VFCOMP_STORE_SRC,
  58          .Component1Control = format->num_channels >= 2 ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
  59          .Component2Control = format->num_channels >= 3 ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
  60          .Component3Control = format->num_channels >= 4 ? VFCOMP_STORE_SRC : VFCOMP_STORE_1_FP
  61       };
  62       GEN8_VERTEX_ELEMENT_STATE_pack(NULL, &p[1 + i * 2], &element);
  63
  64       anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_INSTANCING,
  65                      .InstancingEnable = pipeline->instancing_enable[desc->binding],
  66                      .VertexElementIndex = i,
  67                      /* Vulkan so far doesn't have an instance divisor, so
  68                       * this is always 1 (ignored if not instancing). */
  69                      .InstanceDataStepRate = 1);
  70    }
  71
  72    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_SGVS,
  73                   .VertexIDEnable = pipeline->vs_prog_data.uses_vertexid,
  74                   .VertexIDComponentNumber = 2,
  75                   .VertexIDElementOffset = info->bindingCount,
  76                   .InstanceIDEnable = pipeline->vs_prog_data.uses_instanceid,
  77                   .InstanceIDComponentNumber = 3,
  78                   .InstanceIDElementOffset = info->bindingCount);
  79 }
  80
  81 static void
  82 emit_ia_state(struct anv_pipeline *pipeline,
  83               const VkPipelineInputAssemblyStateCreateInfo *info,
  84               const struct anv_graphics_pipeline_create_info *extra)
  85 {
  86    struct GEN8_3DSTATE_VF vf = {
  87       GEN8_3DSTATE_VF_header,
  88       .IndexedDrawCutIndexEnable = pipeline->primitive_restart
  89    };
  90    GEN8_3DSTATE_VF_pack(NULL, pipeline->gen8.vf, &vf);
  91
  92    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_TOPOLOGY,
  93                   .PrimitiveTopologyType = pipeline->topology);
  94 }
  95
  96 static void
  97 emit_rs_state(struct anv_pipeline *pipeline,
  98               const VkPipelineRasterStateCreateInfo *info,
  99               const struct anv_graphics_pipeline_create_info *extra)
 100 {
 101    static const uint32_t vk_to_gen_cullmode[] = {
 102       [VK_CULL_MODE_NONE]                       = CULLMODE_NONE,
 103       [VK_CULL_MODE_FRONT]                      = CULLMODE_FRONT,
 104       [VK_CULL_MODE_BACK]                       = CULLMODE_BACK,
 105       [VK_CULL_MODE_FRONT_AND_BACK]             = CULLMODE_BOTH
 106    };
 107
 108    static const uint32_t vk_to_gen_fillmode[] = {
 109       [VK_FILL_MODE_POINTS]                     = RASTER_POINT,
 110       [VK_FILL_MODE_WIREFRAME]                  = RASTER_WIREFRAME,
 111       [VK_FILL_MODE_SOLID]                      = RASTER_SOLID
 112    };
 113
 114    static const uint32_t vk_to_gen_front_face[] = {
 115       [VK_FRONT_FACE_CCW]                       = CounterClockwise,
 116       [VK_FRONT_FACE_CW]                        = Clockwise
 117    };
 118
 119    struct GEN8_3DSTATE_SF sf = {
 120       GEN8_3DSTATE_SF_header,
 121       .ViewportTransformEnable = !(extra && extra->disable_viewport),
 122       .TriangleStripListProvokingVertexSelect = 0,
 123       .LineStripListProvokingVertexSelect = 0,
 124       .TriangleFanProvokingVertexSelect = 0,
 125       .PointWidthSource = pipeline->writes_point_size ? Vertex : State,
 126       .PointWidth = 1.0,
 127    };
 128
 129    /* FINISHME: VkBool32 rasterizerDiscardEnable; */
 130
 131    GEN8_3DSTATE_SF_pack(NULL, pipeline->gen8.sf, &sf);
 132
 133    struct GEN8_3DSTATE_RASTER raster = {
 134       GEN8_3DSTATE_RASTER_header,
 135       .FrontWinding = vk_to_gen_front_face[info->frontFace],
 136       .CullMode = vk_to_gen_cullmode[info->cullMode],
 137       .FrontFaceFillMode = vk_to_gen_fillmode[info->fillMode],
 138       .BackFaceFillMode = vk_to_gen_fillmode[info->fillMode],
 139       .ScissorRectangleEnable = !(extra && extra->disable_scissor),
 140       .ViewportZClipTestEnable = info->depthClipEnable
 141    };
 142
 143    GEN8_3DSTATE_RASTER_pack(NULL, pipeline->gen8.raster, &raster);
 144 }
 145
 146 static void
 147 emit_cb_state(struct anv_pipeline *pipeline,
 148               const VkPipelineColorBlendStateCreateInfo *info)
 149 {
 150    struct anv_device *device = pipeline->device;
 151
 152    static const uint32_t vk_to_gen_logic_op[] = {
 153       [VK_LOGIC_OP_COPY]                        = LOGICOP_COPY,
 154       [VK_LOGIC_OP_CLEAR]                       = LOGICOP_CLEAR,
 155       [VK_LOGIC_OP_AND]                         = LOGICOP_AND,
 156       [VK_LOGIC_OP_AND_REVERSE]                 = LOGICOP_AND_REVERSE,
 157       [VK_LOGIC_OP_AND_INVERTED]                = LOGICOP_AND_INVERTED,
 158       [VK_LOGIC_OP_NOOP]                        = LOGICOP_NOOP,
 159       [VK_LOGIC_OP_XOR]                         = LOGICOP_XOR,
 160       [VK_LOGIC_OP_OR]                          = LOGICOP_OR,
 161       [VK_LOGIC_OP_NOR]                         = LOGICOP_NOR,
 162       [VK_LOGIC_OP_EQUIV]                       = LOGICOP_EQUIV,
 163       [VK_LOGIC_OP_INVERT]                      = LOGICOP_INVERT,
 164       [VK_LOGIC_OP_OR_REVERSE]                  = LOGICOP_OR_REVERSE,
 165       [VK_LOGIC_OP_COPY_INVERTED]               = LOGICOP_COPY_INVERTED,
 166       [VK_LOGIC_OP_OR_INVERTED]                 = LOGICOP_OR_INVERTED,
 167       [VK_LOGIC_OP_NAND]                        = LOGICOP_NAND,
 168       [VK_LOGIC_OP_SET]                         = LOGICOP_SET,
 169    };
 170
 171    static const uint32_t vk_to_gen_blend[] = {
 172       [VK_BLEND_ZERO]                           = BLENDFACTOR_ZERO,
 173       [VK_BLEND_ONE]                            = BLENDFACTOR_ONE,
 174       [VK_BLEND_SRC_COLOR]                      = BLENDFACTOR_SRC_COLOR,
 175       [VK_BLEND_ONE_MINUS_SRC_COLOR]            = BLENDFACTOR_INV_SRC_COLOR,
 176       [VK_BLEND_DEST_COLOR]                     = BLENDFACTOR_DST_COLOR,
 177       [VK_BLEND_ONE_MINUS_DEST_COLOR]           = BLENDFACTOR_INV_DST_COLOR,
 178       [VK_BLEND_SRC_ALPHA]                      = BLENDFACTOR_SRC_ALPHA,
 179       [VK_BLEND_ONE_MINUS_SRC_ALPHA]            = BLENDFACTOR_INV_SRC_ALPHA,
 180       [VK_BLEND_DEST_ALPHA]                     = BLENDFACTOR_DST_ALPHA,
 181       [VK_BLEND_ONE_MINUS_DEST_ALPHA]           = BLENDFACTOR_INV_DST_ALPHA,
 182       [VK_BLEND_CONSTANT_COLOR]                 = BLENDFACTOR_CONST_COLOR,
 183       [VK_BLEND_ONE_MINUS_CONSTANT_COLOR]       = BLENDFACTOR_INV_CONST_COLOR,
 184       [VK_BLEND_CONSTANT_ALPHA]                 = BLENDFACTOR_CONST_ALPHA,
 185       [VK_BLEND_ONE_MINUS_CONSTANT_ALPHA]       = BLENDFACTOR_INV_CONST_ALPHA,
 186       [VK_BLEND_SRC_ALPHA_SATURATE]             = BLENDFACTOR_SRC_ALPHA_SATURATE,
 187       [VK_BLEND_SRC1_COLOR]                     = BLENDFACTOR_SRC1_COLOR,
 188       [VK_BLEND_ONE_MINUS_SRC1_COLOR]           = BLENDFACTOR_INV_SRC1_COLOR,
 189       [VK_BLEND_SRC1_ALPHA]                     = BLENDFACTOR_SRC1_ALPHA,
 190       [VK_BLEND_ONE_MINUS_SRC1_ALPHA]           = BLENDFACTOR_INV_SRC1_ALPHA,
 191    };
 192
 193    static const uint32_t vk_to_gen_blend_op[] = {
 194       [VK_BLEND_OP_ADD]                         = BLENDFUNCTION_ADD,
 195       [VK_BLEND_OP_SUBTRACT]                    = BLENDFUNCTION_SUBTRACT,
 196       [VK_BLEND_OP_REVERSE_SUBTRACT]            = BLENDFUNCTION_REVERSE_SUBTRACT,
 197       [VK_BLEND_OP_MIN]                         = BLENDFUNCTION_MIN,
 198       [VK_BLEND_OP_MAX]                         = BLENDFUNCTION_MAX,
 199    };
 200
 201    uint32_t num_dwords = GEN8_BLEND_STATE_length;
 202    pipeline->blend_state =
 203       anv_state_pool_alloc(&device->dynamic_state_pool, num_dwords * 4, 64);
 204
 205    struct GEN8_BLEND_STATE blend_state = {
 206       .AlphaToCoverageEnable = info->alphaToCoverageEnable,
 207    };
 208
 209    for (uint32_t i = 0; i < info->attachmentCount; i++) {
 210       const VkPipelineColorBlendAttachmentState *a = &info->pAttachments[i];
 211
 212       blend_state.Entry[i] = (struct GEN8_BLEND_STATE_ENTRY) {
 213          .LogicOpEnable = info->logicOpEnable,
 214          .LogicOpFunction = vk_to_gen_logic_op[info->logicOp],
 215          .ColorBufferBlendEnable = a->blendEnable,
 216          .PreBlendSourceOnlyClampEnable = false,
 217          .PreBlendColorClampEnable = false,
 218          .PostBlendColorClampEnable = false,
 219          .SourceBlendFactor = vk_to_gen_blend[a->srcBlendColor],
 220          .DestinationBlendFactor = vk_to_gen_blend[a->destBlendColor],
 221          .ColorBlendFunction = vk_to_gen_blend_op[a->blendOpColor],
 222          .SourceAlphaBlendFactor = vk_to_gen_blend[a->srcBlendAlpha],
 223          .DestinationAlphaBlendFactor = vk_to_gen_blend[a->destBlendAlpha],
 224          .AlphaBlendFunction = vk_to_gen_blend_op[a->blendOpAlpha],
 225          .WriteDisableAlpha = !(a->channelWriteMask & VK_CHANNEL_A_BIT),
 226          .WriteDisableRed = !(a->channelWriteMask & VK_CHANNEL_R_BIT),
 227          .WriteDisableGreen = !(a->channelWriteMask & VK_CHANNEL_G_BIT),
 228          .WriteDisableBlue = !(a->channelWriteMask & VK_CHANNEL_B_BIT),
 229       };
 230    }
 231
 232    GEN8_BLEND_STATE_pack(NULL, pipeline->blend_state.map, &blend_state);
 233
 234    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_BLEND_STATE_POINTERS,
 235                   .BlendStatePointer = pipeline->blend_state.offset,
 236                   .BlendStatePointerValid = true);
 237 }
 238
 239 static const uint32_t vk_to_gen_compare_op[] = {
 240    [VK_COMPARE_OP_NEVER]                        = COMPAREFUNCTION_NEVER,
 241    [VK_COMPARE_OP_LESS]                         = COMPAREFUNCTION_LESS,
 242    [VK_COMPARE_OP_EQUAL]                        = COMPAREFUNCTION_EQUAL,
 243    [VK_COMPARE_OP_LESS_EQUAL]                   = COMPAREFUNCTION_LEQUAL,
 244    [VK_COMPARE_OP_GREATER]                      = COMPAREFUNCTION_GREATER,
 245    [VK_COMPARE_OP_NOT_EQUAL]                    = COMPAREFUNCTION_NOTEQUAL,
 246    [VK_COMPARE_OP_GREATER_EQUAL]                = COMPAREFUNCTION_GEQUAL,
 247    [VK_COMPARE_OP_ALWAYS]                       = COMPAREFUNCTION_ALWAYS,
 248 };
 249
 250 static const uint32_t vk_to_gen_stencil_op[] = {
 251    [VK_STENCIL_OP_KEEP]                         = STENCILOP_KEEP,
 252    [VK_STENCIL_OP_ZERO]                         = STENCILOP_ZERO,
 253    [VK_STENCIL_OP_REPLACE]                      = STENCILOP_REPLACE,
 254    [VK_STENCIL_OP_INC_CLAMP]                    = STENCILOP_INCRSAT,
 255    [VK_STENCIL_OP_DEC_CLAMP]                    = STENCILOP_DECRSAT,
 256    [VK_STENCIL_OP_INVERT]                       = STENCILOP_INVERT,
 257    [VK_STENCIL_OP_INC_WRAP]                     = STENCILOP_INCR,
 258    [VK_STENCIL_OP_DEC_WRAP]                     = STENCILOP_DECR,
 259 };
 260
 261 static void
 262 emit_ds_state(struct anv_pipeline *pipeline,
 263               const VkPipelineDepthStencilStateCreateInfo *info)
 264 {
 265    if (info == NULL) {
 266       /* We're going to OR this together with the dynamic state.  We need
 267        * to make sure it's initialized to something useful.
 268        */
 269       memset(pipeline->gen8.wm_depth_stencil, 0,
 270              sizeof(pipeline->gen8.wm_depth_stencil));
 271       return;
 272    }
 273
 274    /* VkBool32 depthBoundsTestEnable; // optional (depth_bounds_test) */
 275
 276    struct GEN8_3DSTATE_WM_DEPTH_STENCIL wm_depth_stencil = {
 277       .DepthTestEnable = info->depthTestEnable,
 278       .DepthBufferWriteEnable = info->depthWriteEnable,
 279       .DepthTestFunction = vk_to_gen_compare_op[info->depthCompareOp],
 280       .DoubleSidedStencilEnable = true,
 281
 282       .StencilTestEnable = info->stencilTestEnable,
 283       .StencilFailOp = vk_to_gen_stencil_op[info->front.stencilFailOp],
 284       .StencilPassDepthPassOp = vk_to_gen_stencil_op[info->front.stencilPassOp],
 285       .StencilPassDepthFailOp = vk_to_gen_stencil_op[info->front.stencilDepthFailOp],
 286       .StencilTestFunction = vk_to_gen_compare_op[info->front.stencilCompareOp],
 287       .BackfaceStencilFailOp = vk_to_gen_stencil_op[info->back.stencilFailOp],
 288       .BackfaceStencilPassDepthPassOp = vk_to_gen_stencil_op[info->back.stencilPassOp],
 289       .BackfaceStencilPassDepthFailOp =vk_to_gen_stencil_op[info->back.stencilDepthFailOp],
 290       .BackfaceStencilTestFunction = vk_to_gen_compare_op[info->back.stencilCompareOp],
 291    };
 292
 293    GEN8_3DSTATE_WM_DEPTH_STENCIL_pack(NULL, pipeline->gen8.wm_depth_stencil, &wm_depth_stencil);
 294 }
 295
 296 VkResult
 297 gen8_graphics_pipeline_create(
 298     VkDevice                                    _device,
 299     const VkGraphicsPipelineCreateInfo*         pCreateInfo,
 300     const struct anv_graphics_pipeline_create_info *extra,
 301     VkPipeline*                                 pPipeline)
 302 {
 303    ANV_FROM_HANDLE(anv_device, device, _device);
 304    struct anv_pipeline *pipeline;
 305    VkResult result;
 306    uint32_t offset, length;
 307
 308    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO);
 309
 310    pipeline = anv_device_alloc(device, sizeof(*pipeline), 8,
 311                                VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
 312    if (pipeline == NULL)
 313       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
 314
 315    result = anv_pipeline_init(pipeline, device, pCreateInfo, extra);
 316    if (result != VK_SUCCESS)
 317       return result;
 318
 319    /* FIXME: The compiler dead-codes FS inputs when we don't have a VS, so we
 320     * hard code this to num_attributes - 2. This is because the attributes
 321     * include VUE header and position, which aren't counted as varying
 322     * inputs. */
 323    if (pipeline->vs_simd8 == NO_KERNEL) {
 324       pipeline->wm_prog_data.num_varying_inputs =
 325          pCreateInfo->pVertexInputState->attributeCount - 2;
 326    }
 327
 328    assert(pCreateInfo->pVertexInputState);
 329    emit_vertex_input(pipeline, pCreateInfo->pVertexInputState);
 330    assert(pCreateInfo->pInputAssemblyState);
 331    emit_ia_state(pipeline, pCreateInfo->pInputAssemblyState, extra);
 332    assert(pCreateInfo->pRasterState);
 333    emit_rs_state(pipeline, pCreateInfo->pRasterState, extra);
 334    emit_ds_state(pipeline, pCreateInfo->pDepthStencilState);
 335    emit_cb_state(pipeline, pCreateInfo->pColorBlendState);
 336
 337    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_STATISTICS,
 338                    .StatisticsEnable = true);
 339    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_HS, .Enable = false);
 340    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_TE, .TEEnable = false);
 341    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_DS, .FunctionEnable = false);
 342    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_STREAMOUT, .SOFunctionEnable = false);
 343
 344    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS,
 345                   .ConstantBufferOffset = 0,
 346                   .ConstantBufferSize = 4);
 347    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS,
 348                   .ConstantBufferOffset = 4,
 349                   .ConstantBufferSize = 4);
 350    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS,
 351                   .ConstantBufferOffset = 8,
 352                   .ConstantBufferSize = 4);
 353
 354    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_WM_CHROMAKEY,
 355                   .ChromaKeyKillEnable = false);
 356    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_AA_LINE_PARAMETERS);
 357
 358    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_CLIP,
 359                   .ClipEnable = true,
 360                   .ViewportXYClipTestEnable = !(extra && extra->disable_viewport),
 361                   .MinimumPointWidth = 0.125,
 362                   .MaximumPointWidth = 255.875);
 363
 364    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_WM,
 365                   .StatisticsEnable = true,
 366                   .LineEndCapAntialiasingRegionWidth = _05pixels,
 367                   .LineAntialiasingRegionWidth = _10pixels,
 368                   .EarlyDepthStencilControl = NORMAL,
 369                   .ForceThreadDispatchEnable = NORMAL,
 370                   .PointRasterizationRule = RASTRULE_UPPER_RIGHT,
 371                   .BarycentricInterpolationMode =
 372                      pipeline->wm_prog_data.barycentric_interp_modes);
 373
 374    uint32_t samples = 1;
 375    uint32_t log2_samples = __builtin_ffs(samples) - 1;
 376    bool enable_sampling = samples > 1 ? true : false;
 377
 378    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_MULTISAMPLE,
 379                   .PixelPositionOffsetEnable = enable_sampling,
 380                   .PixelLocation = CENTER,
 381                   .NumberofMultisamples = log2_samples);
 382
 383    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_SAMPLE_MASK,
 384                   .SampleMask = 0xffff);
 385
 386    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_VS,
 387                   .VSURBStartingAddress = pipeline->urb.vs_start,
 388                   .VSURBEntryAllocationSize = pipeline->urb.vs_size - 1,
 389                   .VSNumberofURBEntries = pipeline->urb.nr_vs_entries);
 390
 391    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_GS,
 392                   .GSURBStartingAddress = pipeline->urb.gs_start,
 393                   .GSURBEntryAllocationSize = pipeline->urb.gs_size - 1,
 394                   .GSNumberofURBEntries = pipeline->urb.nr_gs_entries);
 395
 396    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_HS,
 397                   .HSURBStartingAddress = pipeline->urb.vs_start,
 398                   .HSURBEntryAllocationSize = 0,
 399                   .HSNumberofURBEntries = 0);
 400
 401    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_DS,
 402                   .DSURBStartingAddress = pipeline->urb.vs_start,
 403                   .DSURBEntryAllocationSize = 0,
 404                   .DSNumberofURBEntries = 0);
 405
 406    const struct brw_gs_prog_data *gs_prog_data = &pipeline->gs_prog_data;
 407    offset = 1;
 408    length = (gs_prog_data->base.vue_map.num_slots + 1) / 2 - offset;
 409
 410    if (pipeline->gs_vec4 == NO_KERNEL)
 411       anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_GS, .Enable = false);
 412    else
 413       anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_GS,
 414                      .SingleProgramFlow = false,
 415                      .KernelStartPointer = pipeline->gs_vec4,
 416                      .VectorMaskEnable = Dmask,
 417                      .SamplerCount = 0,
 418                      .BindingTableEntryCount = 0,
 419                      .ExpectedVertexCount = pipeline->gs_vertex_count,
 420
 421                      .ScratchSpaceBasePointer = pipeline->scratch_start[VK_SHADER_STAGE_GEOMETRY],
 422                      .PerThreadScratchSpace = ffs(gs_prog_data->base.base.total_scratch / 2048),
 423
 424                      .OutputVertexSize = gs_prog_data->output_vertex_size_hwords * 2 - 1,
 425                      .OutputTopology = gs_prog_data->output_topology,
 426                      .VertexURBEntryReadLength = gs_prog_data->base.urb_read_length,
 427                      .DispatchGRFStartRegisterForURBData =
 428                         gs_prog_data->base.base.dispatch_grf_start_reg,
 429
 430                      .MaximumNumberofThreads = device->info.max_gs_threads / 2 - 1,
 431                      .ControlDataHeaderSize = gs_prog_data->control_data_header_size_hwords,
 432                      .DispatchMode = gs_prog_data->base.dispatch_mode,
 433                      .StatisticsEnable = true,
 434                      .IncludePrimitiveID = gs_prog_data->include_primitive_id,
 435                      .ReorderMode = TRAILING,
 436                      .Enable = true,
 437
 438                      .ControlDataFormat = gs_prog_data->control_data_format,
 439
 440                      .StaticOutput = gs_prog_data->static_vertex_count >= 0,
 441                      .StaticOutputVertexCount =
 442                         gs_prog_data->static_vertex_count >= 0 ?
 443                         gs_prog_data->static_vertex_count : 0,
 444
 445                      /* FIXME: mesa sets this based on ctx->Transform.ClipPlanesEnabled:
 446                       * UserClipDistanceClipTestEnableBitmask_3DSTATE_GS(v)
 447                       * UserClipDistanceCullTestEnableBitmask(v)
 448                       */
 449
 450                      .VertexURBEntryOutputReadOffset = offset,
 451                      .VertexURBEntryOutputLength = length);
 452
 453    const struct brw_vue_prog_data *vue_prog_data = &pipeline->vs_prog_data.base;
 454    /* Skip the VUE header and position slots */
 455    offset = 1;
 456    length = (vue_prog_data->vue_map.num_slots + 1) / 2 - offset;
 457
 458    if (pipeline->vs_simd8 == NO_KERNEL || (extra && extra->disable_vs))
 459       anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VS,
 460                      .FunctionEnable = false,
 461                      /* Even if VS is disabled, SBE still gets the amount of
 462                       * vertex data to read from this field. */
 463                      .VertexURBEntryOutputReadOffset = offset,
 464                      .VertexURBEntryOutputLength = length);
 465    else
 466       anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VS,
 467                      .KernelStartPointer = pipeline->vs_simd8,
 468                      .SingleVertexDispatch = Multiple,
 469                      .VectorMaskEnable = Dmask,
 470                      .SamplerCount = 0,
 471                      .BindingTableEntryCount =
 472                      vue_prog_data->base.binding_table.size_bytes / 4,
 473                      .ThreadDispatchPriority = Normal,
 474                      .FloatingPointMode = IEEE754,
 475                      .IllegalOpcodeExceptionEnable = false,
 476                      .AccessesUAV = false,
 477                      .SoftwareExceptionEnable = false,
 478
 479                      .ScratchSpaceBasePointer = pipeline->scratch_start[VK_SHADER_STAGE_VERTEX],
 480                      .PerThreadScratchSpace = ffs(vue_prog_data->base.total_scratch / 2048),
 481
 482                      .DispatchGRFStartRegisterForURBData =
 483                      vue_prog_data->base.dispatch_grf_start_reg,
 484                      .VertexURBEntryReadLength = vue_prog_data->urb_read_length,
 485                      .VertexURBEntryReadOffset = 0,
 486
 487                      .MaximumNumberofThreads = device->info.max_vs_threads - 1,
 488                      .StatisticsEnable = false,
 489                      .SIMD8DispatchEnable = true,
 490                      .VertexCacheDisable = false,
 491                      .FunctionEnable = true,
 492
 493                      .VertexURBEntryOutputReadOffset = offset,
 494                      .VertexURBEntryOutputLength = length,
 495                      .UserClipDistanceClipTestEnableBitmask = 0,
 496                      .UserClipDistanceCullTestEnableBitmask = 0);
 497
 498    const struct brw_wm_prog_data *wm_prog_data = &pipeline->wm_prog_data;
 499
 500    /* TODO: We should clean this up.  Among other things, this is mostly
 501     * shared with other gens.
 502     */
 503    const struct brw_vue_map *fs_input_map;
 504    if (pipeline->gs_vec4 == NO_KERNEL)
 505       fs_input_map = &vue_prog_data->vue_map;
 506    else
 507       fs_input_map = &gs_prog_data->base.vue_map;
 508
 509    struct GEN8_3DSTATE_SBE_SWIZ swiz = {
 510       GEN8_3DSTATE_SBE_SWIZ_header,
 511    };
 512
 513    int max_source_attr = 0;
 514    for (int attr = 0; attr < VARYING_SLOT_MAX; attr++) {
 515       int input_index = wm_prog_data->urb_setup[attr];
 516
 517       if (input_index < 0)
 518          continue;
 519
 520       /* We have to subtract two slots to accout for the URB entry output
 521        * read offset in the VS and GS stages.
 522        */
 523       int source_attr = fs_input_map->varying_to_slot[attr] - 2;
 524       max_source_attr = MAX2(max_source_attr, source_attr);
 525
 526       if (input_index >= 16)
 527          continue;
 528
 529       swiz.Attribute[input_index].SourceAttribute = source_attr;
 530    }
 531
 532    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_SBE,
 533                   .AttributeSwizzleEnable = true,
 534                   .ForceVertexURBEntryReadLength = false,
 535                   .ForceVertexURBEntryReadOffset = false,
 536                   .VertexURBEntryReadLength = DIV_ROUND_UP(max_source_attr + 1, 2),
 537                   .PointSpriteTextureCoordinateOrigin = UPPERLEFT,
 538                   .NumberofSFOutputAttributes =
 539                      wm_prog_data->num_varying_inputs);
 540
 541    uint32_t *dw = anv_batch_emit_dwords(&pipeline->batch,
 542                                         GEN8_3DSTATE_SBE_SWIZ_length);
 543    GEN8_3DSTATE_SBE_SWIZ_pack(&pipeline->batch, dw, &swiz);
 544
 545    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PS,
 546                   .KernelStartPointer0 = pipeline->ps_ksp0,
 547
 548                   .SingleProgramFlow = false,
 549                   .VectorMaskEnable = true,
 550                   .SamplerCount = 1,
 551
 552                   .ScratchSpaceBasePointer = pipeline->scratch_start[VK_SHADER_STAGE_FRAGMENT],
 553                   .PerThreadScratchSpace = ffs(wm_prog_data->base.total_scratch / 2048),
 554
 555                   .MaximumNumberofThreadsPerPSD = 64 - 2,
 556                   .PositionXYOffsetSelect = wm_prog_data->uses_pos_offset ?
 557                      POSOFFSET_SAMPLE: POSOFFSET_NONE,
 558                   .PushConstantEnable = wm_prog_data->base.nr_params > 0,
 559                   ._8PixelDispatchEnable = pipeline->ps_simd8 != NO_KERNEL,
 560                   ._16PixelDispatchEnable = pipeline->ps_simd16 != NO_KERNEL,
 561                   ._32PixelDispatchEnable = false,
 562
 563                   .DispatchGRFStartRegisterForConstantSetupData0 = pipeline->ps_grf_start0,
 564                   .DispatchGRFStartRegisterForConstantSetupData1 = 0,
 565                   .DispatchGRFStartRegisterForConstantSetupData2 = pipeline->ps_grf_start2,
 566
 567                   .KernelStartPointer1 = 0,
 568                   .KernelStartPointer2 = pipeline->ps_ksp2);
 569
 570    bool per_sample_ps = false;
 571    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PS_EXTRA,
 572                   .PixelShaderValid = true,
 573                   .PixelShaderKillsPixel = wm_prog_data->uses_kill,
 574                   .PixelShaderComputedDepthMode = wm_prog_data->computed_depth_mode,
 575                   .AttributeEnable = wm_prog_data->num_varying_inputs > 0,
 576                   .oMaskPresenttoRenderTarget = wm_prog_data->uses_omask,
 577                   .PixelShaderIsPerSample = per_sample_ps);
 578
 579    *pPipeline = anv_pipeline_to_handle(pipeline);
 580
 581    return VK_SUCCESS;
 582 }
 583
 584 VkResult gen8_compute_pipeline_create(
 585     VkDevice                                    _device,
 586     const VkComputePipelineCreateInfo*          pCreateInfo,
 587     VkPipeline*                                 pPipeline)
 588 {
 589    ANV_FROM_HANDLE(anv_device, device, _device);
 590    struct anv_pipeline *pipeline;
 591    VkResult result;
 592
 593    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO);
 594
 595    pipeline = anv_device_alloc(device, sizeof(*pipeline), 8,
 596                                VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
 597    if (pipeline == NULL)
 598       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
 599
 600    pipeline->device = device;
 601    pipeline->layout = anv_pipeline_layout_from_handle(pCreateInfo->layout);
 602
 603    pipeline->blend_state.map = NULL;
 604
 605    result = anv_reloc_list_init(&pipeline->batch_relocs, device);
 606    if (result != VK_SUCCESS) {
 607       anv_device_free(device, pipeline);
 608       return result;
 609    }
 610    pipeline->batch.next = pipeline->batch.start = pipeline->batch_data;
 611    pipeline->batch.end = pipeline->batch.start + sizeof(pipeline->batch_data);
 612    pipeline->batch.relocs = &pipeline->batch_relocs;
 613
 614    anv_state_stream_init(&pipeline->program_stream,
 615                          &device->instruction_block_pool);
 616
 617    /* When we free the pipeline, we detect stages based on the NULL status
 618     * of various prog_data pointers.  Make them NULL by default.
 619     */
 620    memset(pipeline->prog_data, 0, sizeof(pipeline->prog_data));
 621    memset(pipeline->scratch_start, 0, sizeof(pipeline->scratch_start));
 622
 623    pipeline->vs_simd8 = NO_KERNEL;
 624    pipeline->vs_vec4 = NO_KERNEL;
 625    pipeline->gs_vec4 = NO_KERNEL;
 626
 627    pipeline->active_stages = 0;
 628    pipeline->total_scratch = 0;
 629
 630    assert(pCreateInfo->stage.stage == VK_SHADER_STAGE_COMPUTE);
 631    ANV_FROM_HANDLE(anv_shader, shader,  pCreateInfo->stage.shader);
 632    anv_pipeline_compile_cs(pipeline, pCreateInfo, shader);
 633
 634    pipeline->use_repclear = false;
 635
 636    const struct brw_cs_prog_data *cs_prog_data = &pipeline->cs_prog_data;
 637
 638    anv_batch_emit(&pipeline->batch, GEN8_MEDIA_VFE_STATE,
 639                   .ScratchSpaceBasePointer = pipeline->scratch_start[VK_SHADER_STAGE_COMPUTE],
 640                   .PerThreadScratchSpace = ffs(cs_prog_data->base.total_scratch / 2048),
 641                   .ScratchSpaceBasePointerHigh = 0,
 642                   .StackSize = 0,
 643
 644                   .MaximumNumberofThreads = device->info.max_cs_threads - 1,
 645                   .NumberofURBEntries = 2,
 646                   .ResetGatewayTimer = true,
 647                   .BypassGatewayControl = true,
 648                   .URBEntryAllocationSize = 2,
 649                   .CURBEAllocationSize = 0);
 650
 651    struct brw_cs_prog_data *prog_data = &pipeline->cs_prog_data;
 652    uint32_t group_size = prog_data->local_size[0] *
 653       prog_data->local_size[1] * prog_data->local_size[2];
 654    pipeline->cs_thread_width_max = DIV_ROUND_UP(group_size, prog_data->simd_size);
 655    uint32_t remainder = group_size & (prog_data->simd_size - 1);
 656
 657    if (remainder > 0)
 658       pipeline->cs_right_mask = ~0u >> (32 - remainder);
 659    else
 660       pipeline->cs_right_mask = ~0u >> (32 - prog_data->simd_size);
 661
 662
 663    *pPipeline = anv_pipeline_to_handle(pipeline);
 664
 665    return VK_SUCCESS;
 666 }