vk: Use consistent names for anv_*_view variables
[mesa.git] / src / vulkan / gen8_state.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29
30 #include "anv_private.h"
31
32 VkResult gen8_CreateDynamicRasterState(
33 VkDevice _device,
34 const VkDynamicRasterStateCreateInfo* pCreateInfo,
35 VkDynamicRasterState* pState)
36 {
37 ANV_FROM_HANDLE(anv_device, device, _device);
38 struct anv_dynamic_rs_state *state;
39
40 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DYNAMIC_RASTER_STATE_CREATE_INFO);
41
42 state = anv_device_alloc(device, sizeof(*state), 8,
43 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
44 if (state == NULL)
45 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
46
47 struct GEN8_3DSTATE_SF sf = {
48 GEN8_3DSTATE_SF_header,
49 .LineWidth = pCreateInfo->lineWidth,
50 };
51
52 GEN8_3DSTATE_SF_pack(NULL, state->gen8.sf, &sf);
53
54 bool enable_bias = pCreateInfo->depthBias != 0.0f ||
55 pCreateInfo->slopeScaledDepthBias != 0.0f;
56 struct GEN8_3DSTATE_RASTER raster = {
57 .GlobalDepthOffsetEnableSolid = enable_bias,
58 .GlobalDepthOffsetEnableWireframe = enable_bias,
59 .GlobalDepthOffsetEnablePoint = enable_bias,
60 .GlobalDepthOffsetConstant = pCreateInfo->depthBias,
61 .GlobalDepthOffsetScale = pCreateInfo->slopeScaledDepthBias,
62 .GlobalDepthOffsetClamp = pCreateInfo->depthBiasClamp
63 };
64
65 GEN8_3DSTATE_RASTER_pack(NULL, state->gen8.raster, &raster);
66
67 *pState = anv_dynamic_rs_state_to_handle(state);
68
69 return VK_SUCCESS;
70 }
71
72 void
73 gen8_fill_buffer_surface_state(void *state, const struct anv_format *format,
74 uint32_t offset, uint32_t range)
75 {
76 /* This assumes RGBA float format. */
77 uint32_t stride = 4;
78 uint32_t num_elements = range / stride;
79
80 struct GEN8_RENDER_SURFACE_STATE surface_state = {
81 .SurfaceType = SURFTYPE_BUFFER,
82 .SurfaceArray = false,
83 .SurfaceFormat = format->surface_format,
84 .SurfaceVerticalAlignment = VALIGN4,
85 .SurfaceHorizontalAlignment = HALIGN4,
86 .TileMode = LINEAR,
87 .SamplerL2BypassModeDisable = true,
88 .RenderCacheReadWriteMode = WriteOnlyCache,
89 .MemoryObjectControlState = GEN8_MOCS,
90 .Height = (num_elements >> 7) & 0x3fff,
91 .Width = num_elements & 0x7f,
92 .Depth = (num_elements >> 21) & 0x3f,
93 .SurfacePitch = stride - 1,
94 .NumberofMultisamples = MULTISAMPLECOUNT_1,
95 .ShaderChannelSelectRed = SCS_RED,
96 .ShaderChannelSelectGreen = SCS_GREEN,
97 .ShaderChannelSelectBlue = SCS_BLUE,
98 .ShaderChannelSelectAlpha = SCS_ALPHA,
99 /* FIXME: We assume that the image must be bound at this time. */
100 .SurfaceBaseAddress = { NULL, offset },
101 };
102
103 GEN8_RENDER_SURFACE_STATE_pack(NULL, state, &surface_state);
104 }
105
106 VkResult gen8_CreateBufferView(
107 VkDevice _device,
108 const VkBufferViewCreateInfo* pCreateInfo,
109 VkBufferView* pView)
110 {
111 ANV_FROM_HANDLE(anv_device, device, _device);
112 struct anv_buffer_view *bview;
113 VkResult result;
114
115 result = anv_buffer_view_create(device, pCreateInfo, &bview);
116 if (result != VK_SUCCESS)
117 return result;
118
119 const struct anv_format *format =
120 anv_format_for_vk_format(pCreateInfo->format);
121
122 gen8_fill_buffer_surface_state(bview->surface_view.surface_state.map,
123 format, bview->surface_view.offset,
124 pCreateInfo->range);
125
126 *pView = anv_buffer_view_to_handle(bview);
127
128 return VK_SUCCESS;
129 }
130
131 static const uint8_t anv_halign[] = {
132 [4] = HALIGN4,
133 [8] = HALIGN8,
134 [16] = HALIGN16,
135 };
136
137 static const uint8_t anv_valign[] = {
138 [4] = VALIGN4,
139 [8] = VALIGN8,
140 [16] = VALIGN16,
141 };
142
143 void
144 gen8_image_view_init(struct anv_image_view *iview,
145 struct anv_device *device,
146 const VkImageViewCreateInfo* pCreateInfo,
147 struct anv_cmd_buffer *cmd_buffer)
148 {
149 ANV_FROM_HANDLE(anv_image, image, pCreateInfo->image);
150
151 const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
152 struct anv_surface_view *sview = &iview->surface_view;
153 struct anv_surface *surface =
154 anv_image_get_surface_for_aspect_mask(image, range->aspectMask);
155
156 uint32_t depth = 1; /* RENDER_SURFACE_STATE::Depth */
157 uint32_t rt_view_extent = 1; /* RENDER_SURFACE_STATE::RenderTargetViewExtent */
158
159 const struct anv_format *format_info =
160 anv_format_for_vk_format(pCreateInfo->format);
161
162 const struct anv_image_view_info view_type_info =
163 anv_image_view_info_for_vk_image_view_type(pCreateInfo->viewType);
164
165 sview->bo = image->bo;
166 sview->offset = image->offset + surface->offset;
167 sview->format = format_info;
168
169 iview->extent = (VkExtent3D) {
170 .width = anv_minify(image->extent.width, range->baseMipLevel),
171 .height = anv_minify(image->extent.height, range->baseMipLevel),
172 .depth = anv_minify(image->extent.depth, range->baseMipLevel),
173 };
174
175 switch (image->type) {
176 case VK_IMAGE_TYPE_1D:
177 case VK_IMAGE_TYPE_2D:
178 /* From the Broadwell PRM >> RENDER_SURFACE_STATE::Depth:
179 *
180 * For SURFTYPE_1D, 2D, and CUBE: The range of this field is reduced
181 * by one for each increase from zero of Minimum Array Element. For
182 * example, if Minimum Array Element is set to 1024 on a 2D surface,
183 * the range of this field is reduced to [0,1023].
184 */
185 depth = range->arraySize;
186
187 /* From the Broadwell PRM >> RENDER_SURFACE_STATE::RenderTargetViewExtent:
188 *
189 * For Render Target and Typed Dataport 1D and 2D Surfaces:
190 * This field must be set to the same value as the Depth field.
191 */
192 rt_view_extent = depth;
193 break;
194 case VK_IMAGE_TYPE_3D:
195 /* From the Broadwell PRM >> RENDER_SURFACE_STATE::Depth:
196 *
197 * If the volume texture is MIP-mapped, this field specifies the
198 * depth of the base MIP level.
199 */
200 depth = image->extent.depth;
201
202 /* From the Broadwell PRM >> RENDER_SURFACE_STATE::RenderTargetViewExtent:
203 *
204 * For Render Target and Typed Dataport 3D Surfaces: This field
205 * indicates the extent of the accessible 'R' coordinates minus 1 on
206 * the LOD currently being rendered to.
207 */
208 rt_view_extent = iview->extent.depth;
209 break;
210 default:
211 unreachable(!"bad VkImageType");
212 }
213
214 static const uint32_t vk_to_gen_swizzle[] = {
215 [VK_CHANNEL_SWIZZLE_ZERO] = SCS_ZERO,
216 [VK_CHANNEL_SWIZZLE_ONE] = SCS_ONE,
217 [VK_CHANNEL_SWIZZLE_R] = SCS_RED,
218 [VK_CHANNEL_SWIZZLE_G] = SCS_GREEN,
219 [VK_CHANNEL_SWIZZLE_B] = SCS_BLUE,
220 [VK_CHANNEL_SWIZZLE_A] = SCS_ALPHA
221 };
222
223 struct GEN8_RENDER_SURFACE_STATE surface_state = {
224 .SurfaceType = view_type_info.surface_type,
225 .SurfaceArray = image->array_size > 1,
226 .SurfaceFormat = format_info->surface_format,
227 .SurfaceVerticalAlignment = anv_valign[surface->v_align],
228 .SurfaceHorizontalAlignment = anv_halign[surface->h_align],
229 .TileMode = surface->tile_mode,
230 .VerticalLineStride = 0,
231 .VerticalLineStrideOffset = 0,
232 .SamplerL2BypassModeDisable = true,
233 .RenderCacheReadWriteMode = WriteOnlyCache,
234 .MemoryObjectControlState = GEN8_MOCS,
235
236 /* The driver sets BaseMipLevel in SAMPLER_STATE, not here in
237 * RENDER_SURFACE_STATE. The Broadwell PRM says "it is illegal to have
238 * both Base Mip Level fields nonzero".
239 */
240 .BaseMipLevel = 0.0,
241
242 .SurfaceQPitch = surface->qpitch >> 2,
243 .Height = image->extent.height - 1,
244 .Width = image->extent.width - 1,
245 .Depth = depth - 1,
246 .SurfacePitch = surface->stride - 1,
247 .RenderTargetViewExtent = rt_view_extent - 1,
248 .MinimumArrayElement = range->baseArraySlice,
249 .NumberofMultisamples = MULTISAMPLECOUNT_1,
250 .XOffset = 0,
251 .YOffset = 0,
252
253 /* For sampler surfaces, the hardware interprets field MIPCount/LOD as
254 * MIPCount. The range of levels accessible by the sampler engine is
255 * [SurfaceMinLOD, SurfaceMinLOD + MIPCountLOD].
256 */
257 .MIPCountLOD = range->mipLevels - 1,
258 .SurfaceMinLOD = range->baseMipLevel,
259
260 .AuxiliarySurfaceMode = AUX_NONE,
261 .RedClearColor = 0,
262 .GreenClearColor = 0,
263 .BlueClearColor = 0,
264 .AlphaClearColor = 0,
265 .ShaderChannelSelectRed = vk_to_gen_swizzle[pCreateInfo->channels.r],
266 .ShaderChannelSelectGreen = vk_to_gen_swizzle[pCreateInfo->channels.g],
267 .ShaderChannelSelectBlue = vk_to_gen_swizzle[pCreateInfo->channels.b],
268 .ShaderChannelSelectAlpha = vk_to_gen_swizzle[pCreateInfo->channels.a],
269 .ResourceMinLOD = 0.0,
270 .SurfaceBaseAddress = { NULL, sview->offset },
271 };
272
273 if (cmd_buffer) {
274 sview->surface_state =
275 anv_state_stream_alloc(&cmd_buffer->surface_state_stream, 64, 64);
276 } else {
277 sview->surface_state =
278 anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
279 }
280
281 GEN8_RENDER_SURFACE_STATE_pack(NULL, sview->surface_state.map,
282 &surface_state);
283 }
284
285 void
286 gen8_color_attachment_view_init(struct anv_color_attachment_view *cview,
287 struct anv_device *device,
288 const VkAttachmentViewCreateInfo* pCreateInfo,
289 struct anv_cmd_buffer *cmd_buffer)
290 {
291 ANV_FROM_HANDLE(anv_image, image, pCreateInfo->image);
292 struct anv_attachment_view *aview = &cview->attachment_view;
293 struct anv_surface_view *sview = &cview->surface_view;
294 struct anv_surface *surface =
295 anv_image_get_surface_for_color_attachment(image);
296 const struct anv_format *format_info =
297 anv_format_for_vk_format(pCreateInfo->format);
298
299 uint32_t depth = 1; /* RENDER_SURFACE_STATE::Depth */
300 uint32_t rt_view_extent = 1; /* RENDER_SURFACE_STATE::RenderTargetViewExtent */
301
302 aview->attachment_type = ANV_ATTACHMENT_VIEW_TYPE_COLOR;
303
304 anv_assert(pCreateInfo->arraySize > 0);
305 anv_assert(pCreateInfo->mipLevel < image->levels);
306 anv_assert(pCreateInfo->baseArraySlice + pCreateInfo->arraySize <= image->array_size);
307
308 sview->bo = image->bo;
309 sview->offset = image->offset + surface->offset;
310 sview->format = anv_format_for_vk_format(pCreateInfo->format);
311
312 aview->extent = (VkExtent3D) {
313 .width = anv_minify(image->extent.width, pCreateInfo->mipLevel),
314 .height = anv_minify(image->extent.height, pCreateInfo->mipLevel),
315 .depth = anv_minify(image->extent.depth, pCreateInfo->mipLevel),
316 };
317
318 switch (image->type) {
319 case VK_IMAGE_TYPE_1D:
320 case VK_IMAGE_TYPE_2D:
321 /* From the Broadwell PRM >> RENDER_SURFACE_STATE::Depth:
322 *
323 * For SURFTYPE_1D, 2D, and CUBE: The range of this field is reduced
324 * by one for each increase from zero of Minimum Array Element. For
325 * example, if Minimum Array Element is set to 1024 on a 2D surface,
326 * the range of this field is reduced to [0,1023].
327 */
328 depth = pCreateInfo->arraySize;
329
330 /* From the Broadwell PRM >> RENDER_SURFACE_STATE::RenderTargetViewExtent:
331 *
332 * For Render Target and Typed Dataport 1D and 2D Surfaces:
333 * This field must be set to the same value as the Depth field.
334 */
335 rt_view_extent = depth;
336 break;
337 case VK_IMAGE_TYPE_3D:
338 /* From the Broadwell PRM >> RENDER_SURFACE_STATE::Depth:
339 *
340 * If the volume texture is MIP-mapped, this field specifies the
341 * depth of the base MIP level.
342 */
343 depth = image->extent.depth;
344
345 /* From the Broadwell PRM >> RENDER_SURFACE_STATE::RenderTargetViewExtent:
346 *
347 * For Render Target and Typed Dataport 3D Surfaces: This field
348 * indicates the extent of the accessible 'R' coordinates minus 1 on
349 * the LOD currently being rendered to.
350 */
351 rt_view_extent = aview->extent.depth;
352 break;
353 default:
354 unreachable(!"bad VkImageType");
355 }
356
357 if (cmd_buffer) {
358 sview->surface_state =
359 anv_state_stream_alloc(&cmd_buffer->surface_state_stream, 64, 64);
360 } else {
361 sview->surface_state =
362 anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
363 }
364
365 struct GEN8_RENDER_SURFACE_STATE surface_state = {
366 .SurfaceType = image->type,
367 .SurfaceArray = image->array_size > 1,
368 .SurfaceFormat = format_info->surface_format,
369 .SurfaceVerticalAlignment = anv_valign[surface->v_align],
370 .SurfaceHorizontalAlignment = anv_halign[surface->h_align],
371 .TileMode = surface->tile_mode,
372 .VerticalLineStride = 0,
373 .VerticalLineStrideOffset = 0,
374 .SamplerL2BypassModeDisable = true,
375 .RenderCacheReadWriteMode = WriteOnlyCache,
376 .MemoryObjectControlState = GEN8_MOCS,
377
378 /* The driver sets BaseMipLevel in SAMPLER_STATE, not here in
379 * RENDER_SURFACE_STATE. The Broadwell PRM says "it is illegal to have
380 * both Base Mip Level fields nonzero".
381 */
382 .BaseMipLevel = 0.0,
383
384 .SurfaceQPitch = surface->qpitch >> 2,
385 .Height = image->extent.height - 1,
386 .Width = image->extent.width - 1,
387 .Depth = depth - 1,
388 .SurfacePitch = surface->stride - 1,
389 .RenderTargetViewExtent = rt_view_extent - 1,
390 .MinimumArrayElement = pCreateInfo->baseArraySlice,
391 .NumberofMultisamples = MULTISAMPLECOUNT_1,
392 .XOffset = 0,
393 .YOffset = 0,
394
395 /* For render target surfaces, the hardware interprets field MIPCount/LOD as
396 * LOD. The Broadwell PRM says:
397 *
398 * MIPCountLOD defines the LOD that will be rendered into.
399 * SurfaceMinLOD is ignored.
400 */
401 .SurfaceMinLOD = 0,
402 .MIPCountLOD = pCreateInfo->mipLevel,
403
404 .AuxiliarySurfaceMode = AUX_NONE,
405 .RedClearColor = 0,
406 .GreenClearColor = 0,
407 .BlueClearColor = 0,
408 .AlphaClearColor = 0,
409 .ShaderChannelSelectRed = SCS_RED,
410 .ShaderChannelSelectGreen = SCS_GREEN,
411 .ShaderChannelSelectBlue = SCS_BLUE,
412 .ShaderChannelSelectAlpha = SCS_ALPHA,
413 .ResourceMinLOD = 0.0,
414 .SurfaceBaseAddress = { NULL, sview->offset },
415 };
416
417 GEN8_RENDER_SURFACE_STATE_pack(NULL, sview->surface_state.map,
418 &surface_state);
419 }
420
421 VkResult gen8_CreateSampler(
422 VkDevice _device,
423 const VkSamplerCreateInfo* pCreateInfo,
424 VkSampler* pSampler)
425 {
426 ANV_FROM_HANDLE(anv_device, device, _device);
427 struct anv_sampler *sampler;
428 uint32_t mag_filter, min_filter, max_anisotropy;
429
430 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO);
431
432 sampler = anv_device_alloc(device, sizeof(*sampler), 8,
433 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
434 if (!sampler)
435 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
436
437 static const uint32_t vk_to_gen_tex_filter[] = {
438 [VK_TEX_FILTER_NEAREST] = MAPFILTER_NEAREST,
439 [VK_TEX_FILTER_LINEAR] = MAPFILTER_LINEAR
440 };
441
442 static const uint32_t vk_to_gen_mipmap_mode[] = {
443 [VK_TEX_MIPMAP_MODE_BASE] = MIPFILTER_NONE,
444 [VK_TEX_MIPMAP_MODE_NEAREST] = MIPFILTER_NEAREST,
445 [VK_TEX_MIPMAP_MODE_LINEAR] = MIPFILTER_LINEAR
446 };
447
448 static const uint32_t vk_to_gen_tex_address[] = {
449 [VK_TEX_ADDRESS_WRAP] = TCM_WRAP,
450 [VK_TEX_ADDRESS_MIRROR] = TCM_MIRROR,
451 [VK_TEX_ADDRESS_CLAMP] = TCM_CLAMP,
452 [VK_TEX_ADDRESS_MIRROR_ONCE] = TCM_MIRROR_ONCE,
453 [VK_TEX_ADDRESS_CLAMP_BORDER] = TCM_CLAMP_BORDER,
454 };
455
456 static const uint32_t vk_to_gen_compare_op[] = {
457 [VK_COMPARE_OP_NEVER] = PREFILTEROPNEVER,
458 [VK_COMPARE_OP_LESS] = PREFILTEROPLESS,
459 [VK_COMPARE_OP_EQUAL] = PREFILTEROPEQUAL,
460 [VK_COMPARE_OP_LESS_EQUAL] = PREFILTEROPLEQUAL,
461 [VK_COMPARE_OP_GREATER] = PREFILTEROPGREATER,
462 [VK_COMPARE_OP_NOT_EQUAL] = PREFILTEROPNOTEQUAL,
463 [VK_COMPARE_OP_GREATER_EQUAL] = PREFILTEROPGEQUAL,
464 [VK_COMPARE_OP_ALWAYS] = PREFILTEROPALWAYS,
465 };
466
467 if (pCreateInfo->maxAnisotropy > 1) {
468 mag_filter = MAPFILTER_ANISOTROPIC;
469 min_filter = MAPFILTER_ANISOTROPIC;
470 max_anisotropy = (pCreateInfo->maxAnisotropy - 2) / 2;
471 } else {
472 mag_filter = vk_to_gen_tex_filter[pCreateInfo->magFilter];
473 min_filter = vk_to_gen_tex_filter[pCreateInfo->minFilter];
474 max_anisotropy = RATIO21;
475 }
476
477 struct GEN8_SAMPLER_STATE sampler_state = {
478 .SamplerDisable = false,
479 .TextureBorderColorMode = DX10OGL,
480 .LODPreClampMode = 0,
481 .BaseMipLevel = 0.0,
482 .MipModeFilter = vk_to_gen_mipmap_mode[pCreateInfo->mipMode],
483 .MagModeFilter = mag_filter,
484 .MinModeFilter = min_filter,
485 .TextureLODBias = pCreateInfo->mipLodBias * 256,
486 .AnisotropicAlgorithm = EWAApproximation,
487 .MinLOD = pCreateInfo->minLod,
488 .MaxLOD = pCreateInfo->maxLod,
489 .ChromaKeyEnable = 0,
490 .ChromaKeyIndex = 0,
491 .ChromaKeyMode = 0,
492 .ShadowFunction = vk_to_gen_compare_op[pCreateInfo->compareOp],
493 .CubeSurfaceControlMode = 0,
494
495 .IndirectStatePointer =
496 device->border_colors.offset +
497 pCreateInfo->borderColor * sizeof(float) * 4,
498
499 .LODClampMagnificationMode = MIPNONE,
500 .MaximumAnisotropy = max_anisotropy,
501 .RAddressMinFilterRoundingEnable = 0,
502 .RAddressMagFilterRoundingEnable = 0,
503 .VAddressMinFilterRoundingEnable = 0,
504 .VAddressMagFilterRoundingEnable = 0,
505 .UAddressMinFilterRoundingEnable = 0,
506 .UAddressMagFilterRoundingEnable = 0,
507 .TrilinearFilterQuality = 0,
508 .NonnormalizedCoordinateEnable = 0,
509 .TCXAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressU],
510 .TCYAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressV],
511 .TCZAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressW],
512 };
513
514 GEN8_SAMPLER_STATE_pack(NULL, sampler->state, &sampler_state);
515
516 *pSampler = anv_sampler_to_handle(sampler);
517
518 return VK_SUCCESS;
519 }
520
521 VkResult gen8_CreateDynamicDepthStencilState(
522 VkDevice _device,
523 const VkDynamicDepthStencilStateCreateInfo* pCreateInfo,
524 VkDynamicDepthStencilState* pState)
525 {
526 ANV_FROM_HANDLE(anv_device, device, _device);
527 struct anv_dynamic_ds_state *state;
528
529 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DYNAMIC_DEPTH_STENCIL_STATE_CREATE_INFO);
530
531 state = anv_device_alloc(device, sizeof(*state), 8,
532 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
533 if (state == NULL)
534 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
535
536 struct GEN8_3DSTATE_WM_DEPTH_STENCIL wm_depth_stencil = {
537 GEN8_3DSTATE_WM_DEPTH_STENCIL_header,
538
539 /* Is this what we need to do? */
540 .StencilBufferWriteEnable = pCreateInfo->stencilWriteMask != 0,
541
542 .StencilTestMask = pCreateInfo->stencilReadMask & 0xff,
543 .StencilWriteMask = pCreateInfo->stencilWriteMask & 0xff,
544
545 .BackfaceStencilTestMask = pCreateInfo->stencilReadMask & 0xff,
546 .BackfaceStencilWriteMask = pCreateInfo->stencilWriteMask & 0xff,
547 };
548
549 GEN8_3DSTATE_WM_DEPTH_STENCIL_pack(NULL, state->gen8.wm_depth_stencil,
550 &wm_depth_stencil);
551
552 struct GEN8_COLOR_CALC_STATE color_calc_state = {
553 .StencilReferenceValue = pCreateInfo->stencilFrontRef,
554 .BackFaceStencilReferenceValue = pCreateInfo->stencilBackRef
555 };
556
557 GEN8_COLOR_CALC_STATE_pack(NULL, state->gen8.color_calc_state, &color_calc_state);
558
559 *pState = anv_dynamic_ds_state_to_handle(state);
560
561 return VK_SUCCESS;
562 }