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anv: Add func anv_get_isl_format()
[mesa.git] / src / vulkan / gen9_pack.h
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24
25 /* Instructions, enums and structures for SKL.
26 *
27 * This file has been generated, do not hand edit.
28 */
29
30 #pragma once
31
32 #include <stdio.h>
33 #include <assert.h>
34
35 #ifndef __gen_validate_value
36 #define __gen_validate_value(x)
37 #endif
38
39 #ifndef __gen_field_functions
40 #define __gen_field_functions
41
42 union __gen_value {
43 float f;
44 uint32_t dw;
45 };
46
47 static inline uint64_t
48 __gen_mbo(uint32_t start, uint32_t end)
49 {
50 return (~0ul >> (64 - (end - start + 1))) << start;
51 }
52
53 static inline uint64_t
54 __gen_field(uint64_t v, uint32_t start, uint32_t end)
55 {
56 __gen_validate_value(v);
57 #if DEBUG
58 if (end - start + 1 < 64)
59 assert(v < 1ul << (end - start + 1));
60 #endif
61
62 return v << start;
63 }
64
65 static inline uint64_t
66 __gen_offset(uint64_t v, uint32_t start, uint32_t end)
67 {
68 __gen_validate_value(v);
69 #if DEBUG
70 uint64_t mask = (~0ul >> (64 - (end - start + 1))) << start;
71
72 assert((v & ~mask) == 0);
73 #endif
74
75 return v;
76 }
77
78 static inline uint32_t
79 __gen_float(float v)
80 {
81 __gen_validate_value(v);
82 return ((union __gen_value) { .f = (v) }).dw;
83 }
84
85 #ifndef __gen_address_type
86 #error #define __gen_address_type before including this file
87 #endif
88
89 #ifndef __gen_user_data
90 #error #define __gen_combine_address before including this file
91 #endif
92
93 #endif
94
95 #define GEN9_3DSTATE_URB_VS_length_bias 0x00000002
96 #define GEN9_3DSTATE_URB_VS_header \
97 .CommandType = 3, \
98 .CommandSubType = 3, \
99 ._3DCommandOpcode = 0, \
100 ._3DCommandSubOpcode = 48, \
101 .DwordLength = 0
102
103 #define GEN9_3DSTATE_URB_VS_length 0x00000002
104
105 struct GEN9_3DSTATE_URB_VS {
106 uint32_t CommandType;
107 uint32_t CommandSubType;
108 uint32_t _3DCommandOpcode;
109 uint32_t _3DCommandSubOpcode;
110 uint32_t DwordLength;
111 uint32_t VSURBStartingAddress;
112 uint32_t VSURBEntryAllocationSize;
113 uint32_t VSNumberofURBEntries;
114 };
115
116 static inline void
117 GEN9_3DSTATE_URB_VS_pack(__gen_user_data *data, void * restrict dst,
118 const struct GEN9_3DSTATE_URB_VS * restrict values)
119 {
120 uint32_t *dw = (uint32_t * restrict) dst;
121
122 dw[0] =
123 __gen_field(values->CommandType, 29, 31) |
124 __gen_field(values->CommandSubType, 27, 28) |
125 __gen_field(values->_3DCommandOpcode, 24, 26) |
126 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
127 __gen_field(values->DwordLength, 0, 7) |
128 0;
129
130 dw[1] =
131 __gen_field(values->VSURBStartingAddress, 25, 31) |
132 __gen_field(values->VSURBEntryAllocationSize, 16, 24) |
133 __gen_field(values->VSNumberofURBEntries, 0, 15) |
134 0;
135
136 }
137
138 #define GEN9_3DSTATE_VS_length_bias 0x00000002
139 #define GEN9_3DSTATE_VS_header \
140 .CommandType = 3, \
141 .CommandSubType = 3, \
142 ._3DCommandOpcode = 0, \
143 ._3DCommandSubOpcode = 16, \
144 .DwordLength = 7
145
146 #define GEN9_3DSTATE_VS_length 0x00000009
147
148 #define __gen_prefix(name) GEN9_ ## name
149
150 struct __gen_prefix(3DSTATE_VS) {
151 uint32_t CommandType;
152 uint32_t CommandSubType;
153 uint32_t _3DCommandOpcode;
154 uint32_t _3DCommandSubOpcode;
155 uint32_t DwordLength;
156 uint64_t KernelStartPointer;
157 #define Multiple 0
158 #define Single 1
159 uint32_t SingleVertexDispatch;
160 #define Dmask 0
161 #define Vmask 1
162 uint32_t VectorMaskEnable;
163 #define NoSamplers 0
164 #define _14Samplers 1
165 #define _58Samplers 2
166 #define _912Samplers 3
167 #define _1316Samplers 4
168 uint32_t SamplerCount;
169 uint32_t BindingTableEntryCount;
170 #define Normal 0
171 #define High 1
172 uint32_t ThreadDispatchPriority;
173 #define IEEE754 0
174 #define Alternate 1
175 uint32_t FloatingPointMode;
176 bool IllegalOpcodeExceptionEnable;
177 bool AccessesUAV;
178 bool SoftwareExceptionEnable;
179 uint64_t ScratchSpaceBasePointer;
180 uint32_t PerThreadScratchSpace;
181 uint32_t DispatchGRFStartRegisterForURBData;
182 uint32_t VertexURBEntryReadLength;
183 uint32_t VertexURBEntryReadOffset;
184 uint32_t MaximumNumberofThreads;
185 bool StatisticsEnable;
186 bool SIMD8DispatchEnable;
187 bool VertexCacheDisable;
188 bool FunctionEnable;
189 uint32_t VertexURBEntryOutputReadOffset;
190 uint32_t VertexURBEntryOutputLength;
191 uint32_t UserClipDistanceClipTestEnableBitmask;
192 uint32_t UserClipDistanceCullTestEnableBitmask;
193 };
194
195 static inline void
196 GEN9_3DSTATE_VS_pack(__gen_user_data *data, void * restrict dst,
197 const struct GEN9_3DSTATE_VS * restrict values)
198 {
199 uint32_t *dw = (uint32_t * restrict) dst;
200
201 dw[0] =
202 __gen_field(values->CommandType, 29, 31) |
203 __gen_field(values->CommandSubType, 27, 28) |
204 __gen_field(values->_3DCommandOpcode, 24, 26) |
205 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
206 __gen_field(values->DwordLength, 0, 7) |
207 0;
208
209 uint64_t qw1 =
210 __gen_offset(values->KernelStartPointer, 6, 63) |
211 0;
212
213 dw[1] = qw1;
214 dw[2] = qw1 >> 32;
215
216 dw[3] =
217 __gen_field(values->SingleVertexDispatch, 31, 31) |
218 __gen_field(values->VectorMaskEnable, 30, 30) |
219 __gen_field(values->SamplerCount, 27, 29) |
220 __gen_field(values->BindingTableEntryCount, 18, 25) |
221 __gen_field(values->ThreadDispatchPriority, 17, 17) |
222 __gen_field(values->FloatingPointMode, 16, 16) |
223 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
224 __gen_field(values->AccessesUAV, 12, 12) |
225 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
226 0;
227
228 uint64_t qw4 =
229 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
230 __gen_field(values->PerThreadScratchSpace, 0, 3) |
231 0;
232
233 dw[4] = qw4;
234 dw[5] = qw4 >> 32;
235
236 dw[6] =
237 __gen_field(values->DispatchGRFStartRegisterForURBData, 20, 24) |
238 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
239 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
240 0;
241
242 dw[7] =
243 __gen_field(values->MaximumNumberofThreads, 23, 31) |
244 __gen_field(values->StatisticsEnable, 10, 10) |
245 __gen_field(values->SIMD8DispatchEnable, 2, 2) |
246 __gen_field(values->VertexCacheDisable, 1, 1) |
247 __gen_field(values->FunctionEnable, 0, 0) |
248 0;
249
250 dw[8] =
251 __gen_field(values->VertexURBEntryOutputReadOffset, 21, 26) |
252 __gen_field(values->VertexURBEntryOutputLength, 16, 20) |
253 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 8, 15) |
254 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
255 0;
256
257 }
258
259 #define GEN9_GPGPU_CSR_BASE_ADDRESS_length_bias 0x00000002
260 #define GEN9_GPGPU_CSR_BASE_ADDRESS_header \
261 .CommandType = 3, \
262 .CommandSubType = 0, \
263 ._3DCommandOpcode = 1, \
264 ._3DCommandSubOpcode = 4, \
265 .DwordLength = 1
266
267 #define GEN9_GPGPU_CSR_BASE_ADDRESS_length 0x00000003
268
269 struct GEN9_GPGPU_CSR_BASE_ADDRESS {
270 uint32_t CommandType;
271 uint32_t CommandSubType;
272 uint32_t _3DCommandOpcode;
273 uint32_t _3DCommandSubOpcode;
274 uint32_t DwordLength;
275 __gen_address_type GPGPUCSRBaseAddress;
276 };
277
278 static inline void
279 GEN9_GPGPU_CSR_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
280 const struct GEN9_GPGPU_CSR_BASE_ADDRESS * restrict values)
281 {
282 uint32_t *dw = (uint32_t * restrict) dst;
283
284 dw[0] =
285 __gen_field(values->CommandType, 29, 31) |
286 __gen_field(values->CommandSubType, 27, 28) |
287 __gen_field(values->_3DCommandOpcode, 24, 26) |
288 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
289 __gen_field(values->DwordLength, 0, 7) |
290 0;
291
292 uint32_t dw1 =
293 0;
294
295 uint64_t qw1 =
296 __gen_combine_address(data, &dw[1], values->GPGPUCSRBaseAddress, dw1);
297
298 dw[1] = qw1;
299 dw[2] = qw1 >> 32;
300
301 }
302
303 #define GEN9_MI_ATOMIC_length_bias 0x00000002
304 #define GEN9_MI_ATOMIC_header \
305 .CommandType = 0, \
306 .MICommandOpcode = 47
307
308 #define GEN9_MI_ATOMIC_length 0x00000003
309
310 struct __gen_prefix(MI_ATOMIC) {
311 uint32_t CommandType;
312 uint32_t MICommandOpcode;
313 #define PerProcessGraphicsAddress 0
314 #define GlobalGraphicsAddress 1
315 uint32_t MemoryType;
316 uint32_t PostSyncOperation;
317 #define DWORD 0
318 #define QWORD 1
319 #define OCTWORD 2
320 #define RESERVED 3
321 uint32_t DataSize;
322 uint32_t InlineData;
323 uint32_t CSSTALL;
324 uint32_t ReturnDataControl;
325 uint32_t ATOMICOPCODE;
326 uint32_t DwordLength;
327 __gen_address_type MemoryAddress;
328 uint32_t Operand1DataDword0;
329 uint32_t Operand2DataDword0;
330 uint32_t Operand1DataDword1;
331 uint32_t Operand2DataDword1;
332 uint32_t Operand1DataDword2;
333 uint32_t Operand2DataDword2;
334 uint32_t Operand1DataDword3;
335 uint32_t Operand2DataDword3;
336 };
337
338 static inline void
339 GEN9_MI_ATOMIC_pack(__gen_user_data *data, void * restrict dst,
340 const struct GEN9_MI_ATOMIC * restrict values)
341 {
342 uint32_t *dw = (uint32_t * restrict) dst;
343
344 dw[0] =
345 __gen_field(values->CommandType, 29, 31) |
346 __gen_field(values->MICommandOpcode, 23, 28) |
347 __gen_field(values->MemoryType, 22, 22) |
348 __gen_field(values->PostSyncOperation, 21, 21) |
349 __gen_field(values->DataSize, 19, 20) |
350 __gen_field(values->InlineData, 18, 18) |
351 __gen_field(values->CSSTALL, 17, 17) |
352 __gen_field(values->ReturnDataControl, 16, 16) |
353 __gen_field(values->ATOMICOPCODE, 8, 15) |
354 __gen_field(values->DwordLength, 0, 7) |
355 0;
356
357 uint32_t dw1 =
358 0;
359
360 uint64_t qw1 =
361 __gen_combine_address(data, &dw[1], values->MemoryAddress, dw1);
362
363 dw[1] = qw1;
364 dw[2] = qw1 >> 32;
365
366 dw[3] =
367 __gen_field(values->Operand1DataDword0, 0, 31) |
368 0;
369
370 dw[4] =
371 __gen_field(values->Operand2DataDword0, 0, 31) |
372 0;
373
374 dw[5] =
375 __gen_field(values->Operand1DataDword1, 0, 31) |
376 0;
377
378 dw[6] =
379 __gen_field(values->Operand2DataDword1, 0, 31) |
380 0;
381
382 dw[7] =
383 __gen_field(values->Operand1DataDword2, 0, 31) |
384 0;
385
386 dw[8] =
387 __gen_field(values->Operand2DataDword2, 0, 31) |
388 0;
389
390 dw[9] =
391 __gen_field(values->Operand1DataDword3, 0, 31) |
392 0;
393
394 dw[10] =
395 __gen_field(values->Operand2DataDword3, 0, 31) |
396 0;
397
398 }
399
400 #define GEN9_MI_BATCH_BUFFER_START_length_bias 0x00000002
401 #define GEN9_MI_BATCH_BUFFER_START_header \
402 .CommandType = 0, \
403 .MICommandOpcode = 49, \
404 .DwordLength = 1
405
406 #define GEN9_MI_BATCH_BUFFER_START_length 0x00000003
407
408 struct GEN9_MI_BATCH_BUFFER_START {
409 uint32_t CommandType;
410 uint32_t MICommandOpcode;
411 #define Firstlevelbatch 0
412 #define Secondlevelbatch 1
413 uint32_t SecondLevelBatchBuffer;
414 bool AddOffsetEnable;
415 uint32_t PredicationEnable;
416 bool ResourceStreamerEnable;
417 #define ASI_GGTT 0
418 #define ASI_PPGTT 1
419 uint32_t AddressSpaceIndicator;
420 uint32_t DwordLength;
421 __gen_address_type BatchBufferStartAddress;
422 };
423
424 static inline void
425 GEN9_MI_BATCH_BUFFER_START_pack(__gen_user_data *data, void * restrict dst,
426 const struct GEN9_MI_BATCH_BUFFER_START * restrict values)
427 {
428 uint32_t *dw = (uint32_t * restrict) dst;
429
430 dw[0] =
431 __gen_field(values->CommandType, 29, 31) |
432 __gen_field(values->MICommandOpcode, 23, 28) |
433 __gen_field(values->SecondLevelBatchBuffer, 22, 22) |
434 __gen_field(values->AddOffsetEnable, 16, 16) |
435 __gen_field(values->PredicationEnable, 15, 15) |
436 __gen_field(values->ResourceStreamerEnable, 10, 10) |
437 __gen_field(values->AddressSpaceIndicator, 8, 8) |
438 __gen_field(values->DwordLength, 0, 7) |
439 0;
440
441 uint32_t dw1 =
442 0;
443
444 uint64_t qw1 =
445 __gen_combine_address(data, &dw[1], values->BatchBufferStartAddress, dw1);
446
447 dw[1] = qw1;
448 dw[2] = qw1 >> 32;
449
450 }
451
452 #define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_length_bias 0x00000002
453 #define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_header\
454 .CommandType = 0, \
455 .MICommandOpcode = 54, \
456 .UseGlobalGTT = 0, \
457 .CompareSemaphore = 0, \
458 .DwordLength = 2
459
460 #define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_length 0x00000004
461
462 struct GEN9_MI_CONDITIONAL_BATCH_BUFFER_END {
463 uint32_t CommandType;
464 uint32_t MICommandOpcode;
465 uint32_t UseGlobalGTT;
466 uint32_t CompareSemaphore;
467 #define CompareMaskModeDisabled 0
468 #define CompareMaskModeEnabled 1
469 uint32_t CompareMaskMode;
470 uint32_t DwordLength;
471 uint32_t CompareDataDword;
472 __gen_address_type CompareAddress;
473 };
474
475 static inline void
476 GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
477 const struct GEN9_MI_CONDITIONAL_BATCH_BUFFER_END * restrict values)
478 {
479 uint32_t *dw = (uint32_t * restrict) dst;
480
481 dw[0] =
482 __gen_field(values->CommandType, 29, 31) |
483 __gen_field(values->MICommandOpcode, 23, 28) |
484 __gen_field(values->UseGlobalGTT, 22, 22) |
485 __gen_field(values->CompareSemaphore, 21, 21) |
486 __gen_field(values->CompareMaskMode, 19, 19) |
487 __gen_field(values->DwordLength, 0, 7) |
488 0;
489
490 dw[1] =
491 __gen_field(values->CompareDataDword, 0, 31) |
492 0;
493
494 uint32_t dw2 =
495 0;
496
497 uint64_t qw2 =
498 __gen_combine_address(data, &dw[2], values->CompareAddress, dw2);
499
500 dw[2] = qw2;
501 dw[3] = qw2 >> 32;
502
503 }
504
505 #define GEN9_MI_FORCE_WAKEUP_length_bias 0x00000002
506 #define GEN9_MI_FORCE_WAKEUP_header \
507 .CommandType = 0, \
508 .MICommandOpcode = 29, \
509 .DwordLength = 0
510
511 #define GEN9_MI_FORCE_WAKEUP_length 0x00000002
512
513 struct GEN9_MI_FORCE_WAKEUP {
514 uint32_t CommandType;
515 uint32_t MICommandOpcode;
516 uint32_t DwordLength;
517 uint32_t MaskBits;
518 uint32_t ForceRenderAwake;
519 uint32_t ForceMediaAwake;
520 };
521
522 static inline void
523 GEN9_MI_FORCE_WAKEUP_pack(__gen_user_data *data, void * restrict dst,
524 const struct GEN9_MI_FORCE_WAKEUP * restrict values)
525 {
526 uint32_t *dw = (uint32_t * restrict) dst;
527
528 dw[0] =
529 __gen_field(values->CommandType, 29, 31) |
530 __gen_field(values->MICommandOpcode, 23, 28) |
531 __gen_field(values->DwordLength, 0, 7) |
532 0;
533
534 dw[1] =
535 __gen_field(values->MaskBits, 16, 31) |
536 __gen_field(values->ForceRenderAwake, 1, 1) |
537 __gen_field(values->ForceMediaAwake, 0, 0) |
538 0;
539
540 }
541
542 #define GEN9_MI_LOAD_REGISTER_IMM_length_bias 0x00000002
543 #define GEN9_MI_LOAD_REGISTER_IMM_header \
544 .CommandType = 0, \
545 .MICommandOpcode = 34, \
546 .DwordLength = 1
547
548 #define GEN9_MI_LOAD_REGISTER_IMM_length 0x00000003
549
550 struct GEN9_MI_LOAD_REGISTER_IMM {
551 uint32_t CommandType;
552 uint32_t MICommandOpcode;
553 uint32_t ByteWriteDisables;
554 uint32_t DwordLength;
555 uint32_t RegisterOffset;
556 uint32_t DataDWord;
557 };
558
559 static inline void
560 GEN9_MI_LOAD_REGISTER_IMM_pack(__gen_user_data *data, void * restrict dst,
561 const struct GEN9_MI_LOAD_REGISTER_IMM * restrict values)
562 {
563 uint32_t *dw = (uint32_t * restrict) dst;
564
565 dw[0] =
566 __gen_field(values->CommandType, 29, 31) |
567 __gen_field(values->MICommandOpcode, 23, 28) |
568 __gen_field(values->ByteWriteDisables, 8, 11) |
569 __gen_field(values->DwordLength, 0, 7) |
570 0;
571
572 dw[1] =
573 __gen_offset(values->RegisterOffset, 2, 22) |
574 0;
575
576 dw[2] =
577 __gen_field(values->DataDWord, 0, 31) |
578 0;
579
580 }
581
582 #define GEN9_MI_LOAD_REGISTER_REG_length_bias 0x00000002
583 #define GEN9_MI_LOAD_REGISTER_REG_header \
584 .CommandType = 0, \
585 .MICommandOpcode = 42, \
586 .DwordLength = 1
587
588 #define GEN9_MI_LOAD_REGISTER_REG_length 0x00000003
589
590 struct GEN9_MI_LOAD_REGISTER_REG {
591 uint32_t CommandType;
592 uint32_t MICommandOpcode;
593 uint32_t DwordLength;
594 uint32_t SourceRegisterAddress;
595 uint32_t DestinationRegisterAddress;
596 };
597
598 static inline void
599 GEN9_MI_LOAD_REGISTER_REG_pack(__gen_user_data *data, void * restrict dst,
600 const struct GEN9_MI_LOAD_REGISTER_REG * restrict values)
601 {
602 uint32_t *dw = (uint32_t * restrict) dst;
603
604 dw[0] =
605 __gen_field(values->CommandType, 29, 31) |
606 __gen_field(values->MICommandOpcode, 23, 28) |
607 __gen_field(values->DwordLength, 0, 7) |
608 0;
609
610 dw[1] =
611 __gen_offset(values->SourceRegisterAddress, 2, 22) |
612 0;
613
614 dw[2] =
615 __gen_offset(values->DestinationRegisterAddress, 2, 22) |
616 0;
617
618 }
619
620 #define GEN9_MI_SEMAPHORE_SIGNAL_length_bias 0x00000002
621 #define GEN9_MI_SEMAPHORE_SIGNAL_header \
622 .CommandType = 0, \
623 .MICommandOpcode = 27, \
624 .DwordLength = 0
625
626 #define GEN9_MI_SEMAPHORE_SIGNAL_length 0x00000002
627
628 struct GEN9_MI_SEMAPHORE_SIGNAL {
629 uint32_t CommandType;
630 uint32_t MICommandOpcode;
631 uint32_t PostSyncOperation;
632 #define RCS 0
633 #define VCS0 1
634 #define BCS 2
635 #define VECS 3
636 #define VCS1 4
637 uint32_t TargetEngineSelect;
638 uint32_t DwordLength;
639 uint32_t TargetContextID;
640 };
641
642 static inline void
643 GEN9_MI_SEMAPHORE_SIGNAL_pack(__gen_user_data *data, void * restrict dst,
644 const struct GEN9_MI_SEMAPHORE_SIGNAL * restrict values)
645 {
646 uint32_t *dw = (uint32_t * restrict) dst;
647
648 dw[0] =
649 __gen_field(values->CommandType, 29, 31) |
650 __gen_field(values->MICommandOpcode, 23, 28) |
651 __gen_field(values->PostSyncOperation, 21, 21) |
652 __gen_field(values->TargetEngineSelect, 15, 17) |
653 __gen_field(values->DwordLength, 0, 7) |
654 0;
655
656 dw[1] =
657 __gen_field(values->TargetContextID, 0, 31) |
658 0;
659
660 }
661
662 #define GEN9_MI_SEMAPHORE_WAIT_length_bias 0x00000002
663 #define GEN9_MI_SEMAPHORE_WAIT_header \
664 .CommandType = 0, \
665 .MICommandOpcode = 28, \
666 .DwordLength = 2
667
668 #define GEN9_MI_SEMAPHORE_WAIT_length 0x00000004
669
670 struct GEN9_MI_SEMAPHORE_WAIT {
671 uint32_t CommandType;
672 uint32_t MICommandOpcode;
673 #define PerProcessGraphicsAddress 0
674 #define GlobalGraphicsAddress 1
675 uint32_t MemoryType;
676 #define PollingMode 1
677 #define SignalMode 0
678 uint32_t WaitMode;
679 #define SAD_GREATER_THAN_SDD 0
680 #define SAD_GREATER_THAN_OR_EQUAL_SDD 1
681 #define SAD_LESS_THAN_SDD 2
682 #define SAD_LESS_THAN_OR_EQUAL_SDD 3
683 #define SAD_EQUAL_SDD 4
684 #define SAD_NOT_EQUAL_SDD 5
685 uint32_t CompareOperation;
686 uint32_t DwordLength;
687 uint32_t SemaphoreDataDword;
688 __gen_address_type SemaphoreAddress;
689 };
690
691 static inline void
692 GEN9_MI_SEMAPHORE_WAIT_pack(__gen_user_data *data, void * restrict dst,
693 const struct GEN9_MI_SEMAPHORE_WAIT * restrict values)
694 {
695 uint32_t *dw = (uint32_t * restrict) dst;
696
697 dw[0] =
698 __gen_field(values->CommandType, 29, 31) |
699 __gen_field(values->MICommandOpcode, 23, 28) |
700 __gen_field(values->MemoryType, 22, 22) |
701 __gen_field(values->WaitMode, 15, 15) |
702 __gen_field(values->CompareOperation, 12, 14) |
703 __gen_field(values->DwordLength, 0, 7) |
704 0;
705
706 dw[1] =
707 __gen_field(values->SemaphoreDataDword, 0, 31) |
708 0;
709
710 uint32_t dw2 =
711 0;
712
713 uint64_t qw2 =
714 __gen_combine_address(data, &dw[2], values->SemaphoreAddress, dw2);
715
716 dw[2] = qw2;
717 dw[3] = qw2 >> 32;
718
719 }
720
721 #define GEN9_MI_STORE_DATA_IMM_length_bias 0x00000002
722 #define GEN9_MI_STORE_DATA_IMM_header \
723 .CommandType = 0, \
724 .MICommandOpcode = 32, \
725 .DwordLength = 2
726
727 #define GEN9_MI_STORE_DATA_IMM_length 0x00000004
728
729 struct GEN9_MI_STORE_DATA_IMM {
730 uint32_t CommandType;
731 uint32_t MICommandOpcode;
732 bool UseGlobalGTT;
733 bool StoreQword;
734 uint32_t DwordLength;
735 __gen_address_type Address;
736 uint32_t CoreModeEnable;
737 uint32_t DataDWord0;
738 uint32_t DataDWord1;
739 };
740
741 static inline void
742 GEN9_MI_STORE_DATA_IMM_pack(__gen_user_data *data, void * restrict dst,
743 const struct GEN9_MI_STORE_DATA_IMM * restrict values)
744 {
745 uint32_t *dw = (uint32_t * restrict) dst;
746
747 dw[0] =
748 __gen_field(values->CommandType, 29, 31) |
749 __gen_field(values->MICommandOpcode, 23, 28) |
750 __gen_field(values->UseGlobalGTT, 22, 22) |
751 __gen_field(values->StoreQword, 21, 21) |
752 __gen_field(values->DwordLength, 0, 9) |
753 0;
754
755 uint32_t dw1 =
756 __gen_field(values->CoreModeEnable, 0, 0) |
757 0;
758
759 uint64_t qw1 =
760 __gen_combine_address(data, &dw[1], values->Address, dw1);
761
762 dw[1] = qw1;
763 dw[2] = qw1 >> 32;
764
765 dw[3] =
766 __gen_field(values->DataDWord0, 0, 31) |
767 0;
768
769 dw[4] =
770 __gen_field(values->DataDWord1, 0, 31) |
771 0;
772
773 }
774
775 #define GEN9_MI_STORE_REGISTER_MEM_length_bias 0x00000002
776 #define GEN9_MI_STORE_REGISTER_MEM_header \
777 .CommandType = 0, \
778 .MICommandOpcode = 36, \
779 .DwordLength = 2
780
781 #define GEN9_MI_STORE_REGISTER_MEM_length 0x00000004
782
783 struct GEN9_MI_STORE_REGISTER_MEM {
784 uint32_t CommandType;
785 uint32_t MICommandOpcode;
786 bool UseGlobalGTT;
787 uint32_t PredicateEnable;
788 uint32_t DwordLength;
789 uint32_t RegisterAddress;
790 __gen_address_type MemoryAddress;
791 };
792
793 static inline void
794 GEN9_MI_STORE_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
795 const struct GEN9_MI_STORE_REGISTER_MEM * restrict values)
796 {
797 uint32_t *dw = (uint32_t * restrict) dst;
798
799 dw[0] =
800 __gen_field(values->CommandType, 29, 31) |
801 __gen_field(values->MICommandOpcode, 23, 28) |
802 __gen_field(values->UseGlobalGTT, 22, 22) |
803 __gen_field(values->PredicateEnable, 21, 21) |
804 __gen_field(values->DwordLength, 0, 7) |
805 0;
806
807 dw[1] =
808 __gen_offset(values->RegisterAddress, 2, 22) |
809 0;
810
811 uint32_t dw2 =
812 0;
813
814 uint64_t qw2 =
815 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
816
817 dw[2] = qw2;
818 dw[3] = qw2 >> 32;
819
820 }
821
822 #define GEN9_PIPELINE_SELECT_length_bias 0x00000001
823 #define GEN9_PIPELINE_SELECT_header \
824 .CommandType = 3, \
825 .CommandSubType = 1, \
826 ._3DCommandOpcode = 1, \
827 ._3DCommandSubOpcode = 4
828
829 #define GEN9_PIPELINE_SELECT_length 0x00000001
830
831 struct GEN9_PIPELINE_SELECT {
832 uint32_t CommandType;
833 uint32_t CommandSubType;
834 uint32_t _3DCommandOpcode;
835 uint32_t _3DCommandSubOpcode;
836 uint32_t MaskBits;
837 uint32_t ForceMediaAwake;
838 uint32_t MediaSamplerDOPClockGateEnable;
839 #define _3D 0
840 #define Media 1
841 #define GPGPU 2
842 uint32_t PipelineSelection;
843 };
844
845 static inline void
846 GEN9_PIPELINE_SELECT_pack(__gen_user_data *data, void * restrict dst,
847 const struct GEN9_PIPELINE_SELECT * restrict values)
848 {
849 uint32_t *dw = (uint32_t * restrict) dst;
850
851 dw[0] =
852 __gen_field(values->CommandType, 29, 31) |
853 __gen_field(values->CommandSubType, 27, 28) |
854 __gen_field(values->_3DCommandOpcode, 24, 26) |
855 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
856 __gen_field(values->MaskBits, 8, 15) |
857 __gen_field(values->ForceMediaAwake, 5, 5) |
858 __gen_field(values->MediaSamplerDOPClockGateEnable, 4, 4) |
859 __gen_field(values->PipelineSelection, 0, 1) |
860 0;
861
862 }
863
864 #define GEN9_STATE_BASE_ADDRESS_length_bias 0x00000002
865 #define GEN9_STATE_BASE_ADDRESS_header \
866 .CommandType = 3, \
867 .CommandSubType = 0, \
868 ._3DCommandOpcode = 1, \
869 ._3DCommandSubOpcode = 1, \
870 .DwordLength = 17
871
872 #define GEN9_STATE_BASE_ADDRESS_length 0x00000013
873
874 #define GEN9_MEMORY_OBJECT_CONTROL_STATE_length 0x00000001
875
876 struct GEN9_MEMORY_OBJECT_CONTROL_STATE {
877 uint32_t IndextoMOCSTables;
878 };
879
880 static inline void
881 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(__gen_user_data *data, void * restrict dst,
882 const struct GEN9_MEMORY_OBJECT_CONTROL_STATE * restrict values)
883 {
884 uint32_t *dw = (uint32_t * restrict) dst;
885
886 dw[0] =
887 __gen_field(values->IndextoMOCSTables, 1, 6) |
888 0;
889
890 }
891
892 struct GEN9_STATE_BASE_ADDRESS {
893 uint32_t CommandType;
894 uint32_t CommandSubType;
895 uint32_t _3DCommandOpcode;
896 uint32_t _3DCommandSubOpcode;
897 uint32_t DwordLength;
898 __gen_address_type GeneralStateBaseAddress;
899 struct GEN9_MEMORY_OBJECT_CONTROL_STATE GeneralStateMemoryObjectControlState;
900 bool GeneralStateBaseAddressModifyEnable;
901 struct GEN9_MEMORY_OBJECT_CONTROL_STATE StatelessDataPortAccessMemoryObjectControlState;
902 __gen_address_type SurfaceStateBaseAddress;
903 struct GEN9_MEMORY_OBJECT_CONTROL_STATE SurfaceStateMemoryObjectControlState;
904 bool SurfaceStateBaseAddressModifyEnable;
905 __gen_address_type DynamicStateBaseAddress;
906 struct GEN9_MEMORY_OBJECT_CONTROL_STATE DynamicStateMemoryObjectControlState;
907 bool DynamicStateBaseAddressModifyEnable;
908 __gen_address_type IndirectObjectBaseAddress;
909 struct GEN9_MEMORY_OBJECT_CONTROL_STATE IndirectObjectMemoryObjectControlState;
910 bool IndirectObjectBaseAddressModifyEnable;
911 __gen_address_type InstructionBaseAddress;
912 struct GEN9_MEMORY_OBJECT_CONTROL_STATE InstructionMemoryObjectControlState;
913 bool InstructionBaseAddressModifyEnable;
914 uint32_t GeneralStateBufferSize;
915 bool GeneralStateBufferSizeModifyEnable;
916 uint32_t DynamicStateBufferSize;
917 bool DynamicStateBufferSizeModifyEnable;
918 uint32_t IndirectObjectBufferSize;
919 bool IndirectObjectBufferSizeModifyEnable;
920 uint32_t InstructionBufferSize;
921 bool InstructionBuffersizeModifyEnable;
922 __gen_address_type BindlessSurfaceStateBaseAddress;
923 struct GEN9_MEMORY_OBJECT_CONTROL_STATE BindlessSurfaceStateMemoryObjectControlState;
924 bool BindlessSurfaceStateBaseAddressModifyEnable;
925 uint32_t BindlessSurfaceStateSize;
926 };
927
928 static inline void
929 GEN9_STATE_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
930 const struct GEN9_STATE_BASE_ADDRESS * restrict values)
931 {
932 uint32_t *dw = (uint32_t * restrict) dst;
933
934 dw[0] =
935 __gen_field(values->CommandType, 29, 31) |
936 __gen_field(values->CommandSubType, 27, 28) |
937 __gen_field(values->_3DCommandOpcode, 24, 26) |
938 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
939 __gen_field(values->DwordLength, 0, 7) |
940 0;
941
942 uint32_t dw_GeneralStateMemoryObjectControlState;
943 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_GeneralStateMemoryObjectControlState, &values->GeneralStateMemoryObjectControlState);
944 uint32_t dw1 =
945 __gen_field(dw_GeneralStateMemoryObjectControlState, 4, 10) |
946 __gen_field(values->GeneralStateBaseAddressModifyEnable, 0, 0) |
947 0;
948
949 uint64_t qw1 =
950 __gen_combine_address(data, &dw[1], values->GeneralStateBaseAddress, dw1);
951
952 dw[1] = qw1;
953 dw[2] = qw1 >> 32;
954
955 uint32_t dw_StatelessDataPortAccessMemoryObjectControlState;
956 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StatelessDataPortAccessMemoryObjectControlState, &values->StatelessDataPortAccessMemoryObjectControlState);
957 dw[3] =
958 __gen_field(dw_StatelessDataPortAccessMemoryObjectControlState, 16, 22) |
959 0;
960
961 uint32_t dw_SurfaceStateMemoryObjectControlState;
962 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceStateMemoryObjectControlState, &values->SurfaceStateMemoryObjectControlState);
963 uint32_t dw4 =
964 __gen_field(dw_SurfaceStateMemoryObjectControlState, 4, 10) |
965 __gen_field(values->SurfaceStateBaseAddressModifyEnable, 0, 0) |
966 0;
967
968 uint64_t qw4 =
969 __gen_combine_address(data, &dw[4], values->SurfaceStateBaseAddress, dw4);
970
971 dw[4] = qw4;
972 dw[5] = qw4 >> 32;
973
974 uint32_t dw_DynamicStateMemoryObjectControlState;
975 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DynamicStateMemoryObjectControlState, &values->DynamicStateMemoryObjectControlState);
976 uint32_t dw6 =
977 __gen_field(dw_DynamicStateMemoryObjectControlState, 4, 10) |
978 __gen_field(values->DynamicStateBaseAddressModifyEnable, 0, 0) |
979 0;
980
981 uint64_t qw6 =
982 __gen_combine_address(data, &dw[6], values->DynamicStateBaseAddress, dw6);
983
984 dw[6] = qw6;
985 dw[7] = qw6 >> 32;
986
987 uint32_t dw_IndirectObjectMemoryObjectControlState;
988 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_IndirectObjectMemoryObjectControlState, &values->IndirectObjectMemoryObjectControlState);
989 uint32_t dw8 =
990 __gen_field(dw_IndirectObjectMemoryObjectControlState, 4, 10) |
991 __gen_field(values->IndirectObjectBaseAddressModifyEnable, 0, 0) |
992 0;
993
994 uint64_t qw8 =
995 __gen_combine_address(data, &dw[8], values->IndirectObjectBaseAddress, dw8);
996
997 dw[8] = qw8;
998 dw[9] = qw8 >> 32;
999
1000 uint32_t dw_InstructionMemoryObjectControlState;
1001 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_InstructionMemoryObjectControlState, &values->InstructionMemoryObjectControlState);
1002 uint32_t dw10 =
1003 __gen_field(dw_InstructionMemoryObjectControlState, 4, 10) |
1004 __gen_field(values->InstructionBaseAddressModifyEnable, 0, 0) |
1005 0;
1006
1007 uint64_t qw10 =
1008 __gen_combine_address(data, &dw[10], values->InstructionBaseAddress, dw10);
1009
1010 dw[10] = qw10;
1011 dw[11] = qw10 >> 32;
1012
1013 dw[12] =
1014 __gen_field(values->GeneralStateBufferSize, 12, 31) |
1015 __gen_field(values->GeneralStateBufferSizeModifyEnable, 0, 0) |
1016 0;
1017
1018 dw[13] =
1019 __gen_field(values->DynamicStateBufferSize, 12, 31) |
1020 __gen_field(values->DynamicStateBufferSizeModifyEnable, 0, 0) |
1021 0;
1022
1023 dw[14] =
1024 __gen_field(values->IndirectObjectBufferSize, 12, 31) |
1025 __gen_field(values->IndirectObjectBufferSizeModifyEnable, 0, 0) |
1026 0;
1027
1028 dw[15] =
1029 __gen_field(values->InstructionBufferSize, 12, 31) |
1030 __gen_field(values->InstructionBuffersizeModifyEnable, 0, 0) |
1031 0;
1032
1033 uint32_t dw_BindlessSurfaceStateMemoryObjectControlState;
1034 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_BindlessSurfaceStateMemoryObjectControlState, &values->BindlessSurfaceStateMemoryObjectControlState);
1035 uint32_t dw16 =
1036 __gen_field(dw_BindlessSurfaceStateMemoryObjectControlState, 4, 10) |
1037 __gen_field(values->BindlessSurfaceStateBaseAddressModifyEnable, 0, 0) |
1038 0;
1039
1040 uint64_t qw16 =
1041 __gen_combine_address(data, &dw[16], values->BindlessSurfaceStateBaseAddress, dw16);
1042
1043 dw[16] = qw16;
1044 dw[17] = qw16 >> 32;
1045
1046 dw[18] =
1047 __gen_field(values->BindlessSurfaceStateSize, 12, 31) |
1048 0;
1049
1050 }
1051
1052 #define GEN9_STATE_PREFETCH_length_bias 0x00000002
1053 #define GEN9_STATE_PREFETCH_header \
1054 .CommandType = 3, \
1055 .CommandSubType = 0, \
1056 ._3DCommandOpcode = 0, \
1057 ._3DCommandSubOpcode = 3, \
1058 .DwordLength = 0
1059
1060 #define GEN9_STATE_PREFETCH_length 0x00000002
1061
1062 struct GEN9_STATE_PREFETCH {
1063 uint32_t CommandType;
1064 uint32_t CommandSubType;
1065 uint32_t _3DCommandOpcode;
1066 uint32_t _3DCommandSubOpcode;
1067 uint32_t DwordLength;
1068 __gen_address_type PrefetchPointer;
1069 uint32_t PrefetchCount;
1070 };
1071
1072 static inline void
1073 GEN9_STATE_PREFETCH_pack(__gen_user_data *data, void * restrict dst,
1074 const struct GEN9_STATE_PREFETCH * restrict values)
1075 {
1076 uint32_t *dw = (uint32_t * restrict) dst;
1077
1078 dw[0] =
1079 __gen_field(values->CommandType, 29, 31) |
1080 __gen_field(values->CommandSubType, 27, 28) |
1081 __gen_field(values->_3DCommandOpcode, 24, 26) |
1082 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1083 __gen_field(values->DwordLength, 0, 7) |
1084 0;
1085
1086 uint32_t dw1 =
1087 __gen_field(values->PrefetchCount, 0, 2) |
1088 0;
1089
1090 dw[1] =
1091 __gen_combine_address(data, &dw[1], values->PrefetchPointer, dw1);
1092
1093 }
1094
1095 #define GEN9_STATE_SIP_length_bias 0x00000002
1096 #define GEN9_STATE_SIP_header \
1097 .CommandType = 3, \
1098 .CommandSubType = 0, \
1099 ._3DCommandOpcode = 1, \
1100 ._3DCommandSubOpcode = 2, \
1101 .DwordLength = 1
1102
1103 #define GEN9_STATE_SIP_length 0x00000003
1104
1105 struct GEN9_STATE_SIP {
1106 uint32_t CommandType;
1107 uint32_t CommandSubType;
1108 uint32_t _3DCommandOpcode;
1109 uint32_t _3DCommandSubOpcode;
1110 uint32_t DwordLength;
1111 uint64_t SystemInstructionPointer;
1112 };
1113
1114 static inline void
1115 GEN9_STATE_SIP_pack(__gen_user_data *data, void * restrict dst,
1116 const struct GEN9_STATE_SIP * restrict values)
1117 {
1118 uint32_t *dw = (uint32_t * restrict) dst;
1119
1120 dw[0] =
1121 __gen_field(values->CommandType, 29, 31) |
1122 __gen_field(values->CommandSubType, 27, 28) |
1123 __gen_field(values->_3DCommandOpcode, 24, 26) |
1124 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1125 __gen_field(values->DwordLength, 0, 7) |
1126 0;
1127
1128 uint64_t qw1 =
1129 __gen_offset(values->SystemInstructionPointer, 4, 63) |
1130 0;
1131
1132 dw[1] = qw1;
1133 dw[2] = qw1 >> 32;
1134
1135 }
1136
1137 #define GEN9_3DPRIMITIVE_length_bias 0x00000002
1138 #define GEN9_3DPRIMITIVE_header \
1139 .CommandType = 3, \
1140 .CommandSubType = 3, \
1141 ._3DCommandOpcode = 3, \
1142 ._3DCommandSubOpcode = 0, \
1143 .DwordLength = 5
1144
1145 #define GEN9_3DPRIMITIVE_length 0x00000007
1146
1147 struct GEN9_3DPRIMITIVE {
1148 uint32_t CommandType;
1149 uint32_t CommandSubType;
1150 uint32_t _3DCommandOpcode;
1151 uint32_t _3DCommandSubOpcode;
1152 bool IndirectParameterEnable;
1153 uint32_t UAVCoherencyRequired;
1154 bool PredicateEnable;
1155 uint32_t DwordLength;
1156 bool EndOffsetEnable;
1157 #define SEQUENTIAL 0
1158 #define RANDOM 1
1159 uint32_t VertexAccessType;
1160 uint32_t PrimitiveTopologyType;
1161 uint32_t VertexCountPerInstance;
1162 uint32_t StartVertexLocation;
1163 uint32_t InstanceCount;
1164 uint32_t StartInstanceLocation;
1165 uint32_t BaseVertexLocation;
1166 };
1167
1168 static inline void
1169 GEN9_3DPRIMITIVE_pack(__gen_user_data *data, void * restrict dst,
1170 const struct GEN9_3DPRIMITIVE * restrict values)
1171 {
1172 uint32_t *dw = (uint32_t * restrict) dst;
1173
1174 dw[0] =
1175 __gen_field(values->CommandType, 29, 31) |
1176 __gen_field(values->CommandSubType, 27, 28) |
1177 __gen_field(values->_3DCommandOpcode, 24, 26) |
1178 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1179 __gen_field(values->IndirectParameterEnable, 10, 10) |
1180 __gen_field(values->UAVCoherencyRequired, 9, 9) |
1181 __gen_field(values->PredicateEnable, 8, 8) |
1182 __gen_field(values->DwordLength, 0, 7) |
1183 0;
1184
1185 dw[1] =
1186 __gen_field(values->EndOffsetEnable, 9, 9) |
1187 __gen_field(values->VertexAccessType, 8, 8) |
1188 __gen_field(values->PrimitiveTopologyType, 0, 5) |
1189 0;
1190
1191 dw[2] =
1192 __gen_field(values->VertexCountPerInstance, 0, 31) |
1193 0;
1194
1195 dw[3] =
1196 __gen_field(values->StartVertexLocation, 0, 31) |
1197 0;
1198
1199 dw[4] =
1200 __gen_field(values->InstanceCount, 0, 31) |
1201 0;
1202
1203 dw[5] =
1204 __gen_field(values->StartInstanceLocation, 0, 31) |
1205 0;
1206
1207 dw[6] =
1208 __gen_field(values->BaseVertexLocation, 0, 31) |
1209 0;
1210
1211 }
1212
1213 #define GEN9_3DSTATE_AA_LINE_PARAMETERS_length_bias 0x00000002
1214 #define GEN9_3DSTATE_AA_LINE_PARAMETERS_header \
1215 .CommandType = 3, \
1216 .CommandSubType = 3, \
1217 ._3DCommandOpcode = 1, \
1218 ._3DCommandSubOpcode = 10, \
1219 .DwordLength = 1
1220
1221 #define GEN9_3DSTATE_AA_LINE_PARAMETERS_length 0x00000003
1222
1223 struct GEN9_3DSTATE_AA_LINE_PARAMETERS {
1224 uint32_t CommandType;
1225 uint32_t CommandSubType;
1226 uint32_t _3DCommandOpcode;
1227 uint32_t _3DCommandSubOpcode;
1228 uint32_t DwordLength;
1229 float AAPointCoverageBias;
1230 float AACoverageBias;
1231 float AAPointCoverageSlope;
1232 float AACoverageSlope;
1233 float AAPointCoverageEndCapBias;
1234 float AACoverageEndCapBias;
1235 float AAPointCoverageEndCapSlope;
1236 float AACoverageEndCapSlope;
1237 };
1238
1239 static inline void
1240 GEN9_3DSTATE_AA_LINE_PARAMETERS_pack(__gen_user_data *data, void * restrict dst,
1241 const struct GEN9_3DSTATE_AA_LINE_PARAMETERS * restrict values)
1242 {
1243 uint32_t *dw = (uint32_t * restrict) dst;
1244
1245 dw[0] =
1246 __gen_field(values->CommandType, 29, 31) |
1247 __gen_field(values->CommandSubType, 27, 28) |
1248 __gen_field(values->_3DCommandOpcode, 24, 26) |
1249 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1250 __gen_field(values->DwordLength, 0, 7) |
1251 0;
1252
1253 dw[1] =
1254 __gen_field(values->AAPointCoverageBias * (1 << 8), 24, 31) |
1255 __gen_field(values->AACoverageBias * (1 << 8), 16, 23) |
1256 __gen_field(values->AAPointCoverageSlope * (1 << 8), 8, 15) |
1257 __gen_field(values->AACoverageSlope * (1 << 8), 0, 7) |
1258 0;
1259
1260 dw[2] =
1261 __gen_field(values->AAPointCoverageEndCapBias * (1 << 8), 24, 31) |
1262 __gen_field(values->AACoverageEndCapBias * (1 << 8), 16, 23) |
1263 __gen_field(values->AAPointCoverageEndCapSlope * (1 << 8), 8, 15) |
1264 __gen_field(values->AACoverageEndCapSlope * (1 << 8), 0, 7) |
1265 0;
1266
1267 }
1268
1269 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_length_bias 0x00000002
1270 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_header\
1271 .CommandType = 3, \
1272 .CommandSubType = 3, \
1273 ._3DCommandOpcode = 0, \
1274 ._3DCommandSubOpcode = 70
1275
1276 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_length 0x00000000
1277
1278 #define GEN9_BINDING_TABLE_EDIT_ENTRY_length 0x00000001
1279
1280 struct GEN9_BINDING_TABLE_EDIT_ENTRY {
1281 uint32_t BindingTableIndex;
1282 uint32_t SurfaceStatePointer;
1283 };
1284
1285 static inline void
1286 GEN9_BINDING_TABLE_EDIT_ENTRY_pack(__gen_user_data *data, void * restrict dst,
1287 const struct GEN9_BINDING_TABLE_EDIT_ENTRY * restrict values)
1288 {
1289 uint32_t *dw = (uint32_t * restrict) dst;
1290
1291 dw[0] =
1292 __gen_field(values->BindingTableIndex, 16, 23) |
1293 __gen_offset(values->SurfaceStatePointer, 0, 15) |
1294 0;
1295
1296 }
1297
1298 struct GEN9_3DSTATE_BINDING_TABLE_EDIT_DS {
1299 uint32_t CommandType;
1300 uint32_t CommandSubType;
1301 uint32_t _3DCommandOpcode;
1302 uint32_t _3DCommandSubOpcode;
1303 uint32_t DwordLength;
1304 uint32_t BindingTableBlockClear;
1305 #define AllCores 3
1306 #define Core1 2
1307 #define Core0 1
1308 uint32_t BindingTableEditTarget;
1309 /* variable length fields follow */
1310 };
1311
1312 static inline void
1313 GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_pack(__gen_user_data *data, void * restrict dst,
1314 const struct GEN9_3DSTATE_BINDING_TABLE_EDIT_DS * restrict values)
1315 {
1316 uint32_t *dw = (uint32_t * restrict) dst;
1317
1318 dw[0] =
1319 __gen_field(values->CommandType, 29, 31) |
1320 __gen_field(values->CommandSubType, 27, 28) |
1321 __gen_field(values->_3DCommandOpcode, 24, 26) |
1322 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1323 __gen_field(values->DwordLength, 0, 8) |
1324 0;
1325
1326 dw[1] =
1327 __gen_field(values->BindingTableBlockClear, 16, 31) |
1328 __gen_field(values->BindingTableEditTarget, 0, 1) |
1329 0;
1330
1331 /* variable length fields follow */
1332 }
1333
1334 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_length_bias 0x00000002
1335 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_header\
1336 .CommandType = 3, \
1337 .CommandSubType = 3, \
1338 ._3DCommandOpcode = 0, \
1339 ._3DCommandSubOpcode = 68
1340
1341 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_length 0x00000000
1342
1343 struct GEN9_3DSTATE_BINDING_TABLE_EDIT_GS {
1344 uint32_t CommandType;
1345 uint32_t CommandSubType;
1346 uint32_t _3DCommandOpcode;
1347 uint32_t _3DCommandSubOpcode;
1348 uint32_t DwordLength;
1349 uint32_t BindingTableBlockClear;
1350 #define AllCores 3
1351 #define Core1 2
1352 #define Core0 1
1353 uint32_t BindingTableEditTarget;
1354 /* variable length fields follow */
1355 };
1356
1357 static inline void
1358 GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_pack(__gen_user_data *data, void * restrict dst,
1359 const struct GEN9_3DSTATE_BINDING_TABLE_EDIT_GS * restrict values)
1360 {
1361 uint32_t *dw = (uint32_t * restrict) dst;
1362
1363 dw[0] =
1364 __gen_field(values->CommandType, 29, 31) |
1365 __gen_field(values->CommandSubType, 27, 28) |
1366 __gen_field(values->_3DCommandOpcode, 24, 26) |
1367 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1368 __gen_field(values->DwordLength, 0, 8) |
1369 0;
1370
1371 dw[1] =
1372 __gen_field(values->BindingTableBlockClear, 16, 31) |
1373 __gen_field(values->BindingTableEditTarget, 0, 1) |
1374 0;
1375
1376 /* variable length fields follow */
1377 }
1378
1379 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_length_bias 0x00000002
1380 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_header\
1381 .CommandType = 3, \
1382 .CommandSubType = 3, \
1383 ._3DCommandOpcode = 0, \
1384 ._3DCommandSubOpcode = 69
1385
1386 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_length 0x00000000
1387
1388 struct GEN9_3DSTATE_BINDING_TABLE_EDIT_HS {
1389 uint32_t CommandType;
1390 uint32_t CommandSubType;
1391 uint32_t _3DCommandOpcode;
1392 uint32_t _3DCommandSubOpcode;
1393 uint32_t DwordLength;
1394 uint32_t BindingTableBlockClear;
1395 #define AllCores 3
1396 #define Core1 2
1397 #define Core0 1
1398 uint32_t BindingTableEditTarget;
1399 /* variable length fields follow */
1400 };
1401
1402 static inline void
1403 GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_pack(__gen_user_data *data, void * restrict dst,
1404 const struct GEN9_3DSTATE_BINDING_TABLE_EDIT_HS * restrict values)
1405 {
1406 uint32_t *dw = (uint32_t * restrict) dst;
1407
1408 dw[0] =
1409 __gen_field(values->CommandType, 29, 31) |
1410 __gen_field(values->CommandSubType, 27, 28) |
1411 __gen_field(values->_3DCommandOpcode, 24, 26) |
1412 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1413 __gen_field(values->DwordLength, 0, 8) |
1414 0;
1415
1416 dw[1] =
1417 __gen_field(values->BindingTableBlockClear, 16, 31) |
1418 __gen_field(values->BindingTableEditTarget, 0, 1) |
1419 0;
1420
1421 /* variable length fields follow */
1422 }
1423
1424 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_length_bias 0x00000002
1425 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_header\
1426 .CommandType = 3, \
1427 .CommandSubType = 3, \
1428 ._3DCommandOpcode = 0, \
1429 ._3DCommandSubOpcode = 71
1430
1431 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_length 0x00000000
1432
1433 struct GEN9_3DSTATE_BINDING_TABLE_EDIT_PS {
1434 uint32_t CommandType;
1435 uint32_t CommandSubType;
1436 uint32_t _3DCommandOpcode;
1437 uint32_t _3DCommandSubOpcode;
1438 uint32_t DwordLength;
1439 uint32_t BindingTableBlockClear;
1440 #define AllCores 3
1441 #define Core1 2
1442 #define Core0 1
1443 uint32_t BindingTableEditTarget;
1444 /* variable length fields follow */
1445 };
1446
1447 static inline void
1448 GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_pack(__gen_user_data *data, void * restrict dst,
1449 const struct GEN9_3DSTATE_BINDING_TABLE_EDIT_PS * restrict values)
1450 {
1451 uint32_t *dw = (uint32_t * restrict) dst;
1452
1453 dw[0] =
1454 __gen_field(values->CommandType, 29, 31) |
1455 __gen_field(values->CommandSubType, 27, 28) |
1456 __gen_field(values->_3DCommandOpcode, 24, 26) |
1457 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1458 __gen_field(values->DwordLength, 0, 8) |
1459 0;
1460
1461 dw[1] =
1462 __gen_field(values->BindingTableBlockClear, 16, 31) |
1463 __gen_field(values->BindingTableEditTarget, 0, 1) |
1464 0;
1465
1466 /* variable length fields follow */
1467 }
1468
1469 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_length_bias 0x00000002
1470 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_header\
1471 .CommandType = 3, \
1472 .CommandSubType = 3, \
1473 ._3DCommandOpcode = 0, \
1474 ._3DCommandSubOpcode = 67
1475
1476 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_length 0x00000000
1477
1478 struct GEN9_3DSTATE_BINDING_TABLE_EDIT_VS {
1479 uint32_t CommandType;
1480 uint32_t CommandSubType;
1481 uint32_t _3DCommandOpcode;
1482 uint32_t _3DCommandSubOpcode;
1483 uint32_t DwordLength;
1484 uint32_t BindingTableBlockClear;
1485 #define AllCores 3
1486 #define Core1 2
1487 #define Core0 1
1488 uint32_t BindingTableEditTarget;
1489 /* variable length fields follow */
1490 };
1491
1492 static inline void
1493 GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_pack(__gen_user_data *data, void * restrict dst,
1494 const struct GEN9_3DSTATE_BINDING_TABLE_EDIT_VS * restrict values)
1495 {
1496 uint32_t *dw = (uint32_t * restrict) dst;
1497
1498 dw[0] =
1499 __gen_field(values->CommandType, 29, 31) |
1500 __gen_field(values->CommandSubType, 27, 28) |
1501 __gen_field(values->_3DCommandOpcode, 24, 26) |
1502 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1503 __gen_field(values->DwordLength, 0, 8) |
1504 0;
1505
1506 dw[1] =
1507 __gen_field(values->BindingTableBlockClear, 16, 31) |
1508 __gen_field(values->BindingTableEditTarget, 0, 1) |
1509 0;
1510
1511 /* variable length fields follow */
1512 }
1513
1514 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS_length_bias 0x00000002
1515 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS_header\
1516 .CommandType = 3, \
1517 .CommandSubType = 3, \
1518 ._3DCommandOpcode = 0, \
1519 ._3DCommandSubOpcode = 40, \
1520 .DwordLength = 0
1521
1522 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS_length 0x00000002
1523
1524 struct GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS {
1525 uint32_t CommandType;
1526 uint32_t CommandSubType;
1527 uint32_t _3DCommandOpcode;
1528 uint32_t _3DCommandSubOpcode;
1529 uint32_t DwordLength;
1530 uint32_t PointertoDSBindingTable;
1531 };
1532
1533 static inline void
1534 GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
1535 const struct GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS * restrict values)
1536 {
1537 uint32_t *dw = (uint32_t * restrict) dst;
1538
1539 dw[0] =
1540 __gen_field(values->CommandType, 29, 31) |
1541 __gen_field(values->CommandSubType, 27, 28) |
1542 __gen_field(values->_3DCommandOpcode, 24, 26) |
1543 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1544 __gen_field(values->DwordLength, 0, 7) |
1545 0;
1546
1547 dw[1] =
1548 __gen_offset(values->PointertoDSBindingTable, 5, 15) |
1549 0;
1550
1551 }
1552
1553 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS_length_bias 0x00000002
1554 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS_header\
1555 .CommandType = 3, \
1556 .CommandSubType = 3, \
1557 ._3DCommandOpcode = 0, \
1558 ._3DCommandSubOpcode = 41, \
1559 .DwordLength = 0
1560
1561 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS_length 0x00000002
1562
1563 struct GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS {
1564 uint32_t CommandType;
1565 uint32_t CommandSubType;
1566 uint32_t _3DCommandOpcode;
1567 uint32_t _3DCommandSubOpcode;
1568 uint32_t DwordLength;
1569 uint32_t PointertoGSBindingTable;
1570 };
1571
1572 static inline void
1573 GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
1574 const struct GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS * restrict values)
1575 {
1576 uint32_t *dw = (uint32_t * restrict) dst;
1577
1578 dw[0] =
1579 __gen_field(values->CommandType, 29, 31) |
1580 __gen_field(values->CommandSubType, 27, 28) |
1581 __gen_field(values->_3DCommandOpcode, 24, 26) |
1582 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1583 __gen_field(values->DwordLength, 0, 7) |
1584 0;
1585
1586 dw[1] =
1587 __gen_offset(values->PointertoGSBindingTable, 5, 15) |
1588 0;
1589
1590 }
1591
1592 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS_length_bias 0x00000002
1593 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS_header\
1594 .CommandType = 3, \
1595 .CommandSubType = 3, \
1596 ._3DCommandOpcode = 0, \
1597 ._3DCommandSubOpcode = 39, \
1598 .DwordLength = 0
1599
1600 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS_length 0x00000002
1601
1602 struct GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS {
1603 uint32_t CommandType;
1604 uint32_t CommandSubType;
1605 uint32_t _3DCommandOpcode;
1606 uint32_t _3DCommandSubOpcode;
1607 uint32_t DwordLength;
1608 uint32_t PointertoHSBindingTable;
1609 };
1610
1611 static inline void
1612 GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
1613 const struct GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS * restrict values)
1614 {
1615 uint32_t *dw = (uint32_t * restrict) dst;
1616
1617 dw[0] =
1618 __gen_field(values->CommandType, 29, 31) |
1619 __gen_field(values->CommandSubType, 27, 28) |
1620 __gen_field(values->_3DCommandOpcode, 24, 26) |
1621 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1622 __gen_field(values->DwordLength, 0, 7) |
1623 0;
1624
1625 dw[1] =
1626 __gen_offset(values->PointertoHSBindingTable, 5, 15) |
1627 0;
1628
1629 }
1630
1631 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS_length_bias 0x00000002
1632 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS_header\
1633 .CommandType = 3, \
1634 .CommandSubType = 3, \
1635 ._3DCommandOpcode = 0, \
1636 ._3DCommandSubOpcode = 42, \
1637 .DwordLength = 0
1638
1639 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS_length 0x00000002
1640
1641 struct GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS {
1642 uint32_t CommandType;
1643 uint32_t CommandSubType;
1644 uint32_t _3DCommandOpcode;
1645 uint32_t _3DCommandSubOpcode;
1646 uint32_t DwordLength;
1647 uint32_t PointertoPSBindingTable;
1648 };
1649
1650 static inline void
1651 GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
1652 const struct GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS * restrict values)
1653 {
1654 uint32_t *dw = (uint32_t * restrict) dst;
1655
1656 dw[0] =
1657 __gen_field(values->CommandType, 29, 31) |
1658 __gen_field(values->CommandSubType, 27, 28) |
1659 __gen_field(values->_3DCommandOpcode, 24, 26) |
1660 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1661 __gen_field(values->DwordLength, 0, 7) |
1662 0;
1663
1664 dw[1] =
1665 __gen_offset(values->PointertoPSBindingTable, 5, 15) |
1666 0;
1667
1668 }
1669
1670 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS_length_bias 0x00000002
1671 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS_header\
1672 .CommandType = 3, \
1673 .CommandSubType = 3, \
1674 ._3DCommandOpcode = 0, \
1675 ._3DCommandSubOpcode = 38, \
1676 .DwordLength = 0
1677
1678 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS_length 0x00000002
1679
1680 struct GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS {
1681 uint32_t CommandType;
1682 uint32_t CommandSubType;
1683 uint32_t _3DCommandOpcode;
1684 uint32_t _3DCommandSubOpcode;
1685 uint32_t DwordLength;
1686 uint32_t PointertoVSBindingTable;
1687 };
1688
1689 static inline void
1690 GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
1691 const struct GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS * restrict values)
1692 {
1693 uint32_t *dw = (uint32_t * restrict) dst;
1694
1695 dw[0] =
1696 __gen_field(values->CommandType, 29, 31) |
1697 __gen_field(values->CommandSubType, 27, 28) |
1698 __gen_field(values->_3DCommandOpcode, 24, 26) |
1699 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1700 __gen_field(values->DwordLength, 0, 7) |
1701 0;
1702
1703 dw[1] =
1704 __gen_offset(values->PointertoVSBindingTable, 5, 15) |
1705 0;
1706
1707 }
1708
1709 #define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_length_bias 0x00000002
1710 #define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_header\
1711 .CommandType = 3, \
1712 .CommandSubType = 3, \
1713 ._3DCommandOpcode = 1, \
1714 ._3DCommandSubOpcode = 25, \
1715 .DwordLength = 2
1716
1717 #define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_length 0x00000004
1718
1719 struct GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC {
1720 uint32_t CommandType;
1721 uint32_t CommandSubType;
1722 uint32_t _3DCommandOpcode;
1723 uint32_t _3DCommandSubOpcode;
1724 uint32_t DwordLength;
1725 __gen_address_type BindingTablePoolBaseAddress;
1726 uint32_t BindingTablePoolEnable;
1727 struct GEN9_MEMORY_OBJECT_CONTROL_STATE SurfaceObjectControlState;
1728 #define NoValidData 0
1729 uint32_t BindingTablePoolBufferSize;
1730 };
1731
1732 static inline void
1733 GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_pack(__gen_user_data *data, void * restrict dst,
1734 const struct GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC * restrict values)
1735 {
1736 uint32_t *dw = (uint32_t * restrict) dst;
1737
1738 dw[0] =
1739 __gen_field(values->CommandType, 29, 31) |
1740 __gen_field(values->CommandSubType, 27, 28) |
1741 __gen_field(values->_3DCommandOpcode, 24, 26) |
1742 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1743 __gen_field(values->DwordLength, 0, 7) |
1744 0;
1745
1746 uint32_t dw_SurfaceObjectControlState;
1747 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceObjectControlState, &values->SurfaceObjectControlState);
1748 uint32_t dw1 =
1749 __gen_field(values->BindingTablePoolEnable, 11, 11) |
1750 __gen_field(dw_SurfaceObjectControlState, 0, 6) |
1751 0;
1752
1753 uint64_t qw1 =
1754 __gen_combine_address(data, &dw[1], values->BindingTablePoolBaseAddress, dw1);
1755
1756 dw[1] = qw1;
1757 dw[2] = qw1 >> 32;
1758
1759 dw[3] =
1760 __gen_field(values->BindingTablePoolBufferSize, 12, 31) |
1761 0;
1762
1763 }
1764
1765 #define GEN9_3DSTATE_BLEND_STATE_POINTERS_length_bias 0x00000002
1766 #define GEN9_3DSTATE_BLEND_STATE_POINTERS_header\
1767 .CommandType = 3, \
1768 .CommandSubType = 3, \
1769 ._3DCommandOpcode = 0, \
1770 ._3DCommandSubOpcode = 36, \
1771 .DwordLength = 0
1772
1773 #define GEN9_3DSTATE_BLEND_STATE_POINTERS_length 0x00000002
1774
1775 struct GEN9_3DSTATE_BLEND_STATE_POINTERS {
1776 uint32_t CommandType;
1777 uint32_t CommandSubType;
1778 uint32_t _3DCommandOpcode;
1779 uint32_t _3DCommandSubOpcode;
1780 uint32_t DwordLength;
1781 uint32_t BlendStatePointer;
1782 bool BlendStatePointerValid;
1783 };
1784
1785 static inline void
1786 GEN9_3DSTATE_BLEND_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
1787 const struct GEN9_3DSTATE_BLEND_STATE_POINTERS * restrict values)
1788 {
1789 uint32_t *dw = (uint32_t * restrict) dst;
1790
1791 dw[0] =
1792 __gen_field(values->CommandType, 29, 31) |
1793 __gen_field(values->CommandSubType, 27, 28) |
1794 __gen_field(values->_3DCommandOpcode, 24, 26) |
1795 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1796 __gen_field(values->DwordLength, 0, 7) |
1797 0;
1798
1799 dw[1] =
1800 __gen_offset(values->BlendStatePointer, 6, 31) |
1801 __gen_field(values->BlendStatePointerValid, 0, 0) |
1802 0;
1803
1804 }
1805
1806 #define GEN9_3DSTATE_CC_STATE_POINTERS_length_bias 0x00000002
1807 #define GEN9_3DSTATE_CC_STATE_POINTERS_header \
1808 .CommandType = 3, \
1809 .CommandSubType = 3, \
1810 ._3DCommandOpcode = 0, \
1811 ._3DCommandSubOpcode = 14, \
1812 .DwordLength = 0
1813
1814 #define GEN9_3DSTATE_CC_STATE_POINTERS_length 0x00000002
1815
1816 struct GEN9_3DSTATE_CC_STATE_POINTERS {
1817 uint32_t CommandType;
1818 uint32_t CommandSubType;
1819 uint32_t _3DCommandOpcode;
1820 uint32_t _3DCommandSubOpcode;
1821 uint32_t DwordLength;
1822 uint32_t ColorCalcStatePointer;
1823 bool ColorCalcStatePointerValid;
1824 };
1825
1826 static inline void
1827 GEN9_3DSTATE_CC_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
1828 const struct GEN9_3DSTATE_CC_STATE_POINTERS * restrict values)
1829 {
1830 uint32_t *dw = (uint32_t * restrict) dst;
1831
1832 dw[0] =
1833 __gen_field(values->CommandType, 29, 31) |
1834 __gen_field(values->CommandSubType, 27, 28) |
1835 __gen_field(values->_3DCommandOpcode, 24, 26) |
1836 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1837 __gen_field(values->DwordLength, 0, 7) |
1838 0;
1839
1840 dw[1] =
1841 __gen_offset(values->ColorCalcStatePointer, 6, 31) |
1842 __gen_field(values->ColorCalcStatePointerValid, 0, 0) |
1843 0;
1844
1845 }
1846
1847 #define GEN9_3DSTATE_CHROMA_KEY_length_bias 0x00000002
1848 #define GEN9_3DSTATE_CHROMA_KEY_header \
1849 .CommandType = 3, \
1850 .CommandSubType = 3, \
1851 ._3DCommandOpcode = 1, \
1852 ._3DCommandSubOpcode = 4, \
1853 .DwordLength = 2
1854
1855 #define GEN9_3DSTATE_CHROMA_KEY_length 0x00000004
1856
1857 struct GEN9_3DSTATE_CHROMA_KEY {
1858 uint32_t CommandType;
1859 uint32_t CommandSubType;
1860 uint32_t _3DCommandOpcode;
1861 uint32_t _3DCommandSubOpcode;
1862 uint32_t DwordLength;
1863 uint32_t ChromaKeyTableIndex;
1864 uint32_t ChromaKeyLowValue;
1865 uint32_t ChromaKeyHighValue;
1866 };
1867
1868 static inline void
1869 GEN9_3DSTATE_CHROMA_KEY_pack(__gen_user_data *data, void * restrict dst,
1870 const struct GEN9_3DSTATE_CHROMA_KEY * restrict values)
1871 {
1872 uint32_t *dw = (uint32_t * restrict) dst;
1873
1874 dw[0] =
1875 __gen_field(values->CommandType, 29, 31) |
1876 __gen_field(values->CommandSubType, 27, 28) |
1877 __gen_field(values->_3DCommandOpcode, 24, 26) |
1878 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1879 __gen_field(values->DwordLength, 0, 7) |
1880 0;
1881
1882 dw[1] =
1883 __gen_field(values->ChromaKeyTableIndex, 30, 31) |
1884 0;
1885
1886 dw[2] =
1887 __gen_field(values->ChromaKeyLowValue, 0, 31) |
1888 0;
1889
1890 dw[3] =
1891 __gen_field(values->ChromaKeyHighValue, 0, 31) |
1892 0;
1893
1894 }
1895
1896 #define GEN9_3DSTATE_CLEAR_PARAMS_length_bias 0x00000002
1897 #define GEN9_3DSTATE_CLEAR_PARAMS_header \
1898 .CommandType = 3, \
1899 .CommandSubType = 3, \
1900 ._3DCommandOpcode = 0, \
1901 ._3DCommandSubOpcode = 4, \
1902 .DwordLength = 1
1903
1904 #define GEN9_3DSTATE_CLEAR_PARAMS_length 0x00000003
1905
1906 struct GEN9_3DSTATE_CLEAR_PARAMS {
1907 uint32_t CommandType;
1908 uint32_t CommandSubType;
1909 uint32_t _3DCommandOpcode;
1910 uint32_t _3DCommandSubOpcode;
1911 uint32_t DwordLength;
1912 float DepthClearValue;
1913 bool DepthClearValueValid;
1914 };
1915
1916 static inline void
1917 GEN9_3DSTATE_CLEAR_PARAMS_pack(__gen_user_data *data, void * restrict dst,
1918 const struct GEN9_3DSTATE_CLEAR_PARAMS * restrict values)
1919 {
1920 uint32_t *dw = (uint32_t * restrict) dst;
1921
1922 dw[0] =
1923 __gen_field(values->CommandType, 29, 31) |
1924 __gen_field(values->CommandSubType, 27, 28) |
1925 __gen_field(values->_3DCommandOpcode, 24, 26) |
1926 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1927 __gen_field(values->DwordLength, 0, 7) |
1928 0;
1929
1930 dw[1] =
1931 __gen_float(values->DepthClearValue) |
1932 0;
1933
1934 dw[2] =
1935 __gen_field(values->DepthClearValueValid, 0, 0) |
1936 0;
1937
1938 }
1939
1940 #define GEN9_3DSTATE_CLIP_length_bias 0x00000002
1941 #define GEN9_3DSTATE_CLIP_header \
1942 .CommandType = 3, \
1943 .CommandSubType = 3, \
1944 ._3DCommandOpcode = 0, \
1945 ._3DCommandSubOpcode = 18, \
1946 .DwordLength = 2
1947
1948 #define GEN9_3DSTATE_CLIP_length 0x00000004
1949
1950 struct GEN9_3DSTATE_CLIP {
1951 uint32_t CommandType;
1952 uint32_t CommandSubType;
1953 uint32_t _3DCommandOpcode;
1954 uint32_t _3DCommandSubOpcode;
1955 uint32_t DwordLength;
1956 #define Normal 0
1957 #define Force 1
1958 bool ForceUserClipDistanceCullTestEnableBitmask;
1959 #define _8Bit 0
1960 #define _4Bit 1
1961 uint32_t VertexSubPixelPrecisionSelect;
1962 bool EarlyCullEnable;
1963 #define Normal 0
1964 #define Force 1
1965 bool ForceUserClipDistanceClipTestEnableBitmask;
1966 #define Normal 0
1967 #define Force 1
1968 bool ForceClipMode;
1969 bool ClipperStatisticsEnable;
1970 uint32_t UserClipDistanceCullTestEnableBitmask;
1971 bool ClipEnable;
1972 #define API_OGL 0
1973 uint32_t APIMode;
1974 bool ViewportXYClipTestEnable;
1975 bool GuardbandClipTestEnable;
1976 uint32_t UserClipDistanceClipTestEnableBitmask;
1977 #define NORMAL 0
1978 #define REJECT_ALL 3
1979 #define ACCEPT_ALL 4
1980 uint32_t ClipMode;
1981 bool PerspectiveDivideDisable;
1982 bool NonPerspectiveBarycentricEnable;
1983 uint32_t TriangleStripListProvokingVertexSelect;
1984 uint32_t LineStripListProvokingVertexSelect;
1985 uint32_t TriangleFanProvokingVertexSelect;
1986 float MinimumPointWidth;
1987 float MaximumPointWidth;
1988 bool ForceZeroRTAIndexEnable;
1989 uint32_t MaximumVPIndex;
1990 };
1991
1992 static inline void
1993 GEN9_3DSTATE_CLIP_pack(__gen_user_data *data, void * restrict dst,
1994 const struct GEN9_3DSTATE_CLIP * restrict values)
1995 {
1996 uint32_t *dw = (uint32_t * restrict) dst;
1997
1998 dw[0] =
1999 __gen_field(values->CommandType, 29, 31) |
2000 __gen_field(values->CommandSubType, 27, 28) |
2001 __gen_field(values->_3DCommandOpcode, 24, 26) |
2002 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2003 __gen_field(values->DwordLength, 0, 7) |
2004 0;
2005
2006 dw[1] =
2007 __gen_field(values->ForceUserClipDistanceCullTestEnableBitmask, 20, 20) |
2008 __gen_field(values->VertexSubPixelPrecisionSelect, 19, 19) |
2009 __gen_field(values->EarlyCullEnable, 18, 18) |
2010 __gen_field(values->ForceUserClipDistanceClipTestEnableBitmask, 17, 17) |
2011 __gen_field(values->ForceClipMode, 16, 16) |
2012 __gen_field(values->ClipperStatisticsEnable, 10, 10) |
2013 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
2014 0;
2015
2016 dw[2] =
2017 __gen_field(values->ClipEnable, 31, 31) |
2018 __gen_field(values->APIMode, 30, 30) |
2019 __gen_field(values->ViewportXYClipTestEnable, 28, 28) |
2020 __gen_field(values->GuardbandClipTestEnable, 26, 26) |
2021 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 16, 23) |
2022 __gen_field(values->ClipMode, 13, 15) |
2023 __gen_field(values->PerspectiveDivideDisable, 9, 9) |
2024 __gen_field(values->NonPerspectiveBarycentricEnable, 8, 8) |
2025 __gen_field(values->TriangleStripListProvokingVertexSelect, 4, 5) |
2026 __gen_field(values->LineStripListProvokingVertexSelect, 2, 3) |
2027 __gen_field(values->TriangleFanProvokingVertexSelect, 0, 1) |
2028 0;
2029
2030 dw[3] =
2031 __gen_field(values->MinimumPointWidth * (1 << 3), 17, 27) |
2032 __gen_field(values->MaximumPointWidth * (1 << 3), 6, 16) |
2033 __gen_field(values->ForceZeroRTAIndexEnable, 5, 5) |
2034 __gen_field(values->MaximumVPIndex, 0, 3) |
2035 0;
2036
2037 }
2038
2039 #define GEN9_3DSTATE_CONSTANT_DS_length_bias 0x00000002
2040 #define GEN9_3DSTATE_CONSTANT_DS_header \
2041 .CommandType = 3, \
2042 .CommandSubType = 3, \
2043 ._3DCommandOpcode = 0, \
2044 ._3DCommandSubOpcode = 26, \
2045 .DwordLength = 9
2046
2047 #define GEN9_3DSTATE_CONSTANT_DS_length 0x0000000b
2048
2049 #define GEN9_3DSTATE_CONSTANT_BODY_length 0x0000000a
2050
2051 struct GEN9_3DSTATE_CONSTANT_BODY {
2052 uint32_t ConstantBuffer1ReadLength;
2053 uint32_t ConstantBuffer0ReadLength;
2054 uint32_t ConstantBuffer3ReadLength;
2055 uint32_t ConstantBuffer2ReadLength;
2056 __gen_address_type PointerToConstantBuffer0;
2057 __gen_address_type PointerToConstantBuffer1;
2058 __gen_address_type PointerToConstantBuffer2;
2059 __gen_address_type PointerToConstantBuffer3;
2060 };
2061
2062 static inline void
2063 GEN9_3DSTATE_CONSTANT_BODY_pack(__gen_user_data *data, void * restrict dst,
2064 const struct GEN9_3DSTATE_CONSTANT_BODY * restrict values)
2065 {
2066 uint32_t *dw = (uint32_t * restrict) dst;
2067
2068 dw[0] =
2069 __gen_field(values->ConstantBuffer1ReadLength, 16, 31) |
2070 __gen_field(values->ConstantBuffer0ReadLength, 0, 15) |
2071 0;
2072
2073 dw[1] =
2074 __gen_field(values->ConstantBuffer3ReadLength, 16, 31) |
2075 __gen_field(values->ConstantBuffer2ReadLength, 0, 15) |
2076 0;
2077
2078 uint32_t dw2 =
2079 0;
2080
2081 uint64_t qw2 =
2082 __gen_combine_address(data, &dw[2], values->PointerToConstantBuffer0, dw2);
2083
2084 dw[2] = qw2;
2085 dw[3] = qw2 >> 32;
2086
2087 uint32_t dw4 =
2088 0;
2089
2090 uint64_t qw4 =
2091 __gen_combine_address(data, &dw[4], values->PointerToConstantBuffer1, dw4);
2092
2093 dw[4] = qw4;
2094 dw[5] = qw4 >> 32;
2095
2096 uint32_t dw6 =
2097 0;
2098
2099 uint64_t qw6 =
2100 __gen_combine_address(data, &dw[6], values->PointerToConstantBuffer2, dw6);
2101
2102 dw[6] = qw6;
2103 dw[7] = qw6 >> 32;
2104
2105 uint32_t dw8 =
2106 0;
2107
2108 uint64_t qw8 =
2109 __gen_combine_address(data, &dw[8], values->PointerToConstantBuffer3, dw8);
2110
2111 dw[8] = qw8;
2112 dw[9] = qw8 >> 32;
2113
2114 }
2115
2116 struct GEN9_3DSTATE_CONSTANT_DS {
2117 uint32_t CommandType;
2118 uint32_t CommandSubType;
2119 uint32_t _3DCommandOpcode;
2120 uint32_t _3DCommandSubOpcode;
2121 struct GEN9_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
2122 uint32_t DwordLength;
2123 struct GEN9_3DSTATE_CONSTANT_BODY ConstantBody;
2124 };
2125
2126 static inline void
2127 GEN9_3DSTATE_CONSTANT_DS_pack(__gen_user_data *data, void * restrict dst,
2128 const struct GEN9_3DSTATE_CONSTANT_DS * restrict values)
2129 {
2130 uint32_t *dw = (uint32_t * restrict) dst;
2131
2132 uint32_t dw_ConstantBufferObjectControlState;
2133 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
2134 dw[0] =
2135 __gen_field(values->CommandType, 29, 31) |
2136 __gen_field(values->CommandSubType, 27, 28) |
2137 __gen_field(values->_3DCommandOpcode, 24, 26) |
2138 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2139 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
2140 __gen_field(values->DwordLength, 0, 7) |
2141 0;
2142
2143 GEN9_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
2144 }
2145
2146 #define GEN9_3DSTATE_CONSTANT_GS_length_bias 0x00000002
2147 #define GEN9_3DSTATE_CONSTANT_GS_header \
2148 .CommandType = 3, \
2149 .CommandSubType = 3, \
2150 ._3DCommandOpcode = 0, \
2151 ._3DCommandSubOpcode = 22, \
2152 .DwordLength = 9
2153
2154 #define GEN9_3DSTATE_CONSTANT_GS_length 0x0000000b
2155
2156 struct GEN9_3DSTATE_CONSTANT_GS {
2157 uint32_t CommandType;
2158 uint32_t CommandSubType;
2159 uint32_t _3DCommandOpcode;
2160 uint32_t _3DCommandSubOpcode;
2161 struct GEN9_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
2162 uint32_t DwordLength;
2163 struct GEN9_3DSTATE_CONSTANT_BODY ConstantBody;
2164 };
2165
2166 static inline void
2167 GEN9_3DSTATE_CONSTANT_GS_pack(__gen_user_data *data, void * restrict dst,
2168 const struct GEN9_3DSTATE_CONSTANT_GS * restrict values)
2169 {
2170 uint32_t *dw = (uint32_t * restrict) dst;
2171
2172 uint32_t dw_ConstantBufferObjectControlState;
2173 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
2174 dw[0] =
2175 __gen_field(values->CommandType, 29, 31) |
2176 __gen_field(values->CommandSubType, 27, 28) |
2177 __gen_field(values->_3DCommandOpcode, 24, 26) |
2178 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2179 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
2180 __gen_field(values->DwordLength, 0, 7) |
2181 0;
2182
2183 GEN9_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
2184 }
2185
2186 #define GEN9_3DSTATE_CONSTANT_HS_length_bias 0x00000002
2187 #define GEN9_3DSTATE_CONSTANT_HS_header \
2188 .CommandType = 3, \
2189 .CommandSubType = 3, \
2190 ._3DCommandOpcode = 0, \
2191 ._3DCommandSubOpcode = 25, \
2192 .DwordLength = 9
2193
2194 #define GEN9_3DSTATE_CONSTANT_HS_length 0x0000000b
2195
2196 struct GEN9_3DSTATE_CONSTANT_HS {
2197 uint32_t CommandType;
2198 uint32_t CommandSubType;
2199 uint32_t _3DCommandOpcode;
2200 uint32_t _3DCommandSubOpcode;
2201 struct GEN9_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
2202 uint32_t DwordLength;
2203 struct GEN9_3DSTATE_CONSTANT_BODY ConstantBody;
2204 };
2205
2206 static inline void
2207 GEN9_3DSTATE_CONSTANT_HS_pack(__gen_user_data *data, void * restrict dst,
2208 const struct GEN9_3DSTATE_CONSTANT_HS * restrict values)
2209 {
2210 uint32_t *dw = (uint32_t * restrict) dst;
2211
2212 uint32_t dw_ConstantBufferObjectControlState;
2213 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
2214 dw[0] =
2215 __gen_field(values->CommandType, 29, 31) |
2216 __gen_field(values->CommandSubType, 27, 28) |
2217 __gen_field(values->_3DCommandOpcode, 24, 26) |
2218 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2219 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
2220 __gen_field(values->DwordLength, 0, 7) |
2221 0;
2222
2223 GEN9_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
2224 }
2225
2226 #define GEN9_3DSTATE_CONSTANT_PS_length_bias 0x00000002
2227 #define GEN9_3DSTATE_CONSTANT_PS_header \
2228 .CommandType = 3, \
2229 .CommandSubType = 3, \
2230 ._3DCommandOpcode = 0, \
2231 ._3DCommandSubOpcode = 23, \
2232 .DwordLength = 9
2233
2234 #define GEN9_3DSTATE_CONSTANT_PS_length 0x0000000b
2235
2236 struct GEN9_3DSTATE_CONSTANT_PS {
2237 uint32_t CommandType;
2238 uint32_t CommandSubType;
2239 uint32_t _3DCommandOpcode;
2240 uint32_t _3DCommandSubOpcode;
2241 struct GEN9_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
2242 uint32_t DwordLength;
2243 struct GEN9_3DSTATE_CONSTANT_BODY ConstantBody;
2244 };
2245
2246 static inline void
2247 GEN9_3DSTATE_CONSTANT_PS_pack(__gen_user_data *data, void * restrict dst,
2248 const struct GEN9_3DSTATE_CONSTANT_PS * restrict values)
2249 {
2250 uint32_t *dw = (uint32_t * restrict) dst;
2251
2252 uint32_t dw_ConstantBufferObjectControlState;
2253 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
2254 dw[0] =
2255 __gen_field(values->CommandType, 29, 31) |
2256 __gen_field(values->CommandSubType, 27, 28) |
2257 __gen_field(values->_3DCommandOpcode, 24, 26) |
2258 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2259 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
2260 __gen_field(values->DwordLength, 0, 7) |
2261 0;
2262
2263 GEN9_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
2264 }
2265
2266 #define GEN9_3DSTATE_CONSTANT_VS_length_bias 0x00000002
2267 #define GEN9_3DSTATE_CONSTANT_VS_header \
2268 .CommandType = 3, \
2269 .CommandSubType = 3, \
2270 ._3DCommandOpcode = 0, \
2271 ._3DCommandSubOpcode = 21, \
2272 .DwordLength = 9
2273
2274 #define GEN9_3DSTATE_CONSTANT_VS_length 0x0000000b
2275
2276 struct GEN9_3DSTATE_CONSTANT_VS {
2277 uint32_t CommandType;
2278 uint32_t CommandSubType;
2279 uint32_t _3DCommandOpcode;
2280 uint32_t _3DCommandSubOpcode;
2281 struct GEN9_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
2282 uint32_t DwordLength;
2283 struct GEN9_3DSTATE_CONSTANT_BODY ConstantBody;
2284 };
2285
2286 static inline void
2287 GEN9_3DSTATE_CONSTANT_VS_pack(__gen_user_data *data, void * restrict dst,
2288 const struct GEN9_3DSTATE_CONSTANT_VS * restrict values)
2289 {
2290 uint32_t *dw = (uint32_t * restrict) dst;
2291
2292 uint32_t dw_ConstantBufferObjectControlState;
2293 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
2294 dw[0] =
2295 __gen_field(values->CommandType, 29, 31) |
2296 __gen_field(values->CommandSubType, 27, 28) |
2297 __gen_field(values->_3DCommandOpcode, 24, 26) |
2298 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2299 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
2300 __gen_field(values->DwordLength, 0, 7) |
2301 0;
2302
2303 GEN9_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
2304 }
2305
2306 #define GEN9_3DSTATE_DEPTH_BUFFER_length_bias 0x00000002
2307 #define GEN9_3DSTATE_DEPTH_BUFFER_header \
2308 .CommandType = 3, \
2309 .CommandSubType = 3, \
2310 ._3DCommandOpcode = 0, \
2311 ._3DCommandSubOpcode = 5, \
2312 .DwordLength = 6
2313
2314 #define GEN9_3DSTATE_DEPTH_BUFFER_length 0x00000008
2315
2316 struct GEN9_3DSTATE_DEPTH_BUFFER {
2317 uint32_t CommandType;
2318 uint32_t CommandSubType;
2319 uint32_t _3DCommandOpcode;
2320 uint32_t _3DCommandSubOpcode;
2321 uint32_t DwordLength;
2322 #define SURFTYPE_2D 1
2323 #define SURFTYPE_CUBE 3
2324 #define SURFTYPE_NULL 7
2325 uint32_t SurfaceType;
2326 bool DepthWriteEnable;
2327 bool StencilWriteEnable;
2328 bool HierarchicalDepthBufferEnable;
2329 #define D32_FLOAT 1
2330 #define D24_UNORM_X8_UINT 3
2331 #define D16_UNORM 5
2332 uint32_t SurfaceFormat;
2333 uint32_t SurfacePitch;
2334 __gen_address_type SurfaceBaseAddress;
2335 uint32_t Height;
2336 uint32_t Width;
2337 uint32_t LOD;
2338 uint32_t Depth;
2339 uint32_t MinimumArrayElement;
2340 struct GEN9_MEMORY_OBJECT_CONTROL_STATE DepthBufferObjectControlState;
2341 #define NONE 0
2342 #define TILEYF 1
2343 #define TILEYS 2
2344 uint32_t TiledResourceMode;
2345 uint32_t MipTailStartLOD;
2346 uint32_t RenderTargetViewExtent;
2347 uint32_t SurfaceQPitch;
2348 };
2349
2350 static inline void
2351 GEN9_3DSTATE_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
2352 const struct GEN9_3DSTATE_DEPTH_BUFFER * restrict values)
2353 {
2354 uint32_t *dw = (uint32_t * restrict) dst;
2355
2356 dw[0] =
2357 __gen_field(values->CommandType, 29, 31) |
2358 __gen_field(values->CommandSubType, 27, 28) |
2359 __gen_field(values->_3DCommandOpcode, 24, 26) |
2360 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2361 __gen_field(values->DwordLength, 0, 7) |
2362 0;
2363
2364 dw[1] =
2365 __gen_field(values->SurfaceType, 29, 31) |
2366 __gen_field(values->DepthWriteEnable, 28, 28) |
2367 __gen_field(values->StencilWriteEnable, 27, 27) |
2368 __gen_field(values->HierarchicalDepthBufferEnable, 22, 22) |
2369 __gen_field(values->SurfaceFormat, 18, 20) |
2370 __gen_field(values->SurfacePitch, 0, 17) |
2371 0;
2372
2373 uint32_t dw2 =
2374 0;
2375
2376 uint64_t qw2 =
2377 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
2378
2379 dw[2] = qw2;
2380 dw[3] = qw2 >> 32;
2381
2382 dw[4] =
2383 __gen_field(values->Height, 18, 31) |
2384 __gen_field(values->Width, 4, 17) |
2385 __gen_field(values->LOD, 0, 3) |
2386 0;
2387
2388 uint32_t dw_DepthBufferObjectControlState;
2389 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DepthBufferObjectControlState, &values->DepthBufferObjectControlState);
2390 dw[5] =
2391 __gen_field(values->Depth, 21, 31) |
2392 __gen_field(values->MinimumArrayElement, 10, 20) |
2393 __gen_field(dw_DepthBufferObjectControlState, 0, 6) |
2394 0;
2395
2396 dw[6] =
2397 __gen_field(values->TiledResourceMode, 30, 31) |
2398 __gen_field(values->MipTailStartLOD, 26, 29) |
2399 0;
2400
2401 dw[7] =
2402 __gen_field(values->RenderTargetViewExtent, 21, 31) |
2403 __gen_field(values->SurfaceQPitch, 0, 14) |
2404 0;
2405
2406 }
2407
2408 #define GEN9_3DSTATE_DRAWING_RECTANGLE_length_bias 0x00000002
2409 #define GEN9_3DSTATE_DRAWING_RECTANGLE_header \
2410 .CommandType = 3, \
2411 .CommandSubType = 3, \
2412 ._3DCommandOpcode = 1, \
2413 ._3DCommandSubOpcode = 0, \
2414 .DwordLength = 2
2415
2416 #define GEN9_3DSTATE_DRAWING_RECTANGLE_length 0x00000004
2417
2418 struct GEN9_3DSTATE_DRAWING_RECTANGLE {
2419 uint32_t CommandType;
2420 uint32_t CommandSubType;
2421 uint32_t _3DCommandOpcode;
2422 uint32_t _3DCommandSubOpcode;
2423 #define Legacy 0
2424 #define Core0Enabled 1
2425 #define Core1Enabled 2
2426 uint32_t CoreModeSelect;
2427 uint32_t DwordLength;
2428 uint32_t ClippedDrawingRectangleYMin;
2429 uint32_t ClippedDrawingRectangleXMin;
2430 uint32_t ClippedDrawingRectangleYMax;
2431 uint32_t ClippedDrawingRectangleXMax;
2432 uint32_t DrawingRectangleOriginY;
2433 uint32_t DrawingRectangleOriginX;
2434 };
2435
2436 static inline void
2437 GEN9_3DSTATE_DRAWING_RECTANGLE_pack(__gen_user_data *data, void * restrict dst,
2438 const struct GEN9_3DSTATE_DRAWING_RECTANGLE * restrict values)
2439 {
2440 uint32_t *dw = (uint32_t * restrict) dst;
2441
2442 dw[0] =
2443 __gen_field(values->CommandType, 29, 31) |
2444 __gen_field(values->CommandSubType, 27, 28) |
2445 __gen_field(values->_3DCommandOpcode, 24, 26) |
2446 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2447 __gen_field(values->CoreModeSelect, 14, 15) |
2448 __gen_field(values->DwordLength, 0, 7) |
2449 0;
2450
2451 dw[1] =
2452 __gen_field(values->ClippedDrawingRectangleYMin, 16, 31) |
2453 __gen_field(values->ClippedDrawingRectangleXMin, 0, 15) |
2454 0;
2455
2456 dw[2] =
2457 __gen_field(values->ClippedDrawingRectangleYMax, 16, 31) |
2458 __gen_field(values->ClippedDrawingRectangleXMax, 0, 15) |
2459 0;
2460
2461 dw[3] =
2462 __gen_field(values->DrawingRectangleOriginY, 16, 31) |
2463 __gen_field(values->DrawingRectangleOriginX, 0, 15) |
2464 0;
2465
2466 }
2467
2468 #define GEN9_3DSTATE_DS_length_bias 0x00000002
2469 #define GEN9_3DSTATE_DS_header \
2470 .CommandType = 3, \
2471 .CommandSubType = 3, \
2472 ._3DCommandOpcode = 0, \
2473 ._3DCommandSubOpcode = 29, \
2474 .DwordLength = 9
2475
2476 #define GEN9_3DSTATE_DS_length 0x0000000b
2477
2478 struct GEN9_3DSTATE_DS {
2479 uint32_t CommandType;
2480 uint32_t CommandSubType;
2481 uint32_t _3DCommandOpcode;
2482 uint32_t _3DCommandSubOpcode;
2483 uint32_t DwordLength;
2484 uint64_t KernelStartPointer;
2485 #define Dmask 0
2486 #define Vmask 1
2487 uint32_t VectorMaskEnable;
2488 #define NoSamplers 0
2489 #define _14Samplers 1
2490 #define _58Samplers 2
2491 #define _912Samplers 3
2492 #define _1316Samplers 4
2493 uint32_t SamplerCount;
2494 uint32_t BindingTableEntryCount;
2495 #define Normal 0
2496 #define High 1
2497 uint32_t ThreadDispatchPriority;
2498 #define IEEE754 0
2499 #define Alternate 1
2500 uint32_t FloatingPointMode;
2501 bool AccessesUAV;
2502 bool IllegalOpcodeExceptionEnable;
2503 bool SoftwareExceptionEnable;
2504 uint64_t ScratchSpaceBasePointer;
2505 uint32_t PerThreadScratchSpace;
2506 uint32_t DispatchGRFStartRegisterForURBData;
2507 uint32_t PatchURBEntryReadLength;
2508 uint32_t PatchURBEntryReadOffset;
2509 uint32_t MaximumNumberofThreads;
2510 bool StatisticsEnable;
2511 #define SIMD4X2 0
2512 #define SIMD8_SINGLE_PATCH 1
2513 #define SIMD8_SINGLE_OR_DUAL_PATCH 2
2514 uint32_t DispatchMode;
2515 bool ComputeWCoordinateEnable;
2516 bool CacheDisable;
2517 bool FunctionEnable;
2518 uint32_t VertexURBEntryOutputReadOffset;
2519 uint32_t VertexURBEntryOutputLength;
2520 uint32_t UserClipDistanceClipTestEnableBitmask;
2521 uint32_t UserClipDistanceCullTestEnableBitmask;
2522 uint64_t DUAL_PATCHKernelStartPointer;
2523 };
2524
2525 static inline void
2526 GEN9_3DSTATE_DS_pack(__gen_user_data *data, void * restrict dst,
2527 const struct GEN9_3DSTATE_DS * restrict values)
2528 {
2529 uint32_t *dw = (uint32_t * restrict) dst;
2530
2531 dw[0] =
2532 __gen_field(values->CommandType, 29, 31) |
2533 __gen_field(values->CommandSubType, 27, 28) |
2534 __gen_field(values->_3DCommandOpcode, 24, 26) |
2535 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2536 __gen_field(values->DwordLength, 0, 7) |
2537 0;
2538
2539 uint64_t qw1 =
2540 __gen_offset(values->KernelStartPointer, 6, 63) |
2541 0;
2542
2543 dw[1] = qw1;
2544 dw[2] = qw1 >> 32;
2545
2546 dw[3] =
2547 __gen_field(values->VectorMaskEnable, 30, 30) |
2548 __gen_field(values->SamplerCount, 27, 29) |
2549 __gen_field(values->BindingTableEntryCount, 18, 25) |
2550 __gen_field(values->ThreadDispatchPriority, 17, 17) |
2551 __gen_field(values->FloatingPointMode, 16, 16) |
2552 __gen_field(values->AccessesUAV, 14, 14) |
2553 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2554 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
2555 0;
2556
2557 uint64_t qw4 =
2558 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
2559 __gen_field(values->PerThreadScratchSpace, 0, 3) |
2560 0;
2561
2562 dw[4] = qw4;
2563 dw[5] = qw4 >> 32;
2564
2565 dw[6] =
2566 __gen_field(values->DispatchGRFStartRegisterForURBData, 20, 24) |
2567 __gen_field(values->PatchURBEntryReadLength, 11, 17) |
2568 __gen_field(values->PatchURBEntryReadOffset, 4, 9) |
2569 0;
2570
2571 dw[7] =
2572 __gen_field(values->MaximumNumberofThreads, 21, 29) |
2573 __gen_field(values->StatisticsEnable, 10, 10) |
2574 __gen_field(values->DispatchMode, 3, 4) |
2575 __gen_field(values->ComputeWCoordinateEnable, 2, 2) |
2576 __gen_field(values->CacheDisable, 1, 1) |
2577 __gen_field(values->FunctionEnable, 0, 0) |
2578 0;
2579
2580 dw[8] =
2581 __gen_field(values->VertexURBEntryOutputReadOffset, 21, 26) |
2582 __gen_field(values->VertexURBEntryOutputLength, 16, 20) |
2583 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 8, 15) |
2584 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
2585 0;
2586
2587 uint64_t qw9 =
2588 __gen_offset(values->DUAL_PATCHKernelStartPointer, 6, 63) |
2589 0;
2590
2591 dw[9] = qw9;
2592 dw[10] = qw9 >> 32;
2593
2594 }
2595
2596 #define GEN9_3DSTATE_GATHER_CONSTANT_DS_length_bias 0x00000002
2597 #define GEN9_3DSTATE_GATHER_CONSTANT_DS_header \
2598 .CommandType = 3, \
2599 .CommandSubType = 3, \
2600 ._3DCommandOpcode = 0, \
2601 ._3DCommandSubOpcode = 55
2602
2603 #define GEN9_3DSTATE_GATHER_CONSTANT_DS_length 0x00000000
2604
2605 #define GEN9_GATHER_CONSTANT_ENTRY_length 0x00000001
2606
2607 struct GEN9_GATHER_CONSTANT_ENTRY {
2608 uint32_t ConstantBufferOffset;
2609 uint32_t ChannelMask;
2610 uint32_t BindingTableIndexOffset;
2611 };
2612
2613 static inline void
2614 GEN9_GATHER_CONSTANT_ENTRY_pack(__gen_user_data *data, void * restrict dst,
2615 const struct GEN9_GATHER_CONSTANT_ENTRY * restrict values)
2616 {
2617 uint32_t *dw = (uint32_t * restrict) dst;
2618
2619 dw[0] =
2620 __gen_offset(values->ConstantBufferOffset, 8, 15) |
2621 __gen_field(values->ChannelMask, 4, 7) |
2622 __gen_field(values->BindingTableIndexOffset, 0, 3) |
2623 0;
2624
2625 }
2626
2627 struct GEN9_3DSTATE_GATHER_CONSTANT_DS {
2628 uint32_t CommandType;
2629 uint32_t CommandSubType;
2630 uint32_t _3DCommandOpcode;
2631 uint32_t _3DCommandSubOpcode;
2632 uint32_t DwordLength;
2633 uint32_t ConstantBufferValid;
2634 uint32_t ConstantBufferBindingTableBlock;
2635 #define CommitGather 0
2636 #define NonCommitGather 1
2637 uint32_t UpdateGatherTableOnly;
2638 uint32_t GatherBufferOffset;
2639 bool ConstantBufferDx9GenerateStall;
2640 #define Load 0
2641 #define Read 1
2642 uint32_t OnDieTable;
2643 /* variable length fields follow */
2644 };
2645
2646 static inline void
2647 GEN9_3DSTATE_GATHER_CONSTANT_DS_pack(__gen_user_data *data, void * restrict dst,
2648 const struct GEN9_3DSTATE_GATHER_CONSTANT_DS * restrict values)
2649 {
2650 uint32_t *dw = (uint32_t * restrict) dst;
2651
2652 dw[0] =
2653 __gen_field(values->CommandType, 29, 31) |
2654 __gen_field(values->CommandSubType, 27, 28) |
2655 __gen_field(values->_3DCommandOpcode, 24, 26) |
2656 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2657 __gen_field(values->DwordLength, 0, 7) |
2658 0;
2659
2660 dw[1] =
2661 __gen_field(values->ConstantBufferValid, 16, 31) |
2662 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2663 __gen_field(values->UpdateGatherTableOnly, 1, 1) |
2664 0;
2665
2666 dw[2] =
2667 __gen_offset(values->GatherBufferOffset, 6, 22) |
2668 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2669 __gen_field(values->OnDieTable, 3, 3) |
2670 0;
2671
2672 /* variable length fields follow */
2673 }
2674
2675 #define GEN9_3DSTATE_GATHER_CONSTANT_GS_length_bias 0x00000002
2676 #define GEN9_3DSTATE_GATHER_CONSTANT_GS_header \
2677 .CommandType = 3, \
2678 .CommandSubType = 3, \
2679 ._3DCommandOpcode = 0, \
2680 ._3DCommandSubOpcode = 53
2681
2682 #define GEN9_3DSTATE_GATHER_CONSTANT_GS_length 0x00000000
2683
2684 struct GEN9_3DSTATE_GATHER_CONSTANT_GS {
2685 uint32_t CommandType;
2686 uint32_t CommandSubType;
2687 uint32_t _3DCommandOpcode;
2688 uint32_t _3DCommandSubOpcode;
2689 uint32_t DwordLength;
2690 uint32_t ConstantBufferValid;
2691 uint32_t ConstantBufferBindingTableBlock;
2692 #define CommitGather 0
2693 #define NonCommitGather 1
2694 uint32_t UpdateGatherTableOnly;
2695 uint32_t GatherBufferOffset;
2696 bool ConstantBufferDx9GenerateStall;
2697 #define Load 0
2698 #define Read 1
2699 uint32_t OnDieTable;
2700 /* variable length fields follow */
2701 };
2702
2703 static inline void
2704 GEN9_3DSTATE_GATHER_CONSTANT_GS_pack(__gen_user_data *data, void * restrict dst,
2705 const struct GEN9_3DSTATE_GATHER_CONSTANT_GS * restrict values)
2706 {
2707 uint32_t *dw = (uint32_t * restrict) dst;
2708
2709 dw[0] =
2710 __gen_field(values->CommandType, 29, 31) |
2711 __gen_field(values->CommandSubType, 27, 28) |
2712 __gen_field(values->_3DCommandOpcode, 24, 26) |
2713 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2714 __gen_field(values->DwordLength, 0, 7) |
2715 0;
2716
2717 dw[1] =
2718 __gen_field(values->ConstantBufferValid, 16, 31) |
2719 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2720 __gen_field(values->UpdateGatherTableOnly, 1, 1) |
2721 0;
2722
2723 dw[2] =
2724 __gen_offset(values->GatherBufferOffset, 6, 22) |
2725 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2726 __gen_field(values->OnDieTable, 3, 3) |
2727 0;
2728
2729 /* variable length fields follow */
2730 }
2731
2732 #define GEN9_3DSTATE_GATHER_CONSTANT_HS_length_bias 0x00000002
2733 #define GEN9_3DSTATE_GATHER_CONSTANT_HS_header \
2734 .CommandType = 3, \
2735 .CommandSubType = 3, \
2736 ._3DCommandOpcode = 0, \
2737 ._3DCommandSubOpcode = 54
2738
2739 #define GEN9_3DSTATE_GATHER_CONSTANT_HS_length 0x00000000
2740
2741 struct GEN9_3DSTATE_GATHER_CONSTANT_HS {
2742 uint32_t CommandType;
2743 uint32_t CommandSubType;
2744 uint32_t _3DCommandOpcode;
2745 uint32_t _3DCommandSubOpcode;
2746 uint32_t DwordLength;
2747 uint32_t ConstantBufferValid;
2748 uint32_t ConstantBufferBindingTableBlock;
2749 #define CommitGather 0
2750 #define NonCommitGather 1
2751 uint32_t UpdateGatherTableOnly;
2752 uint32_t GatherBufferOffset;
2753 bool ConstantBufferDx9GenerateStall;
2754 #define Load 0
2755 #define Read 1
2756 uint32_t OnDieTable;
2757 /* variable length fields follow */
2758 };
2759
2760 static inline void
2761 GEN9_3DSTATE_GATHER_CONSTANT_HS_pack(__gen_user_data *data, void * restrict dst,
2762 const struct GEN9_3DSTATE_GATHER_CONSTANT_HS * restrict values)
2763 {
2764 uint32_t *dw = (uint32_t * restrict) dst;
2765
2766 dw[0] =
2767 __gen_field(values->CommandType, 29, 31) |
2768 __gen_field(values->CommandSubType, 27, 28) |
2769 __gen_field(values->_3DCommandOpcode, 24, 26) |
2770 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2771 __gen_field(values->DwordLength, 0, 7) |
2772 0;
2773
2774 dw[1] =
2775 __gen_field(values->ConstantBufferValid, 16, 31) |
2776 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2777 __gen_field(values->UpdateGatherTableOnly, 1, 1) |
2778 0;
2779
2780 dw[2] =
2781 __gen_offset(values->GatherBufferOffset, 6, 22) |
2782 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2783 __gen_field(values->OnDieTable, 3, 3) |
2784 0;
2785
2786 /* variable length fields follow */
2787 }
2788
2789 #define GEN9_3DSTATE_GATHER_CONSTANT_PS_length_bias 0x00000002
2790 #define GEN9_3DSTATE_GATHER_CONSTANT_PS_header \
2791 .CommandType = 3, \
2792 .CommandSubType = 3, \
2793 ._3DCommandOpcode = 0, \
2794 ._3DCommandSubOpcode = 56
2795
2796 #define GEN9_3DSTATE_GATHER_CONSTANT_PS_length 0x00000000
2797
2798 struct GEN9_3DSTATE_GATHER_CONSTANT_PS {
2799 uint32_t CommandType;
2800 uint32_t CommandSubType;
2801 uint32_t _3DCommandOpcode;
2802 uint32_t _3DCommandSubOpcode;
2803 uint32_t DwordLength;
2804 uint32_t ConstantBufferValid;
2805 uint32_t ConstantBufferBindingTableBlock;
2806 #define CommitGather 0
2807 #define NonCommitGather 1
2808 uint32_t UpdateGatherTableOnly;
2809 bool DX9OnDieRegisterReadEnable;
2810 uint32_t GatherBufferOffset;
2811 bool ConstantBufferDx9GenerateStall;
2812 bool ConstantBufferDx9Enable;
2813 #define Load 0
2814 #define Read 1
2815 uint32_t OnDieTable;
2816 /* variable length fields follow */
2817 };
2818
2819 static inline void
2820 GEN9_3DSTATE_GATHER_CONSTANT_PS_pack(__gen_user_data *data, void * restrict dst,
2821 const struct GEN9_3DSTATE_GATHER_CONSTANT_PS * restrict values)
2822 {
2823 uint32_t *dw = (uint32_t * restrict) dst;
2824
2825 dw[0] =
2826 __gen_field(values->CommandType, 29, 31) |
2827 __gen_field(values->CommandSubType, 27, 28) |
2828 __gen_field(values->_3DCommandOpcode, 24, 26) |
2829 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2830 __gen_field(values->DwordLength, 0, 7) |
2831 0;
2832
2833 dw[1] =
2834 __gen_field(values->ConstantBufferValid, 16, 31) |
2835 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2836 __gen_field(values->UpdateGatherTableOnly, 1, 1) |
2837 __gen_field(values->DX9OnDieRegisterReadEnable, 0, 0) |
2838 0;
2839
2840 dw[2] =
2841 __gen_offset(values->GatherBufferOffset, 6, 22) |
2842 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2843 __gen_field(values->ConstantBufferDx9Enable, 4, 4) |
2844 __gen_field(values->OnDieTable, 3, 3) |
2845 0;
2846
2847 /* variable length fields follow */
2848 }
2849
2850 #define GEN9_3DSTATE_GATHER_CONSTANT_VS_length_bias 0x00000002
2851 #define GEN9_3DSTATE_GATHER_CONSTANT_VS_header \
2852 .CommandType = 3, \
2853 .CommandSubType = 3, \
2854 ._3DCommandOpcode = 0, \
2855 ._3DCommandSubOpcode = 52
2856
2857 #define GEN9_3DSTATE_GATHER_CONSTANT_VS_length 0x00000000
2858
2859 struct GEN9_3DSTATE_GATHER_CONSTANT_VS {
2860 uint32_t CommandType;
2861 uint32_t CommandSubType;
2862 uint32_t _3DCommandOpcode;
2863 uint32_t _3DCommandSubOpcode;
2864 uint32_t DwordLength;
2865 uint32_t ConstantBufferValid;
2866 uint32_t ConstantBufferBindingTableBlock;
2867 #define CommitGather 0
2868 #define NonCommitGather 1
2869 uint32_t UpdateGatherTableOnly;
2870 bool DX9OnDieRegisterReadEnable;
2871 uint32_t GatherBufferOffset;
2872 bool ConstantBufferDx9GenerateStall;
2873 bool ConstantBufferDx9Enable;
2874 #define Load 0
2875 #define Read 1
2876 uint32_t OnDieTable;
2877 /* variable length fields follow */
2878 };
2879
2880 static inline void
2881 GEN9_3DSTATE_GATHER_CONSTANT_VS_pack(__gen_user_data *data, void * restrict dst,
2882 const struct GEN9_3DSTATE_GATHER_CONSTANT_VS * restrict values)
2883 {
2884 uint32_t *dw = (uint32_t * restrict) dst;
2885
2886 dw[0] =
2887 __gen_field(values->CommandType, 29, 31) |
2888 __gen_field(values->CommandSubType, 27, 28) |
2889 __gen_field(values->_3DCommandOpcode, 24, 26) |
2890 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2891 __gen_field(values->DwordLength, 0, 7) |
2892 0;
2893
2894 dw[1] =
2895 __gen_field(values->ConstantBufferValid, 16, 31) |
2896 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2897 __gen_field(values->UpdateGatherTableOnly, 1, 1) |
2898 __gen_field(values->DX9OnDieRegisterReadEnable, 0, 0) |
2899 0;
2900
2901 dw[2] =
2902 __gen_offset(values->GatherBufferOffset, 6, 22) |
2903 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2904 __gen_field(values->ConstantBufferDx9Enable, 4, 4) |
2905 __gen_field(values->OnDieTable, 3, 3) |
2906 0;
2907
2908 /* variable length fields follow */
2909 }
2910
2911 #define GEN9_3DSTATE_GATHER_POOL_ALLOC_length_bias 0x00000002
2912 #define GEN9_3DSTATE_GATHER_POOL_ALLOC_header \
2913 .CommandType = 3, \
2914 .CommandSubType = 3, \
2915 ._3DCommandOpcode = 1, \
2916 ._3DCommandSubOpcode = 26, \
2917 .DwordLength = 2
2918
2919 #define GEN9_3DSTATE_GATHER_POOL_ALLOC_length 0x00000004
2920
2921 struct GEN9_3DSTATE_GATHER_POOL_ALLOC {
2922 uint32_t CommandType;
2923 uint32_t CommandSubType;
2924 uint32_t _3DCommandOpcode;
2925 uint32_t _3DCommandSubOpcode;
2926 uint32_t DwordLength;
2927 __gen_address_type GatherPoolBaseAddress;
2928 bool GatherPoolEnable;
2929 struct GEN9_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
2930 uint32_t GatherPoolBufferSize;
2931 };
2932
2933 static inline void
2934 GEN9_3DSTATE_GATHER_POOL_ALLOC_pack(__gen_user_data *data, void * restrict dst,
2935 const struct GEN9_3DSTATE_GATHER_POOL_ALLOC * restrict values)
2936 {
2937 uint32_t *dw = (uint32_t * restrict) dst;
2938
2939 dw[0] =
2940 __gen_field(values->CommandType, 29, 31) |
2941 __gen_field(values->CommandSubType, 27, 28) |
2942 __gen_field(values->_3DCommandOpcode, 24, 26) |
2943 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2944 __gen_field(values->DwordLength, 0, 7) |
2945 0;
2946
2947 uint32_t dw_MemoryObjectControlState;
2948 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
2949 uint32_t dw1 =
2950 __gen_field(values->GatherPoolEnable, 11, 11) |
2951 __gen_field(dw_MemoryObjectControlState, 0, 6) |
2952 0;
2953
2954 uint64_t qw1 =
2955 __gen_combine_address(data, &dw[1], values->GatherPoolBaseAddress, dw1);
2956
2957 dw[1] = qw1;
2958 dw[2] = qw1 >> 32;
2959
2960 dw[3] =
2961 __gen_field(values->GatherPoolBufferSize, 12, 31) |
2962 0;
2963
2964 }
2965
2966 #define GEN9_3DSTATE_GS_length_bias 0x00000002
2967 #define GEN9_3DSTATE_GS_header \
2968 .CommandType = 3, \
2969 .CommandSubType = 3, \
2970 ._3DCommandOpcode = 0, \
2971 ._3DCommandSubOpcode = 17, \
2972 .DwordLength = 8
2973
2974 #define GEN9_3DSTATE_GS_length 0x0000000a
2975
2976 struct GEN9_3DSTATE_GS {
2977 uint32_t CommandType;
2978 uint32_t CommandSubType;
2979 uint32_t _3DCommandOpcode;
2980 uint32_t _3DCommandSubOpcode;
2981 uint32_t DwordLength;
2982 uint64_t KernelStartPointer;
2983 uint32_t SingleProgramFlow;
2984 #define Dmask 0
2985 #define Vmask 1
2986 uint32_t VectorMaskEnable;
2987 #define NoSamplers 0
2988 #define _14Samplers 1
2989 #define _58Samplers 2
2990 #define _912Samplers 3
2991 #define _1316Samplers 4
2992 uint32_t SamplerCount;
2993 uint32_t BindingTableEntryCount;
2994 #define Normal 0
2995 #define High 1
2996 uint32_t ThreadDispatchPriority;
2997 #define IEEE754 0
2998 #define Alternate 1
2999 uint32_t FloatingPointMode;
3000 bool IllegalOpcodeExceptionEnable;
3001 bool AccessesUAV;
3002 bool MaskStackExceptionEnable;
3003 bool SoftwareExceptionEnable;
3004 uint32_t ExpectedVertexCount;
3005 uint64_t ScratchSpaceBasePointer;
3006 uint32_t PerThreadScratchSpace;
3007 uint32_t DispatchGRFStartRegisterForURBData54;
3008 uint32_t OutputVertexSize;
3009 uint32_t OutputTopology;
3010 uint32_t VertexURBEntryReadLength;
3011 bool IncludeVertexHandles;
3012 uint32_t VertexURBEntryReadOffset;
3013 uint32_t DispatchGRFStartRegisterForURBData;
3014 uint32_t ControlDataHeaderSize;
3015 uint32_t InstanceControl;
3016 uint32_t DefaultStreamId;
3017 #define DispatchModeSingle 0
3018 #define DispatchModeDualInstance 1
3019 #define DispatchModeDualObject 2
3020 #define DispatchModeSIMD8 3
3021 uint32_t DispatchMode;
3022 bool StatisticsEnable;
3023 uint32_t InvocationsIncrementValue;
3024 bool IncludePrimitiveID;
3025 uint32_t Hint;
3026 #define LEADING 0
3027 #define TRAILING 1
3028 uint32_t ReorderMode;
3029 bool DiscardAdjacency;
3030 bool Enable;
3031 #define CUT 0
3032 #define SID 1
3033 uint32_t ControlDataFormat;
3034 bool StaticOutput;
3035 uint32_t StaticOutputVertexCount;
3036 uint32_t MaximumNumberofThreads;
3037 uint32_t VertexURBEntryOutputReadOffset;
3038 uint32_t VertexURBEntryOutputLength;
3039 uint32_t UserClipDistanceClipTestEnableBitmask;
3040 uint32_t UserClipDistanceCullTestEnableBitmask;
3041 };
3042
3043 static inline void
3044 GEN9_3DSTATE_GS_pack(__gen_user_data *data, void * restrict dst,
3045 const struct GEN9_3DSTATE_GS * restrict values)
3046 {
3047 uint32_t *dw = (uint32_t * restrict) dst;
3048
3049 dw[0] =
3050 __gen_field(values->CommandType, 29, 31) |
3051 __gen_field(values->CommandSubType, 27, 28) |
3052 __gen_field(values->_3DCommandOpcode, 24, 26) |
3053 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3054 __gen_field(values->DwordLength, 0, 7) |
3055 0;
3056
3057 uint64_t qw1 =
3058 __gen_offset(values->KernelStartPointer, 6, 63) |
3059 0;
3060
3061 dw[1] = qw1;
3062 dw[2] = qw1 >> 32;
3063
3064 dw[3] =
3065 __gen_field(values->SingleProgramFlow, 31, 31) |
3066 __gen_field(values->VectorMaskEnable, 30, 30) |
3067 __gen_field(values->SamplerCount, 27, 29) |
3068 __gen_field(values->BindingTableEntryCount, 18, 25) |
3069 __gen_field(values->ThreadDispatchPriority, 17, 17) |
3070 __gen_field(values->FloatingPointMode, 16, 16) |
3071 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
3072 __gen_field(values->AccessesUAV, 12, 12) |
3073 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
3074 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
3075 __gen_field(values->ExpectedVertexCount, 0, 5) |
3076 0;
3077
3078 uint64_t qw4 =
3079 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
3080 __gen_field(values->PerThreadScratchSpace, 0, 3) |
3081 0;
3082
3083 dw[4] = qw4;
3084 dw[5] = qw4 >> 32;
3085
3086 dw[6] =
3087 __gen_field(values->DispatchGRFStartRegisterForURBData54, 29, 30) |
3088 __gen_field(values->OutputVertexSize, 23, 28) |
3089 __gen_field(values->OutputTopology, 17, 22) |
3090 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
3091 __gen_field(values->IncludeVertexHandles, 10, 10) |
3092 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
3093 __gen_field(values->DispatchGRFStartRegisterForURBData, 0, 3) |
3094 0;
3095
3096 dw[7] =
3097 __gen_field(values->ControlDataHeaderSize, 20, 23) |
3098 __gen_field(values->InstanceControl, 15, 19) |
3099 __gen_field(values->DefaultStreamId, 13, 14) |
3100 __gen_field(values->DispatchMode, 11, 12) |
3101 __gen_field(values->StatisticsEnable, 10, 10) |
3102 __gen_field(values->InvocationsIncrementValue, 5, 9) |
3103 __gen_field(values->IncludePrimitiveID, 4, 4) |
3104 __gen_field(values->Hint, 3, 3) |
3105 __gen_field(values->ReorderMode, 2, 2) |
3106 __gen_field(values->DiscardAdjacency, 1, 1) |
3107 __gen_field(values->Enable, 0, 0) |
3108 0;
3109
3110 dw[8] =
3111 __gen_field(values->ControlDataFormat, 31, 31) |
3112 __gen_field(values->StaticOutput, 30, 30) |
3113 __gen_field(values->StaticOutputVertexCount, 16, 26) |
3114 __gen_field(values->MaximumNumberofThreads, 0, 8) |
3115 0;
3116
3117 dw[9] =
3118 __gen_field(values->VertexURBEntryOutputReadOffset, 21, 26) |
3119 __gen_field(values->VertexURBEntryOutputLength, 16, 20) |
3120 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 8, 15) |
3121 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
3122 0;
3123
3124 }
3125
3126 #define GEN9_3DSTATE_HIER_DEPTH_BUFFER_length_bias 0x00000002
3127 #define GEN9_3DSTATE_HIER_DEPTH_BUFFER_header \
3128 .CommandType = 3, \
3129 .CommandSubType = 3, \
3130 ._3DCommandOpcode = 0, \
3131 ._3DCommandSubOpcode = 7, \
3132 .DwordLength = 3
3133
3134 #define GEN9_3DSTATE_HIER_DEPTH_BUFFER_length 0x00000005
3135
3136 struct GEN9_3DSTATE_HIER_DEPTH_BUFFER {
3137 uint32_t CommandType;
3138 uint32_t CommandSubType;
3139 uint32_t _3DCommandOpcode;
3140 uint32_t _3DCommandSubOpcode;
3141 uint32_t DwordLength;
3142 struct GEN9_MEMORY_OBJECT_CONTROL_STATE HierarchicalDepthBufferObjectControlState;
3143 uint32_t SurfacePitch;
3144 __gen_address_type SurfaceBaseAddress;
3145 uint32_t SurfaceQPitch;
3146 };
3147
3148 static inline void
3149 GEN9_3DSTATE_HIER_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
3150 const struct GEN9_3DSTATE_HIER_DEPTH_BUFFER * restrict values)
3151 {
3152 uint32_t *dw = (uint32_t * restrict) dst;
3153
3154 dw[0] =
3155 __gen_field(values->CommandType, 29, 31) |
3156 __gen_field(values->CommandSubType, 27, 28) |
3157 __gen_field(values->_3DCommandOpcode, 24, 26) |
3158 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3159 __gen_field(values->DwordLength, 0, 7) |
3160 0;
3161
3162 uint32_t dw_HierarchicalDepthBufferObjectControlState;
3163 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_HierarchicalDepthBufferObjectControlState, &values->HierarchicalDepthBufferObjectControlState);
3164 dw[1] =
3165 __gen_field(dw_HierarchicalDepthBufferObjectControlState, 25, 31) |
3166 __gen_field(values->SurfacePitch, 0, 16) |
3167 0;
3168
3169 uint32_t dw2 =
3170 0;
3171
3172 uint64_t qw2 =
3173 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
3174
3175 dw[2] = qw2;
3176 dw[3] = qw2 >> 32;
3177
3178 dw[4] =
3179 __gen_field(values->SurfaceQPitch, 0, 14) |
3180 0;
3181
3182 }
3183
3184 #define GEN9_3DSTATE_HS_length_bias 0x00000002
3185 #define GEN9_3DSTATE_HS_header \
3186 .CommandType = 3, \
3187 .CommandSubType = 3, \
3188 ._3DCommandOpcode = 0, \
3189 ._3DCommandSubOpcode = 27, \
3190 .DwordLength = 7
3191
3192 #define GEN9_3DSTATE_HS_length 0x00000009
3193
3194 struct GEN9_3DSTATE_HS {
3195 uint32_t CommandType;
3196 uint32_t CommandSubType;
3197 uint32_t _3DCommandOpcode;
3198 uint32_t _3DCommandSubOpcode;
3199 uint32_t DwordLength;
3200 #define NoSamplers 0
3201 #define _14Samplers 1
3202 #define _58Samplers 2
3203 #define _912Samplers 3
3204 #define _1316Samplers 4
3205 uint32_t SamplerCount;
3206 uint32_t BindingTableEntryCount;
3207 #define Normal 0
3208 #define High 1
3209 uint32_t ThreadDispatchPriority;
3210 #define IEEE754 0
3211 #define alternate 1
3212 uint32_t FloatingPointMode;
3213 bool IllegalOpcodeExceptionEnable;
3214 bool SoftwareExceptionEnable;
3215 bool Enable;
3216 bool StatisticsEnable;
3217 uint32_t MaximumNumberofThreads;
3218 uint32_t InstanceCount;
3219 uint64_t KernelStartPointer;
3220 uint64_t ScratchSpaceBasePointer;
3221 uint32_t PerThreadScratchSpace;
3222 uint32_t DispatchGRFStartRegisterForURBData5;
3223 bool SingleProgramFlow;
3224 #define Dmask 0
3225 #define Vmask 1
3226 uint32_t VectorMaskEnable;
3227 bool AccessesUAV;
3228 bool IncludeVertexHandles;
3229 uint32_t DispatchGRFStartRegisterForURBData;
3230 #define SINGLE_PATCH 0
3231 #define DUAL_PATCH 1
3232 #define _8_PATCH 2
3233 uint32_t DispatchMode;
3234 uint32_t VertexURBEntryReadLength;
3235 uint32_t VertexURBEntryReadOffset;
3236 bool IncludePrimitiveID;
3237 };
3238
3239 static inline void
3240 GEN9_3DSTATE_HS_pack(__gen_user_data *data, void * restrict dst,
3241 const struct GEN9_3DSTATE_HS * restrict values)
3242 {
3243 uint32_t *dw = (uint32_t * restrict) dst;
3244
3245 dw[0] =
3246 __gen_field(values->CommandType, 29, 31) |
3247 __gen_field(values->CommandSubType, 27, 28) |
3248 __gen_field(values->_3DCommandOpcode, 24, 26) |
3249 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3250 __gen_field(values->DwordLength, 0, 7) |
3251 0;
3252
3253 dw[1] =
3254 __gen_field(values->SamplerCount, 27, 29) |
3255 __gen_field(values->BindingTableEntryCount, 18, 25) |
3256 __gen_field(values->ThreadDispatchPriority, 17, 17) |
3257 __gen_field(values->FloatingPointMode, 16, 16) |
3258 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
3259 __gen_field(values->SoftwareExceptionEnable, 12, 12) |
3260 0;
3261
3262 dw[2] =
3263 __gen_field(values->Enable, 31, 31) |
3264 __gen_field(values->StatisticsEnable, 29, 29) |
3265 __gen_field(values->MaximumNumberofThreads, 8, 16) |
3266 __gen_field(values->InstanceCount, 0, 3) |
3267 0;
3268
3269 uint64_t qw3 =
3270 __gen_offset(values->KernelStartPointer, 6, 63) |
3271 0;
3272
3273 dw[3] = qw3;
3274 dw[4] = qw3 >> 32;
3275
3276 uint64_t qw5 =
3277 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
3278 __gen_field(values->PerThreadScratchSpace, 0, 3) |
3279 0;
3280
3281 dw[5] = qw5;
3282 dw[6] = qw5 >> 32;
3283
3284 dw[7] =
3285 __gen_field(values->DispatchGRFStartRegisterForURBData5, 28, 28) |
3286 __gen_field(values->SingleProgramFlow, 27, 27) |
3287 __gen_field(values->VectorMaskEnable, 26, 26) |
3288 __gen_field(values->AccessesUAV, 25, 25) |
3289 __gen_field(values->IncludeVertexHandles, 24, 24) |
3290 __gen_field(values->DispatchGRFStartRegisterForURBData, 19, 23) |
3291 __gen_field(values->DispatchMode, 17, 18) |
3292 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
3293 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
3294 __gen_field(values->IncludePrimitiveID, 0, 0) |
3295 0;
3296
3297 dw[8] =
3298 0;
3299
3300 }
3301
3302 #define GEN9_3DSTATE_INDEX_BUFFER_length_bias 0x00000002
3303 #define GEN9_3DSTATE_INDEX_BUFFER_header \
3304 .CommandType = 3, \
3305 .CommandSubType = 3, \
3306 ._3DCommandOpcode = 0, \
3307 ._3DCommandSubOpcode = 10, \
3308 .DwordLength = 3
3309
3310 #define GEN9_3DSTATE_INDEX_BUFFER_length 0x00000005
3311
3312 struct GEN9_3DSTATE_INDEX_BUFFER {
3313 uint32_t CommandType;
3314 uint32_t CommandSubType;
3315 uint32_t _3DCommandOpcode;
3316 uint32_t _3DCommandSubOpcode;
3317 uint32_t DwordLength;
3318 #define INDEX_BYTE 0
3319 #define INDEX_WORD 1
3320 #define INDEX_DWORD 2
3321 uint32_t IndexFormat;
3322 struct GEN9_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
3323 __gen_address_type BufferStartingAddress;
3324 uint32_t BufferSize;
3325 };
3326
3327 static inline void
3328 GEN9_3DSTATE_INDEX_BUFFER_pack(__gen_user_data *data, void * restrict dst,
3329 const struct GEN9_3DSTATE_INDEX_BUFFER * restrict values)
3330 {
3331 uint32_t *dw = (uint32_t * restrict) dst;
3332
3333 dw[0] =
3334 __gen_field(values->CommandType, 29, 31) |
3335 __gen_field(values->CommandSubType, 27, 28) |
3336 __gen_field(values->_3DCommandOpcode, 24, 26) |
3337 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3338 __gen_field(values->DwordLength, 0, 7) |
3339 0;
3340
3341 uint32_t dw_MemoryObjectControlState;
3342 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
3343 dw[1] =
3344 __gen_field(values->IndexFormat, 8, 9) |
3345 __gen_field(dw_MemoryObjectControlState, 0, 6) |
3346 0;
3347
3348 uint32_t dw2 =
3349 0;
3350
3351 uint64_t qw2 =
3352 __gen_combine_address(data, &dw[2], values->BufferStartingAddress, dw2);
3353
3354 dw[2] = qw2;
3355 dw[3] = qw2 >> 32;
3356
3357 dw[4] =
3358 __gen_field(values->BufferSize, 0, 31) |
3359 0;
3360
3361 }
3362
3363 #define GEN9_3DSTATE_LINE_STIPPLE_length_bias 0x00000002
3364 #define GEN9_3DSTATE_LINE_STIPPLE_header \
3365 .CommandType = 3, \
3366 .CommandSubType = 3, \
3367 ._3DCommandOpcode = 1, \
3368 ._3DCommandSubOpcode = 8, \
3369 .DwordLength = 1
3370
3371 #define GEN9_3DSTATE_LINE_STIPPLE_length 0x00000003
3372
3373 struct GEN9_3DSTATE_LINE_STIPPLE {
3374 uint32_t CommandType;
3375 uint32_t CommandSubType;
3376 uint32_t _3DCommandOpcode;
3377 uint32_t _3DCommandSubOpcode;
3378 uint32_t DwordLength;
3379 bool ModifyEnableCurrentRepeatCounterCurrentStippleIndex;
3380 uint32_t CurrentRepeatCounter;
3381 uint32_t CurrentStippleIndex;
3382 uint32_t LineStipplePattern;
3383 float LineStippleInverseRepeatCount;
3384 uint32_t LineStippleRepeatCount;
3385 };
3386
3387 static inline void
3388 GEN9_3DSTATE_LINE_STIPPLE_pack(__gen_user_data *data, void * restrict dst,
3389 const struct GEN9_3DSTATE_LINE_STIPPLE * restrict values)
3390 {
3391 uint32_t *dw = (uint32_t * restrict) dst;
3392
3393 dw[0] =
3394 __gen_field(values->CommandType, 29, 31) |
3395 __gen_field(values->CommandSubType, 27, 28) |
3396 __gen_field(values->_3DCommandOpcode, 24, 26) |
3397 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3398 __gen_field(values->DwordLength, 0, 7) |
3399 0;
3400
3401 dw[1] =
3402 __gen_field(values->ModifyEnableCurrentRepeatCounterCurrentStippleIndex, 31, 31) |
3403 __gen_field(values->CurrentRepeatCounter, 21, 29) |
3404 __gen_field(values->CurrentStippleIndex, 16, 19) |
3405 __gen_field(values->LineStipplePattern, 0, 15) |
3406 0;
3407
3408 dw[2] =
3409 __gen_field(values->LineStippleInverseRepeatCount * (1 << 16), 15, 31) |
3410 __gen_field(values->LineStippleRepeatCount, 0, 8) |
3411 0;
3412
3413 }
3414
3415 #define GEN9_3DSTATE_MONOFILTER_SIZE_length_bias 0x00000002
3416 #define GEN9_3DSTATE_MONOFILTER_SIZE_header \
3417 .CommandType = 3, \
3418 .CommandSubType = 3, \
3419 ._3DCommandOpcode = 1, \
3420 ._3DCommandSubOpcode = 17, \
3421 .DwordLength = 0
3422
3423 #define GEN9_3DSTATE_MONOFILTER_SIZE_length 0x00000002
3424
3425 struct GEN9_3DSTATE_MONOFILTER_SIZE {
3426 uint32_t CommandType;
3427 uint32_t CommandSubType;
3428 uint32_t _3DCommandOpcode;
3429 uint32_t _3DCommandSubOpcode;
3430 uint32_t DwordLength;
3431 uint32_t MonochromeFilterWidth;
3432 uint32_t MonochromeFilterHeight;
3433 };
3434
3435 static inline void
3436 GEN9_3DSTATE_MONOFILTER_SIZE_pack(__gen_user_data *data, void * restrict dst,
3437 const struct GEN9_3DSTATE_MONOFILTER_SIZE * restrict values)
3438 {
3439 uint32_t *dw = (uint32_t * restrict) dst;
3440
3441 dw[0] =
3442 __gen_field(values->CommandType, 29, 31) |
3443 __gen_field(values->CommandSubType, 27, 28) |
3444 __gen_field(values->_3DCommandOpcode, 24, 26) |
3445 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3446 __gen_field(values->DwordLength, 0, 7) |
3447 0;
3448
3449 dw[1] =
3450 __gen_field(values->MonochromeFilterWidth, 3, 5) |
3451 __gen_field(values->MonochromeFilterHeight, 0, 2) |
3452 0;
3453
3454 }
3455
3456 #define GEN9_3DSTATE_MULTISAMPLE_length_bias 0x00000002
3457 #define GEN9_3DSTATE_MULTISAMPLE_header \
3458 .CommandType = 3, \
3459 .CommandSubType = 3, \
3460 ._3DCommandOpcode = 0, \
3461 ._3DCommandSubOpcode = 13, \
3462 .DwordLength = 0
3463
3464 #define GEN9_3DSTATE_MULTISAMPLE_length 0x00000002
3465
3466 struct GEN9_3DSTATE_MULTISAMPLE {
3467 uint32_t CommandType;
3468 uint32_t CommandSubType;
3469 uint32_t _3DCommandOpcode;
3470 uint32_t _3DCommandSubOpcode;
3471 uint32_t DwordLength;
3472 uint32_t PixelPositionOffsetEnable;
3473 #define CENTER 0
3474 #define UL_CORNER 1
3475 uint32_t PixelLocation;
3476 uint32_t NumberofMultisamples;
3477 };
3478
3479 static inline void
3480 GEN9_3DSTATE_MULTISAMPLE_pack(__gen_user_data *data, void * restrict dst,
3481 const struct GEN9_3DSTATE_MULTISAMPLE * restrict values)
3482 {
3483 uint32_t *dw = (uint32_t * restrict) dst;
3484
3485 dw[0] =
3486 __gen_field(values->CommandType, 29, 31) |
3487 __gen_field(values->CommandSubType, 27, 28) |
3488 __gen_field(values->_3DCommandOpcode, 24, 26) |
3489 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3490 __gen_field(values->DwordLength, 0, 7) |
3491 0;
3492
3493 dw[1] =
3494 __gen_field(values->PixelPositionOffsetEnable, 5, 5) |
3495 __gen_field(values->PixelLocation, 4, 4) |
3496 __gen_field(values->NumberofMultisamples, 1, 3) |
3497 0;
3498
3499 }
3500
3501 #define GEN9_3DSTATE_POLY_STIPPLE_OFFSET_length_bias 0x00000002
3502 #define GEN9_3DSTATE_POLY_STIPPLE_OFFSET_header \
3503 .CommandType = 3, \
3504 .CommandSubType = 3, \
3505 ._3DCommandOpcode = 1, \
3506 ._3DCommandSubOpcode = 6, \
3507 .DwordLength = 0
3508
3509 #define GEN9_3DSTATE_POLY_STIPPLE_OFFSET_length 0x00000002
3510
3511 struct GEN9_3DSTATE_POLY_STIPPLE_OFFSET {
3512 uint32_t CommandType;
3513 uint32_t CommandSubType;
3514 uint32_t _3DCommandOpcode;
3515 uint32_t _3DCommandSubOpcode;
3516 uint32_t DwordLength;
3517 uint32_t PolygonStippleXOffset;
3518 uint32_t PolygonStippleYOffset;
3519 };
3520
3521 static inline void
3522 GEN9_3DSTATE_POLY_STIPPLE_OFFSET_pack(__gen_user_data *data, void * restrict dst,
3523 const struct GEN9_3DSTATE_POLY_STIPPLE_OFFSET * restrict values)
3524 {
3525 uint32_t *dw = (uint32_t * restrict) dst;
3526
3527 dw[0] =
3528 __gen_field(values->CommandType, 29, 31) |
3529 __gen_field(values->CommandSubType, 27, 28) |
3530 __gen_field(values->_3DCommandOpcode, 24, 26) |
3531 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3532 __gen_field(values->DwordLength, 0, 7) |
3533 0;
3534
3535 dw[1] =
3536 __gen_field(values->PolygonStippleXOffset, 8, 12) |
3537 __gen_field(values->PolygonStippleYOffset, 0, 4) |
3538 0;
3539
3540 }
3541
3542 #define GEN9_3DSTATE_POLY_STIPPLE_PATTERN_length_bias 0x00000002
3543 #define GEN9_3DSTATE_POLY_STIPPLE_PATTERN_header\
3544 .CommandType = 3, \
3545 .CommandSubType = 3, \
3546 ._3DCommandOpcode = 1, \
3547 ._3DCommandSubOpcode = 7, \
3548 .DwordLength = 31
3549
3550 #define GEN9_3DSTATE_POLY_STIPPLE_PATTERN_length 0x00000021
3551
3552 struct GEN9_3DSTATE_POLY_STIPPLE_PATTERN {
3553 uint32_t CommandType;
3554 uint32_t CommandSubType;
3555 uint32_t _3DCommandOpcode;
3556 uint32_t _3DCommandSubOpcode;
3557 uint32_t DwordLength;
3558 uint32_t PatternRow[32];
3559 };
3560
3561 static inline void
3562 GEN9_3DSTATE_POLY_STIPPLE_PATTERN_pack(__gen_user_data *data, void * restrict dst,
3563 const struct GEN9_3DSTATE_POLY_STIPPLE_PATTERN * restrict values)
3564 {
3565 uint32_t *dw = (uint32_t * restrict) dst;
3566
3567 dw[0] =
3568 __gen_field(values->CommandType, 29, 31) |
3569 __gen_field(values->CommandSubType, 27, 28) |
3570 __gen_field(values->_3DCommandOpcode, 24, 26) |
3571 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3572 __gen_field(values->DwordLength, 0, 7) |
3573 0;
3574
3575 for (uint32_t i = 0, j = 1; i < 32; i += 1, j++) {
3576 dw[j] =
3577 __gen_field(values->PatternRow[i + 0], 0, 31) |
3578 0;
3579 }
3580
3581 }
3582
3583 #define GEN9_3DSTATE_PS_length_bias 0x00000002
3584 #define GEN9_3DSTATE_PS_header \
3585 .CommandType = 3, \
3586 .CommandSubType = 3, \
3587 ._3DCommandOpcode = 0, \
3588 ._3DCommandSubOpcode = 32, \
3589 .DwordLength = 10
3590
3591 #define GEN9_3DSTATE_PS_length 0x0000000c
3592
3593 struct GEN9_3DSTATE_PS {
3594 uint32_t CommandType;
3595 uint32_t CommandSubType;
3596 uint32_t _3DCommandOpcode;
3597 uint32_t _3DCommandSubOpcode;
3598 uint32_t DwordLength;
3599 uint64_t KernelStartPointer0;
3600 #define Multiple 0
3601 #define Single 1
3602 uint32_t SingleProgramFlow;
3603 #define Dmask 0
3604 #define Vmask 1
3605 uint32_t VectorMaskEnable;
3606 #define NoSamplers 0
3607 #define _14Samplers 1
3608 #define _58Samplers 2
3609 #define _912Samplers 3
3610 #define _1316Samplers 4
3611 uint32_t SamplerCount;
3612 #define FlushedtoZero 0
3613 #define Retained 1
3614 uint32_t SinglePrecisionDenormalMode;
3615 uint32_t BindingTableEntryCount;
3616 #define Normal 0
3617 #define High 1
3618 uint32_t ThreadDispatchPriority;
3619 #define IEEE754 0
3620 #define Alternate 1
3621 uint32_t FloatingPointMode;
3622 #define RTNE 0
3623 #define RU 1
3624 #define RD 2
3625 #define RTZ 3
3626 uint32_t RoundingMode;
3627 bool IllegalOpcodeExceptionEnable;
3628 bool MaskStackExceptionEnable;
3629 bool SoftwareExceptionEnable;
3630 uint64_t ScratchSpaceBasePointer;
3631 uint32_t PerThreadScratchSpace;
3632 uint32_t MaximumNumberofThreadsPerPSD;
3633 bool PushConstantEnable;
3634 bool RenderTargetFastClearEnable;
3635 #define RESOLVE_DISABLED 0
3636 #define RESOLVE_PARTIAL 1
3637 #define RESOLVE_FULL 3
3638 uint32_t RenderTargetResolveType;
3639 #define POSOFFSET_NONE 0
3640 #define POSOFFSET_CENTROID 2
3641 #define POSOFFSET_SAMPLE 3
3642 uint32_t PositionXYOffsetSelect;
3643 bool _32PixelDispatchEnable;
3644 bool _16PixelDispatchEnable;
3645 bool _8PixelDispatchEnable;
3646 uint32_t DispatchGRFStartRegisterForConstantSetupData0;
3647 uint32_t DispatchGRFStartRegisterForConstantSetupData1;
3648 uint32_t DispatchGRFStartRegisterForConstantSetupData2;
3649 uint64_t KernelStartPointer1;
3650 uint64_t KernelStartPointer2;
3651 };
3652
3653 static inline void
3654 GEN9_3DSTATE_PS_pack(__gen_user_data *data, void * restrict dst,
3655 const struct GEN9_3DSTATE_PS * restrict values)
3656 {
3657 uint32_t *dw = (uint32_t * restrict) dst;
3658
3659 dw[0] =
3660 __gen_field(values->CommandType, 29, 31) |
3661 __gen_field(values->CommandSubType, 27, 28) |
3662 __gen_field(values->_3DCommandOpcode, 24, 26) |
3663 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3664 __gen_field(values->DwordLength, 0, 7) |
3665 0;
3666
3667 uint64_t qw1 =
3668 __gen_offset(values->KernelStartPointer0, 6, 63) |
3669 0;
3670
3671 dw[1] = qw1;
3672 dw[2] = qw1 >> 32;
3673
3674 dw[3] =
3675 __gen_field(values->SingleProgramFlow, 31, 31) |
3676 __gen_field(values->VectorMaskEnable, 30, 30) |
3677 __gen_field(values->SamplerCount, 27, 29) |
3678 __gen_field(values->SinglePrecisionDenormalMode, 26, 26) |
3679 __gen_field(values->BindingTableEntryCount, 18, 25) |
3680 __gen_field(values->ThreadDispatchPriority, 17, 17) |
3681 __gen_field(values->FloatingPointMode, 16, 16) |
3682 __gen_field(values->RoundingMode, 14, 15) |
3683 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
3684 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
3685 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
3686 0;
3687
3688 uint64_t qw4 =
3689 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
3690 __gen_field(values->PerThreadScratchSpace, 0, 3) |
3691 0;
3692
3693 dw[4] = qw4;
3694 dw[5] = qw4 >> 32;
3695
3696 dw[6] =
3697 __gen_field(values->MaximumNumberofThreadsPerPSD, 23, 31) |
3698 __gen_field(values->PushConstantEnable, 11, 11) |
3699 __gen_field(values->RenderTargetFastClearEnable, 8, 8) |
3700 __gen_field(values->RenderTargetResolveType, 6, 7) |
3701 __gen_field(values->PositionXYOffsetSelect, 3, 4) |
3702 __gen_field(values->_32PixelDispatchEnable, 2, 2) |
3703 __gen_field(values->_16PixelDispatchEnable, 1, 1) |
3704 __gen_field(values->_8PixelDispatchEnable, 0, 0) |
3705 0;
3706
3707 dw[7] =
3708 __gen_field(values->DispatchGRFStartRegisterForConstantSetupData0, 16, 22) |
3709 __gen_field(values->DispatchGRFStartRegisterForConstantSetupData1, 8, 14) |
3710 __gen_field(values->DispatchGRFStartRegisterForConstantSetupData2, 0, 6) |
3711 0;
3712
3713 uint64_t qw8 =
3714 __gen_offset(values->KernelStartPointer1, 6, 63) |
3715 0;
3716
3717 dw[8] = qw8;
3718 dw[9] = qw8 >> 32;
3719
3720 uint64_t qw10 =
3721 __gen_offset(values->KernelStartPointer2, 6, 63) |
3722 0;
3723
3724 dw[10] = qw10;
3725 dw[11] = qw10 >> 32;
3726
3727 }
3728
3729 #define GEN9_3DSTATE_PS_BLEND_length_bias 0x00000002
3730 #define GEN9_3DSTATE_PS_BLEND_header \
3731 .CommandType = 3, \
3732 .CommandSubType = 3, \
3733 ._3DCommandOpcode = 0, \
3734 ._3DCommandSubOpcode = 77, \
3735 .DwordLength = 0
3736
3737 #define GEN9_3DSTATE_PS_BLEND_length 0x00000002
3738
3739 struct GEN9_3DSTATE_PS_BLEND {
3740 uint32_t CommandType;
3741 uint32_t CommandSubType;
3742 uint32_t _3DCommandOpcode;
3743 uint32_t _3DCommandSubOpcode;
3744 uint32_t DwordLength;
3745 bool AlphaToCoverageEnable;
3746 bool HasWriteableRT;
3747 bool ColorBufferBlendEnable;
3748 uint32_t SourceAlphaBlendFactor;
3749 uint32_t DestinationAlphaBlendFactor;
3750 uint32_t SourceBlendFactor;
3751 uint32_t DestinationBlendFactor;
3752 bool AlphaTestEnable;
3753 bool IndependentAlphaBlendEnable;
3754 };
3755
3756 static inline void
3757 GEN9_3DSTATE_PS_BLEND_pack(__gen_user_data *data, void * restrict dst,
3758 const struct GEN9_3DSTATE_PS_BLEND * restrict values)
3759 {
3760 uint32_t *dw = (uint32_t * restrict) dst;
3761
3762 dw[0] =
3763 __gen_field(values->CommandType, 29, 31) |
3764 __gen_field(values->CommandSubType, 27, 28) |
3765 __gen_field(values->_3DCommandOpcode, 24, 26) |
3766 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3767 __gen_field(values->DwordLength, 0, 7) |
3768 0;
3769
3770 dw[1] =
3771 __gen_field(values->AlphaToCoverageEnable, 31, 31) |
3772 __gen_field(values->HasWriteableRT, 30, 30) |
3773 __gen_field(values->ColorBufferBlendEnable, 29, 29) |
3774 __gen_field(values->SourceAlphaBlendFactor, 24, 28) |
3775 __gen_field(values->DestinationAlphaBlendFactor, 19, 23) |
3776 __gen_field(values->SourceBlendFactor, 14, 18) |
3777 __gen_field(values->DestinationBlendFactor, 9, 13) |
3778 __gen_field(values->AlphaTestEnable, 8, 8) |
3779 __gen_field(values->IndependentAlphaBlendEnable, 7, 7) |
3780 0;
3781
3782 }
3783
3784 #define GEN9_3DSTATE_PS_EXTRA_length_bias 0x00000002
3785 #define GEN9_3DSTATE_PS_EXTRA_header \
3786 .CommandType = 3, \
3787 .CommandSubType = 3, \
3788 ._3DCommandOpcode = 0, \
3789 ._3DCommandSubOpcode = 79, \
3790 .DwordLength = 0
3791
3792 #define GEN9_3DSTATE_PS_EXTRA_length 0x00000002
3793
3794 struct GEN9_3DSTATE_PS_EXTRA {
3795 uint32_t CommandType;
3796 uint32_t CommandSubType;
3797 uint32_t _3DCommandOpcode;
3798 uint32_t _3DCommandSubOpcode;
3799 uint32_t DwordLength;
3800 bool PixelShaderValid;
3801 bool PixelShaderDoesnotwritetoRT;
3802 bool oMaskPresenttoRenderTarget;
3803 bool PixelShaderKillsPixel;
3804 #define PSCDEPTH_OFF 0
3805 #define PSCDEPTH_ON 1
3806 #define PSCDEPTH_ON_GE 2
3807 #define PSCDEPTH_ON_LE 3
3808 uint32_t PixelShaderComputedDepthMode;
3809 bool ForceComputedDepth;
3810 bool PixelShaderUsesSourceDepth;
3811 bool PixelShaderUsesSourceW;
3812 uint32_t Removed;
3813 bool AttributeEnable;
3814 bool PixelShaderDisablesAlphaToCoverage;
3815 bool PixelShaderIsPerSample;
3816 bool PixelShaderComputesStencil;
3817 bool PixelShaderPullsBary;
3818 bool PixelShaderHasUAV;
3819 #define ICMS_NONE 0
3820 #define ICMS_NORMAL 1
3821 #define ICMS_INNER_CONSERVATIVE 2
3822 #define ICMS_DEPTH_COVERAGE 3
3823 uint32_t InputCoverageMaskState;
3824 };
3825
3826 static inline void
3827 GEN9_3DSTATE_PS_EXTRA_pack(__gen_user_data *data, void * restrict dst,
3828 const struct GEN9_3DSTATE_PS_EXTRA * restrict values)
3829 {
3830 uint32_t *dw = (uint32_t * restrict) dst;
3831
3832 dw[0] =
3833 __gen_field(values->CommandType, 29, 31) |
3834 __gen_field(values->CommandSubType, 27, 28) |
3835 __gen_field(values->_3DCommandOpcode, 24, 26) |
3836 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3837 __gen_field(values->DwordLength, 0, 7) |
3838 0;
3839
3840 dw[1] =
3841 __gen_field(values->PixelShaderValid, 31, 31) |
3842 __gen_field(values->PixelShaderDoesnotwritetoRT, 30, 30) |
3843 __gen_field(values->oMaskPresenttoRenderTarget, 29, 29) |
3844 __gen_field(values->PixelShaderKillsPixel, 28, 28) |
3845 __gen_field(values->PixelShaderComputedDepthMode, 26, 27) |
3846 __gen_field(values->ForceComputedDepth, 25, 25) |
3847 __gen_field(values->PixelShaderUsesSourceDepth, 24, 24) |
3848 __gen_field(values->PixelShaderUsesSourceW, 23, 23) |
3849 __gen_field(values->Removed, 17, 17) |
3850 __gen_field(values->AttributeEnable, 8, 8) |
3851 __gen_field(values->PixelShaderDisablesAlphaToCoverage, 7, 7) |
3852 __gen_field(values->PixelShaderIsPerSample, 6, 6) |
3853 __gen_field(values->PixelShaderComputesStencil, 5, 5) |
3854 __gen_field(values->PixelShaderPullsBary, 3, 3) |
3855 __gen_field(values->PixelShaderHasUAV, 2, 2) |
3856 __gen_field(values->InputCoverageMaskState, 0, 1) |
3857 0;
3858
3859 }
3860
3861 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length_bias 0x00000002
3862 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS_header\
3863 .CommandType = 3, \
3864 .CommandSubType = 3, \
3865 ._3DCommandOpcode = 1, \
3866 ._3DCommandSubOpcode = 20, \
3867 .DwordLength = 0
3868
3869 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length 0x00000002
3870
3871 struct GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS {
3872 uint32_t CommandType;
3873 uint32_t CommandSubType;
3874 uint32_t _3DCommandOpcode;
3875 uint32_t _3DCommandSubOpcode;
3876 uint32_t DwordLength;
3877 uint32_t ConstantBufferOffset;
3878 uint32_t ConstantBufferSize;
3879 };
3880
3881 static inline void
3882 GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS_pack(__gen_user_data *data, void * restrict dst,
3883 const struct GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS * restrict values)
3884 {
3885 uint32_t *dw = (uint32_t * restrict) dst;
3886
3887 dw[0] =
3888 __gen_field(values->CommandType, 29, 31) |
3889 __gen_field(values->CommandSubType, 27, 28) |
3890 __gen_field(values->_3DCommandOpcode, 24, 26) |
3891 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3892 __gen_field(values->DwordLength, 0, 7) |
3893 0;
3894
3895 dw[1] =
3896 __gen_field(values->ConstantBufferOffset, 16, 20) |
3897 __gen_field(values->ConstantBufferSize, 0, 5) |
3898 0;
3899
3900 }
3901
3902 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length_bias 0x00000002
3903 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS_header\
3904 .CommandType = 3, \
3905 .CommandSubType = 3, \
3906 ._3DCommandOpcode = 1, \
3907 ._3DCommandSubOpcode = 21, \
3908 .DwordLength = 0
3909
3910 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length 0x00000002
3911
3912 struct GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS {
3913 uint32_t CommandType;
3914 uint32_t CommandSubType;
3915 uint32_t _3DCommandOpcode;
3916 uint32_t _3DCommandSubOpcode;
3917 uint32_t DwordLength;
3918 uint32_t ConstantBufferOffset;
3919 uint32_t ConstantBufferSize;
3920 };
3921
3922 static inline void
3923 GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS_pack(__gen_user_data *data, void * restrict dst,
3924 const struct GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS * restrict values)
3925 {
3926 uint32_t *dw = (uint32_t * restrict) dst;
3927
3928 dw[0] =
3929 __gen_field(values->CommandType, 29, 31) |
3930 __gen_field(values->CommandSubType, 27, 28) |
3931 __gen_field(values->_3DCommandOpcode, 24, 26) |
3932 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3933 __gen_field(values->DwordLength, 0, 7) |
3934 0;
3935
3936 dw[1] =
3937 __gen_field(values->ConstantBufferOffset, 16, 20) |
3938 __gen_field(values->ConstantBufferSize, 0, 5) |
3939 0;
3940
3941 }
3942
3943 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length_bias 0x00000002
3944 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS_header\
3945 .CommandType = 3, \
3946 .CommandSubType = 3, \
3947 ._3DCommandOpcode = 1, \
3948 ._3DCommandSubOpcode = 19, \
3949 .DwordLength = 0
3950
3951 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length 0x00000002
3952
3953 struct GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS {
3954 uint32_t CommandType;
3955 uint32_t CommandSubType;
3956 uint32_t _3DCommandOpcode;
3957 uint32_t _3DCommandSubOpcode;
3958 uint32_t DwordLength;
3959 uint32_t ConstantBufferOffset;
3960 uint32_t ConstantBufferSize;
3961 };
3962
3963 static inline void
3964 GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS_pack(__gen_user_data *data, void * restrict dst,
3965 const struct GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS * restrict values)
3966 {
3967 uint32_t *dw = (uint32_t * restrict) dst;
3968
3969 dw[0] =
3970 __gen_field(values->CommandType, 29, 31) |
3971 __gen_field(values->CommandSubType, 27, 28) |
3972 __gen_field(values->_3DCommandOpcode, 24, 26) |
3973 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3974 __gen_field(values->DwordLength, 0, 7) |
3975 0;
3976
3977 dw[1] =
3978 __gen_field(values->ConstantBufferOffset, 16, 20) |
3979 __gen_field(values->ConstantBufferSize, 0, 5) |
3980 0;
3981
3982 }
3983
3984 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length_bias 0x00000002
3985 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS_header\
3986 .CommandType = 3, \
3987 .CommandSubType = 3, \
3988 ._3DCommandOpcode = 1, \
3989 ._3DCommandSubOpcode = 22, \
3990 .DwordLength = 0
3991
3992 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length 0x00000002
3993
3994 struct GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS {
3995 uint32_t CommandType;
3996 uint32_t CommandSubType;
3997 uint32_t _3DCommandOpcode;
3998 uint32_t _3DCommandSubOpcode;
3999 uint32_t DwordLength;
4000 uint32_t ConstantBufferOffset;
4001 uint32_t ConstantBufferSize;
4002 };
4003
4004 static inline void
4005 GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS_pack(__gen_user_data *data, void * restrict dst,
4006 const struct GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS * restrict values)
4007 {
4008 uint32_t *dw = (uint32_t * restrict) dst;
4009
4010 dw[0] =
4011 __gen_field(values->CommandType, 29, 31) |
4012 __gen_field(values->CommandSubType, 27, 28) |
4013 __gen_field(values->_3DCommandOpcode, 24, 26) |
4014 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4015 __gen_field(values->DwordLength, 0, 7) |
4016 0;
4017
4018 dw[1] =
4019 __gen_field(values->ConstantBufferOffset, 16, 20) |
4020 __gen_field(values->ConstantBufferSize, 0, 5) |
4021 0;
4022
4023 }
4024
4025 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length_bias 0x00000002
4026 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS_header\
4027 .CommandType = 3, \
4028 .CommandSubType = 3, \
4029 ._3DCommandOpcode = 1, \
4030 ._3DCommandSubOpcode = 18, \
4031 .DwordLength = 0
4032
4033 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length 0x00000002
4034
4035 struct GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS {
4036 uint32_t CommandType;
4037 uint32_t CommandSubType;
4038 uint32_t _3DCommandOpcode;
4039 uint32_t _3DCommandSubOpcode;
4040 uint32_t DwordLength;
4041 uint32_t ConstantBufferOffset;
4042 uint32_t ConstantBufferSize;
4043 };
4044
4045 static inline void
4046 GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS_pack(__gen_user_data *data, void * restrict dst,
4047 const struct GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS * restrict values)
4048 {
4049 uint32_t *dw = (uint32_t * restrict) dst;
4050
4051 dw[0] =
4052 __gen_field(values->CommandType, 29, 31) |
4053 __gen_field(values->CommandSubType, 27, 28) |
4054 __gen_field(values->_3DCommandOpcode, 24, 26) |
4055 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4056 __gen_field(values->DwordLength, 0, 7) |
4057 0;
4058
4059 dw[1] =
4060 __gen_field(values->ConstantBufferOffset, 16, 20) |
4061 __gen_field(values->ConstantBufferSize, 0, 5) |
4062 0;
4063
4064 }
4065
4066 #define GEN9_3DSTATE_RASTER_length_bias 0x00000002
4067 #define GEN9_3DSTATE_RASTER_header \
4068 .CommandType = 3, \
4069 .CommandSubType = 3, \
4070 ._3DCommandOpcode = 0, \
4071 ._3DCommandSubOpcode = 80, \
4072 .DwordLength = 3
4073
4074 #define GEN9_3DSTATE_RASTER_length 0x00000005
4075
4076 struct GEN9_3DSTATE_RASTER {
4077 uint32_t CommandType;
4078 uint32_t CommandSubType;
4079 uint32_t _3DCommandOpcode;
4080 uint32_t _3DCommandSubOpcode;
4081 uint32_t DwordLength;
4082 bool ViewportZFarClipTestEnable;
4083 bool ConservativeRasterizationEnable;
4084 #define DX9OGL 0
4085 #define DX100 1
4086 #define DX101 2
4087 uint32_t APIMode;
4088 #define Clockwise 0
4089 #define CounterClockwise 1
4090 uint32_t FrontWinding;
4091 #define FSC_NUMRASTSAMPLES_0 0
4092 #define FSC_NUMRASTSAMPLES_1 1
4093 #define FSC_NUMRASTSAMPLES_2 2
4094 #define FSC_NUMRASTSAMPLES_4 3
4095 #define FSC_NUMRASTSAMPLES_8 4
4096 #define FSC_NUMRASTSAMPLES_16 5
4097 uint32_t ForcedSampleCount;
4098 #define CULLMODE_BOTH 0
4099 #define CULLMODE_NONE 1
4100 #define CULLMODE_FRONT 2
4101 #define CULLMODE_BACK 3
4102 uint32_t CullMode;
4103 #define Normal 0
4104 #define Force 1
4105 uint32_t ForceMultisampling;
4106 bool SmoothPointEnable;
4107 bool DXMultisampleRasterizationEnable;
4108 #define MSRASTMODE_OFF_PIXEL 0
4109 #define MSRASTMODE_OFF_PATTERN 1
4110 #define MSRASTMODE_ON_PIXEL 2
4111 #define MSRASTMODE_ON_PATTERN 3
4112 uint32_t DXMultisampleRasterizationMode;
4113 bool GlobalDepthOffsetEnableSolid;
4114 bool GlobalDepthOffsetEnableWireframe;
4115 bool GlobalDepthOffsetEnablePoint;
4116 #define RASTER_SOLID 0
4117 #define RASTER_WIREFRAME 1
4118 #define RASTER_POINT 2
4119 uint32_t FrontFaceFillMode;
4120 #define RASTER_SOLID 0
4121 #define RASTER_WIREFRAME 1
4122 #define RASTER_POINT 2
4123 uint32_t BackFaceFillMode;
4124 bool AntialiasingEnable;
4125 bool ScissorRectangleEnable;
4126 bool ViewportZNearClipTestEnable;
4127 float GlobalDepthOffsetConstant;
4128 float GlobalDepthOffsetScale;
4129 float GlobalDepthOffsetClamp;
4130 };
4131
4132 static inline void
4133 GEN9_3DSTATE_RASTER_pack(__gen_user_data *data, void * restrict dst,
4134 const struct GEN9_3DSTATE_RASTER * restrict values)
4135 {
4136 uint32_t *dw = (uint32_t * restrict) dst;
4137
4138 dw[0] =
4139 __gen_field(values->CommandType, 29, 31) |
4140 __gen_field(values->CommandSubType, 27, 28) |
4141 __gen_field(values->_3DCommandOpcode, 24, 26) |
4142 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4143 __gen_field(values->DwordLength, 0, 7) |
4144 0;
4145
4146 dw[1] =
4147 __gen_field(values->ViewportZFarClipTestEnable, 26, 26) |
4148 __gen_field(values->ConservativeRasterizationEnable, 24, 24) |
4149 __gen_field(values->APIMode, 22, 23) |
4150 __gen_field(values->FrontWinding, 21, 21) |
4151 __gen_field(values->ForcedSampleCount, 18, 20) |
4152 __gen_field(values->CullMode, 16, 17) |
4153 __gen_field(values->ForceMultisampling, 14, 14) |
4154 __gen_field(values->SmoothPointEnable, 13, 13) |
4155 __gen_field(values->DXMultisampleRasterizationEnable, 12, 12) |
4156 __gen_field(values->DXMultisampleRasterizationMode, 10, 11) |
4157 __gen_field(values->GlobalDepthOffsetEnableSolid, 9, 9) |
4158 __gen_field(values->GlobalDepthOffsetEnableWireframe, 8, 8) |
4159 __gen_field(values->GlobalDepthOffsetEnablePoint, 7, 7) |
4160 __gen_field(values->FrontFaceFillMode, 5, 6) |
4161 __gen_field(values->BackFaceFillMode, 3, 4) |
4162 __gen_field(values->AntialiasingEnable, 2, 2) |
4163 __gen_field(values->ScissorRectangleEnable, 1, 1) |
4164 __gen_field(values->ViewportZNearClipTestEnable, 0, 0) |
4165 0;
4166
4167 dw[2] =
4168 __gen_float(values->GlobalDepthOffsetConstant) |
4169 0;
4170
4171 dw[3] =
4172 __gen_float(values->GlobalDepthOffsetScale) |
4173 0;
4174
4175 dw[4] =
4176 __gen_float(values->GlobalDepthOffsetClamp) |
4177 0;
4178
4179 }
4180
4181 #define GEN9_3DSTATE_RS_CONSTANT_POINTER_length_bias 0x00000002
4182 #define GEN9_3DSTATE_RS_CONSTANT_POINTER_header \
4183 .CommandType = 3, \
4184 .CommandSubType = 3, \
4185 ._3DCommandOpcode = 0, \
4186 ._3DCommandSubOpcode = 84, \
4187 .DwordLength = 2
4188
4189 #define GEN9_3DSTATE_RS_CONSTANT_POINTER_length 0x00000004
4190
4191 struct GEN9_3DSTATE_RS_CONSTANT_POINTER {
4192 uint32_t CommandType;
4193 uint32_t CommandSubType;
4194 uint32_t _3DCommandOpcode;
4195 uint32_t _3DCommandSubOpcode;
4196 uint32_t DwordLength;
4197 #define VS 0
4198 #define PS 4
4199 uint32_t ShaderSelect;
4200 #define RS_STORE 0
4201 #define RS_LOAD 1
4202 uint32_t OperationLoadorStore;
4203 __gen_address_type GlobalConstantBufferAddress;
4204 __gen_address_type GlobalConstantBufferAddressHigh;
4205 };
4206
4207 static inline void
4208 GEN9_3DSTATE_RS_CONSTANT_POINTER_pack(__gen_user_data *data, void * restrict dst,
4209 const struct GEN9_3DSTATE_RS_CONSTANT_POINTER * restrict values)
4210 {
4211 uint32_t *dw = (uint32_t * restrict) dst;
4212
4213 dw[0] =
4214 __gen_field(values->CommandType, 29, 31) |
4215 __gen_field(values->CommandSubType, 27, 28) |
4216 __gen_field(values->_3DCommandOpcode, 24, 26) |
4217 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4218 __gen_field(values->DwordLength, 0, 7) |
4219 0;
4220
4221 dw[1] =
4222 __gen_field(values->ShaderSelect, 28, 30) |
4223 __gen_field(values->OperationLoadorStore, 12, 12) |
4224 0;
4225
4226 uint32_t dw2 =
4227 0;
4228
4229 dw[2] =
4230 __gen_combine_address(data, &dw[2], values->GlobalConstantBufferAddress, dw2);
4231
4232 uint32_t dw3 =
4233 0;
4234
4235 dw[3] =
4236 __gen_combine_address(data, &dw[3], values->GlobalConstantBufferAddressHigh, dw3);
4237
4238 }
4239
4240 #define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0_length_bias 0x00000002
4241 #define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0_header\
4242 .CommandType = 3, \
4243 .CommandSubType = 3, \
4244 ._3DCommandOpcode = 1, \
4245 ._3DCommandSubOpcode = 2
4246
4247 #define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0_length 0x00000000
4248
4249 #define GEN9_PALETTE_ENTRY_length 0x00000001
4250
4251 struct GEN9_PALETTE_ENTRY {
4252 uint32_t Alpha;
4253 uint32_t Red;
4254 uint32_t Green;
4255 uint32_t Blue;
4256 };
4257
4258 static inline void
4259 GEN9_PALETTE_ENTRY_pack(__gen_user_data *data, void * restrict dst,
4260 const struct GEN9_PALETTE_ENTRY * restrict values)
4261 {
4262 uint32_t *dw = (uint32_t * restrict) dst;
4263
4264 dw[0] =
4265 __gen_field(values->Alpha, 24, 31) |
4266 __gen_field(values->Red, 16, 23) |
4267 __gen_field(values->Green, 8, 15) |
4268 __gen_field(values->Blue, 0, 7) |
4269 0;
4270
4271 }
4272
4273 struct GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0 {
4274 uint32_t CommandType;
4275 uint32_t CommandSubType;
4276 uint32_t _3DCommandOpcode;
4277 uint32_t _3DCommandSubOpcode;
4278 uint32_t DwordLength;
4279 /* variable length fields follow */
4280 };
4281
4282 static inline void
4283 GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0_pack(__gen_user_data *data, void * restrict dst,
4284 const struct GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0 * restrict values)
4285 {
4286 uint32_t *dw = (uint32_t * restrict) dst;
4287
4288 dw[0] =
4289 __gen_field(values->CommandType, 29, 31) |
4290 __gen_field(values->CommandSubType, 27, 28) |
4291 __gen_field(values->_3DCommandOpcode, 24, 26) |
4292 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4293 __gen_field(values->DwordLength, 0, 7) |
4294 0;
4295
4296 /* variable length fields follow */
4297 }
4298
4299 #define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_length_bias 0x00000002
4300 #define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_header\
4301 .CommandType = 3, \
4302 .CommandSubType = 3, \
4303 ._3DCommandOpcode = 1, \
4304 ._3DCommandSubOpcode = 12
4305
4306 #define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_length 0x00000000
4307
4308 struct GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1 {
4309 uint32_t CommandType;
4310 uint32_t CommandSubType;
4311 uint32_t _3DCommandOpcode;
4312 uint32_t _3DCommandSubOpcode;
4313 uint32_t DwordLength;
4314 /* variable length fields follow */
4315 };
4316
4317 static inline void
4318 GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_pack(__gen_user_data *data, void * restrict dst,
4319 const struct GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1 * restrict values)
4320 {
4321 uint32_t *dw = (uint32_t * restrict) dst;
4322
4323 dw[0] =
4324 __gen_field(values->CommandType, 29, 31) |
4325 __gen_field(values->CommandSubType, 27, 28) |
4326 __gen_field(values->_3DCommandOpcode, 24, 26) |
4327 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4328 __gen_field(values->DwordLength, 0, 7) |
4329 0;
4330
4331 /* variable length fields follow */
4332 }
4333
4334 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS_length_bias 0x00000002
4335 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS_header\
4336 .CommandType = 3, \
4337 .CommandSubType = 3, \
4338 ._3DCommandOpcode = 0, \
4339 ._3DCommandSubOpcode = 45, \
4340 .DwordLength = 0
4341
4342 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS_length 0x00000002
4343
4344 struct GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS {
4345 uint32_t CommandType;
4346 uint32_t CommandSubType;
4347 uint32_t _3DCommandOpcode;
4348 uint32_t _3DCommandSubOpcode;
4349 uint32_t DwordLength;
4350 uint32_t PointertoDSSamplerState;
4351 };
4352
4353 static inline void
4354 GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
4355 const struct GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS * restrict values)
4356 {
4357 uint32_t *dw = (uint32_t * restrict) dst;
4358
4359 dw[0] =
4360 __gen_field(values->CommandType, 29, 31) |
4361 __gen_field(values->CommandSubType, 27, 28) |
4362 __gen_field(values->_3DCommandOpcode, 24, 26) |
4363 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4364 __gen_field(values->DwordLength, 0, 7) |
4365 0;
4366
4367 dw[1] =
4368 __gen_offset(values->PointertoDSSamplerState, 5, 31) |
4369 0;
4370
4371 }
4372
4373 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS_length_bias 0x00000002
4374 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS_header\
4375 .CommandType = 3, \
4376 .CommandSubType = 3, \
4377 ._3DCommandOpcode = 0, \
4378 ._3DCommandSubOpcode = 46, \
4379 .DwordLength = 0
4380
4381 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS_length 0x00000002
4382
4383 struct GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS {
4384 uint32_t CommandType;
4385 uint32_t CommandSubType;
4386 uint32_t _3DCommandOpcode;
4387 uint32_t _3DCommandSubOpcode;
4388 uint32_t DwordLength;
4389 uint32_t PointertoGSSamplerState;
4390 };
4391
4392 static inline void
4393 GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
4394 const struct GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS * restrict values)
4395 {
4396 uint32_t *dw = (uint32_t * restrict) dst;
4397
4398 dw[0] =
4399 __gen_field(values->CommandType, 29, 31) |
4400 __gen_field(values->CommandSubType, 27, 28) |
4401 __gen_field(values->_3DCommandOpcode, 24, 26) |
4402 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4403 __gen_field(values->DwordLength, 0, 7) |
4404 0;
4405
4406 dw[1] =
4407 __gen_offset(values->PointertoGSSamplerState, 5, 31) |
4408 0;
4409
4410 }
4411
4412 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS_length_bias 0x00000002
4413 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS_header\
4414 .CommandType = 3, \
4415 .CommandSubType = 3, \
4416 ._3DCommandOpcode = 0, \
4417 ._3DCommandSubOpcode = 44, \
4418 .DwordLength = 0
4419
4420 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS_length 0x00000002
4421
4422 struct GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS {
4423 uint32_t CommandType;
4424 uint32_t CommandSubType;
4425 uint32_t _3DCommandOpcode;
4426 uint32_t _3DCommandSubOpcode;
4427 uint32_t DwordLength;
4428 uint32_t PointertoHSSamplerState;
4429 };
4430
4431 static inline void
4432 GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
4433 const struct GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS * restrict values)
4434 {
4435 uint32_t *dw = (uint32_t * restrict) dst;
4436
4437 dw[0] =
4438 __gen_field(values->CommandType, 29, 31) |
4439 __gen_field(values->CommandSubType, 27, 28) |
4440 __gen_field(values->_3DCommandOpcode, 24, 26) |
4441 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4442 __gen_field(values->DwordLength, 0, 7) |
4443 0;
4444
4445 dw[1] =
4446 __gen_offset(values->PointertoHSSamplerState, 5, 31) |
4447 0;
4448
4449 }
4450
4451 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS_length_bias 0x00000002
4452 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS_header\
4453 .CommandType = 3, \
4454 .CommandSubType = 3, \
4455 ._3DCommandOpcode = 0, \
4456 ._3DCommandSubOpcode = 47, \
4457 .DwordLength = 0
4458
4459 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS_length 0x00000002
4460
4461 struct GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS {
4462 uint32_t CommandType;
4463 uint32_t CommandSubType;
4464 uint32_t _3DCommandOpcode;
4465 uint32_t _3DCommandSubOpcode;
4466 uint32_t DwordLength;
4467 uint32_t PointertoPSSamplerState;
4468 };
4469
4470 static inline void
4471 GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
4472 const struct GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS * restrict values)
4473 {
4474 uint32_t *dw = (uint32_t * restrict) dst;
4475
4476 dw[0] =
4477 __gen_field(values->CommandType, 29, 31) |
4478 __gen_field(values->CommandSubType, 27, 28) |
4479 __gen_field(values->_3DCommandOpcode, 24, 26) |
4480 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4481 __gen_field(values->DwordLength, 0, 7) |
4482 0;
4483
4484 dw[1] =
4485 __gen_offset(values->PointertoPSSamplerState, 5, 31) |
4486 0;
4487
4488 }
4489
4490 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS_length_bias 0x00000002
4491 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS_header\
4492 .CommandType = 3, \
4493 .CommandSubType = 3, \
4494 ._3DCommandOpcode = 0, \
4495 ._3DCommandSubOpcode = 43, \
4496 .DwordLength = 0
4497
4498 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS_length 0x00000002
4499
4500 struct GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS {
4501 uint32_t CommandType;
4502 uint32_t CommandSubType;
4503 uint32_t _3DCommandOpcode;
4504 uint32_t _3DCommandSubOpcode;
4505 uint32_t DwordLength;
4506 uint32_t PointertoVSSamplerState;
4507 };
4508
4509 static inline void
4510 GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
4511 const struct GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS * restrict values)
4512 {
4513 uint32_t *dw = (uint32_t * restrict) dst;
4514
4515 dw[0] =
4516 __gen_field(values->CommandType, 29, 31) |
4517 __gen_field(values->CommandSubType, 27, 28) |
4518 __gen_field(values->_3DCommandOpcode, 24, 26) |
4519 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4520 __gen_field(values->DwordLength, 0, 7) |
4521 0;
4522
4523 dw[1] =
4524 __gen_offset(values->PointertoVSSamplerState, 5, 31) |
4525 0;
4526
4527 }
4528
4529 #define GEN9_3DSTATE_SAMPLE_MASK_length_bias 0x00000002
4530 #define GEN9_3DSTATE_SAMPLE_MASK_header \
4531 .CommandType = 3, \
4532 .CommandSubType = 3, \
4533 ._3DCommandOpcode = 0, \
4534 ._3DCommandSubOpcode = 24, \
4535 .DwordLength = 0
4536
4537 #define GEN9_3DSTATE_SAMPLE_MASK_length 0x00000002
4538
4539 struct GEN9_3DSTATE_SAMPLE_MASK {
4540 uint32_t CommandType;
4541 uint32_t CommandSubType;
4542 uint32_t _3DCommandOpcode;
4543 uint32_t _3DCommandSubOpcode;
4544 uint32_t DwordLength;
4545 uint32_t SampleMask;
4546 };
4547
4548 static inline void
4549 GEN9_3DSTATE_SAMPLE_MASK_pack(__gen_user_data *data, void * restrict dst,
4550 const struct GEN9_3DSTATE_SAMPLE_MASK * restrict values)
4551 {
4552 uint32_t *dw = (uint32_t * restrict) dst;
4553
4554 dw[0] =
4555 __gen_field(values->CommandType, 29, 31) |
4556 __gen_field(values->CommandSubType, 27, 28) |
4557 __gen_field(values->_3DCommandOpcode, 24, 26) |
4558 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4559 __gen_field(values->DwordLength, 0, 7) |
4560 0;
4561
4562 dw[1] =
4563 __gen_field(values->SampleMask, 0, 15) |
4564 0;
4565
4566 }
4567
4568 #define GEN9_3DSTATE_SAMPLE_PATTERN_length_bias 0x00000002
4569 #define GEN9_3DSTATE_SAMPLE_PATTERN_header \
4570 .CommandType = 3, \
4571 .CommandSubType = 3, \
4572 ._3DCommandOpcode = 1, \
4573 ._3DCommandSubOpcode = 28, \
4574 .DwordLength = 7
4575
4576 #define GEN9_3DSTATE_SAMPLE_PATTERN_length 0x00000009
4577
4578 struct GEN9_3DSTATE_SAMPLE_PATTERN {
4579 uint32_t CommandType;
4580 uint32_t CommandSubType;
4581 uint32_t _3DCommandOpcode;
4582 uint32_t _3DCommandSubOpcode;
4583 uint32_t DwordLength;
4584 float _16xSample3XOffset;
4585 float _16xSample3YOffset;
4586 float _16xSample2XOffset;
4587 float _16xSample2YOffset;
4588 float _16xSample1XOffset;
4589 float _16xSample1YOffset;
4590 float _16xSample0XOffset;
4591 float _16xSample0YOffset;
4592 float _16xSample7XOffset;
4593 float _16xSample7YOffset;
4594 float _16xSample6XOffset;
4595 float _16xSample6YOffset;
4596 float _16xSample5XOffset;
4597 float _16xSample5YOffset;
4598 float _16xSample4XOffset;
4599 float _16xSample4YOffset;
4600 float _16xSample11XOffset;
4601 float _16xSample11YOffset;
4602 float _16xSample10XOffset;
4603 float _16xSample10YOffset;
4604 float _16xSample9XOffset;
4605 float _16xSample9YOffset;
4606 float _16xSample8XOffset;
4607 float _16xSample8YOffset;
4608 float _16xSample15XOffset;
4609 float _16xSample15YOffset;
4610 float _16xSample14XOffset;
4611 float _16xSample14YOffset;
4612 float _16xSample13XOffset;
4613 float _16xSample13YOffset;
4614 float _16xSample12XOffset;
4615 float _16xSample12YOffset;
4616 float _8xSample7XOffset;
4617 float _8xSample7YOffset;
4618 float _8xSample6XOffset;
4619 float _8xSample6YOffset;
4620 float _8xSample5XOffset;
4621 float _8xSample5YOffset;
4622 float _8xSample4XOffset;
4623 float _8xSample4YOffset;
4624 float _8xSample3XOffset;
4625 float _8xSample3YOffset;
4626 float _8xSample2XOffset;
4627 float _8xSample2YOffset;
4628 float _8xSample1XOffset;
4629 float _8xSample1YOffset;
4630 float _8xSample0XOffset;
4631 float _8xSample0YOffset;
4632 float _4xSample3XOffset;
4633 float _4xSample3YOffset;
4634 float _4xSample2XOffset;
4635 float _4xSample2YOffset;
4636 float _4xSample1XOffset;
4637 float _4xSample1YOffset;
4638 float _4xSample0XOffset;
4639 float _4xSample0YOffset;
4640 float _1xSample0XOffset;
4641 float _1xSample0YOffset;
4642 float _2xSample1XOffset;
4643 float _2xSample1YOffset;
4644 float _2xSample0XOffset;
4645 float _2xSample0YOffset;
4646 };
4647
4648 static inline void
4649 GEN9_3DSTATE_SAMPLE_PATTERN_pack(__gen_user_data *data, void * restrict dst,
4650 const struct GEN9_3DSTATE_SAMPLE_PATTERN * restrict values)
4651 {
4652 uint32_t *dw = (uint32_t * restrict) dst;
4653
4654 dw[0] =
4655 __gen_field(values->CommandType, 29, 31) |
4656 __gen_field(values->CommandSubType, 27, 28) |
4657 __gen_field(values->_3DCommandOpcode, 24, 26) |
4658 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4659 __gen_field(values->DwordLength, 0, 7) |
4660 0;
4661
4662 dw[1] =
4663 __gen_field(values->_16xSample3XOffset * (1 << 4), 28, 31) |
4664 __gen_field(values->_16xSample3YOffset * (1 << 4), 24, 27) |
4665 __gen_field(values->_16xSample2XOffset * (1 << 4), 20, 23) |
4666 __gen_field(values->_16xSample2YOffset * (1 << 4), 16, 19) |
4667 __gen_field(values->_16xSample1XOffset * (1 << 4), 12, 15) |
4668 __gen_field(values->_16xSample1YOffset * (1 << 4), 8, 11) |
4669 __gen_field(values->_16xSample0XOffset * (1 << 4), 4, 7) |
4670 __gen_field(values->_16xSample0YOffset * (1 << 4), 0, 3) |
4671 0;
4672
4673 dw[2] =
4674 __gen_field(values->_16xSample7XOffset * (1 << 4), 28, 31) |
4675 __gen_field(values->_16xSample7YOffset * (1 << 4), 24, 27) |
4676 __gen_field(values->_16xSample6XOffset * (1 << 4), 20, 23) |
4677 __gen_field(values->_16xSample6YOffset * (1 << 4), 16, 19) |
4678 __gen_field(values->_16xSample5XOffset * (1 << 4), 12, 15) |
4679 __gen_field(values->_16xSample5YOffset * (1 << 4), 8, 11) |
4680 __gen_field(values->_16xSample4XOffset * (1 << 4), 4, 7) |
4681 __gen_field(values->_16xSample4YOffset * (1 << 4), 0, 3) |
4682 0;
4683
4684 dw[3] =
4685 __gen_field(values->_16xSample11XOffset * (1 << 4), 28, 31) |
4686 __gen_field(values->_16xSample11YOffset * (1 << 4), 24, 27) |
4687 __gen_field(values->_16xSample10XOffset * (1 << 4), 20, 23) |
4688 __gen_field(values->_16xSample10YOffset * (1 << 4), 16, 19) |
4689 __gen_field(values->_16xSample9XOffset * (1 << 4), 12, 15) |
4690 __gen_field(values->_16xSample9YOffset * (1 << 4), 8, 11) |
4691 __gen_field(values->_16xSample8XOffset * (1 << 4), 4, 7) |
4692 __gen_field(values->_16xSample8YOffset * (1 << 4), 0, 3) |
4693 0;
4694
4695 dw[4] =
4696 __gen_field(values->_16xSample15XOffset * (1 << 4), 28, 31) |
4697 __gen_field(values->_16xSample15YOffset * (1 << 4), 24, 27) |
4698 __gen_field(values->_16xSample14XOffset * (1 << 4), 20, 23) |
4699 __gen_field(values->_16xSample14YOffset * (1 << 4), 16, 19) |
4700 __gen_field(values->_16xSample13XOffset * (1 << 4), 12, 15) |
4701 __gen_field(values->_16xSample13YOffset * (1 << 4), 8, 11) |
4702 __gen_field(values->_16xSample12XOffset * (1 << 4), 4, 7) |
4703 __gen_field(values->_16xSample12YOffset * (1 << 4), 0, 3) |
4704 0;
4705
4706 dw[5] =
4707 __gen_field(values->_8xSample7XOffset * (1 << 4), 28, 31) |
4708 __gen_field(values->_8xSample7YOffset * (1 << 4), 24, 27) |
4709 __gen_field(values->_8xSample6XOffset * (1 << 4), 20, 23) |
4710 __gen_field(values->_8xSample6YOffset * (1 << 4), 16, 19) |
4711 __gen_field(values->_8xSample5XOffset * (1 << 4), 12, 15) |
4712 __gen_field(values->_8xSample5YOffset * (1 << 4), 8, 11) |
4713 __gen_field(values->_8xSample4XOffset * (1 << 4), 4, 7) |
4714 __gen_field(values->_8xSample4YOffset * (1 << 4), 0, 3) |
4715 0;
4716
4717 dw[6] =
4718 __gen_field(values->_8xSample3XOffset * (1 << 4), 28, 31) |
4719 __gen_field(values->_8xSample3YOffset * (1 << 4), 24, 27) |
4720 __gen_field(values->_8xSample2XOffset * (1 << 4), 20, 23) |
4721 __gen_field(values->_8xSample2YOffset * (1 << 4), 16, 19) |
4722 __gen_field(values->_8xSample1XOffset * (1 << 4), 12, 15) |
4723 __gen_field(values->_8xSample1YOffset * (1 << 4), 8, 11) |
4724 __gen_field(values->_8xSample0XOffset * (1 << 4), 4, 7) |
4725 __gen_field(values->_8xSample0YOffset * (1 << 4), 0, 3) |
4726 0;
4727
4728 dw[7] =
4729 __gen_field(values->_4xSample3XOffset * (1 << 4), 28, 31) |
4730 __gen_field(values->_4xSample3YOffset * (1 << 4), 24, 27) |
4731 __gen_field(values->_4xSample2XOffset * (1 << 4), 20, 23) |
4732 __gen_field(values->_4xSample2YOffset * (1 << 4), 16, 19) |
4733 __gen_field(values->_4xSample1XOffset * (1 << 4), 12, 15) |
4734 __gen_field(values->_4xSample1YOffset * (1 << 4), 8, 11) |
4735 __gen_field(values->_4xSample0XOffset * (1 << 4), 4, 7) |
4736 __gen_field(values->_4xSample0YOffset * (1 << 4), 0, 3) |
4737 0;
4738
4739 dw[8] =
4740 __gen_field(values->_1xSample0XOffset * (1 << 4), 20, 23) |
4741 __gen_field(values->_1xSample0YOffset * (1 << 4), 16, 19) |
4742 __gen_field(values->_2xSample1XOffset * (1 << 4), 12, 15) |
4743 __gen_field(values->_2xSample1YOffset * (1 << 4), 8, 11) |
4744 __gen_field(values->_2xSample0XOffset * (1 << 4), 4, 7) |
4745 __gen_field(values->_2xSample0YOffset * (1 << 4), 0, 3) |
4746 0;
4747
4748 }
4749
4750 #define GEN9_3DSTATE_SBE_length_bias 0x00000002
4751 #define GEN9_3DSTATE_SBE_header \
4752 .CommandType = 3, \
4753 .CommandSubType = 3, \
4754 ._3DCommandOpcode = 0, \
4755 ._3DCommandSubOpcode = 31, \
4756 .DwordLength = 4
4757
4758 #define GEN9_3DSTATE_SBE_length 0x00000006
4759
4760 struct GEN9_3DSTATE_SBE {
4761 uint32_t CommandType;
4762 uint32_t CommandSubType;
4763 uint32_t _3DCommandOpcode;
4764 uint32_t _3DCommandSubOpcode;
4765 uint32_t DwordLength;
4766 bool ForceVertexURBEntryReadLength;
4767 bool ForceVertexURBEntryReadOffset;
4768 uint32_t NumberofSFOutputAttributes;
4769 bool AttributeSwizzleEnable;
4770 #define UPPERLEFT 0
4771 #define LOWERLEFT 1
4772 uint32_t PointSpriteTextureCoordinateOrigin;
4773 bool PrimitiveIDOverrideComponentW;
4774 bool PrimitiveIDOverrideComponentZ;
4775 bool PrimitiveIDOverrideComponentY;
4776 bool PrimitiveIDOverrideComponentX;
4777 uint32_t VertexURBEntryReadLength;
4778 uint32_t VertexURBEntryReadOffset;
4779 uint32_t PrimitiveIDOverrideAttributeSelect;
4780 uint32_t PointSpriteTextureCoordinateEnable;
4781 uint32_t ConstantInterpolationEnable;
4782 uint32_t Attribute15ActiveComponentFormat;
4783 uint32_t Attribute14ActiveComponentFormat;
4784 uint32_t Attribute13ActiveComponentFormat;
4785 uint32_t Attribute12ActiveComponentFormat;
4786 uint32_t Attribute11ActiveComponentFormat;
4787 uint32_t Attribute10ActiveComponentFormat;
4788 uint32_t Attribute9ActiveComponentFormat;
4789 uint32_t Attribute8ActiveComponentFormat;
4790 uint32_t Attribute7ActiveComponentFormat;
4791 uint32_t Attribute6ActiveComponentFormat;
4792 uint32_t Attribute5ActiveComponentFormat;
4793 uint32_t Attribute4ActiveComponentFormat;
4794 uint32_t Attribute3ActiveComponentFormat;
4795 uint32_t Attribute2ActiveComponentFormat;
4796 uint32_t Attribute1ActiveComponentFormat;
4797 uint32_t Attribute0ActiveComponentFormat;
4798 uint32_t Attribute31ActiveComponentFormat;
4799 uint32_t Attribute30ActiveComponentFormat;
4800 uint32_t Attribute29ActiveComponentFormat;
4801 uint32_t Attribute28ActiveComponentFormat;
4802 uint32_t Attribute27ActiveComponentFormat;
4803 uint32_t Attribute26ActiveComponentFormat;
4804 uint32_t Attribute25ActiveComponentFormat;
4805 uint32_t Attribute24ActiveComponentFormat;
4806 uint32_t Attribute23ActiveComponentFormat;
4807 uint32_t Attribute22ActiveComponentFormat;
4808 uint32_t Attribute21ActiveComponentFormat;
4809 uint32_t Attribute20ActiveComponentFormat;
4810 uint32_t Attribute19ActiveComponentFormat;
4811 uint32_t Attribute18ActiveComponentFormat;
4812 uint32_t Attribute17ActiveComponentFormat;
4813 uint32_t Attribute16ActiveComponentFormat;
4814 };
4815
4816 static inline void
4817 GEN9_3DSTATE_SBE_pack(__gen_user_data *data, void * restrict dst,
4818 const struct GEN9_3DSTATE_SBE * restrict values)
4819 {
4820 uint32_t *dw = (uint32_t * restrict) dst;
4821
4822 dw[0] =
4823 __gen_field(values->CommandType, 29, 31) |
4824 __gen_field(values->CommandSubType, 27, 28) |
4825 __gen_field(values->_3DCommandOpcode, 24, 26) |
4826 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4827 __gen_field(values->DwordLength, 0, 7) |
4828 0;
4829
4830 dw[1] =
4831 __gen_field(values->ForceVertexURBEntryReadLength, 29, 29) |
4832 __gen_field(values->ForceVertexURBEntryReadOffset, 28, 28) |
4833 __gen_field(values->NumberofSFOutputAttributes, 22, 27) |
4834 __gen_field(values->AttributeSwizzleEnable, 21, 21) |
4835 __gen_field(values->PointSpriteTextureCoordinateOrigin, 20, 20) |
4836 __gen_field(values->PrimitiveIDOverrideComponentW, 19, 19) |
4837 __gen_field(values->PrimitiveIDOverrideComponentZ, 18, 18) |
4838 __gen_field(values->PrimitiveIDOverrideComponentY, 17, 17) |
4839 __gen_field(values->PrimitiveIDOverrideComponentX, 16, 16) |
4840 __gen_field(values->VertexURBEntryReadLength, 11, 15) |
4841 __gen_field(values->VertexURBEntryReadOffset, 5, 10) |
4842 __gen_field(values->PrimitiveIDOverrideAttributeSelect, 0, 4) |
4843 0;
4844
4845 dw[2] =
4846 __gen_field(values->PointSpriteTextureCoordinateEnable, 0, 31) |
4847 0;
4848
4849 dw[3] =
4850 __gen_field(values->ConstantInterpolationEnable, 0, 31) |
4851 0;
4852
4853 dw[4] =
4854 __gen_field(values->Attribute15ActiveComponentFormat, 30, 31) |
4855 __gen_field(values->Attribute14ActiveComponentFormat, 28, 29) |
4856 __gen_field(values->Attribute13ActiveComponentFormat, 26, 27) |
4857 __gen_field(values->Attribute12ActiveComponentFormat, 24, 25) |
4858 __gen_field(values->Attribute11ActiveComponentFormat, 22, 23) |
4859 __gen_field(values->Attribute10ActiveComponentFormat, 20, 21) |
4860 __gen_field(values->Attribute9ActiveComponentFormat, 18, 19) |
4861 __gen_field(values->Attribute8ActiveComponentFormat, 16, 17) |
4862 __gen_field(values->Attribute7ActiveComponentFormat, 14, 15) |
4863 __gen_field(values->Attribute6ActiveComponentFormat, 12, 13) |
4864 __gen_field(values->Attribute5ActiveComponentFormat, 10, 11) |
4865 __gen_field(values->Attribute4ActiveComponentFormat, 8, 9) |
4866 __gen_field(values->Attribute3ActiveComponentFormat, 6, 7) |
4867 __gen_field(values->Attribute2ActiveComponentFormat, 4, 5) |
4868 __gen_field(values->Attribute1ActiveComponentFormat, 2, 3) |
4869 __gen_field(values->Attribute0ActiveComponentFormat, 0, 1) |
4870 0;
4871
4872 dw[5] =
4873 __gen_field(values->Attribute31ActiveComponentFormat, 30, 31) |
4874 __gen_field(values->Attribute30ActiveComponentFormat, 28, 29) |
4875 __gen_field(values->Attribute29ActiveComponentFormat, 26, 27) |
4876 __gen_field(values->Attribute28ActiveComponentFormat, 24, 25) |
4877 __gen_field(values->Attribute27ActiveComponentFormat, 22, 23) |
4878 __gen_field(values->Attribute26ActiveComponentFormat, 20, 21) |
4879 __gen_field(values->Attribute25ActiveComponentFormat, 18, 19) |
4880 __gen_field(values->Attribute24ActiveComponentFormat, 16, 17) |
4881 __gen_field(values->Attribute23ActiveComponentFormat, 14, 15) |
4882 __gen_field(values->Attribute22ActiveComponentFormat, 12, 13) |
4883 __gen_field(values->Attribute21ActiveComponentFormat, 10, 11) |
4884 __gen_field(values->Attribute20ActiveComponentFormat, 8, 9) |
4885 __gen_field(values->Attribute19ActiveComponentFormat, 6, 7) |
4886 __gen_field(values->Attribute18ActiveComponentFormat, 4, 5) |
4887 __gen_field(values->Attribute17ActiveComponentFormat, 2, 3) |
4888 __gen_field(values->Attribute16ActiveComponentFormat, 0, 1) |
4889 0;
4890
4891 }
4892
4893 #define GEN9_3DSTATE_SBE_SWIZ_length_bias 0x00000002
4894 #define GEN9_3DSTATE_SBE_SWIZ_header \
4895 .CommandType = 3, \
4896 .CommandSubType = 3, \
4897 ._3DCommandOpcode = 0, \
4898 ._3DCommandSubOpcode = 81, \
4899 .DwordLength = 9
4900
4901 #define GEN9_3DSTATE_SBE_SWIZ_length 0x0000000b
4902
4903 #define GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_length 0x00000001
4904
4905 struct GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL {
4906 bool ComponentOverrideW;
4907 bool ComponentOverrideZ;
4908 bool ComponentOverrideY;
4909 bool ComponentOverrideX;
4910 uint32_t SwizzleControlMode;
4911 #define CONST_0000 0
4912 #define CONST_0001_FLOAT 1
4913 #define CONST_1111_FLOAT 2
4914 #define PRIM_ID 3
4915 uint32_t ConstantSource;
4916 #define INPUTATTR 0
4917 #define INPUTATTR_FACING 1
4918 #define INPUTATTR_W 2
4919 #define INPUTATTR_FACING_W 3
4920 uint32_t SwizzleSelect;
4921 uint32_t SourceAttribute;
4922 };
4923
4924 static inline void
4925 GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(__gen_user_data *data, void * restrict dst,
4926 const struct GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL * restrict values)
4927 {
4928 uint32_t *dw = (uint32_t * restrict) dst;
4929
4930 dw[0] =
4931 __gen_field(values->ComponentOverrideW, 15, 15) |
4932 __gen_field(values->ComponentOverrideZ, 14, 14) |
4933 __gen_field(values->ComponentOverrideY, 13, 13) |
4934 __gen_field(values->ComponentOverrideX, 12, 12) |
4935 __gen_field(values->SwizzleControlMode, 11, 11) |
4936 __gen_field(values->ConstantSource, 9, 10) |
4937 __gen_field(values->SwizzleSelect, 6, 7) |
4938 __gen_field(values->SourceAttribute, 0, 4) |
4939 0;
4940
4941 }
4942
4943 struct GEN9_3DSTATE_SBE_SWIZ {
4944 uint32_t CommandType;
4945 uint32_t CommandSubType;
4946 uint32_t _3DCommandOpcode;
4947 uint32_t _3DCommandSubOpcode;
4948 uint32_t DwordLength;
4949 struct GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL Attribute[16];
4950 uint32_t AttributeWrapShortestEnables[16];
4951 };
4952
4953 static inline void
4954 GEN9_3DSTATE_SBE_SWIZ_pack(__gen_user_data *data, void * restrict dst,
4955 const struct GEN9_3DSTATE_SBE_SWIZ * restrict values)
4956 {
4957 uint32_t *dw = (uint32_t * restrict) dst;
4958
4959 dw[0] =
4960 __gen_field(values->CommandType, 29, 31) |
4961 __gen_field(values->CommandSubType, 27, 28) |
4962 __gen_field(values->_3DCommandOpcode, 24, 26) |
4963 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4964 __gen_field(values->DwordLength, 0, 7) |
4965 0;
4966
4967 for (uint32_t i = 0, j = 1; i < 16; i += 2, j++) {
4968 uint32_t dw_Attribute0;
4969 GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &dw_Attribute0, &values->Attribute[i + 0]);
4970 uint32_t dw_Attribute1;
4971 GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &dw_Attribute1, &values->Attribute[i + 1]);
4972 dw[j] =
4973 __gen_field(dw_Attribute0, 0, 15) |
4974 __gen_field(dw_Attribute1, 16, 31) |
4975 0;
4976 }
4977
4978 for (uint32_t i = 0, j = 9; i < 16; i += 8, j++) {
4979 dw[j] =
4980 __gen_field(values->AttributeWrapShortestEnables[i + 0], 0, 3) |
4981 __gen_field(values->AttributeWrapShortestEnables[i + 1], 4, 7) |
4982 __gen_field(values->AttributeWrapShortestEnables[i + 2], 8, 11) |
4983 __gen_field(values->AttributeWrapShortestEnables[i + 3], 12, 15) |
4984 __gen_field(values->AttributeWrapShortestEnables[i + 4], 16, 19) |
4985 __gen_field(values->AttributeWrapShortestEnables[i + 5], 20, 23) |
4986 __gen_field(values->AttributeWrapShortestEnables[i + 6], 24, 27) |
4987 __gen_field(values->AttributeWrapShortestEnables[i + 7], 28, 31) |
4988 0;
4989 }
4990
4991 }
4992
4993 #define GEN9_3DSTATE_SCISSOR_STATE_POINTERS_length_bias 0x00000002
4994 #define GEN9_3DSTATE_SCISSOR_STATE_POINTERS_header\
4995 .CommandType = 3, \
4996 .CommandSubType = 3, \
4997 ._3DCommandOpcode = 0, \
4998 ._3DCommandSubOpcode = 15, \
4999 .DwordLength = 0
5000
5001 #define GEN9_3DSTATE_SCISSOR_STATE_POINTERS_length 0x00000002
5002
5003 struct GEN9_3DSTATE_SCISSOR_STATE_POINTERS {
5004 uint32_t CommandType;
5005 uint32_t CommandSubType;
5006 uint32_t _3DCommandOpcode;
5007 uint32_t _3DCommandSubOpcode;
5008 uint32_t DwordLength;
5009 uint32_t ScissorRectPointer;
5010 };
5011
5012 static inline void
5013 GEN9_3DSTATE_SCISSOR_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
5014 const struct GEN9_3DSTATE_SCISSOR_STATE_POINTERS * restrict values)
5015 {
5016 uint32_t *dw = (uint32_t * restrict) dst;
5017
5018 dw[0] =
5019 __gen_field(values->CommandType, 29, 31) |
5020 __gen_field(values->CommandSubType, 27, 28) |
5021 __gen_field(values->_3DCommandOpcode, 24, 26) |
5022 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5023 __gen_field(values->DwordLength, 0, 7) |
5024 0;
5025
5026 dw[1] =
5027 __gen_offset(values->ScissorRectPointer, 5, 31) |
5028 0;
5029
5030 }
5031
5032 #define GEN9_3DSTATE_SF_length_bias 0x00000002
5033 #define GEN9_3DSTATE_SF_header \
5034 .CommandType = 3, \
5035 .CommandSubType = 3, \
5036 ._3DCommandOpcode = 0, \
5037 ._3DCommandSubOpcode = 19, \
5038 .DwordLength = 2
5039
5040 #define GEN9_3DSTATE_SF_length 0x00000004
5041
5042 struct GEN9_3DSTATE_SF {
5043 uint32_t CommandType;
5044 uint32_t CommandSubType;
5045 uint32_t _3DCommandOpcode;
5046 uint32_t _3DCommandSubOpcode;
5047 uint32_t DwordLength;
5048 float LineWidth;
5049 bool LegacyGlobalDepthBiasEnable;
5050 bool StatisticsEnable;
5051 bool ViewportTransformEnable;
5052 #define _05pixels 0
5053 #define _10pixels 1
5054 #define _20pixels 2
5055 #define _40pixels 3
5056 uint32_t LineEndCapAntialiasingRegionWidth;
5057 bool LastPixelEnable;
5058 uint32_t TriangleStripListProvokingVertexSelect;
5059 uint32_t LineStripListProvokingVertexSelect;
5060 uint32_t TriangleFanProvokingVertexSelect;
5061 #define AALINEDISTANCE_TRUE 1
5062 uint32_t AALineDistanceMode;
5063 bool SmoothPointEnable;
5064 uint32_t VertexSubPixelPrecisionSelect;
5065 #define Vertex 0
5066 #define State 1
5067 uint32_t PointWidthSource;
5068 float PointWidth;
5069 };
5070
5071 static inline void
5072 GEN9_3DSTATE_SF_pack(__gen_user_data *data, void * restrict dst,
5073 const struct GEN9_3DSTATE_SF * restrict values)
5074 {
5075 uint32_t *dw = (uint32_t * restrict) dst;
5076
5077 dw[0] =
5078 __gen_field(values->CommandType, 29, 31) |
5079 __gen_field(values->CommandSubType, 27, 28) |
5080 __gen_field(values->_3DCommandOpcode, 24, 26) |
5081 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5082 __gen_field(values->DwordLength, 0, 7) |
5083 0;
5084
5085 dw[1] =
5086 __gen_field(values->LineWidth * (1 << 7), 12, 29) |
5087 __gen_field(values->LegacyGlobalDepthBiasEnable, 11, 11) |
5088 __gen_field(values->StatisticsEnable, 10, 10) |
5089 __gen_field(values->ViewportTransformEnable, 1, 1) |
5090 0;
5091
5092 dw[2] =
5093 __gen_field(values->LineEndCapAntialiasingRegionWidth, 16, 17) |
5094 0;
5095
5096 dw[3] =
5097 __gen_field(values->LastPixelEnable, 31, 31) |
5098 __gen_field(values->TriangleStripListProvokingVertexSelect, 29, 30) |
5099 __gen_field(values->LineStripListProvokingVertexSelect, 27, 28) |
5100 __gen_field(values->TriangleFanProvokingVertexSelect, 25, 26) |
5101 __gen_field(values->AALineDistanceMode, 14, 14) |
5102 __gen_field(values->SmoothPointEnable, 13, 13) |
5103 __gen_field(values->VertexSubPixelPrecisionSelect, 12, 12) |
5104 __gen_field(values->PointWidthSource, 11, 11) |
5105 __gen_field(values->PointWidth * (1 << 3), 0, 10) |
5106 0;
5107
5108 }
5109
5110 #define GEN9_3DSTATE_SO_BUFFER_length_bias 0x00000002
5111 #define GEN9_3DSTATE_SO_BUFFER_header \
5112 .CommandType = 3, \
5113 .CommandSubType = 3, \
5114 ._3DCommandOpcode = 1, \
5115 ._3DCommandSubOpcode = 24, \
5116 .DwordLength = 6
5117
5118 #define GEN9_3DSTATE_SO_BUFFER_length 0x00000008
5119
5120 struct GEN9_3DSTATE_SO_BUFFER {
5121 uint32_t CommandType;
5122 uint32_t CommandSubType;
5123 uint32_t _3DCommandOpcode;
5124 uint32_t _3DCommandSubOpcode;
5125 uint32_t DwordLength;
5126 bool SOBufferEnable;
5127 uint32_t SOBufferIndex;
5128 struct GEN9_MEMORY_OBJECT_CONTROL_STATE SOBufferObjectControlState;
5129 bool StreamOffsetWriteEnable;
5130 bool StreamOutputBufferOffsetAddressEnable;
5131 __gen_address_type SurfaceBaseAddress;
5132 uint32_t SurfaceSize;
5133 __gen_address_type StreamOutputBufferOffsetAddress;
5134 uint32_t StreamOffset;
5135 };
5136
5137 static inline void
5138 GEN9_3DSTATE_SO_BUFFER_pack(__gen_user_data *data, void * restrict dst,
5139 const struct GEN9_3DSTATE_SO_BUFFER * restrict values)
5140 {
5141 uint32_t *dw = (uint32_t * restrict) dst;
5142
5143 dw[0] =
5144 __gen_field(values->CommandType, 29, 31) |
5145 __gen_field(values->CommandSubType, 27, 28) |
5146 __gen_field(values->_3DCommandOpcode, 24, 26) |
5147 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5148 __gen_field(values->DwordLength, 0, 7) |
5149 0;
5150
5151 uint32_t dw_SOBufferObjectControlState;
5152 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SOBufferObjectControlState, &values->SOBufferObjectControlState);
5153 dw[1] =
5154 __gen_field(values->SOBufferEnable, 31, 31) |
5155 __gen_field(values->SOBufferIndex, 29, 30) |
5156 __gen_field(dw_SOBufferObjectControlState, 22, 28) |
5157 __gen_field(values->StreamOffsetWriteEnable, 21, 21) |
5158 __gen_field(values->StreamOutputBufferOffsetAddressEnable, 20, 20) |
5159 0;
5160
5161 uint32_t dw2 =
5162 0;
5163
5164 uint64_t qw2 =
5165 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
5166
5167 dw[2] = qw2;
5168 dw[3] = qw2 >> 32;
5169
5170 dw[4] =
5171 __gen_field(values->SurfaceSize, 0, 29) |
5172 0;
5173
5174 uint32_t dw5 =
5175 0;
5176
5177 uint64_t qw5 =
5178 __gen_combine_address(data, &dw[5], values->StreamOutputBufferOffsetAddress, dw5);
5179
5180 dw[5] = qw5;
5181 dw[6] = qw5 >> 32;
5182
5183 dw[7] =
5184 __gen_field(values->StreamOffset, 0, 31) |
5185 0;
5186
5187 }
5188
5189 #define GEN9_3DSTATE_SO_DECL_LIST_length_bias 0x00000002
5190 #define GEN9_3DSTATE_SO_DECL_LIST_header \
5191 .CommandType = 3, \
5192 .CommandSubType = 3, \
5193 ._3DCommandOpcode = 1, \
5194 ._3DCommandSubOpcode = 23
5195
5196 #define GEN9_3DSTATE_SO_DECL_LIST_length 0x00000000
5197
5198 #define GEN9_SO_DECL_ENTRY_length 0x00000002
5199
5200 #define GEN9_SO_DECL_length 0x00000001
5201
5202 struct GEN9_SO_DECL {
5203 uint32_t OutputBufferSlot;
5204 uint32_t HoleFlag;
5205 uint32_t RegisterIndex;
5206 uint32_t ComponentMask;
5207 };
5208
5209 static inline void
5210 GEN9_SO_DECL_pack(__gen_user_data *data, void * restrict dst,
5211 const struct GEN9_SO_DECL * restrict values)
5212 {
5213 uint32_t *dw = (uint32_t * restrict) dst;
5214
5215 dw[0] =
5216 __gen_field(values->OutputBufferSlot, 12, 13) |
5217 __gen_field(values->HoleFlag, 11, 11) |
5218 __gen_field(values->RegisterIndex, 4, 9) |
5219 __gen_field(values->ComponentMask, 0, 3) |
5220 0;
5221
5222 }
5223
5224 struct GEN9_SO_DECL_ENTRY {
5225 struct GEN9_SO_DECL Stream3Decl;
5226 struct GEN9_SO_DECL Stream2Decl;
5227 struct GEN9_SO_DECL Stream1Decl;
5228 struct GEN9_SO_DECL Stream0Decl;
5229 };
5230
5231 static inline void
5232 GEN9_SO_DECL_ENTRY_pack(__gen_user_data *data, void * restrict dst,
5233 const struct GEN9_SO_DECL_ENTRY * restrict values)
5234 {
5235 uint32_t *dw = (uint32_t * restrict) dst;
5236
5237 uint32_t dw_Stream3Decl;
5238 GEN9_SO_DECL_pack(data, &dw_Stream3Decl, &values->Stream3Decl);
5239 uint32_t dw_Stream2Decl;
5240 GEN9_SO_DECL_pack(data, &dw_Stream2Decl, &values->Stream2Decl);
5241 uint32_t dw_Stream1Decl;
5242 GEN9_SO_DECL_pack(data, &dw_Stream1Decl, &values->Stream1Decl);
5243 uint32_t dw_Stream0Decl;
5244 GEN9_SO_DECL_pack(data, &dw_Stream0Decl, &values->Stream0Decl);
5245 uint64_t qw0 =
5246 __gen_field(dw_Stream3Decl, 48, 63) |
5247 __gen_field(dw_Stream2Decl, 32, 47) |
5248 __gen_field(dw_Stream1Decl, 16, 31) |
5249 __gen_field(dw_Stream0Decl, 0, 15) |
5250 0;
5251
5252 dw[0] = qw0;
5253 dw[1] = qw0 >> 32;
5254
5255 }
5256
5257 struct GEN9_3DSTATE_SO_DECL_LIST {
5258 uint32_t CommandType;
5259 uint32_t CommandSubType;
5260 uint32_t _3DCommandOpcode;
5261 uint32_t _3DCommandSubOpcode;
5262 uint32_t DwordLength;
5263 uint32_t StreamtoBufferSelects3;
5264 uint32_t StreamtoBufferSelects2;
5265 uint32_t StreamtoBufferSelects1;
5266 uint32_t StreamtoBufferSelects0;
5267 uint32_t NumEntries3;
5268 uint32_t NumEntries2;
5269 uint32_t NumEntries1;
5270 uint32_t NumEntries0;
5271 /* variable length fields follow */
5272 };
5273
5274 static inline void
5275 GEN9_3DSTATE_SO_DECL_LIST_pack(__gen_user_data *data, void * restrict dst,
5276 const struct GEN9_3DSTATE_SO_DECL_LIST * restrict values)
5277 {
5278 uint32_t *dw = (uint32_t * restrict) dst;
5279
5280 dw[0] =
5281 __gen_field(values->CommandType, 29, 31) |
5282 __gen_field(values->CommandSubType, 27, 28) |
5283 __gen_field(values->_3DCommandOpcode, 24, 26) |
5284 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5285 __gen_field(values->DwordLength, 0, 8) |
5286 0;
5287
5288 dw[1] =
5289 __gen_field(values->StreamtoBufferSelects3, 12, 15) |
5290 __gen_field(values->StreamtoBufferSelects2, 8, 11) |
5291 __gen_field(values->StreamtoBufferSelects1, 4, 7) |
5292 __gen_field(values->StreamtoBufferSelects0, 0, 3) |
5293 0;
5294
5295 dw[2] =
5296 __gen_field(values->NumEntries3, 24, 31) |
5297 __gen_field(values->NumEntries2, 16, 23) |
5298 __gen_field(values->NumEntries1, 8, 15) |
5299 __gen_field(values->NumEntries0, 0, 7) |
5300 0;
5301
5302 /* variable length fields follow */
5303 }
5304
5305 #define GEN9_3DSTATE_STENCIL_BUFFER_length_bias 0x00000002
5306 #define GEN9_3DSTATE_STENCIL_BUFFER_header \
5307 .CommandType = 3, \
5308 .CommandSubType = 3, \
5309 ._3DCommandOpcode = 0, \
5310 ._3DCommandSubOpcode = 6, \
5311 .DwordLength = 3
5312
5313 #define GEN9_3DSTATE_STENCIL_BUFFER_length 0x00000005
5314
5315 struct GEN9_3DSTATE_STENCIL_BUFFER {
5316 uint32_t CommandType;
5317 uint32_t CommandSubType;
5318 uint32_t _3DCommandOpcode;
5319 uint32_t _3DCommandSubOpcode;
5320 uint32_t DwordLength;
5321 uint32_t StencilBufferEnable;
5322 struct GEN9_MEMORY_OBJECT_CONTROL_STATE StencilBufferObjectControlState;
5323 uint32_t SurfacePitch;
5324 __gen_address_type SurfaceBaseAddress;
5325 uint32_t SurfaceQPitch;
5326 };
5327
5328 static inline void
5329 GEN9_3DSTATE_STENCIL_BUFFER_pack(__gen_user_data *data, void * restrict dst,
5330 const struct GEN9_3DSTATE_STENCIL_BUFFER * restrict values)
5331 {
5332 uint32_t *dw = (uint32_t * restrict) dst;
5333
5334 dw[0] =
5335 __gen_field(values->CommandType, 29, 31) |
5336 __gen_field(values->CommandSubType, 27, 28) |
5337 __gen_field(values->_3DCommandOpcode, 24, 26) |
5338 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5339 __gen_field(values->DwordLength, 0, 7) |
5340 0;
5341
5342 uint32_t dw_StencilBufferObjectControlState;
5343 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StencilBufferObjectControlState, &values->StencilBufferObjectControlState);
5344 dw[1] =
5345 __gen_field(values->StencilBufferEnable, 31, 31) |
5346 __gen_field(dw_StencilBufferObjectControlState, 22, 28) |
5347 __gen_field(values->SurfacePitch, 0, 16) |
5348 0;
5349
5350 uint32_t dw2 =
5351 0;
5352
5353 uint64_t qw2 =
5354 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
5355
5356 dw[2] = qw2;
5357 dw[3] = qw2 >> 32;
5358
5359 dw[4] =
5360 __gen_field(values->SurfaceQPitch, 0, 14) |
5361 0;
5362
5363 }
5364
5365 #define GEN9_3DSTATE_STREAMOUT_length_bias 0x00000002
5366 #define GEN9_3DSTATE_STREAMOUT_header \
5367 .CommandType = 3, \
5368 .CommandSubType = 3, \
5369 ._3DCommandOpcode = 0, \
5370 ._3DCommandSubOpcode = 30, \
5371 .DwordLength = 3
5372
5373 #define GEN9_3DSTATE_STREAMOUT_length 0x00000005
5374
5375 struct GEN9_3DSTATE_STREAMOUT {
5376 uint32_t CommandType;
5377 uint32_t CommandSubType;
5378 uint32_t _3DCommandOpcode;
5379 uint32_t _3DCommandSubOpcode;
5380 uint32_t DwordLength;
5381 uint32_t SOFunctionEnable;
5382 uint32_t APIRenderingDisable;
5383 uint32_t RenderStreamSelect;
5384 #define LEADING 0
5385 #define TRAILING 1
5386 uint32_t ReorderMode;
5387 bool SOStatisticsEnable;
5388 #define Normal 0
5389 #define Resreved 1
5390 #define Force_Off 2
5391 #define Force_on 3
5392 uint32_t ForceRendering;
5393 uint32_t Stream3VertexReadOffset;
5394 uint32_t Stream3VertexReadLength;
5395 uint32_t Stream2VertexReadOffset;
5396 uint32_t Stream2VertexReadLength;
5397 uint32_t Stream1VertexReadOffset;
5398 uint32_t Stream1VertexReadLength;
5399 uint32_t Stream0VertexReadOffset;
5400 uint32_t Stream0VertexReadLength;
5401 uint32_t Buffer1SurfacePitch;
5402 uint32_t Buffer0SurfacePitch;
5403 uint32_t Buffer3SurfacePitch;
5404 uint32_t Buffer2SurfacePitch;
5405 };
5406
5407 static inline void
5408 GEN9_3DSTATE_STREAMOUT_pack(__gen_user_data *data, void * restrict dst,
5409 const struct GEN9_3DSTATE_STREAMOUT * restrict values)
5410 {
5411 uint32_t *dw = (uint32_t * restrict) dst;
5412
5413 dw[0] =
5414 __gen_field(values->CommandType, 29, 31) |
5415 __gen_field(values->CommandSubType, 27, 28) |
5416 __gen_field(values->_3DCommandOpcode, 24, 26) |
5417 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5418 __gen_field(values->DwordLength, 0, 7) |
5419 0;
5420
5421 dw[1] =
5422 __gen_field(values->SOFunctionEnable, 31, 31) |
5423 __gen_field(values->APIRenderingDisable, 30, 30) |
5424 __gen_field(values->RenderStreamSelect, 27, 28) |
5425 __gen_field(values->ReorderMode, 26, 26) |
5426 __gen_field(values->SOStatisticsEnable, 25, 25) |
5427 __gen_field(values->ForceRendering, 23, 24) |
5428 0;
5429
5430 dw[2] =
5431 __gen_field(values->Stream3VertexReadOffset, 29, 29) |
5432 __gen_field(values->Stream3VertexReadLength, 24, 28) |
5433 __gen_field(values->Stream2VertexReadOffset, 21, 21) |
5434 __gen_field(values->Stream2VertexReadLength, 16, 20) |
5435 __gen_field(values->Stream1VertexReadOffset, 13, 13) |
5436 __gen_field(values->Stream1VertexReadLength, 8, 12) |
5437 __gen_field(values->Stream0VertexReadOffset, 5, 5) |
5438 __gen_field(values->Stream0VertexReadLength, 0, 4) |
5439 0;
5440
5441 dw[3] =
5442 __gen_field(values->Buffer1SurfacePitch, 16, 27) |
5443 __gen_field(values->Buffer0SurfacePitch, 0, 11) |
5444 0;
5445
5446 dw[4] =
5447 __gen_field(values->Buffer3SurfacePitch, 16, 27) |
5448 __gen_field(values->Buffer2SurfacePitch, 0, 11) |
5449 0;
5450
5451 }
5452
5453 #define GEN9_3DSTATE_TE_length_bias 0x00000002
5454 #define GEN9_3DSTATE_TE_header \
5455 .CommandType = 3, \
5456 .CommandSubType = 3, \
5457 ._3DCommandOpcode = 0, \
5458 ._3DCommandSubOpcode = 28, \
5459 .DwordLength = 2
5460
5461 #define GEN9_3DSTATE_TE_length 0x00000004
5462
5463 struct GEN9_3DSTATE_TE {
5464 uint32_t CommandType;
5465 uint32_t CommandSubType;
5466 uint32_t _3DCommandOpcode;
5467 uint32_t _3DCommandSubOpcode;
5468 uint32_t DwordLength;
5469 #define INTEGER 0
5470 #define ODD_FRACTIONAL 1
5471 #define EVEN_FRACTIONAL 2
5472 uint32_t Partitioning;
5473 #define POINT 0
5474 #define OUTPUT_LINE 1
5475 #define OUTPUT_TRI_CW 2
5476 #define OUTPUT_TRI_CCW 3
5477 uint32_t OutputTopology;
5478 #define QUAD 0
5479 #define TRI 1
5480 #define ISOLINE 2
5481 uint32_t TEDomain;
5482 #define HW_TESS 0
5483 uint32_t TEMode;
5484 bool TEEnable;
5485 float MaximumTessellationFactorOdd;
5486 float MaximumTessellationFactorNotOdd;
5487 };
5488
5489 static inline void
5490 GEN9_3DSTATE_TE_pack(__gen_user_data *data, void * restrict dst,
5491 const struct GEN9_3DSTATE_TE * restrict values)
5492 {
5493 uint32_t *dw = (uint32_t * restrict) dst;
5494
5495 dw[0] =
5496 __gen_field(values->CommandType, 29, 31) |
5497 __gen_field(values->CommandSubType, 27, 28) |
5498 __gen_field(values->_3DCommandOpcode, 24, 26) |
5499 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5500 __gen_field(values->DwordLength, 0, 7) |
5501 0;
5502
5503 dw[1] =
5504 __gen_field(values->Partitioning, 12, 13) |
5505 __gen_field(values->OutputTopology, 8, 9) |
5506 __gen_field(values->TEDomain, 4, 5) |
5507 __gen_field(values->TEMode, 1, 2) |
5508 __gen_field(values->TEEnable, 0, 0) |
5509 0;
5510
5511 dw[2] =
5512 __gen_float(values->MaximumTessellationFactorOdd) |
5513 0;
5514
5515 dw[3] =
5516 __gen_float(values->MaximumTessellationFactorNotOdd) |
5517 0;
5518
5519 }
5520
5521 #define GEN9_3DSTATE_URB_CLEAR_length_bias 0x00000002
5522 #define GEN9_3DSTATE_URB_CLEAR_header \
5523 .CommandType = 3, \
5524 .CommandSubType = 3, \
5525 ._3DCommandOpcode = 1, \
5526 ._3DCommandSubOpcode = 29, \
5527 .DwordLength = 0
5528
5529 #define GEN9_3DSTATE_URB_CLEAR_length 0x00000002
5530
5531 struct GEN9_3DSTATE_URB_CLEAR {
5532 uint32_t CommandType;
5533 uint32_t CommandSubType;
5534 uint32_t _3DCommandOpcode;
5535 uint32_t _3DCommandSubOpcode;
5536 uint32_t DwordLength;
5537 uint32_t URBClearLength;
5538 uint32_t URBAddress;
5539 };
5540
5541 static inline void
5542 GEN9_3DSTATE_URB_CLEAR_pack(__gen_user_data *data, void * restrict dst,
5543 const struct GEN9_3DSTATE_URB_CLEAR * restrict values)
5544 {
5545 uint32_t *dw = (uint32_t * restrict) dst;
5546
5547 dw[0] =
5548 __gen_field(values->CommandType, 29, 31) |
5549 __gen_field(values->CommandSubType, 27, 28) |
5550 __gen_field(values->_3DCommandOpcode, 24, 26) |
5551 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5552 __gen_field(values->DwordLength, 0, 7) |
5553 0;
5554
5555 dw[1] =
5556 __gen_field(values->URBClearLength, 16, 29) |
5557 __gen_offset(values->URBAddress, 0, 14) |
5558 0;
5559
5560 }
5561
5562 #define GEN9_3DSTATE_URB_DS_length_bias 0x00000002
5563 #define GEN9_3DSTATE_URB_DS_header \
5564 .CommandType = 3, \
5565 .CommandSubType = 3, \
5566 ._3DCommandOpcode = 0, \
5567 ._3DCommandSubOpcode = 50, \
5568 .DwordLength = 0
5569
5570 #define GEN9_3DSTATE_URB_DS_length 0x00000002
5571
5572 struct GEN9_3DSTATE_URB_DS {
5573 uint32_t CommandType;
5574 uint32_t CommandSubType;
5575 uint32_t _3DCommandOpcode;
5576 uint32_t _3DCommandSubOpcode;
5577 uint32_t DwordLength;
5578 uint32_t DSURBStartingAddress;
5579 uint32_t DSURBEntryAllocationSize;
5580 uint32_t DSNumberofURBEntries;
5581 };
5582
5583 static inline void
5584 GEN9_3DSTATE_URB_DS_pack(__gen_user_data *data, void * restrict dst,
5585 const struct GEN9_3DSTATE_URB_DS * restrict values)
5586 {
5587 uint32_t *dw = (uint32_t * restrict) dst;
5588
5589 dw[0] =
5590 __gen_field(values->CommandType, 29, 31) |
5591 __gen_field(values->CommandSubType, 27, 28) |
5592 __gen_field(values->_3DCommandOpcode, 24, 26) |
5593 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5594 __gen_field(values->DwordLength, 0, 7) |
5595 0;
5596
5597 dw[1] =
5598 __gen_field(values->DSURBStartingAddress, 25, 31) |
5599 __gen_field(values->DSURBEntryAllocationSize, 16, 24) |
5600 __gen_field(values->DSNumberofURBEntries, 0, 15) |
5601 0;
5602
5603 }
5604
5605 #define GEN9_3DSTATE_URB_GS_length_bias 0x00000002
5606 #define GEN9_3DSTATE_URB_GS_header \
5607 .CommandType = 3, \
5608 .CommandSubType = 3, \
5609 ._3DCommandOpcode = 0, \
5610 ._3DCommandSubOpcode = 51, \
5611 .DwordLength = 0
5612
5613 #define GEN9_3DSTATE_URB_GS_length 0x00000002
5614
5615 struct GEN9_3DSTATE_URB_GS {
5616 uint32_t CommandType;
5617 uint32_t CommandSubType;
5618 uint32_t _3DCommandOpcode;
5619 uint32_t _3DCommandSubOpcode;
5620 uint32_t DwordLength;
5621 uint32_t GSURBStartingAddress;
5622 uint32_t GSURBEntryAllocationSize;
5623 uint32_t GSNumberofURBEntries;
5624 };
5625
5626 static inline void
5627 GEN9_3DSTATE_URB_GS_pack(__gen_user_data *data, void * restrict dst,
5628 const struct GEN9_3DSTATE_URB_GS * restrict values)
5629 {
5630 uint32_t *dw = (uint32_t * restrict) dst;
5631
5632 dw[0] =
5633 __gen_field(values->CommandType, 29, 31) |
5634 __gen_field(values->CommandSubType, 27, 28) |
5635 __gen_field(values->_3DCommandOpcode, 24, 26) |
5636 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5637 __gen_field(values->DwordLength, 0, 7) |
5638 0;
5639
5640 dw[1] =
5641 __gen_field(values->GSURBStartingAddress, 25, 31) |
5642 __gen_field(values->GSURBEntryAllocationSize, 16, 24) |
5643 __gen_field(values->GSNumberofURBEntries, 0, 15) |
5644 0;
5645
5646 }
5647
5648 #define GEN9_3DSTATE_URB_HS_length_bias 0x00000002
5649 #define GEN9_3DSTATE_URB_HS_header \
5650 .CommandType = 3, \
5651 .CommandSubType = 3, \
5652 ._3DCommandOpcode = 0, \
5653 ._3DCommandSubOpcode = 49, \
5654 .DwordLength = 0
5655
5656 #define GEN9_3DSTATE_URB_HS_length 0x00000002
5657
5658 struct GEN9_3DSTATE_URB_HS {
5659 uint32_t CommandType;
5660 uint32_t CommandSubType;
5661 uint32_t _3DCommandOpcode;
5662 uint32_t _3DCommandSubOpcode;
5663 uint32_t DwordLength;
5664 uint32_t HSURBStartingAddress;
5665 uint32_t HSURBEntryAllocationSize;
5666 uint32_t HSNumberofURBEntries;
5667 };
5668
5669 static inline void
5670 GEN9_3DSTATE_URB_HS_pack(__gen_user_data *data, void * restrict dst,
5671 const struct GEN9_3DSTATE_URB_HS * restrict values)
5672 {
5673 uint32_t *dw = (uint32_t * restrict) dst;
5674
5675 dw[0] =
5676 __gen_field(values->CommandType, 29, 31) |
5677 __gen_field(values->CommandSubType, 27, 28) |
5678 __gen_field(values->_3DCommandOpcode, 24, 26) |
5679 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5680 __gen_field(values->DwordLength, 0, 7) |
5681 0;
5682
5683 dw[1] =
5684 __gen_field(values->HSURBStartingAddress, 25, 31) |
5685 __gen_field(values->HSURBEntryAllocationSize, 16, 24) |
5686 __gen_field(values->HSNumberofURBEntries, 0, 15) |
5687 0;
5688
5689 }
5690
5691 #define GEN9_3DSTATE_VERTEX_BUFFERS_length_bias 0x00000002
5692 #define GEN9_3DSTATE_VERTEX_BUFFERS_header \
5693 .CommandType = 3, \
5694 .CommandSubType = 3, \
5695 ._3DCommandOpcode = 0, \
5696 ._3DCommandSubOpcode = 8
5697
5698 #define GEN9_3DSTATE_VERTEX_BUFFERS_length 0x00000000
5699
5700 #define GEN9_VERTEX_BUFFER_STATE_length 0x00000004
5701
5702 struct GEN9_VERTEX_BUFFER_STATE {
5703 uint32_t VertexBufferIndex;
5704 struct GEN9_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
5705 uint32_t AddressModifyEnable;
5706 bool NullVertexBuffer;
5707 uint32_t BufferPitch;
5708 __gen_address_type BufferStartingAddress;
5709 uint32_t BufferSize;
5710 };
5711
5712 static inline void
5713 GEN9_VERTEX_BUFFER_STATE_pack(__gen_user_data *data, void * restrict dst,
5714 const struct GEN9_VERTEX_BUFFER_STATE * restrict values)
5715 {
5716 uint32_t *dw = (uint32_t * restrict) dst;
5717
5718 uint32_t dw_MemoryObjectControlState;
5719 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
5720 dw[0] =
5721 __gen_field(values->VertexBufferIndex, 26, 31) |
5722 __gen_field(dw_MemoryObjectControlState, 16, 22) |
5723 __gen_field(values->AddressModifyEnable, 14, 14) |
5724 __gen_field(values->NullVertexBuffer, 13, 13) |
5725 __gen_field(values->BufferPitch, 0, 11) |
5726 0;
5727
5728 uint32_t dw1 =
5729 0;
5730
5731 uint64_t qw1 =
5732 __gen_combine_address(data, &dw[1], values->BufferStartingAddress, dw1);
5733
5734 dw[1] = qw1;
5735 dw[2] = qw1 >> 32;
5736
5737 dw[3] =
5738 __gen_field(values->BufferSize, 0, 31) |
5739 0;
5740
5741 }
5742
5743 struct GEN9_3DSTATE_VERTEX_BUFFERS {
5744 uint32_t CommandType;
5745 uint32_t CommandSubType;
5746 uint32_t _3DCommandOpcode;
5747 uint32_t _3DCommandSubOpcode;
5748 uint32_t DwordLength;
5749 /* variable length fields follow */
5750 };
5751
5752 static inline void
5753 GEN9_3DSTATE_VERTEX_BUFFERS_pack(__gen_user_data *data, void * restrict dst,
5754 const struct GEN9_3DSTATE_VERTEX_BUFFERS * restrict values)
5755 {
5756 uint32_t *dw = (uint32_t * restrict) dst;
5757
5758 dw[0] =
5759 __gen_field(values->CommandType, 29, 31) |
5760 __gen_field(values->CommandSubType, 27, 28) |
5761 __gen_field(values->_3DCommandOpcode, 24, 26) |
5762 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5763 __gen_field(values->DwordLength, 0, 7) |
5764 0;
5765
5766 /* variable length fields follow */
5767 }
5768
5769 #define GEN9_3DSTATE_VERTEX_ELEMENTS_length_bias 0x00000002
5770 #define GEN9_3DSTATE_VERTEX_ELEMENTS_header \
5771 .CommandType = 3, \
5772 .CommandSubType = 3, \
5773 ._3DCommandOpcode = 0, \
5774 ._3DCommandSubOpcode = 9
5775
5776 #define GEN9_3DSTATE_VERTEX_ELEMENTS_length 0x00000000
5777
5778 #define GEN9_VERTEX_ELEMENT_STATE_length 0x00000002
5779
5780 struct GEN9_VERTEX_ELEMENT_STATE {
5781 uint32_t VertexBufferIndex;
5782 bool Valid;
5783 uint32_t SourceElementFormat;
5784 bool EdgeFlagEnable;
5785 uint32_t SourceElementOffset;
5786 uint32_t Component0Control;
5787 uint32_t Component1Control;
5788 uint32_t Component2Control;
5789 uint32_t Component3Control;
5790 };
5791
5792 static inline void
5793 GEN9_VERTEX_ELEMENT_STATE_pack(__gen_user_data *data, void * restrict dst,
5794 const struct GEN9_VERTEX_ELEMENT_STATE * restrict values)
5795 {
5796 uint32_t *dw = (uint32_t * restrict) dst;
5797
5798 dw[0] =
5799 __gen_field(values->VertexBufferIndex, 26, 31) |
5800 __gen_field(values->Valid, 25, 25) |
5801 __gen_field(values->SourceElementFormat, 16, 24) |
5802 __gen_field(values->EdgeFlagEnable, 15, 15) |
5803 __gen_field(values->SourceElementOffset, 0, 11) |
5804 0;
5805
5806 dw[1] =
5807 __gen_field(values->Component0Control, 28, 30) |
5808 __gen_field(values->Component1Control, 24, 26) |
5809 __gen_field(values->Component2Control, 20, 22) |
5810 __gen_field(values->Component3Control, 16, 18) |
5811 0;
5812
5813 }
5814
5815 struct GEN9_3DSTATE_VERTEX_ELEMENTS {
5816 uint32_t CommandType;
5817 uint32_t CommandSubType;
5818 uint32_t _3DCommandOpcode;
5819 uint32_t _3DCommandSubOpcode;
5820 uint32_t DwordLength;
5821 /* variable length fields follow */
5822 };
5823
5824 static inline void
5825 GEN9_3DSTATE_VERTEX_ELEMENTS_pack(__gen_user_data *data, void * restrict dst,
5826 const struct GEN9_3DSTATE_VERTEX_ELEMENTS * restrict values)
5827 {
5828 uint32_t *dw = (uint32_t * restrict) dst;
5829
5830 dw[0] =
5831 __gen_field(values->CommandType, 29, 31) |
5832 __gen_field(values->CommandSubType, 27, 28) |
5833 __gen_field(values->_3DCommandOpcode, 24, 26) |
5834 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5835 __gen_field(values->DwordLength, 0, 7) |
5836 0;
5837
5838 /* variable length fields follow */
5839 }
5840
5841 #define GEN9_3DSTATE_VF_length_bias 0x00000002
5842 #define GEN9_3DSTATE_VF_header \
5843 .CommandType = 3, \
5844 .CommandSubType = 3, \
5845 ._3DCommandOpcode = 0, \
5846 ._3DCommandSubOpcode = 12, \
5847 .DwordLength = 0
5848
5849 #define GEN9_3DSTATE_VF_length 0x00000002
5850
5851 struct GEN9_3DSTATE_VF {
5852 uint32_t CommandType;
5853 uint32_t CommandSubType;
5854 uint32_t _3DCommandOpcode;
5855 uint32_t _3DCommandSubOpcode;
5856 bool SequentialDrawCutIndexEnable;
5857 bool ComponentPackingEnable;
5858 bool IndexedDrawCutIndexEnable;
5859 uint32_t DwordLength;
5860 uint32_t CutIndex;
5861 };
5862
5863 static inline void
5864 GEN9_3DSTATE_VF_pack(__gen_user_data *data, void * restrict dst,
5865 const struct GEN9_3DSTATE_VF * restrict values)
5866 {
5867 uint32_t *dw = (uint32_t * restrict) dst;
5868
5869 dw[0] =
5870 __gen_field(values->CommandType, 29, 31) |
5871 __gen_field(values->CommandSubType, 27, 28) |
5872 __gen_field(values->_3DCommandOpcode, 24, 26) |
5873 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5874 __gen_field(values->SequentialDrawCutIndexEnable, 10, 10) |
5875 __gen_field(values->ComponentPackingEnable, 9, 9) |
5876 __gen_field(values->IndexedDrawCutIndexEnable, 8, 8) |
5877 __gen_field(values->DwordLength, 0, 7) |
5878 0;
5879
5880 dw[1] =
5881 __gen_field(values->CutIndex, 0, 31) |
5882 0;
5883
5884 }
5885
5886 #define GEN9_3DSTATE_VF_COMPONENT_PACKING_length_bias 0x00000002
5887 #define GEN9_3DSTATE_VF_COMPONENT_PACKING_header\
5888 .CommandType = 3, \
5889 .CommandSubType = 3, \
5890 ._3DCommandOpcode = 0, \
5891 ._3DCommandSubOpcode = 85, \
5892 .DwordLength = 3
5893
5894 #define GEN9_3DSTATE_VF_COMPONENT_PACKING_length 0x00000005
5895
5896 struct GEN9_3DSTATE_VF_COMPONENT_PACKING {
5897 uint32_t CommandType;
5898 uint32_t CommandSubType;
5899 uint32_t _3DCommandOpcode;
5900 uint32_t _3DCommandSubOpcode;
5901 uint32_t DwordLength;
5902 uint32_t VertexElement07Enables;
5903 uint32_t VertexElement06Enables;
5904 uint32_t VertexElement05Enables;
5905 uint32_t VertexElement04Enables;
5906 uint32_t VertexElement03Enables;
5907 uint32_t VertexElement02Enables;
5908 uint32_t VertexElement01Enables;
5909 uint32_t VertexElement00Enables;
5910 uint32_t VertexElement15Enables;
5911 uint32_t VertexElement14Enables;
5912 uint32_t VertexElement13Enables;
5913 uint32_t VertexElement12Enables;
5914 uint32_t VertexElement11Enables;
5915 uint32_t VertexElement10Enables;
5916 uint32_t VertexElement09Enables;
5917 uint32_t VertexElement08Enables;
5918 uint32_t VertexElement23Enables;
5919 uint32_t VertexElement22Enables;
5920 uint32_t VertexElement21Enables;
5921 uint32_t VertexElement20Enables;
5922 uint32_t VertexElement19Enables;
5923 uint32_t VertexElement18Enables;
5924 uint32_t VertexElement17Enables;
5925 uint32_t VertexElement16Enables;
5926 uint32_t VertexElement31Enables;
5927 uint32_t VertexElement30Enables;
5928 uint32_t VertexElement29Enables;
5929 uint32_t VertexElement28Enables;
5930 uint32_t VertexElement27Enables;
5931 uint32_t VertexElement26Enables;
5932 uint32_t VertexElement25Enables;
5933 uint32_t VertexElement24Enables;
5934 };
5935
5936 static inline void
5937 GEN9_3DSTATE_VF_COMPONENT_PACKING_pack(__gen_user_data *data, void * restrict dst,
5938 const struct GEN9_3DSTATE_VF_COMPONENT_PACKING * restrict values)
5939 {
5940 uint32_t *dw = (uint32_t * restrict) dst;
5941
5942 dw[0] =
5943 __gen_field(values->CommandType, 29, 31) |
5944 __gen_field(values->CommandSubType, 27, 28) |
5945 __gen_field(values->_3DCommandOpcode, 24, 26) |
5946 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5947 __gen_field(values->DwordLength, 0, 7) |
5948 0;
5949
5950 dw[1] =
5951 __gen_field(values->VertexElement07Enables, 28, 31) |
5952 __gen_field(values->VertexElement06Enables, 24, 27) |
5953 __gen_field(values->VertexElement05Enables, 20, 23) |
5954 __gen_field(values->VertexElement04Enables, 16, 19) |
5955 __gen_field(values->VertexElement03Enables, 12, 15) |
5956 __gen_field(values->VertexElement02Enables, 8, 11) |
5957 __gen_field(values->VertexElement01Enables, 4, 7) |
5958 __gen_field(values->VertexElement00Enables, 0, 3) |
5959 0;
5960
5961 dw[2] =
5962 __gen_field(values->VertexElement15Enables, 28, 31) |
5963 __gen_field(values->VertexElement14Enables, 24, 27) |
5964 __gen_field(values->VertexElement13Enables, 20, 23) |
5965 __gen_field(values->VertexElement12Enables, 16, 19) |
5966 __gen_field(values->VertexElement11Enables, 12, 15) |
5967 __gen_field(values->VertexElement10Enables, 8, 11) |
5968 __gen_field(values->VertexElement09Enables, 4, 7) |
5969 __gen_field(values->VertexElement08Enables, 0, 3) |
5970 0;
5971
5972 dw[3] =
5973 __gen_field(values->VertexElement23Enables, 28, 31) |
5974 __gen_field(values->VertexElement22Enables, 24, 27) |
5975 __gen_field(values->VertexElement21Enables, 20, 23) |
5976 __gen_field(values->VertexElement20Enables, 16, 19) |
5977 __gen_field(values->VertexElement19Enables, 12, 15) |
5978 __gen_field(values->VertexElement18Enables, 8, 11) |
5979 __gen_field(values->VertexElement17Enables, 4, 7) |
5980 __gen_field(values->VertexElement16Enables, 0, 3) |
5981 0;
5982
5983 dw[4] =
5984 __gen_field(values->VertexElement31Enables, 28, 31) |
5985 __gen_field(values->VertexElement30Enables, 24, 27) |
5986 __gen_field(values->VertexElement29Enables, 20, 23) |
5987 __gen_field(values->VertexElement28Enables, 16, 19) |
5988 __gen_field(values->VertexElement27Enables, 12, 15) |
5989 __gen_field(values->VertexElement26Enables, 8, 11) |
5990 __gen_field(values->VertexElement25Enables, 4, 7) |
5991 __gen_field(values->VertexElement24Enables, 0, 3) |
5992 0;
5993
5994 }
5995
5996 #define GEN9_3DSTATE_VF_INSTANCING_length_bias 0x00000002
5997 #define GEN9_3DSTATE_VF_INSTANCING_header \
5998 .CommandType = 3, \
5999 .CommandSubType = 3, \
6000 ._3DCommandOpcode = 0, \
6001 ._3DCommandSubOpcode = 73, \
6002 .DwordLength = 1
6003
6004 #define GEN9_3DSTATE_VF_INSTANCING_length 0x00000003
6005
6006 struct GEN9_3DSTATE_VF_INSTANCING {
6007 uint32_t CommandType;
6008 uint32_t CommandSubType;
6009 uint32_t _3DCommandOpcode;
6010 uint32_t _3DCommandSubOpcode;
6011 uint32_t DwordLength;
6012 bool InstancingEnable;
6013 uint32_t VertexElementIndex;
6014 uint32_t InstanceDataStepRate;
6015 };
6016
6017 static inline void
6018 GEN9_3DSTATE_VF_INSTANCING_pack(__gen_user_data *data, void * restrict dst,
6019 const struct GEN9_3DSTATE_VF_INSTANCING * restrict values)
6020 {
6021 uint32_t *dw = (uint32_t * restrict) dst;
6022
6023 dw[0] =
6024 __gen_field(values->CommandType, 29, 31) |
6025 __gen_field(values->CommandSubType, 27, 28) |
6026 __gen_field(values->_3DCommandOpcode, 24, 26) |
6027 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
6028 __gen_field(values->DwordLength, 0, 7) |
6029 0;
6030
6031 dw[1] =
6032 __gen_field(values->InstancingEnable, 8, 8) |
6033 __gen_field(values->VertexElementIndex, 0, 5) |
6034 0;
6035
6036 dw[2] =
6037 __gen_field(values->InstanceDataStepRate, 0, 31) |
6038 0;
6039
6040 }
6041
6042 #define GEN9_3DSTATE_VF_SGVS_length_bias 0x00000002
6043 #define GEN9_3DSTATE_VF_SGVS_header \
6044 .CommandType = 3, \
6045 .CommandSubType = 3, \
6046 ._3DCommandOpcode = 0, \
6047 ._3DCommandSubOpcode = 74, \
6048 .DwordLength = 0
6049
6050 #define GEN9_3DSTATE_VF_SGVS_length 0x00000002
6051
6052 struct GEN9_3DSTATE_VF_SGVS {
6053 uint32_t CommandType;
6054 uint32_t CommandSubType;
6055 uint32_t _3DCommandOpcode;
6056 uint32_t _3DCommandSubOpcode;
6057 uint32_t DwordLength;
6058 bool InstanceIDEnable;
6059 #define COMP_0 0
6060 #define COMP_1 1
6061 #define COMP_2 2
6062 #define COMP_3 3
6063 uint32_t InstanceIDComponentNumber;
6064 uint32_t InstanceIDElementOffset;
6065 bool VertexIDEnable;
6066 #define COMP_0 0
6067 #define COMP_1 1
6068 #define COMP_2 2
6069 #define COMP_3 3
6070 uint32_t VertexIDComponentNumber;
6071 uint32_t VertexIDElementOffset;
6072 };
6073
6074 static inline void
6075 GEN9_3DSTATE_VF_SGVS_pack(__gen_user_data *data, void * restrict dst,
6076 const struct GEN9_3DSTATE_VF_SGVS * restrict values)
6077 {
6078 uint32_t *dw = (uint32_t * restrict) dst;
6079
6080 dw[0] =
6081 __gen_field(values->CommandType, 29, 31) |
6082 __gen_field(values->CommandSubType, 27, 28) |
6083 __gen_field(values->_3DCommandOpcode, 24, 26) |
6084 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
6085 __gen_field(values->DwordLength, 0, 7) |
6086 0;
6087
6088 dw[1] =
6089 __gen_field(values->InstanceIDEnable, 31, 31) |
6090 __gen_field(values->InstanceIDComponentNumber, 29, 30) |
6091 __gen_field(values->InstanceIDElementOffset, 16, 21) |
6092 __gen_field(values->VertexIDEnable, 15, 15) |
6093 __gen_field(values->VertexIDComponentNumber, 13, 14) |
6094 __gen_field(values->VertexIDElementOffset, 0, 5) |
6095 0;
6096
6097 }
6098
6099 #define GEN9_3DSTATE_VF_STATISTICS_length_bias 0x00000001
6100 #define GEN9_3DSTATE_VF_STATISTICS_header \
6101 .CommandType = 3, \
6102 .CommandSubType = 1, \
6103 ._3DCommandOpcode = 0, \
6104 ._3DCommandSubOpcode = 11
6105
6106 #define GEN9_3DSTATE_VF_STATISTICS_length 0x00000001
6107
6108 struct GEN9_3DSTATE_VF_STATISTICS {
6109 uint32_t CommandType;
6110 uint32_t CommandSubType;
6111 uint32_t _3DCommandOpcode;
6112 uint32_t _3DCommandSubOpcode;
6113 bool StatisticsEnable;
6114 };
6115
6116 static inline void
6117 GEN9_3DSTATE_VF_STATISTICS_pack(__gen_user_data *data, void * restrict dst,
6118 const struct GEN9_3DSTATE_VF_STATISTICS * restrict values)
6119 {
6120 uint32_t *dw = (uint32_t * restrict) dst;
6121
6122 dw[0] =
6123 __gen_field(values->CommandType, 29, 31) |
6124 __gen_field(values->CommandSubType, 27, 28) |
6125 __gen_field(values->_3DCommandOpcode, 24, 26) |
6126 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
6127 __gen_field(values->StatisticsEnable, 0, 0) |
6128 0;
6129
6130 }
6131
6132 #define GEN9_3DSTATE_VF_TOPOLOGY_length_bias 0x00000002
6133 #define GEN9_3DSTATE_VF_TOPOLOGY_header \
6134 .CommandType = 3, \
6135 .CommandSubType = 3, \
6136 ._3DCommandOpcode = 0, \
6137 ._3DCommandSubOpcode = 75, \
6138 .DwordLength = 0
6139
6140 #define GEN9_3DSTATE_VF_TOPOLOGY_length 0x00000002
6141
6142 struct GEN9_3DSTATE_VF_TOPOLOGY {
6143 uint32_t CommandType;
6144 uint32_t CommandSubType;
6145 uint32_t _3DCommandOpcode;
6146 uint32_t _3DCommandSubOpcode;
6147 uint32_t DwordLength;
6148 uint32_t PrimitiveTopologyType;
6149 };
6150
6151 static inline void
6152 GEN9_3DSTATE_VF_TOPOLOGY_pack(__gen_user_data *data, void * restrict dst,
6153 const struct GEN9_3DSTATE_VF_TOPOLOGY * restrict values)
6154 {
6155 uint32_t *dw = (uint32_t * restrict) dst;
6156
6157 dw[0] =
6158 __gen_field(values->CommandType, 29, 31) |
6159 __gen_field(values->CommandSubType, 27, 28) |
6160 __gen_field(values->_3DCommandOpcode, 24, 26) |
6161 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
6162 __gen_field(values->DwordLength, 0, 7) |
6163 0;
6164
6165 dw[1] =
6166 __gen_field(values->PrimitiveTopologyType, 0, 5) |
6167 0;
6168
6169 }
6170
6171 #define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length_bias 0x00000002
6172 #define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC_header\
6173 .CommandType = 3, \
6174 .CommandSubType = 3, \
6175 ._3DCommandOpcode = 0, \
6176 ._3DCommandSubOpcode = 35, \
6177 .DwordLength = 0
6178
6179 #define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length 0x00000002
6180
6181 struct GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC {
6182 uint32_t CommandType;
6183 uint32_t CommandSubType;
6184 uint32_t _3DCommandOpcode;
6185 uint32_t _3DCommandSubOpcode;
6186 uint32_t DwordLength;
6187 uint32_t CCViewportPointer;
6188 };
6189
6190 static inline void
6191 GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC_pack(__gen_user_data *data, void * restrict dst,
6192 const struct GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC * restrict values)
6193 {
6194 uint32_t *dw = (uint32_t * restrict) dst;
6195
6196 dw[0] =
6197 __gen_field(values->CommandType, 29, 31) |
6198 __gen_field(values->CommandSubType, 27, 28) |
6199 __gen_field(values->_3DCommandOpcode, 24, 26) |
6200 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
6201 __gen_field(values->DwordLength, 0, 7) |
6202 0;
6203
6204 dw[1] =
6205 __gen_offset(values->CCViewportPointer, 5, 31) |
6206 0;
6207
6208 }
6209
6210 #define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length_bias 0x00000002
6211 #define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_header\
6212 .CommandType = 3, \
6213 .CommandSubType = 3, \
6214 ._3DCommandOpcode = 0, \
6215 ._3DCommandSubOpcode = 33, \
6216 .DwordLength = 0
6217
6218 #define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length 0x00000002
6219
6220 struct GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP {
6221 uint32_t CommandType;
6222 uint32_t CommandSubType;
6223 uint32_t _3DCommandOpcode;
6224 uint32_t _3DCommandSubOpcode;
6225 uint32_t DwordLength;
6226 uint32_t SFClipViewportPointer;
6227 };
6228
6229 static inline void
6230 GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_pack(__gen_user_data *data, void * restrict dst,
6231 const struct GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP * restrict values)
6232 {
6233 uint32_t *dw = (uint32_t * restrict) dst;
6234
6235 dw[0] =
6236 __gen_field(values->CommandType, 29, 31) |
6237 __gen_field(values->CommandSubType, 27, 28) |
6238 __gen_field(values->_3DCommandOpcode, 24, 26) |
6239 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
6240 __gen_field(values->DwordLength, 0, 7) |
6241 0;
6242
6243 dw[1] =
6244 __gen_offset(values->SFClipViewportPointer, 6, 31) |
6245 0;
6246
6247 }
6248
6249 #define GEN9_3DSTATE_WM_length_bias 0x00000002
6250 #define GEN9_3DSTATE_WM_header \
6251 .CommandType = 3, \
6252 .CommandSubType = 3, \
6253 ._3DCommandOpcode = 0, \
6254 ._3DCommandSubOpcode = 20, \
6255 .DwordLength = 0
6256
6257 #define GEN9_3DSTATE_WM_length 0x00000002
6258
6259 struct GEN9_3DSTATE_WM {
6260 uint32_t CommandType;
6261 uint32_t CommandSubType;
6262 uint32_t _3DCommandOpcode;
6263 uint32_t _3DCommandSubOpcode;
6264 uint32_t DwordLength;
6265 bool StatisticsEnable;
6266 bool LegacyDepthBufferClearEnable;
6267 bool LegacyDepthBufferResolveEnable;
6268 bool LegacyHierarchicalDepthBufferResolveEnable;
6269 bool LegacyDiamondLineRasterization;
6270 #define NORMAL 0
6271 #define PSEXEC 1
6272 #define PREPS 2
6273 uint32_t EarlyDepthStencilControl;
6274 #define Normal 0
6275 #define ForceOff 1
6276 #define ForceON 2
6277 uint32_t ForceThreadDispatchEnable;
6278 #define INTERP_PIXEL 0
6279 #define INTERP_CENTROID 2
6280 #define INTERP_SAMPLE 3
6281 uint32_t PositionZWInterpolationMode;
6282 uint32_t BarycentricInterpolationMode;
6283 #define _05pixels 0
6284 #define _10pixels 1
6285 #define _20pixels 2
6286 #define _40pixels 3
6287 uint32_t LineEndCapAntialiasingRegionWidth;
6288 #define _05pixels 0
6289 #define _10pixels 1
6290 #define _20pixels 2
6291 #define _40pixels 3
6292 uint32_t LineAntialiasingRegionWidth;
6293 bool PolygonStippleEnable;
6294 bool LineStippleEnable;
6295 #define RASTRULE_UPPER_LEFT 0
6296 #define RASTRULE_UPPER_RIGHT 1
6297 uint32_t PointRasterizationRule;
6298 #define Normal 0
6299 #define ForceOff 1
6300 #define ForceON 2
6301 uint32_t ForceKillPixelEnable;
6302 };
6303
6304 static inline void
6305 GEN9_3DSTATE_WM_pack(__gen_user_data *data, void * restrict dst,
6306 const struct GEN9_3DSTATE_WM * restrict values)
6307 {
6308 uint32_t *dw = (uint32_t * restrict) dst;
6309
6310 dw[0] =
6311 __gen_field(values->CommandType, 29, 31) |
6312 __gen_field(values->CommandSubType, 27, 28) |
6313 __gen_field(values->_3DCommandOpcode, 24, 26) |
6314 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
6315 __gen_field(values->DwordLength, 0, 7) |
6316 0;
6317
6318 dw[1] =
6319 __gen_field(values->StatisticsEnable, 31, 31) |
6320 __gen_field(values->LegacyDepthBufferClearEnable, 30, 30) |
6321 __gen_field(values->LegacyDepthBufferResolveEnable, 28, 28) |
6322 __gen_field(values->LegacyHierarchicalDepthBufferResolveEnable, 27, 27) |
6323 __gen_field(values->LegacyDiamondLineRasterization, 26, 26) |
6324 __gen_field(values->EarlyDepthStencilControl, 21, 22) |
6325 __gen_field(values->ForceThreadDispatchEnable, 19, 20) |
6326 __gen_field(values->PositionZWInterpolationMode, 17, 18) |
6327 __gen_field(values->BarycentricInterpolationMode, 11, 16) |
6328 __gen_field(values->LineEndCapAntialiasingRegionWidth, 8, 9) |
6329 __gen_field(values->LineAntialiasingRegionWidth, 6, 7) |
6330 __gen_field(values->PolygonStippleEnable, 4, 4) |
6331 __gen_field(values->LineStippleEnable, 3, 3) |
6332 __gen_field(values->PointRasterizationRule, 2, 2) |
6333 __gen_field(values->ForceKillPixelEnable, 0, 1) |
6334 0;
6335
6336 }
6337
6338 #define GEN9_3DSTATE_WM_CHROMAKEY_length_bias 0x00000002
6339 #define GEN9_3DSTATE_WM_CHROMAKEY_header \
6340 .CommandType = 3, \
6341 .CommandSubType = 3, \
6342 ._3DCommandOpcode = 0, \
6343 ._3DCommandSubOpcode = 76, \
6344 .DwordLength = 0
6345
6346 #define GEN9_3DSTATE_WM_CHROMAKEY_length 0x00000002
6347
6348 struct GEN9_3DSTATE_WM_CHROMAKEY {
6349 uint32_t CommandType;
6350 uint32_t CommandSubType;
6351 uint32_t _3DCommandOpcode;
6352 uint32_t _3DCommandSubOpcode;
6353 uint32_t DwordLength;
6354 bool ChromaKeyKillEnable;
6355 };
6356
6357 static inline void
6358 GEN9_3DSTATE_WM_CHROMAKEY_pack(__gen_user_data *data, void * restrict dst,
6359 const struct GEN9_3DSTATE_WM_CHROMAKEY * restrict values)
6360 {
6361 uint32_t *dw = (uint32_t * restrict) dst;
6362
6363 dw[0] =
6364 __gen_field(values->CommandType, 29, 31) |
6365 __gen_field(values->CommandSubType, 27, 28) |
6366 __gen_field(values->_3DCommandOpcode, 24, 26) |
6367 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
6368 __gen_field(values->DwordLength, 0, 7) |
6369 0;
6370
6371 dw[1] =
6372 __gen_field(values->ChromaKeyKillEnable, 31, 31) |
6373 0;
6374
6375 }
6376
6377 #define GEN9_3DSTATE_WM_DEPTH_STENCIL_length_bias 0x00000002
6378 #define GEN9_3DSTATE_WM_DEPTH_STENCIL_header \
6379 .CommandType = 3, \
6380 .CommandSubType = 3, \
6381 ._3DCommandOpcode = 0, \
6382 ._3DCommandSubOpcode = 78, \
6383 .DwordLength = 2
6384
6385 #define GEN9_3DSTATE_WM_DEPTH_STENCIL_length 0x00000004
6386
6387 struct GEN9_3DSTATE_WM_DEPTH_STENCIL {
6388 uint32_t CommandType;
6389 uint32_t CommandSubType;
6390 uint32_t _3DCommandOpcode;
6391 uint32_t _3DCommandSubOpcode;
6392 uint32_t DwordLength;
6393 uint32_t StencilFailOp;
6394 uint32_t StencilPassDepthFailOp;
6395 uint32_t StencilPassDepthPassOp;
6396 uint32_t BackfaceStencilTestFunction;
6397 uint32_t BackfaceStencilFailOp;
6398 uint32_t BackfaceStencilPassDepthFailOp;
6399 uint32_t BackfaceStencilPassDepthPassOp;
6400 uint32_t StencilTestFunction;
6401 uint32_t DepthTestFunction;
6402 bool DoubleSidedStencilEnable;
6403 bool StencilTestEnable;
6404 bool StencilBufferWriteEnable;
6405 bool DepthTestEnable;
6406 bool DepthBufferWriteEnable;
6407 uint32_t StencilTestMask;
6408 uint32_t StencilWriteMask;
6409 uint32_t BackfaceStencilTestMask;
6410 uint32_t BackfaceStencilWriteMask;
6411 uint32_t StencilReferenceValue;
6412 uint32_t BackfaceStencilReferenceValue;
6413 };
6414
6415 static inline void
6416 GEN9_3DSTATE_WM_DEPTH_STENCIL_pack(__gen_user_data *data, void * restrict dst,
6417 const struct GEN9_3DSTATE_WM_DEPTH_STENCIL * restrict values)
6418 {
6419 uint32_t *dw = (uint32_t * restrict) dst;
6420
6421 dw[0] =
6422 __gen_field(values->CommandType, 29, 31) |
6423 __gen_field(values->CommandSubType, 27, 28) |
6424 __gen_field(values->_3DCommandOpcode, 24, 26) |
6425 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
6426 __gen_field(values->DwordLength, 0, 7) |
6427 0;
6428
6429 dw[1] =
6430 __gen_field(values->StencilFailOp, 29, 31) |
6431 __gen_field(values->StencilPassDepthFailOp, 26, 28) |
6432 __gen_field(values->StencilPassDepthPassOp, 23, 25) |
6433 __gen_field(values->BackfaceStencilTestFunction, 20, 22) |
6434 __gen_field(values->BackfaceStencilFailOp, 17, 19) |
6435 __gen_field(values->BackfaceStencilPassDepthFailOp, 14, 16) |
6436 __gen_field(values->BackfaceStencilPassDepthPassOp, 11, 13) |
6437 __gen_field(values->StencilTestFunction, 8, 10) |
6438 __gen_field(values->DepthTestFunction, 5, 7) |
6439 __gen_field(values->DoubleSidedStencilEnable, 4, 4) |
6440 __gen_field(values->StencilTestEnable, 3, 3) |
6441 __gen_field(values->StencilBufferWriteEnable, 2, 2) |
6442 __gen_field(values->DepthTestEnable, 1, 1) |
6443 __gen_field(values->DepthBufferWriteEnable, 0, 0) |
6444 0;
6445
6446 dw[2] =
6447 __gen_field(values->StencilTestMask, 24, 31) |
6448 __gen_field(values->StencilWriteMask, 16, 23) |
6449 __gen_field(values->BackfaceStencilTestMask, 8, 15) |
6450 __gen_field(values->BackfaceStencilWriteMask, 0, 7) |
6451 0;
6452
6453 dw[3] =
6454 __gen_field(values->StencilReferenceValue, 8, 15) |
6455 __gen_field(values->BackfaceStencilReferenceValue, 0, 7) |
6456 0;
6457
6458 }
6459
6460 #define GEN9_3DSTATE_WM_HZ_OP_length_bias 0x00000002
6461 #define GEN9_3DSTATE_WM_HZ_OP_header \
6462 .CommandType = 3, \
6463 .CommandSubType = 3, \
6464 ._3DCommandOpcode = 0, \
6465 ._3DCommandSubOpcode = 82, \
6466 .DwordLength = 3
6467
6468 #define GEN9_3DSTATE_WM_HZ_OP_length 0x00000005
6469
6470 struct GEN9_3DSTATE_WM_HZ_OP {
6471 uint32_t CommandType;
6472 uint32_t CommandSubType;
6473 uint32_t _3DCommandOpcode;
6474 uint32_t _3DCommandSubOpcode;
6475 uint32_t DwordLength;
6476 bool StencilBufferClearEnable;
6477 bool DepthBufferClearEnable;
6478 bool ScissorRectangleEnable;
6479 bool DepthBufferResolveEnable;
6480 bool HierarchicalDepthBufferResolveEnable;
6481 uint32_t PixelPositionOffsetEnable;
6482 bool FullSurfaceDepthClear;
6483 uint32_t StencilClearValue;
6484 uint32_t NumberofMultisamples;
6485 uint32_t ClearRectangleYMin;
6486 uint32_t ClearRectangleXMin;
6487 uint32_t ClearRectangleYMax;
6488 uint32_t ClearRectangleXMax;
6489 uint32_t SampleMask;
6490 };
6491
6492 static inline void
6493 GEN9_3DSTATE_WM_HZ_OP_pack(__gen_user_data *data, void * restrict dst,
6494 const struct GEN9_3DSTATE_WM_HZ_OP * restrict values)
6495 {
6496 uint32_t *dw = (uint32_t * restrict) dst;
6497
6498 dw[0] =
6499 __gen_field(values->CommandType, 29, 31) |
6500 __gen_field(values->CommandSubType, 27, 28) |
6501 __gen_field(values->_3DCommandOpcode, 24, 26) |
6502 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
6503 __gen_field(values->DwordLength, 0, 7) |
6504 0;
6505
6506 dw[1] =
6507 __gen_field(values->StencilBufferClearEnable, 31, 31) |
6508 __gen_field(values->DepthBufferClearEnable, 30, 30) |
6509 __gen_field(values->ScissorRectangleEnable, 29, 29) |
6510 __gen_field(values->DepthBufferResolveEnable, 28, 28) |
6511 __gen_field(values->HierarchicalDepthBufferResolveEnable, 27, 27) |
6512 __gen_field(values->PixelPositionOffsetEnable, 26, 26) |
6513 __gen_field(values->FullSurfaceDepthClear, 25, 25) |
6514 __gen_field(values->StencilClearValue, 16, 23) |
6515 __gen_field(values->NumberofMultisamples, 13, 15) |
6516 0;
6517
6518 dw[2] =
6519 __gen_field(values->ClearRectangleYMin, 16, 31) |
6520 __gen_field(values->ClearRectangleXMin, 0, 15) |
6521 0;
6522
6523 dw[3] =
6524 __gen_field(values->ClearRectangleYMax, 16, 31) |
6525 __gen_field(values->ClearRectangleXMax, 0, 15) |
6526 0;
6527
6528 dw[4] =
6529 __gen_field(values->SampleMask, 0, 15) |
6530 0;
6531
6532 }
6533
6534 #define GEN9_GPGPU_WALKER_length_bias 0x00000002
6535 #define GEN9_GPGPU_WALKER_header \
6536 .CommandType = 3, \
6537 .Pipeline = 2, \
6538 .MediaCommandOpcode = 1, \
6539 .SubOpcode = 5, \
6540 .DwordLength = 13
6541
6542 #define GEN9_GPGPU_WALKER_length 0x0000000f
6543
6544 struct GEN9_GPGPU_WALKER {
6545 uint32_t CommandType;
6546 uint32_t Pipeline;
6547 uint32_t MediaCommandOpcode;
6548 uint32_t SubOpcode;
6549 bool IndirectParameterEnable;
6550 bool PredicateEnable;
6551 uint32_t DwordLength;
6552 uint32_t InterfaceDescriptorOffset;
6553 uint32_t IndirectDataLength;
6554 uint32_t IndirectDataStartAddress;
6555 #define SIMD8 0
6556 #define SIMD16 1
6557 #define SIMD32 2
6558 uint32_t SIMDSize;
6559 uint32_t ThreadDepthCounterMaximum;
6560 uint32_t ThreadHeightCounterMaximum;
6561 uint32_t ThreadWidthCounterMaximum;
6562 uint32_t ThreadGroupIDStartingX;
6563 uint32_t ThreadGroupIDXDimension;
6564 uint32_t ThreadGroupIDStartingY;
6565 uint32_t ThreadGroupIDYDimension;
6566 uint32_t ThreadGroupIDStartingResumeZ;
6567 uint32_t ThreadGroupIDZDimension;
6568 uint32_t RightExecutionMask;
6569 uint32_t BottomExecutionMask;
6570 };
6571
6572 static inline void
6573 GEN9_GPGPU_WALKER_pack(__gen_user_data *data, void * restrict dst,
6574 const struct GEN9_GPGPU_WALKER * restrict values)
6575 {
6576 uint32_t *dw = (uint32_t * restrict) dst;
6577
6578 dw[0] =
6579 __gen_field(values->CommandType, 29, 31) |
6580 __gen_field(values->Pipeline, 27, 28) |
6581 __gen_field(values->MediaCommandOpcode, 24, 26) |
6582 __gen_field(values->SubOpcode, 16, 23) |
6583 __gen_field(values->IndirectParameterEnable, 10, 10) |
6584 __gen_field(values->PredicateEnable, 8, 8) |
6585 __gen_field(values->DwordLength, 0, 7) |
6586 0;
6587
6588 dw[1] =
6589 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6590 0;
6591
6592 dw[2] =
6593 __gen_field(values->IndirectDataLength, 0, 16) |
6594 0;
6595
6596 dw[3] =
6597 __gen_offset(values->IndirectDataStartAddress, 6, 31) |
6598 0;
6599
6600 dw[4] =
6601 __gen_field(values->SIMDSize, 30, 31) |
6602 __gen_field(values->ThreadDepthCounterMaximum, 16, 21) |
6603 __gen_field(values->ThreadHeightCounterMaximum, 8, 13) |
6604 __gen_field(values->ThreadWidthCounterMaximum, 0, 5) |
6605 0;
6606
6607 dw[5] =
6608 __gen_field(values->ThreadGroupIDStartingX, 0, 31) |
6609 0;
6610
6611 dw[6] =
6612 0;
6613
6614 dw[7] =
6615 __gen_field(values->ThreadGroupIDXDimension, 0, 31) |
6616 0;
6617
6618 dw[8] =
6619 __gen_field(values->ThreadGroupIDStartingY, 0, 31) |
6620 0;
6621
6622 dw[9] =
6623 0;
6624
6625 dw[10] =
6626 __gen_field(values->ThreadGroupIDYDimension, 0, 31) |
6627 0;
6628
6629 dw[11] =
6630 __gen_field(values->ThreadGroupIDStartingResumeZ, 0, 31) |
6631 0;
6632
6633 dw[12] =
6634 __gen_field(values->ThreadGroupIDZDimension, 0, 31) |
6635 0;
6636
6637 dw[13] =
6638 __gen_field(values->RightExecutionMask, 0, 31) |
6639 0;
6640
6641 dw[14] =
6642 __gen_field(values->BottomExecutionMask, 0, 31) |
6643 0;
6644
6645 }
6646
6647 #define GEN9_MEDIA_CURBE_LOAD_length_bias 0x00000002
6648 #define GEN9_MEDIA_CURBE_LOAD_header \
6649 .CommandType = 3, \
6650 .Pipeline = 2, \
6651 .MediaCommandOpcode = 0, \
6652 .SubOpcode = 1, \
6653 .DwordLength = 2
6654
6655 #define GEN9_MEDIA_CURBE_LOAD_length 0x00000004
6656
6657 struct GEN9_MEDIA_CURBE_LOAD {
6658 uint32_t CommandType;
6659 uint32_t Pipeline;
6660 uint32_t MediaCommandOpcode;
6661 uint32_t SubOpcode;
6662 uint32_t DwordLength;
6663 uint32_t CURBETotalDataLength;
6664 uint32_t CURBEDataStartAddress;
6665 };
6666
6667 static inline void
6668 GEN9_MEDIA_CURBE_LOAD_pack(__gen_user_data *data, void * restrict dst,
6669 const struct GEN9_MEDIA_CURBE_LOAD * restrict values)
6670 {
6671 uint32_t *dw = (uint32_t * restrict) dst;
6672
6673 dw[0] =
6674 __gen_field(values->CommandType, 29, 31) |
6675 __gen_field(values->Pipeline, 27, 28) |
6676 __gen_field(values->MediaCommandOpcode, 24, 26) |
6677 __gen_field(values->SubOpcode, 16, 23) |
6678 __gen_field(values->DwordLength, 0, 15) |
6679 0;
6680
6681 dw[1] =
6682 0;
6683
6684 dw[2] =
6685 __gen_field(values->CURBETotalDataLength, 0, 16) |
6686 0;
6687
6688 dw[3] =
6689 __gen_field(values->CURBEDataStartAddress, 0, 31) |
6690 0;
6691
6692 }
6693
6694 #define GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length_bias 0x00000002
6695 #define GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_header\
6696 .CommandType = 3, \
6697 .Pipeline = 2, \
6698 .MediaCommandOpcode = 0, \
6699 .SubOpcode = 2, \
6700 .DwordLength = 2
6701
6702 #define GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 0x00000004
6703
6704 struct GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD {
6705 uint32_t CommandType;
6706 uint32_t Pipeline;
6707 uint32_t MediaCommandOpcode;
6708 uint32_t SubOpcode;
6709 uint32_t DwordLength;
6710 uint32_t InterfaceDescriptorTotalLength;
6711 uint32_t InterfaceDescriptorDataStartAddress;
6712 };
6713
6714 static inline void
6715 GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_pack(__gen_user_data *data, void * restrict dst,
6716 const struct GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD * restrict values)
6717 {
6718 uint32_t *dw = (uint32_t * restrict) dst;
6719
6720 dw[0] =
6721 __gen_field(values->CommandType, 29, 31) |
6722 __gen_field(values->Pipeline, 27, 28) |
6723 __gen_field(values->MediaCommandOpcode, 24, 26) |
6724 __gen_field(values->SubOpcode, 16, 23) |
6725 __gen_field(values->DwordLength, 0, 15) |
6726 0;
6727
6728 dw[1] =
6729 0;
6730
6731 dw[2] =
6732 __gen_field(values->InterfaceDescriptorTotalLength, 0, 16) |
6733 0;
6734
6735 dw[3] =
6736 __gen_offset(values->InterfaceDescriptorDataStartAddress, 0, 31) |
6737 0;
6738
6739 }
6740
6741 #define GEN9_MEDIA_OBJECT_length_bias 0x00000002
6742 #define GEN9_MEDIA_OBJECT_header \
6743 .CommandType = 3, \
6744 .MediaCommandPipeline = 2, \
6745 .MediaCommandOpcode = 1, \
6746 .MediaCommandSubOpcode = 0
6747
6748 #define GEN9_MEDIA_OBJECT_length 0x00000000
6749
6750 struct GEN9_MEDIA_OBJECT {
6751 uint32_t CommandType;
6752 uint32_t MediaCommandPipeline;
6753 uint32_t MediaCommandOpcode;
6754 uint32_t MediaCommandSubOpcode;
6755 uint32_t DwordLength;
6756 uint32_t InterfaceDescriptorOffset;
6757 bool ChildrenPresent;
6758 uint32_t SliceDestinationSelectMSBs;
6759 #define Nothreadsynchronization 0
6760 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
6761 uint32_t ThreadSynchronization;
6762 uint32_t ForceDestination;
6763 #define Notusingscoreboard 0
6764 #define Usingscoreboard 1
6765 uint32_t UseScoreboard;
6766 #define Slice0 0
6767 #define Slice1 1
6768 #define Slice2 2
6769 uint32_t SliceDestinationSelect;
6770 #define Subslice3 3
6771 #define SubSlice2 2
6772 #define SubSlice1 1
6773 #define SubSlice0 0
6774 uint32_t SubSliceDestinationSelect;
6775 uint32_t IndirectDataLength;
6776 __gen_address_type IndirectDataStartAddress;
6777 uint32_t ScoredboardY;
6778 uint32_t ScoreboardX;
6779 uint32_t ScoreboardColor;
6780 bool ScoreboardMask;
6781 /* variable length fields follow */
6782 };
6783
6784 static inline void
6785 GEN9_MEDIA_OBJECT_pack(__gen_user_data *data, void * restrict dst,
6786 const struct GEN9_MEDIA_OBJECT * restrict values)
6787 {
6788 uint32_t *dw = (uint32_t * restrict) dst;
6789
6790 dw[0] =
6791 __gen_field(values->CommandType, 29, 31) |
6792 __gen_field(values->MediaCommandPipeline, 27, 28) |
6793 __gen_field(values->MediaCommandOpcode, 24, 26) |
6794 __gen_field(values->MediaCommandSubOpcode, 16, 23) |
6795 __gen_field(values->DwordLength, 0, 15) |
6796 0;
6797
6798 dw[1] =
6799 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6800 0;
6801
6802 dw[2] =
6803 __gen_field(values->ChildrenPresent, 31, 31) |
6804 __gen_field(values->SliceDestinationSelectMSBs, 25, 26) |
6805 __gen_field(values->ThreadSynchronization, 24, 24) |
6806 __gen_field(values->ForceDestination, 22, 22) |
6807 __gen_field(values->UseScoreboard, 21, 21) |
6808 __gen_field(values->SliceDestinationSelect, 19, 20) |
6809 __gen_field(values->SubSliceDestinationSelect, 17, 18) |
6810 __gen_field(values->IndirectDataLength, 0, 16) |
6811 0;
6812
6813 uint32_t dw3 =
6814 0;
6815
6816 dw[3] =
6817 __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, dw3);
6818
6819 dw[4] =
6820 __gen_field(values->ScoredboardY, 16, 24) |
6821 __gen_field(values->ScoreboardX, 0, 8) |
6822 0;
6823
6824 dw[5] =
6825 __gen_field(values->ScoreboardColor, 16, 19) |
6826 __gen_field(values->ScoreboardMask, 0, 7) |
6827 0;
6828
6829 /* variable length fields follow */
6830 }
6831
6832 #define GEN9_MEDIA_OBJECT_GRPID_length_bias 0x00000002
6833 #define GEN9_MEDIA_OBJECT_GRPID_header \
6834 .CommandType = 3, \
6835 .MediaCommandPipeline = 2, \
6836 .MediaCommandOpcode = 1, \
6837 .MediaCommandSubOpcode = 6
6838
6839 #define GEN9_MEDIA_OBJECT_GRPID_length 0x00000000
6840
6841 struct GEN9_MEDIA_OBJECT_GRPID {
6842 uint32_t CommandType;
6843 uint32_t MediaCommandPipeline;
6844 uint32_t MediaCommandOpcode;
6845 uint32_t MediaCommandSubOpcode;
6846 uint32_t DwordLength;
6847 uint32_t InterfaceDescriptorOffset;
6848 uint32_t SliceDestinationSelectMSB;
6849 uint32_t EndofThreadGroup;
6850 uint32_t ForceDestination;
6851 #define Notusingscoreboard 0
6852 #define Usingscoreboard 1
6853 uint32_t UseScoreboard;
6854 #define Slice0 0
6855 #define Slice1 1
6856 #define Slice2 2
6857 uint32_t SliceDestinationSelect;
6858 #define Subslice3 3
6859 #define SubSlice2 2
6860 #define SubSlice1 1
6861 #define SubSlice0 0
6862 uint32_t SubSliceDestinationSelect;
6863 uint32_t IndirectDataLength;
6864 __gen_address_type IndirectDataStartAddress;
6865 uint32_t ScoreboardY;
6866 uint32_t ScoreboardX;
6867 uint32_t ScoreboardColor;
6868 bool ScoreboardMask;
6869 uint32_t GroupID;
6870 /* variable length fields follow */
6871 };
6872
6873 static inline void
6874 GEN9_MEDIA_OBJECT_GRPID_pack(__gen_user_data *data, void * restrict dst,
6875 const struct GEN9_MEDIA_OBJECT_GRPID * restrict values)
6876 {
6877 uint32_t *dw = (uint32_t * restrict) dst;
6878
6879 dw[0] =
6880 __gen_field(values->CommandType, 29, 31) |
6881 __gen_field(values->MediaCommandPipeline, 27, 28) |
6882 __gen_field(values->MediaCommandOpcode, 24, 26) |
6883 __gen_field(values->MediaCommandSubOpcode, 16, 23) |
6884 __gen_field(values->DwordLength, 0, 15) |
6885 0;
6886
6887 dw[1] =
6888 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6889 0;
6890
6891 dw[2] =
6892 __gen_field(values->SliceDestinationSelectMSB, 24, 24) |
6893 __gen_field(values->EndofThreadGroup, 23, 23) |
6894 __gen_field(values->ForceDestination, 22, 22) |
6895 __gen_field(values->UseScoreboard, 21, 21) |
6896 __gen_field(values->SliceDestinationSelect, 19, 20) |
6897 __gen_field(values->SubSliceDestinationSelect, 17, 18) |
6898 __gen_field(values->IndirectDataLength, 0, 16) |
6899 0;
6900
6901 uint32_t dw3 =
6902 0;
6903
6904 dw[3] =
6905 __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, dw3);
6906
6907 dw[4] =
6908 __gen_field(values->ScoreboardY, 16, 24) |
6909 __gen_field(values->ScoreboardX, 0, 8) |
6910 0;
6911
6912 dw[5] =
6913 __gen_field(values->ScoreboardColor, 16, 19) |
6914 __gen_field(values->ScoreboardMask, 0, 7) |
6915 0;
6916
6917 dw[6] =
6918 __gen_field(values->GroupID, 0, 31) |
6919 0;
6920
6921 /* variable length fields follow */
6922 }
6923
6924 #define GEN9_MEDIA_OBJECT_PRT_length_bias 0x00000002
6925 #define GEN9_MEDIA_OBJECT_PRT_header \
6926 .CommandType = 3, \
6927 .Pipeline = 2, \
6928 .MediaCommandOpcode = 1, \
6929 .SubOpcode = 2, \
6930 .DwordLength = 14
6931
6932 #define GEN9_MEDIA_OBJECT_PRT_length 0x00000010
6933
6934 struct GEN9_MEDIA_OBJECT_PRT {
6935 uint32_t CommandType;
6936 uint32_t Pipeline;
6937 uint32_t MediaCommandOpcode;
6938 uint32_t SubOpcode;
6939 uint32_t DwordLength;
6940 uint32_t InterfaceDescriptorOffset;
6941 bool ChildrenPresent;
6942 bool PRT_FenceNeeded;
6943 #define Rootthreadqueue 0
6944 #define VFEstateflush 1
6945 uint32_t PRT_FenceType;
6946 uint32_t InlineData[12];
6947 };
6948
6949 static inline void
6950 GEN9_MEDIA_OBJECT_PRT_pack(__gen_user_data *data, void * restrict dst,
6951 const struct GEN9_MEDIA_OBJECT_PRT * restrict values)
6952 {
6953 uint32_t *dw = (uint32_t * restrict) dst;
6954
6955 dw[0] =
6956 __gen_field(values->CommandType, 29, 31) |
6957 __gen_field(values->Pipeline, 27, 28) |
6958 __gen_field(values->MediaCommandOpcode, 24, 26) |
6959 __gen_field(values->SubOpcode, 16, 23) |
6960 __gen_field(values->DwordLength, 0, 15) |
6961 0;
6962
6963 dw[1] =
6964 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6965 0;
6966
6967 dw[2] =
6968 __gen_field(values->ChildrenPresent, 31, 31) |
6969 __gen_field(values->PRT_FenceNeeded, 23, 23) |
6970 __gen_field(values->PRT_FenceType, 22, 22) |
6971 0;
6972
6973 dw[3] =
6974 0;
6975
6976 for (uint32_t i = 0, j = 4; i < 12; i += 1, j++) {
6977 dw[j] =
6978 __gen_field(values->InlineData[i + 0], 0, 31) |
6979 0;
6980 }
6981
6982 }
6983
6984 #define GEN9_MEDIA_OBJECT_WALKER_length_bias 0x00000002
6985 #define GEN9_MEDIA_OBJECT_WALKER_header \
6986 .CommandType = 3, \
6987 .Pipeline = 2, \
6988 .MediaCommandOpcode = 1, \
6989 .SubOpcode = 3
6990
6991 #define GEN9_MEDIA_OBJECT_WALKER_length 0x00000000
6992
6993 struct GEN9_MEDIA_OBJECT_WALKER {
6994 uint32_t CommandType;
6995 uint32_t Pipeline;
6996 uint32_t MediaCommandOpcode;
6997 uint32_t SubOpcode;
6998 uint32_t DwordLength;
6999 uint32_t InterfaceDescriptorOffset;
7000 #define Nothreadsynchronization 0
7001 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
7002 uint32_t ThreadSynchronization;
7003 uint32_t MaskedDispatch;
7004 #define Notusingscoreboard 0
7005 #define Usingscoreboard 1
7006 uint32_t UseScoreboard;
7007 uint32_t IndirectDataLength;
7008 uint32_t IndirectDataStartAddress;
7009 uint32_t GroupIDLoopSelect;
7010 bool ScoreboardMask;
7011 uint32_t ColorCountMinusOne;
7012 uint32_t MiddleLoopExtraSteps;
7013 uint32_t LocalMidLoopUnitY;
7014 uint32_t MidLoopUnitX;
7015 uint32_t GlobalLoopExecCount;
7016 uint32_t LocalLoopExecCount;
7017 uint32_t BlockResolutionY;
7018 uint32_t BlockResolutionX;
7019 uint32_t LocalStartY;
7020 uint32_t LocalStartX;
7021 uint32_t LocalOuterLoopStrideY;
7022 uint32_t LocalOuterLoopStrideX;
7023 uint32_t LocalInnerLoopUnitY;
7024 uint32_t LocalInnerLoopUnitX;
7025 uint32_t GlobalResolutionY;
7026 uint32_t GlobalResolutionX;
7027 uint32_t GlobalStartY;
7028 uint32_t GlobalStartX;
7029 uint32_t GlobalOuterLoopStrideY;
7030 uint32_t GlobalOuterLoopStrideX;
7031 uint32_t GlobalInnerLoopUnitY;
7032 uint32_t GlobalInnerLoopUnitX;
7033 /* variable length fields follow */
7034 };
7035
7036 static inline void
7037 GEN9_MEDIA_OBJECT_WALKER_pack(__gen_user_data *data, void * restrict dst,
7038 const struct GEN9_MEDIA_OBJECT_WALKER * restrict values)
7039 {
7040 uint32_t *dw = (uint32_t * restrict) dst;
7041
7042 dw[0] =
7043 __gen_field(values->CommandType, 29, 31) |
7044 __gen_field(values->Pipeline, 27, 28) |
7045 __gen_field(values->MediaCommandOpcode, 24, 26) |
7046 __gen_field(values->SubOpcode, 16, 23) |
7047 __gen_field(values->DwordLength, 0, 15) |
7048 0;
7049
7050 dw[1] =
7051 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
7052 0;
7053
7054 dw[2] =
7055 __gen_field(values->ThreadSynchronization, 24, 24) |
7056 __gen_field(values->MaskedDispatch, 22, 23) |
7057 __gen_field(values->UseScoreboard, 21, 21) |
7058 __gen_field(values->IndirectDataLength, 0, 16) |
7059 0;
7060
7061 dw[3] =
7062 __gen_field(values->IndirectDataStartAddress, 0, 31) |
7063 0;
7064
7065 dw[4] =
7066 0;
7067
7068 dw[5] =
7069 __gen_field(values->GroupIDLoopSelect, 8, 31) |
7070 __gen_field(values->ScoreboardMask, 0, 7) |
7071 0;
7072
7073 dw[6] =
7074 __gen_field(values->ColorCountMinusOne, 24, 27) |
7075 __gen_field(values->MiddleLoopExtraSteps, 16, 20) |
7076 __gen_field(values->LocalMidLoopUnitY, 12, 13) |
7077 __gen_field(values->MidLoopUnitX, 8, 9) |
7078 0;
7079
7080 dw[7] =
7081 __gen_field(values->GlobalLoopExecCount, 16, 27) |
7082 __gen_field(values->LocalLoopExecCount, 0, 11) |
7083 0;
7084
7085 dw[8] =
7086 __gen_field(values->BlockResolutionY, 16, 26) |
7087 __gen_field(values->BlockResolutionX, 0, 10) |
7088 0;
7089
7090 dw[9] =
7091 __gen_field(values->LocalStartY, 16, 26) |
7092 __gen_field(values->LocalStartX, 0, 10) |
7093 0;
7094
7095 dw[10] =
7096 0;
7097
7098 dw[11] =
7099 __gen_field(values->LocalOuterLoopStrideY, 16, 27) |
7100 __gen_field(values->LocalOuterLoopStrideX, 0, 11) |
7101 0;
7102
7103 dw[12] =
7104 __gen_field(values->LocalInnerLoopUnitY, 16, 27) |
7105 __gen_field(values->LocalInnerLoopUnitX, 0, 11) |
7106 0;
7107
7108 dw[13] =
7109 __gen_field(values->GlobalResolutionY, 16, 26) |
7110 __gen_field(values->GlobalResolutionX, 0, 10) |
7111 0;
7112
7113 dw[14] =
7114 __gen_field(values->GlobalStartY, 16, 27) |
7115 __gen_field(values->GlobalStartX, 0, 11) |
7116 0;
7117
7118 dw[15] =
7119 __gen_field(values->GlobalOuterLoopStrideY, 16, 27) |
7120 __gen_field(values->GlobalOuterLoopStrideX, 0, 11) |
7121 0;
7122
7123 dw[16] =
7124 __gen_field(values->GlobalInnerLoopUnitY, 16, 27) |
7125 __gen_field(values->GlobalInnerLoopUnitX, 0, 11) |
7126 0;
7127
7128 /* variable length fields follow */
7129 }
7130
7131 #define GEN9_MEDIA_STATE_FLUSH_length_bias 0x00000002
7132 #define GEN9_MEDIA_STATE_FLUSH_header \
7133 .CommandType = 3, \
7134 .Pipeline = 2, \
7135 .MediaCommandOpcode = 0, \
7136 .SubOpcode = 4, \
7137 .DwordLength = 0
7138
7139 #define GEN9_MEDIA_STATE_FLUSH_length 0x00000002
7140
7141 struct GEN9_MEDIA_STATE_FLUSH {
7142 uint32_t CommandType;
7143 uint32_t Pipeline;
7144 uint32_t MediaCommandOpcode;
7145 uint32_t SubOpcode;
7146 uint32_t DwordLength;
7147 bool FlushtoGO;
7148 uint32_t WatermarkRequired;
7149 uint32_t InterfaceDescriptorOffset;
7150 };
7151
7152 static inline void
7153 GEN9_MEDIA_STATE_FLUSH_pack(__gen_user_data *data, void * restrict dst,
7154 const struct GEN9_MEDIA_STATE_FLUSH * restrict values)
7155 {
7156 uint32_t *dw = (uint32_t * restrict) dst;
7157
7158 dw[0] =
7159 __gen_field(values->CommandType, 29, 31) |
7160 __gen_field(values->Pipeline, 27, 28) |
7161 __gen_field(values->MediaCommandOpcode, 24, 26) |
7162 __gen_field(values->SubOpcode, 16, 23) |
7163 __gen_field(values->DwordLength, 0, 15) |
7164 0;
7165
7166 dw[1] =
7167 __gen_field(values->FlushtoGO, 7, 7) |
7168 __gen_field(values->WatermarkRequired, 6, 6) |
7169 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
7170 0;
7171
7172 }
7173
7174 #define GEN9_MEDIA_VFE_STATE_length_bias 0x00000002
7175 #define GEN9_MEDIA_VFE_STATE_header \
7176 .CommandType = 3, \
7177 .Pipeline = 2, \
7178 .MediaCommandOpcode = 0, \
7179 .SubOpcode = 0, \
7180 .DwordLength = 7
7181
7182 #define GEN9_MEDIA_VFE_STATE_length 0x00000009
7183
7184 struct GEN9_MEDIA_VFE_STATE {
7185 uint32_t CommandType;
7186 uint32_t Pipeline;
7187 uint32_t MediaCommandOpcode;
7188 uint32_t SubOpcode;
7189 uint32_t DwordLength;
7190 uint32_t ScratchSpaceBasePointer;
7191 uint32_t StackSize;
7192 uint32_t PerThreadScratchSpace;
7193 uint32_t ScratchSpaceBasePointerHigh;
7194 uint32_t MaximumNumberofThreads;
7195 uint32_t NumberofURBEntries;
7196 #define Maintainingtheexistingtimestampstate 0
7197 #define Resettingrelativetimerandlatchingtheglobaltimestamp 1
7198 uint32_t ResetGatewayTimer;
7199 uint32_t SliceDisable;
7200 uint32_t URBEntryAllocationSize;
7201 uint32_t CURBEAllocationSize;
7202 #define Scoreboarddisabled 0
7203 #define Scoreboardenabled 1
7204 uint32_t ScoreboardEnable;
7205 #define StallingScoreboard 0
7206 #define NonStallingScoreboard 1
7207 uint32_t ScoreboardType;
7208 uint32_t ScoreboardMask;
7209 uint32_t Scoreboard3DeltaY;
7210 uint32_t Scoreboard3DeltaX;
7211 uint32_t Scoreboard2DeltaY;
7212 uint32_t Scoreboard2DeltaX;
7213 uint32_t Scoreboard1DeltaY;
7214 uint32_t Scoreboard1DeltaX;
7215 uint32_t Scoreboard0DeltaY;
7216 uint32_t Scoreboard0DeltaX;
7217 uint32_t Scoreboard7DeltaY;
7218 uint32_t Scoreboard7DeltaX;
7219 uint32_t Scoreboard6DeltaY;
7220 uint32_t Scoreboard6DeltaX;
7221 uint32_t Scoreboard5DeltaY;
7222 uint32_t Scoreboard5DeltaX;
7223 uint32_t Scoreboard4DeltaY;
7224 uint32_t Scoreboard4DeltaX;
7225 };
7226
7227 static inline void
7228 GEN9_MEDIA_VFE_STATE_pack(__gen_user_data *data, void * restrict dst,
7229 const struct GEN9_MEDIA_VFE_STATE * restrict values)
7230 {
7231 uint32_t *dw = (uint32_t * restrict) dst;
7232
7233 dw[0] =
7234 __gen_field(values->CommandType, 29, 31) |
7235 __gen_field(values->Pipeline, 27, 28) |
7236 __gen_field(values->MediaCommandOpcode, 24, 26) |
7237 __gen_field(values->SubOpcode, 16, 23) |
7238 __gen_field(values->DwordLength, 0, 15) |
7239 0;
7240
7241 dw[1] =
7242 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
7243 __gen_field(values->StackSize, 4, 7) |
7244 __gen_field(values->PerThreadScratchSpace, 0, 3) |
7245 0;
7246
7247 dw[2] =
7248 __gen_offset(values->ScratchSpaceBasePointerHigh, 0, 15) |
7249 0;
7250
7251 dw[3] =
7252 __gen_field(values->MaximumNumberofThreads, 16, 31) |
7253 __gen_field(values->NumberofURBEntries, 8, 15) |
7254 __gen_field(values->ResetGatewayTimer, 7, 7) |
7255 0;
7256
7257 dw[4] =
7258 __gen_field(values->SliceDisable, 0, 1) |
7259 0;
7260
7261 dw[5] =
7262 __gen_field(values->URBEntryAllocationSize, 16, 31) |
7263 __gen_field(values->CURBEAllocationSize, 0, 15) |
7264 0;
7265
7266 dw[6] =
7267 __gen_field(values->ScoreboardEnable, 31, 31) |
7268 __gen_field(values->ScoreboardType, 30, 30) |
7269 __gen_field(values->ScoreboardMask, 0, 7) |
7270 0;
7271
7272 dw[7] =
7273 __gen_field(values->Scoreboard3DeltaY, 28, 31) |
7274 __gen_field(values->Scoreboard3DeltaX, 24, 27) |
7275 __gen_field(values->Scoreboard2DeltaY, 20, 23) |
7276 __gen_field(values->Scoreboard2DeltaX, 16, 19) |
7277 __gen_field(values->Scoreboard1DeltaY, 12, 15) |
7278 __gen_field(values->Scoreboard1DeltaX, 8, 11) |
7279 __gen_field(values->Scoreboard0DeltaY, 4, 7) |
7280 __gen_field(values->Scoreboard0DeltaX, 0, 3) |
7281 0;
7282
7283 dw[8] =
7284 __gen_field(values->Scoreboard7DeltaY, 28, 31) |
7285 __gen_field(values->Scoreboard7DeltaX, 24, 27) |
7286 __gen_field(values->Scoreboard6DeltaY, 20, 23) |
7287 __gen_field(values->Scoreboard6DeltaX, 16, 19) |
7288 __gen_field(values->Scoreboard5DeltaY, 12, 15) |
7289 __gen_field(values->Scoreboard5DeltaX, 8, 11) |
7290 __gen_field(values->Scoreboard4DeltaY, 4, 7) |
7291 __gen_field(values->Scoreboard4DeltaX, 0, 3) |
7292 0;
7293
7294 }
7295
7296 #define GEN9_MI_ARB_CHECK_length_bias 0x00000001
7297 #define GEN9_MI_ARB_CHECK_header \
7298 .CommandType = 0, \
7299 .MICommandOpcode = 5
7300
7301 #define GEN9_MI_ARB_CHECK_length 0x00000001
7302
7303 struct GEN9_MI_ARB_CHECK {
7304 uint32_t CommandType;
7305 uint32_t MICommandOpcode;
7306 };
7307
7308 static inline void
7309 GEN9_MI_ARB_CHECK_pack(__gen_user_data *data, void * restrict dst,
7310 const struct GEN9_MI_ARB_CHECK * restrict values)
7311 {
7312 uint32_t *dw = (uint32_t * restrict) dst;
7313
7314 dw[0] =
7315 __gen_field(values->CommandType, 29, 31) |
7316 __gen_field(values->MICommandOpcode, 23, 28) |
7317 0;
7318
7319 }
7320
7321 #define GEN9_MI_BATCH_BUFFER_END_length_bias 0x00000001
7322 #define GEN9_MI_BATCH_BUFFER_END_header \
7323 .CommandType = 0, \
7324 .MICommandOpcode = 10
7325
7326 #define GEN9_MI_BATCH_BUFFER_END_length 0x00000001
7327
7328 struct GEN9_MI_BATCH_BUFFER_END {
7329 uint32_t CommandType;
7330 uint32_t MICommandOpcode;
7331 };
7332
7333 static inline void
7334 GEN9_MI_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
7335 const struct GEN9_MI_BATCH_BUFFER_END * restrict values)
7336 {
7337 uint32_t *dw = (uint32_t * restrict) dst;
7338
7339 dw[0] =
7340 __gen_field(values->CommandType, 29, 31) |
7341 __gen_field(values->MICommandOpcode, 23, 28) |
7342 0;
7343
7344 }
7345
7346 #define GEN9_MI_CLFLUSH_length_bias 0x00000002
7347 #define GEN9_MI_CLFLUSH_header \
7348 .CommandType = 0, \
7349 .MICommandOpcode = 39
7350
7351 #define GEN9_MI_CLFLUSH_length 0x00000000
7352
7353 struct GEN9_MI_CLFLUSH {
7354 uint32_t CommandType;
7355 uint32_t MICommandOpcode;
7356 #define PerProcessGraphicsAddress 0
7357 #define GlobalGraphicsAddress 1
7358 uint32_t UseGlobalGTT;
7359 uint32_t DwordLength;
7360 __gen_address_type PageBaseAddress;
7361 uint32_t StartingCachelineOffset;
7362 /* variable length fields follow */
7363 };
7364
7365 static inline void
7366 GEN9_MI_CLFLUSH_pack(__gen_user_data *data, void * restrict dst,
7367 const struct GEN9_MI_CLFLUSH * restrict values)
7368 {
7369 uint32_t *dw = (uint32_t * restrict) dst;
7370
7371 dw[0] =
7372 __gen_field(values->CommandType, 29, 31) |
7373 __gen_field(values->MICommandOpcode, 23, 28) |
7374 __gen_field(values->UseGlobalGTT, 22, 22) |
7375 __gen_field(values->DwordLength, 0, 9) |
7376 0;
7377
7378 uint32_t dw1 =
7379 __gen_field(values->StartingCachelineOffset, 6, 11) |
7380 0;
7381
7382 uint64_t qw1 =
7383 __gen_combine_address(data, &dw[1], values->PageBaseAddress, dw1);
7384
7385 dw[1] = qw1;
7386 dw[2] = qw1 >> 32;
7387
7388 /* variable length fields follow */
7389 }
7390
7391 #define GEN9_MI_COPY_MEM_MEM_length_bias 0x00000002
7392 #define GEN9_MI_COPY_MEM_MEM_header \
7393 .CommandType = 0, \
7394 .MICommandOpcode = 46, \
7395 .DwordLength = 3
7396
7397 #define GEN9_MI_COPY_MEM_MEM_length 0x00000005
7398
7399 struct GEN9_MI_COPY_MEM_MEM {
7400 uint32_t CommandType;
7401 uint32_t MICommandOpcode;
7402 #define PerProcessGraphicsAddress 0
7403 #define GlobalGraphicsAddress 1
7404 uint32_t UseGlobalGTTSource;
7405 #define PerProcessGraphicsAddress 0
7406 #define GlobalGraphicsAddress 1
7407 uint32_t UseGlobalGTTDestination;
7408 uint32_t DwordLength;
7409 __gen_address_type DestinationMemoryAddress;
7410 __gen_address_type SourceMemoryAddress;
7411 };
7412
7413 static inline void
7414 GEN9_MI_COPY_MEM_MEM_pack(__gen_user_data *data, void * restrict dst,
7415 const struct GEN9_MI_COPY_MEM_MEM * restrict values)
7416 {
7417 uint32_t *dw = (uint32_t * restrict) dst;
7418
7419 dw[0] =
7420 __gen_field(values->CommandType, 29, 31) |
7421 __gen_field(values->MICommandOpcode, 23, 28) |
7422 __gen_field(values->UseGlobalGTTSource, 22, 22) |
7423 __gen_field(values->UseGlobalGTTDestination, 21, 21) |
7424 __gen_field(values->DwordLength, 0, 7) |
7425 0;
7426
7427 uint32_t dw1 =
7428 0;
7429
7430 uint64_t qw1 =
7431 __gen_combine_address(data, &dw[1], values->DestinationMemoryAddress, dw1);
7432
7433 dw[1] = qw1;
7434 dw[2] = qw1 >> 32;
7435
7436 uint32_t dw3 =
7437 0;
7438
7439 uint64_t qw3 =
7440 __gen_combine_address(data, &dw[3], values->SourceMemoryAddress, dw3);
7441
7442 dw[3] = qw3;
7443 dw[4] = qw3 >> 32;
7444
7445 }
7446
7447 #define GEN9_MI_DISPLAY_FLIP_length_bias 0x00000002
7448 #define GEN9_MI_DISPLAY_FLIP_header \
7449 .CommandType = 0, \
7450 .MICommandOpcode = 20
7451
7452 #define GEN9_MI_DISPLAY_FLIP_length 0x00000003
7453
7454 struct GEN9_MI_DISPLAY_FLIP {
7455 uint32_t CommandType;
7456 uint32_t MICommandOpcode;
7457 bool AsyncFlipIndicator;
7458 #define DisplayPlane1 0
7459 #define DisplayPlane2 1
7460 #define DisplayPlane3 2
7461 #define DisplayPlane4 4
7462 #define DisplayPlane5 5
7463 #define DisplayPlane6 6
7464 #define DisplayPlane7 7
7465 #define DisplayPlane8 8
7466 #define DisplayPlane9 9
7467 #define DisplayPlane10 10
7468 #define DisplayPlane11 11
7469 #define DisplayPlane12 12
7470 uint32_t DisplayPlaneSelect;
7471 uint32_t DwordLength;
7472 bool Stereoscopic3DMode;
7473 uint32_t DisplayBufferPitch;
7474 #define Linear 0
7475 #define TiledX 1
7476 #define TiledYLegacyYB 4
7477 #define TiledYF 5
7478 bool TileParameter;
7479 __gen_address_type DisplayBufferBaseAddress;
7480 #define SyncFlip 0
7481 #define AsyncFlip 1
7482 #define Stereo3DFlip 2
7483 uint32_t FlipType;
7484 __gen_address_type LeftEyeDisplayBufferBaseAddress;
7485 };
7486
7487 static inline void
7488 GEN9_MI_DISPLAY_FLIP_pack(__gen_user_data *data, void * restrict dst,
7489 const struct GEN9_MI_DISPLAY_FLIP * restrict values)
7490 {
7491 uint32_t *dw = (uint32_t * restrict) dst;
7492
7493 dw[0] =
7494 __gen_field(values->CommandType, 29, 31) |
7495 __gen_field(values->MICommandOpcode, 23, 28) |
7496 __gen_field(values->AsyncFlipIndicator, 22, 22) |
7497 __gen_field(values->DisplayPlaneSelect, 8, 12) |
7498 __gen_field(values->DwordLength, 0, 7) |
7499 0;
7500
7501 dw[1] =
7502 __gen_field(values->Stereoscopic3DMode, 31, 31) |
7503 __gen_field(values->DisplayBufferPitch, 6, 15) |
7504 __gen_field(values->TileParameter, 0, 2) |
7505 0;
7506
7507 uint32_t dw2 =
7508 __gen_field(values->FlipType, 0, 1) |
7509 0;
7510
7511 dw[2] =
7512 __gen_combine_address(data, &dw[2], values->DisplayBufferBaseAddress, dw2);
7513
7514 uint32_t dw3 =
7515 0;
7516
7517 dw[3] =
7518 __gen_combine_address(data, &dw[3], values->LeftEyeDisplayBufferBaseAddress, dw3);
7519
7520 }
7521
7522 #define GEN9_MI_LOAD_REGISTER_MEM_length_bias 0x00000002
7523 #define GEN9_MI_LOAD_REGISTER_MEM_header \
7524 .CommandType = 0, \
7525 .MICommandOpcode = 41, \
7526 .DwordLength = 2
7527
7528 #define GEN9_MI_LOAD_REGISTER_MEM_length 0x00000004
7529
7530 struct GEN9_MI_LOAD_REGISTER_MEM {
7531 uint32_t CommandType;
7532 uint32_t MICommandOpcode;
7533 bool UseGlobalGTT;
7534 uint32_t AsyncModeEnable;
7535 uint32_t DwordLength;
7536 uint32_t RegisterAddress;
7537 __gen_address_type MemoryAddress;
7538 };
7539
7540 static inline void
7541 GEN9_MI_LOAD_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
7542 const struct GEN9_MI_LOAD_REGISTER_MEM * restrict values)
7543 {
7544 uint32_t *dw = (uint32_t * restrict) dst;
7545
7546 dw[0] =
7547 __gen_field(values->CommandType, 29, 31) |
7548 __gen_field(values->MICommandOpcode, 23, 28) |
7549 __gen_field(values->UseGlobalGTT, 22, 22) |
7550 __gen_field(values->AsyncModeEnable, 21, 21) |
7551 __gen_field(values->DwordLength, 0, 7) |
7552 0;
7553
7554 dw[1] =
7555 __gen_offset(values->RegisterAddress, 2, 22) |
7556 0;
7557
7558 uint32_t dw2 =
7559 0;
7560
7561 uint64_t qw2 =
7562 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
7563
7564 dw[2] = qw2;
7565 dw[3] = qw2 >> 32;
7566
7567 }
7568
7569 #define GEN9_MI_LOAD_SCAN_LINES_EXCL_length_bias 0x00000002
7570 #define GEN9_MI_LOAD_SCAN_LINES_EXCL_header \
7571 .CommandType = 0, \
7572 .MICommandOpcode = 19, \
7573 .DwordLength = 0
7574
7575 #define GEN9_MI_LOAD_SCAN_LINES_EXCL_length 0x00000002
7576
7577 struct GEN9_MI_LOAD_SCAN_LINES_EXCL {
7578 uint32_t CommandType;
7579 uint32_t MICommandOpcode;
7580 #define DisplayPlaneA 0
7581 #define DisplayPlaneB 1
7582 #define DisplayPlaneC 4
7583 uint32_t DisplayPlaneSelect;
7584 uint32_t DwordLength;
7585 uint32_t StartScanLineNumber;
7586 uint32_t EndScanLineNumber;
7587 };
7588
7589 static inline void
7590 GEN9_MI_LOAD_SCAN_LINES_EXCL_pack(__gen_user_data *data, void * restrict dst,
7591 const struct GEN9_MI_LOAD_SCAN_LINES_EXCL * restrict values)
7592 {
7593 uint32_t *dw = (uint32_t * restrict) dst;
7594
7595 dw[0] =
7596 __gen_field(values->CommandType, 29, 31) |
7597 __gen_field(values->MICommandOpcode, 23, 28) |
7598 __gen_field(values->DisplayPlaneSelect, 19, 21) |
7599 __gen_field(values->DwordLength, 0, 5) |
7600 0;
7601
7602 dw[1] =
7603 __gen_field(values->StartScanLineNumber, 16, 28) |
7604 __gen_field(values->EndScanLineNumber, 0, 12) |
7605 0;
7606
7607 }
7608
7609 #define GEN9_MI_LOAD_SCAN_LINES_INCL_length_bias 0x00000002
7610 #define GEN9_MI_LOAD_SCAN_LINES_INCL_header \
7611 .CommandType = 0, \
7612 .MICommandOpcode = 18, \
7613 .DwordLength = 0
7614
7615 #define GEN9_MI_LOAD_SCAN_LINES_INCL_length 0x00000002
7616
7617 struct GEN9_MI_LOAD_SCAN_LINES_INCL {
7618 uint32_t CommandType;
7619 uint32_t MICommandOpcode;
7620 #define DisplayPlane1A 0
7621 #define DisplayPlane1B 1
7622 #define DisplayPlane1C 4
7623 uint32_t DisplayPlaneSelect;
7624 #define NeverForward 0
7625 #define AlwaysForward 1
7626 #define ConditionallyForward 2
7627 bool ScanLineEventDoneForward;
7628 uint32_t DwordLength;
7629 uint32_t StartScanLineNumber;
7630 uint32_t EndScanLineNumber;
7631 };
7632
7633 static inline void
7634 GEN9_MI_LOAD_SCAN_LINES_INCL_pack(__gen_user_data *data, void * restrict dst,
7635 const struct GEN9_MI_LOAD_SCAN_LINES_INCL * restrict values)
7636 {
7637 uint32_t *dw = (uint32_t * restrict) dst;
7638
7639 dw[0] =
7640 __gen_field(values->CommandType, 29, 31) |
7641 __gen_field(values->MICommandOpcode, 23, 28) |
7642 __gen_field(values->DisplayPlaneSelect, 19, 21) |
7643 __gen_field(values->ScanLineEventDoneForward, 17, 18) |
7644 __gen_field(values->DwordLength, 0, 5) |
7645 0;
7646
7647 dw[1] =
7648 __gen_field(values->StartScanLineNumber, 16, 28) |
7649 __gen_field(values->EndScanLineNumber, 0, 12) |
7650 0;
7651
7652 }
7653
7654 #define GEN9_MI_LOAD_URB_MEM_length_bias 0x00000002
7655 #define GEN9_MI_LOAD_URB_MEM_header \
7656 .CommandType = 0, \
7657 .MICommandOpcode = 44, \
7658 .DwordLength = 2
7659
7660 #define GEN9_MI_LOAD_URB_MEM_length 0x00000004
7661
7662 struct GEN9_MI_LOAD_URB_MEM {
7663 uint32_t CommandType;
7664 uint32_t MICommandOpcode;
7665 uint32_t DwordLength;
7666 uint32_t URBAddress;
7667 __gen_address_type MemoryAddress;
7668 };
7669
7670 static inline void
7671 GEN9_MI_LOAD_URB_MEM_pack(__gen_user_data *data, void * restrict dst,
7672 const struct GEN9_MI_LOAD_URB_MEM * restrict values)
7673 {
7674 uint32_t *dw = (uint32_t * restrict) dst;
7675
7676 dw[0] =
7677 __gen_field(values->CommandType, 29, 31) |
7678 __gen_field(values->MICommandOpcode, 23, 28) |
7679 __gen_field(values->DwordLength, 0, 7) |
7680 0;
7681
7682 dw[1] =
7683 __gen_field(values->URBAddress, 2, 14) |
7684 0;
7685
7686 uint32_t dw2 =
7687 0;
7688
7689 uint64_t qw2 =
7690 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
7691
7692 dw[2] = qw2;
7693 dw[3] = qw2 >> 32;
7694
7695 }
7696
7697 #define GEN9_MI_MATH_length_bias 0x00000002
7698 #define GEN9_MI_MATH_header \
7699 .CommandType = 0, \
7700 .MICommandOpcode = 26
7701
7702 #define GEN9_MI_MATH_length 0x00000000
7703
7704 struct GEN9_MI_MATH {
7705 uint32_t CommandType;
7706 uint32_t MICommandOpcode;
7707 uint32_t DwordLength;
7708 uint32_t ALUINSTRUCTION1;
7709 uint32_t ALUINSTRUCTION2;
7710 /* variable length fields follow */
7711 };
7712
7713 static inline void
7714 GEN9_MI_MATH_pack(__gen_user_data *data, void * restrict dst,
7715 const struct GEN9_MI_MATH * restrict values)
7716 {
7717 uint32_t *dw = (uint32_t * restrict) dst;
7718
7719 dw[0] =
7720 __gen_field(values->CommandType, 29, 31) |
7721 __gen_field(values->MICommandOpcode, 23, 28) |
7722 __gen_field(values->DwordLength, 0, 7) |
7723 0;
7724
7725 dw[1] =
7726 __gen_field(values->ALUINSTRUCTION1, 0, 31) |
7727 0;
7728
7729 dw[2] =
7730 __gen_field(values->ALUINSTRUCTION2, 0, 31) |
7731 0;
7732
7733 /* variable length fields follow */
7734 }
7735
7736 #define GEN9_MI_NOOP_length_bias 0x00000001
7737 #define GEN9_MI_NOOP_header \
7738 .CommandType = 0, \
7739 .MICommandOpcode = 0
7740
7741 #define GEN9_MI_NOOP_length 0x00000001
7742
7743 struct GEN9_MI_NOOP {
7744 uint32_t CommandType;
7745 uint32_t MICommandOpcode;
7746 bool IdentificationNumberRegisterWriteEnable;
7747 uint32_t IdentificationNumber;
7748 };
7749
7750 static inline void
7751 GEN9_MI_NOOP_pack(__gen_user_data *data, void * restrict dst,
7752 const struct GEN9_MI_NOOP * restrict values)
7753 {
7754 uint32_t *dw = (uint32_t * restrict) dst;
7755
7756 dw[0] =
7757 __gen_field(values->CommandType, 29, 31) |
7758 __gen_field(values->MICommandOpcode, 23, 28) |
7759 __gen_field(values->IdentificationNumberRegisterWriteEnable, 22, 22) |
7760 __gen_field(values->IdentificationNumber, 0, 21) |
7761 0;
7762
7763 }
7764
7765 #define GEN9_MI_PREDICATE_length_bias 0x00000001
7766 #define GEN9_MI_PREDICATE_header \
7767 .CommandType = 0, \
7768 .MICommandOpcode = 12
7769
7770 #define GEN9_MI_PREDICATE_length 0x00000001
7771
7772 struct GEN9_MI_PREDICATE {
7773 uint32_t CommandType;
7774 uint32_t MICommandOpcode;
7775 #define LOAD_KEEP 0
7776 #define LOAD_LOAD 2
7777 #define LOAD_LOADINV 3
7778 uint32_t LoadOperation;
7779 #define COMBINE_SET 0
7780 #define COMBINE_AND 1
7781 #define COMBINE_OR 2
7782 #define COMBINE_XOR 3
7783 uint32_t CombineOperation;
7784 #define COMPARE_SRCS_EQUAL 2
7785 #define COMPARE_DELTAS_EQUAL 3
7786 uint32_t CompareOperation;
7787 };
7788
7789 static inline void
7790 GEN9_MI_PREDICATE_pack(__gen_user_data *data, void * restrict dst,
7791 const struct GEN9_MI_PREDICATE * restrict values)
7792 {
7793 uint32_t *dw = (uint32_t * restrict) dst;
7794
7795 dw[0] =
7796 __gen_field(values->CommandType, 29, 31) |
7797 __gen_field(values->MICommandOpcode, 23, 28) |
7798 __gen_field(values->LoadOperation, 6, 7) |
7799 __gen_field(values->CombineOperation, 3, 4) |
7800 __gen_field(values->CompareOperation, 0, 1) |
7801 0;
7802
7803 }
7804
7805 #define GEN9_MI_REPORT_HEAD_length_bias 0x00000001
7806 #define GEN9_MI_REPORT_HEAD_header \
7807 .CommandType = 0, \
7808 .MICommandOpcode = 7
7809
7810 #define GEN9_MI_REPORT_HEAD_length 0x00000001
7811
7812 struct GEN9_MI_REPORT_HEAD {
7813 uint32_t CommandType;
7814 uint32_t MICommandOpcode;
7815 };
7816
7817 static inline void
7818 GEN9_MI_REPORT_HEAD_pack(__gen_user_data *data, void * restrict dst,
7819 const struct GEN9_MI_REPORT_HEAD * restrict values)
7820 {
7821 uint32_t *dw = (uint32_t * restrict) dst;
7822
7823 dw[0] =
7824 __gen_field(values->CommandType, 29, 31) |
7825 __gen_field(values->MICommandOpcode, 23, 28) |
7826 0;
7827
7828 }
7829
7830 #define GEN9_MI_RS_CONTEXT_length_bias 0x00000001
7831 #define GEN9_MI_RS_CONTEXT_header \
7832 .CommandType = 0, \
7833 .MICommandOpcode = 15
7834
7835 #define GEN9_MI_RS_CONTEXT_length 0x00000001
7836
7837 struct GEN9_MI_RS_CONTEXT {
7838 uint32_t CommandType;
7839 uint32_t MICommandOpcode;
7840 #define RS_RESTORE 0
7841 #define RS_SAVE 1
7842 uint32_t ResourceStreamerSave;
7843 };
7844
7845 static inline void
7846 GEN9_MI_RS_CONTEXT_pack(__gen_user_data *data, void * restrict dst,
7847 const struct GEN9_MI_RS_CONTEXT * restrict values)
7848 {
7849 uint32_t *dw = (uint32_t * restrict) dst;
7850
7851 dw[0] =
7852 __gen_field(values->CommandType, 29, 31) |
7853 __gen_field(values->MICommandOpcode, 23, 28) |
7854 __gen_field(values->ResourceStreamerSave, 0, 0) |
7855 0;
7856
7857 }
7858
7859 #define GEN9_MI_RS_CONTROL_length_bias 0x00000001
7860 #define GEN9_MI_RS_CONTROL_header \
7861 .CommandType = 0, \
7862 .MICommandOpcode = 6
7863
7864 #define GEN9_MI_RS_CONTROL_length 0x00000001
7865
7866 struct GEN9_MI_RS_CONTROL {
7867 uint32_t CommandType;
7868 uint32_t MICommandOpcode;
7869 #define RS_STOP 0
7870 #define RS_START 1
7871 uint32_t ResourceStreamerControl;
7872 };
7873
7874 static inline void
7875 GEN9_MI_RS_CONTROL_pack(__gen_user_data *data, void * restrict dst,
7876 const struct GEN9_MI_RS_CONTROL * restrict values)
7877 {
7878 uint32_t *dw = (uint32_t * restrict) dst;
7879
7880 dw[0] =
7881 __gen_field(values->CommandType, 29, 31) |
7882 __gen_field(values->MICommandOpcode, 23, 28) |
7883 __gen_field(values->ResourceStreamerControl, 0, 0) |
7884 0;
7885
7886 }
7887
7888 #define GEN9_MI_RS_STORE_DATA_IMM_length_bias 0x00000002
7889 #define GEN9_MI_RS_STORE_DATA_IMM_header \
7890 .CommandType = 0, \
7891 .MICommandOpcode = 43, \
7892 .DwordLength = 2
7893
7894 #define GEN9_MI_RS_STORE_DATA_IMM_length 0x00000004
7895
7896 struct GEN9_MI_RS_STORE_DATA_IMM {
7897 uint32_t CommandType;
7898 uint32_t MICommandOpcode;
7899 uint32_t DwordLength;
7900 __gen_address_type DestinationAddress;
7901 uint32_t CoreModeEnable;
7902 uint32_t DataDWord0;
7903 };
7904
7905 static inline void
7906 GEN9_MI_RS_STORE_DATA_IMM_pack(__gen_user_data *data, void * restrict dst,
7907 const struct GEN9_MI_RS_STORE_DATA_IMM * restrict values)
7908 {
7909 uint32_t *dw = (uint32_t * restrict) dst;
7910
7911 dw[0] =
7912 __gen_field(values->CommandType, 29, 31) |
7913 __gen_field(values->MICommandOpcode, 23, 28) |
7914 __gen_field(values->DwordLength, 0, 7) |
7915 0;
7916
7917 uint32_t dw1 =
7918 __gen_field(values->CoreModeEnable, 0, 0) |
7919 0;
7920
7921 uint64_t qw1 =
7922 __gen_combine_address(data, &dw[1], values->DestinationAddress, dw1);
7923
7924 dw[1] = qw1;
7925 dw[2] = qw1 >> 32;
7926
7927 dw[3] =
7928 __gen_field(values->DataDWord0, 0, 31) |
7929 0;
7930
7931 }
7932
7933 #define GEN9_MI_SET_CONTEXT_length_bias 0x00000002
7934 #define GEN9_MI_SET_CONTEXT_header \
7935 .CommandType = 0, \
7936 .MICommandOpcode = 24, \
7937 .DwordLength = 0
7938
7939 #define GEN9_MI_SET_CONTEXT_length 0x00000002
7940
7941 struct GEN9_MI_SET_CONTEXT {
7942 uint32_t CommandType;
7943 uint32_t MICommandOpcode;
7944 uint32_t DwordLength;
7945 __gen_address_type LogicalContextAddress;
7946 uint32_t ReservedMustbe1;
7947 bool CoreModeEnable;
7948 bool ResourceStreamerStateSaveEnable;
7949 bool ResourceStreamerStateRestoreEnable;
7950 uint32_t ForceRestore;
7951 uint32_t RestoreInhibit;
7952 };
7953
7954 static inline void
7955 GEN9_MI_SET_CONTEXT_pack(__gen_user_data *data, void * restrict dst,
7956 const struct GEN9_MI_SET_CONTEXT * restrict values)
7957 {
7958 uint32_t *dw = (uint32_t * restrict) dst;
7959
7960 dw[0] =
7961 __gen_field(values->CommandType, 29, 31) |
7962 __gen_field(values->MICommandOpcode, 23, 28) |
7963 __gen_field(values->DwordLength, 0, 7) |
7964 0;
7965
7966 uint32_t dw1 =
7967 __gen_field(values->ReservedMustbe1, 8, 8) |
7968 __gen_field(values->CoreModeEnable, 4, 4) |
7969 __gen_field(values->ResourceStreamerStateSaveEnable, 3, 3) |
7970 __gen_field(values->ResourceStreamerStateRestoreEnable, 2, 2) |
7971 __gen_field(values->ForceRestore, 1, 1) |
7972 __gen_field(values->RestoreInhibit, 0, 0) |
7973 0;
7974
7975 dw[1] =
7976 __gen_combine_address(data, &dw[1], values->LogicalContextAddress, dw1);
7977
7978 }
7979
7980 #define GEN9_MI_SET_PREDICATE_length_bias 0x00000001
7981 #define GEN9_MI_SET_PREDICATE_header \
7982 .CommandType = 0, \
7983 .MICommandOpcode = 1
7984
7985 #define GEN9_MI_SET_PREDICATE_length 0x00000001
7986
7987 struct GEN9_MI_SET_PREDICATE {
7988 uint32_t CommandType;
7989 uint32_t MICommandOpcode;
7990 #define NOOPNever 0
7991 #define NOOPonResult2clear 1
7992 #define NOOPonResult2set 2
7993 #define NOOPonResultclear 3
7994 #define NOOPonResultset 4
7995 #define Executewhenonesliceenabled 5
7996 #define Executewhentwoslicesareenabled 6
7997 #define Executewhenthreeslicesareenabled 7
7998 #define NOOPAlways 15
7999 uint32_t PREDICATEENABLE;
8000 };
8001
8002 static inline void
8003 GEN9_MI_SET_PREDICATE_pack(__gen_user_data *data, void * restrict dst,
8004 const struct GEN9_MI_SET_PREDICATE * restrict values)
8005 {
8006 uint32_t *dw = (uint32_t * restrict) dst;
8007
8008 dw[0] =
8009 __gen_field(values->CommandType, 29, 31) |
8010 __gen_field(values->MICommandOpcode, 23, 28) |
8011 __gen_field(values->PREDICATEENABLE, 0, 3) |
8012 0;
8013
8014 }
8015
8016 #define GEN9_MI_STORE_DATA_INDEX_length_bias 0x00000002
8017 #define GEN9_MI_STORE_DATA_INDEX_header \
8018 .CommandType = 0, \
8019 .MICommandOpcode = 33, \
8020 .DwordLength = 1
8021
8022 #define GEN9_MI_STORE_DATA_INDEX_length 0x00000003
8023
8024 struct GEN9_MI_STORE_DATA_INDEX {
8025 uint32_t CommandType;
8026 uint32_t MICommandOpcode;
8027 uint32_t UsePerProcessHardwareStatusPage;
8028 uint32_t DwordLength;
8029 uint32_t Offset;
8030 uint32_t DataDWord0;
8031 uint32_t DataDWord1;
8032 };
8033
8034 static inline void
8035 GEN9_MI_STORE_DATA_INDEX_pack(__gen_user_data *data, void * restrict dst,
8036 const struct GEN9_MI_STORE_DATA_INDEX * restrict values)
8037 {
8038 uint32_t *dw = (uint32_t * restrict) dst;
8039
8040 dw[0] =
8041 __gen_field(values->CommandType, 29, 31) |
8042 __gen_field(values->MICommandOpcode, 23, 28) |
8043 __gen_field(values->UsePerProcessHardwareStatusPage, 21, 21) |
8044 __gen_field(values->DwordLength, 0, 7) |
8045 0;
8046
8047 dw[1] =
8048 __gen_field(values->Offset, 2, 11) |
8049 0;
8050
8051 dw[2] =
8052 __gen_field(values->DataDWord0, 0, 31) |
8053 0;
8054
8055 dw[3] =
8056 __gen_field(values->DataDWord1, 0, 31) |
8057 0;
8058
8059 }
8060
8061 #define GEN9_MI_STORE_URB_MEM_length_bias 0x00000002
8062 #define GEN9_MI_STORE_URB_MEM_header \
8063 .CommandType = 0, \
8064 .MICommandOpcode = 45, \
8065 .DwordLength = 2
8066
8067 #define GEN9_MI_STORE_URB_MEM_length 0x00000004
8068
8069 struct GEN9_MI_STORE_URB_MEM {
8070 uint32_t CommandType;
8071 uint32_t MICommandOpcode;
8072 uint32_t DwordLength;
8073 uint32_t URBAddress;
8074 __gen_address_type MemoryAddress;
8075 };
8076
8077 static inline void
8078 GEN9_MI_STORE_URB_MEM_pack(__gen_user_data *data, void * restrict dst,
8079 const struct GEN9_MI_STORE_URB_MEM * restrict values)
8080 {
8081 uint32_t *dw = (uint32_t * restrict) dst;
8082
8083 dw[0] =
8084 __gen_field(values->CommandType, 29, 31) |
8085 __gen_field(values->MICommandOpcode, 23, 28) |
8086 __gen_field(values->DwordLength, 0, 7) |
8087 0;
8088
8089 dw[1] =
8090 __gen_field(values->URBAddress, 2, 14) |
8091 0;
8092
8093 uint32_t dw2 =
8094 0;
8095
8096 uint64_t qw2 =
8097 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
8098
8099 dw[2] = qw2;
8100 dw[3] = qw2 >> 32;
8101
8102 }
8103
8104 #define GEN9_MI_SUSPEND_FLUSH_length_bias 0x00000001
8105 #define GEN9_MI_SUSPEND_FLUSH_header \
8106 .CommandType = 0, \
8107 .MICommandOpcode = 11
8108
8109 #define GEN9_MI_SUSPEND_FLUSH_length 0x00000001
8110
8111 struct GEN9_MI_SUSPEND_FLUSH {
8112 uint32_t CommandType;
8113 uint32_t MICommandOpcode;
8114 bool SuspendFlush;
8115 };
8116
8117 static inline void
8118 GEN9_MI_SUSPEND_FLUSH_pack(__gen_user_data *data, void * restrict dst,
8119 const struct GEN9_MI_SUSPEND_FLUSH * restrict values)
8120 {
8121 uint32_t *dw = (uint32_t * restrict) dst;
8122
8123 dw[0] =
8124 __gen_field(values->CommandType, 29, 31) |
8125 __gen_field(values->MICommandOpcode, 23, 28) |
8126 __gen_field(values->SuspendFlush, 0, 0) |
8127 0;
8128
8129 }
8130
8131 #define GEN9_MI_TOPOLOGY_FILTER_length_bias 0x00000001
8132 #define GEN9_MI_TOPOLOGY_FILTER_header \
8133 .CommandType = 0, \
8134 .MICommandOpcode = 13
8135
8136 #define GEN9_MI_TOPOLOGY_FILTER_length 0x00000001
8137
8138 struct GEN9_MI_TOPOLOGY_FILTER {
8139 uint32_t CommandType;
8140 uint32_t MICommandOpcode;
8141 uint32_t TopologyFilterValue;
8142 };
8143
8144 static inline void
8145 GEN9_MI_TOPOLOGY_FILTER_pack(__gen_user_data *data, void * restrict dst,
8146 const struct GEN9_MI_TOPOLOGY_FILTER * restrict values)
8147 {
8148 uint32_t *dw = (uint32_t * restrict) dst;
8149
8150 dw[0] =
8151 __gen_field(values->CommandType, 29, 31) |
8152 __gen_field(values->MICommandOpcode, 23, 28) |
8153 __gen_field(values->TopologyFilterValue, 0, 5) |
8154 0;
8155
8156 }
8157
8158 #define GEN9_MI_UPDATE_GTT_length_bias 0x00000002
8159 #define GEN9_MI_UPDATE_GTT_header \
8160 .CommandType = 0, \
8161 .MICommandOpcode = 35
8162
8163 #define GEN9_MI_UPDATE_GTT_length 0x00000000
8164
8165 struct GEN9_MI_UPDATE_GTT {
8166 uint32_t CommandType;
8167 uint32_t MICommandOpcode;
8168 uint32_t DwordLength;
8169 __gen_address_type EntryAddress;
8170 /* variable length fields follow */
8171 };
8172
8173 static inline void
8174 GEN9_MI_UPDATE_GTT_pack(__gen_user_data *data, void * restrict dst,
8175 const struct GEN9_MI_UPDATE_GTT * restrict values)
8176 {
8177 uint32_t *dw = (uint32_t * restrict) dst;
8178
8179 dw[0] =
8180 __gen_field(values->CommandType, 29, 31) |
8181 __gen_field(values->MICommandOpcode, 23, 28) |
8182 __gen_field(values->DwordLength, 0, 9) |
8183 0;
8184
8185 uint32_t dw1 =
8186 0;
8187
8188 dw[1] =
8189 __gen_combine_address(data, &dw[1], values->EntryAddress, dw1);
8190
8191 /* variable length fields follow */
8192 }
8193
8194 #define GEN9_MI_URB_ATOMIC_ALLOC_length_bias 0x00000001
8195 #define GEN9_MI_URB_ATOMIC_ALLOC_header \
8196 .CommandType = 0, \
8197 .MICommandOpcode = 9
8198
8199 #define GEN9_MI_URB_ATOMIC_ALLOC_length 0x00000001
8200
8201 struct GEN9_MI_URB_ATOMIC_ALLOC {
8202 uint32_t CommandType;
8203 uint32_t MICommandOpcode;
8204 uint32_t URBAtomicStorageOffset;
8205 uint32_t URBAtomicStorageSize;
8206 };
8207
8208 static inline void
8209 GEN9_MI_URB_ATOMIC_ALLOC_pack(__gen_user_data *data, void * restrict dst,
8210 const struct GEN9_MI_URB_ATOMIC_ALLOC * restrict values)
8211 {
8212 uint32_t *dw = (uint32_t * restrict) dst;
8213
8214 dw[0] =
8215 __gen_field(values->CommandType, 29, 31) |
8216 __gen_field(values->MICommandOpcode, 23, 28) |
8217 __gen_field(values->URBAtomicStorageOffset, 12, 19) |
8218 __gen_field(values->URBAtomicStorageSize, 0, 8) |
8219 0;
8220
8221 }
8222
8223 #define GEN9_MI_USER_INTERRUPT_length_bias 0x00000001
8224 #define GEN9_MI_USER_INTERRUPT_header \
8225 .CommandType = 0, \
8226 .MICommandOpcode = 2
8227
8228 #define GEN9_MI_USER_INTERRUPT_length 0x00000001
8229
8230 struct GEN9_MI_USER_INTERRUPT {
8231 uint32_t CommandType;
8232 uint32_t MICommandOpcode;
8233 };
8234
8235 static inline void
8236 GEN9_MI_USER_INTERRUPT_pack(__gen_user_data *data, void * restrict dst,
8237 const struct GEN9_MI_USER_INTERRUPT * restrict values)
8238 {
8239 uint32_t *dw = (uint32_t * restrict) dst;
8240
8241 dw[0] =
8242 __gen_field(values->CommandType, 29, 31) |
8243 __gen_field(values->MICommandOpcode, 23, 28) |
8244 0;
8245
8246 }
8247
8248 #define GEN9_MI_WAIT_FOR_EVENT_length_bias 0x00000001
8249 #define GEN9_MI_WAIT_FOR_EVENT_header \
8250 .CommandType = 0, \
8251 .MICommandOpcode = 3
8252
8253 #define GEN9_MI_WAIT_FOR_EVENT_length 0x00000001
8254
8255 struct GEN9_MI_WAIT_FOR_EVENT {
8256 uint32_t CommandType;
8257 uint32_t MICommandOpcode;
8258 bool DisplayPlane1CVerticalBlankWaitEnable;
8259 bool DisplayPlane6FlipPendingWaitEnable;
8260 bool DisplayPlane12FlipPendingWaitEnable;
8261 bool DisplayPlane11FlipPendingWaitEnable;
8262 bool DisplayPlane10FlipPendingWaitEnable;
8263 bool DisplayPlane9FlipPendingWaitEnable;
8264 bool DisplayPlane3FlipPendingWaitEnable;
8265 bool DisplayPlane1CScanLineWaitEnable;
8266 bool DisplayPlane1BVerticalBlankWaitEnable;
8267 bool DisplayPlane5FlipPendingWaitEnable;
8268 bool DisplayPlane2FlipPendingWaitEnable;
8269 bool DisplayPlane1BScanLineWaitEnable;
8270 bool DisplayPlane8FlipPendingWaitEnable;
8271 bool DisplayPlane7FlipPendingWaitEnable;
8272 bool DisplayPlane1AVerticalBlankWaitEnable;
8273 bool DisplayPlane4FlipPendingWaitEnable;
8274 bool DisplayPlane1FlipPendingWaitEnable;
8275 bool DisplayPlnae1AScanLineWaitEnable;
8276 };
8277
8278 static inline void
8279 GEN9_MI_WAIT_FOR_EVENT_pack(__gen_user_data *data, void * restrict dst,
8280 const struct GEN9_MI_WAIT_FOR_EVENT * restrict values)
8281 {
8282 uint32_t *dw = (uint32_t * restrict) dst;
8283
8284 dw[0] =
8285 __gen_field(values->CommandType, 29, 31) |
8286 __gen_field(values->MICommandOpcode, 23, 28) |
8287 __gen_field(values->DisplayPlane1CVerticalBlankWaitEnable, 21, 21) |
8288 __gen_field(values->DisplayPlane6FlipPendingWaitEnable, 20, 20) |
8289 __gen_field(values->DisplayPlane12FlipPendingWaitEnable, 19, 19) |
8290 __gen_field(values->DisplayPlane11FlipPendingWaitEnable, 18, 18) |
8291 __gen_field(values->DisplayPlane10FlipPendingWaitEnable, 17, 17) |
8292 __gen_field(values->DisplayPlane9FlipPendingWaitEnable, 16, 16) |
8293 __gen_field(values->DisplayPlane3FlipPendingWaitEnable, 15, 15) |
8294 __gen_field(values->DisplayPlane1CScanLineWaitEnable, 14, 14) |
8295 __gen_field(values->DisplayPlane1BVerticalBlankWaitEnable, 11, 11) |
8296 __gen_field(values->DisplayPlane5FlipPendingWaitEnable, 10, 10) |
8297 __gen_field(values->DisplayPlane2FlipPendingWaitEnable, 9, 9) |
8298 __gen_field(values->DisplayPlane1BScanLineWaitEnable, 8, 8) |
8299 __gen_field(values->DisplayPlane8FlipPendingWaitEnable, 7, 7) |
8300 __gen_field(values->DisplayPlane7FlipPendingWaitEnable, 6, 6) |
8301 __gen_field(values->DisplayPlane1AVerticalBlankWaitEnable, 3, 3) |
8302 __gen_field(values->DisplayPlane4FlipPendingWaitEnable, 2, 2) |
8303 __gen_field(values->DisplayPlane1FlipPendingWaitEnable, 1, 1) |
8304 __gen_field(values->DisplayPlnae1AScanLineWaitEnable, 0, 0) |
8305 0;
8306
8307 }
8308
8309 #define GEN9_PIPE_CONTROL_length_bias 0x00000002
8310 #define GEN9_PIPE_CONTROL_header \
8311 .CommandType = 3, \
8312 .CommandSubType = 3, \
8313 ._3DCommandOpcode = 2, \
8314 ._3DCommandSubOpcode = 0, \
8315 .DwordLength = 4
8316
8317 #define GEN9_PIPE_CONTROL_length 0x00000006
8318
8319 struct GEN9_PIPE_CONTROL {
8320 uint32_t CommandType;
8321 uint32_t CommandSubType;
8322 uint32_t _3DCommandOpcode;
8323 uint32_t _3DCommandSubOpcode;
8324 uint32_t DwordLength;
8325 bool FlushLLC;
8326 #define DAT_PPGTT 0
8327 #define DAT_GGTT 1
8328 uint32_t DestinationAddressType;
8329 #define NoLRIOperation 0
8330 #define MMIOWriteImmediateData 1
8331 uint32_t LRIPostSyncOperation;
8332 uint32_t StoreDataIndex;
8333 uint32_t CommandStreamerStallEnable;
8334 #define DontReset 0
8335 #define Reset 1
8336 uint32_t GlobalSnapshotCountReset;
8337 uint32_t TLBInvalidate;
8338 bool GenericMediaStateClear;
8339 #define NoWrite 0
8340 #define WriteImmediateData 1
8341 #define WritePSDepthCount 2
8342 #define WriteTimestamp 3
8343 uint32_t PostSyncOperation;
8344 bool DepthStallEnable;
8345 #define DisableFlush 0
8346 #define EnableFlush 1
8347 bool RenderTargetCacheFlushEnable;
8348 bool InstructionCacheInvalidateEnable;
8349 bool TextureCacheInvalidationEnable;
8350 bool IndirectStatePointersDisable;
8351 bool NotifyEnable;
8352 bool PipeControlFlushEnable;
8353 bool DCFlushEnable;
8354 bool VFCacheInvalidationEnable;
8355 bool ConstantCacheInvalidationEnable;
8356 bool StateCacheInvalidationEnable;
8357 bool StallAtPixelScoreboard;
8358 #define FlushDisabled 0
8359 #define FlushEnabled 1
8360 bool DepthCacheFlushEnable;
8361 __gen_address_type Address;
8362 uint64_t ImmediateData;
8363 };
8364
8365 static inline void
8366 GEN9_PIPE_CONTROL_pack(__gen_user_data *data, void * restrict dst,
8367 const struct GEN9_PIPE_CONTROL * restrict values)
8368 {
8369 uint32_t *dw = (uint32_t * restrict) dst;
8370
8371 dw[0] =
8372 __gen_field(values->CommandType, 29, 31) |
8373 __gen_field(values->CommandSubType, 27, 28) |
8374 __gen_field(values->_3DCommandOpcode, 24, 26) |
8375 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
8376 __gen_field(values->DwordLength, 0, 7) |
8377 0;
8378
8379 dw[1] =
8380 __gen_field(values->FlushLLC, 26, 26) |
8381 __gen_field(values->DestinationAddressType, 24, 24) |
8382 __gen_field(values->LRIPostSyncOperation, 23, 23) |
8383 __gen_field(values->StoreDataIndex, 21, 21) |
8384 __gen_field(values->CommandStreamerStallEnable, 20, 20) |
8385 __gen_field(values->GlobalSnapshotCountReset, 19, 19) |
8386 __gen_field(values->TLBInvalidate, 18, 18) |
8387 __gen_field(values->GenericMediaStateClear, 16, 16) |
8388 __gen_field(values->PostSyncOperation, 14, 15) |
8389 __gen_field(values->DepthStallEnable, 13, 13) |
8390 __gen_field(values->RenderTargetCacheFlushEnable, 12, 12) |
8391 __gen_field(values->InstructionCacheInvalidateEnable, 11, 11) |
8392 __gen_field(values->TextureCacheInvalidationEnable, 10, 10) |
8393 __gen_field(values->IndirectStatePointersDisable, 9, 9) |
8394 __gen_field(values->NotifyEnable, 8, 8) |
8395 __gen_field(values->PipeControlFlushEnable, 7, 7) |
8396 __gen_field(values->DCFlushEnable, 5, 5) |
8397 __gen_field(values->VFCacheInvalidationEnable, 4, 4) |
8398 __gen_field(values->ConstantCacheInvalidationEnable, 3, 3) |
8399 __gen_field(values->StateCacheInvalidationEnable, 2, 2) |
8400 __gen_field(values->StallAtPixelScoreboard, 1, 1) |
8401 __gen_field(values->DepthCacheFlushEnable, 0, 0) |
8402 0;
8403
8404 uint32_t dw2 =
8405 0;
8406
8407 uint64_t qw2 =
8408 __gen_combine_address(data, &dw[2], values->Address, dw2);
8409
8410 dw[2] = qw2;
8411 dw[3] = qw2 >> 32;
8412
8413 uint64_t qw4 =
8414 __gen_field(values->ImmediateData, 0, 63) |
8415 0;
8416
8417 dw[4] = qw4;
8418 dw[5] = qw4 >> 32;
8419
8420 }
8421
8422 #define GEN9_SCISSOR_RECT_length 0x00000002
8423
8424 struct GEN9_SCISSOR_RECT {
8425 uint32_t ScissorRectangleYMin;
8426 uint32_t ScissorRectangleXMin;
8427 uint32_t ScissorRectangleYMax;
8428 uint32_t ScissorRectangleXMax;
8429 };
8430
8431 static inline void
8432 GEN9_SCISSOR_RECT_pack(__gen_user_data *data, void * restrict dst,
8433 const struct GEN9_SCISSOR_RECT * restrict values)
8434 {
8435 uint32_t *dw = (uint32_t * restrict) dst;
8436
8437 dw[0] =
8438 __gen_field(values->ScissorRectangleYMin, 16, 31) |
8439 __gen_field(values->ScissorRectangleXMin, 0, 15) |
8440 0;
8441
8442 dw[1] =
8443 __gen_field(values->ScissorRectangleYMax, 16, 31) |
8444 __gen_field(values->ScissorRectangleXMax, 0, 15) |
8445 0;
8446
8447 }
8448
8449 #define GEN9_SF_CLIP_VIEWPORT_length 0x00000010
8450
8451 struct GEN9_SF_CLIP_VIEWPORT {
8452 float ViewportMatrixElementm00;
8453 float ViewportMatrixElementm11;
8454 float ViewportMatrixElementm22;
8455 float ViewportMatrixElementm30;
8456 float ViewportMatrixElementm31;
8457 float ViewportMatrixElementm32;
8458 float XMinClipGuardband;
8459 float XMaxClipGuardband;
8460 float YMinClipGuardband;
8461 float YMaxClipGuardband;
8462 float XMinViewPort;
8463 float XMaxViewPort;
8464 float YMinViewPort;
8465 float YMaxViewPort;
8466 };
8467
8468 static inline void
8469 GEN9_SF_CLIP_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
8470 const struct GEN9_SF_CLIP_VIEWPORT * restrict values)
8471 {
8472 uint32_t *dw = (uint32_t * restrict) dst;
8473
8474 dw[0] =
8475 __gen_float(values->ViewportMatrixElementm00) |
8476 0;
8477
8478 dw[1] =
8479 __gen_float(values->ViewportMatrixElementm11) |
8480 0;
8481
8482 dw[2] =
8483 __gen_float(values->ViewportMatrixElementm22) |
8484 0;
8485
8486 dw[3] =
8487 __gen_float(values->ViewportMatrixElementm30) |
8488 0;
8489
8490 dw[4] =
8491 __gen_float(values->ViewportMatrixElementm31) |
8492 0;
8493
8494 dw[5] =
8495 __gen_float(values->ViewportMatrixElementm32) |
8496 0;
8497
8498 dw[6] =
8499 0;
8500
8501 dw[7] =
8502 0;
8503
8504 dw[8] =
8505 __gen_float(values->XMinClipGuardband) |
8506 0;
8507
8508 dw[9] =
8509 __gen_float(values->XMaxClipGuardband) |
8510 0;
8511
8512 dw[10] =
8513 __gen_float(values->YMinClipGuardband) |
8514 0;
8515
8516 dw[11] =
8517 __gen_float(values->YMaxClipGuardband) |
8518 0;
8519
8520 dw[12] =
8521 __gen_float(values->XMinViewPort) |
8522 0;
8523
8524 dw[13] =
8525 __gen_float(values->XMaxViewPort) |
8526 0;
8527
8528 dw[14] =
8529 __gen_float(values->YMinViewPort) |
8530 0;
8531
8532 dw[15] =
8533 __gen_float(values->YMaxViewPort) |
8534 0;
8535
8536 }
8537
8538 #define GEN9_BLEND_STATE_length 0x00000011
8539
8540 #define GEN9_BLEND_STATE_ENTRY_length 0x00000002
8541
8542 struct GEN9_BLEND_STATE_ENTRY {
8543 bool LogicOpEnable;
8544 uint32_t LogicOpFunction;
8545 uint32_t PreBlendSourceOnlyClampEnable;
8546 #define COLORCLAMP_UNORM 0
8547 #define COLORCLAMP_SNORM 1
8548 #define COLORCLAMP_RTFORMAT 2
8549 uint32_t ColorClampRange;
8550 bool PreBlendColorClampEnable;
8551 bool PostBlendColorClampEnable;
8552 bool ColorBufferBlendEnable;
8553 uint32_t SourceBlendFactor;
8554 uint32_t DestinationBlendFactor;
8555 uint32_t ColorBlendFunction;
8556 uint32_t SourceAlphaBlendFactor;
8557 uint32_t DestinationAlphaBlendFactor;
8558 uint32_t AlphaBlendFunction;
8559 bool WriteDisableAlpha;
8560 bool WriteDisableRed;
8561 bool WriteDisableGreen;
8562 bool WriteDisableBlue;
8563 };
8564
8565 static inline void
8566 GEN9_BLEND_STATE_ENTRY_pack(__gen_user_data *data, void * restrict dst,
8567 const struct GEN9_BLEND_STATE_ENTRY * restrict values)
8568 {
8569 uint32_t *dw = (uint32_t * restrict) dst;
8570
8571 uint64_t qw0 =
8572 __gen_field(values->LogicOpEnable, 63, 63) |
8573 __gen_field(values->LogicOpFunction, 59, 62) |
8574 __gen_field(values->PreBlendSourceOnlyClampEnable, 36, 36) |
8575 __gen_field(values->ColorClampRange, 34, 35) |
8576 __gen_field(values->PreBlendColorClampEnable, 33, 33) |
8577 __gen_field(values->PostBlendColorClampEnable, 32, 32) |
8578 __gen_field(values->ColorBufferBlendEnable, 31, 31) |
8579 __gen_field(values->SourceBlendFactor, 26, 30) |
8580 __gen_field(values->DestinationBlendFactor, 21, 25) |
8581 __gen_field(values->ColorBlendFunction, 18, 20) |
8582 __gen_field(values->SourceAlphaBlendFactor, 13, 17) |
8583 __gen_field(values->DestinationAlphaBlendFactor, 8, 12) |
8584 __gen_field(values->AlphaBlendFunction, 5, 7) |
8585 __gen_field(values->WriteDisableAlpha, 3, 3) |
8586 __gen_field(values->WriteDisableRed, 2, 2) |
8587 __gen_field(values->WriteDisableGreen, 1, 1) |
8588 __gen_field(values->WriteDisableBlue, 0, 0) |
8589 0;
8590
8591 dw[0] = qw0;
8592 dw[1] = qw0 >> 32;
8593
8594 }
8595
8596 struct GEN9_BLEND_STATE {
8597 bool AlphaToCoverageEnable;
8598 bool IndependentAlphaBlendEnable;
8599 bool AlphaToOneEnable;
8600 bool AlphaToCoverageDitherEnable;
8601 bool AlphaTestEnable;
8602 uint32_t AlphaTestFunction;
8603 bool ColorDitherEnable;
8604 uint32_t XDitherOffset;
8605 uint32_t YDitherOffset;
8606 struct GEN9_BLEND_STATE_ENTRY Entry[8];
8607 };
8608
8609 static inline void
8610 GEN9_BLEND_STATE_pack(__gen_user_data *data, void * restrict dst,
8611 const struct GEN9_BLEND_STATE * restrict values)
8612 {
8613 uint32_t *dw = (uint32_t * restrict) dst;
8614
8615 dw[0] =
8616 __gen_field(values->AlphaToCoverageEnable, 31, 31) |
8617 __gen_field(values->IndependentAlphaBlendEnable, 30, 30) |
8618 __gen_field(values->AlphaToOneEnable, 29, 29) |
8619 __gen_field(values->AlphaToCoverageDitherEnable, 28, 28) |
8620 __gen_field(values->AlphaTestEnable, 27, 27) |
8621 __gen_field(values->AlphaTestFunction, 24, 26) |
8622 __gen_field(values->ColorDitherEnable, 23, 23) |
8623 __gen_field(values->XDitherOffset, 21, 22) |
8624 __gen_field(values->YDitherOffset, 19, 20) |
8625 0;
8626
8627 for (uint32_t i = 0, j = 1; i < 8; i++, j += 2)
8628 GEN9_BLEND_STATE_ENTRY_pack(data, &dw[j], &values->Entry[i]);
8629 }
8630
8631 #define GEN9_CC_VIEWPORT_length 0x00000002
8632
8633 struct GEN9_CC_VIEWPORT {
8634 float MinimumDepth;
8635 float MaximumDepth;
8636 };
8637
8638 static inline void
8639 GEN9_CC_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
8640 const struct GEN9_CC_VIEWPORT * restrict values)
8641 {
8642 uint32_t *dw = (uint32_t * restrict) dst;
8643
8644 dw[0] =
8645 __gen_float(values->MinimumDepth) |
8646 0;
8647
8648 dw[1] =
8649 __gen_float(values->MaximumDepth) |
8650 0;
8651
8652 }
8653
8654 #define GEN9_COLOR_CALC_STATE_length 0x00000006
8655
8656 struct GEN9_COLOR_CALC_STATE {
8657 #define Cancelled 0
8658 #define NotCancelled 1
8659 uint32_t RoundDisableFunctionDisable;
8660 #define ALPHATEST_UNORM8 0
8661 #define ALPHATEST_FLOAT32 1
8662 uint32_t AlphaTestFormat;
8663 uint32_t AlphaReferenceValueAsUNORM8;
8664 float AlphaReferenceValueAsFLOAT32;
8665 float BlendConstantColorRed;
8666 float BlendConstantColorGreen;
8667 float BlendConstantColorBlue;
8668 float BlendConstantColorAlpha;
8669 };
8670
8671 static inline void
8672 GEN9_COLOR_CALC_STATE_pack(__gen_user_data *data, void * restrict dst,
8673 const struct GEN9_COLOR_CALC_STATE * restrict values)
8674 {
8675 uint32_t *dw = (uint32_t * restrict) dst;
8676
8677 dw[0] =
8678 __gen_field(values->RoundDisableFunctionDisable, 15, 15) |
8679 __gen_field(values->AlphaTestFormat, 0, 0) |
8680 0;
8681
8682 dw[1] =
8683 __gen_field(values->AlphaReferenceValueAsUNORM8, 0, 31) |
8684 __gen_float(values->AlphaReferenceValueAsFLOAT32) |
8685 0;
8686
8687 dw[2] =
8688 __gen_float(values->BlendConstantColorRed) |
8689 0;
8690
8691 dw[3] =
8692 __gen_float(values->BlendConstantColorGreen) |
8693 0;
8694
8695 dw[4] =
8696 __gen_float(values->BlendConstantColorBlue) |
8697 0;
8698
8699 dw[5] =
8700 __gen_float(values->BlendConstantColorAlpha) |
8701 0;
8702
8703 }
8704
8705 #define GEN9_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_length 0x00000001
8706
8707 struct GEN9_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR {
8708 uint32_t ExtendedMessageLength;
8709 #define NoTermination 0
8710 #define EOT 1
8711 uint32_t EndOfThread;
8712 uint32_t TargetFunctionID;
8713 };
8714
8715 static inline void
8716 GEN9_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_pack(__gen_user_data *data, void * restrict dst,
8717 const struct GEN9_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR * restrict values)
8718 {
8719 uint32_t *dw = (uint32_t * restrict) dst;
8720
8721 dw[0] =
8722 __gen_field(values->ExtendedMessageLength, 6, 9) |
8723 __gen_field(values->EndOfThread, 5, 5) |
8724 __gen_field(values->TargetFunctionID, 0, 3) |
8725 0;
8726
8727 }
8728
8729 #define GEN9_INTERFACE_DESCRIPTOR_DATA_length 0x00000008
8730
8731 struct GEN9_INTERFACE_DESCRIPTOR_DATA {
8732 uint32_t KernelStartPointer;
8733 uint32_t KernelStartPointerHigh;
8734 #define Ftz 0
8735 #define SetByKernel 1
8736 uint32_t DenormMode;
8737 #define Multiple 0
8738 #define Single 1
8739 uint32_t SingleProgramFlow;
8740 #define NormalPriority 0
8741 #define HighPriority 1
8742 uint32_t ThreadPriority;
8743 #define IEEE754 0
8744 #define Alternate 1
8745 uint32_t FloatingPointMode;
8746 bool IllegalOpcodeExceptionEnable;
8747 bool MaskStackExceptionEnable;
8748 bool SoftwareExceptionEnable;
8749 uint32_t SamplerStatePointer;
8750 #define Nosamplersused 0
8751 #define Between1and4samplersused 1
8752 #define Between5and8samplersused 2
8753 #define Between9and12samplersused 3
8754 #define Between13and16samplersused 4
8755 uint32_t SamplerCount;
8756 uint32_t BindingTablePointer;
8757 uint32_t BindingTableEntryCount;
8758 uint32_t ConstantIndirectURBEntryReadLength;
8759 uint32_t ConstantURBEntryReadOffset;
8760 #define RTNE 0
8761 #define RU 1
8762 #define RD 2
8763 #define RTZ 3
8764 uint32_t RoundingMode;
8765 bool BarrierEnable;
8766 #define Encodes0K 0
8767 #define Encodes1K 1
8768 #define Encodes2K 2
8769 #define Encodes4K 3
8770 #define Encodes8K 4
8771 #define Encodes16K 5
8772 #define Encodes32K 6
8773 #define Encodes64K 7
8774 uint32_t SharedLocalMemorySize;
8775 bool GlobalBarrierEnable;
8776 uint32_t NumberofThreadsinGPGPUThreadGroup;
8777 uint32_t CrossThreadConstantDataReadLength;
8778 };
8779
8780 static inline void
8781 GEN9_INTERFACE_DESCRIPTOR_DATA_pack(__gen_user_data *data, void * restrict dst,
8782 const struct GEN9_INTERFACE_DESCRIPTOR_DATA * restrict values)
8783 {
8784 uint32_t *dw = (uint32_t * restrict) dst;
8785
8786 dw[0] =
8787 __gen_offset(values->KernelStartPointer, 6, 31) |
8788 0;
8789
8790 dw[1] =
8791 __gen_offset(values->KernelStartPointerHigh, 0, 15) |
8792 0;
8793
8794 dw[2] =
8795 __gen_field(values->DenormMode, 19, 19) |
8796 __gen_field(values->SingleProgramFlow, 18, 18) |
8797 __gen_field(values->ThreadPriority, 17, 17) |
8798 __gen_field(values->FloatingPointMode, 16, 16) |
8799 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
8800 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
8801 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
8802 0;
8803
8804 dw[3] =
8805 __gen_offset(values->SamplerStatePointer, 5, 31) |
8806 __gen_field(values->SamplerCount, 2, 4) |
8807 0;
8808
8809 dw[4] =
8810 __gen_offset(values->BindingTablePointer, 5, 15) |
8811 __gen_field(values->BindingTableEntryCount, 0, 4) |
8812 0;
8813
8814 dw[5] =
8815 __gen_field(values->ConstantIndirectURBEntryReadLength, 16, 31) |
8816 __gen_field(values->ConstantURBEntryReadOffset, 0, 15) |
8817 0;
8818
8819 dw[6] =
8820 __gen_field(values->RoundingMode, 22, 23) |
8821 __gen_field(values->BarrierEnable, 21, 21) |
8822 __gen_field(values->SharedLocalMemorySize, 16, 20) |
8823 __gen_field(values->GlobalBarrierEnable, 15, 15) |
8824 __gen_field(values->NumberofThreadsinGPGPUThreadGroup, 0, 9) |
8825 0;
8826
8827 dw[7] =
8828 __gen_field(values->CrossThreadConstantDataReadLength, 0, 7) |
8829 0;
8830
8831 }
8832
8833 #define GEN9_ROUNDINGPRECISIONTABLE_3_BITS_length 0x00000001
8834
8835 struct GEN9_ROUNDINGPRECISIONTABLE_3_BITS {
8836 #define _116 0
8837 #define _216 1
8838 #define _316 2
8839 #define _416 3
8840 #define _516 4
8841 #define _616 5
8842 #define _716 6
8843 #define _816 7
8844 uint32_t RoundingPrecision;
8845 };
8846
8847 static inline void
8848 GEN9_ROUNDINGPRECISIONTABLE_3_BITS_pack(__gen_user_data *data, void * restrict dst,
8849 const struct GEN9_ROUNDINGPRECISIONTABLE_3_BITS * restrict values)
8850 {
8851 uint32_t *dw = (uint32_t * restrict) dst;
8852
8853 dw[0] =
8854 __gen_field(values->RoundingPrecision, 0, 2) |
8855 0;
8856
8857 }
8858
8859 #define GEN9_BINDING_TABLE_STATE_length 0x00000001
8860
8861 struct GEN9_BINDING_TABLE_STATE {
8862 uint32_t SurfaceStatePointer;
8863 };
8864
8865 static inline void
8866 GEN9_BINDING_TABLE_STATE_pack(__gen_user_data *data, void * restrict dst,
8867 const struct GEN9_BINDING_TABLE_STATE * restrict values)
8868 {
8869 uint32_t *dw = (uint32_t * restrict) dst;
8870
8871 dw[0] =
8872 __gen_offset(values->SurfaceStatePointer, 6, 31) |
8873 0;
8874
8875 }
8876
8877 #define GEN9_RENDER_SURFACE_STATE_length 0x00000010
8878
8879 struct GEN9_RENDER_SURFACE_STATE {
8880 #define SURFTYPE_1D 0
8881 #define SURFTYPE_2D 1
8882 #define SURFTYPE_3D 2
8883 #define SURFTYPE_CUBE 3
8884 #define SURFTYPE_BUFFER 4
8885 #define SURFTYPE_STRBUF 5
8886 #define SURFTYPE_NULL 7
8887 uint32_t SurfaceType;
8888 bool SurfaceArray;
8889 bool ASTC_Enable;
8890 uint32_t SurfaceFormat;
8891 #define VALIGN4 1
8892 #define VALIGN8 2
8893 #define VALIGN16 3
8894 uint32_t SurfaceVerticalAlignment;
8895 #define HALIGN4 1
8896 #define HALIGN8 2
8897 #define HALIGN16 3
8898 uint32_t SurfaceHorizontalAlignment;
8899 #define LINEAR 0
8900 #define WMAJOR 1
8901 #define XMAJOR 2
8902 #define YMAJOR 3
8903 uint32_t TileMode;
8904 uint32_t VerticalLineStride;
8905 uint32_t VerticalLineStrideOffset;
8906 bool SamplerL2BypassModeDisable;
8907 #define WriteOnlyCache 0
8908 #define ReadWriteCache 1
8909 uint32_t RenderCacheReadWriteMode;
8910 #define NORMAL_MODE 0
8911 #define PROGRESSIVE_FRAME 2
8912 #define INTERLACED_FRAME 3
8913 uint32_t MediaBoundaryPixelMode;
8914 bool CubeFaceEnablePositiveZ;
8915 bool CubeFaceEnableNegativeZ;
8916 bool CubeFaceEnablePositiveY;
8917 bool CubeFaceEnableNegativeY;
8918 bool CubeFaceEnablePositiveX;
8919 bool CubeFaceEnableNegativeX;
8920 struct GEN9_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
8921 float BaseMipLevel;
8922 uint32_t SurfaceQPitch;
8923 uint32_t Height;
8924 uint32_t Width;
8925 uint32_t Depth;
8926 uint32_t SurfacePitch;
8927 #define _0DEG 0
8928 #define _90DEG 1
8929 #define _180DEG 2
8930 #define _270DEG 3
8931 uint32_t RenderTargetAndSampleUnormRotation;
8932 uint32_t MinimumArrayElement;
8933 uint32_t RenderTargetViewExtent;
8934 #define MSS 0
8935 #define DEPTH_STENCIL 1
8936 uint32_t MultisampledSurfaceStorageFormat;
8937 #define MULTISAMPLECOUNT_1 0
8938 #define MULTISAMPLECOUNT_2 1
8939 #define MULTISAMPLECOUNT_4 2
8940 #define MULTISAMPLECOUNT_8 3
8941 #define MULTISAMPLECOUNT_16 4
8942 uint32_t NumberofMultisamples;
8943 uint32_t MultisamplePositionPaletteIndex;
8944 uint32_t XOffset;
8945 uint32_t YOffset;
8946 bool EWADisableForCube;
8947 #define NONE 0
8948 #define _4KB 1
8949 #define _64KB 2
8950 #define TILEYF 1
8951 #define TILEYS 2
8952 uint32_t TiledResourceMode;
8953 #define GPUcoherent 0
8954 #define IAcoherent 1
8955 uint32_t CoherencyType;
8956 uint32_t MipTailStartLOD;
8957 uint32_t SurfaceMinLOD;
8958 uint32_t MIPCountLOD;
8959 uint32_t AuxiliarySurfaceQPitch;
8960 uint32_t AuxiliarySurfacePitch;
8961 #define AUX_NONE 0
8962 #define AUX_CCS_D 1
8963 #define AUX_APPEND 2
8964 #define AUX_HIZ 3
8965 #define AUX_CCS_E 5
8966 uint32_t AuxiliarySurfaceMode;
8967 bool SeparateUVPlaneEnable;
8968 uint32_t XOffsetforUorUVPlane;
8969 uint32_t YOffsetforUorUVPlane;
8970 #define Horizontal 0
8971 #define Vertical 1
8972 uint32_t MemoryCompressionMode;
8973 bool MemoryCompressionEnable;
8974 uint32_t ShaderChannelSelectRed;
8975 uint32_t ShaderChannelSelectGreen;
8976 uint32_t ShaderChannelSelectBlue;
8977 uint32_t ShaderChannelSelectAlpha;
8978 float ResourceMinLOD;
8979 __gen_address_type SurfaceBaseAddress;
8980 uint32_t XOffsetforVPlane;
8981 uint32_t YOffsetforVPlane;
8982 uint32_t AuxiliaryTableIndexforMediaCompressedSurface;
8983 __gen_address_type AuxiliarySurfaceBaseAddress;
8984 uint32_t QuiltHeight;
8985 uint32_t QuiltWidth;
8986 float HierarchicalDepthClearValue;
8987 uint32_t RedClearColor;
8988 uint32_t GreenClearColor;
8989 uint32_t BlueClearColor;
8990 uint32_t AlphaClearColor;
8991 };
8992
8993 static inline void
8994 GEN9_RENDER_SURFACE_STATE_pack(__gen_user_data *data, void * restrict dst,
8995 const struct GEN9_RENDER_SURFACE_STATE * restrict values)
8996 {
8997 uint32_t *dw = (uint32_t * restrict) dst;
8998
8999 dw[0] =
9000 __gen_field(values->SurfaceType, 29, 31) |
9001 __gen_field(values->SurfaceArray, 28, 28) |
9002 __gen_field(values->ASTC_Enable, 27, 27) |
9003 __gen_field(values->SurfaceFormat, 18, 26) |
9004 __gen_field(values->SurfaceVerticalAlignment, 16, 17) |
9005 __gen_field(values->SurfaceHorizontalAlignment, 14, 15) |
9006 __gen_field(values->TileMode, 12, 13) |
9007 __gen_field(values->VerticalLineStride, 11, 11) |
9008 __gen_field(values->VerticalLineStrideOffset, 10, 10) |
9009 __gen_field(values->SamplerL2BypassModeDisable, 9, 9) |
9010 __gen_field(values->RenderCacheReadWriteMode, 8, 8) |
9011 __gen_field(values->MediaBoundaryPixelMode, 6, 7) |
9012 __gen_field(values->CubeFaceEnablePositiveZ, 0, 0) |
9013 __gen_field(values->CubeFaceEnableNegativeZ, 1, 1) |
9014 __gen_field(values->CubeFaceEnablePositiveY, 2, 2) |
9015 __gen_field(values->CubeFaceEnableNegativeY, 3, 3) |
9016 __gen_field(values->CubeFaceEnablePositiveX, 4, 4) |
9017 __gen_field(values->CubeFaceEnableNegativeX, 5, 5) |
9018 0;
9019
9020 uint32_t dw_MemoryObjectControlState;
9021 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
9022 dw[1] =
9023 __gen_field(dw_MemoryObjectControlState, 24, 30) |
9024 __gen_field(values->BaseMipLevel * (1 << 1), 19, 23) |
9025 __gen_field(values->SurfaceQPitch, 0, 14) |
9026 0;
9027
9028 dw[2] =
9029 __gen_field(values->Height, 16, 29) |
9030 __gen_field(values->Width, 0, 13) |
9031 0;
9032
9033 dw[3] =
9034 __gen_field(values->Depth, 21, 31) |
9035 __gen_field(values->SurfacePitch, 0, 17) |
9036 0;
9037
9038 dw[4] =
9039 __gen_field(values->RenderTargetAndSampleUnormRotation, 29, 30) |
9040 __gen_field(values->MinimumArrayElement, 18, 28) |
9041 __gen_field(values->RenderTargetViewExtent, 7, 17) |
9042 __gen_field(values->MultisampledSurfaceStorageFormat, 6, 6) |
9043 __gen_field(values->NumberofMultisamples, 3, 5) |
9044 __gen_field(values->MultisamplePositionPaletteIndex, 0, 2) |
9045 0;
9046
9047 dw[5] =
9048 __gen_offset(values->XOffset, 25, 31) |
9049 __gen_offset(values->YOffset, 21, 23) |
9050 __gen_field(values->EWADisableForCube, 20, 20) |
9051 __gen_field(values->TiledResourceMode, 18, 19) |
9052 __gen_field(values->CoherencyType, 14, 14) |
9053 __gen_field(values->MipTailStartLOD, 8, 11) |
9054 __gen_field(values->SurfaceMinLOD, 4, 7) |
9055 __gen_field(values->MIPCountLOD, 0, 3) |
9056 0;
9057
9058 dw[6] =
9059 __gen_field(values->AuxiliarySurfaceQPitch, 16, 30) |
9060 __gen_field(values->AuxiliarySurfacePitch, 3, 11) |
9061 __gen_field(values->AuxiliarySurfaceMode, 0, 2) |
9062 __gen_field(values->SeparateUVPlaneEnable, 31, 31) |
9063 __gen_field(values->XOffsetforUorUVPlane, 16, 29) |
9064 __gen_field(values->YOffsetforUorUVPlane, 0, 13) |
9065 0;
9066
9067 dw[7] =
9068 __gen_field(values->MemoryCompressionMode, 31, 31) |
9069 __gen_field(values->MemoryCompressionEnable, 30, 30) |
9070 __gen_field(values->ShaderChannelSelectRed, 25, 27) |
9071 __gen_field(values->ShaderChannelSelectGreen, 22, 24) |
9072 __gen_field(values->ShaderChannelSelectBlue, 19, 21) |
9073 __gen_field(values->ShaderChannelSelectAlpha, 16, 18) |
9074 __gen_field(values->ResourceMinLOD * (1 << 8), 0, 11) |
9075 0;
9076
9077 uint32_t dw8 =
9078 0;
9079
9080 uint64_t qw8 =
9081 __gen_combine_address(data, &dw[8], values->SurfaceBaseAddress, dw8);
9082
9083 dw[8] = qw8;
9084 dw[9] = qw8 >> 32;
9085
9086 uint32_t dw10 =
9087 __gen_field(values->XOffsetforVPlane, 48, 61) |
9088 __gen_field(values->YOffsetforVPlane, 32, 45) |
9089 __gen_field(values->AuxiliaryTableIndexforMediaCompressedSurface, 21, 31) |
9090 __gen_field(values->QuiltHeight, 5, 9) |
9091 __gen_field(values->QuiltWidth, 0, 4) |
9092 0;
9093
9094 uint64_t qw10 =
9095 __gen_combine_address(data, &dw[10], values->AuxiliarySurfaceBaseAddress, dw10);
9096
9097 dw[10] = qw10;
9098 dw[11] = qw10 >> 32;
9099
9100 dw[12] =
9101 __gen_float(values->HierarchicalDepthClearValue) |
9102 __gen_field(values->RedClearColor, 0, 31) |
9103 0;
9104
9105 dw[13] =
9106 __gen_field(values->GreenClearColor, 0, 31) |
9107 0;
9108
9109 dw[14] =
9110 __gen_field(values->BlueClearColor, 0, 31) |
9111 0;
9112
9113 dw[15] =
9114 __gen_field(values->AlphaClearColor, 0, 31) |
9115 0;
9116
9117 }
9118
9119 #define GEN9_FILTER_COEFFICIENT_length 0x00000001
9120
9121 struct GEN9_FILTER_COEFFICIENT {
9122 uint32_t FilterCoefficient;
9123 };
9124
9125 static inline void
9126 GEN9_FILTER_COEFFICIENT_pack(__gen_user_data *data, void * restrict dst,
9127 const struct GEN9_FILTER_COEFFICIENT * restrict values)
9128 {
9129 uint32_t *dw = (uint32_t * restrict) dst;
9130
9131 dw[0] =
9132 __gen_field(values->FilterCoefficient, 0, 7) |
9133 0;
9134
9135 }
9136
9137 #define GEN9_SAMPLER_STATE_length 0x00000004
9138
9139 struct GEN9_SAMPLER_STATE {
9140 bool SamplerDisable;
9141 #define DX10OGL 0
9142 #define DX9 1
9143 uint32_t TextureBorderColorMode;
9144 #define CLAMP_NONE 0
9145 #define CLAMP_OGL 2
9146 uint32_t LODPreClampMode;
9147 uint32_t CoarseLODQualityMode;
9148 #define MIPFILTER_NONE 0
9149 #define MIPFILTER_NEAREST 1
9150 #define MIPFILTER_LINEAR 3
9151 uint32_t MipModeFilter;
9152 #define MAPFILTER_NEAREST 0
9153 #define MAPFILTER_LINEAR 1
9154 #define MAPFILTER_ANISOTROPIC 2
9155 #define MAPFILTER_MONO 6
9156 uint32_t MagModeFilter;
9157 #define MAPFILTER_NEAREST 0
9158 #define MAPFILTER_LINEAR 1
9159 #define MAPFILTER_ANISOTROPIC 2
9160 #define MAPFILTER_MONO 6
9161 uint32_t MinModeFilter;
9162 uint32_t TextureLODBias;
9163 #define LEGACY 0
9164 #define EWAApproximation 1
9165 uint32_t AnisotropicAlgorithm;
9166 float MinLOD;
9167 float MaxLOD;
9168 bool ChromaKeyEnable;
9169 uint32_t ChromaKeyIndex;
9170 #define KEYFILTER_KILL_ON_ANY_MATCH 0
9171 #define KEYFILTER_REPLACE_BLACK 1
9172 uint32_t ChromaKeyMode;
9173 #define PREFILTEROPALWAYS 0
9174 #define PREFILTEROPNEVER 1
9175 #define PREFILTEROPLESS 2
9176 #define PREFILTEROPEQUAL 3
9177 #define PREFILTEROPLEQUAL 4
9178 #define PREFILTEROPGREATER 5
9179 #define PREFILTEROPNOTEQUAL 6
9180 #define PREFILTEROPGEQUAL 7
9181 uint32_t ShadowFunction;
9182 #define PROGRAMMED 0
9183 #define OVERRIDE 1
9184 uint32_t CubeSurfaceControlMode;
9185 uint32_t IndirectStatePointer;
9186 #define MIPNONE 0
9187 #define MIPFILTER 1
9188 uint32_t LODClampMagnificationMode;
9189 #define STD_FILTER 0
9190 #define COMPARISON 1
9191 #define MINIMUM 2
9192 #define MAXIMUM 3
9193 uint32_t ReductionType;
9194 #define RATIO21 0
9195 #define RATIO41 1
9196 #define RATIO61 2
9197 #define RATIO81 3
9198 #define RATIO101 4
9199 #define RATIO121 5
9200 #define RATIO141 6
9201 #define RATIO161 7
9202 uint32_t MaximumAnisotropy;
9203 bool RAddressMinFilterRoundingEnable;
9204 bool RAddressMagFilterRoundingEnable;
9205 bool VAddressMinFilterRoundingEnable;
9206 bool VAddressMagFilterRoundingEnable;
9207 bool UAddressMinFilterRoundingEnable;
9208 bool UAddressMagFilterRoundingEnable;
9209 #define FULL 0
9210 #define HIGH 1
9211 #define MED 2
9212 #define LOW 3
9213 uint32_t TrilinearFilterQuality;
9214 bool NonnormalizedCoordinateEnable;
9215 bool ReductionTypeEnable;
9216 uint32_t TCXAddressControlMode;
9217 uint32_t TCYAddressControlMode;
9218 uint32_t TCZAddressControlMode;
9219 };
9220
9221 static inline void
9222 GEN9_SAMPLER_STATE_pack(__gen_user_data *data, void * restrict dst,
9223 const struct GEN9_SAMPLER_STATE * restrict values)
9224 {
9225 uint32_t *dw = (uint32_t * restrict) dst;
9226
9227 dw[0] =
9228 __gen_field(values->SamplerDisable, 31, 31) |
9229 __gen_field(values->TextureBorderColorMode, 29, 29) |
9230 __gen_field(values->LODPreClampMode, 27, 28) |
9231 __gen_field(values->CoarseLODQualityMode, 22, 26) |
9232 __gen_field(values->MipModeFilter, 20, 21) |
9233 __gen_field(values->MagModeFilter, 17, 19) |
9234 __gen_field(values->MinModeFilter, 14, 16) |
9235 __gen_field(values->TextureLODBias, 1, 13) |
9236 __gen_field(values->AnisotropicAlgorithm, 0, 0) |
9237 0;
9238
9239 dw[1] =
9240 __gen_field(values->MinLOD * (1 << 8), 20, 31) |
9241 __gen_field(values->MaxLOD * (1 << 8), 8, 19) |
9242 __gen_field(values->ChromaKeyEnable, 7, 7) |
9243 __gen_field(values->ChromaKeyIndex, 5, 6) |
9244 __gen_field(values->ChromaKeyMode, 4, 4) |
9245 __gen_field(values->ShadowFunction, 1, 3) |
9246 __gen_field(values->CubeSurfaceControlMode, 0, 0) |
9247 0;
9248
9249 dw[2] =
9250 __gen_field(values->IndirectStatePointer, 6, 23) |
9251 __gen_field(values->LODClampMagnificationMode, 0, 0) |
9252 0;
9253
9254 dw[3] =
9255 __gen_field(values->ReductionType, 22, 23) |
9256 __gen_field(values->MaximumAnisotropy, 19, 21) |
9257 __gen_field(values->RAddressMinFilterRoundingEnable, 13, 13) |
9258 __gen_field(values->RAddressMagFilterRoundingEnable, 14, 14) |
9259 __gen_field(values->VAddressMinFilterRoundingEnable, 15, 15) |
9260 __gen_field(values->VAddressMagFilterRoundingEnable, 16, 16) |
9261 __gen_field(values->UAddressMinFilterRoundingEnable, 17, 17) |
9262 __gen_field(values->UAddressMagFilterRoundingEnable, 18, 18) |
9263 __gen_field(values->TrilinearFilterQuality, 11, 12) |
9264 __gen_field(values->NonnormalizedCoordinateEnable, 10, 10) |
9265 __gen_field(values->ReductionTypeEnable, 9, 9) |
9266 __gen_field(values->TCXAddressControlMode, 6, 8) |
9267 __gen_field(values->TCYAddressControlMode, 3, 5) |
9268 __gen_field(values->TCZAddressControlMode, 0, 2) |
9269 0;
9270
9271 }
9272
9273 #define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_length 0x00000008
9274
9275 struct GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS {
9276 uint32_t Table0YFilterCoefficientn1;
9277 uint32_t Table0XFilterCoefficientn1;
9278 uint32_t Table0YFilterCoefficientn0;
9279 uint32_t Table0XFilterCoefficientn0;
9280 uint32_t Table0YFilterCoefficientn3;
9281 uint32_t Table0XFilterCoefficientn3;
9282 uint32_t Table0YFilterCoefficientn2;
9283 uint32_t Table0XFilterCoefficientn2;
9284 uint32_t Table0YFilterCoefficientn5;
9285 uint32_t Table0XFilterCoefficientn5;
9286 uint32_t Table0YFilterCoefficientn4;
9287 uint32_t Table0XFilterCoefficientn4;
9288 uint32_t Table0YFilterCoefficientn7;
9289 uint32_t Table0XFilterCoefficientn7;
9290 uint32_t Table0YFilterCoefficientn6;
9291 uint32_t Table0XFilterCoefficientn6;
9292 uint32_t Table1XFilterCoefficientn3;
9293 uint32_t Table1XFilterCoefficientn2;
9294 uint32_t Table1XFilterCoefficientn5;
9295 uint32_t Table1XFilterCoefficientn4;
9296 uint32_t Table1YFilterCoefficientn3;
9297 uint32_t Table1YFilterCoefficientn2;
9298 uint32_t Table1YFilterCoefficientn5;
9299 uint32_t Table1YFilterCoefficientn4;
9300 };
9301
9302 static inline void
9303 GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_pack(__gen_user_data *data, void * restrict dst,
9304 const struct GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS * restrict values)
9305 {
9306 uint32_t *dw = (uint32_t * restrict) dst;
9307
9308 dw[0] =
9309 __gen_field(values->Table0YFilterCoefficientn1, 24, 31) |
9310 __gen_field(values->Table0XFilterCoefficientn1, 16, 23) |
9311 __gen_field(values->Table0YFilterCoefficientn0, 8, 15) |
9312 __gen_field(values->Table0XFilterCoefficientn0, 0, 7) |
9313 0;
9314
9315 dw[1] =
9316 __gen_field(values->Table0YFilterCoefficientn3, 24, 31) |
9317 __gen_field(values->Table0XFilterCoefficientn3, 16, 23) |
9318 __gen_field(values->Table0YFilterCoefficientn2, 8, 15) |
9319 __gen_field(values->Table0XFilterCoefficientn2, 0, 7) |
9320 0;
9321
9322 dw[2] =
9323 __gen_field(values->Table0YFilterCoefficientn5, 24, 31) |
9324 __gen_field(values->Table0XFilterCoefficientn5, 16, 23) |
9325 __gen_field(values->Table0YFilterCoefficientn4, 8, 15) |
9326 __gen_field(values->Table0XFilterCoefficientn4, 0, 7) |
9327 0;
9328
9329 dw[3] =
9330 __gen_field(values->Table0YFilterCoefficientn7, 24, 31) |
9331 __gen_field(values->Table0XFilterCoefficientn7, 16, 23) |
9332 __gen_field(values->Table0YFilterCoefficientn6, 8, 15) |
9333 __gen_field(values->Table0XFilterCoefficientn6, 0, 7) |
9334 0;
9335
9336 dw[4] =
9337 __gen_field(values->Table1XFilterCoefficientn3, 24, 31) |
9338 __gen_field(values->Table1XFilterCoefficientn2, 16, 23) |
9339 0;
9340
9341 dw[5] =
9342 __gen_field(values->Table1XFilterCoefficientn5, 8, 15) |
9343 __gen_field(values->Table1XFilterCoefficientn4, 0, 7) |
9344 0;
9345
9346 dw[6] =
9347 __gen_field(values->Table1YFilterCoefficientn3, 24, 31) |
9348 __gen_field(values->Table1YFilterCoefficientn2, 16, 23) |
9349 0;
9350
9351 dw[7] =
9352 __gen_field(values->Table1YFilterCoefficientn5, 8, 15) |
9353 __gen_field(values->Table1YFilterCoefficientn4, 0, 7) |
9354 0;
9355
9356 }
9357
9358 /* Enum 3D_Prim_Topo_Type */
9359 #define _3DPRIM_POINTLIST 1
9360 #define _3DPRIM_LINELIST 2
9361 #define _3DPRIM_LINESTRIP 3
9362 #define _3DPRIM_TRILIST 4
9363 #define _3DPRIM_TRISTRIP 5
9364 #define _3DPRIM_TRIFAN 6
9365 #define _3DPRIM_QUADLIST 7
9366 #define _3DPRIM_QUADSTRIP 8
9367 #define _3DPRIM_LINELIST_ADJ 9
9368 #define _3DPRIM_LINESTRIP_ADJ 10
9369 #define _3DPRIM_TRILIST_ADJ 11
9370 #define _3DPRIM_TRISTRIP_ADJ 12
9371 #define _3DPRIM_TRISTRIP_REVERSE 13
9372 #define _3DPRIM_POLYGON 14
9373 #define _3DPRIM_RECTLIST 15
9374 #define _3DPRIM_LINELOOP 16
9375 #define _3DPRIM_POINTLIST_BF 17
9376 #define _3DPRIM_LINESTRIP_CONT 18
9377 #define _3DPRIM_LINESTRIP_BF 19
9378 #define _3DPRIM_LINESTRIP_CONT_BF 20
9379 #define _3DPRIM_TRIFAN_NOSTIPPLE 22
9380 #define _3DPRIM_PATCHLIST_1 32
9381 #define _3DPRIM_PATCHLIST_2 33
9382 #define _3DPRIM_PATCHLIST_3 34
9383 #define _3DPRIM_PATCHLIST_4 35
9384 #define _3DPRIM_PATCHLIST_5 36
9385 #define _3DPRIM_PATCHLIST_6 37
9386 #define _3DPRIM_PATCHLIST_7 38
9387 #define _3DPRIM_PATCHLIST_8 39
9388 #define _3DPRIM_PATCHLIST_9 40
9389 #define _3DPRIM_PATCHLIST_10 41
9390 #define _3DPRIM_PATCHLIST_11 42
9391 #define _3DPRIM_PATCHLIST_12 43
9392 #define _3DPRIM_PATCHLIST_13 44
9393 #define _3DPRIM_PATCHLIST_14 45
9394 #define _3DPRIM_PATCHLIST_15 46
9395 #define _3DPRIM_PATCHLIST_16 47
9396 #define _3DPRIM_PATCHLIST_17 48
9397 #define _3DPRIM_PATCHLIST_18 49
9398 #define _3DPRIM_PATCHLIST_19 50
9399 #define _3DPRIM_PATCHLIST_20 51
9400 #define _3DPRIM_PATCHLIST_21 52
9401 #define _3DPRIM_PATCHLIST_22 53
9402 #define _3DPRIM_PATCHLIST_23 54
9403 #define _3DPRIM_PATCHLIST_24 55
9404 #define _3DPRIM_PATCHLIST_25 56
9405 #define _3DPRIM_PATCHLIST_26 57
9406 #define _3DPRIM_PATCHLIST_27 58
9407 #define _3DPRIM_PATCHLIST_28 59
9408 #define _3DPRIM_PATCHLIST_29 60
9409 #define _3DPRIM_PATCHLIST_30 61
9410 #define _3DPRIM_PATCHLIST_31 62
9411 #define _3DPRIM_PATCHLIST_32 63
9412
9413 /* Enum 3D_Vertex_Component_Control */
9414 #define VFCOMP_NOSTORE 0
9415 #define VFCOMP_STORE_SRC 1
9416 #define VFCOMP_STORE_0 2
9417 #define VFCOMP_STORE_1_FP 3
9418 #define VFCOMP_STORE_1_INT 4
9419 #define VFCOMP_STORE_PID 7
9420
9421 /* Enum COMPONENT_ENABLES */
9422 #define CE_NONE 0
9423 #define CE_X 1
9424 #define CE_Y 2
9425 #define CE_XY 3
9426 #define CE_Z 4
9427 #define CE_XZ 5
9428 #define CE_YZ 6
9429 #define CE_XYZ 7
9430 #define CE_W 8
9431 #define CE_XW 9
9432 #define CE_YW 10
9433 #define CE_XYW 11
9434 #define CE_ZW 12
9435 #define CE_XZW 13
9436 #define CE_YZW 14
9437 #define CE_XYZW 15
9438
9439 /* Enum Attribute_Component_Format */
9440 #define ACF_DISABLED 0
9441 #define ACF_XY 1
9442 #define ACF_XYZ 2
9443 #define ACF_XYZW 3
9444
9445 /* Enum WRAP_SHORTEST_ENABLE */
9446 #define WSE_X 1
9447 #define WSE_Y 2
9448 #define WSE_XY 3
9449 #define WSE_Z 4
9450 #define WSE_XZ 5
9451 #define WSE_YZ 6
9452 #define WSE_XYZ 7
9453 #define WSE_W 8
9454 #define WSE_XW 9
9455 #define WSE_YW 10
9456 #define WSE_XYW 11
9457 #define WSE_ZW 12
9458 #define WSE_XZW 13
9459 #define WSE_YZW 14
9460 #define WSE_XYZW 15
9461
9462 /* Enum 3D_Stencil_Operation */
9463 #define STENCILOP_KEEP 0
9464 #define STENCILOP_ZERO 1
9465 #define STENCILOP_REPLACE 2
9466 #define STENCILOP_INCRSAT 3
9467 #define STENCILOP_DECRSAT 4
9468 #define STENCILOP_INCR 5
9469 #define STENCILOP_DECR 6
9470 #define STENCILOP_INVERT 7
9471
9472 /* Enum 3D_Color_Buffer_Blend_Factor */
9473 #define BLENDFACTOR_ONE 1
9474 #define BLENDFACTOR_SRC_COLOR 2
9475 #define BLENDFACTOR_SRC_ALPHA 3
9476 #define BLENDFACTOR_DST_ALPHA 4
9477 #define BLENDFACTOR_DST_COLOR 5
9478 #define BLENDFACTOR_SRC_ALPHA_SATURATE 6
9479 #define BLENDFACTOR_CONST_COLOR 7
9480 #define BLENDFACTOR_CONST_ALPHA 8
9481 #define BLENDFACTOR_SRC1_COLOR 9
9482 #define BLENDFACTOR_SRC1_ALPHA 10
9483 #define BLENDFACTOR_ZERO 17
9484 #define BLENDFACTOR_INV_SRC_COLOR 18
9485 #define BLENDFACTOR_INV_SRC_ALPHA 19
9486 #define BLENDFACTOR_INV_DST_ALPHA 20
9487 #define BLENDFACTOR_INV_DST_COLOR 21
9488 #define BLENDFACTOR_INV_CONST_COLOR 23
9489 #define BLENDFACTOR_INV_CONST_ALPHA 24
9490 #define BLENDFACTOR_INV_SRC1_COLOR 25
9491 #define BLENDFACTOR_INV_SRC1_ALPHA 26
9492
9493 /* Enum 3D_Color_Buffer_Blend_Function */
9494 #define BLENDFUNCTION_ADD 0
9495 #define BLENDFUNCTION_SUBTRACT 1
9496 #define BLENDFUNCTION_REVERSE_SUBTRACT 2
9497 #define BLENDFUNCTION_MIN 3
9498 #define BLENDFUNCTION_MAX 4
9499
9500 /* Enum 3D_Compare_Function */
9501 #define COMPAREFUNCTION_ALWAYS 0
9502 #define COMPAREFUNCTION_NEVER 1
9503 #define COMPAREFUNCTION_LESS 2
9504 #define COMPAREFUNCTION_EQUAL 3
9505 #define COMPAREFUNCTION_LEQUAL 4
9506 #define COMPAREFUNCTION_GREATER 5
9507 #define COMPAREFUNCTION_NOTEQUAL 6
9508 #define COMPAREFUNCTION_GEQUAL 7
9509
9510 /* Enum 3D_Logic_Op_Function */
9511 #define LOGICOP_CLEAR 0
9512 #define LOGICOP_NOR 1
9513 #define LOGICOP_AND_INVERTED 2
9514 #define LOGICOP_COPY_INVERTED 3
9515 #define LOGICOP_AND_REVERSE 4
9516 #define LOGICOP_INVERT 5
9517 #define LOGICOP_XOR 6
9518 #define LOGICOP_NAND 7
9519 #define LOGICOP_AND 8
9520 #define LOGICOP_EQUIV 9
9521 #define LOGICOP_NOOP 10
9522 #define LOGICOP_OR_INVERTED 11
9523 #define LOGICOP_COPY 12
9524 #define LOGICOP_OR_REVERSE 13
9525 #define LOGICOP_OR 14
9526 #define LOGICOP_SET 15
9527
9528 /* Enum SURFACE_FORMAT */
9529 #define R32G32B32A32_FLOAT 0
9530 #define R32G32B32A32_SINT 1
9531 #define R32G32B32A32_UINT 2
9532 #define R32G32B32A32_UNORM 3
9533 #define R32G32B32A32_SNORM 4
9534 #define R64G64_FLOAT 5
9535 #define R32G32B32X32_FLOAT 6
9536 #define R32G32B32A32_SSCALED 7
9537 #define R32G32B32A32_USCALED 8
9538 #define R32G32B32A32_SFIXED 32
9539 #define R64G64_PASSTHRU 33
9540 #define R32G32B32_FLOAT 64
9541 #define R32G32B32_SINT 65
9542 #define R32G32B32_UINT 66
9543 #define R32G32B32_UNORM 67
9544 #define R32G32B32_SNORM 68
9545 #define R32G32B32_SSCALED 69
9546 #define R32G32B32_USCALED 70
9547 #define R32G32B32_SFIXED 80
9548 #define R16G16B16A16_UNORM 128
9549 #define R16G16B16A16_SNORM 129
9550 #define R16G16B16A16_SINT 130
9551 #define R16G16B16A16_UINT 131
9552 #define R16G16B16A16_FLOAT 132
9553 #define R32G32_FLOAT 133
9554 #define R32G32_SINT 134
9555 #define R32G32_UINT 135
9556 #define R32_FLOAT_X8X24_TYPELESS 136
9557 #define X32_TYPELESS_G8X24_UINT 137
9558 #define L32A32_FLOAT 138
9559 #define R32G32_UNORM 139
9560 #define R32G32_SNORM 140
9561 #define R64_FLOAT 141
9562 #define R16G16B16X16_UNORM 142
9563 #define R16G16B16X16_FLOAT 143
9564 #define A32X32_FLOAT 144
9565 #define L32X32_FLOAT 145
9566 #define I32X32_FLOAT 146
9567 #define R16G16B16A16_SSCALED 147
9568 #define R16G16B16A16_USCALED 148
9569 #define R32G32_SSCALED 149
9570 #define R32G32_USCALED 150
9571 #define R32G32_SFIXED 160
9572 #define R64_PASSTHRU 161
9573 #define B8G8R8A8_UNORM 192
9574 #define B8G8R8A8_UNORM_SRGB 193
9575 #define R10G10B10A2_UNORM 194
9576 #define R10G10B10A2_UNORM_SRGB 195
9577 #define R10G10B10A2_UINT 196
9578 #define R10G10B10_SNORM_A2_UNORM 197
9579 #define R8G8B8A8_UNORM 199
9580 #define R8G8B8A8_UNORM_SRGB 200
9581 #define R8G8B8A8_SNORM 201
9582 #define R8G8B8A8_SINT 202
9583 #define R8G8B8A8_UINT 203
9584 #define R16G16_UNORM 204
9585 #define R16G16_SNORM 205
9586 #define R16G16_SINT 206
9587 #define R16G16_UINT 207
9588 #define R16G16_FLOAT 208
9589 #define B10G10R10A2_UNORM 209
9590 #define B10G10R10A2_UNORM_SRGB 210
9591 #define R11G11B10_FLOAT 211
9592 #define R32_SINT 214
9593 #define R32_UINT 215
9594 #define R32_FLOAT 216
9595 #define R24_UNORM_X8_TYPELESS 217
9596 #define X24_TYPELESS_G8_UINT 218
9597 #define L32_UNORM 221
9598 #define A32_UNORM 222
9599 #define L16A16_UNORM 223
9600 #define I24X8_UNORM 224
9601 #define L24X8_UNORM 225
9602 #define A24X8_UNORM 226
9603 #define I32_FLOAT 227
9604 #define L32_FLOAT 228
9605 #define A32_FLOAT 229
9606 #define X8B8_UNORM_G8R8_SNORM 230
9607 #define A8X8_UNORM_G8R8_SNORM 231
9608 #define B8X8_UNORM_G8R8_SNORM 232
9609 #define B8G8R8X8_UNORM 233
9610 #define B8G8R8X8_UNORM_SRGB 234
9611 #define R8G8B8X8_UNORM 235
9612 #define R8G8B8X8_UNORM_SRGB 236
9613 #define R9G9B9E5_SHAREDEXP 237
9614 #define B10G10R10X2_UNORM 238
9615 #define L16A16_FLOAT 240
9616 #define R32_UNORM 241
9617 #define R32_SNORM 242
9618 #define R10G10B10X2_USCALED 243
9619 #define R8G8B8A8_SSCALED 244
9620 #define R8G8B8A8_USCALED 245
9621 #define R16G16_SSCALED 246
9622 #define R16G16_USCALED 247
9623 #define R32_SSCALED 248
9624 #define R32_USCALED 249
9625 #define B5G6R5_UNORM 256
9626 #define B5G6R5_UNORM_SRGB 257
9627 #define B5G5R5A1_UNORM 258
9628 #define B5G5R5A1_UNORM_SRGB 259
9629 #define B4G4R4A4_UNORM 260
9630 #define B4G4R4A4_UNORM_SRGB 261
9631 #define R8G8_UNORM 262
9632 #define R8G8_SNORM 263
9633 #define R8G8_SINT 264
9634 #define R8G8_UINT 265
9635 #define R16_UNORM 266
9636 #define R16_SNORM 267
9637 #define R16_SINT 268
9638 #define R16_UINT 269
9639 #define R16_FLOAT 270
9640 #define A8P8_UNORM_PALETTE0 271
9641 #define A8P8_UNORM_PALETTE1 272
9642 #define I16_UNORM 273
9643 #define L16_UNORM 274
9644 #define A16_UNORM 275
9645 #define L8A8_UNORM 276
9646 #define I16_FLOAT 277
9647 #define L16_FLOAT 278
9648 #define A16_FLOAT 279
9649 #define L8A8_UNORM_SRGB 280
9650 #define R5G5_SNORM_B6_UNORM 281
9651 #define B5G5R5X1_UNORM 282
9652 #define B5G5R5X1_UNORM_SRGB 283
9653 #define R8G8_SSCALED 284
9654 #define R8G8_USCALED 285
9655 #define R16_SSCALED 286
9656 #define R16_USCALED 287
9657 #define P8A8_UNORM_PALETTE0 290
9658 #define P8A8_UNORM_PALETTE1 291
9659 #define A1B5G5R5_UNORM 292
9660 #define A4B4G4R4_UNORM 293
9661 #define L8A8_UINT 294
9662 #define L8A8_SINT 295
9663 #define R8_UNORM 320
9664 #define R8_SNORM 321
9665 #define R8_SINT 322
9666 #define R8_UINT 323
9667 #define A8_UNORM 324
9668 #define I8_UNORM 325
9669 #define L8_UNORM 326
9670 #define P4A4_UNORM_PALETTE0 327
9671 #define A4P4_UNORM_PALETTE0 328
9672 #define R8_SSCALED 329
9673 #define R8_USCALED 330
9674 #define P8_UNORM_PALETTE0 331
9675 #define L8_UNORM_SRGB 332
9676 #define P8_UNORM_PALETTE1 333
9677 #define P4A4_UNORM_PALETTE1 334
9678 #define A4P4_UNORM_PALETTE1 335
9679 #define Y8_UNORM 336
9680 #define L8_UINT 338
9681 #define L8_SINT 339
9682 #define I8_UINT 340
9683 #define I8_SINT 341
9684 #define DXT1_RGB_SRGB 384
9685 #define R1_UNORM 385
9686 #define YCRCB_NORMAL 386
9687 #define YCRCB_SWAPUVY 387
9688 #define P2_UNORM_PALETTE0 388
9689 #define P2_UNORM_PALETTE1 389
9690 #define BC1_UNORM 390
9691 #define BC2_UNORM 391
9692 #define BC3_UNORM 392
9693 #define BC4_UNORM 393
9694 #define BC5_UNORM 394
9695 #define BC1_UNORM_SRGB 395
9696 #define BC2_UNORM_SRGB 396
9697 #define BC3_UNORM_SRGB 397
9698 #define MONO8 398
9699 #define YCRCB_SWAPUV 399
9700 #define YCRCB_SWAPY 400
9701 #define DXT1_RGB 401
9702 #define FXT1 402
9703 #define R8G8B8_UNORM 403
9704 #define R8G8B8_SNORM 404
9705 #define R8G8B8_SSCALED 405
9706 #define R8G8B8_USCALED 406
9707 #define R64G64B64A64_FLOAT 407
9708 #define R64G64B64_FLOAT 408
9709 #define BC4_SNORM 409
9710 #define BC5_SNORM 410
9711 #define R16G16B16_FLOAT 411
9712 #define R16G16B16_UNORM 412
9713 #define R16G16B16_SNORM 413
9714 #define R16G16B16_SSCALED 414
9715 #define R16G16B16_USCALED 415
9716 #define BC6H_SF16 417
9717 #define BC7_UNORM 418
9718 #define BC7_UNORM_SRGB 419
9719 #define BC6H_UF16 420
9720 #define PLANAR_420_8 421
9721 #define R8G8B8_UNORM_SRGB 424
9722 #define ETC1_RGB8 425
9723 #define ETC2_RGB8 426
9724 #define EAC_R11 427
9725 #define EAC_RG11 428
9726 #define EAC_SIGNED_R11 429
9727 #define EAC_SIGNED_RG11 430
9728 #define ETC2_SRGB8 431
9729 #define R16G16B16_UINT 432
9730 #define R16G16B16_SINT 433
9731 #define R32_SFIXED 434
9732 #define R10G10B10A2_SNORM 435
9733 #define R10G10B10A2_USCALED 436
9734 #define R10G10B10A2_SSCALED 437
9735 #define R10G10B10A2_SINT 438
9736 #define B10G10R10A2_SNORM 439
9737 #define B10G10R10A2_USCALED 440
9738 #define B10G10R10A2_SSCALED 441
9739 #define B10G10R10A2_UINT 442
9740 #define B10G10R10A2_SINT 443
9741 #define R64G64B64A64_PASSTHRU 444
9742 #define R64G64B64_PASSTHRU 445
9743 #define ETC2_RGB8_PTA 448
9744 #define ETC2_SRGB8_PTA 449
9745 #define ETC2_EAC_RGBA8 450
9746 #define ETC2_EAC_SRGB8_A8 451
9747 #define R8G8B8_UINT 456
9748 #define R8G8B8_SINT 457
9749 #define RAW 511
9750
9751 /* Enum Shader Channel Select */
9752 #define SCS_ZERO 0
9753 #define SCS_ONE 1
9754 #define SCS_RED 4
9755 #define SCS_GREEN 5
9756 #define SCS_BLUE 6
9757 #define SCS_ALPHA 7
9758
9759 /* Enum Texture Coordinate Mode */
9760 #define TCM_WRAP 0
9761 #define TCM_MIRROR 1
9762 #define TCM_CLAMP 2
9763 #define TCM_CUBE 3
9764 #define TCM_CLAMP_BORDER 4
9765 #define TCM_MIRROR_ONCE 5
9766 #define TCM_HALF_BORDER 6
9767