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anv: Move invariant state to small initial batch
[mesa.git] / src / vulkan / gen9_pack.h
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24
25 /* Instructions, enums and structures for SKL.
26 *
27 * This file has been generated, do not hand edit.
28 */
29
30 #pragma once
31
32 #include <stdio.h>
33 #include <assert.h>
34
35 #ifndef __gen_validate_value
36 #define __gen_validate_value(x)
37 #endif
38
39 #ifndef __gen_field_functions
40 #define __gen_field_functions
41
42 union __gen_value {
43 float f;
44 uint32_t dw;
45 };
46
47 static inline uint64_t
48 __gen_mbo(uint32_t start, uint32_t end)
49 {
50 return (~0ull >> (64 - (end - start + 1))) << start;
51 }
52
53 static inline uint64_t
54 __gen_field(uint64_t v, uint32_t start, uint32_t end)
55 {
56 __gen_validate_value(v);
57 #if DEBUG
58 if (end - start + 1 < 64)
59 assert(v < 1ull << (end - start + 1));
60 #endif
61
62 return v << start;
63 }
64
65 static inline uint64_t
66 __gen_fixed(float v, uint32_t start, uint32_t end,
67 bool is_signed, uint32_t fract_bits)
68 {
69 __gen_validate_value(v);
70
71 const float factor = (1 << fract_bits);
72
73 float max, min;
74 if (is_signed) {
75 max = ((1 << (end - start)) - 1) / factor;
76 min = -(1 << (end - start)) / factor;
77 } else {
78 max = ((1 << (end - start + 1)) - 1) / factor;
79 min = 0.0f;
80 }
81
82 if (v > max)
83 v = max;
84 else if (v < min)
85 v = min;
86
87 int32_t int_val = roundf(v * factor);
88
89 if (is_signed)
90 int_val &= (1 << (end - start + 1)) - 1;
91
92 return int_val << start;
93 }
94
95 static inline uint64_t
96 __gen_offset(uint64_t v, uint32_t start, uint32_t end)
97 {
98 __gen_validate_value(v);
99 #if DEBUG
100 uint64_t mask = (~0ull >> (64 - (end - start + 1))) << start;
101
102 assert((v & ~mask) == 0);
103 #endif
104
105 return v;
106 }
107
108 static inline uint32_t
109 __gen_float(float v)
110 {
111 __gen_validate_value(v);
112 return ((union __gen_value) { .f = (v) }).dw;
113 }
114
115 #ifndef __gen_address_type
116 #error #define __gen_address_type before including this file
117 #endif
118
119 #ifndef __gen_user_data
120 #error #define __gen_combine_address before including this file
121 #endif
122
123 #endif
124
125 #define GEN9_3DSTATE_URB_VS_length_bias 0x00000002
126 #define GEN9_3DSTATE_URB_VS_header \
127 .CommandType = 3, \
128 .CommandSubType = 3, \
129 ._3DCommandOpcode = 0, \
130 ._3DCommandSubOpcode = 48, \
131 .DwordLength = 0
132
133 #define GEN9_3DSTATE_URB_VS_length 0x00000002
134
135 struct GEN9_3DSTATE_URB_VS {
136 uint32_t CommandType;
137 uint32_t CommandSubType;
138 uint32_t _3DCommandOpcode;
139 uint32_t _3DCommandSubOpcode;
140 uint32_t DwordLength;
141 uint32_t VSURBStartingAddress;
142 uint32_t VSURBEntryAllocationSize;
143 uint32_t VSNumberofURBEntries;
144 };
145
146 static inline void
147 GEN9_3DSTATE_URB_VS_pack(__gen_user_data *data, void * restrict dst,
148 const struct GEN9_3DSTATE_URB_VS * restrict values)
149 {
150 uint32_t *dw = (uint32_t * restrict) dst;
151
152 dw[0] =
153 __gen_field(values->CommandType, 29, 31) |
154 __gen_field(values->CommandSubType, 27, 28) |
155 __gen_field(values->_3DCommandOpcode, 24, 26) |
156 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
157 __gen_field(values->DwordLength, 0, 7) |
158 0;
159
160 dw[1] =
161 __gen_field(values->VSURBStartingAddress, 25, 31) |
162 __gen_field(values->VSURBEntryAllocationSize, 16, 24) |
163 __gen_field(values->VSNumberofURBEntries, 0, 15) |
164 0;
165
166 }
167
168 #define GEN9_3DSTATE_VS_length_bias 0x00000002
169 #define GEN9_3DSTATE_VS_header \
170 .CommandType = 3, \
171 .CommandSubType = 3, \
172 ._3DCommandOpcode = 0, \
173 ._3DCommandSubOpcode = 16, \
174 .DwordLength = 7
175
176 #define GEN9_3DSTATE_VS_length 0x00000009
177
178 #define __gen_prefix(name) GEN9_ ## name
179
180 struct __gen_prefix(3DSTATE_VS) {
181 uint32_t CommandType;
182 uint32_t CommandSubType;
183 uint32_t _3DCommandOpcode;
184 uint32_t _3DCommandSubOpcode;
185 uint32_t DwordLength;
186 uint64_t KernelStartPointer;
187 #define Multiple 0
188 #define Single 1
189 uint32_t SingleVertexDispatch;
190 #define Dmask 0
191 #define Vmask 1
192 uint32_t VectorMaskEnable;
193 #define NoSamplers 0
194 #define _14Samplers 1
195 #define _58Samplers 2
196 #define _912Samplers 3
197 #define _1316Samplers 4
198 uint32_t SamplerCount;
199 uint32_t BindingTableEntryCount;
200 #define Normal 0
201 #define High 1
202 uint32_t ThreadDispatchPriority;
203 #define IEEE754 0
204 #define Alternate 1
205 uint32_t FloatingPointMode;
206 bool IllegalOpcodeExceptionEnable;
207 bool AccessesUAV;
208 bool SoftwareExceptionEnable;
209 uint64_t ScratchSpaceBasePointer;
210 uint32_t PerThreadScratchSpace;
211 uint32_t DispatchGRFStartRegisterForURBData;
212 uint32_t VertexURBEntryReadLength;
213 uint32_t VertexURBEntryReadOffset;
214 uint32_t MaximumNumberofThreads;
215 bool StatisticsEnable;
216 bool SIMD8DispatchEnable;
217 bool VertexCacheDisable;
218 bool FunctionEnable;
219 uint32_t VertexURBEntryOutputReadOffset;
220 uint32_t VertexURBEntryOutputLength;
221 uint32_t UserClipDistanceClipTestEnableBitmask;
222 uint32_t UserClipDistanceCullTestEnableBitmask;
223 };
224
225 static inline void
226 GEN9_3DSTATE_VS_pack(__gen_user_data *data, void * restrict dst,
227 const struct GEN9_3DSTATE_VS * restrict values)
228 {
229 uint32_t *dw = (uint32_t * restrict) dst;
230
231 dw[0] =
232 __gen_field(values->CommandType, 29, 31) |
233 __gen_field(values->CommandSubType, 27, 28) |
234 __gen_field(values->_3DCommandOpcode, 24, 26) |
235 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
236 __gen_field(values->DwordLength, 0, 7) |
237 0;
238
239 uint64_t qw1 =
240 __gen_offset(values->KernelStartPointer, 6, 63) |
241 0;
242
243 dw[1] = qw1;
244 dw[2] = qw1 >> 32;
245
246 dw[3] =
247 __gen_field(values->SingleVertexDispatch, 31, 31) |
248 __gen_field(values->VectorMaskEnable, 30, 30) |
249 __gen_field(values->SamplerCount, 27, 29) |
250 __gen_field(values->BindingTableEntryCount, 18, 25) |
251 __gen_field(values->ThreadDispatchPriority, 17, 17) |
252 __gen_field(values->FloatingPointMode, 16, 16) |
253 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
254 __gen_field(values->AccessesUAV, 12, 12) |
255 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
256 0;
257
258 uint64_t qw4 =
259 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
260 __gen_field(values->PerThreadScratchSpace, 0, 3) |
261 0;
262
263 dw[4] = qw4;
264 dw[5] = qw4 >> 32;
265
266 dw[6] =
267 __gen_field(values->DispatchGRFStartRegisterForURBData, 20, 24) |
268 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
269 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
270 0;
271
272 dw[7] =
273 __gen_field(values->MaximumNumberofThreads, 23, 31) |
274 __gen_field(values->StatisticsEnable, 10, 10) |
275 __gen_field(values->SIMD8DispatchEnable, 2, 2) |
276 __gen_field(values->VertexCacheDisable, 1, 1) |
277 __gen_field(values->FunctionEnable, 0, 0) |
278 0;
279
280 dw[8] =
281 __gen_field(values->VertexURBEntryOutputReadOffset, 21, 26) |
282 __gen_field(values->VertexURBEntryOutputLength, 16, 20) |
283 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 8, 15) |
284 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
285 0;
286
287 }
288
289 #define GEN9_GPGPU_CSR_BASE_ADDRESS_length_bias 0x00000002
290 #define GEN9_GPGPU_CSR_BASE_ADDRESS_header \
291 .CommandType = 3, \
292 .CommandSubType = 0, \
293 ._3DCommandOpcode = 1, \
294 ._3DCommandSubOpcode = 4, \
295 .DwordLength = 1
296
297 #define GEN9_GPGPU_CSR_BASE_ADDRESS_length 0x00000003
298
299 struct GEN9_GPGPU_CSR_BASE_ADDRESS {
300 uint32_t CommandType;
301 uint32_t CommandSubType;
302 uint32_t _3DCommandOpcode;
303 uint32_t _3DCommandSubOpcode;
304 uint32_t DwordLength;
305 __gen_address_type GPGPUCSRBaseAddress;
306 };
307
308 static inline void
309 GEN9_GPGPU_CSR_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
310 const struct GEN9_GPGPU_CSR_BASE_ADDRESS * restrict values)
311 {
312 uint32_t *dw = (uint32_t * restrict) dst;
313
314 dw[0] =
315 __gen_field(values->CommandType, 29, 31) |
316 __gen_field(values->CommandSubType, 27, 28) |
317 __gen_field(values->_3DCommandOpcode, 24, 26) |
318 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
319 __gen_field(values->DwordLength, 0, 7) |
320 0;
321
322 uint32_t dw1 =
323 0;
324
325 uint64_t qw1 =
326 __gen_combine_address(data, &dw[1], values->GPGPUCSRBaseAddress, dw1);
327
328 dw[1] = qw1;
329 dw[2] = qw1 >> 32;
330
331 }
332
333 #define GEN9_MI_ATOMIC_length_bias 0x00000002
334 #define GEN9_MI_ATOMIC_header \
335 .CommandType = 0, \
336 .MICommandOpcode = 47
337
338 #define GEN9_MI_ATOMIC_length 0x00000003
339
340 struct __gen_prefix(MI_ATOMIC) {
341 uint32_t CommandType;
342 uint32_t MICommandOpcode;
343 #define PerProcessGraphicsAddress 0
344 #define GlobalGraphicsAddress 1
345 uint32_t MemoryType;
346 uint32_t PostSyncOperation;
347 #define DWORD 0
348 #define QWORD 1
349 #define OCTWORD 2
350 #define RESERVED 3
351 uint32_t DataSize;
352 uint32_t InlineData;
353 uint32_t CSSTALL;
354 uint32_t ReturnDataControl;
355 uint32_t ATOMICOPCODE;
356 uint32_t DwordLength;
357 __gen_address_type MemoryAddress;
358 uint32_t Operand1DataDword0;
359 uint32_t Operand2DataDword0;
360 uint32_t Operand1DataDword1;
361 uint32_t Operand2DataDword1;
362 uint32_t Operand1DataDword2;
363 uint32_t Operand2DataDword2;
364 uint32_t Operand1DataDword3;
365 uint32_t Operand2DataDword3;
366 };
367
368 static inline void
369 GEN9_MI_ATOMIC_pack(__gen_user_data *data, void * restrict dst,
370 const struct GEN9_MI_ATOMIC * restrict values)
371 {
372 uint32_t *dw = (uint32_t * restrict) dst;
373
374 dw[0] =
375 __gen_field(values->CommandType, 29, 31) |
376 __gen_field(values->MICommandOpcode, 23, 28) |
377 __gen_field(values->MemoryType, 22, 22) |
378 __gen_field(values->PostSyncOperation, 21, 21) |
379 __gen_field(values->DataSize, 19, 20) |
380 __gen_field(values->InlineData, 18, 18) |
381 __gen_field(values->CSSTALL, 17, 17) |
382 __gen_field(values->ReturnDataControl, 16, 16) |
383 __gen_field(values->ATOMICOPCODE, 8, 15) |
384 __gen_field(values->DwordLength, 0, 7) |
385 0;
386
387 uint32_t dw1 =
388 0;
389
390 uint64_t qw1 =
391 __gen_combine_address(data, &dw[1], values->MemoryAddress, dw1);
392
393 dw[1] = qw1;
394 dw[2] = qw1 >> 32;
395
396 dw[3] =
397 __gen_field(values->Operand1DataDword0, 0, 31) |
398 0;
399
400 dw[4] =
401 __gen_field(values->Operand2DataDword0, 0, 31) |
402 0;
403
404 dw[5] =
405 __gen_field(values->Operand1DataDword1, 0, 31) |
406 0;
407
408 dw[6] =
409 __gen_field(values->Operand2DataDword1, 0, 31) |
410 0;
411
412 dw[7] =
413 __gen_field(values->Operand1DataDword2, 0, 31) |
414 0;
415
416 dw[8] =
417 __gen_field(values->Operand2DataDword2, 0, 31) |
418 0;
419
420 dw[9] =
421 __gen_field(values->Operand1DataDword3, 0, 31) |
422 0;
423
424 dw[10] =
425 __gen_field(values->Operand2DataDword3, 0, 31) |
426 0;
427
428 }
429
430 #define GEN9_MI_BATCH_BUFFER_START_length_bias 0x00000002
431 #define GEN9_MI_BATCH_BUFFER_START_header \
432 .CommandType = 0, \
433 .MICommandOpcode = 49, \
434 .DwordLength = 1
435
436 #define GEN9_MI_BATCH_BUFFER_START_length 0x00000003
437
438 struct GEN9_MI_BATCH_BUFFER_START {
439 uint32_t CommandType;
440 uint32_t MICommandOpcode;
441 #define Firstlevelbatch 0
442 #define Secondlevelbatch 1
443 uint32_t SecondLevelBatchBuffer;
444 bool AddOffsetEnable;
445 uint32_t PredicationEnable;
446 bool ResourceStreamerEnable;
447 #define ASI_GGTT 0
448 #define ASI_PPGTT 1
449 uint32_t AddressSpaceIndicator;
450 uint32_t DwordLength;
451 __gen_address_type BatchBufferStartAddress;
452 };
453
454 static inline void
455 GEN9_MI_BATCH_BUFFER_START_pack(__gen_user_data *data, void * restrict dst,
456 const struct GEN9_MI_BATCH_BUFFER_START * restrict values)
457 {
458 uint32_t *dw = (uint32_t * restrict) dst;
459
460 dw[0] =
461 __gen_field(values->CommandType, 29, 31) |
462 __gen_field(values->MICommandOpcode, 23, 28) |
463 __gen_field(values->SecondLevelBatchBuffer, 22, 22) |
464 __gen_field(values->AddOffsetEnable, 16, 16) |
465 __gen_field(values->PredicationEnable, 15, 15) |
466 __gen_field(values->ResourceStreamerEnable, 10, 10) |
467 __gen_field(values->AddressSpaceIndicator, 8, 8) |
468 __gen_field(values->DwordLength, 0, 7) |
469 0;
470
471 uint32_t dw1 =
472 0;
473
474 uint64_t qw1 =
475 __gen_combine_address(data, &dw[1], values->BatchBufferStartAddress, dw1);
476
477 dw[1] = qw1;
478 dw[2] = qw1 >> 32;
479
480 }
481
482 #define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_length_bias 0x00000002
483 #define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_header\
484 .CommandType = 0, \
485 .MICommandOpcode = 54, \
486 .UseGlobalGTT = 0, \
487 .CompareSemaphore = 0, \
488 .DwordLength = 2
489
490 #define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_length 0x00000004
491
492 struct GEN9_MI_CONDITIONAL_BATCH_BUFFER_END {
493 uint32_t CommandType;
494 uint32_t MICommandOpcode;
495 uint32_t UseGlobalGTT;
496 uint32_t CompareSemaphore;
497 #define CompareMaskModeDisabled 0
498 #define CompareMaskModeEnabled 1
499 uint32_t CompareMaskMode;
500 uint32_t DwordLength;
501 uint32_t CompareDataDword;
502 __gen_address_type CompareAddress;
503 };
504
505 static inline void
506 GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
507 const struct GEN9_MI_CONDITIONAL_BATCH_BUFFER_END * restrict values)
508 {
509 uint32_t *dw = (uint32_t * restrict) dst;
510
511 dw[0] =
512 __gen_field(values->CommandType, 29, 31) |
513 __gen_field(values->MICommandOpcode, 23, 28) |
514 __gen_field(values->UseGlobalGTT, 22, 22) |
515 __gen_field(values->CompareSemaphore, 21, 21) |
516 __gen_field(values->CompareMaskMode, 19, 19) |
517 __gen_field(values->DwordLength, 0, 7) |
518 0;
519
520 dw[1] =
521 __gen_field(values->CompareDataDword, 0, 31) |
522 0;
523
524 uint32_t dw2 =
525 0;
526
527 uint64_t qw2 =
528 __gen_combine_address(data, &dw[2], values->CompareAddress, dw2);
529
530 dw[2] = qw2;
531 dw[3] = qw2 >> 32;
532
533 }
534
535 #define GEN9_MI_FORCE_WAKEUP_length_bias 0x00000002
536 #define GEN9_MI_FORCE_WAKEUP_header \
537 .CommandType = 0, \
538 .MICommandOpcode = 29, \
539 .DwordLength = 0
540
541 #define GEN9_MI_FORCE_WAKEUP_length 0x00000002
542
543 struct GEN9_MI_FORCE_WAKEUP {
544 uint32_t CommandType;
545 uint32_t MICommandOpcode;
546 uint32_t DwordLength;
547 uint32_t MaskBits;
548 uint32_t ForceRenderAwake;
549 uint32_t ForceMediaAwake;
550 };
551
552 static inline void
553 GEN9_MI_FORCE_WAKEUP_pack(__gen_user_data *data, void * restrict dst,
554 const struct GEN9_MI_FORCE_WAKEUP * restrict values)
555 {
556 uint32_t *dw = (uint32_t * restrict) dst;
557
558 dw[0] =
559 __gen_field(values->CommandType, 29, 31) |
560 __gen_field(values->MICommandOpcode, 23, 28) |
561 __gen_field(values->DwordLength, 0, 7) |
562 0;
563
564 dw[1] =
565 __gen_field(values->MaskBits, 16, 31) |
566 __gen_field(values->ForceRenderAwake, 1, 1) |
567 __gen_field(values->ForceMediaAwake, 0, 0) |
568 0;
569
570 }
571
572 #define GEN9_MI_LOAD_REGISTER_IMM_length_bias 0x00000002
573 #define GEN9_MI_LOAD_REGISTER_IMM_header \
574 .CommandType = 0, \
575 .MICommandOpcode = 34, \
576 .DwordLength = 1
577
578 #define GEN9_MI_LOAD_REGISTER_IMM_length 0x00000003
579
580 struct GEN9_MI_LOAD_REGISTER_IMM {
581 uint32_t CommandType;
582 uint32_t MICommandOpcode;
583 uint32_t ByteWriteDisables;
584 uint32_t DwordLength;
585 uint32_t RegisterOffset;
586 uint32_t DataDWord;
587 };
588
589 static inline void
590 GEN9_MI_LOAD_REGISTER_IMM_pack(__gen_user_data *data, void * restrict dst,
591 const struct GEN9_MI_LOAD_REGISTER_IMM * restrict values)
592 {
593 uint32_t *dw = (uint32_t * restrict) dst;
594
595 dw[0] =
596 __gen_field(values->CommandType, 29, 31) |
597 __gen_field(values->MICommandOpcode, 23, 28) |
598 __gen_field(values->ByteWriteDisables, 8, 11) |
599 __gen_field(values->DwordLength, 0, 7) |
600 0;
601
602 dw[1] =
603 __gen_offset(values->RegisterOffset, 2, 22) |
604 0;
605
606 dw[2] =
607 __gen_field(values->DataDWord, 0, 31) |
608 0;
609
610 }
611
612 #define GEN9_MI_LOAD_REGISTER_REG_length_bias 0x00000002
613 #define GEN9_MI_LOAD_REGISTER_REG_header \
614 .CommandType = 0, \
615 .MICommandOpcode = 42, \
616 .DwordLength = 1
617
618 #define GEN9_MI_LOAD_REGISTER_REG_length 0x00000003
619
620 struct GEN9_MI_LOAD_REGISTER_REG {
621 uint32_t CommandType;
622 uint32_t MICommandOpcode;
623 uint32_t DwordLength;
624 uint32_t SourceRegisterAddress;
625 uint32_t DestinationRegisterAddress;
626 };
627
628 static inline void
629 GEN9_MI_LOAD_REGISTER_REG_pack(__gen_user_data *data, void * restrict dst,
630 const struct GEN9_MI_LOAD_REGISTER_REG * restrict values)
631 {
632 uint32_t *dw = (uint32_t * restrict) dst;
633
634 dw[0] =
635 __gen_field(values->CommandType, 29, 31) |
636 __gen_field(values->MICommandOpcode, 23, 28) |
637 __gen_field(values->DwordLength, 0, 7) |
638 0;
639
640 dw[1] =
641 __gen_offset(values->SourceRegisterAddress, 2, 22) |
642 0;
643
644 dw[2] =
645 __gen_offset(values->DestinationRegisterAddress, 2, 22) |
646 0;
647
648 }
649
650 #define GEN9_MI_SEMAPHORE_SIGNAL_length_bias 0x00000002
651 #define GEN9_MI_SEMAPHORE_SIGNAL_header \
652 .CommandType = 0, \
653 .MICommandOpcode = 27, \
654 .DwordLength = 0
655
656 #define GEN9_MI_SEMAPHORE_SIGNAL_length 0x00000002
657
658 struct GEN9_MI_SEMAPHORE_SIGNAL {
659 uint32_t CommandType;
660 uint32_t MICommandOpcode;
661 uint32_t PostSyncOperation;
662 #define RCS 0
663 #define VCS0 1
664 #define BCS 2
665 #define VECS 3
666 #define VCS1 4
667 uint32_t TargetEngineSelect;
668 uint32_t DwordLength;
669 uint32_t TargetContextID;
670 };
671
672 static inline void
673 GEN9_MI_SEMAPHORE_SIGNAL_pack(__gen_user_data *data, void * restrict dst,
674 const struct GEN9_MI_SEMAPHORE_SIGNAL * restrict values)
675 {
676 uint32_t *dw = (uint32_t * restrict) dst;
677
678 dw[0] =
679 __gen_field(values->CommandType, 29, 31) |
680 __gen_field(values->MICommandOpcode, 23, 28) |
681 __gen_field(values->PostSyncOperation, 21, 21) |
682 __gen_field(values->TargetEngineSelect, 15, 17) |
683 __gen_field(values->DwordLength, 0, 7) |
684 0;
685
686 dw[1] =
687 __gen_field(values->TargetContextID, 0, 31) |
688 0;
689
690 }
691
692 #define GEN9_MI_SEMAPHORE_WAIT_length_bias 0x00000002
693 #define GEN9_MI_SEMAPHORE_WAIT_header \
694 .CommandType = 0, \
695 .MICommandOpcode = 28, \
696 .DwordLength = 2
697
698 #define GEN9_MI_SEMAPHORE_WAIT_length 0x00000004
699
700 struct GEN9_MI_SEMAPHORE_WAIT {
701 uint32_t CommandType;
702 uint32_t MICommandOpcode;
703 #define PerProcessGraphicsAddress 0
704 #define GlobalGraphicsAddress 1
705 uint32_t MemoryType;
706 #define PollingMode 1
707 #define SignalMode 0
708 uint32_t WaitMode;
709 #define SAD_GREATER_THAN_SDD 0
710 #define SAD_GREATER_THAN_OR_EQUAL_SDD 1
711 #define SAD_LESS_THAN_SDD 2
712 #define SAD_LESS_THAN_OR_EQUAL_SDD 3
713 #define SAD_EQUAL_SDD 4
714 #define SAD_NOT_EQUAL_SDD 5
715 uint32_t CompareOperation;
716 uint32_t DwordLength;
717 uint32_t SemaphoreDataDword;
718 __gen_address_type SemaphoreAddress;
719 };
720
721 static inline void
722 GEN9_MI_SEMAPHORE_WAIT_pack(__gen_user_data *data, void * restrict dst,
723 const struct GEN9_MI_SEMAPHORE_WAIT * restrict values)
724 {
725 uint32_t *dw = (uint32_t * restrict) dst;
726
727 dw[0] =
728 __gen_field(values->CommandType, 29, 31) |
729 __gen_field(values->MICommandOpcode, 23, 28) |
730 __gen_field(values->MemoryType, 22, 22) |
731 __gen_field(values->WaitMode, 15, 15) |
732 __gen_field(values->CompareOperation, 12, 14) |
733 __gen_field(values->DwordLength, 0, 7) |
734 0;
735
736 dw[1] =
737 __gen_field(values->SemaphoreDataDword, 0, 31) |
738 0;
739
740 uint32_t dw2 =
741 0;
742
743 uint64_t qw2 =
744 __gen_combine_address(data, &dw[2], values->SemaphoreAddress, dw2);
745
746 dw[2] = qw2;
747 dw[3] = qw2 >> 32;
748
749 }
750
751 #define GEN9_MI_STORE_DATA_IMM_length_bias 0x00000002
752 #define GEN9_MI_STORE_DATA_IMM_header \
753 .CommandType = 0, \
754 .MICommandOpcode = 32, \
755 .DwordLength = 2
756
757 #define GEN9_MI_STORE_DATA_IMM_length 0x00000004
758
759 struct GEN9_MI_STORE_DATA_IMM {
760 uint32_t CommandType;
761 uint32_t MICommandOpcode;
762 bool UseGlobalGTT;
763 bool StoreQword;
764 uint32_t DwordLength;
765 __gen_address_type Address;
766 uint32_t CoreModeEnable;
767 uint32_t DataDWord0;
768 uint32_t DataDWord1;
769 };
770
771 static inline void
772 GEN9_MI_STORE_DATA_IMM_pack(__gen_user_data *data, void * restrict dst,
773 const struct GEN9_MI_STORE_DATA_IMM * restrict values)
774 {
775 uint32_t *dw = (uint32_t * restrict) dst;
776
777 dw[0] =
778 __gen_field(values->CommandType, 29, 31) |
779 __gen_field(values->MICommandOpcode, 23, 28) |
780 __gen_field(values->UseGlobalGTT, 22, 22) |
781 __gen_field(values->StoreQword, 21, 21) |
782 __gen_field(values->DwordLength, 0, 9) |
783 0;
784
785 uint32_t dw1 =
786 __gen_field(values->CoreModeEnable, 0, 0) |
787 0;
788
789 uint64_t qw1 =
790 __gen_combine_address(data, &dw[1], values->Address, dw1);
791
792 dw[1] = qw1;
793 dw[2] = qw1 >> 32;
794
795 dw[3] =
796 __gen_field(values->DataDWord0, 0, 31) |
797 0;
798
799 dw[4] =
800 __gen_field(values->DataDWord1, 0, 31) |
801 0;
802
803 }
804
805 #define GEN9_MI_STORE_REGISTER_MEM_length_bias 0x00000002
806 #define GEN9_MI_STORE_REGISTER_MEM_header \
807 .CommandType = 0, \
808 .MICommandOpcode = 36, \
809 .DwordLength = 2
810
811 #define GEN9_MI_STORE_REGISTER_MEM_length 0x00000004
812
813 struct GEN9_MI_STORE_REGISTER_MEM {
814 uint32_t CommandType;
815 uint32_t MICommandOpcode;
816 bool UseGlobalGTT;
817 uint32_t PredicateEnable;
818 uint32_t DwordLength;
819 uint32_t RegisterAddress;
820 __gen_address_type MemoryAddress;
821 };
822
823 static inline void
824 GEN9_MI_STORE_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
825 const struct GEN9_MI_STORE_REGISTER_MEM * restrict values)
826 {
827 uint32_t *dw = (uint32_t * restrict) dst;
828
829 dw[0] =
830 __gen_field(values->CommandType, 29, 31) |
831 __gen_field(values->MICommandOpcode, 23, 28) |
832 __gen_field(values->UseGlobalGTT, 22, 22) |
833 __gen_field(values->PredicateEnable, 21, 21) |
834 __gen_field(values->DwordLength, 0, 7) |
835 0;
836
837 dw[1] =
838 __gen_offset(values->RegisterAddress, 2, 22) |
839 0;
840
841 uint32_t dw2 =
842 0;
843
844 uint64_t qw2 =
845 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
846
847 dw[2] = qw2;
848 dw[3] = qw2 >> 32;
849
850 }
851
852 #define GEN9_PIPELINE_SELECT_length_bias 0x00000001
853 #define GEN9_PIPELINE_SELECT_header \
854 .CommandType = 3, \
855 .CommandSubType = 1, \
856 ._3DCommandOpcode = 1, \
857 ._3DCommandSubOpcode = 4
858
859 #define GEN9_PIPELINE_SELECT_length 0x00000001
860
861 struct GEN9_PIPELINE_SELECT {
862 uint32_t CommandType;
863 uint32_t CommandSubType;
864 uint32_t _3DCommandOpcode;
865 uint32_t _3DCommandSubOpcode;
866 uint32_t MaskBits;
867 uint32_t ForceMediaAwake;
868 uint32_t MediaSamplerDOPClockGateEnable;
869 #define _3D 0
870 #define Media 1
871 #define GPGPU 2
872 uint32_t PipelineSelection;
873 };
874
875 static inline void
876 GEN9_PIPELINE_SELECT_pack(__gen_user_data *data, void * restrict dst,
877 const struct GEN9_PIPELINE_SELECT * restrict values)
878 {
879 uint32_t *dw = (uint32_t * restrict) dst;
880
881 dw[0] =
882 __gen_field(values->CommandType, 29, 31) |
883 __gen_field(values->CommandSubType, 27, 28) |
884 __gen_field(values->_3DCommandOpcode, 24, 26) |
885 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
886 __gen_field(values->MaskBits, 8, 15) |
887 __gen_field(values->ForceMediaAwake, 5, 5) |
888 __gen_field(values->MediaSamplerDOPClockGateEnable, 4, 4) |
889 __gen_field(values->PipelineSelection, 0, 1) |
890 0;
891
892 }
893
894 #define GEN9_STATE_BASE_ADDRESS_length_bias 0x00000002
895 #define GEN9_STATE_BASE_ADDRESS_header \
896 .CommandType = 3, \
897 .CommandSubType = 0, \
898 ._3DCommandOpcode = 1, \
899 ._3DCommandSubOpcode = 1, \
900 .DwordLength = 17
901
902 #define GEN9_STATE_BASE_ADDRESS_length 0x00000013
903
904 #define GEN9_MEMORY_OBJECT_CONTROL_STATE_length 0x00000001
905
906 struct GEN9_MEMORY_OBJECT_CONTROL_STATE {
907 uint32_t IndextoMOCSTables;
908 };
909
910 static inline void
911 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(__gen_user_data *data, void * restrict dst,
912 const struct GEN9_MEMORY_OBJECT_CONTROL_STATE * restrict values)
913 {
914 uint32_t *dw = (uint32_t * restrict) dst;
915
916 dw[0] =
917 __gen_field(values->IndextoMOCSTables, 1, 6) |
918 0;
919
920 }
921
922 struct GEN9_STATE_BASE_ADDRESS {
923 uint32_t CommandType;
924 uint32_t CommandSubType;
925 uint32_t _3DCommandOpcode;
926 uint32_t _3DCommandSubOpcode;
927 uint32_t DwordLength;
928 __gen_address_type GeneralStateBaseAddress;
929 struct GEN9_MEMORY_OBJECT_CONTROL_STATE GeneralStateMemoryObjectControlState;
930 bool GeneralStateBaseAddressModifyEnable;
931 struct GEN9_MEMORY_OBJECT_CONTROL_STATE StatelessDataPortAccessMemoryObjectControlState;
932 __gen_address_type SurfaceStateBaseAddress;
933 struct GEN9_MEMORY_OBJECT_CONTROL_STATE SurfaceStateMemoryObjectControlState;
934 bool SurfaceStateBaseAddressModifyEnable;
935 __gen_address_type DynamicStateBaseAddress;
936 struct GEN9_MEMORY_OBJECT_CONTROL_STATE DynamicStateMemoryObjectControlState;
937 bool DynamicStateBaseAddressModifyEnable;
938 __gen_address_type IndirectObjectBaseAddress;
939 struct GEN9_MEMORY_OBJECT_CONTROL_STATE IndirectObjectMemoryObjectControlState;
940 bool IndirectObjectBaseAddressModifyEnable;
941 __gen_address_type InstructionBaseAddress;
942 struct GEN9_MEMORY_OBJECT_CONTROL_STATE InstructionMemoryObjectControlState;
943 bool InstructionBaseAddressModifyEnable;
944 uint32_t GeneralStateBufferSize;
945 bool GeneralStateBufferSizeModifyEnable;
946 uint32_t DynamicStateBufferSize;
947 bool DynamicStateBufferSizeModifyEnable;
948 uint32_t IndirectObjectBufferSize;
949 bool IndirectObjectBufferSizeModifyEnable;
950 uint32_t InstructionBufferSize;
951 bool InstructionBuffersizeModifyEnable;
952 __gen_address_type BindlessSurfaceStateBaseAddress;
953 struct GEN9_MEMORY_OBJECT_CONTROL_STATE BindlessSurfaceStateMemoryObjectControlState;
954 bool BindlessSurfaceStateBaseAddressModifyEnable;
955 uint32_t BindlessSurfaceStateSize;
956 };
957
958 static inline void
959 GEN9_STATE_BASE_ADDRESS_pack(__gen_user_data *data, void * restrict dst,
960 const struct GEN9_STATE_BASE_ADDRESS * restrict values)
961 {
962 uint32_t *dw = (uint32_t * restrict) dst;
963
964 dw[0] =
965 __gen_field(values->CommandType, 29, 31) |
966 __gen_field(values->CommandSubType, 27, 28) |
967 __gen_field(values->_3DCommandOpcode, 24, 26) |
968 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
969 __gen_field(values->DwordLength, 0, 7) |
970 0;
971
972 uint32_t dw_GeneralStateMemoryObjectControlState;
973 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_GeneralStateMemoryObjectControlState, &values->GeneralStateMemoryObjectControlState);
974 uint32_t dw1 =
975 __gen_field(dw_GeneralStateMemoryObjectControlState, 4, 10) |
976 __gen_field(values->GeneralStateBaseAddressModifyEnable, 0, 0) |
977 0;
978
979 uint64_t qw1 =
980 __gen_combine_address(data, &dw[1], values->GeneralStateBaseAddress, dw1);
981
982 dw[1] = qw1;
983 dw[2] = qw1 >> 32;
984
985 uint32_t dw_StatelessDataPortAccessMemoryObjectControlState;
986 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StatelessDataPortAccessMemoryObjectControlState, &values->StatelessDataPortAccessMemoryObjectControlState);
987 dw[3] =
988 __gen_field(dw_StatelessDataPortAccessMemoryObjectControlState, 16, 22) |
989 0;
990
991 uint32_t dw_SurfaceStateMemoryObjectControlState;
992 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceStateMemoryObjectControlState, &values->SurfaceStateMemoryObjectControlState);
993 uint32_t dw4 =
994 __gen_field(dw_SurfaceStateMemoryObjectControlState, 4, 10) |
995 __gen_field(values->SurfaceStateBaseAddressModifyEnable, 0, 0) |
996 0;
997
998 uint64_t qw4 =
999 __gen_combine_address(data, &dw[4], values->SurfaceStateBaseAddress, dw4);
1000
1001 dw[4] = qw4;
1002 dw[5] = qw4 >> 32;
1003
1004 uint32_t dw_DynamicStateMemoryObjectControlState;
1005 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DynamicStateMemoryObjectControlState, &values->DynamicStateMemoryObjectControlState);
1006 uint32_t dw6 =
1007 __gen_field(dw_DynamicStateMemoryObjectControlState, 4, 10) |
1008 __gen_field(values->DynamicStateBaseAddressModifyEnable, 0, 0) |
1009 0;
1010
1011 uint64_t qw6 =
1012 __gen_combine_address(data, &dw[6], values->DynamicStateBaseAddress, dw6);
1013
1014 dw[6] = qw6;
1015 dw[7] = qw6 >> 32;
1016
1017 uint32_t dw_IndirectObjectMemoryObjectControlState;
1018 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_IndirectObjectMemoryObjectControlState, &values->IndirectObjectMemoryObjectControlState);
1019 uint32_t dw8 =
1020 __gen_field(dw_IndirectObjectMemoryObjectControlState, 4, 10) |
1021 __gen_field(values->IndirectObjectBaseAddressModifyEnable, 0, 0) |
1022 0;
1023
1024 uint64_t qw8 =
1025 __gen_combine_address(data, &dw[8], values->IndirectObjectBaseAddress, dw8);
1026
1027 dw[8] = qw8;
1028 dw[9] = qw8 >> 32;
1029
1030 uint32_t dw_InstructionMemoryObjectControlState;
1031 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_InstructionMemoryObjectControlState, &values->InstructionMemoryObjectControlState);
1032 uint32_t dw10 =
1033 __gen_field(dw_InstructionMemoryObjectControlState, 4, 10) |
1034 __gen_field(values->InstructionBaseAddressModifyEnable, 0, 0) |
1035 0;
1036
1037 uint64_t qw10 =
1038 __gen_combine_address(data, &dw[10], values->InstructionBaseAddress, dw10);
1039
1040 dw[10] = qw10;
1041 dw[11] = qw10 >> 32;
1042
1043 dw[12] =
1044 __gen_field(values->GeneralStateBufferSize, 12, 31) |
1045 __gen_field(values->GeneralStateBufferSizeModifyEnable, 0, 0) |
1046 0;
1047
1048 dw[13] =
1049 __gen_field(values->DynamicStateBufferSize, 12, 31) |
1050 __gen_field(values->DynamicStateBufferSizeModifyEnable, 0, 0) |
1051 0;
1052
1053 dw[14] =
1054 __gen_field(values->IndirectObjectBufferSize, 12, 31) |
1055 __gen_field(values->IndirectObjectBufferSizeModifyEnable, 0, 0) |
1056 0;
1057
1058 dw[15] =
1059 __gen_field(values->InstructionBufferSize, 12, 31) |
1060 __gen_field(values->InstructionBuffersizeModifyEnable, 0, 0) |
1061 0;
1062
1063 uint32_t dw_BindlessSurfaceStateMemoryObjectControlState;
1064 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_BindlessSurfaceStateMemoryObjectControlState, &values->BindlessSurfaceStateMemoryObjectControlState);
1065 uint32_t dw16 =
1066 __gen_field(dw_BindlessSurfaceStateMemoryObjectControlState, 4, 10) |
1067 __gen_field(values->BindlessSurfaceStateBaseAddressModifyEnable, 0, 0) |
1068 0;
1069
1070 uint64_t qw16 =
1071 __gen_combine_address(data, &dw[16], values->BindlessSurfaceStateBaseAddress, dw16);
1072
1073 dw[16] = qw16;
1074 dw[17] = qw16 >> 32;
1075
1076 dw[18] =
1077 __gen_field(values->BindlessSurfaceStateSize, 12, 31) |
1078 0;
1079
1080 }
1081
1082 #define GEN9_STATE_PREFETCH_length_bias 0x00000002
1083 #define GEN9_STATE_PREFETCH_header \
1084 .CommandType = 3, \
1085 .CommandSubType = 0, \
1086 ._3DCommandOpcode = 0, \
1087 ._3DCommandSubOpcode = 3, \
1088 .DwordLength = 0
1089
1090 #define GEN9_STATE_PREFETCH_length 0x00000002
1091
1092 struct GEN9_STATE_PREFETCH {
1093 uint32_t CommandType;
1094 uint32_t CommandSubType;
1095 uint32_t _3DCommandOpcode;
1096 uint32_t _3DCommandSubOpcode;
1097 uint32_t DwordLength;
1098 __gen_address_type PrefetchPointer;
1099 uint32_t PrefetchCount;
1100 };
1101
1102 static inline void
1103 GEN9_STATE_PREFETCH_pack(__gen_user_data *data, void * restrict dst,
1104 const struct GEN9_STATE_PREFETCH * restrict values)
1105 {
1106 uint32_t *dw = (uint32_t * restrict) dst;
1107
1108 dw[0] =
1109 __gen_field(values->CommandType, 29, 31) |
1110 __gen_field(values->CommandSubType, 27, 28) |
1111 __gen_field(values->_3DCommandOpcode, 24, 26) |
1112 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1113 __gen_field(values->DwordLength, 0, 7) |
1114 0;
1115
1116 uint32_t dw1 =
1117 __gen_field(values->PrefetchCount, 0, 2) |
1118 0;
1119
1120 dw[1] =
1121 __gen_combine_address(data, &dw[1], values->PrefetchPointer, dw1);
1122
1123 }
1124
1125 #define GEN9_STATE_SIP_length_bias 0x00000002
1126 #define GEN9_STATE_SIP_header \
1127 .CommandType = 3, \
1128 .CommandSubType = 0, \
1129 ._3DCommandOpcode = 1, \
1130 ._3DCommandSubOpcode = 2, \
1131 .DwordLength = 1
1132
1133 #define GEN9_STATE_SIP_length 0x00000003
1134
1135 struct GEN9_STATE_SIP {
1136 uint32_t CommandType;
1137 uint32_t CommandSubType;
1138 uint32_t _3DCommandOpcode;
1139 uint32_t _3DCommandSubOpcode;
1140 uint32_t DwordLength;
1141 uint64_t SystemInstructionPointer;
1142 };
1143
1144 static inline void
1145 GEN9_STATE_SIP_pack(__gen_user_data *data, void * restrict dst,
1146 const struct GEN9_STATE_SIP * restrict values)
1147 {
1148 uint32_t *dw = (uint32_t * restrict) dst;
1149
1150 dw[0] =
1151 __gen_field(values->CommandType, 29, 31) |
1152 __gen_field(values->CommandSubType, 27, 28) |
1153 __gen_field(values->_3DCommandOpcode, 24, 26) |
1154 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1155 __gen_field(values->DwordLength, 0, 7) |
1156 0;
1157
1158 uint64_t qw1 =
1159 __gen_offset(values->SystemInstructionPointer, 4, 63) |
1160 0;
1161
1162 dw[1] = qw1;
1163 dw[2] = qw1 >> 32;
1164
1165 }
1166
1167 #define GEN9_3DPRIMITIVE_length_bias 0x00000002
1168 #define GEN9_3DPRIMITIVE_header \
1169 .CommandType = 3, \
1170 .CommandSubType = 3, \
1171 ._3DCommandOpcode = 3, \
1172 ._3DCommandSubOpcode = 0, \
1173 .DwordLength = 5
1174
1175 #define GEN9_3DPRIMITIVE_length 0x00000007
1176
1177 struct GEN9_3DPRIMITIVE {
1178 uint32_t CommandType;
1179 uint32_t CommandSubType;
1180 uint32_t _3DCommandOpcode;
1181 uint32_t _3DCommandSubOpcode;
1182 bool IndirectParameterEnable;
1183 uint32_t UAVCoherencyRequired;
1184 bool PredicateEnable;
1185 uint32_t DwordLength;
1186 bool EndOffsetEnable;
1187 #define SEQUENTIAL 0
1188 #define RANDOM 1
1189 uint32_t VertexAccessType;
1190 uint32_t PrimitiveTopologyType;
1191 uint32_t VertexCountPerInstance;
1192 uint32_t StartVertexLocation;
1193 uint32_t InstanceCount;
1194 uint32_t StartInstanceLocation;
1195 uint32_t BaseVertexLocation;
1196 };
1197
1198 static inline void
1199 GEN9_3DPRIMITIVE_pack(__gen_user_data *data, void * restrict dst,
1200 const struct GEN9_3DPRIMITIVE * restrict values)
1201 {
1202 uint32_t *dw = (uint32_t * restrict) dst;
1203
1204 dw[0] =
1205 __gen_field(values->CommandType, 29, 31) |
1206 __gen_field(values->CommandSubType, 27, 28) |
1207 __gen_field(values->_3DCommandOpcode, 24, 26) |
1208 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1209 __gen_field(values->IndirectParameterEnable, 10, 10) |
1210 __gen_field(values->UAVCoherencyRequired, 9, 9) |
1211 __gen_field(values->PredicateEnable, 8, 8) |
1212 __gen_field(values->DwordLength, 0, 7) |
1213 0;
1214
1215 dw[1] =
1216 __gen_field(values->EndOffsetEnable, 9, 9) |
1217 __gen_field(values->VertexAccessType, 8, 8) |
1218 __gen_field(values->PrimitiveTopologyType, 0, 5) |
1219 0;
1220
1221 dw[2] =
1222 __gen_field(values->VertexCountPerInstance, 0, 31) |
1223 0;
1224
1225 dw[3] =
1226 __gen_field(values->StartVertexLocation, 0, 31) |
1227 0;
1228
1229 dw[4] =
1230 __gen_field(values->InstanceCount, 0, 31) |
1231 0;
1232
1233 dw[5] =
1234 __gen_field(values->StartInstanceLocation, 0, 31) |
1235 0;
1236
1237 dw[6] =
1238 __gen_field(values->BaseVertexLocation, 0, 31) |
1239 0;
1240
1241 }
1242
1243 #define GEN9_3DSTATE_AA_LINE_PARAMETERS_length_bias 0x00000002
1244 #define GEN9_3DSTATE_AA_LINE_PARAMETERS_header \
1245 .CommandType = 3, \
1246 .CommandSubType = 3, \
1247 ._3DCommandOpcode = 1, \
1248 ._3DCommandSubOpcode = 10, \
1249 .DwordLength = 1
1250
1251 #define GEN9_3DSTATE_AA_LINE_PARAMETERS_length 0x00000003
1252
1253 struct GEN9_3DSTATE_AA_LINE_PARAMETERS {
1254 uint32_t CommandType;
1255 uint32_t CommandSubType;
1256 uint32_t _3DCommandOpcode;
1257 uint32_t _3DCommandSubOpcode;
1258 uint32_t DwordLength;
1259 float AAPointCoverageBias;
1260 float AACoverageBias;
1261 float AAPointCoverageSlope;
1262 float AACoverageSlope;
1263 float AAPointCoverageEndCapBias;
1264 float AACoverageEndCapBias;
1265 float AAPointCoverageEndCapSlope;
1266 float AACoverageEndCapSlope;
1267 };
1268
1269 static inline void
1270 GEN9_3DSTATE_AA_LINE_PARAMETERS_pack(__gen_user_data *data, void * restrict dst,
1271 const struct GEN9_3DSTATE_AA_LINE_PARAMETERS * restrict values)
1272 {
1273 uint32_t *dw = (uint32_t * restrict) dst;
1274
1275 dw[0] =
1276 __gen_field(values->CommandType, 29, 31) |
1277 __gen_field(values->CommandSubType, 27, 28) |
1278 __gen_field(values->_3DCommandOpcode, 24, 26) |
1279 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1280 __gen_field(values->DwordLength, 0, 7) |
1281 0;
1282
1283 dw[1] =
1284 __gen_field(values->AAPointCoverageBias * (1 << 8), 24, 31) |
1285 __gen_field(values->AACoverageBias * (1 << 8), 16, 23) |
1286 __gen_field(values->AAPointCoverageSlope * (1 << 8), 8, 15) |
1287 __gen_field(values->AACoverageSlope * (1 << 8), 0, 7) |
1288 0;
1289
1290 dw[2] =
1291 __gen_field(values->AAPointCoverageEndCapBias * (1 << 8), 24, 31) |
1292 __gen_field(values->AACoverageEndCapBias * (1 << 8), 16, 23) |
1293 __gen_field(values->AAPointCoverageEndCapSlope * (1 << 8), 8, 15) |
1294 __gen_field(values->AACoverageEndCapSlope * (1 << 8), 0, 7) |
1295 0;
1296
1297 }
1298
1299 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_length_bias 0x00000002
1300 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_header\
1301 .CommandType = 3, \
1302 .CommandSubType = 3, \
1303 ._3DCommandOpcode = 0, \
1304 ._3DCommandSubOpcode = 70
1305
1306 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_length 0x00000000
1307
1308 #define GEN9_BINDING_TABLE_EDIT_ENTRY_length 0x00000001
1309
1310 struct GEN9_BINDING_TABLE_EDIT_ENTRY {
1311 uint32_t BindingTableIndex;
1312 uint32_t SurfaceStatePointer;
1313 };
1314
1315 static inline void
1316 GEN9_BINDING_TABLE_EDIT_ENTRY_pack(__gen_user_data *data, void * restrict dst,
1317 const struct GEN9_BINDING_TABLE_EDIT_ENTRY * restrict values)
1318 {
1319 uint32_t *dw = (uint32_t * restrict) dst;
1320
1321 dw[0] =
1322 __gen_field(values->BindingTableIndex, 16, 23) |
1323 __gen_offset(values->SurfaceStatePointer, 0, 15) |
1324 0;
1325
1326 }
1327
1328 struct GEN9_3DSTATE_BINDING_TABLE_EDIT_DS {
1329 uint32_t CommandType;
1330 uint32_t CommandSubType;
1331 uint32_t _3DCommandOpcode;
1332 uint32_t _3DCommandSubOpcode;
1333 uint32_t DwordLength;
1334 uint32_t BindingTableBlockClear;
1335 #define AllCores 3
1336 #define Core1 2
1337 #define Core0 1
1338 uint32_t BindingTableEditTarget;
1339 /* variable length fields follow */
1340 };
1341
1342 static inline void
1343 GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_pack(__gen_user_data *data, void * restrict dst,
1344 const struct GEN9_3DSTATE_BINDING_TABLE_EDIT_DS * restrict values)
1345 {
1346 uint32_t *dw = (uint32_t * restrict) dst;
1347
1348 dw[0] =
1349 __gen_field(values->CommandType, 29, 31) |
1350 __gen_field(values->CommandSubType, 27, 28) |
1351 __gen_field(values->_3DCommandOpcode, 24, 26) |
1352 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1353 __gen_field(values->DwordLength, 0, 8) |
1354 0;
1355
1356 dw[1] =
1357 __gen_field(values->BindingTableBlockClear, 16, 31) |
1358 __gen_field(values->BindingTableEditTarget, 0, 1) |
1359 0;
1360
1361 /* variable length fields follow */
1362 }
1363
1364 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_length_bias 0x00000002
1365 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_header\
1366 .CommandType = 3, \
1367 .CommandSubType = 3, \
1368 ._3DCommandOpcode = 0, \
1369 ._3DCommandSubOpcode = 68
1370
1371 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_length 0x00000000
1372
1373 struct GEN9_3DSTATE_BINDING_TABLE_EDIT_GS {
1374 uint32_t CommandType;
1375 uint32_t CommandSubType;
1376 uint32_t _3DCommandOpcode;
1377 uint32_t _3DCommandSubOpcode;
1378 uint32_t DwordLength;
1379 uint32_t BindingTableBlockClear;
1380 #define AllCores 3
1381 #define Core1 2
1382 #define Core0 1
1383 uint32_t BindingTableEditTarget;
1384 /* variable length fields follow */
1385 };
1386
1387 static inline void
1388 GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_pack(__gen_user_data *data, void * restrict dst,
1389 const struct GEN9_3DSTATE_BINDING_TABLE_EDIT_GS * restrict values)
1390 {
1391 uint32_t *dw = (uint32_t * restrict) dst;
1392
1393 dw[0] =
1394 __gen_field(values->CommandType, 29, 31) |
1395 __gen_field(values->CommandSubType, 27, 28) |
1396 __gen_field(values->_3DCommandOpcode, 24, 26) |
1397 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1398 __gen_field(values->DwordLength, 0, 8) |
1399 0;
1400
1401 dw[1] =
1402 __gen_field(values->BindingTableBlockClear, 16, 31) |
1403 __gen_field(values->BindingTableEditTarget, 0, 1) |
1404 0;
1405
1406 /* variable length fields follow */
1407 }
1408
1409 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_length_bias 0x00000002
1410 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_header\
1411 .CommandType = 3, \
1412 .CommandSubType = 3, \
1413 ._3DCommandOpcode = 0, \
1414 ._3DCommandSubOpcode = 69
1415
1416 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_length 0x00000000
1417
1418 struct GEN9_3DSTATE_BINDING_TABLE_EDIT_HS {
1419 uint32_t CommandType;
1420 uint32_t CommandSubType;
1421 uint32_t _3DCommandOpcode;
1422 uint32_t _3DCommandSubOpcode;
1423 uint32_t DwordLength;
1424 uint32_t BindingTableBlockClear;
1425 #define AllCores 3
1426 #define Core1 2
1427 #define Core0 1
1428 uint32_t BindingTableEditTarget;
1429 /* variable length fields follow */
1430 };
1431
1432 static inline void
1433 GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_pack(__gen_user_data *data, void * restrict dst,
1434 const struct GEN9_3DSTATE_BINDING_TABLE_EDIT_HS * restrict values)
1435 {
1436 uint32_t *dw = (uint32_t * restrict) dst;
1437
1438 dw[0] =
1439 __gen_field(values->CommandType, 29, 31) |
1440 __gen_field(values->CommandSubType, 27, 28) |
1441 __gen_field(values->_3DCommandOpcode, 24, 26) |
1442 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1443 __gen_field(values->DwordLength, 0, 8) |
1444 0;
1445
1446 dw[1] =
1447 __gen_field(values->BindingTableBlockClear, 16, 31) |
1448 __gen_field(values->BindingTableEditTarget, 0, 1) |
1449 0;
1450
1451 /* variable length fields follow */
1452 }
1453
1454 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_length_bias 0x00000002
1455 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_header\
1456 .CommandType = 3, \
1457 .CommandSubType = 3, \
1458 ._3DCommandOpcode = 0, \
1459 ._3DCommandSubOpcode = 71
1460
1461 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_length 0x00000000
1462
1463 struct GEN9_3DSTATE_BINDING_TABLE_EDIT_PS {
1464 uint32_t CommandType;
1465 uint32_t CommandSubType;
1466 uint32_t _3DCommandOpcode;
1467 uint32_t _3DCommandSubOpcode;
1468 uint32_t DwordLength;
1469 uint32_t BindingTableBlockClear;
1470 #define AllCores 3
1471 #define Core1 2
1472 #define Core0 1
1473 uint32_t BindingTableEditTarget;
1474 /* variable length fields follow */
1475 };
1476
1477 static inline void
1478 GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_pack(__gen_user_data *data, void * restrict dst,
1479 const struct GEN9_3DSTATE_BINDING_TABLE_EDIT_PS * restrict values)
1480 {
1481 uint32_t *dw = (uint32_t * restrict) dst;
1482
1483 dw[0] =
1484 __gen_field(values->CommandType, 29, 31) |
1485 __gen_field(values->CommandSubType, 27, 28) |
1486 __gen_field(values->_3DCommandOpcode, 24, 26) |
1487 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1488 __gen_field(values->DwordLength, 0, 8) |
1489 0;
1490
1491 dw[1] =
1492 __gen_field(values->BindingTableBlockClear, 16, 31) |
1493 __gen_field(values->BindingTableEditTarget, 0, 1) |
1494 0;
1495
1496 /* variable length fields follow */
1497 }
1498
1499 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_length_bias 0x00000002
1500 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_header\
1501 .CommandType = 3, \
1502 .CommandSubType = 3, \
1503 ._3DCommandOpcode = 0, \
1504 ._3DCommandSubOpcode = 67
1505
1506 #define GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_length 0x00000000
1507
1508 struct GEN9_3DSTATE_BINDING_TABLE_EDIT_VS {
1509 uint32_t CommandType;
1510 uint32_t CommandSubType;
1511 uint32_t _3DCommandOpcode;
1512 uint32_t _3DCommandSubOpcode;
1513 uint32_t DwordLength;
1514 uint32_t BindingTableBlockClear;
1515 #define AllCores 3
1516 #define Core1 2
1517 #define Core0 1
1518 uint32_t BindingTableEditTarget;
1519 /* variable length fields follow */
1520 };
1521
1522 static inline void
1523 GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_pack(__gen_user_data *data, void * restrict dst,
1524 const struct GEN9_3DSTATE_BINDING_TABLE_EDIT_VS * restrict values)
1525 {
1526 uint32_t *dw = (uint32_t * restrict) dst;
1527
1528 dw[0] =
1529 __gen_field(values->CommandType, 29, 31) |
1530 __gen_field(values->CommandSubType, 27, 28) |
1531 __gen_field(values->_3DCommandOpcode, 24, 26) |
1532 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1533 __gen_field(values->DwordLength, 0, 8) |
1534 0;
1535
1536 dw[1] =
1537 __gen_field(values->BindingTableBlockClear, 16, 31) |
1538 __gen_field(values->BindingTableEditTarget, 0, 1) |
1539 0;
1540
1541 /* variable length fields follow */
1542 }
1543
1544 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS_length_bias 0x00000002
1545 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS_header\
1546 .CommandType = 3, \
1547 .CommandSubType = 3, \
1548 ._3DCommandOpcode = 0, \
1549 ._3DCommandSubOpcode = 40, \
1550 .DwordLength = 0
1551
1552 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS_length 0x00000002
1553
1554 struct GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS {
1555 uint32_t CommandType;
1556 uint32_t CommandSubType;
1557 uint32_t _3DCommandOpcode;
1558 uint32_t _3DCommandSubOpcode;
1559 uint32_t DwordLength;
1560 uint32_t PointertoDSBindingTable;
1561 };
1562
1563 static inline void
1564 GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
1565 const struct GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS * restrict values)
1566 {
1567 uint32_t *dw = (uint32_t * restrict) dst;
1568
1569 dw[0] =
1570 __gen_field(values->CommandType, 29, 31) |
1571 __gen_field(values->CommandSubType, 27, 28) |
1572 __gen_field(values->_3DCommandOpcode, 24, 26) |
1573 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1574 __gen_field(values->DwordLength, 0, 7) |
1575 0;
1576
1577 dw[1] =
1578 __gen_offset(values->PointertoDSBindingTable, 5, 15) |
1579 0;
1580
1581 }
1582
1583 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS_length_bias 0x00000002
1584 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS_header\
1585 .CommandType = 3, \
1586 .CommandSubType = 3, \
1587 ._3DCommandOpcode = 0, \
1588 ._3DCommandSubOpcode = 41, \
1589 .DwordLength = 0
1590
1591 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS_length 0x00000002
1592
1593 struct GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS {
1594 uint32_t CommandType;
1595 uint32_t CommandSubType;
1596 uint32_t _3DCommandOpcode;
1597 uint32_t _3DCommandSubOpcode;
1598 uint32_t DwordLength;
1599 uint32_t PointertoGSBindingTable;
1600 };
1601
1602 static inline void
1603 GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
1604 const struct GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS * restrict values)
1605 {
1606 uint32_t *dw = (uint32_t * restrict) dst;
1607
1608 dw[0] =
1609 __gen_field(values->CommandType, 29, 31) |
1610 __gen_field(values->CommandSubType, 27, 28) |
1611 __gen_field(values->_3DCommandOpcode, 24, 26) |
1612 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1613 __gen_field(values->DwordLength, 0, 7) |
1614 0;
1615
1616 dw[1] =
1617 __gen_offset(values->PointertoGSBindingTable, 5, 15) |
1618 0;
1619
1620 }
1621
1622 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS_length_bias 0x00000002
1623 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS_header\
1624 .CommandType = 3, \
1625 .CommandSubType = 3, \
1626 ._3DCommandOpcode = 0, \
1627 ._3DCommandSubOpcode = 39, \
1628 .DwordLength = 0
1629
1630 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS_length 0x00000002
1631
1632 struct GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS {
1633 uint32_t CommandType;
1634 uint32_t CommandSubType;
1635 uint32_t _3DCommandOpcode;
1636 uint32_t _3DCommandSubOpcode;
1637 uint32_t DwordLength;
1638 uint32_t PointertoHSBindingTable;
1639 };
1640
1641 static inline void
1642 GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
1643 const struct GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS * restrict values)
1644 {
1645 uint32_t *dw = (uint32_t * restrict) dst;
1646
1647 dw[0] =
1648 __gen_field(values->CommandType, 29, 31) |
1649 __gen_field(values->CommandSubType, 27, 28) |
1650 __gen_field(values->_3DCommandOpcode, 24, 26) |
1651 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1652 __gen_field(values->DwordLength, 0, 7) |
1653 0;
1654
1655 dw[1] =
1656 __gen_offset(values->PointertoHSBindingTable, 5, 15) |
1657 0;
1658
1659 }
1660
1661 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS_length_bias 0x00000002
1662 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS_header\
1663 .CommandType = 3, \
1664 .CommandSubType = 3, \
1665 ._3DCommandOpcode = 0, \
1666 ._3DCommandSubOpcode = 42, \
1667 .DwordLength = 0
1668
1669 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS_length 0x00000002
1670
1671 struct GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS {
1672 uint32_t CommandType;
1673 uint32_t CommandSubType;
1674 uint32_t _3DCommandOpcode;
1675 uint32_t _3DCommandSubOpcode;
1676 uint32_t DwordLength;
1677 uint32_t PointertoPSBindingTable;
1678 };
1679
1680 static inline void
1681 GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
1682 const struct GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS * restrict values)
1683 {
1684 uint32_t *dw = (uint32_t * restrict) dst;
1685
1686 dw[0] =
1687 __gen_field(values->CommandType, 29, 31) |
1688 __gen_field(values->CommandSubType, 27, 28) |
1689 __gen_field(values->_3DCommandOpcode, 24, 26) |
1690 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1691 __gen_field(values->DwordLength, 0, 7) |
1692 0;
1693
1694 dw[1] =
1695 __gen_offset(values->PointertoPSBindingTable, 5, 15) |
1696 0;
1697
1698 }
1699
1700 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS_length_bias 0x00000002
1701 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS_header\
1702 .CommandType = 3, \
1703 .CommandSubType = 3, \
1704 ._3DCommandOpcode = 0, \
1705 ._3DCommandSubOpcode = 38, \
1706 .DwordLength = 0
1707
1708 #define GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS_length 0x00000002
1709
1710 struct GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS {
1711 uint32_t CommandType;
1712 uint32_t CommandSubType;
1713 uint32_t _3DCommandOpcode;
1714 uint32_t _3DCommandSubOpcode;
1715 uint32_t DwordLength;
1716 uint32_t PointertoVSBindingTable;
1717 };
1718
1719 static inline void
1720 GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
1721 const struct GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS * restrict values)
1722 {
1723 uint32_t *dw = (uint32_t * restrict) dst;
1724
1725 dw[0] =
1726 __gen_field(values->CommandType, 29, 31) |
1727 __gen_field(values->CommandSubType, 27, 28) |
1728 __gen_field(values->_3DCommandOpcode, 24, 26) |
1729 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1730 __gen_field(values->DwordLength, 0, 7) |
1731 0;
1732
1733 dw[1] =
1734 __gen_offset(values->PointertoVSBindingTable, 5, 15) |
1735 0;
1736
1737 }
1738
1739 #define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_length_bias 0x00000002
1740 #define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_header\
1741 .CommandType = 3, \
1742 .CommandSubType = 3, \
1743 ._3DCommandOpcode = 1, \
1744 ._3DCommandSubOpcode = 25, \
1745 .DwordLength = 2
1746
1747 #define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_length 0x00000004
1748
1749 struct GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC {
1750 uint32_t CommandType;
1751 uint32_t CommandSubType;
1752 uint32_t _3DCommandOpcode;
1753 uint32_t _3DCommandSubOpcode;
1754 uint32_t DwordLength;
1755 __gen_address_type BindingTablePoolBaseAddress;
1756 uint32_t BindingTablePoolEnable;
1757 struct GEN9_MEMORY_OBJECT_CONTROL_STATE SurfaceObjectControlState;
1758 #define NoValidData 0
1759 uint32_t BindingTablePoolBufferSize;
1760 };
1761
1762 static inline void
1763 GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_pack(__gen_user_data *data, void * restrict dst,
1764 const struct GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC * restrict values)
1765 {
1766 uint32_t *dw = (uint32_t * restrict) dst;
1767
1768 dw[0] =
1769 __gen_field(values->CommandType, 29, 31) |
1770 __gen_field(values->CommandSubType, 27, 28) |
1771 __gen_field(values->_3DCommandOpcode, 24, 26) |
1772 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1773 __gen_field(values->DwordLength, 0, 7) |
1774 0;
1775
1776 uint32_t dw_SurfaceObjectControlState;
1777 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SurfaceObjectControlState, &values->SurfaceObjectControlState);
1778 uint32_t dw1 =
1779 __gen_field(values->BindingTablePoolEnable, 11, 11) |
1780 __gen_field(dw_SurfaceObjectControlState, 0, 6) |
1781 0;
1782
1783 uint64_t qw1 =
1784 __gen_combine_address(data, &dw[1], values->BindingTablePoolBaseAddress, dw1);
1785
1786 dw[1] = qw1;
1787 dw[2] = qw1 >> 32;
1788
1789 dw[3] =
1790 __gen_field(values->BindingTablePoolBufferSize, 12, 31) |
1791 0;
1792
1793 }
1794
1795 #define GEN9_3DSTATE_BLEND_STATE_POINTERS_length_bias 0x00000002
1796 #define GEN9_3DSTATE_BLEND_STATE_POINTERS_header\
1797 .CommandType = 3, \
1798 .CommandSubType = 3, \
1799 ._3DCommandOpcode = 0, \
1800 ._3DCommandSubOpcode = 36, \
1801 .DwordLength = 0
1802
1803 #define GEN9_3DSTATE_BLEND_STATE_POINTERS_length 0x00000002
1804
1805 struct GEN9_3DSTATE_BLEND_STATE_POINTERS {
1806 uint32_t CommandType;
1807 uint32_t CommandSubType;
1808 uint32_t _3DCommandOpcode;
1809 uint32_t _3DCommandSubOpcode;
1810 uint32_t DwordLength;
1811 uint32_t BlendStatePointer;
1812 bool BlendStatePointerValid;
1813 };
1814
1815 static inline void
1816 GEN9_3DSTATE_BLEND_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
1817 const struct GEN9_3DSTATE_BLEND_STATE_POINTERS * restrict values)
1818 {
1819 uint32_t *dw = (uint32_t * restrict) dst;
1820
1821 dw[0] =
1822 __gen_field(values->CommandType, 29, 31) |
1823 __gen_field(values->CommandSubType, 27, 28) |
1824 __gen_field(values->_3DCommandOpcode, 24, 26) |
1825 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1826 __gen_field(values->DwordLength, 0, 7) |
1827 0;
1828
1829 dw[1] =
1830 __gen_offset(values->BlendStatePointer, 6, 31) |
1831 __gen_field(values->BlendStatePointerValid, 0, 0) |
1832 0;
1833
1834 }
1835
1836 #define GEN9_3DSTATE_CC_STATE_POINTERS_length_bias 0x00000002
1837 #define GEN9_3DSTATE_CC_STATE_POINTERS_header \
1838 .CommandType = 3, \
1839 .CommandSubType = 3, \
1840 ._3DCommandOpcode = 0, \
1841 ._3DCommandSubOpcode = 14, \
1842 .DwordLength = 0
1843
1844 #define GEN9_3DSTATE_CC_STATE_POINTERS_length 0x00000002
1845
1846 struct GEN9_3DSTATE_CC_STATE_POINTERS {
1847 uint32_t CommandType;
1848 uint32_t CommandSubType;
1849 uint32_t _3DCommandOpcode;
1850 uint32_t _3DCommandSubOpcode;
1851 uint32_t DwordLength;
1852 uint32_t ColorCalcStatePointer;
1853 bool ColorCalcStatePointerValid;
1854 };
1855
1856 static inline void
1857 GEN9_3DSTATE_CC_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
1858 const struct GEN9_3DSTATE_CC_STATE_POINTERS * restrict values)
1859 {
1860 uint32_t *dw = (uint32_t * restrict) dst;
1861
1862 dw[0] =
1863 __gen_field(values->CommandType, 29, 31) |
1864 __gen_field(values->CommandSubType, 27, 28) |
1865 __gen_field(values->_3DCommandOpcode, 24, 26) |
1866 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1867 __gen_field(values->DwordLength, 0, 7) |
1868 0;
1869
1870 dw[1] =
1871 __gen_offset(values->ColorCalcStatePointer, 6, 31) |
1872 __gen_field(values->ColorCalcStatePointerValid, 0, 0) |
1873 0;
1874
1875 }
1876
1877 #define GEN9_3DSTATE_CHROMA_KEY_length_bias 0x00000002
1878 #define GEN9_3DSTATE_CHROMA_KEY_header \
1879 .CommandType = 3, \
1880 .CommandSubType = 3, \
1881 ._3DCommandOpcode = 1, \
1882 ._3DCommandSubOpcode = 4, \
1883 .DwordLength = 2
1884
1885 #define GEN9_3DSTATE_CHROMA_KEY_length 0x00000004
1886
1887 struct GEN9_3DSTATE_CHROMA_KEY {
1888 uint32_t CommandType;
1889 uint32_t CommandSubType;
1890 uint32_t _3DCommandOpcode;
1891 uint32_t _3DCommandSubOpcode;
1892 uint32_t DwordLength;
1893 uint32_t ChromaKeyTableIndex;
1894 uint32_t ChromaKeyLowValue;
1895 uint32_t ChromaKeyHighValue;
1896 };
1897
1898 static inline void
1899 GEN9_3DSTATE_CHROMA_KEY_pack(__gen_user_data *data, void * restrict dst,
1900 const struct GEN9_3DSTATE_CHROMA_KEY * restrict values)
1901 {
1902 uint32_t *dw = (uint32_t * restrict) dst;
1903
1904 dw[0] =
1905 __gen_field(values->CommandType, 29, 31) |
1906 __gen_field(values->CommandSubType, 27, 28) |
1907 __gen_field(values->_3DCommandOpcode, 24, 26) |
1908 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1909 __gen_field(values->DwordLength, 0, 7) |
1910 0;
1911
1912 dw[1] =
1913 __gen_field(values->ChromaKeyTableIndex, 30, 31) |
1914 0;
1915
1916 dw[2] =
1917 __gen_field(values->ChromaKeyLowValue, 0, 31) |
1918 0;
1919
1920 dw[3] =
1921 __gen_field(values->ChromaKeyHighValue, 0, 31) |
1922 0;
1923
1924 }
1925
1926 #define GEN9_3DSTATE_CLEAR_PARAMS_length_bias 0x00000002
1927 #define GEN9_3DSTATE_CLEAR_PARAMS_header \
1928 .CommandType = 3, \
1929 .CommandSubType = 3, \
1930 ._3DCommandOpcode = 0, \
1931 ._3DCommandSubOpcode = 4, \
1932 .DwordLength = 1
1933
1934 #define GEN9_3DSTATE_CLEAR_PARAMS_length 0x00000003
1935
1936 struct GEN9_3DSTATE_CLEAR_PARAMS {
1937 uint32_t CommandType;
1938 uint32_t CommandSubType;
1939 uint32_t _3DCommandOpcode;
1940 uint32_t _3DCommandSubOpcode;
1941 uint32_t DwordLength;
1942 float DepthClearValue;
1943 bool DepthClearValueValid;
1944 };
1945
1946 static inline void
1947 GEN9_3DSTATE_CLEAR_PARAMS_pack(__gen_user_data *data, void * restrict dst,
1948 const struct GEN9_3DSTATE_CLEAR_PARAMS * restrict values)
1949 {
1950 uint32_t *dw = (uint32_t * restrict) dst;
1951
1952 dw[0] =
1953 __gen_field(values->CommandType, 29, 31) |
1954 __gen_field(values->CommandSubType, 27, 28) |
1955 __gen_field(values->_3DCommandOpcode, 24, 26) |
1956 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
1957 __gen_field(values->DwordLength, 0, 7) |
1958 0;
1959
1960 dw[1] =
1961 __gen_float(values->DepthClearValue) |
1962 0;
1963
1964 dw[2] =
1965 __gen_field(values->DepthClearValueValid, 0, 0) |
1966 0;
1967
1968 }
1969
1970 #define GEN9_3DSTATE_CLIP_length_bias 0x00000002
1971 #define GEN9_3DSTATE_CLIP_header \
1972 .CommandType = 3, \
1973 .CommandSubType = 3, \
1974 ._3DCommandOpcode = 0, \
1975 ._3DCommandSubOpcode = 18, \
1976 .DwordLength = 2
1977
1978 #define GEN9_3DSTATE_CLIP_length 0x00000004
1979
1980 struct GEN9_3DSTATE_CLIP {
1981 uint32_t CommandType;
1982 uint32_t CommandSubType;
1983 uint32_t _3DCommandOpcode;
1984 uint32_t _3DCommandSubOpcode;
1985 uint32_t DwordLength;
1986 #define Normal 0
1987 #define Force 1
1988 bool ForceUserClipDistanceCullTestEnableBitmask;
1989 #define _8Bit 0
1990 #define _4Bit 1
1991 uint32_t VertexSubPixelPrecisionSelect;
1992 bool EarlyCullEnable;
1993 #define Normal 0
1994 #define Force 1
1995 bool ForceUserClipDistanceClipTestEnableBitmask;
1996 #define Normal 0
1997 #define Force 1
1998 bool ForceClipMode;
1999 bool ClipperStatisticsEnable;
2000 uint32_t UserClipDistanceCullTestEnableBitmask;
2001 bool ClipEnable;
2002 #define API_OGL 0
2003 uint32_t APIMode;
2004 bool ViewportXYClipTestEnable;
2005 bool GuardbandClipTestEnable;
2006 uint32_t UserClipDistanceClipTestEnableBitmask;
2007 #define NORMAL 0
2008 #define REJECT_ALL 3
2009 #define ACCEPT_ALL 4
2010 uint32_t ClipMode;
2011 bool PerspectiveDivideDisable;
2012 bool NonPerspectiveBarycentricEnable;
2013 uint32_t TriangleStripListProvokingVertexSelect;
2014 uint32_t LineStripListProvokingVertexSelect;
2015 uint32_t TriangleFanProvokingVertexSelect;
2016 float MinimumPointWidth;
2017 float MaximumPointWidth;
2018 bool ForceZeroRTAIndexEnable;
2019 uint32_t MaximumVPIndex;
2020 };
2021
2022 static inline void
2023 GEN9_3DSTATE_CLIP_pack(__gen_user_data *data, void * restrict dst,
2024 const struct GEN9_3DSTATE_CLIP * restrict values)
2025 {
2026 uint32_t *dw = (uint32_t * restrict) dst;
2027
2028 dw[0] =
2029 __gen_field(values->CommandType, 29, 31) |
2030 __gen_field(values->CommandSubType, 27, 28) |
2031 __gen_field(values->_3DCommandOpcode, 24, 26) |
2032 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2033 __gen_field(values->DwordLength, 0, 7) |
2034 0;
2035
2036 dw[1] =
2037 __gen_field(values->ForceUserClipDistanceCullTestEnableBitmask, 20, 20) |
2038 __gen_field(values->VertexSubPixelPrecisionSelect, 19, 19) |
2039 __gen_field(values->EarlyCullEnable, 18, 18) |
2040 __gen_field(values->ForceUserClipDistanceClipTestEnableBitmask, 17, 17) |
2041 __gen_field(values->ForceClipMode, 16, 16) |
2042 __gen_field(values->ClipperStatisticsEnable, 10, 10) |
2043 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
2044 0;
2045
2046 dw[2] =
2047 __gen_field(values->ClipEnable, 31, 31) |
2048 __gen_field(values->APIMode, 30, 30) |
2049 __gen_field(values->ViewportXYClipTestEnable, 28, 28) |
2050 __gen_field(values->GuardbandClipTestEnable, 26, 26) |
2051 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 16, 23) |
2052 __gen_field(values->ClipMode, 13, 15) |
2053 __gen_field(values->PerspectiveDivideDisable, 9, 9) |
2054 __gen_field(values->NonPerspectiveBarycentricEnable, 8, 8) |
2055 __gen_field(values->TriangleStripListProvokingVertexSelect, 4, 5) |
2056 __gen_field(values->LineStripListProvokingVertexSelect, 2, 3) |
2057 __gen_field(values->TriangleFanProvokingVertexSelect, 0, 1) |
2058 0;
2059
2060 dw[3] =
2061 __gen_field(values->MinimumPointWidth * (1 << 3), 17, 27) |
2062 __gen_field(values->MaximumPointWidth * (1 << 3), 6, 16) |
2063 __gen_field(values->ForceZeroRTAIndexEnable, 5, 5) |
2064 __gen_field(values->MaximumVPIndex, 0, 3) |
2065 0;
2066
2067 }
2068
2069 #define GEN9_3DSTATE_CONSTANT_DS_length_bias 0x00000002
2070 #define GEN9_3DSTATE_CONSTANT_DS_header \
2071 .CommandType = 3, \
2072 .CommandSubType = 3, \
2073 ._3DCommandOpcode = 0, \
2074 ._3DCommandSubOpcode = 26, \
2075 .DwordLength = 9
2076
2077 #define GEN9_3DSTATE_CONSTANT_DS_length 0x0000000b
2078
2079 #define GEN9_3DSTATE_CONSTANT_BODY_length 0x0000000a
2080
2081 struct GEN9_3DSTATE_CONSTANT_BODY {
2082 uint32_t ConstantBuffer1ReadLength;
2083 uint32_t ConstantBuffer0ReadLength;
2084 uint32_t ConstantBuffer3ReadLength;
2085 uint32_t ConstantBuffer2ReadLength;
2086 __gen_address_type PointerToConstantBuffer0;
2087 __gen_address_type PointerToConstantBuffer1;
2088 __gen_address_type PointerToConstantBuffer2;
2089 __gen_address_type PointerToConstantBuffer3;
2090 };
2091
2092 static inline void
2093 GEN9_3DSTATE_CONSTANT_BODY_pack(__gen_user_data *data, void * restrict dst,
2094 const struct GEN9_3DSTATE_CONSTANT_BODY * restrict values)
2095 {
2096 uint32_t *dw = (uint32_t * restrict) dst;
2097
2098 dw[0] =
2099 __gen_field(values->ConstantBuffer1ReadLength, 16, 31) |
2100 __gen_field(values->ConstantBuffer0ReadLength, 0, 15) |
2101 0;
2102
2103 dw[1] =
2104 __gen_field(values->ConstantBuffer3ReadLength, 16, 31) |
2105 __gen_field(values->ConstantBuffer2ReadLength, 0, 15) |
2106 0;
2107
2108 uint32_t dw2 =
2109 0;
2110
2111 uint64_t qw2 =
2112 __gen_combine_address(data, &dw[2], values->PointerToConstantBuffer0, dw2);
2113
2114 dw[2] = qw2;
2115 dw[3] = qw2 >> 32;
2116
2117 uint32_t dw4 =
2118 0;
2119
2120 uint64_t qw4 =
2121 __gen_combine_address(data, &dw[4], values->PointerToConstantBuffer1, dw4);
2122
2123 dw[4] = qw4;
2124 dw[5] = qw4 >> 32;
2125
2126 uint32_t dw6 =
2127 0;
2128
2129 uint64_t qw6 =
2130 __gen_combine_address(data, &dw[6], values->PointerToConstantBuffer2, dw6);
2131
2132 dw[6] = qw6;
2133 dw[7] = qw6 >> 32;
2134
2135 uint32_t dw8 =
2136 0;
2137
2138 uint64_t qw8 =
2139 __gen_combine_address(data, &dw[8], values->PointerToConstantBuffer3, dw8);
2140
2141 dw[8] = qw8;
2142 dw[9] = qw8 >> 32;
2143
2144 }
2145
2146 struct GEN9_3DSTATE_CONSTANT_DS {
2147 uint32_t CommandType;
2148 uint32_t CommandSubType;
2149 uint32_t _3DCommandOpcode;
2150 uint32_t _3DCommandSubOpcode;
2151 struct GEN9_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
2152 uint32_t DwordLength;
2153 struct GEN9_3DSTATE_CONSTANT_BODY ConstantBody;
2154 };
2155
2156 static inline void
2157 GEN9_3DSTATE_CONSTANT_DS_pack(__gen_user_data *data, void * restrict dst,
2158 const struct GEN9_3DSTATE_CONSTANT_DS * restrict values)
2159 {
2160 uint32_t *dw = (uint32_t * restrict) dst;
2161
2162 uint32_t dw_ConstantBufferObjectControlState;
2163 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
2164 dw[0] =
2165 __gen_field(values->CommandType, 29, 31) |
2166 __gen_field(values->CommandSubType, 27, 28) |
2167 __gen_field(values->_3DCommandOpcode, 24, 26) |
2168 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2169 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
2170 __gen_field(values->DwordLength, 0, 7) |
2171 0;
2172
2173 GEN9_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
2174 }
2175
2176 #define GEN9_3DSTATE_CONSTANT_GS_length_bias 0x00000002
2177 #define GEN9_3DSTATE_CONSTANT_GS_header \
2178 .CommandType = 3, \
2179 .CommandSubType = 3, \
2180 ._3DCommandOpcode = 0, \
2181 ._3DCommandSubOpcode = 22, \
2182 .DwordLength = 9
2183
2184 #define GEN9_3DSTATE_CONSTANT_GS_length 0x0000000b
2185
2186 struct GEN9_3DSTATE_CONSTANT_GS {
2187 uint32_t CommandType;
2188 uint32_t CommandSubType;
2189 uint32_t _3DCommandOpcode;
2190 uint32_t _3DCommandSubOpcode;
2191 struct GEN9_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
2192 uint32_t DwordLength;
2193 struct GEN9_3DSTATE_CONSTANT_BODY ConstantBody;
2194 };
2195
2196 static inline void
2197 GEN9_3DSTATE_CONSTANT_GS_pack(__gen_user_data *data, void * restrict dst,
2198 const struct GEN9_3DSTATE_CONSTANT_GS * restrict values)
2199 {
2200 uint32_t *dw = (uint32_t * restrict) dst;
2201
2202 uint32_t dw_ConstantBufferObjectControlState;
2203 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
2204 dw[0] =
2205 __gen_field(values->CommandType, 29, 31) |
2206 __gen_field(values->CommandSubType, 27, 28) |
2207 __gen_field(values->_3DCommandOpcode, 24, 26) |
2208 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2209 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
2210 __gen_field(values->DwordLength, 0, 7) |
2211 0;
2212
2213 GEN9_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
2214 }
2215
2216 #define GEN9_3DSTATE_CONSTANT_HS_length_bias 0x00000002
2217 #define GEN9_3DSTATE_CONSTANT_HS_header \
2218 .CommandType = 3, \
2219 .CommandSubType = 3, \
2220 ._3DCommandOpcode = 0, \
2221 ._3DCommandSubOpcode = 25, \
2222 .DwordLength = 9
2223
2224 #define GEN9_3DSTATE_CONSTANT_HS_length 0x0000000b
2225
2226 struct GEN9_3DSTATE_CONSTANT_HS {
2227 uint32_t CommandType;
2228 uint32_t CommandSubType;
2229 uint32_t _3DCommandOpcode;
2230 uint32_t _3DCommandSubOpcode;
2231 struct GEN9_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
2232 uint32_t DwordLength;
2233 struct GEN9_3DSTATE_CONSTANT_BODY ConstantBody;
2234 };
2235
2236 static inline void
2237 GEN9_3DSTATE_CONSTANT_HS_pack(__gen_user_data *data, void * restrict dst,
2238 const struct GEN9_3DSTATE_CONSTANT_HS * restrict values)
2239 {
2240 uint32_t *dw = (uint32_t * restrict) dst;
2241
2242 uint32_t dw_ConstantBufferObjectControlState;
2243 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
2244 dw[0] =
2245 __gen_field(values->CommandType, 29, 31) |
2246 __gen_field(values->CommandSubType, 27, 28) |
2247 __gen_field(values->_3DCommandOpcode, 24, 26) |
2248 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2249 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
2250 __gen_field(values->DwordLength, 0, 7) |
2251 0;
2252
2253 GEN9_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
2254 }
2255
2256 #define GEN9_3DSTATE_CONSTANT_PS_length_bias 0x00000002
2257 #define GEN9_3DSTATE_CONSTANT_PS_header \
2258 .CommandType = 3, \
2259 .CommandSubType = 3, \
2260 ._3DCommandOpcode = 0, \
2261 ._3DCommandSubOpcode = 23, \
2262 .DwordLength = 9
2263
2264 #define GEN9_3DSTATE_CONSTANT_PS_length 0x0000000b
2265
2266 struct GEN9_3DSTATE_CONSTANT_PS {
2267 uint32_t CommandType;
2268 uint32_t CommandSubType;
2269 uint32_t _3DCommandOpcode;
2270 uint32_t _3DCommandSubOpcode;
2271 struct GEN9_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
2272 uint32_t DwordLength;
2273 struct GEN9_3DSTATE_CONSTANT_BODY ConstantBody;
2274 };
2275
2276 static inline void
2277 GEN9_3DSTATE_CONSTANT_PS_pack(__gen_user_data *data, void * restrict dst,
2278 const struct GEN9_3DSTATE_CONSTANT_PS * restrict values)
2279 {
2280 uint32_t *dw = (uint32_t * restrict) dst;
2281
2282 uint32_t dw_ConstantBufferObjectControlState;
2283 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
2284 dw[0] =
2285 __gen_field(values->CommandType, 29, 31) |
2286 __gen_field(values->CommandSubType, 27, 28) |
2287 __gen_field(values->_3DCommandOpcode, 24, 26) |
2288 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2289 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
2290 __gen_field(values->DwordLength, 0, 7) |
2291 0;
2292
2293 GEN9_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
2294 }
2295
2296 #define GEN9_3DSTATE_CONSTANT_VS_length_bias 0x00000002
2297 #define GEN9_3DSTATE_CONSTANT_VS_header \
2298 .CommandType = 3, \
2299 .CommandSubType = 3, \
2300 ._3DCommandOpcode = 0, \
2301 ._3DCommandSubOpcode = 21, \
2302 .DwordLength = 9
2303
2304 #define GEN9_3DSTATE_CONSTANT_VS_length 0x0000000b
2305
2306 struct GEN9_3DSTATE_CONSTANT_VS {
2307 uint32_t CommandType;
2308 uint32_t CommandSubType;
2309 uint32_t _3DCommandOpcode;
2310 uint32_t _3DCommandSubOpcode;
2311 struct GEN9_MEMORY_OBJECT_CONTROL_STATE ConstantBufferObjectControlState;
2312 uint32_t DwordLength;
2313 struct GEN9_3DSTATE_CONSTANT_BODY ConstantBody;
2314 };
2315
2316 static inline void
2317 GEN9_3DSTATE_CONSTANT_VS_pack(__gen_user_data *data, void * restrict dst,
2318 const struct GEN9_3DSTATE_CONSTANT_VS * restrict values)
2319 {
2320 uint32_t *dw = (uint32_t * restrict) dst;
2321
2322 uint32_t dw_ConstantBufferObjectControlState;
2323 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_ConstantBufferObjectControlState, &values->ConstantBufferObjectControlState);
2324 dw[0] =
2325 __gen_field(values->CommandType, 29, 31) |
2326 __gen_field(values->CommandSubType, 27, 28) |
2327 __gen_field(values->_3DCommandOpcode, 24, 26) |
2328 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2329 __gen_field(dw_ConstantBufferObjectControlState, 8, 14) |
2330 __gen_field(values->DwordLength, 0, 7) |
2331 0;
2332
2333 GEN9_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody);
2334 }
2335
2336 #define GEN9_3DSTATE_DEPTH_BUFFER_length_bias 0x00000002
2337 #define GEN9_3DSTATE_DEPTH_BUFFER_header \
2338 .CommandType = 3, \
2339 .CommandSubType = 3, \
2340 ._3DCommandOpcode = 0, \
2341 ._3DCommandSubOpcode = 5, \
2342 .DwordLength = 6
2343
2344 #define GEN9_3DSTATE_DEPTH_BUFFER_length 0x00000008
2345
2346 struct GEN9_3DSTATE_DEPTH_BUFFER {
2347 uint32_t CommandType;
2348 uint32_t CommandSubType;
2349 uint32_t _3DCommandOpcode;
2350 uint32_t _3DCommandSubOpcode;
2351 uint32_t DwordLength;
2352 #define SURFTYPE_2D 1
2353 #define SURFTYPE_CUBE 3
2354 #define SURFTYPE_NULL 7
2355 uint32_t SurfaceType;
2356 bool DepthWriteEnable;
2357 bool StencilWriteEnable;
2358 bool HierarchicalDepthBufferEnable;
2359 #define D32_FLOAT 1
2360 #define D24_UNORM_X8_UINT 3
2361 #define D16_UNORM 5
2362 uint32_t SurfaceFormat;
2363 uint32_t SurfacePitch;
2364 __gen_address_type SurfaceBaseAddress;
2365 uint32_t Height;
2366 uint32_t Width;
2367 uint32_t LOD;
2368 uint32_t Depth;
2369 uint32_t MinimumArrayElement;
2370 struct GEN9_MEMORY_OBJECT_CONTROL_STATE DepthBufferObjectControlState;
2371 #define NONE 0
2372 #define TILEYF 1
2373 #define TILEYS 2
2374 uint32_t TiledResourceMode;
2375 uint32_t MipTailStartLOD;
2376 uint32_t RenderTargetViewExtent;
2377 uint32_t SurfaceQPitch;
2378 };
2379
2380 static inline void
2381 GEN9_3DSTATE_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
2382 const struct GEN9_3DSTATE_DEPTH_BUFFER * restrict values)
2383 {
2384 uint32_t *dw = (uint32_t * restrict) dst;
2385
2386 dw[0] =
2387 __gen_field(values->CommandType, 29, 31) |
2388 __gen_field(values->CommandSubType, 27, 28) |
2389 __gen_field(values->_3DCommandOpcode, 24, 26) |
2390 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2391 __gen_field(values->DwordLength, 0, 7) |
2392 0;
2393
2394 dw[1] =
2395 __gen_field(values->SurfaceType, 29, 31) |
2396 __gen_field(values->DepthWriteEnable, 28, 28) |
2397 __gen_field(values->StencilWriteEnable, 27, 27) |
2398 __gen_field(values->HierarchicalDepthBufferEnable, 22, 22) |
2399 __gen_field(values->SurfaceFormat, 18, 20) |
2400 __gen_field(values->SurfacePitch, 0, 17) |
2401 0;
2402
2403 uint32_t dw2 =
2404 0;
2405
2406 uint64_t qw2 =
2407 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
2408
2409 dw[2] = qw2;
2410 dw[3] = qw2 >> 32;
2411
2412 dw[4] =
2413 __gen_field(values->Height, 18, 31) |
2414 __gen_field(values->Width, 4, 17) |
2415 __gen_field(values->LOD, 0, 3) |
2416 0;
2417
2418 uint32_t dw_DepthBufferObjectControlState;
2419 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_DepthBufferObjectControlState, &values->DepthBufferObjectControlState);
2420 dw[5] =
2421 __gen_field(values->Depth, 21, 31) |
2422 __gen_field(values->MinimumArrayElement, 10, 20) |
2423 __gen_field(dw_DepthBufferObjectControlState, 0, 6) |
2424 0;
2425
2426 dw[6] =
2427 __gen_field(values->TiledResourceMode, 30, 31) |
2428 __gen_field(values->MipTailStartLOD, 26, 29) |
2429 0;
2430
2431 dw[7] =
2432 __gen_field(values->RenderTargetViewExtent, 21, 31) |
2433 __gen_field(values->SurfaceQPitch, 0, 14) |
2434 0;
2435
2436 }
2437
2438 #define GEN9_3DSTATE_DRAWING_RECTANGLE_length_bias 0x00000002
2439 #define GEN9_3DSTATE_DRAWING_RECTANGLE_header \
2440 .CommandType = 3, \
2441 .CommandSubType = 3, \
2442 ._3DCommandOpcode = 1, \
2443 ._3DCommandSubOpcode = 0, \
2444 .DwordLength = 2
2445
2446 #define GEN9_3DSTATE_DRAWING_RECTANGLE_length 0x00000004
2447
2448 struct GEN9_3DSTATE_DRAWING_RECTANGLE {
2449 uint32_t CommandType;
2450 uint32_t CommandSubType;
2451 uint32_t _3DCommandOpcode;
2452 uint32_t _3DCommandSubOpcode;
2453 #define Legacy 0
2454 #define Core0Enabled 1
2455 #define Core1Enabled 2
2456 uint32_t CoreModeSelect;
2457 uint32_t DwordLength;
2458 uint32_t ClippedDrawingRectangleYMin;
2459 uint32_t ClippedDrawingRectangleXMin;
2460 uint32_t ClippedDrawingRectangleYMax;
2461 uint32_t ClippedDrawingRectangleXMax;
2462 uint32_t DrawingRectangleOriginY;
2463 uint32_t DrawingRectangleOriginX;
2464 };
2465
2466 static inline void
2467 GEN9_3DSTATE_DRAWING_RECTANGLE_pack(__gen_user_data *data, void * restrict dst,
2468 const struct GEN9_3DSTATE_DRAWING_RECTANGLE * restrict values)
2469 {
2470 uint32_t *dw = (uint32_t * restrict) dst;
2471
2472 dw[0] =
2473 __gen_field(values->CommandType, 29, 31) |
2474 __gen_field(values->CommandSubType, 27, 28) |
2475 __gen_field(values->_3DCommandOpcode, 24, 26) |
2476 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2477 __gen_field(values->CoreModeSelect, 14, 15) |
2478 __gen_field(values->DwordLength, 0, 7) |
2479 0;
2480
2481 dw[1] =
2482 __gen_field(values->ClippedDrawingRectangleYMin, 16, 31) |
2483 __gen_field(values->ClippedDrawingRectangleXMin, 0, 15) |
2484 0;
2485
2486 dw[2] =
2487 __gen_field(values->ClippedDrawingRectangleYMax, 16, 31) |
2488 __gen_field(values->ClippedDrawingRectangleXMax, 0, 15) |
2489 0;
2490
2491 dw[3] =
2492 __gen_field(values->DrawingRectangleOriginY, 16, 31) |
2493 __gen_field(values->DrawingRectangleOriginX, 0, 15) |
2494 0;
2495
2496 }
2497
2498 #define GEN9_3DSTATE_DS_length_bias 0x00000002
2499 #define GEN9_3DSTATE_DS_header \
2500 .CommandType = 3, \
2501 .CommandSubType = 3, \
2502 ._3DCommandOpcode = 0, \
2503 ._3DCommandSubOpcode = 29, \
2504 .DwordLength = 9
2505
2506 #define GEN9_3DSTATE_DS_length 0x0000000b
2507
2508 struct GEN9_3DSTATE_DS {
2509 uint32_t CommandType;
2510 uint32_t CommandSubType;
2511 uint32_t _3DCommandOpcode;
2512 uint32_t _3DCommandSubOpcode;
2513 uint32_t DwordLength;
2514 uint64_t KernelStartPointer;
2515 #define Dmask 0
2516 #define Vmask 1
2517 uint32_t VectorMaskEnable;
2518 #define NoSamplers 0
2519 #define _14Samplers 1
2520 #define _58Samplers 2
2521 #define _912Samplers 3
2522 #define _1316Samplers 4
2523 uint32_t SamplerCount;
2524 uint32_t BindingTableEntryCount;
2525 #define Normal 0
2526 #define High 1
2527 uint32_t ThreadDispatchPriority;
2528 #define IEEE754 0
2529 #define Alternate 1
2530 uint32_t FloatingPointMode;
2531 bool AccessesUAV;
2532 bool IllegalOpcodeExceptionEnable;
2533 bool SoftwareExceptionEnable;
2534 uint64_t ScratchSpaceBasePointer;
2535 uint32_t PerThreadScratchSpace;
2536 uint32_t DispatchGRFStartRegisterForURBData;
2537 uint32_t PatchURBEntryReadLength;
2538 uint32_t PatchURBEntryReadOffset;
2539 uint32_t MaximumNumberofThreads;
2540 bool StatisticsEnable;
2541 #define SIMD4X2 0
2542 #define SIMD8_SINGLE_PATCH 1
2543 #define SIMD8_SINGLE_OR_DUAL_PATCH 2
2544 uint32_t DispatchMode;
2545 bool ComputeWCoordinateEnable;
2546 bool CacheDisable;
2547 bool FunctionEnable;
2548 uint32_t VertexURBEntryOutputReadOffset;
2549 uint32_t VertexURBEntryOutputLength;
2550 uint32_t UserClipDistanceClipTestEnableBitmask;
2551 uint32_t UserClipDistanceCullTestEnableBitmask;
2552 uint64_t DUAL_PATCHKernelStartPointer;
2553 };
2554
2555 static inline void
2556 GEN9_3DSTATE_DS_pack(__gen_user_data *data, void * restrict dst,
2557 const struct GEN9_3DSTATE_DS * restrict values)
2558 {
2559 uint32_t *dw = (uint32_t * restrict) dst;
2560
2561 dw[0] =
2562 __gen_field(values->CommandType, 29, 31) |
2563 __gen_field(values->CommandSubType, 27, 28) |
2564 __gen_field(values->_3DCommandOpcode, 24, 26) |
2565 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2566 __gen_field(values->DwordLength, 0, 7) |
2567 0;
2568
2569 uint64_t qw1 =
2570 __gen_offset(values->KernelStartPointer, 6, 63) |
2571 0;
2572
2573 dw[1] = qw1;
2574 dw[2] = qw1 >> 32;
2575
2576 dw[3] =
2577 __gen_field(values->VectorMaskEnable, 30, 30) |
2578 __gen_field(values->SamplerCount, 27, 29) |
2579 __gen_field(values->BindingTableEntryCount, 18, 25) |
2580 __gen_field(values->ThreadDispatchPriority, 17, 17) |
2581 __gen_field(values->FloatingPointMode, 16, 16) |
2582 __gen_field(values->AccessesUAV, 14, 14) |
2583 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
2584 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
2585 0;
2586
2587 uint64_t qw4 =
2588 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
2589 __gen_field(values->PerThreadScratchSpace, 0, 3) |
2590 0;
2591
2592 dw[4] = qw4;
2593 dw[5] = qw4 >> 32;
2594
2595 dw[6] =
2596 __gen_field(values->DispatchGRFStartRegisterForURBData, 20, 24) |
2597 __gen_field(values->PatchURBEntryReadLength, 11, 17) |
2598 __gen_field(values->PatchURBEntryReadOffset, 4, 9) |
2599 0;
2600
2601 dw[7] =
2602 __gen_field(values->MaximumNumberofThreads, 21, 29) |
2603 __gen_field(values->StatisticsEnable, 10, 10) |
2604 __gen_field(values->DispatchMode, 3, 4) |
2605 __gen_field(values->ComputeWCoordinateEnable, 2, 2) |
2606 __gen_field(values->CacheDisable, 1, 1) |
2607 __gen_field(values->FunctionEnable, 0, 0) |
2608 0;
2609
2610 dw[8] =
2611 __gen_field(values->VertexURBEntryOutputReadOffset, 21, 26) |
2612 __gen_field(values->VertexURBEntryOutputLength, 16, 20) |
2613 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 8, 15) |
2614 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
2615 0;
2616
2617 uint64_t qw9 =
2618 __gen_offset(values->DUAL_PATCHKernelStartPointer, 6, 63) |
2619 0;
2620
2621 dw[9] = qw9;
2622 dw[10] = qw9 >> 32;
2623
2624 }
2625
2626 #define GEN9_3DSTATE_GATHER_CONSTANT_DS_length_bias 0x00000002
2627 #define GEN9_3DSTATE_GATHER_CONSTANT_DS_header \
2628 .CommandType = 3, \
2629 .CommandSubType = 3, \
2630 ._3DCommandOpcode = 0, \
2631 ._3DCommandSubOpcode = 55
2632
2633 #define GEN9_3DSTATE_GATHER_CONSTANT_DS_length 0x00000000
2634
2635 #define GEN9_GATHER_CONSTANT_ENTRY_length 0x00000001
2636
2637 struct GEN9_GATHER_CONSTANT_ENTRY {
2638 uint32_t ConstantBufferOffset;
2639 uint32_t ChannelMask;
2640 uint32_t BindingTableIndexOffset;
2641 };
2642
2643 static inline void
2644 GEN9_GATHER_CONSTANT_ENTRY_pack(__gen_user_data *data, void * restrict dst,
2645 const struct GEN9_GATHER_CONSTANT_ENTRY * restrict values)
2646 {
2647 uint32_t *dw = (uint32_t * restrict) dst;
2648
2649 dw[0] =
2650 __gen_offset(values->ConstantBufferOffset, 8, 15) |
2651 __gen_field(values->ChannelMask, 4, 7) |
2652 __gen_field(values->BindingTableIndexOffset, 0, 3) |
2653 0;
2654
2655 }
2656
2657 struct GEN9_3DSTATE_GATHER_CONSTANT_DS {
2658 uint32_t CommandType;
2659 uint32_t CommandSubType;
2660 uint32_t _3DCommandOpcode;
2661 uint32_t _3DCommandSubOpcode;
2662 uint32_t DwordLength;
2663 uint32_t ConstantBufferValid;
2664 uint32_t ConstantBufferBindingTableBlock;
2665 #define CommitGather 0
2666 #define NonCommitGather 1
2667 uint32_t UpdateGatherTableOnly;
2668 uint32_t GatherBufferOffset;
2669 bool ConstantBufferDx9GenerateStall;
2670 #define Load 0
2671 #define Read 1
2672 uint32_t OnDieTable;
2673 /* variable length fields follow */
2674 };
2675
2676 static inline void
2677 GEN9_3DSTATE_GATHER_CONSTANT_DS_pack(__gen_user_data *data, void * restrict dst,
2678 const struct GEN9_3DSTATE_GATHER_CONSTANT_DS * restrict values)
2679 {
2680 uint32_t *dw = (uint32_t * restrict) dst;
2681
2682 dw[0] =
2683 __gen_field(values->CommandType, 29, 31) |
2684 __gen_field(values->CommandSubType, 27, 28) |
2685 __gen_field(values->_3DCommandOpcode, 24, 26) |
2686 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2687 __gen_field(values->DwordLength, 0, 7) |
2688 0;
2689
2690 dw[1] =
2691 __gen_field(values->ConstantBufferValid, 16, 31) |
2692 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2693 __gen_field(values->UpdateGatherTableOnly, 1, 1) |
2694 0;
2695
2696 dw[2] =
2697 __gen_offset(values->GatherBufferOffset, 6, 22) |
2698 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2699 __gen_field(values->OnDieTable, 3, 3) |
2700 0;
2701
2702 /* variable length fields follow */
2703 }
2704
2705 #define GEN9_3DSTATE_GATHER_CONSTANT_GS_length_bias 0x00000002
2706 #define GEN9_3DSTATE_GATHER_CONSTANT_GS_header \
2707 .CommandType = 3, \
2708 .CommandSubType = 3, \
2709 ._3DCommandOpcode = 0, \
2710 ._3DCommandSubOpcode = 53
2711
2712 #define GEN9_3DSTATE_GATHER_CONSTANT_GS_length 0x00000000
2713
2714 struct GEN9_3DSTATE_GATHER_CONSTANT_GS {
2715 uint32_t CommandType;
2716 uint32_t CommandSubType;
2717 uint32_t _3DCommandOpcode;
2718 uint32_t _3DCommandSubOpcode;
2719 uint32_t DwordLength;
2720 uint32_t ConstantBufferValid;
2721 uint32_t ConstantBufferBindingTableBlock;
2722 #define CommitGather 0
2723 #define NonCommitGather 1
2724 uint32_t UpdateGatherTableOnly;
2725 uint32_t GatherBufferOffset;
2726 bool ConstantBufferDx9GenerateStall;
2727 #define Load 0
2728 #define Read 1
2729 uint32_t OnDieTable;
2730 /* variable length fields follow */
2731 };
2732
2733 static inline void
2734 GEN9_3DSTATE_GATHER_CONSTANT_GS_pack(__gen_user_data *data, void * restrict dst,
2735 const struct GEN9_3DSTATE_GATHER_CONSTANT_GS * restrict values)
2736 {
2737 uint32_t *dw = (uint32_t * restrict) dst;
2738
2739 dw[0] =
2740 __gen_field(values->CommandType, 29, 31) |
2741 __gen_field(values->CommandSubType, 27, 28) |
2742 __gen_field(values->_3DCommandOpcode, 24, 26) |
2743 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2744 __gen_field(values->DwordLength, 0, 7) |
2745 0;
2746
2747 dw[1] =
2748 __gen_field(values->ConstantBufferValid, 16, 31) |
2749 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2750 __gen_field(values->UpdateGatherTableOnly, 1, 1) |
2751 0;
2752
2753 dw[2] =
2754 __gen_offset(values->GatherBufferOffset, 6, 22) |
2755 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2756 __gen_field(values->OnDieTable, 3, 3) |
2757 0;
2758
2759 /* variable length fields follow */
2760 }
2761
2762 #define GEN9_3DSTATE_GATHER_CONSTANT_HS_length_bias 0x00000002
2763 #define GEN9_3DSTATE_GATHER_CONSTANT_HS_header \
2764 .CommandType = 3, \
2765 .CommandSubType = 3, \
2766 ._3DCommandOpcode = 0, \
2767 ._3DCommandSubOpcode = 54
2768
2769 #define GEN9_3DSTATE_GATHER_CONSTANT_HS_length 0x00000000
2770
2771 struct GEN9_3DSTATE_GATHER_CONSTANT_HS {
2772 uint32_t CommandType;
2773 uint32_t CommandSubType;
2774 uint32_t _3DCommandOpcode;
2775 uint32_t _3DCommandSubOpcode;
2776 uint32_t DwordLength;
2777 uint32_t ConstantBufferValid;
2778 uint32_t ConstantBufferBindingTableBlock;
2779 #define CommitGather 0
2780 #define NonCommitGather 1
2781 uint32_t UpdateGatherTableOnly;
2782 uint32_t GatherBufferOffset;
2783 bool ConstantBufferDx9GenerateStall;
2784 #define Load 0
2785 #define Read 1
2786 uint32_t OnDieTable;
2787 /* variable length fields follow */
2788 };
2789
2790 static inline void
2791 GEN9_3DSTATE_GATHER_CONSTANT_HS_pack(__gen_user_data *data, void * restrict dst,
2792 const struct GEN9_3DSTATE_GATHER_CONSTANT_HS * restrict values)
2793 {
2794 uint32_t *dw = (uint32_t * restrict) dst;
2795
2796 dw[0] =
2797 __gen_field(values->CommandType, 29, 31) |
2798 __gen_field(values->CommandSubType, 27, 28) |
2799 __gen_field(values->_3DCommandOpcode, 24, 26) |
2800 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2801 __gen_field(values->DwordLength, 0, 7) |
2802 0;
2803
2804 dw[1] =
2805 __gen_field(values->ConstantBufferValid, 16, 31) |
2806 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2807 __gen_field(values->UpdateGatherTableOnly, 1, 1) |
2808 0;
2809
2810 dw[2] =
2811 __gen_offset(values->GatherBufferOffset, 6, 22) |
2812 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2813 __gen_field(values->OnDieTable, 3, 3) |
2814 0;
2815
2816 /* variable length fields follow */
2817 }
2818
2819 #define GEN9_3DSTATE_GATHER_CONSTANT_PS_length_bias 0x00000002
2820 #define GEN9_3DSTATE_GATHER_CONSTANT_PS_header \
2821 .CommandType = 3, \
2822 .CommandSubType = 3, \
2823 ._3DCommandOpcode = 0, \
2824 ._3DCommandSubOpcode = 56
2825
2826 #define GEN9_3DSTATE_GATHER_CONSTANT_PS_length 0x00000000
2827
2828 struct GEN9_3DSTATE_GATHER_CONSTANT_PS {
2829 uint32_t CommandType;
2830 uint32_t CommandSubType;
2831 uint32_t _3DCommandOpcode;
2832 uint32_t _3DCommandSubOpcode;
2833 uint32_t DwordLength;
2834 uint32_t ConstantBufferValid;
2835 uint32_t ConstantBufferBindingTableBlock;
2836 #define CommitGather 0
2837 #define NonCommitGather 1
2838 uint32_t UpdateGatherTableOnly;
2839 bool DX9OnDieRegisterReadEnable;
2840 uint32_t GatherBufferOffset;
2841 bool ConstantBufferDx9GenerateStall;
2842 bool ConstantBufferDx9Enable;
2843 #define Load 0
2844 #define Read 1
2845 uint32_t OnDieTable;
2846 /* variable length fields follow */
2847 };
2848
2849 static inline void
2850 GEN9_3DSTATE_GATHER_CONSTANT_PS_pack(__gen_user_data *data, void * restrict dst,
2851 const struct GEN9_3DSTATE_GATHER_CONSTANT_PS * restrict values)
2852 {
2853 uint32_t *dw = (uint32_t * restrict) dst;
2854
2855 dw[0] =
2856 __gen_field(values->CommandType, 29, 31) |
2857 __gen_field(values->CommandSubType, 27, 28) |
2858 __gen_field(values->_3DCommandOpcode, 24, 26) |
2859 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2860 __gen_field(values->DwordLength, 0, 7) |
2861 0;
2862
2863 dw[1] =
2864 __gen_field(values->ConstantBufferValid, 16, 31) |
2865 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2866 __gen_field(values->UpdateGatherTableOnly, 1, 1) |
2867 __gen_field(values->DX9OnDieRegisterReadEnable, 0, 0) |
2868 0;
2869
2870 dw[2] =
2871 __gen_offset(values->GatherBufferOffset, 6, 22) |
2872 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2873 __gen_field(values->ConstantBufferDx9Enable, 4, 4) |
2874 __gen_field(values->OnDieTable, 3, 3) |
2875 0;
2876
2877 /* variable length fields follow */
2878 }
2879
2880 #define GEN9_3DSTATE_GATHER_CONSTANT_VS_length_bias 0x00000002
2881 #define GEN9_3DSTATE_GATHER_CONSTANT_VS_header \
2882 .CommandType = 3, \
2883 .CommandSubType = 3, \
2884 ._3DCommandOpcode = 0, \
2885 ._3DCommandSubOpcode = 52
2886
2887 #define GEN9_3DSTATE_GATHER_CONSTANT_VS_length 0x00000000
2888
2889 struct GEN9_3DSTATE_GATHER_CONSTANT_VS {
2890 uint32_t CommandType;
2891 uint32_t CommandSubType;
2892 uint32_t _3DCommandOpcode;
2893 uint32_t _3DCommandSubOpcode;
2894 uint32_t DwordLength;
2895 uint32_t ConstantBufferValid;
2896 uint32_t ConstantBufferBindingTableBlock;
2897 #define CommitGather 0
2898 #define NonCommitGather 1
2899 uint32_t UpdateGatherTableOnly;
2900 bool DX9OnDieRegisterReadEnable;
2901 uint32_t GatherBufferOffset;
2902 bool ConstantBufferDx9GenerateStall;
2903 bool ConstantBufferDx9Enable;
2904 #define Load 0
2905 #define Read 1
2906 uint32_t OnDieTable;
2907 /* variable length fields follow */
2908 };
2909
2910 static inline void
2911 GEN9_3DSTATE_GATHER_CONSTANT_VS_pack(__gen_user_data *data, void * restrict dst,
2912 const struct GEN9_3DSTATE_GATHER_CONSTANT_VS * restrict values)
2913 {
2914 uint32_t *dw = (uint32_t * restrict) dst;
2915
2916 dw[0] =
2917 __gen_field(values->CommandType, 29, 31) |
2918 __gen_field(values->CommandSubType, 27, 28) |
2919 __gen_field(values->_3DCommandOpcode, 24, 26) |
2920 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2921 __gen_field(values->DwordLength, 0, 7) |
2922 0;
2923
2924 dw[1] =
2925 __gen_field(values->ConstantBufferValid, 16, 31) |
2926 __gen_field(values->ConstantBufferBindingTableBlock, 12, 15) |
2927 __gen_field(values->UpdateGatherTableOnly, 1, 1) |
2928 __gen_field(values->DX9OnDieRegisterReadEnable, 0, 0) |
2929 0;
2930
2931 dw[2] =
2932 __gen_offset(values->GatherBufferOffset, 6, 22) |
2933 __gen_field(values->ConstantBufferDx9GenerateStall, 5, 5) |
2934 __gen_field(values->ConstantBufferDx9Enable, 4, 4) |
2935 __gen_field(values->OnDieTable, 3, 3) |
2936 0;
2937
2938 /* variable length fields follow */
2939 }
2940
2941 #define GEN9_3DSTATE_GATHER_POOL_ALLOC_length_bias 0x00000002
2942 #define GEN9_3DSTATE_GATHER_POOL_ALLOC_header \
2943 .CommandType = 3, \
2944 .CommandSubType = 3, \
2945 ._3DCommandOpcode = 1, \
2946 ._3DCommandSubOpcode = 26, \
2947 .DwordLength = 2
2948
2949 #define GEN9_3DSTATE_GATHER_POOL_ALLOC_length 0x00000004
2950
2951 struct GEN9_3DSTATE_GATHER_POOL_ALLOC {
2952 uint32_t CommandType;
2953 uint32_t CommandSubType;
2954 uint32_t _3DCommandOpcode;
2955 uint32_t _3DCommandSubOpcode;
2956 uint32_t DwordLength;
2957 __gen_address_type GatherPoolBaseAddress;
2958 bool GatherPoolEnable;
2959 struct GEN9_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
2960 uint32_t GatherPoolBufferSize;
2961 };
2962
2963 static inline void
2964 GEN9_3DSTATE_GATHER_POOL_ALLOC_pack(__gen_user_data *data, void * restrict dst,
2965 const struct GEN9_3DSTATE_GATHER_POOL_ALLOC * restrict values)
2966 {
2967 uint32_t *dw = (uint32_t * restrict) dst;
2968
2969 dw[0] =
2970 __gen_field(values->CommandType, 29, 31) |
2971 __gen_field(values->CommandSubType, 27, 28) |
2972 __gen_field(values->_3DCommandOpcode, 24, 26) |
2973 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
2974 __gen_field(values->DwordLength, 0, 7) |
2975 0;
2976
2977 uint32_t dw_MemoryObjectControlState;
2978 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
2979 uint32_t dw1 =
2980 __gen_field(values->GatherPoolEnable, 11, 11) |
2981 __gen_field(dw_MemoryObjectControlState, 0, 6) |
2982 0;
2983
2984 uint64_t qw1 =
2985 __gen_combine_address(data, &dw[1], values->GatherPoolBaseAddress, dw1);
2986
2987 dw[1] = qw1;
2988 dw[2] = qw1 >> 32;
2989
2990 dw[3] =
2991 __gen_field(values->GatherPoolBufferSize, 12, 31) |
2992 0;
2993
2994 }
2995
2996 #define GEN9_3DSTATE_GS_length_bias 0x00000002
2997 #define GEN9_3DSTATE_GS_header \
2998 .CommandType = 3, \
2999 .CommandSubType = 3, \
3000 ._3DCommandOpcode = 0, \
3001 ._3DCommandSubOpcode = 17, \
3002 .DwordLength = 8
3003
3004 #define GEN9_3DSTATE_GS_length 0x0000000a
3005
3006 struct GEN9_3DSTATE_GS {
3007 uint32_t CommandType;
3008 uint32_t CommandSubType;
3009 uint32_t _3DCommandOpcode;
3010 uint32_t _3DCommandSubOpcode;
3011 uint32_t DwordLength;
3012 uint64_t KernelStartPointer;
3013 uint32_t SingleProgramFlow;
3014 #define Dmask 0
3015 #define Vmask 1
3016 uint32_t VectorMaskEnable;
3017 #define NoSamplers 0
3018 #define _14Samplers 1
3019 #define _58Samplers 2
3020 #define _912Samplers 3
3021 #define _1316Samplers 4
3022 uint32_t SamplerCount;
3023 uint32_t BindingTableEntryCount;
3024 #define Normal 0
3025 #define High 1
3026 uint32_t ThreadDispatchPriority;
3027 #define IEEE754 0
3028 #define Alternate 1
3029 uint32_t FloatingPointMode;
3030 bool IllegalOpcodeExceptionEnable;
3031 bool AccessesUAV;
3032 bool MaskStackExceptionEnable;
3033 bool SoftwareExceptionEnable;
3034 uint32_t ExpectedVertexCount;
3035 uint64_t ScratchSpaceBasePointer;
3036 uint32_t PerThreadScratchSpace;
3037 uint32_t DispatchGRFStartRegisterForURBData54;
3038 uint32_t OutputVertexSize;
3039 uint32_t OutputTopology;
3040 uint32_t VertexURBEntryReadLength;
3041 bool IncludeVertexHandles;
3042 uint32_t VertexURBEntryReadOffset;
3043 uint32_t DispatchGRFStartRegisterForURBData;
3044 uint32_t ControlDataHeaderSize;
3045 uint32_t InstanceControl;
3046 uint32_t DefaultStreamId;
3047 #define DispatchModeSingle 0
3048 #define DispatchModeDualInstance 1
3049 #define DispatchModeDualObject 2
3050 #define DispatchModeSIMD8 3
3051 uint32_t DispatchMode;
3052 bool StatisticsEnable;
3053 uint32_t InvocationsIncrementValue;
3054 bool IncludePrimitiveID;
3055 uint32_t Hint;
3056 #define LEADING 0
3057 #define TRAILING 1
3058 uint32_t ReorderMode;
3059 bool DiscardAdjacency;
3060 bool Enable;
3061 #define CUT 0
3062 #define SID 1
3063 uint32_t ControlDataFormat;
3064 bool StaticOutput;
3065 uint32_t StaticOutputVertexCount;
3066 uint32_t MaximumNumberofThreads;
3067 uint32_t VertexURBEntryOutputReadOffset;
3068 uint32_t VertexURBEntryOutputLength;
3069 uint32_t UserClipDistanceClipTestEnableBitmask;
3070 uint32_t UserClipDistanceCullTestEnableBitmask;
3071 };
3072
3073 static inline void
3074 GEN9_3DSTATE_GS_pack(__gen_user_data *data, void * restrict dst,
3075 const struct GEN9_3DSTATE_GS * restrict values)
3076 {
3077 uint32_t *dw = (uint32_t * restrict) dst;
3078
3079 dw[0] =
3080 __gen_field(values->CommandType, 29, 31) |
3081 __gen_field(values->CommandSubType, 27, 28) |
3082 __gen_field(values->_3DCommandOpcode, 24, 26) |
3083 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3084 __gen_field(values->DwordLength, 0, 7) |
3085 0;
3086
3087 uint64_t qw1 =
3088 __gen_offset(values->KernelStartPointer, 6, 63) |
3089 0;
3090
3091 dw[1] = qw1;
3092 dw[2] = qw1 >> 32;
3093
3094 dw[3] =
3095 __gen_field(values->SingleProgramFlow, 31, 31) |
3096 __gen_field(values->VectorMaskEnable, 30, 30) |
3097 __gen_field(values->SamplerCount, 27, 29) |
3098 __gen_field(values->BindingTableEntryCount, 18, 25) |
3099 __gen_field(values->ThreadDispatchPriority, 17, 17) |
3100 __gen_field(values->FloatingPointMode, 16, 16) |
3101 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
3102 __gen_field(values->AccessesUAV, 12, 12) |
3103 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
3104 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
3105 __gen_field(values->ExpectedVertexCount, 0, 5) |
3106 0;
3107
3108 uint64_t qw4 =
3109 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
3110 __gen_field(values->PerThreadScratchSpace, 0, 3) |
3111 0;
3112
3113 dw[4] = qw4;
3114 dw[5] = qw4 >> 32;
3115
3116 dw[6] =
3117 __gen_field(values->DispatchGRFStartRegisterForURBData54, 29, 30) |
3118 __gen_field(values->OutputVertexSize, 23, 28) |
3119 __gen_field(values->OutputTopology, 17, 22) |
3120 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
3121 __gen_field(values->IncludeVertexHandles, 10, 10) |
3122 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
3123 __gen_field(values->DispatchGRFStartRegisterForURBData, 0, 3) |
3124 0;
3125
3126 dw[7] =
3127 __gen_field(values->ControlDataHeaderSize, 20, 23) |
3128 __gen_field(values->InstanceControl, 15, 19) |
3129 __gen_field(values->DefaultStreamId, 13, 14) |
3130 __gen_field(values->DispatchMode, 11, 12) |
3131 __gen_field(values->StatisticsEnable, 10, 10) |
3132 __gen_field(values->InvocationsIncrementValue, 5, 9) |
3133 __gen_field(values->IncludePrimitiveID, 4, 4) |
3134 __gen_field(values->Hint, 3, 3) |
3135 __gen_field(values->ReorderMode, 2, 2) |
3136 __gen_field(values->DiscardAdjacency, 1, 1) |
3137 __gen_field(values->Enable, 0, 0) |
3138 0;
3139
3140 dw[8] =
3141 __gen_field(values->ControlDataFormat, 31, 31) |
3142 __gen_field(values->StaticOutput, 30, 30) |
3143 __gen_field(values->StaticOutputVertexCount, 16, 26) |
3144 __gen_field(values->MaximumNumberofThreads, 0, 8) |
3145 0;
3146
3147 dw[9] =
3148 __gen_field(values->VertexURBEntryOutputReadOffset, 21, 26) |
3149 __gen_field(values->VertexURBEntryOutputLength, 16, 20) |
3150 __gen_field(values->UserClipDistanceClipTestEnableBitmask, 8, 15) |
3151 __gen_field(values->UserClipDistanceCullTestEnableBitmask, 0, 7) |
3152 0;
3153
3154 }
3155
3156 #define GEN9_3DSTATE_HIER_DEPTH_BUFFER_length_bias 0x00000002
3157 #define GEN9_3DSTATE_HIER_DEPTH_BUFFER_header \
3158 .CommandType = 3, \
3159 .CommandSubType = 3, \
3160 ._3DCommandOpcode = 0, \
3161 ._3DCommandSubOpcode = 7, \
3162 .DwordLength = 3
3163
3164 #define GEN9_3DSTATE_HIER_DEPTH_BUFFER_length 0x00000005
3165
3166 struct GEN9_3DSTATE_HIER_DEPTH_BUFFER {
3167 uint32_t CommandType;
3168 uint32_t CommandSubType;
3169 uint32_t _3DCommandOpcode;
3170 uint32_t _3DCommandSubOpcode;
3171 uint32_t DwordLength;
3172 struct GEN9_MEMORY_OBJECT_CONTROL_STATE HierarchicalDepthBufferObjectControlState;
3173 uint32_t SurfacePitch;
3174 __gen_address_type SurfaceBaseAddress;
3175 uint32_t SurfaceQPitch;
3176 };
3177
3178 static inline void
3179 GEN9_3DSTATE_HIER_DEPTH_BUFFER_pack(__gen_user_data *data, void * restrict dst,
3180 const struct GEN9_3DSTATE_HIER_DEPTH_BUFFER * restrict values)
3181 {
3182 uint32_t *dw = (uint32_t * restrict) dst;
3183
3184 dw[0] =
3185 __gen_field(values->CommandType, 29, 31) |
3186 __gen_field(values->CommandSubType, 27, 28) |
3187 __gen_field(values->_3DCommandOpcode, 24, 26) |
3188 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3189 __gen_field(values->DwordLength, 0, 7) |
3190 0;
3191
3192 uint32_t dw_HierarchicalDepthBufferObjectControlState;
3193 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_HierarchicalDepthBufferObjectControlState, &values->HierarchicalDepthBufferObjectControlState);
3194 dw[1] =
3195 __gen_field(dw_HierarchicalDepthBufferObjectControlState, 25, 31) |
3196 __gen_field(values->SurfacePitch, 0, 16) |
3197 0;
3198
3199 uint32_t dw2 =
3200 0;
3201
3202 uint64_t qw2 =
3203 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
3204
3205 dw[2] = qw2;
3206 dw[3] = qw2 >> 32;
3207
3208 dw[4] =
3209 __gen_field(values->SurfaceQPitch, 0, 14) |
3210 0;
3211
3212 }
3213
3214 #define GEN9_3DSTATE_HS_length_bias 0x00000002
3215 #define GEN9_3DSTATE_HS_header \
3216 .CommandType = 3, \
3217 .CommandSubType = 3, \
3218 ._3DCommandOpcode = 0, \
3219 ._3DCommandSubOpcode = 27, \
3220 .DwordLength = 7
3221
3222 #define GEN9_3DSTATE_HS_length 0x00000009
3223
3224 struct GEN9_3DSTATE_HS {
3225 uint32_t CommandType;
3226 uint32_t CommandSubType;
3227 uint32_t _3DCommandOpcode;
3228 uint32_t _3DCommandSubOpcode;
3229 uint32_t DwordLength;
3230 #define NoSamplers 0
3231 #define _14Samplers 1
3232 #define _58Samplers 2
3233 #define _912Samplers 3
3234 #define _1316Samplers 4
3235 uint32_t SamplerCount;
3236 uint32_t BindingTableEntryCount;
3237 #define Normal 0
3238 #define High 1
3239 uint32_t ThreadDispatchPriority;
3240 #define IEEE754 0
3241 #define alternate 1
3242 uint32_t FloatingPointMode;
3243 bool IllegalOpcodeExceptionEnable;
3244 bool SoftwareExceptionEnable;
3245 bool Enable;
3246 bool StatisticsEnable;
3247 uint32_t MaximumNumberofThreads;
3248 uint32_t InstanceCount;
3249 uint64_t KernelStartPointer;
3250 uint64_t ScratchSpaceBasePointer;
3251 uint32_t PerThreadScratchSpace;
3252 uint32_t DispatchGRFStartRegisterForURBData5;
3253 bool SingleProgramFlow;
3254 #define Dmask 0
3255 #define Vmask 1
3256 uint32_t VectorMaskEnable;
3257 bool AccessesUAV;
3258 bool IncludeVertexHandles;
3259 uint32_t DispatchGRFStartRegisterForURBData;
3260 #define SINGLE_PATCH 0
3261 #define DUAL_PATCH 1
3262 #define _8_PATCH 2
3263 uint32_t DispatchMode;
3264 uint32_t VertexURBEntryReadLength;
3265 uint32_t VertexURBEntryReadOffset;
3266 bool IncludePrimitiveID;
3267 };
3268
3269 static inline void
3270 GEN9_3DSTATE_HS_pack(__gen_user_data *data, void * restrict dst,
3271 const struct GEN9_3DSTATE_HS * restrict values)
3272 {
3273 uint32_t *dw = (uint32_t * restrict) dst;
3274
3275 dw[0] =
3276 __gen_field(values->CommandType, 29, 31) |
3277 __gen_field(values->CommandSubType, 27, 28) |
3278 __gen_field(values->_3DCommandOpcode, 24, 26) |
3279 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3280 __gen_field(values->DwordLength, 0, 7) |
3281 0;
3282
3283 dw[1] =
3284 __gen_field(values->SamplerCount, 27, 29) |
3285 __gen_field(values->BindingTableEntryCount, 18, 25) |
3286 __gen_field(values->ThreadDispatchPriority, 17, 17) |
3287 __gen_field(values->FloatingPointMode, 16, 16) |
3288 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
3289 __gen_field(values->SoftwareExceptionEnable, 12, 12) |
3290 0;
3291
3292 dw[2] =
3293 __gen_field(values->Enable, 31, 31) |
3294 __gen_field(values->StatisticsEnable, 29, 29) |
3295 __gen_field(values->MaximumNumberofThreads, 8, 16) |
3296 __gen_field(values->InstanceCount, 0, 3) |
3297 0;
3298
3299 uint64_t qw3 =
3300 __gen_offset(values->KernelStartPointer, 6, 63) |
3301 0;
3302
3303 dw[3] = qw3;
3304 dw[4] = qw3 >> 32;
3305
3306 uint64_t qw5 =
3307 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
3308 __gen_field(values->PerThreadScratchSpace, 0, 3) |
3309 0;
3310
3311 dw[5] = qw5;
3312 dw[6] = qw5 >> 32;
3313
3314 dw[7] =
3315 __gen_field(values->DispatchGRFStartRegisterForURBData5, 28, 28) |
3316 __gen_field(values->SingleProgramFlow, 27, 27) |
3317 __gen_field(values->VectorMaskEnable, 26, 26) |
3318 __gen_field(values->AccessesUAV, 25, 25) |
3319 __gen_field(values->IncludeVertexHandles, 24, 24) |
3320 __gen_field(values->DispatchGRFStartRegisterForURBData, 19, 23) |
3321 __gen_field(values->DispatchMode, 17, 18) |
3322 __gen_field(values->VertexURBEntryReadLength, 11, 16) |
3323 __gen_field(values->VertexURBEntryReadOffset, 4, 9) |
3324 __gen_field(values->IncludePrimitiveID, 0, 0) |
3325 0;
3326
3327 dw[8] =
3328 0;
3329
3330 }
3331
3332 #define GEN9_3DSTATE_INDEX_BUFFER_length_bias 0x00000002
3333 #define GEN9_3DSTATE_INDEX_BUFFER_header \
3334 .CommandType = 3, \
3335 .CommandSubType = 3, \
3336 ._3DCommandOpcode = 0, \
3337 ._3DCommandSubOpcode = 10, \
3338 .DwordLength = 3
3339
3340 #define GEN9_3DSTATE_INDEX_BUFFER_length 0x00000005
3341
3342 struct GEN9_3DSTATE_INDEX_BUFFER {
3343 uint32_t CommandType;
3344 uint32_t CommandSubType;
3345 uint32_t _3DCommandOpcode;
3346 uint32_t _3DCommandSubOpcode;
3347 uint32_t DwordLength;
3348 #define INDEX_BYTE 0
3349 #define INDEX_WORD 1
3350 #define INDEX_DWORD 2
3351 uint32_t IndexFormat;
3352 struct GEN9_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
3353 __gen_address_type BufferStartingAddress;
3354 uint32_t BufferSize;
3355 };
3356
3357 static inline void
3358 GEN9_3DSTATE_INDEX_BUFFER_pack(__gen_user_data *data, void * restrict dst,
3359 const struct GEN9_3DSTATE_INDEX_BUFFER * restrict values)
3360 {
3361 uint32_t *dw = (uint32_t * restrict) dst;
3362
3363 dw[0] =
3364 __gen_field(values->CommandType, 29, 31) |
3365 __gen_field(values->CommandSubType, 27, 28) |
3366 __gen_field(values->_3DCommandOpcode, 24, 26) |
3367 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3368 __gen_field(values->DwordLength, 0, 7) |
3369 0;
3370
3371 uint32_t dw_MemoryObjectControlState;
3372 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
3373 dw[1] =
3374 __gen_field(values->IndexFormat, 8, 9) |
3375 __gen_field(dw_MemoryObjectControlState, 0, 6) |
3376 0;
3377
3378 uint32_t dw2 =
3379 0;
3380
3381 uint64_t qw2 =
3382 __gen_combine_address(data, &dw[2], values->BufferStartingAddress, dw2);
3383
3384 dw[2] = qw2;
3385 dw[3] = qw2 >> 32;
3386
3387 dw[4] =
3388 __gen_field(values->BufferSize, 0, 31) |
3389 0;
3390
3391 }
3392
3393 #define GEN9_3DSTATE_LINE_STIPPLE_length_bias 0x00000002
3394 #define GEN9_3DSTATE_LINE_STIPPLE_header \
3395 .CommandType = 3, \
3396 .CommandSubType = 3, \
3397 ._3DCommandOpcode = 1, \
3398 ._3DCommandSubOpcode = 8, \
3399 .DwordLength = 1
3400
3401 #define GEN9_3DSTATE_LINE_STIPPLE_length 0x00000003
3402
3403 struct GEN9_3DSTATE_LINE_STIPPLE {
3404 uint32_t CommandType;
3405 uint32_t CommandSubType;
3406 uint32_t _3DCommandOpcode;
3407 uint32_t _3DCommandSubOpcode;
3408 uint32_t DwordLength;
3409 bool ModifyEnableCurrentRepeatCounterCurrentStippleIndex;
3410 uint32_t CurrentRepeatCounter;
3411 uint32_t CurrentStippleIndex;
3412 uint32_t LineStipplePattern;
3413 float LineStippleInverseRepeatCount;
3414 uint32_t LineStippleRepeatCount;
3415 };
3416
3417 static inline void
3418 GEN9_3DSTATE_LINE_STIPPLE_pack(__gen_user_data *data, void * restrict dst,
3419 const struct GEN9_3DSTATE_LINE_STIPPLE * restrict values)
3420 {
3421 uint32_t *dw = (uint32_t * restrict) dst;
3422
3423 dw[0] =
3424 __gen_field(values->CommandType, 29, 31) |
3425 __gen_field(values->CommandSubType, 27, 28) |
3426 __gen_field(values->_3DCommandOpcode, 24, 26) |
3427 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3428 __gen_field(values->DwordLength, 0, 7) |
3429 0;
3430
3431 dw[1] =
3432 __gen_field(values->ModifyEnableCurrentRepeatCounterCurrentStippleIndex, 31, 31) |
3433 __gen_field(values->CurrentRepeatCounter, 21, 29) |
3434 __gen_field(values->CurrentStippleIndex, 16, 19) |
3435 __gen_field(values->LineStipplePattern, 0, 15) |
3436 0;
3437
3438 dw[2] =
3439 __gen_field(values->LineStippleInverseRepeatCount * (1 << 16), 15, 31) |
3440 __gen_field(values->LineStippleRepeatCount, 0, 8) |
3441 0;
3442
3443 }
3444
3445 #define GEN9_3DSTATE_MONOFILTER_SIZE_length_bias 0x00000002
3446 #define GEN9_3DSTATE_MONOFILTER_SIZE_header \
3447 .CommandType = 3, \
3448 .CommandSubType = 3, \
3449 ._3DCommandOpcode = 1, \
3450 ._3DCommandSubOpcode = 17, \
3451 .DwordLength = 0
3452
3453 #define GEN9_3DSTATE_MONOFILTER_SIZE_length 0x00000002
3454
3455 struct GEN9_3DSTATE_MONOFILTER_SIZE {
3456 uint32_t CommandType;
3457 uint32_t CommandSubType;
3458 uint32_t _3DCommandOpcode;
3459 uint32_t _3DCommandSubOpcode;
3460 uint32_t DwordLength;
3461 uint32_t MonochromeFilterWidth;
3462 uint32_t MonochromeFilterHeight;
3463 };
3464
3465 static inline void
3466 GEN9_3DSTATE_MONOFILTER_SIZE_pack(__gen_user_data *data, void * restrict dst,
3467 const struct GEN9_3DSTATE_MONOFILTER_SIZE * restrict values)
3468 {
3469 uint32_t *dw = (uint32_t * restrict) dst;
3470
3471 dw[0] =
3472 __gen_field(values->CommandType, 29, 31) |
3473 __gen_field(values->CommandSubType, 27, 28) |
3474 __gen_field(values->_3DCommandOpcode, 24, 26) |
3475 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3476 __gen_field(values->DwordLength, 0, 7) |
3477 0;
3478
3479 dw[1] =
3480 __gen_field(values->MonochromeFilterWidth, 3, 5) |
3481 __gen_field(values->MonochromeFilterHeight, 0, 2) |
3482 0;
3483
3484 }
3485
3486 #define GEN9_3DSTATE_MULTISAMPLE_length_bias 0x00000002
3487 #define GEN9_3DSTATE_MULTISAMPLE_header \
3488 .CommandType = 3, \
3489 .CommandSubType = 3, \
3490 ._3DCommandOpcode = 0, \
3491 ._3DCommandSubOpcode = 13, \
3492 .DwordLength = 0
3493
3494 #define GEN9_3DSTATE_MULTISAMPLE_length 0x00000002
3495
3496 struct GEN9_3DSTATE_MULTISAMPLE {
3497 uint32_t CommandType;
3498 uint32_t CommandSubType;
3499 uint32_t _3DCommandOpcode;
3500 uint32_t _3DCommandSubOpcode;
3501 uint32_t DwordLength;
3502 uint32_t PixelPositionOffsetEnable;
3503 #define CENTER 0
3504 #define UL_CORNER 1
3505 uint32_t PixelLocation;
3506 uint32_t NumberofMultisamples;
3507 };
3508
3509 static inline void
3510 GEN9_3DSTATE_MULTISAMPLE_pack(__gen_user_data *data, void * restrict dst,
3511 const struct GEN9_3DSTATE_MULTISAMPLE * restrict values)
3512 {
3513 uint32_t *dw = (uint32_t * restrict) dst;
3514
3515 dw[0] =
3516 __gen_field(values->CommandType, 29, 31) |
3517 __gen_field(values->CommandSubType, 27, 28) |
3518 __gen_field(values->_3DCommandOpcode, 24, 26) |
3519 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3520 __gen_field(values->DwordLength, 0, 7) |
3521 0;
3522
3523 dw[1] =
3524 __gen_field(values->PixelPositionOffsetEnable, 5, 5) |
3525 __gen_field(values->PixelLocation, 4, 4) |
3526 __gen_field(values->NumberofMultisamples, 1, 3) |
3527 0;
3528
3529 }
3530
3531 #define GEN9_3DSTATE_POLY_STIPPLE_OFFSET_length_bias 0x00000002
3532 #define GEN9_3DSTATE_POLY_STIPPLE_OFFSET_header \
3533 .CommandType = 3, \
3534 .CommandSubType = 3, \
3535 ._3DCommandOpcode = 1, \
3536 ._3DCommandSubOpcode = 6, \
3537 .DwordLength = 0
3538
3539 #define GEN9_3DSTATE_POLY_STIPPLE_OFFSET_length 0x00000002
3540
3541 struct GEN9_3DSTATE_POLY_STIPPLE_OFFSET {
3542 uint32_t CommandType;
3543 uint32_t CommandSubType;
3544 uint32_t _3DCommandOpcode;
3545 uint32_t _3DCommandSubOpcode;
3546 uint32_t DwordLength;
3547 uint32_t PolygonStippleXOffset;
3548 uint32_t PolygonStippleYOffset;
3549 };
3550
3551 static inline void
3552 GEN9_3DSTATE_POLY_STIPPLE_OFFSET_pack(__gen_user_data *data, void * restrict dst,
3553 const struct GEN9_3DSTATE_POLY_STIPPLE_OFFSET * restrict values)
3554 {
3555 uint32_t *dw = (uint32_t * restrict) dst;
3556
3557 dw[0] =
3558 __gen_field(values->CommandType, 29, 31) |
3559 __gen_field(values->CommandSubType, 27, 28) |
3560 __gen_field(values->_3DCommandOpcode, 24, 26) |
3561 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3562 __gen_field(values->DwordLength, 0, 7) |
3563 0;
3564
3565 dw[1] =
3566 __gen_field(values->PolygonStippleXOffset, 8, 12) |
3567 __gen_field(values->PolygonStippleYOffset, 0, 4) |
3568 0;
3569
3570 }
3571
3572 #define GEN9_3DSTATE_POLY_STIPPLE_PATTERN_length_bias 0x00000002
3573 #define GEN9_3DSTATE_POLY_STIPPLE_PATTERN_header\
3574 .CommandType = 3, \
3575 .CommandSubType = 3, \
3576 ._3DCommandOpcode = 1, \
3577 ._3DCommandSubOpcode = 7, \
3578 .DwordLength = 31
3579
3580 #define GEN9_3DSTATE_POLY_STIPPLE_PATTERN_length 0x00000021
3581
3582 struct GEN9_3DSTATE_POLY_STIPPLE_PATTERN {
3583 uint32_t CommandType;
3584 uint32_t CommandSubType;
3585 uint32_t _3DCommandOpcode;
3586 uint32_t _3DCommandSubOpcode;
3587 uint32_t DwordLength;
3588 uint32_t PatternRow[32];
3589 };
3590
3591 static inline void
3592 GEN9_3DSTATE_POLY_STIPPLE_PATTERN_pack(__gen_user_data *data, void * restrict dst,
3593 const struct GEN9_3DSTATE_POLY_STIPPLE_PATTERN * restrict values)
3594 {
3595 uint32_t *dw = (uint32_t * restrict) dst;
3596
3597 dw[0] =
3598 __gen_field(values->CommandType, 29, 31) |
3599 __gen_field(values->CommandSubType, 27, 28) |
3600 __gen_field(values->_3DCommandOpcode, 24, 26) |
3601 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3602 __gen_field(values->DwordLength, 0, 7) |
3603 0;
3604
3605 for (uint32_t i = 0, j = 1; i < 32; i += 1, j++) {
3606 dw[j] =
3607 __gen_field(values->PatternRow[i + 0], 0, 31) |
3608 0;
3609 }
3610
3611 }
3612
3613 #define GEN9_3DSTATE_PS_length_bias 0x00000002
3614 #define GEN9_3DSTATE_PS_header \
3615 .CommandType = 3, \
3616 .CommandSubType = 3, \
3617 ._3DCommandOpcode = 0, \
3618 ._3DCommandSubOpcode = 32, \
3619 .DwordLength = 10
3620
3621 #define GEN9_3DSTATE_PS_length 0x0000000c
3622
3623 struct GEN9_3DSTATE_PS {
3624 uint32_t CommandType;
3625 uint32_t CommandSubType;
3626 uint32_t _3DCommandOpcode;
3627 uint32_t _3DCommandSubOpcode;
3628 uint32_t DwordLength;
3629 uint64_t KernelStartPointer0;
3630 #define Multiple 0
3631 #define Single 1
3632 uint32_t SingleProgramFlow;
3633 #define Dmask 0
3634 #define Vmask 1
3635 uint32_t VectorMaskEnable;
3636 #define NoSamplers 0
3637 #define _14Samplers 1
3638 #define _58Samplers 2
3639 #define _912Samplers 3
3640 #define _1316Samplers 4
3641 uint32_t SamplerCount;
3642 #define FlushedtoZero 0
3643 #define Retained 1
3644 uint32_t SinglePrecisionDenormalMode;
3645 uint32_t BindingTableEntryCount;
3646 #define Normal 0
3647 #define High 1
3648 uint32_t ThreadDispatchPriority;
3649 #define IEEE754 0
3650 #define Alternate 1
3651 uint32_t FloatingPointMode;
3652 #define RTNE 0
3653 #define RU 1
3654 #define RD 2
3655 #define RTZ 3
3656 uint32_t RoundingMode;
3657 bool IllegalOpcodeExceptionEnable;
3658 bool MaskStackExceptionEnable;
3659 bool SoftwareExceptionEnable;
3660 uint64_t ScratchSpaceBasePointer;
3661 uint32_t PerThreadScratchSpace;
3662 uint32_t MaximumNumberofThreadsPerPSD;
3663 bool PushConstantEnable;
3664 bool RenderTargetFastClearEnable;
3665 #define RESOLVE_DISABLED 0
3666 #define RESOLVE_PARTIAL 1
3667 #define RESOLVE_FULL 3
3668 uint32_t RenderTargetResolveType;
3669 #define POSOFFSET_NONE 0
3670 #define POSOFFSET_CENTROID 2
3671 #define POSOFFSET_SAMPLE 3
3672 uint32_t PositionXYOffsetSelect;
3673 bool _32PixelDispatchEnable;
3674 bool _16PixelDispatchEnable;
3675 bool _8PixelDispatchEnable;
3676 uint32_t DispatchGRFStartRegisterForConstantSetupData0;
3677 uint32_t DispatchGRFStartRegisterForConstantSetupData1;
3678 uint32_t DispatchGRFStartRegisterForConstantSetupData2;
3679 uint64_t KernelStartPointer1;
3680 uint64_t KernelStartPointer2;
3681 };
3682
3683 static inline void
3684 GEN9_3DSTATE_PS_pack(__gen_user_data *data, void * restrict dst,
3685 const struct GEN9_3DSTATE_PS * restrict values)
3686 {
3687 uint32_t *dw = (uint32_t * restrict) dst;
3688
3689 dw[0] =
3690 __gen_field(values->CommandType, 29, 31) |
3691 __gen_field(values->CommandSubType, 27, 28) |
3692 __gen_field(values->_3DCommandOpcode, 24, 26) |
3693 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3694 __gen_field(values->DwordLength, 0, 7) |
3695 0;
3696
3697 uint64_t qw1 =
3698 __gen_offset(values->KernelStartPointer0, 6, 63) |
3699 0;
3700
3701 dw[1] = qw1;
3702 dw[2] = qw1 >> 32;
3703
3704 dw[3] =
3705 __gen_field(values->SingleProgramFlow, 31, 31) |
3706 __gen_field(values->VectorMaskEnable, 30, 30) |
3707 __gen_field(values->SamplerCount, 27, 29) |
3708 __gen_field(values->SinglePrecisionDenormalMode, 26, 26) |
3709 __gen_field(values->BindingTableEntryCount, 18, 25) |
3710 __gen_field(values->ThreadDispatchPriority, 17, 17) |
3711 __gen_field(values->FloatingPointMode, 16, 16) |
3712 __gen_field(values->RoundingMode, 14, 15) |
3713 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
3714 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
3715 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
3716 0;
3717
3718 uint64_t qw4 =
3719 __gen_offset(values->ScratchSpaceBasePointer, 10, 63) |
3720 __gen_field(values->PerThreadScratchSpace, 0, 3) |
3721 0;
3722
3723 dw[4] = qw4;
3724 dw[5] = qw4 >> 32;
3725
3726 dw[6] =
3727 __gen_field(values->MaximumNumberofThreadsPerPSD, 23, 31) |
3728 __gen_field(values->PushConstantEnable, 11, 11) |
3729 __gen_field(values->RenderTargetFastClearEnable, 8, 8) |
3730 __gen_field(values->RenderTargetResolveType, 6, 7) |
3731 __gen_field(values->PositionXYOffsetSelect, 3, 4) |
3732 __gen_field(values->_32PixelDispatchEnable, 2, 2) |
3733 __gen_field(values->_16PixelDispatchEnable, 1, 1) |
3734 __gen_field(values->_8PixelDispatchEnable, 0, 0) |
3735 0;
3736
3737 dw[7] =
3738 __gen_field(values->DispatchGRFStartRegisterForConstantSetupData0, 16, 22) |
3739 __gen_field(values->DispatchGRFStartRegisterForConstantSetupData1, 8, 14) |
3740 __gen_field(values->DispatchGRFStartRegisterForConstantSetupData2, 0, 6) |
3741 0;
3742
3743 uint64_t qw8 =
3744 __gen_offset(values->KernelStartPointer1, 6, 63) |
3745 0;
3746
3747 dw[8] = qw8;
3748 dw[9] = qw8 >> 32;
3749
3750 uint64_t qw10 =
3751 __gen_offset(values->KernelStartPointer2, 6, 63) |
3752 0;
3753
3754 dw[10] = qw10;
3755 dw[11] = qw10 >> 32;
3756
3757 }
3758
3759 #define GEN9_3DSTATE_PS_BLEND_length_bias 0x00000002
3760 #define GEN9_3DSTATE_PS_BLEND_header \
3761 .CommandType = 3, \
3762 .CommandSubType = 3, \
3763 ._3DCommandOpcode = 0, \
3764 ._3DCommandSubOpcode = 77, \
3765 .DwordLength = 0
3766
3767 #define GEN9_3DSTATE_PS_BLEND_length 0x00000002
3768
3769 struct GEN9_3DSTATE_PS_BLEND {
3770 uint32_t CommandType;
3771 uint32_t CommandSubType;
3772 uint32_t _3DCommandOpcode;
3773 uint32_t _3DCommandSubOpcode;
3774 uint32_t DwordLength;
3775 bool AlphaToCoverageEnable;
3776 bool HasWriteableRT;
3777 bool ColorBufferBlendEnable;
3778 uint32_t SourceAlphaBlendFactor;
3779 uint32_t DestinationAlphaBlendFactor;
3780 uint32_t SourceBlendFactor;
3781 uint32_t DestinationBlendFactor;
3782 bool AlphaTestEnable;
3783 bool IndependentAlphaBlendEnable;
3784 };
3785
3786 static inline void
3787 GEN9_3DSTATE_PS_BLEND_pack(__gen_user_data *data, void * restrict dst,
3788 const struct GEN9_3DSTATE_PS_BLEND * restrict values)
3789 {
3790 uint32_t *dw = (uint32_t * restrict) dst;
3791
3792 dw[0] =
3793 __gen_field(values->CommandType, 29, 31) |
3794 __gen_field(values->CommandSubType, 27, 28) |
3795 __gen_field(values->_3DCommandOpcode, 24, 26) |
3796 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3797 __gen_field(values->DwordLength, 0, 7) |
3798 0;
3799
3800 dw[1] =
3801 __gen_field(values->AlphaToCoverageEnable, 31, 31) |
3802 __gen_field(values->HasWriteableRT, 30, 30) |
3803 __gen_field(values->ColorBufferBlendEnable, 29, 29) |
3804 __gen_field(values->SourceAlphaBlendFactor, 24, 28) |
3805 __gen_field(values->DestinationAlphaBlendFactor, 19, 23) |
3806 __gen_field(values->SourceBlendFactor, 14, 18) |
3807 __gen_field(values->DestinationBlendFactor, 9, 13) |
3808 __gen_field(values->AlphaTestEnable, 8, 8) |
3809 __gen_field(values->IndependentAlphaBlendEnable, 7, 7) |
3810 0;
3811
3812 }
3813
3814 #define GEN9_3DSTATE_PS_EXTRA_length_bias 0x00000002
3815 #define GEN9_3DSTATE_PS_EXTRA_header \
3816 .CommandType = 3, \
3817 .CommandSubType = 3, \
3818 ._3DCommandOpcode = 0, \
3819 ._3DCommandSubOpcode = 79, \
3820 .DwordLength = 0
3821
3822 #define GEN9_3DSTATE_PS_EXTRA_length 0x00000002
3823
3824 struct GEN9_3DSTATE_PS_EXTRA {
3825 uint32_t CommandType;
3826 uint32_t CommandSubType;
3827 uint32_t _3DCommandOpcode;
3828 uint32_t _3DCommandSubOpcode;
3829 uint32_t DwordLength;
3830 bool PixelShaderValid;
3831 bool PixelShaderDoesnotwritetoRT;
3832 bool oMaskPresenttoRenderTarget;
3833 bool PixelShaderKillsPixel;
3834 #define PSCDEPTH_OFF 0
3835 #define PSCDEPTH_ON 1
3836 #define PSCDEPTH_ON_GE 2
3837 #define PSCDEPTH_ON_LE 3
3838 uint32_t PixelShaderComputedDepthMode;
3839 bool ForceComputedDepth;
3840 bool PixelShaderUsesSourceDepth;
3841 bool PixelShaderUsesSourceW;
3842 uint32_t Removed;
3843 bool AttributeEnable;
3844 bool PixelShaderDisablesAlphaToCoverage;
3845 bool PixelShaderIsPerSample;
3846 bool PixelShaderComputesStencil;
3847 bool PixelShaderPullsBary;
3848 bool PixelShaderHasUAV;
3849 #define ICMS_NONE 0
3850 #define ICMS_NORMAL 1
3851 #define ICMS_INNER_CONSERVATIVE 2
3852 #define ICMS_DEPTH_COVERAGE 3
3853 uint32_t InputCoverageMaskState;
3854 };
3855
3856 static inline void
3857 GEN9_3DSTATE_PS_EXTRA_pack(__gen_user_data *data, void * restrict dst,
3858 const struct GEN9_3DSTATE_PS_EXTRA * restrict values)
3859 {
3860 uint32_t *dw = (uint32_t * restrict) dst;
3861
3862 dw[0] =
3863 __gen_field(values->CommandType, 29, 31) |
3864 __gen_field(values->CommandSubType, 27, 28) |
3865 __gen_field(values->_3DCommandOpcode, 24, 26) |
3866 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3867 __gen_field(values->DwordLength, 0, 7) |
3868 0;
3869
3870 dw[1] =
3871 __gen_field(values->PixelShaderValid, 31, 31) |
3872 __gen_field(values->PixelShaderDoesnotwritetoRT, 30, 30) |
3873 __gen_field(values->oMaskPresenttoRenderTarget, 29, 29) |
3874 __gen_field(values->PixelShaderKillsPixel, 28, 28) |
3875 __gen_field(values->PixelShaderComputedDepthMode, 26, 27) |
3876 __gen_field(values->ForceComputedDepth, 25, 25) |
3877 __gen_field(values->PixelShaderUsesSourceDepth, 24, 24) |
3878 __gen_field(values->PixelShaderUsesSourceW, 23, 23) |
3879 __gen_field(values->Removed, 17, 17) |
3880 __gen_field(values->AttributeEnable, 8, 8) |
3881 __gen_field(values->PixelShaderDisablesAlphaToCoverage, 7, 7) |
3882 __gen_field(values->PixelShaderIsPerSample, 6, 6) |
3883 __gen_field(values->PixelShaderComputesStencil, 5, 5) |
3884 __gen_field(values->PixelShaderPullsBary, 3, 3) |
3885 __gen_field(values->PixelShaderHasUAV, 2, 2) |
3886 __gen_field(values->InputCoverageMaskState, 0, 1) |
3887 0;
3888
3889 }
3890
3891 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length_bias 0x00000002
3892 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS_header\
3893 .CommandType = 3, \
3894 .CommandSubType = 3, \
3895 ._3DCommandOpcode = 1, \
3896 ._3DCommandSubOpcode = 20, \
3897 .DwordLength = 0
3898
3899 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length 0x00000002
3900
3901 struct GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS {
3902 uint32_t CommandType;
3903 uint32_t CommandSubType;
3904 uint32_t _3DCommandOpcode;
3905 uint32_t _3DCommandSubOpcode;
3906 uint32_t DwordLength;
3907 uint32_t ConstantBufferOffset;
3908 uint32_t ConstantBufferSize;
3909 };
3910
3911 static inline void
3912 GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS_pack(__gen_user_data *data, void * restrict dst,
3913 const struct GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS * restrict values)
3914 {
3915 uint32_t *dw = (uint32_t * restrict) dst;
3916
3917 dw[0] =
3918 __gen_field(values->CommandType, 29, 31) |
3919 __gen_field(values->CommandSubType, 27, 28) |
3920 __gen_field(values->_3DCommandOpcode, 24, 26) |
3921 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3922 __gen_field(values->DwordLength, 0, 7) |
3923 0;
3924
3925 dw[1] =
3926 __gen_field(values->ConstantBufferOffset, 16, 20) |
3927 __gen_field(values->ConstantBufferSize, 0, 5) |
3928 0;
3929
3930 }
3931
3932 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length_bias 0x00000002
3933 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS_header\
3934 .CommandType = 3, \
3935 .CommandSubType = 3, \
3936 ._3DCommandOpcode = 1, \
3937 ._3DCommandSubOpcode = 21, \
3938 .DwordLength = 0
3939
3940 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length 0x00000002
3941
3942 struct GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS {
3943 uint32_t CommandType;
3944 uint32_t CommandSubType;
3945 uint32_t _3DCommandOpcode;
3946 uint32_t _3DCommandSubOpcode;
3947 uint32_t DwordLength;
3948 uint32_t ConstantBufferOffset;
3949 uint32_t ConstantBufferSize;
3950 };
3951
3952 static inline void
3953 GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS_pack(__gen_user_data *data, void * restrict dst,
3954 const struct GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS * restrict values)
3955 {
3956 uint32_t *dw = (uint32_t * restrict) dst;
3957
3958 dw[0] =
3959 __gen_field(values->CommandType, 29, 31) |
3960 __gen_field(values->CommandSubType, 27, 28) |
3961 __gen_field(values->_3DCommandOpcode, 24, 26) |
3962 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
3963 __gen_field(values->DwordLength, 0, 7) |
3964 0;
3965
3966 dw[1] =
3967 __gen_field(values->ConstantBufferOffset, 16, 20) |
3968 __gen_field(values->ConstantBufferSize, 0, 5) |
3969 0;
3970
3971 }
3972
3973 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length_bias 0x00000002
3974 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS_header\
3975 .CommandType = 3, \
3976 .CommandSubType = 3, \
3977 ._3DCommandOpcode = 1, \
3978 ._3DCommandSubOpcode = 19, \
3979 .DwordLength = 0
3980
3981 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length 0x00000002
3982
3983 struct GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS {
3984 uint32_t CommandType;
3985 uint32_t CommandSubType;
3986 uint32_t _3DCommandOpcode;
3987 uint32_t _3DCommandSubOpcode;
3988 uint32_t DwordLength;
3989 uint32_t ConstantBufferOffset;
3990 uint32_t ConstantBufferSize;
3991 };
3992
3993 static inline void
3994 GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS_pack(__gen_user_data *data, void * restrict dst,
3995 const struct GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS * restrict values)
3996 {
3997 uint32_t *dw = (uint32_t * restrict) dst;
3998
3999 dw[0] =
4000 __gen_field(values->CommandType, 29, 31) |
4001 __gen_field(values->CommandSubType, 27, 28) |
4002 __gen_field(values->_3DCommandOpcode, 24, 26) |
4003 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4004 __gen_field(values->DwordLength, 0, 7) |
4005 0;
4006
4007 dw[1] =
4008 __gen_field(values->ConstantBufferOffset, 16, 20) |
4009 __gen_field(values->ConstantBufferSize, 0, 5) |
4010 0;
4011
4012 }
4013
4014 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length_bias 0x00000002
4015 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS_header\
4016 .CommandType = 3, \
4017 .CommandSubType = 3, \
4018 ._3DCommandOpcode = 1, \
4019 ._3DCommandSubOpcode = 22, \
4020 .DwordLength = 0
4021
4022 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length 0x00000002
4023
4024 struct GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS {
4025 uint32_t CommandType;
4026 uint32_t CommandSubType;
4027 uint32_t _3DCommandOpcode;
4028 uint32_t _3DCommandSubOpcode;
4029 uint32_t DwordLength;
4030 uint32_t ConstantBufferOffset;
4031 uint32_t ConstantBufferSize;
4032 };
4033
4034 static inline void
4035 GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS_pack(__gen_user_data *data, void * restrict dst,
4036 const struct GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS * restrict values)
4037 {
4038 uint32_t *dw = (uint32_t * restrict) dst;
4039
4040 dw[0] =
4041 __gen_field(values->CommandType, 29, 31) |
4042 __gen_field(values->CommandSubType, 27, 28) |
4043 __gen_field(values->_3DCommandOpcode, 24, 26) |
4044 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4045 __gen_field(values->DwordLength, 0, 7) |
4046 0;
4047
4048 dw[1] =
4049 __gen_field(values->ConstantBufferOffset, 16, 20) |
4050 __gen_field(values->ConstantBufferSize, 0, 5) |
4051 0;
4052
4053 }
4054
4055 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length_bias 0x00000002
4056 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS_header\
4057 .CommandType = 3, \
4058 .CommandSubType = 3, \
4059 ._3DCommandOpcode = 1, \
4060 ._3DCommandSubOpcode = 18, \
4061 .DwordLength = 0
4062
4063 #define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length 0x00000002
4064
4065 struct GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS {
4066 uint32_t CommandType;
4067 uint32_t CommandSubType;
4068 uint32_t _3DCommandOpcode;
4069 uint32_t _3DCommandSubOpcode;
4070 uint32_t DwordLength;
4071 uint32_t ConstantBufferOffset;
4072 uint32_t ConstantBufferSize;
4073 };
4074
4075 static inline void
4076 GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS_pack(__gen_user_data *data, void * restrict dst,
4077 const struct GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS * restrict values)
4078 {
4079 uint32_t *dw = (uint32_t * restrict) dst;
4080
4081 dw[0] =
4082 __gen_field(values->CommandType, 29, 31) |
4083 __gen_field(values->CommandSubType, 27, 28) |
4084 __gen_field(values->_3DCommandOpcode, 24, 26) |
4085 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4086 __gen_field(values->DwordLength, 0, 7) |
4087 0;
4088
4089 dw[1] =
4090 __gen_field(values->ConstantBufferOffset, 16, 20) |
4091 __gen_field(values->ConstantBufferSize, 0, 5) |
4092 0;
4093
4094 }
4095
4096 #define GEN9_3DSTATE_RASTER_length_bias 0x00000002
4097 #define GEN9_3DSTATE_RASTER_header \
4098 .CommandType = 3, \
4099 .CommandSubType = 3, \
4100 ._3DCommandOpcode = 0, \
4101 ._3DCommandSubOpcode = 80, \
4102 .DwordLength = 3
4103
4104 #define GEN9_3DSTATE_RASTER_length 0x00000005
4105
4106 struct GEN9_3DSTATE_RASTER {
4107 uint32_t CommandType;
4108 uint32_t CommandSubType;
4109 uint32_t _3DCommandOpcode;
4110 uint32_t _3DCommandSubOpcode;
4111 uint32_t DwordLength;
4112 bool ViewportZFarClipTestEnable;
4113 bool ConservativeRasterizationEnable;
4114 #define DX9OGL 0
4115 #define DX100 1
4116 #define DX101 2
4117 uint32_t APIMode;
4118 #define Clockwise 0
4119 #define CounterClockwise 1
4120 uint32_t FrontWinding;
4121 #define FSC_NUMRASTSAMPLES_0 0
4122 #define FSC_NUMRASTSAMPLES_1 1
4123 #define FSC_NUMRASTSAMPLES_2 2
4124 #define FSC_NUMRASTSAMPLES_4 3
4125 #define FSC_NUMRASTSAMPLES_8 4
4126 #define FSC_NUMRASTSAMPLES_16 5
4127 uint32_t ForcedSampleCount;
4128 #define CULLMODE_BOTH 0
4129 #define CULLMODE_NONE 1
4130 #define CULLMODE_FRONT 2
4131 #define CULLMODE_BACK 3
4132 uint32_t CullMode;
4133 #define Normal 0
4134 #define Force 1
4135 uint32_t ForceMultisampling;
4136 bool SmoothPointEnable;
4137 bool DXMultisampleRasterizationEnable;
4138 #define MSRASTMODE_OFF_PIXEL 0
4139 #define MSRASTMODE_OFF_PATTERN 1
4140 #define MSRASTMODE_ON_PIXEL 2
4141 #define MSRASTMODE_ON_PATTERN 3
4142 uint32_t DXMultisampleRasterizationMode;
4143 bool GlobalDepthOffsetEnableSolid;
4144 bool GlobalDepthOffsetEnableWireframe;
4145 bool GlobalDepthOffsetEnablePoint;
4146 #define RASTER_SOLID 0
4147 #define RASTER_WIREFRAME 1
4148 #define RASTER_POINT 2
4149 uint32_t FrontFaceFillMode;
4150 #define RASTER_SOLID 0
4151 #define RASTER_WIREFRAME 1
4152 #define RASTER_POINT 2
4153 uint32_t BackFaceFillMode;
4154 bool AntialiasingEnable;
4155 bool ScissorRectangleEnable;
4156 bool ViewportZNearClipTestEnable;
4157 float GlobalDepthOffsetConstant;
4158 float GlobalDepthOffsetScale;
4159 float GlobalDepthOffsetClamp;
4160 };
4161
4162 static inline void
4163 GEN9_3DSTATE_RASTER_pack(__gen_user_data *data, void * restrict dst,
4164 const struct GEN9_3DSTATE_RASTER * restrict values)
4165 {
4166 uint32_t *dw = (uint32_t * restrict) dst;
4167
4168 dw[0] =
4169 __gen_field(values->CommandType, 29, 31) |
4170 __gen_field(values->CommandSubType, 27, 28) |
4171 __gen_field(values->_3DCommandOpcode, 24, 26) |
4172 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4173 __gen_field(values->DwordLength, 0, 7) |
4174 0;
4175
4176 dw[1] =
4177 __gen_field(values->ViewportZFarClipTestEnable, 26, 26) |
4178 __gen_field(values->ConservativeRasterizationEnable, 24, 24) |
4179 __gen_field(values->APIMode, 22, 23) |
4180 __gen_field(values->FrontWinding, 21, 21) |
4181 __gen_field(values->ForcedSampleCount, 18, 20) |
4182 __gen_field(values->CullMode, 16, 17) |
4183 __gen_field(values->ForceMultisampling, 14, 14) |
4184 __gen_field(values->SmoothPointEnable, 13, 13) |
4185 __gen_field(values->DXMultisampleRasterizationEnable, 12, 12) |
4186 __gen_field(values->DXMultisampleRasterizationMode, 10, 11) |
4187 __gen_field(values->GlobalDepthOffsetEnableSolid, 9, 9) |
4188 __gen_field(values->GlobalDepthOffsetEnableWireframe, 8, 8) |
4189 __gen_field(values->GlobalDepthOffsetEnablePoint, 7, 7) |
4190 __gen_field(values->FrontFaceFillMode, 5, 6) |
4191 __gen_field(values->BackFaceFillMode, 3, 4) |
4192 __gen_field(values->AntialiasingEnable, 2, 2) |
4193 __gen_field(values->ScissorRectangleEnable, 1, 1) |
4194 __gen_field(values->ViewportZNearClipTestEnable, 0, 0) |
4195 0;
4196
4197 dw[2] =
4198 __gen_float(values->GlobalDepthOffsetConstant) |
4199 0;
4200
4201 dw[3] =
4202 __gen_float(values->GlobalDepthOffsetScale) |
4203 0;
4204
4205 dw[4] =
4206 __gen_float(values->GlobalDepthOffsetClamp) |
4207 0;
4208
4209 }
4210
4211 #define GEN9_3DSTATE_RS_CONSTANT_POINTER_length_bias 0x00000002
4212 #define GEN9_3DSTATE_RS_CONSTANT_POINTER_header \
4213 .CommandType = 3, \
4214 .CommandSubType = 3, \
4215 ._3DCommandOpcode = 0, \
4216 ._3DCommandSubOpcode = 84, \
4217 .DwordLength = 2
4218
4219 #define GEN9_3DSTATE_RS_CONSTANT_POINTER_length 0x00000004
4220
4221 struct GEN9_3DSTATE_RS_CONSTANT_POINTER {
4222 uint32_t CommandType;
4223 uint32_t CommandSubType;
4224 uint32_t _3DCommandOpcode;
4225 uint32_t _3DCommandSubOpcode;
4226 uint32_t DwordLength;
4227 #define VS 0
4228 #define PS 4
4229 uint32_t ShaderSelect;
4230 #define RS_STORE 0
4231 #define RS_LOAD 1
4232 uint32_t OperationLoadorStore;
4233 __gen_address_type GlobalConstantBufferAddress;
4234 __gen_address_type GlobalConstantBufferAddressHigh;
4235 };
4236
4237 static inline void
4238 GEN9_3DSTATE_RS_CONSTANT_POINTER_pack(__gen_user_data *data, void * restrict dst,
4239 const struct GEN9_3DSTATE_RS_CONSTANT_POINTER * restrict values)
4240 {
4241 uint32_t *dw = (uint32_t * restrict) dst;
4242
4243 dw[0] =
4244 __gen_field(values->CommandType, 29, 31) |
4245 __gen_field(values->CommandSubType, 27, 28) |
4246 __gen_field(values->_3DCommandOpcode, 24, 26) |
4247 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4248 __gen_field(values->DwordLength, 0, 7) |
4249 0;
4250
4251 dw[1] =
4252 __gen_field(values->ShaderSelect, 28, 30) |
4253 __gen_field(values->OperationLoadorStore, 12, 12) |
4254 0;
4255
4256 uint32_t dw2 =
4257 0;
4258
4259 dw[2] =
4260 __gen_combine_address(data, &dw[2], values->GlobalConstantBufferAddress, dw2);
4261
4262 uint32_t dw3 =
4263 0;
4264
4265 dw[3] =
4266 __gen_combine_address(data, &dw[3], values->GlobalConstantBufferAddressHigh, dw3);
4267
4268 }
4269
4270 #define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0_length_bias 0x00000002
4271 #define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0_header\
4272 .CommandType = 3, \
4273 .CommandSubType = 3, \
4274 ._3DCommandOpcode = 1, \
4275 ._3DCommandSubOpcode = 2
4276
4277 #define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0_length 0x00000000
4278
4279 #define GEN9_PALETTE_ENTRY_length 0x00000001
4280
4281 struct GEN9_PALETTE_ENTRY {
4282 uint32_t Alpha;
4283 uint32_t Red;
4284 uint32_t Green;
4285 uint32_t Blue;
4286 };
4287
4288 static inline void
4289 GEN9_PALETTE_ENTRY_pack(__gen_user_data *data, void * restrict dst,
4290 const struct GEN9_PALETTE_ENTRY * restrict values)
4291 {
4292 uint32_t *dw = (uint32_t * restrict) dst;
4293
4294 dw[0] =
4295 __gen_field(values->Alpha, 24, 31) |
4296 __gen_field(values->Red, 16, 23) |
4297 __gen_field(values->Green, 8, 15) |
4298 __gen_field(values->Blue, 0, 7) |
4299 0;
4300
4301 }
4302
4303 struct GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0 {
4304 uint32_t CommandType;
4305 uint32_t CommandSubType;
4306 uint32_t _3DCommandOpcode;
4307 uint32_t _3DCommandSubOpcode;
4308 uint32_t DwordLength;
4309 /* variable length fields follow */
4310 };
4311
4312 static inline void
4313 GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0_pack(__gen_user_data *data, void * restrict dst,
4314 const struct GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0 * restrict values)
4315 {
4316 uint32_t *dw = (uint32_t * restrict) dst;
4317
4318 dw[0] =
4319 __gen_field(values->CommandType, 29, 31) |
4320 __gen_field(values->CommandSubType, 27, 28) |
4321 __gen_field(values->_3DCommandOpcode, 24, 26) |
4322 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4323 __gen_field(values->DwordLength, 0, 7) |
4324 0;
4325
4326 /* variable length fields follow */
4327 }
4328
4329 #define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_length_bias 0x00000002
4330 #define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_header\
4331 .CommandType = 3, \
4332 .CommandSubType = 3, \
4333 ._3DCommandOpcode = 1, \
4334 ._3DCommandSubOpcode = 12
4335
4336 #define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_length 0x00000000
4337
4338 struct GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1 {
4339 uint32_t CommandType;
4340 uint32_t CommandSubType;
4341 uint32_t _3DCommandOpcode;
4342 uint32_t _3DCommandSubOpcode;
4343 uint32_t DwordLength;
4344 /* variable length fields follow */
4345 };
4346
4347 static inline void
4348 GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_pack(__gen_user_data *data, void * restrict dst,
4349 const struct GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1 * restrict values)
4350 {
4351 uint32_t *dw = (uint32_t * restrict) dst;
4352
4353 dw[0] =
4354 __gen_field(values->CommandType, 29, 31) |
4355 __gen_field(values->CommandSubType, 27, 28) |
4356 __gen_field(values->_3DCommandOpcode, 24, 26) |
4357 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4358 __gen_field(values->DwordLength, 0, 7) |
4359 0;
4360
4361 /* variable length fields follow */
4362 }
4363
4364 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS_length_bias 0x00000002
4365 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS_header\
4366 .CommandType = 3, \
4367 .CommandSubType = 3, \
4368 ._3DCommandOpcode = 0, \
4369 ._3DCommandSubOpcode = 45, \
4370 .DwordLength = 0
4371
4372 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS_length 0x00000002
4373
4374 struct GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS {
4375 uint32_t CommandType;
4376 uint32_t CommandSubType;
4377 uint32_t _3DCommandOpcode;
4378 uint32_t _3DCommandSubOpcode;
4379 uint32_t DwordLength;
4380 uint32_t PointertoDSSamplerState;
4381 };
4382
4383 static inline void
4384 GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS_pack(__gen_user_data *data, void * restrict dst,
4385 const struct GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS * restrict values)
4386 {
4387 uint32_t *dw = (uint32_t * restrict) dst;
4388
4389 dw[0] =
4390 __gen_field(values->CommandType, 29, 31) |
4391 __gen_field(values->CommandSubType, 27, 28) |
4392 __gen_field(values->_3DCommandOpcode, 24, 26) |
4393 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4394 __gen_field(values->DwordLength, 0, 7) |
4395 0;
4396
4397 dw[1] =
4398 __gen_offset(values->PointertoDSSamplerState, 5, 31) |
4399 0;
4400
4401 }
4402
4403 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS_length_bias 0x00000002
4404 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS_header\
4405 .CommandType = 3, \
4406 .CommandSubType = 3, \
4407 ._3DCommandOpcode = 0, \
4408 ._3DCommandSubOpcode = 46, \
4409 .DwordLength = 0
4410
4411 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS_length 0x00000002
4412
4413 struct GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS {
4414 uint32_t CommandType;
4415 uint32_t CommandSubType;
4416 uint32_t _3DCommandOpcode;
4417 uint32_t _3DCommandSubOpcode;
4418 uint32_t DwordLength;
4419 uint32_t PointertoGSSamplerState;
4420 };
4421
4422 static inline void
4423 GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS_pack(__gen_user_data *data, void * restrict dst,
4424 const struct GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS * restrict values)
4425 {
4426 uint32_t *dw = (uint32_t * restrict) dst;
4427
4428 dw[0] =
4429 __gen_field(values->CommandType, 29, 31) |
4430 __gen_field(values->CommandSubType, 27, 28) |
4431 __gen_field(values->_3DCommandOpcode, 24, 26) |
4432 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4433 __gen_field(values->DwordLength, 0, 7) |
4434 0;
4435
4436 dw[1] =
4437 __gen_offset(values->PointertoGSSamplerState, 5, 31) |
4438 0;
4439
4440 }
4441
4442 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS_length_bias 0x00000002
4443 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS_header\
4444 .CommandType = 3, \
4445 .CommandSubType = 3, \
4446 ._3DCommandOpcode = 0, \
4447 ._3DCommandSubOpcode = 44, \
4448 .DwordLength = 0
4449
4450 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS_length 0x00000002
4451
4452 struct GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS {
4453 uint32_t CommandType;
4454 uint32_t CommandSubType;
4455 uint32_t _3DCommandOpcode;
4456 uint32_t _3DCommandSubOpcode;
4457 uint32_t DwordLength;
4458 uint32_t PointertoHSSamplerState;
4459 };
4460
4461 static inline void
4462 GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS_pack(__gen_user_data *data, void * restrict dst,
4463 const struct GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS * restrict values)
4464 {
4465 uint32_t *dw = (uint32_t * restrict) dst;
4466
4467 dw[0] =
4468 __gen_field(values->CommandType, 29, 31) |
4469 __gen_field(values->CommandSubType, 27, 28) |
4470 __gen_field(values->_3DCommandOpcode, 24, 26) |
4471 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4472 __gen_field(values->DwordLength, 0, 7) |
4473 0;
4474
4475 dw[1] =
4476 __gen_offset(values->PointertoHSSamplerState, 5, 31) |
4477 0;
4478
4479 }
4480
4481 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS_length_bias 0x00000002
4482 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS_header\
4483 .CommandType = 3, \
4484 .CommandSubType = 3, \
4485 ._3DCommandOpcode = 0, \
4486 ._3DCommandSubOpcode = 47, \
4487 .DwordLength = 0
4488
4489 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS_length 0x00000002
4490
4491 struct GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS {
4492 uint32_t CommandType;
4493 uint32_t CommandSubType;
4494 uint32_t _3DCommandOpcode;
4495 uint32_t _3DCommandSubOpcode;
4496 uint32_t DwordLength;
4497 uint32_t PointertoPSSamplerState;
4498 };
4499
4500 static inline void
4501 GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS_pack(__gen_user_data *data, void * restrict dst,
4502 const struct GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS * restrict values)
4503 {
4504 uint32_t *dw = (uint32_t * restrict) dst;
4505
4506 dw[0] =
4507 __gen_field(values->CommandType, 29, 31) |
4508 __gen_field(values->CommandSubType, 27, 28) |
4509 __gen_field(values->_3DCommandOpcode, 24, 26) |
4510 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4511 __gen_field(values->DwordLength, 0, 7) |
4512 0;
4513
4514 dw[1] =
4515 __gen_offset(values->PointertoPSSamplerState, 5, 31) |
4516 0;
4517
4518 }
4519
4520 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS_length_bias 0x00000002
4521 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS_header\
4522 .CommandType = 3, \
4523 .CommandSubType = 3, \
4524 ._3DCommandOpcode = 0, \
4525 ._3DCommandSubOpcode = 43, \
4526 .DwordLength = 0
4527
4528 #define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS_length 0x00000002
4529
4530 struct GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS {
4531 uint32_t CommandType;
4532 uint32_t CommandSubType;
4533 uint32_t _3DCommandOpcode;
4534 uint32_t _3DCommandSubOpcode;
4535 uint32_t DwordLength;
4536 uint32_t PointertoVSSamplerState;
4537 };
4538
4539 static inline void
4540 GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS_pack(__gen_user_data *data, void * restrict dst,
4541 const struct GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS * restrict values)
4542 {
4543 uint32_t *dw = (uint32_t * restrict) dst;
4544
4545 dw[0] =
4546 __gen_field(values->CommandType, 29, 31) |
4547 __gen_field(values->CommandSubType, 27, 28) |
4548 __gen_field(values->_3DCommandOpcode, 24, 26) |
4549 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4550 __gen_field(values->DwordLength, 0, 7) |
4551 0;
4552
4553 dw[1] =
4554 __gen_offset(values->PointertoVSSamplerState, 5, 31) |
4555 0;
4556
4557 }
4558
4559 #define GEN9_3DSTATE_SAMPLE_MASK_length_bias 0x00000002
4560 #define GEN9_3DSTATE_SAMPLE_MASK_header \
4561 .CommandType = 3, \
4562 .CommandSubType = 3, \
4563 ._3DCommandOpcode = 0, \
4564 ._3DCommandSubOpcode = 24, \
4565 .DwordLength = 0
4566
4567 #define GEN9_3DSTATE_SAMPLE_MASK_length 0x00000002
4568
4569 struct GEN9_3DSTATE_SAMPLE_MASK {
4570 uint32_t CommandType;
4571 uint32_t CommandSubType;
4572 uint32_t _3DCommandOpcode;
4573 uint32_t _3DCommandSubOpcode;
4574 uint32_t DwordLength;
4575 uint32_t SampleMask;
4576 };
4577
4578 static inline void
4579 GEN9_3DSTATE_SAMPLE_MASK_pack(__gen_user_data *data, void * restrict dst,
4580 const struct GEN9_3DSTATE_SAMPLE_MASK * restrict values)
4581 {
4582 uint32_t *dw = (uint32_t * restrict) dst;
4583
4584 dw[0] =
4585 __gen_field(values->CommandType, 29, 31) |
4586 __gen_field(values->CommandSubType, 27, 28) |
4587 __gen_field(values->_3DCommandOpcode, 24, 26) |
4588 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4589 __gen_field(values->DwordLength, 0, 7) |
4590 0;
4591
4592 dw[1] =
4593 __gen_field(values->SampleMask, 0, 15) |
4594 0;
4595
4596 }
4597
4598 #define GEN9_3DSTATE_SAMPLE_PATTERN_length_bias 0x00000002
4599 #define GEN9_3DSTATE_SAMPLE_PATTERN_header \
4600 .CommandType = 3, \
4601 .CommandSubType = 3, \
4602 ._3DCommandOpcode = 1, \
4603 ._3DCommandSubOpcode = 28, \
4604 .DwordLength = 7
4605
4606 #define GEN9_3DSTATE_SAMPLE_PATTERN_length 0x00000009
4607
4608 struct GEN9_3DSTATE_SAMPLE_PATTERN {
4609 uint32_t CommandType;
4610 uint32_t CommandSubType;
4611 uint32_t _3DCommandOpcode;
4612 uint32_t _3DCommandSubOpcode;
4613 uint32_t DwordLength;
4614 float _16xSample3XOffset;
4615 float _16xSample3YOffset;
4616 float _16xSample2XOffset;
4617 float _16xSample2YOffset;
4618 float _16xSample1XOffset;
4619 float _16xSample1YOffset;
4620 float _16xSample0XOffset;
4621 float _16xSample0YOffset;
4622 float _16xSample7XOffset;
4623 float _16xSample7YOffset;
4624 float _16xSample6XOffset;
4625 float _16xSample6YOffset;
4626 float _16xSample5XOffset;
4627 float _16xSample5YOffset;
4628 float _16xSample4XOffset;
4629 float _16xSample4YOffset;
4630 float _16xSample11XOffset;
4631 float _16xSample11YOffset;
4632 float _16xSample10XOffset;
4633 float _16xSample10YOffset;
4634 float _16xSample9XOffset;
4635 float _16xSample9YOffset;
4636 float _16xSample8XOffset;
4637 float _16xSample8YOffset;
4638 float _16xSample15XOffset;
4639 float _16xSample15YOffset;
4640 float _16xSample14XOffset;
4641 float _16xSample14YOffset;
4642 float _16xSample13XOffset;
4643 float _16xSample13YOffset;
4644 float _16xSample12XOffset;
4645 float _16xSample12YOffset;
4646 float _8xSample7XOffset;
4647 float _8xSample7YOffset;
4648 float _8xSample6XOffset;
4649 float _8xSample6YOffset;
4650 float _8xSample5XOffset;
4651 float _8xSample5YOffset;
4652 float _8xSample4XOffset;
4653 float _8xSample4YOffset;
4654 float _8xSample3XOffset;
4655 float _8xSample3YOffset;
4656 float _8xSample2XOffset;
4657 float _8xSample2YOffset;
4658 float _8xSample1XOffset;
4659 float _8xSample1YOffset;
4660 float _8xSample0XOffset;
4661 float _8xSample0YOffset;
4662 float _4xSample3XOffset;
4663 float _4xSample3YOffset;
4664 float _4xSample2XOffset;
4665 float _4xSample2YOffset;
4666 float _4xSample1XOffset;
4667 float _4xSample1YOffset;
4668 float _4xSample0XOffset;
4669 float _4xSample0YOffset;
4670 float _1xSample0XOffset;
4671 float _1xSample0YOffset;
4672 float _2xSample1XOffset;
4673 float _2xSample1YOffset;
4674 float _2xSample0XOffset;
4675 float _2xSample0YOffset;
4676 };
4677
4678 static inline void
4679 GEN9_3DSTATE_SAMPLE_PATTERN_pack(__gen_user_data *data, void * restrict dst,
4680 const struct GEN9_3DSTATE_SAMPLE_PATTERN * restrict values)
4681 {
4682 uint32_t *dw = (uint32_t * restrict) dst;
4683
4684 dw[0] =
4685 __gen_field(values->CommandType, 29, 31) |
4686 __gen_field(values->CommandSubType, 27, 28) |
4687 __gen_field(values->_3DCommandOpcode, 24, 26) |
4688 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4689 __gen_field(values->DwordLength, 0, 7) |
4690 0;
4691
4692 dw[1] =
4693 __gen_field(values->_16xSample3XOffset * (1 << 4), 28, 31) |
4694 __gen_field(values->_16xSample3YOffset * (1 << 4), 24, 27) |
4695 __gen_field(values->_16xSample2XOffset * (1 << 4), 20, 23) |
4696 __gen_field(values->_16xSample2YOffset * (1 << 4), 16, 19) |
4697 __gen_field(values->_16xSample1XOffset * (1 << 4), 12, 15) |
4698 __gen_field(values->_16xSample1YOffset * (1 << 4), 8, 11) |
4699 __gen_field(values->_16xSample0XOffset * (1 << 4), 4, 7) |
4700 __gen_field(values->_16xSample0YOffset * (1 << 4), 0, 3) |
4701 0;
4702
4703 dw[2] =
4704 __gen_field(values->_16xSample7XOffset * (1 << 4), 28, 31) |
4705 __gen_field(values->_16xSample7YOffset * (1 << 4), 24, 27) |
4706 __gen_field(values->_16xSample6XOffset * (1 << 4), 20, 23) |
4707 __gen_field(values->_16xSample6YOffset * (1 << 4), 16, 19) |
4708 __gen_field(values->_16xSample5XOffset * (1 << 4), 12, 15) |
4709 __gen_field(values->_16xSample5YOffset * (1 << 4), 8, 11) |
4710 __gen_field(values->_16xSample4XOffset * (1 << 4), 4, 7) |
4711 __gen_field(values->_16xSample4YOffset * (1 << 4), 0, 3) |
4712 0;
4713
4714 dw[3] =
4715 __gen_field(values->_16xSample11XOffset * (1 << 4), 28, 31) |
4716 __gen_field(values->_16xSample11YOffset * (1 << 4), 24, 27) |
4717 __gen_field(values->_16xSample10XOffset * (1 << 4), 20, 23) |
4718 __gen_field(values->_16xSample10YOffset * (1 << 4), 16, 19) |
4719 __gen_field(values->_16xSample9XOffset * (1 << 4), 12, 15) |
4720 __gen_field(values->_16xSample9YOffset * (1 << 4), 8, 11) |
4721 __gen_field(values->_16xSample8XOffset * (1 << 4), 4, 7) |
4722 __gen_field(values->_16xSample8YOffset * (1 << 4), 0, 3) |
4723 0;
4724
4725 dw[4] =
4726 __gen_field(values->_16xSample15XOffset * (1 << 4), 28, 31) |
4727 __gen_field(values->_16xSample15YOffset * (1 << 4), 24, 27) |
4728 __gen_field(values->_16xSample14XOffset * (1 << 4), 20, 23) |
4729 __gen_field(values->_16xSample14YOffset * (1 << 4), 16, 19) |
4730 __gen_field(values->_16xSample13XOffset * (1 << 4), 12, 15) |
4731 __gen_field(values->_16xSample13YOffset * (1 << 4), 8, 11) |
4732 __gen_field(values->_16xSample12XOffset * (1 << 4), 4, 7) |
4733 __gen_field(values->_16xSample12YOffset * (1 << 4), 0, 3) |
4734 0;
4735
4736 dw[5] =
4737 __gen_field(values->_8xSample7XOffset * (1 << 4), 28, 31) |
4738 __gen_field(values->_8xSample7YOffset * (1 << 4), 24, 27) |
4739 __gen_field(values->_8xSample6XOffset * (1 << 4), 20, 23) |
4740 __gen_field(values->_8xSample6YOffset * (1 << 4), 16, 19) |
4741 __gen_field(values->_8xSample5XOffset * (1 << 4), 12, 15) |
4742 __gen_field(values->_8xSample5YOffset * (1 << 4), 8, 11) |
4743 __gen_field(values->_8xSample4XOffset * (1 << 4), 4, 7) |
4744 __gen_field(values->_8xSample4YOffset * (1 << 4), 0, 3) |
4745 0;
4746
4747 dw[6] =
4748 __gen_field(values->_8xSample3XOffset * (1 << 4), 28, 31) |
4749 __gen_field(values->_8xSample3YOffset * (1 << 4), 24, 27) |
4750 __gen_field(values->_8xSample2XOffset * (1 << 4), 20, 23) |
4751 __gen_field(values->_8xSample2YOffset * (1 << 4), 16, 19) |
4752 __gen_field(values->_8xSample1XOffset * (1 << 4), 12, 15) |
4753 __gen_field(values->_8xSample1YOffset * (1 << 4), 8, 11) |
4754 __gen_field(values->_8xSample0XOffset * (1 << 4), 4, 7) |
4755 __gen_field(values->_8xSample0YOffset * (1 << 4), 0, 3) |
4756 0;
4757
4758 dw[7] =
4759 __gen_field(values->_4xSample3XOffset * (1 << 4), 28, 31) |
4760 __gen_field(values->_4xSample3YOffset * (1 << 4), 24, 27) |
4761 __gen_field(values->_4xSample2XOffset * (1 << 4), 20, 23) |
4762 __gen_field(values->_4xSample2YOffset * (1 << 4), 16, 19) |
4763 __gen_field(values->_4xSample1XOffset * (1 << 4), 12, 15) |
4764 __gen_field(values->_4xSample1YOffset * (1 << 4), 8, 11) |
4765 __gen_field(values->_4xSample0XOffset * (1 << 4), 4, 7) |
4766 __gen_field(values->_4xSample0YOffset * (1 << 4), 0, 3) |
4767 0;
4768
4769 dw[8] =
4770 __gen_field(values->_1xSample0XOffset * (1 << 4), 20, 23) |
4771 __gen_field(values->_1xSample0YOffset * (1 << 4), 16, 19) |
4772 __gen_field(values->_2xSample1XOffset * (1 << 4), 12, 15) |
4773 __gen_field(values->_2xSample1YOffset * (1 << 4), 8, 11) |
4774 __gen_field(values->_2xSample0XOffset * (1 << 4), 4, 7) |
4775 __gen_field(values->_2xSample0YOffset * (1 << 4), 0, 3) |
4776 0;
4777
4778 }
4779
4780 #define GEN9_3DSTATE_SBE_length_bias 0x00000002
4781 #define GEN9_3DSTATE_SBE_header \
4782 .CommandType = 3, \
4783 .CommandSubType = 3, \
4784 ._3DCommandOpcode = 0, \
4785 ._3DCommandSubOpcode = 31, \
4786 .DwordLength = 4
4787
4788 #define GEN9_3DSTATE_SBE_length 0x00000006
4789
4790 struct GEN9_3DSTATE_SBE {
4791 uint32_t CommandType;
4792 uint32_t CommandSubType;
4793 uint32_t _3DCommandOpcode;
4794 uint32_t _3DCommandSubOpcode;
4795 uint32_t DwordLength;
4796 bool ForceVertexURBEntryReadLength;
4797 bool ForceVertexURBEntryReadOffset;
4798 uint32_t NumberofSFOutputAttributes;
4799 bool AttributeSwizzleEnable;
4800 #define UPPERLEFT 0
4801 #define LOWERLEFT 1
4802 uint32_t PointSpriteTextureCoordinateOrigin;
4803 bool PrimitiveIDOverrideComponentW;
4804 bool PrimitiveIDOverrideComponentZ;
4805 bool PrimitiveIDOverrideComponentY;
4806 bool PrimitiveIDOverrideComponentX;
4807 uint32_t VertexURBEntryReadLength;
4808 uint32_t VertexURBEntryReadOffset;
4809 uint32_t PrimitiveIDOverrideAttributeSelect;
4810 uint32_t PointSpriteTextureCoordinateEnable;
4811 uint32_t ConstantInterpolationEnable;
4812 uint32_t Attribute15ActiveComponentFormat;
4813 uint32_t Attribute14ActiveComponentFormat;
4814 uint32_t Attribute13ActiveComponentFormat;
4815 uint32_t Attribute12ActiveComponentFormat;
4816 uint32_t Attribute11ActiveComponentFormat;
4817 uint32_t Attribute10ActiveComponentFormat;
4818 uint32_t Attribute9ActiveComponentFormat;
4819 uint32_t Attribute8ActiveComponentFormat;
4820 uint32_t Attribute7ActiveComponentFormat;
4821 uint32_t Attribute6ActiveComponentFormat;
4822 uint32_t Attribute5ActiveComponentFormat;
4823 uint32_t Attribute4ActiveComponentFormat;
4824 uint32_t Attribute3ActiveComponentFormat;
4825 uint32_t Attribute2ActiveComponentFormat;
4826 uint32_t Attribute1ActiveComponentFormat;
4827 uint32_t Attribute0ActiveComponentFormat;
4828 uint32_t Attribute31ActiveComponentFormat;
4829 uint32_t Attribute30ActiveComponentFormat;
4830 uint32_t Attribute29ActiveComponentFormat;
4831 uint32_t Attribute28ActiveComponentFormat;
4832 uint32_t Attribute27ActiveComponentFormat;
4833 uint32_t Attribute26ActiveComponentFormat;
4834 uint32_t Attribute25ActiveComponentFormat;
4835 uint32_t Attribute24ActiveComponentFormat;
4836 uint32_t Attribute23ActiveComponentFormat;
4837 uint32_t Attribute22ActiveComponentFormat;
4838 uint32_t Attribute21ActiveComponentFormat;
4839 uint32_t Attribute20ActiveComponentFormat;
4840 uint32_t Attribute19ActiveComponentFormat;
4841 uint32_t Attribute18ActiveComponentFormat;
4842 uint32_t Attribute17ActiveComponentFormat;
4843 uint32_t Attribute16ActiveComponentFormat;
4844 };
4845
4846 static inline void
4847 GEN9_3DSTATE_SBE_pack(__gen_user_data *data, void * restrict dst,
4848 const struct GEN9_3DSTATE_SBE * restrict values)
4849 {
4850 uint32_t *dw = (uint32_t * restrict) dst;
4851
4852 dw[0] =
4853 __gen_field(values->CommandType, 29, 31) |
4854 __gen_field(values->CommandSubType, 27, 28) |
4855 __gen_field(values->_3DCommandOpcode, 24, 26) |
4856 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4857 __gen_field(values->DwordLength, 0, 7) |
4858 0;
4859
4860 dw[1] =
4861 __gen_field(values->ForceVertexURBEntryReadLength, 29, 29) |
4862 __gen_field(values->ForceVertexURBEntryReadOffset, 28, 28) |
4863 __gen_field(values->NumberofSFOutputAttributes, 22, 27) |
4864 __gen_field(values->AttributeSwizzleEnable, 21, 21) |
4865 __gen_field(values->PointSpriteTextureCoordinateOrigin, 20, 20) |
4866 __gen_field(values->PrimitiveIDOverrideComponentW, 19, 19) |
4867 __gen_field(values->PrimitiveIDOverrideComponentZ, 18, 18) |
4868 __gen_field(values->PrimitiveIDOverrideComponentY, 17, 17) |
4869 __gen_field(values->PrimitiveIDOverrideComponentX, 16, 16) |
4870 __gen_field(values->VertexURBEntryReadLength, 11, 15) |
4871 __gen_field(values->VertexURBEntryReadOffset, 5, 10) |
4872 __gen_field(values->PrimitiveIDOverrideAttributeSelect, 0, 4) |
4873 0;
4874
4875 dw[2] =
4876 __gen_field(values->PointSpriteTextureCoordinateEnable, 0, 31) |
4877 0;
4878
4879 dw[3] =
4880 __gen_field(values->ConstantInterpolationEnable, 0, 31) |
4881 0;
4882
4883 dw[4] =
4884 __gen_field(values->Attribute15ActiveComponentFormat, 30, 31) |
4885 __gen_field(values->Attribute14ActiveComponentFormat, 28, 29) |
4886 __gen_field(values->Attribute13ActiveComponentFormat, 26, 27) |
4887 __gen_field(values->Attribute12ActiveComponentFormat, 24, 25) |
4888 __gen_field(values->Attribute11ActiveComponentFormat, 22, 23) |
4889 __gen_field(values->Attribute10ActiveComponentFormat, 20, 21) |
4890 __gen_field(values->Attribute9ActiveComponentFormat, 18, 19) |
4891 __gen_field(values->Attribute8ActiveComponentFormat, 16, 17) |
4892 __gen_field(values->Attribute7ActiveComponentFormat, 14, 15) |
4893 __gen_field(values->Attribute6ActiveComponentFormat, 12, 13) |
4894 __gen_field(values->Attribute5ActiveComponentFormat, 10, 11) |
4895 __gen_field(values->Attribute4ActiveComponentFormat, 8, 9) |
4896 __gen_field(values->Attribute3ActiveComponentFormat, 6, 7) |
4897 __gen_field(values->Attribute2ActiveComponentFormat, 4, 5) |
4898 __gen_field(values->Attribute1ActiveComponentFormat, 2, 3) |
4899 __gen_field(values->Attribute0ActiveComponentFormat, 0, 1) |
4900 0;
4901
4902 dw[5] =
4903 __gen_field(values->Attribute31ActiveComponentFormat, 30, 31) |
4904 __gen_field(values->Attribute30ActiveComponentFormat, 28, 29) |
4905 __gen_field(values->Attribute29ActiveComponentFormat, 26, 27) |
4906 __gen_field(values->Attribute28ActiveComponentFormat, 24, 25) |
4907 __gen_field(values->Attribute27ActiveComponentFormat, 22, 23) |
4908 __gen_field(values->Attribute26ActiveComponentFormat, 20, 21) |
4909 __gen_field(values->Attribute25ActiveComponentFormat, 18, 19) |
4910 __gen_field(values->Attribute24ActiveComponentFormat, 16, 17) |
4911 __gen_field(values->Attribute23ActiveComponentFormat, 14, 15) |
4912 __gen_field(values->Attribute22ActiveComponentFormat, 12, 13) |
4913 __gen_field(values->Attribute21ActiveComponentFormat, 10, 11) |
4914 __gen_field(values->Attribute20ActiveComponentFormat, 8, 9) |
4915 __gen_field(values->Attribute19ActiveComponentFormat, 6, 7) |
4916 __gen_field(values->Attribute18ActiveComponentFormat, 4, 5) |
4917 __gen_field(values->Attribute17ActiveComponentFormat, 2, 3) |
4918 __gen_field(values->Attribute16ActiveComponentFormat, 0, 1) |
4919 0;
4920
4921 }
4922
4923 #define GEN9_3DSTATE_SBE_SWIZ_length_bias 0x00000002
4924 #define GEN9_3DSTATE_SBE_SWIZ_header \
4925 .CommandType = 3, \
4926 .CommandSubType = 3, \
4927 ._3DCommandOpcode = 0, \
4928 ._3DCommandSubOpcode = 81, \
4929 .DwordLength = 9
4930
4931 #define GEN9_3DSTATE_SBE_SWIZ_length 0x0000000b
4932
4933 #define GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_length 0x00000001
4934
4935 struct GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL {
4936 bool ComponentOverrideW;
4937 bool ComponentOverrideZ;
4938 bool ComponentOverrideY;
4939 bool ComponentOverrideX;
4940 uint32_t SwizzleControlMode;
4941 #define CONST_0000 0
4942 #define CONST_0001_FLOAT 1
4943 #define CONST_1111_FLOAT 2
4944 #define PRIM_ID 3
4945 uint32_t ConstantSource;
4946 #define INPUTATTR 0
4947 #define INPUTATTR_FACING 1
4948 #define INPUTATTR_W 2
4949 #define INPUTATTR_FACING_W 3
4950 uint32_t SwizzleSelect;
4951 uint32_t SourceAttribute;
4952 };
4953
4954 static inline void
4955 GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(__gen_user_data *data, void * restrict dst,
4956 const struct GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL * restrict values)
4957 {
4958 uint32_t *dw = (uint32_t * restrict) dst;
4959
4960 dw[0] =
4961 __gen_field(values->ComponentOverrideW, 15, 15) |
4962 __gen_field(values->ComponentOverrideZ, 14, 14) |
4963 __gen_field(values->ComponentOverrideY, 13, 13) |
4964 __gen_field(values->ComponentOverrideX, 12, 12) |
4965 __gen_field(values->SwizzleControlMode, 11, 11) |
4966 __gen_field(values->ConstantSource, 9, 10) |
4967 __gen_field(values->SwizzleSelect, 6, 7) |
4968 __gen_field(values->SourceAttribute, 0, 4) |
4969 0;
4970
4971 }
4972
4973 struct GEN9_3DSTATE_SBE_SWIZ {
4974 uint32_t CommandType;
4975 uint32_t CommandSubType;
4976 uint32_t _3DCommandOpcode;
4977 uint32_t _3DCommandSubOpcode;
4978 uint32_t DwordLength;
4979 struct GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL Attribute[16];
4980 uint32_t AttributeWrapShortestEnables[16];
4981 };
4982
4983 static inline void
4984 GEN9_3DSTATE_SBE_SWIZ_pack(__gen_user_data *data, void * restrict dst,
4985 const struct GEN9_3DSTATE_SBE_SWIZ * restrict values)
4986 {
4987 uint32_t *dw = (uint32_t * restrict) dst;
4988
4989 dw[0] =
4990 __gen_field(values->CommandType, 29, 31) |
4991 __gen_field(values->CommandSubType, 27, 28) |
4992 __gen_field(values->_3DCommandOpcode, 24, 26) |
4993 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
4994 __gen_field(values->DwordLength, 0, 7) |
4995 0;
4996
4997 for (uint32_t i = 0, j = 1; i < 16; i += 2, j++) {
4998 uint32_t dw_Attribute0;
4999 GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &dw_Attribute0, &values->Attribute[i + 0]);
5000 uint32_t dw_Attribute1;
5001 GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &dw_Attribute1, &values->Attribute[i + 1]);
5002 dw[j] =
5003 __gen_field(dw_Attribute0, 0, 15) |
5004 __gen_field(dw_Attribute1, 16, 31) |
5005 0;
5006 }
5007
5008 for (uint32_t i = 0, j = 9; i < 16; i += 8, j++) {
5009 dw[j] =
5010 __gen_field(values->AttributeWrapShortestEnables[i + 0], 0, 3) |
5011 __gen_field(values->AttributeWrapShortestEnables[i + 1], 4, 7) |
5012 __gen_field(values->AttributeWrapShortestEnables[i + 2], 8, 11) |
5013 __gen_field(values->AttributeWrapShortestEnables[i + 3], 12, 15) |
5014 __gen_field(values->AttributeWrapShortestEnables[i + 4], 16, 19) |
5015 __gen_field(values->AttributeWrapShortestEnables[i + 5], 20, 23) |
5016 __gen_field(values->AttributeWrapShortestEnables[i + 6], 24, 27) |
5017 __gen_field(values->AttributeWrapShortestEnables[i + 7], 28, 31) |
5018 0;
5019 }
5020
5021 }
5022
5023 #define GEN9_3DSTATE_SCISSOR_STATE_POINTERS_length_bias 0x00000002
5024 #define GEN9_3DSTATE_SCISSOR_STATE_POINTERS_header\
5025 .CommandType = 3, \
5026 .CommandSubType = 3, \
5027 ._3DCommandOpcode = 0, \
5028 ._3DCommandSubOpcode = 15, \
5029 .DwordLength = 0
5030
5031 #define GEN9_3DSTATE_SCISSOR_STATE_POINTERS_length 0x00000002
5032
5033 struct GEN9_3DSTATE_SCISSOR_STATE_POINTERS {
5034 uint32_t CommandType;
5035 uint32_t CommandSubType;
5036 uint32_t _3DCommandOpcode;
5037 uint32_t _3DCommandSubOpcode;
5038 uint32_t DwordLength;
5039 uint32_t ScissorRectPointer;
5040 };
5041
5042 static inline void
5043 GEN9_3DSTATE_SCISSOR_STATE_POINTERS_pack(__gen_user_data *data, void * restrict dst,
5044 const struct GEN9_3DSTATE_SCISSOR_STATE_POINTERS * restrict values)
5045 {
5046 uint32_t *dw = (uint32_t * restrict) dst;
5047
5048 dw[0] =
5049 __gen_field(values->CommandType, 29, 31) |
5050 __gen_field(values->CommandSubType, 27, 28) |
5051 __gen_field(values->_3DCommandOpcode, 24, 26) |
5052 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5053 __gen_field(values->DwordLength, 0, 7) |
5054 0;
5055
5056 dw[1] =
5057 __gen_offset(values->ScissorRectPointer, 5, 31) |
5058 0;
5059
5060 }
5061
5062 #define GEN9_3DSTATE_SF_length_bias 0x00000002
5063 #define GEN9_3DSTATE_SF_header \
5064 .CommandType = 3, \
5065 .CommandSubType = 3, \
5066 ._3DCommandOpcode = 0, \
5067 ._3DCommandSubOpcode = 19, \
5068 .DwordLength = 2
5069
5070 #define GEN9_3DSTATE_SF_length 0x00000004
5071
5072 struct GEN9_3DSTATE_SF {
5073 uint32_t CommandType;
5074 uint32_t CommandSubType;
5075 uint32_t _3DCommandOpcode;
5076 uint32_t _3DCommandSubOpcode;
5077 uint32_t DwordLength;
5078 float LineWidth;
5079 bool LegacyGlobalDepthBiasEnable;
5080 bool StatisticsEnable;
5081 bool ViewportTransformEnable;
5082 #define _05pixels 0
5083 #define _10pixels 1
5084 #define _20pixels 2
5085 #define _40pixels 3
5086 uint32_t LineEndCapAntialiasingRegionWidth;
5087 bool LastPixelEnable;
5088 uint32_t TriangleStripListProvokingVertexSelect;
5089 uint32_t LineStripListProvokingVertexSelect;
5090 uint32_t TriangleFanProvokingVertexSelect;
5091 #define AALINEDISTANCE_TRUE 1
5092 uint32_t AALineDistanceMode;
5093 bool SmoothPointEnable;
5094 uint32_t VertexSubPixelPrecisionSelect;
5095 #define Vertex 0
5096 #define State 1
5097 uint32_t PointWidthSource;
5098 float PointWidth;
5099 };
5100
5101 static inline void
5102 GEN9_3DSTATE_SF_pack(__gen_user_data *data, void * restrict dst,
5103 const struct GEN9_3DSTATE_SF * restrict values)
5104 {
5105 uint32_t *dw = (uint32_t * restrict) dst;
5106
5107 dw[0] =
5108 __gen_field(values->CommandType, 29, 31) |
5109 __gen_field(values->CommandSubType, 27, 28) |
5110 __gen_field(values->_3DCommandOpcode, 24, 26) |
5111 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5112 __gen_field(values->DwordLength, 0, 7) |
5113 0;
5114
5115 dw[1] =
5116 __gen_field(values->LineWidth * (1 << 7), 12, 29) |
5117 __gen_field(values->LegacyGlobalDepthBiasEnable, 11, 11) |
5118 __gen_field(values->StatisticsEnable, 10, 10) |
5119 __gen_field(values->ViewportTransformEnable, 1, 1) |
5120 0;
5121
5122 dw[2] =
5123 __gen_field(values->LineEndCapAntialiasingRegionWidth, 16, 17) |
5124 0;
5125
5126 dw[3] =
5127 __gen_field(values->LastPixelEnable, 31, 31) |
5128 __gen_field(values->TriangleStripListProvokingVertexSelect, 29, 30) |
5129 __gen_field(values->LineStripListProvokingVertexSelect, 27, 28) |
5130 __gen_field(values->TriangleFanProvokingVertexSelect, 25, 26) |
5131 __gen_field(values->AALineDistanceMode, 14, 14) |
5132 __gen_field(values->SmoothPointEnable, 13, 13) |
5133 __gen_field(values->VertexSubPixelPrecisionSelect, 12, 12) |
5134 __gen_field(values->PointWidthSource, 11, 11) |
5135 __gen_field(values->PointWidth * (1 << 3), 0, 10) |
5136 0;
5137
5138 }
5139
5140 #define GEN9_3DSTATE_SO_BUFFER_length_bias 0x00000002
5141 #define GEN9_3DSTATE_SO_BUFFER_header \
5142 .CommandType = 3, \
5143 .CommandSubType = 3, \
5144 ._3DCommandOpcode = 1, \
5145 ._3DCommandSubOpcode = 24, \
5146 .DwordLength = 6
5147
5148 #define GEN9_3DSTATE_SO_BUFFER_length 0x00000008
5149
5150 struct GEN9_3DSTATE_SO_BUFFER {
5151 uint32_t CommandType;
5152 uint32_t CommandSubType;
5153 uint32_t _3DCommandOpcode;
5154 uint32_t _3DCommandSubOpcode;
5155 uint32_t DwordLength;
5156 bool SOBufferEnable;
5157 uint32_t SOBufferIndex;
5158 struct GEN9_MEMORY_OBJECT_CONTROL_STATE SOBufferObjectControlState;
5159 bool StreamOffsetWriteEnable;
5160 bool StreamOutputBufferOffsetAddressEnable;
5161 __gen_address_type SurfaceBaseAddress;
5162 uint32_t SurfaceSize;
5163 __gen_address_type StreamOutputBufferOffsetAddress;
5164 uint32_t StreamOffset;
5165 };
5166
5167 static inline void
5168 GEN9_3DSTATE_SO_BUFFER_pack(__gen_user_data *data, void * restrict dst,
5169 const struct GEN9_3DSTATE_SO_BUFFER * restrict values)
5170 {
5171 uint32_t *dw = (uint32_t * restrict) dst;
5172
5173 dw[0] =
5174 __gen_field(values->CommandType, 29, 31) |
5175 __gen_field(values->CommandSubType, 27, 28) |
5176 __gen_field(values->_3DCommandOpcode, 24, 26) |
5177 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5178 __gen_field(values->DwordLength, 0, 7) |
5179 0;
5180
5181 uint32_t dw_SOBufferObjectControlState;
5182 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_SOBufferObjectControlState, &values->SOBufferObjectControlState);
5183 dw[1] =
5184 __gen_field(values->SOBufferEnable, 31, 31) |
5185 __gen_field(values->SOBufferIndex, 29, 30) |
5186 __gen_field(dw_SOBufferObjectControlState, 22, 28) |
5187 __gen_field(values->StreamOffsetWriteEnable, 21, 21) |
5188 __gen_field(values->StreamOutputBufferOffsetAddressEnable, 20, 20) |
5189 0;
5190
5191 uint32_t dw2 =
5192 0;
5193
5194 uint64_t qw2 =
5195 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
5196
5197 dw[2] = qw2;
5198 dw[3] = qw2 >> 32;
5199
5200 dw[4] =
5201 __gen_field(values->SurfaceSize, 0, 29) |
5202 0;
5203
5204 uint32_t dw5 =
5205 0;
5206
5207 uint64_t qw5 =
5208 __gen_combine_address(data, &dw[5], values->StreamOutputBufferOffsetAddress, dw5);
5209
5210 dw[5] = qw5;
5211 dw[6] = qw5 >> 32;
5212
5213 dw[7] =
5214 __gen_field(values->StreamOffset, 0, 31) |
5215 0;
5216
5217 }
5218
5219 #define GEN9_3DSTATE_SO_DECL_LIST_length_bias 0x00000002
5220 #define GEN9_3DSTATE_SO_DECL_LIST_header \
5221 .CommandType = 3, \
5222 .CommandSubType = 3, \
5223 ._3DCommandOpcode = 1, \
5224 ._3DCommandSubOpcode = 23
5225
5226 #define GEN9_3DSTATE_SO_DECL_LIST_length 0x00000000
5227
5228 #define GEN9_SO_DECL_ENTRY_length 0x00000002
5229
5230 #define GEN9_SO_DECL_length 0x00000001
5231
5232 struct GEN9_SO_DECL {
5233 uint32_t OutputBufferSlot;
5234 uint32_t HoleFlag;
5235 uint32_t RegisterIndex;
5236 uint32_t ComponentMask;
5237 };
5238
5239 static inline void
5240 GEN9_SO_DECL_pack(__gen_user_data *data, void * restrict dst,
5241 const struct GEN9_SO_DECL * restrict values)
5242 {
5243 uint32_t *dw = (uint32_t * restrict) dst;
5244
5245 dw[0] =
5246 __gen_field(values->OutputBufferSlot, 12, 13) |
5247 __gen_field(values->HoleFlag, 11, 11) |
5248 __gen_field(values->RegisterIndex, 4, 9) |
5249 __gen_field(values->ComponentMask, 0, 3) |
5250 0;
5251
5252 }
5253
5254 struct GEN9_SO_DECL_ENTRY {
5255 struct GEN9_SO_DECL Stream3Decl;
5256 struct GEN9_SO_DECL Stream2Decl;
5257 struct GEN9_SO_DECL Stream1Decl;
5258 struct GEN9_SO_DECL Stream0Decl;
5259 };
5260
5261 static inline void
5262 GEN9_SO_DECL_ENTRY_pack(__gen_user_data *data, void * restrict dst,
5263 const struct GEN9_SO_DECL_ENTRY * restrict values)
5264 {
5265 uint32_t *dw = (uint32_t * restrict) dst;
5266
5267 uint32_t dw_Stream3Decl;
5268 GEN9_SO_DECL_pack(data, &dw_Stream3Decl, &values->Stream3Decl);
5269 uint32_t dw_Stream2Decl;
5270 GEN9_SO_DECL_pack(data, &dw_Stream2Decl, &values->Stream2Decl);
5271 uint32_t dw_Stream1Decl;
5272 GEN9_SO_DECL_pack(data, &dw_Stream1Decl, &values->Stream1Decl);
5273 uint32_t dw_Stream0Decl;
5274 GEN9_SO_DECL_pack(data, &dw_Stream0Decl, &values->Stream0Decl);
5275 uint64_t qw0 =
5276 __gen_field(dw_Stream3Decl, 48, 63) |
5277 __gen_field(dw_Stream2Decl, 32, 47) |
5278 __gen_field(dw_Stream1Decl, 16, 31) |
5279 __gen_field(dw_Stream0Decl, 0, 15) |
5280 0;
5281
5282 dw[0] = qw0;
5283 dw[1] = qw0 >> 32;
5284
5285 }
5286
5287 struct GEN9_3DSTATE_SO_DECL_LIST {
5288 uint32_t CommandType;
5289 uint32_t CommandSubType;
5290 uint32_t _3DCommandOpcode;
5291 uint32_t _3DCommandSubOpcode;
5292 uint32_t DwordLength;
5293 uint32_t StreamtoBufferSelects3;
5294 uint32_t StreamtoBufferSelects2;
5295 uint32_t StreamtoBufferSelects1;
5296 uint32_t StreamtoBufferSelects0;
5297 uint32_t NumEntries3;
5298 uint32_t NumEntries2;
5299 uint32_t NumEntries1;
5300 uint32_t NumEntries0;
5301 /* variable length fields follow */
5302 };
5303
5304 static inline void
5305 GEN9_3DSTATE_SO_DECL_LIST_pack(__gen_user_data *data, void * restrict dst,
5306 const struct GEN9_3DSTATE_SO_DECL_LIST * restrict values)
5307 {
5308 uint32_t *dw = (uint32_t * restrict) dst;
5309
5310 dw[0] =
5311 __gen_field(values->CommandType, 29, 31) |
5312 __gen_field(values->CommandSubType, 27, 28) |
5313 __gen_field(values->_3DCommandOpcode, 24, 26) |
5314 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5315 __gen_field(values->DwordLength, 0, 8) |
5316 0;
5317
5318 dw[1] =
5319 __gen_field(values->StreamtoBufferSelects3, 12, 15) |
5320 __gen_field(values->StreamtoBufferSelects2, 8, 11) |
5321 __gen_field(values->StreamtoBufferSelects1, 4, 7) |
5322 __gen_field(values->StreamtoBufferSelects0, 0, 3) |
5323 0;
5324
5325 dw[2] =
5326 __gen_field(values->NumEntries3, 24, 31) |
5327 __gen_field(values->NumEntries2, 16, 23) |
5328 __gen_field(values->NumEntries1, 8, 15) |
5329 __gen_field(values->NumEntries0, 0, 7) |
5330 0;
5331
5332 /* variable length fields follow */
5333 }
5334
5335 #define GEN9_3DSTATE_STENCIL_BUFFER_length_bias 0x00000002
5336 #define GEN9_3DSTATE_STENCIL_BUFFER_header \
5337 .CommandType = 3, \
5338 .CommandSubType = 3, \
5339 ._3DCommandOpcode = 0, \
5340 ._3DCommandSubOpcode = 6, \
5341 .DwordLength = 3
5342
5343 #define GEN9_3DSTATE_STENCIL_BUFFER_length 0x00000005
5344
5345 struct GEN9_3DSTATE_STENCIL_BUFFER {
5346 uint32_t CommandType;
5347 uint32_t CommandSubType;
5348 uint32_t _3DCommandOpcode;
5349 uint32_t _3DCommandSubOpcode;
5350 uint32_t DwordLength;
5351 uint32_t StencilBufferEnable;
5352 struct GEN9_MEMORY_OBJECT_CONTROL_STATE StencilBufferObjectControlState;
5353 uint32_t SurfacePitch;
5354 __gen_address_type SurfaceBaseAddress;
5355 uint32_t SurfaceQPitch;
5356 };
5357
5358 static inline void
5359 GEN9_3DSTATE_STENCIL_BUFFER_pack(__gen_user_data *data, void * restrict dst,
5360 const struct GEN9_3DSTATE_STENCIL_BUFFER * restrict values)
5361 {
5362 uint32_t *dw = (uint32_t * restrict) dst;
5363
5364 dw[0] =
5365 __gen_field(values->CommandType, 29, 31) |
5366 __gen_field(values->CommandSubType, 27, 28) |
5367 __gen_field(values->_3DCommandOpcode, 24, 26) |
5368 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5369 __gen_field(values->DwordLength, 0, 7) |
5370 0;
5371
5372 uint32_t dw_StencilBufferObjectControlState;
5373 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_StencilBufferObjectControlState, &values->StencilBufferObjectControlState);
5374 dw[1] =
5375 __gen_field(values->StencilBufferEnable, 31, 31) |
5376 __gen_field(dw_StencilBufferObjectControlState, 22, 28) |
5377 __gen_field(values->SurfacePitch, 0, 16) |
5378 0;
5379
5380 uint32_t dw2 =
5381 0;
5382
5383 uint64_t qw2 =
5384 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, dw2);
5385
5386 dw[2] = qw2;
5387 dw[3] = qw2 >> 32;
5388
5389 dw[4] =
5390 __gen_field(values->SurfaceQPitch, 0, 14) |
5391 0;
5392
5393 }
5394
5395 #define GEN9_3DSTATE_STREAMOUT_length_bias 0x00000002
5396 #define GEN9_3DSTATE_STREAMOUT_header \
5397 .CommandType = 3, \
5398 .CommandSubType = 3, \
5399 ._3DCommandOpcode = 0, \
5400 ._3DCommandSubOpcode = 30, \
5401 .DwordLength = 3
5402
5403 #define GEN9_3DSTATE_STREAMOUT_length 0x00000005
5404
5405 struct GEN9_3DSTATE_STREAMOUT {
5406 uint32_t CommandType;
5407 uint32_t CommandSubType;
5408 uint32_t _3DCommandOpcode;
5409 uint32_t _3DCommandSubOpcode;
5410 uint32_t DwordLength;
5411 uint32_t SOFunctionEnable;
5412 uint32_t APIRenderingDisable;
5413 uint32_t RenderStreamSelect;
5414 #define LEADING 0
5415 #define TRAILING 1
5416 uint32_t ReorderMode;
5417 bool SOStatisticsEnable;
5418 #define Normal 0
5419 #define Resreved 1
5420 #define Force_Off 2
5421 #define Force_on 3
5422 uint32_t ForceRendering;
5423 uint32_t Stream3VertexReadOffset;
5424 uint32_t Stream3VertexReadLength;
5425 uint32_t Stream2VertexReadOffset;
5426 uint32_t Stream2VertexReadLength;
5427 uint32_t Stream1VertexReadOffset;
5428 uint32_t Stream1VertexReadLength;
5429 uint32_t Stream0VertexReadOffset;
5430 uint32_t Stream0VertexReadLength;
5431 uint32_t Buffer1SurfacePitch;
5432 uint32_t Buffer0SurfacePitch;
5433 uint32_t Buffer3SurfacePitch;
5434 uint32_t Buffer2SurfacePitch;
5435 };
5436
5437 static inline void
5438 GEN9_3DSTATE_STREAMOUT_pack(__gen_user_data *data, void * restrict dst,
5439 const struct GEN9_3DSTATE_STREAMOUT * restrict values)
5440 {
5441 uint32_t *dw = (uint32_t * restrict) dst;
5442
5443 dw[0] =
5444 __gen_field(values->CommandType, 29, 31) |
5445 __gen_field(values->CommandSubType, 27, 28) |
5446 __gen_field(values->_3DCommandOpcode, 24, 26) |
5447 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5448 __gen_field(values->DwordLength, 0, 7) |
5449 0;
5450
5451 dw[1] =
5452 __gen_field(values->SOFunctionEnable, 31, 31) |
5453 __gen_field(values->APIRenderingDisable, 30, 30) |
5454 __gen_field(values->RenderStreamSelect, 27, 28) |
5455 __gen_field(values->ReorderMode, 26, 26) |
5456 __gen_field(values->SOStatisticsEnable, 25, 25) |
5457 __gen_field(values->ForceRendering, 23, 24) |
5458 0;
5459
5460 dw[2] =
5461 __gen_field(values->Stream3VertexReadOffset, 29, 29) |
5462 __gen_field(values->Stream3VertexReadLength, 24, 28) |
5463 __gen_field(values->Stream2VertexReadOffset, 21, 21) |
5464 __gen_field(values->Stream2VertexReadLength, 16, 20) |
5465 __gen_field(values->Stream1VertexReadOffset, 13, 13) |
5466 __gen_field(values->Stream1VertexReadLength, 8, 12) |
5467 __gen_field(values->Stream0VertexReadOffset, 5, 5) |
5468 __gen_field(values->Stream0VertexReadLength, 0, 4) |
5469 0;
5470
5471 dw[3] =
5472 __gen_field(values->Buffer1SurfacePitch, 16, 27) |
5473 __gen_field(values->Buffer0SurfacePitch, 0, 11) |
5474 0;
5475
5476 dw[4] =
5477 __gen_field(values->Buffer3SurfacePitch, 16, 27) |
5478 __gen_field(values->Buffer2SurfacePitch, 0, 11) |
5479 0;
5480
5481 }
5482
5483 #define GEN9_3DSTATE_TE_length_bias 0x00000002
5484 #define GEN9_3DSTATE_TE_header \
5485 .CommandType = 3, \
5486 .CommandSubType = 3, \
5487 ._3DCommandOpcode = 0, \
5488 ._3DCommandSubOpcode = 28, \
5489 .DwordLength = 2
5490
5491 #define GEN9_3DSTATE_TE_length 0x00000004
5492
5493 struct GEN9_3DSTATE_TE {
5494 uint32_t CommandType;
5495 uint32_t CommandSubType;
5496 uint32_t _3DCommandOpcode;
5497 uint32_t _3DCommandSubOpcode;
5498 uint32_t DwordLength;
5499 #define INTEGER 0
5500 #define ODD_FRACTIONAL 1
5501 #define EVEN_FRACTIONAL 2
5502 uint32_t Partitioning;
5503 #define POINT 0
5504 #define OUTPUT_LINE 1
5505 #define OUTPUT_TRI_CW 2
5506 #define OUTPUT_TRI_CCW 3
5507 uint32_t OutputTopology;
5508 #define QUAD 0
5509 #define TRI 1
5510 #define ISOLINE 2
5511 uint32_t TEDomain;
5512 #define HW_TESS 0
5513 uint32_t TEMode;
5514 bool TEEnable;
5515 float MaximumTessellationFactorOdd;
5516 float MaximumTessellationFactorNotOdd;
5517 };
5518
5519 static inline void
5520 GEN9_3DSTATE_TE_pack(__gen_user_data *data, void * restrict dst,
5521 const struct GEN9_3DSTATE_TE * restrict values)
5522 {
5523 uint32_t *dw = (uint32_t * restrict) dst;
5524
5525 dw[0] =
5526 __gen_field(values->CommandType, 29, 31) |
5527 __gen_field(values->CommandSubType, 27, 28) |
5528 __gen_field(values->_3DCommandOpcode, 24, 26) |
5529 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5530 __gen_field(values->DwordLength, 0, 7) |
5531 0;
5532
5533 dw[1] =
5534 __gen_field(values->Partitioning, 12, 13) |
5535 __gen_field(values->OutputTopology, 8, 9) |
5536 __gen_field(values->TEDomain, 4, 5) |
5537 __gen_field(values->TEMode, 1, 2) |
5538 __gen_field(values->TEEnable, 0, 0) |
5539 0;
5540
5541 dw[2] =
5542 __gen_float(values->MaximumTessellationFactorOdd) |
5543 0;
5544
5545 dw[3] =
5546 __gen_float(values->MaximumTessellationFactorNotOdd) |
5547 0;
5548
5549 }
5550
5551 #define GEN9_3DSTATE_URB_CLEAR_length_bias 0x00000002
5552 #define GEN9_3DSTATE_URB_CLEAR_header \
5553 .CommandType = 3, \
5554 .CommandSubType = 3, \
5555 ._3DCommandOpcode = 1, \
5556 ._3DCommandSubOpcode = 29, \
5557 .DwordLength = 0
5558
5559 #define GEN9_3DSTATE_URB_CLEAR_length 0x00000002
5560
5561 struct GEN9_3DSTATE_URB_CLEAR {
5562 uint32_t CommandType;
5563 uint32_t CommandSubType;
5564 uint32_t _3DCommandOpcode;
5565 uint32_t _3DCommandSubOpcode;
5566 uint32_t DwordLength;
5567 uint32_t URBClearLength;
5568 uint32_t URBAddress;
5569 };
5570
5571 static inline void
5572 GEN9_3DSTATE_URB_CLEAR_pack(__gen_user_data *data, void * restrict dst,
5573 const struct GEN9_3DSTATE_URB_CLEAR * restrict values)
5574 {
5575 uint32_t *dw = (uint32_t * restrict) dst;
5576
5577 dw[0] =
5578 __gen_field(values->CommandType, 29, 31) |
5579 __gen_field(values->CommandSubType, 27, 28) |
5580 __gen_field(values->_3DCommandOpcode, 24, 26) |
5581 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5582 __gen_field(values->DwordLength, 0, 7) |
5583 0;
5584
5585 dw[1] =
5586 __gen_field(values->URBClearLength, 16, 29) |
5587 __gen_offset(values->URBAddress, 0, 14) |
5588 0;
5589
5590 }
5591
5592 #define GEN9_3DSTATE_URB_DS_length_bias 0x00000002
5593 #define GEN9_3DSTATE_URB_DS_header \
5594 .CommandType = 3, \
5595 .CommandSubType = 3, \
5596 ._3DCommandOpcode = 0, \
5597 ._3DCommandSubOpcode = 50, \
5598 .DwordLength = 0
5599
5600 #define GEN9_3DSTATE_URB_DS_length 0x00000002
5601
5602 struct GEN9_3DSTATE_URB_DS {
5603 uint32_t CommandType;
5604 uint32_t CommandSubType;
5605 uint32_t _3DCommandOpcode;
5606 uint32_t _3DCommandSubOpcode;
5607 uint32_t DwordLength;
5608 uint32_t DSURBStartingAddress;
5609 uint32_t DSURBEntryAllocationSize;
5610 uint32_t DSNumberofURBEntries;
5611 };
5612
5613 static inline void
5614 GEN9_3DSTATE_URB_DS_pack(__gen_user_data *data, void * restrict dst,
5615 const struct GEN9_3DSTATE_URB_DS * restrict values)
5616 {
5617 uint32_t *dw = (uint32_t * restrict) dst;
5618
5619 dw[0] =
5620 __gen_field(values->CommandType, 29, 31) |
5621 __gen_field(values->CommandSubType, 27, 28) |
5622 __gen_field(values->_3DCommandOpcode, 24, 26) |
5623 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5624 __gen_field(values->DwordLength, 0, 7) |
5625 0;
5626
5627 dw[1] =
5628 __gen_field(values->DSURBStartingAddress, 25, 31) |
5629 __gen_field(values->DSURBEntryAllocationSize, 16, 24) |
5630 __gen_field(values->DSNumberofURBEntries, 0, 15) |
5631 0;
5632
5633 }
5634
5635 #define GEN9_3DSTATE_URB_GS_length_bias 0x00000002
5636 #define GEN9_3DSTATE_URB_GS_header \
5637 .CommandType = 3, \
5638 .CommandSubType = 3, \
5639 ._3DCommandOpcode = 0, \
5640 ._3DCommandSubOpcode = 51, \
5641 .DwordLength = 0
5642
5643 #define GEN9_3DSTATE_URB_GS_length 0x00000002
5644
5645 struct GEN9_3DSTATE_URB_GS {
5646 uint32_t CommandType;
5647 uint32_t CommandSubType;
5648 uint32_t _3DCommandOpcode;
5649 uint32_t _3DCommandSubOpcode;
5650 uint32_t DwordLength;
5651 uint32_t GSURBStartingAddress;
5652 uint32_t GSURBEntryAllocationSize;
5653 uint32_t GSNumberofURBEntries;
5654 };
5655
5656 static inline void
5657 GEN9_3DSTATE_URB_GS_pack(__gen_user_data *data, void * restrict dst,
5658 const struct GEN9_3DSTATE_URB_GS * restrict values)
5659 {
5660 uint32_t *dw = (uint32_t * restrict) dst;
5661
5662 dw[0] =
5663 __gen_field(values->CommandType, 29, 31) |
5664 __gen_field(values->CommandSubType, 27, 28) |
5665 __gen_field(values->_3DCommandOpcode, 24, 26) |
5666 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5667 __gen_field(values->DwordLength, 0, 7) |
5668 0;
5669
5670 dw[1] =
5671 __gen_field(values->GSURBStartingAddress, 25, 31) |
5672 __gen_field(values->GSURBEntryAllocationSize, 16, 24) |
5673 __gen_field(values->GSNumberofURBEntries, 0, 15) |
5674 0;
5675
5676 }
5677
5678 #define GEN9_3DSTATE_URB_HS_length_bias 0x00000002
5679 #define GEN9_3DSTATE_URB_HS_header \
5680 .CommandType = 3, \
5681 .CommandSubType = 3, \
5682 ._3DCommandOpcode = 0, \
5683 ._3DCommandSubOpcode = 49, \
5684 .DwordLength = 0
5685
5686 #define GEN9_3DSTATE_URB_HS_length 0x00000002
5687
5688 struct GEN9_3DSTATE_URB_HS {
5689 uint32_t CommandType;
5690 uint32_t CommandSubType;
5691 uint32_t _3DCommandOpcode;
5692 uint32_t _3DCommandSubOpcode;
5693 uint32_t DwordLength;
5694 uint32_t HSURBStartingAddress;
5695 uint32_t HSURBEntryAllocationSize;
5696 uint32_t HSNumberofURBEntries;
5697 };
5698
5699 static inline void
5700 GEN9_3DSTATE_URB_HS_pack(__gen_user_data *data, void * restrict dst,
5701 const struct GEN9_3DSTATE_URB_HS * restrict values)
5702 {
5703 uint32_t *dw = (uint32_t * restrict) dst;
5704
5705 dw[0] =
5706 __gen_field(values->CommandType, 29, 31) |
5707 __gen_field(values->CommandSubType, 27, 28) |
5708 __gen_field(values->_3DCommandOpcode, 24, 26) |
5709 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5710 __gen_field(values->DwordLength, 0, 7) |
5711 0;
5712
5713 dw[1] =
5714 __gen_field(values->HSURBStartingAddress, 25, 31) |
5715 __gen_field(values->HSURBEntryAllocationSize, 16, 24) |
5716 __gen_field(values->HSNumberofURBEntries, 0, 15) |
5717 0;
5718
5719 }
5720
5721 #define GEN9_3DSTATE_VERTEX_BUFFERS_length_bias 0x00000002
5722 #define GEN9_3DSTATE_VERTEX_BUFFERS_header \
5723 .CommandType = 3, \
5724 .CommandSubType = 3, \
5725 ._3DCommandOpcode = 0, \
5726 ._3DCommandSubOpcode = 8
5727
5728 #define GEN9_3DSTATE_VERTEX_BUFFERS_length 0x00000000
5729
5730 #define GEN9_VERTEX_BUFFER_STATE_length 0x00000004
5731
5732 struct GEN9_VERTEX_BUFFER_STATE {
5733 uint32_t VertexBufferIndex;
5734 struct GEN9_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
5735 uint32_t AddressModifyEnable;
5736 bool NullVertexBuffer;
5737 uint32_t BufferPitch;
5738 __gen_address_type BufferStartingAddress;
5739 uint32_t BufferSize;
5740 };
5741
5742 static inline void
5743 GEN9_VERTEX_BUFFER_STATE_pack(__gen_user_data *data, void * restrict dst,
5744 const struct GEN9_VERTEX_BUFFER_STATE * restrict values)
5745 {
5746 uint32_t *dw = (uint32_t * restrict) dst;
5747
5748 uint32_t dw_MemoryObjectControlState;
5749 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
5750 dw[0] =
5751 __gen_field(values->VertexBufferIndex, 26, 31) |
5752 __gen_field(dw_MemoryObjectControlState, 16, 22) |
5753 __gen_field(values->AddressModifyEnable, 14, 14) |
5754 __gen_field(values->NullVertexBuffer, 13, 13) |
5755 __gen_field(values->BufferPitch, 0, 11) |
5756 0;
5757
5758 uint32_t dw1 =
5759 0;
5760
5761 uint64_t qw1 =
5762 __gen_combine_address(data, &dw[1], values->BufferStartingAddress, dw1);
5763
5764 dw[1] = qw1;
5765 dw[2] = qw1 >> 32;
5766
5767 dw[3] =
5768 __gen_field(values->BufferSize, 0, 31) |
5769 0;
5770
5771 }
5772
5773 struct GEN9_3DSTATE_VERTEX_BUFFERS {
5774 uint32_t CommandType;
5775 uint32_t CommandSubType;
5776 uint32_t _3DCommandOpcode;
5777 uint32_t _3DCommandSubOpcode;
5778 uint32_t DwordLength;
5779 /* variable length fields follow */
5780 };
5781
5782 static inline void
5783 GEN9_3DSTATE_VERTEX_BUFFERS_pack(__gen_user_data *data, void * restrict dst,
5784 const struct GEN9_3DSTATE_VERTEX_BUFFERS * restrict values)
5785 {
5786 uint32_t *dw = (uint32_t * restrict) dst;
5787
5788 dw[0] =
5789 __gen_field(values->CommandType, 29, 31) |
5790 __gen_field(values->CommandSubType, 27, 28) |
5791 __gen_field(values->_3DCommandOpcode, 24, 26) |
5792 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5793 __gen_field(values->DwordLength, 0, 7) |
5794 0;
5795
5796 /* variable length fields follow */
5797 }
5798
5799 #define GEN9_3DSTATE_VERTEX_ELEMENTS_length_bias 0x00000002
5800 #define GEN9_3DSTATE_VERTEX_ELEMENTS_header \
5801 .CommandType = 3, \
5802 .CommandSubType = 3, \
5803 ._3DCommandOpcode = 0, \
5804 ._3DCommandSubOpcode = 9
5805
5806 #define GEN9_3DSTATE_VERTEX_ELEMENTS_length 0x00000000
5807
5808 #define GEN9_VERTEX_ELEMENT_STATE_length 0x00000002
5809
5810 struct GEN9_VERTEX_ELEMENT_STATE {
5811 uint32_t VertexBufferIndex;
5812 bool Valid;
5813 uint32_t SourceElementFormat;
5814 bool EdgeFlagEnable;
5815 uint32_t SourceElementOffset;
5816 uint32_t Component0Control;
5817 uint32_t Component1Control;
5818 uint32_t Component2Control;
5819 uint32_t Component3Control;
5820 };
5821
5822 static inline void
5823 GEN9_VERTEX_ELEMENT_STATE_pack(__gen_user_data *data, void * restrict dst,
5824 const struct GEN9_VERTEX_ELEMENT_STATE * restrict values)
5825 {
5826 uint32_t *dw = (uint32_t * restrict) dst;
5827
5828 dw[0] =
5829 __gen_field(values->VertexBufferIndex, 26, 31) |
5830 __gen_field(values->Valid, 25, 25) |
5831 __gen_field(values->SourceElementFormat, 16, 24) |
5832 __gen_field(values->EdgeFlagEnable, 15, 15) |
5833 __gen_field(values->SourceElementOffset, 0, 11) |
5834 0;
5835
5836 dw[1] =
5837 __gen_field(values->Component0Control, 28, 30) |
5838 __gen_field(values->Component1Control, 24, 26) |
5839 __gen_field(values->Component2Control, 20, 22) |
5840 __gen_field(values->Component3Control, 16, 18) |
5841 0;
5842
5843 }
5844
5845 struct GEN9_3DSTATE_VERTEX_ELEMENTS {
5846 uint32_t CommandType;
5847 uint32_t CommandSubType;
5848 uint32_t _3DCommandOpcode;
5849 uint32_t _3DCommandSubOpcode;
5850 uint32_t DwordLength;
5851 /* variable length fields follow */
5852 };
5853
5854 static inline void
5855 GEN9_3DSTATE_VERTEX_ELEMENTS_pack(__gen_user_data *data, void * restrict dst,
5856 const struct GEN9_3DSTATE_VERTEX_ELEMENTS * restrict values)
5857 {
5858 uint32_t *dw = (uint32_t * restrict) dst;
5859
5860 dw[0] =
5861 __gen_field(values->CommandType, 29, 31) |
5862 __gen_field(values->CommandSubType, 27, 28) |
5863 __gen_field(values->_3DCommandOpcode, 24, 26) |
5864 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5865 __gen_field(values->DwordLength, 0, 7) |
5866 0;
5867
5868 /* variable length fields follow */
5869 }
5870
5871 #define GEN9_3DSTATE_VF_length_bias 0x00000002
5872 #define GEN9_3DSTATE_VF_header \
5873 .CommandType = 3, \
5874 .CommandSubType = 3, \
5875 ._3DCommandOpcode = 0, \
5876 ._3DCommandSubOpcode = 12, \
5877 .DwordLength = 0
5878
5879 #define GEN9_3DSTATE_VF_length 0x00000002
5880
5881 struct GEN9_3DSTATE_VF {
5882 uint32_t CommandType;
5883 uint32_t CommandSubType;
5884 uint32_t _3DCommandOpcode;
5885 uint32_t _3DCommandSubOpcode;
5886 bool SequentialDrawCutIndexEnable;
5887 bool ComponentPackingEnable;
5888 bool IndexedDrawCutIndexEnable;
5889 uint32_t DwordLength;
5890 uint32_t CutIndex;
5891 };
5892
5893 static inline void
5894 GEN9_3DSTATE_VF_pack(__gen_user_data *data, void * restrict dst,
5895 const struct GEN9_3DSTATE_VF * restrict values)
5896 {
5897 uint32_t *dw = (uint32_t * restrict) dst;
5898
5899 dw[0] =
5900 __gen_field(values->CommandType, 29, 31) |
5901 __gen_field(values->CommandSubType, 27, 28) |
5902 __gen_field(values->_3DCommandOpcode, 24, 26) |
5903 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5904 __gen_field(values->SequentialDrawCutIndexEnable, 10, 10) |
5905 __gen_field(values->ComponentPackingEnable, 9, 9) |
5906 __gen_field(values->IndexedDrawCutIndexEnable, 8, 8) |
5907 __gen_field(values->DwordLength, 0, 7) |
5908 0;
5909
5910 dw[1] =
5911 __gen_field(values->CutIndex, 0, 31) |
5912 0;
5913
5914 }
5915
5916 #define GEN9_3DSTATE_VF_COMPONENT_PACKING_length_bias 0x00000002
5917 #define GEN9_3DSTATE_VF_COMPONENT_PACKING_header\
5918 .CommandType = 3, \
5919 .CommandSubType = 3, \
5920 ._3DCommandOpcode = 0, \
5921 ._3DCommandSubOpcode = 85, \
5922 .DwordLength = 3
5923
5924 #define GEN9_3DSTATE_VF_COMPONENT_PACKING_length 0x00000005
5925
5926 struct GEN9_3DSTATE_VF_COMPONENT_PACKING {
5927 uint32_t CommandType;
5928 uint32_t CommandSubType;
5929 uint32_t _3DCommandOpcode;
5930 uint32_t _3DCommandSubOpcode;
5931 uint32_t DwordLength;
5932 uint32_t VertexElement07Enables;
5933 uint32_t VertexElement06Enables;
5934 uint32_t VertexElement05Enables;
5935 uint32_t VertexElement04Enables;
5936 uint32_t VertexElement03Enables;
5937 uint32_t VertexElement02Enables;
5938 uint32_t VertexElement01Enables;
5939 uint32_t VertexElement00Enables;
5940 uint32_t VertexElement15Enables;
5941 uint32_t VertexElement14Enables;
5942 uint32_t VertexElement13Enables;
5943 uint32_t VertexElement12Enables;
5944 uint32_t VertexElement11Enables;
5945 uint32_t VertexElement10Enables;
5946 uint32_t VertexElement09Enables;
5947 uint32_t VertexElement08Enables;
5948 uint32_t VertexElement23Enables;
5949 uint32_t VertexElement22Enables;
5950 uint32_t VertexElement21Enables;
5951 uint32_t VertexElement20Enables;
5952 uint32_t VertexElement19Enables;
5953 uint32_t VertexElement18Enables;
5954 uint32_t VertexElement17Enables;
5955 uint32_t VertexElement16Enables;
5956 uint32_t VertexElement31Enables;
5957 uint32_t VertexElement30Enables;
5958 uint32_t VertexElement29Enables;
5959 uint32_t VertexElement28Enables;
5960 uint32_t VertexElement27Enables;
5961 uint32_t VertexElement26Enables;
5962 uint32_t VertexElement25Enables;
5963 uint32_t VertexElement24Enables;
5964 };
5965
5966 static inline void
5967 GEN9_3DSTATE_VF_COMPONENT_PACKING_pack(__gen_user_data *data, void * restrict dst,
5968 const struct GEN9_3DSTATE_VF_COMPONENT_PACKING * restrict values)
5969 {
5970 uint32_t *dw = (uint32_t * restrict) dst;
5971
5972 dw[0] =
5973 __gen_field(values->CommandType, 29, 31) |
5974 __gen_field(values->CommandSubType, 27, 28) |
5975 __gen_field(values->_3DCommandOpcode, 24, 26) |
5976 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
5977 __gen_field(values->DwordLength, 0, 7) |
5978 0;
5979
5980 dw[1] =
5981 __gen_field(values->VertexElement07Enables, 28, 31) |
5982 __gen_field(values->VertexElement06Enables, 24, 27) |
5983 __gen_field(values->VertexElement05Enables, 20, 23) |
5984 __gen_field(values->VertexElement04Enables, 16, 19) |
5985 __gen_field(values->VertexElement03Enables, 12, 15) |
5986 __gen_field(values->VertexElement02Enables, 8, 11) |
5987 __gen_field(values->VertexElement01Enables, 4, 7) |
5988 __gen_field(values->VertexElement00Enables, 0, 3) |
5989 0;
5990
5991 dw[2] =
5992 __gen_field(values->VertexElement15Enables, 28, 31) |
5993 __gen_field(values->VertexElement14Enables, 24, 27) |
5994 __gen_field(values->VertexElement13Enables, 20, 23) |
5995 __gen_field(values->VertexElement12Enables, 16, 19) |
5996 __gen_field(values->VertexElement11Enables, 12, 15) |
5997 __gen_field(values->VertexElement10Enables, 8, 11) |
5998 __gen_field(values->VertexElement09Enables, 4, 7) |
5999 __gen_field(values->VertexElement08Enables, 0, 3) |
6000 0;
6001
6002 dw[3] =
6003 __gen_field(values->VertexElement23Enables, 28, 31) |
6004 __gen_field(values->VertexElement22Enables, 24, 27) |
6005 __gen_field(values->VertexElement21Enables, 20, 23) |
6006 __gen_field(values->VertexElement20Enables, 16, 19) |
6007 __gen_field(values->VertexElement19Enables, 12, 15) |
6008 __gen_field(values->VertexElement18Enables, 8, 11) |
6009 __gen_field(values->VertexElement17Enables, 4, 7) |
6010 __gen_field(values->VertexElement16Enables, 0, 3) |
6011 0;
6012
6013 dw[4] =
6014 __gen_field(values->VertexElement31Enables, 28, 31) |
6015 __gen_field(values->VertexElement30Enables, 24, 27) |
6016 __gen_field(values->VertexElement29Enables, 20, 23) |
6017 __gen_field(values->VertexElement28Enables, 16, 19) |
6018 __gen_field(values->VertexElement27Enables, 12, 15) |
6019 __gen_field(values->VertexElement26Enables, 8, 11) |
6020 __gen_field(values->VertexElement25Enables, 4, 7) |
6021 __gen_field(values->VertexElement24Enables, 0, 3) |
6022 0;
6023
6024 }
6025
6026 #define GEN9_3DSTATE_VF_INSTANCING_length_bias 0x00000002
6027 #define GEN9_3DSTATE_VF_INSTANCING_header \
6028 .CommandType = 3, \
6029 .CommandSubType = 3, \
6030 ._3DCommandOpcode = 0, \
6031 ._3DCommandSubOpcode = 73, \
6032 .DwordLength = 1
6033
6034 #define GEN9_3DSTATE_VF_INSTANCING_length 0x00000003
6035
6036 struct GEN9_3DSTATE_VF_INSTANCING {
6037 uint32_t CommandType;
6038 uint32_t CommandSubType;
6039 uint32_t _3DCommandOpcode;
6040 uint32_t _3DCommandSubOpcode;
6041 uint32_t DwordLength;
6042 bool InstancingEnable;
6043 uint32_t VertexElementIndex;
6044 uint32_t InstanceDataStepRate;
6045 };
6046
6047 static inline void
6048 GEN9_3DSTATE_VF_INSTANCING_pack(__gen_user_data *data, void * restrict dst,
6049 const struct GEN9_3DSTATE_VF_INSTANCING * restrict values)
6050 {
6051 uint32_t *dw = (uint32_t * restrict) dst;
6052
6053 dw[0] =
6054 __gen_field(values->CommandType, 29, 31) |
6055 __gen_field(values->CommandSubType, 27, 28) |
6056 __gen_field(values->_3DCommandOpcode, 24, 26) |
6057 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
6058 __gen_field(values->DwordLength, 0, 7) |
6059 0;
6060
6061 dw[1] =
6062 __gen_field(values->InstancingEnable, 8, 8) |
6063 __gen_field(values->VertexElementIndex, 0, 5) |
6064 0;
6065
6066 dw[2] =
6067 __gen_field(values->InstanceDataStepRate, 0, 31) |
6068 0;
6069
6070 }
6071
6072 #define GEN9_3DSTATE_VF_SGVS_length_bias 0x00000002
6073 #define GEN9_3DSTATE_VF_SGVS_header \
6074 .CommandType = 3, \
6075 .CommandSubType = 3, \
6076 ._3DCommandOpcode = 0, \
6077 ._3DCommandSubOpcode = 74, \
6078 .DwordLength = 0
6079
6080 #define GEN9_3DSTATE_VF_SGVS_length 0x00000002
6081
6082 struct GEN9_3DSTATE_VF_SGVS {
6083 uint32_t CommandType;
6084 uint32_t CommandSubType;
6085 uint32_t _3DCommandOpcode;
6086 uint32_t _3DCommandSubOpcode;
6087 uint32_t DwordLength;
6088 bool InstanceIDEnable;
6089 #define COMP_0 0
6090 #define COMP_1 1
6091 #define COMP_2 2
6092 #define COMP_3 3
6093 uint32_t InstanceIDComponentNumber;
6094 uint32_t InstanceIDElementOffset;
6095 bool VertexIDEnable;
6096 #define COMP_0 0
6097 #define COMP_1 1
6098 #define COMP_2 2
6099 #define COMP_3 3
6100 uint32_t VertexIDComponentNumber;
6101 uint32_t VertexIDElementOffset;
6102 };
6103
6104 static inline void
6105 GEN9_3DSTATE_VF_SGVS_pack(__gen_user_data *data, void * restrict dst,
6106 const struct GEN9_3DSTATE_VF_SGVS * restrict values)
6107 {
6108 uint32_t *dw = (uint32_t * restrict) dst;
6109
6110 dw[0] =
6111 __gen_field(values->CommandType, 29, 31) |
6112 __gen_field(values->CommandSubType, 27, 28) |
6113 __gen_field(values->_3DCommandOpcode, 24, 26) |
6114 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
6115 __gen_field(values->DwordLength, 0, 7) |
6116 0;
6117
6118 dw[1] =
6119 __gen_field(values->InstanceIDEnable, 31, 31) |
6120 __gen_field(values->InstanceIDComponentNumber, 29, 30) |
6121 __gen_field(values->InstanceIDElementOffset, 16, 21) |
6122 __gen_field(values->VertexIDEnable, 15, 15) |
6123 __gen_field(values->VertexIDComponentNumber, 13, 14) |
6124 __gen_field(values->VertexIDElementOffset, 0, 5) |
6125 0;
6126
6127 }
6128
6129 #define GEN9_3DSTATE_VF_STATISTICS_length_bias 0x00000001
6130 #define GEN9_3DSTATE_VF_STATISTICS_header \
6131 .CommandType = 3, \
6132 .CommandSubType = 1, \
6133 ._3DCommandOpcode = 0, \
6134 ._3DCommandSubOpcode = 11
6135
6136 #define GEN9_3DSTATE_VF_STATISTICS_length 0x00000001
6137
6138 struct GEN9_3DSTATE_VF_STATISTICS {
6139 uint32_t CommandType;
6140 uint32_t CommandSubType;
6141 uint32_t _3DCommandOpcode;
6142 uint32_t _3DCommandSubOpcode;
6143 bool StatisticsEnable;
6144 };
6145
6146 static inline void
6147 GEN9_3DSTATE_VF_STATISTICS_pack(__gen_user_data *data, void * restrict dst,
6148 const struct GEN9_3DSTATE_VF_STATISTICS * restrict values)
6149 {
6150 uint32_t *dw = (uint32_t * restrict) dst;
6151
6152 dw[0] =
6153 __gen_field(values->CommandType, 29, 31) |
6154 __gen_field(values->CommandSubType, 27, 28) |
6155 __gen_field(values->_3DCommandOpcode, 24, 26) |
6156 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
6157 __gen_field(values->StatisticsEnable, 0, 0) |
6158 0;
6159
6160 }
6161
6162 #define GEN9_3DSTATE_VF_TOPOLOGY_length_bias 0x00000002
6163 #define GEN9_3DSTATE_VF_TOPOLOGY_header \
6164 .CommandType = 3, \
6165 .CommandSubType = 3, \
6166 ._3DCommandOpcode = 0, \
6167 ._3DCommandSubOpcode = 75, \
6168 .DwordLength = 0
6169
6170 #define GEN9_3DSTATE_VF_TOPOLOGY_length 0x00000002
6171
6172 struct GEN9_3DSTATE_VF_TOPOLOGY {
6173 uint32_t CommandType;
6174 uint32_t CommandSubType;
6175 uint32_t _3DCommandOpcode;
6176 uint32_t _3DCommandSubOpcode;
6177 uint32_t DwordLength;
6178 uint32_t PrimitiveTopologyType;
6179 };
6180
6181 static inline void
6182 GEN9_3DSTATE_VF_TOPOLOGY_pack(__gen_user_data *data, void * restrict dst,
6183 const struct GEN9_3DSTATE_VF_TOPOLOGY * restrict values)
6184 {
6185 uint32_t *dw = (uint32_t * restrict) dst;
6186
6187 dw[0] =
6188 __gen_field(values->CommandType, 29, 31) |
6189 __gen_field(values->CommandSubType, 27, 28) |
6190 __gen_field(values->_3DCommandOpcode, 24, 26) |
6191 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
6192 __gen_field(values->DwordLength, 0, 7) |
6193 0;
6194
6195 dw[1] =
6196 __gen_field(values->PrimitiveTopologyType, 0, 5) |
6197 0;
6198
6199 }
6200
6201 #define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length_bias 0x00000002
6202 #define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC_header\
6203 .CommandType = 3, \
6204 .CommandSubType = 3, \
6205 ._3DCommandOpcode = 0, \
6206 ._3DCommandSubOpcode = 35, \
6207 .DwordLength = 0
6208
6209 #define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length 0x00000002
6210
6211 struct GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC {
6212 uint32_t CommandType;
6213 uint32_t CommandSubType;
6214 uint32_t _3DCommandOpcode;
6215 uint32_t _3DCommandSubOpcode;
6216 uint32_t DwordLength;
6217 uint32_t CCViewportPointer;
6218 };
6219
6220 static inline void
6221 GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC_pack(__gen_user_data *data, void * restrict dst,
6222 const struct GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC * restrict values)
6223 {
6224 uint32_t *dw = (uint32_t * restrict) dst;
6225
6226 dw[0] =
6227 __gen_field(values->CommandType, 29, 31) |
6228 __gen_field(values->CommandSubType, 27, 28) |
6229 __gen_field(values->_3DCommandOpcode, 24, 26) |
6230 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
6231 __gen_field(values->DwordLength, 0, 7) |
6232 0;
6233
6234 dw[1] =
6235 __gen_offset(values->CCViewportPointer, 5, 31) |
6236 0;
6237
6238 }
6239
6240 #define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length_bias 0x00000002
6241 #define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_header\
6242 .CommandType = 3, \
6243 .CommandSubType = 3, \
6244 ._3DCommandOpcode = 0, \
6245 ._3DCommandSubOpcode = 33, \
6246 .DwordLength = 0
6247
6248 #define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length 0x00000002
6249
6250 struct GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP {
6251 uint32_t CommandType;
6252 uint32_t CommandSubType;
6253 uint32_t _3DCommandOpcode;
6254 uint32_t _3DCommandSubOpcode;
6255 uint32_t DwordLength;
6256 uint32_t SFClipViewportPointer;
6257 };
6258
6259 static inline void
6260 GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_pack(__gen_user_data *data, void * restrict dst,
6261 const struct GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP * restrict values)
6262 {
6263 uint32_t *dw = (uint32_t * restrict) dst;
6264
6265 dw[0] =
6266 __gen_field(values->CommandType, 29, 31) |
6267 __gen_field(values->CommandSubType, 27, 28) |
6268 __gen_field(values->_3DCommandOpcode, 24, 26) |
6269 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
6270 __gen_field(values->DwordLength, 0, 7) |
6271 0;
6272
6273 dw[1] =
6274 __gen_offset(values->SFClipViewportPointer, 6, 31) |
6275 0;
6276
6277 }
6278
6279 #define GEN9_3DSTATE_WM_length_bias 0x00000002
6280 #define GEN9_3DSTATE_WM_header \
6281 .CommandType = 3, \
6282 .CommandSubType = 3, \
6283 ._3DCommandOpcode = 0, \
6284 ._3DCommandSubOpcode = 20, \
6285 .DwordLength = 0
6286
6287 #define GEN9_3DSTATE_WM_length 0x00000002
6288
6289 struct GEN9_3DSTATE_WM {
6290 uint32_t CommandType;
6291 uint32_t CommandSubType;
6292 uint32_t _3DCommandOpcode;
6293 uint32_t _3DCommandSubOpcode;
6294 uint32_t DwordLength;
6295 bool StatisticsEnable;
6296 bool LegacyDepthBufferClearEnable;
6297 bool LegacyDepthBufferResolveEnable;
6298 bool LegacyHierarchicalDepthBufferResolveEnable;
6299 bool LegacyDiamondLineRasterization;
6300 #define NORMAL 0
6301 #define PSEXEC 1
6302 #define PREPS 2
6303 uint32_t EarlyDepthStencilControl;
6304 #define Normal 0
6305 #define ForceOff 1
6306 #define ForceON 2
6307 uint32_t ForceThreadDispatchEnable;
6308 #define INTERP_PIXEL 0
6309 #define INTERP_CENTROID 2
6310 #define INTERP_SAMPLE 3
6311 uint32_t PositionZWInterpolationMode;
6312 uint32_t BarycentricInterpolationMode;
6313 #define _05pixels 0
6314 #define _10pixels 1
6315 #define _20pixels 2
6316 #define _40pixels 3
6317 uint32_t LineEndCapAntialiasingRegionWidth;
6318 #define _05pixels 0
6319 #define _10pixels 1
6320 #define _20pixels 2
6321 #define _40pixels 3
6322 uint32_t LineAntialiasingRegionWidth;
6323 bool PolygonStippleEnable;
6324 bool LineStippleEnable;
6325 #define RASTRULE_UPPER_LEFT 0
6326 #define RASTRULE_UPPER_RIGHT 1
6327 uint32_t PointRasterizationRule;
6328 #define Normal 0
6329 #define ForceOff 1
6330 #define ForceON 2
6331 uint32_t ForceKillPixelEnable;
6332 };
6333
6334 static inline void
6335 GEN9_3DSTATE_WM_pack(__gen_user_data *data, void * restrict dst,
6336 const struct GEN9_3DSTATE_WM * restrict values)
6337 {
6338 uint32_t *dw = (uint32_t * restrict) dst;
6339
6340 dw[0] =
6341 __gen_field(values->CommandType, 29, 31) |
6342 __gen_field(values->CommandSubType, 27, 28) |
6343 __gen_field(values->_3DCommandOpcode, 24, 26) |
6344 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
6345 __gen_field(values->DwordLength, 0, 7) |
6346 0;
6347
6348 dw[1] =
6349 __gen_field(values->StatisticsEnable, 31, 31) |
6350 __gen_field(values->LegacyDepthBufferClearEnable, 30, 30) |
6351 __gen_field(values->LegacyDepthBufferResolveEnable, 28, 28) |
6352 __gen_field(values->LegacyHierarchicalDepthBufferResolveEnable, 27, 27) |
6353 __gen_field(values->LegacyDiamondLineRasterization, 26, 26) |
6354 __gen_field(values->EarlyDepthStencilControl, 21, 22) |
6355 __gen_field(values->ForceThreadDispatchEnable, 19, 20) |
6356 __gen_field(values->PositionZWInterpolationMode, 17, 18) |
6357 __gen_field(values->BarycentricInterpolationMode, 11, 16) |
6358 __gen_field(values->LineEndCapAntialiasingRegionWidth, 8, 9) |
6359 __gen_field(values->LineAntialiasingRegionWidth, 6, 7) |
6360 __gen_field(values->PolygonStippleEnable, 4, 4) |
6361 __gen_field(values->LineStippleEnable, 3, 3) |
6362 __gen_field(values->PointRasterizationRule, 2, 2) |
6363 __gen_field(values->ForceKillPixelEnable, 0, 1) |
6364 0;
6365
6366 }
6367
6368 #define GEN9_3DSTATE_WM_CHROMAKEY_length_bias 0x00000002
6369 #define GEN9_3DSTATE_WM_CHROMAKEY_header \
6370 .CommandType = 3, \
6371 .CommandSubType = 3, \
6372 ._3DCommandOpcode = 0, \
6373 ._3DCommandSubOpcode = 76, \
6374 .DwordLength = 0
6375
6376 #define GEN9_3DSTATE_WM_CHROMAKEY_length 0x00000002
6377
6378 struct GEN9_3DSTATE_WM_CHROMAKEY {
6379 uint32_t CommandType;
6380 uint32_t CommandSubType;
6381 uint32_t _3DCommandOpcode;
6382 uint32_t _3DCommandSubOpcode;
6383 uint32_t DwordLength;
6384 bool ChromaKeyKillEnable;
6385 };
6386
6387 static inline void
6388 GEN9_3DSTATE_WM_CHROMAKEY_pack(__gen_user_data *data, void * restrict dst,
6389 const struct GEN9_3DSTATE_WM_CHROMAKEY * restrict values)
6390 {
6391 uint32_t *dw = (uint32_t * restrict) dst;
6392
6393 dw[0] =
6394 __gen_field(values->CommandType, 29, 31) |
6395 __gen_field(values->CommandSubType, 27, 28) |
6396 __gen_field(values->_3DCommandOpcode, 24, 26) |
6397 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
6398 __gen_field(values->DwordLength, 0, 7) |
6399 0;
6400
6401 dw[1] =
6402 __gen_field(values->ChromaKeyKillEnable, 31, 31) |
6403 0;
6404
6405 }
6406
6407 #define GEN9_3DSTATE_WM_DEPTH_STENCIL_length_bias 0x00000002
6408 #define GEN9_3DSTATE_WM_DEPTH_STENCIL_header \
6409 .CommandType = 3, \
6410 .CommandSubType = 3, \
6411 ._3DCommandOpcode = 0, \
6412 ._3DCommandSubOpcode = 78, \
6413 .DwordLength = 2
6414
6415 #define GEN9_3DSTATE_WM_DEPTH_STENCIL_length 0x00000004
6416
6417 struct GEN9_3DSTATE_WM_DEPTH_STENCIL {
6418 uint32_t CommandType;
6419 uint32_t CommandSubType;
6420 uint32_t _3DCommandOpcode;
6421 uint32_t _3DCommandSubOpcode;
6422 uint32_t DwordLength;
6423 uint32_t StencilFailOp;
6424 uint32_t StencilPassDepthFailOp;
6425 uint32_t StencilPassDepthPassOp;
6426 uint32_t BackfaceStencilTestFunction;
6427 uint32_t BackfaceStencilFailOp;
6428 uint32_t BackfaceStencilPassDepthFailOp;
6429 uint32_t BackfaceStencilPassDepthPassOp;
6430 uint32_t StencilTestFunction;
6431 uint32_t DepthTestFunction;
6432 bool DoubleSidedStencilEnable;
6433 bool StencilTestEnable;
6434 bool StencilBufferWriteEnable;
6435 bool DepthTestEnable;
6436 bool DepthBufferWriteEnable;
6437 uint32_t StencilTestMask;
6438 uint32_t StencilWriteMask;
6439 uint32_t BackfaceStencilTestMask;
6440 uint32_t BackfaceStencilWriteMask;
6441 uint32_t StencilReferenceValue;
6442 uint32_t BackfaceStencilReferenceValue;
6443 };
6444
6445 static inline void
6446 GEN9_3DSTATE_WM_DEPTH_STENCIL_pack(__gen_user_data *data, void * restrict dst,
6447 const struct GEN9_3DSTATE_WM_DEPTH_STENCIL * restrict values)
6448 {
6449 uint32_t *dw = (uint32_t * restrict) dst;
6450
6451 dw[0] =
6452 __gen_field(values->CommandType, 29, 31) |
6453 __gen_field(values->CommandSubType, 27, 28) |
6454 __gen_field(values->_3DCommandOpcode, 24, 26) |
6455 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
6456 __gen_field(values->DwordLength, 0, 7) |
6457 0;
6458
6459 dw[1] =
6460 __gen_field(values->StencilFailOp, 29, 31) |
6461 __gen_field(values->StencilPassDepthFailOp, 26, 28) |
6462 __gen_field(values->StencilPassDepthPassOp, 23, 25) |
6463 __gen_field(values->BackfaceStencilTestFunction, 20, 22) |
6464 __gen_field(values->BackfaceStencilFailOp, 17, 19) |
6465 __gen_field(values->BackfaceStencilPassDepthFailOp, 14, 16) |
6466 __gen_field(values->BackfaceStencilPassDepthPassOp, 11, 13) |
6467 __gen_field(values->StencilTestFunction, 8, 10) |
6468 __gen_field(values->DepthTestFunction, 5, 7) |
6469 __gen_field(values->DoubleSidedStencilEnable, 4, 4) |
6470 __gen_field(values->StencilTestEnable, 3, 3) |
6471 __gen_field(values->StencilBufferWriteEnable, 2, 2) |
6472 __gen_field(values->DepthTestEnable, 1, 1) |
6473 __gen_field(values->DepthBufferWriteEnable, 0, 0) |
6474 0;
6475
6476 dw[2] =
6477 __gen_field(values->StencilTestMask, 24, 31) |
6478 __gen_field(values->StencilWriteMask, 16, 23) |
6479 __gen_field(values->BackfaceStencilTestMask, 8, 15) |
6480 __gen_field(values->BackfaceStencilWriteMask, 0, 7) |
6481 0;
6482
6483 dw[3] =
6484 __gen_field(values->StencilReferenceValue, 8, 15) |
6485 __gen_field(values->BackfaceStencilReferenceValue, 0, 7) |
6486 0;
6487
6488 }
6489
6490 #define GEN9_3DSTATE_WM_HZ_OP_length_bias 0x00000002
6491 #define GEN9_3DSTATE_WM_HZ_OP_header \
6492 .CommandType = 3, \
6493 .CommandSubType = 3, \
6494 ._3DCommandOpcode = 0, \
6495 ._3DCommandSubOpcode = 82, \
6496 .DwordLength = 3
6497
6498 #define GEN9_3DSTATE_WM_HZ_OP_length 0x00000005
6499
6500 struct GEN9_3DSTATE_WM_HZ_OP {
6501 uint32_t CommandType;
6502 uint32_t CommandSubType;
6503 uint32_t _3DCommandOpcode;
6504 uint32_t _3DCommandSubOpcode;
6505 uint32_t DwordLength;
6506 bool StencilBufferClearEnable;
6507 bool DepthBufferClearEnable;
6508 bool ScissorRectangleEnable;
6509 bool DepthBufferResolveEnable;
6510 bool HierarchicalDepthBufferResolveEnable;
6511 uint32_t PixelPositionOffsetEnable;
6512 bool FullSurfaceDepthClear;
6513 uint32_t StencilClearValue;
6514 uint32_t NumberofMultisamples;
6515 uint32_t ClearRectangleYMin;
6516 uint32_t ClearRectangleXMin;
6517 uint32_t ClearRectangleYMax;
6518 uint32_t ClearRectangleXMax;
6519 uint32_t SampleMask;
6520 };
6521
6522 static inline void
6523 GEN9_3DSTATE_WM_HZ_OP_pack(__gen_user_data *data, void * restrict dst,
6524 const struct GEN9_3DSTATE_WM_HZ_OP * restrict values)
6525 {
6526 uint32_t *dw = (uint32_t * restrict) dst;
6527
6528 dw[0] =
6529 __gen_field(values->CommandType, 29, 31) |
6530 __gen_field(values->CommandSubType, 27, 28) |
6531 __gen_field(values->_3DCommandOpcode, 24, 26) |
6532 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
6533 __gen_field(values->DwordLength, 0, 7) |
6534 0;
6535
6536 dw[1] =
6537 __gen_field(values->StencilBufferClearEnable, 31, 31) |
6538 __gen_field(values->DepthBufferClearEnable, 30, 30) |
6539 __gen_field(values->ScissorRectangleEnable, 29, 29) |
6540 __gen_field(values->DepthBufferResolveEnable, 28, 28) |
6541 __gen_field(values->HierarchicalDepthBufferResolveEnable, 27, 27) |
6542 __gen_field(values->PixelPositionOffsetEnable, 26, 26) |
6543 __gen_field(values->FullSurfaceDepthClear, 25, 25) |
6544 __gen_field(values->StencilClearValue, 16, 23) |
6545 __gen_field(values->NumberofMultisamples, 13, 15) |
6546 0;
6547
6548 dw[2] =
6549 __gen_field(values->ClearRectangleYMin, 16, 31) |
6550 __gen_field(values->ClearRectangleXMin, 0, 15) |
6551 0;
6552
6553 dw[3] =
6554 __gen_field(values->ClearRectangleYMax, 16, 31) |
6555 __gen_field(values->ClearRectangleXMax, 0, 15) |
6556 0;
6557
6558 dw[4] =
6559 __gen_field(values->SampleMask, 0, 15) |
6560 0;
6561
6562 }
6563
6564 #define GEN9_GPGPU_WALKER_length_bias 0x00000002
6565 #define GEN9_GPGPU_WALKER_header \
6566 .CommandType = 3, \
6567 .Pipeline = 2, \
6568 .MediaCommandOpcode = 1, \
6569 .SubOpcode = 5, \
6570 .DwordLength = 13
6571
6572 #define GEN9_GPGPU_WALKER_length 0x0000000f
6573
6574 struct GEN9_GPGPU_WALKER {
6575 uint32_t CommandType;
6576 uint32_t Pipeline;
6577 uint32_t MediaCommandOpcode;
6578 uint32_t SubOpcode;
6579 bool IndirectParameterEnable;
6580 bool PredicateEnable;
6581 uint32_t DwordLength;
6582 uint32_t InterfaceDescriptorOffset;
6583 uint32_t IndirectDataLength;
6584 uint32_t IndirectDataStartAddress;
6585 #define SIMD8 0
6586 #define SIMD16 1
6587 #define SIMD32 2
6588 uint32_t SIMDSize;
6589 uint32_t ThreadDepthCounterMaximum;
6590 uint32_t ThreadHeightCounterMaximum;
6591 uint32_t ThreadWidthCounterMaximum;
6592 uint32_t ThreadGroupIDStartingX;
6593 uint32_t ThreadGroupIDXDimension;
6594 uint32_t ThreadGroupIDStartingY;
6595 uint32_t ThreadGroupIDYDimension;
6596 uint32_t ThreadGroupIDStartingResumeZ;
6597 uint32_t ThreadGroupIDZDimension;
6598 uint32_t RightExecutionMask;
6599 uint32_t BottomExecutionMask;
6600 };
6601
6602 static inline void
6603 GEN9_GPGPU_WALKER_pack(__gen_user_data *data, void * restrict dst,
6604 const struct GEN9_GPGPU_WALKER * restrict values)
6605 {
6606 uint32_t *dw = (uint32_t * restrict) dst;
6607
6608 dw[0] =
6609 __gen_field(values->CommandType, 29, 31) |
6610 __gen_field(values->Pipeline, 27, 28) |
6611 __gen_field(values->MediaCommandOpcode, 24, 26) |
6612 __gen_field(values->SubOpcode, 16, 23) |
6613 __gen_field(values->IndirectParameterEnable, 10, 10) |
6614 __gen_field(values->PredicateEnable, 8, 8) |
6615 __gen_field(values->DwordLength, 0, 7) |
6616 0;
6617
6618 dw[1] =
6619 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6620 0;
6621
6622 dw[2] =
6623 __gen_field(values->IndirectDataLength, 0, 16) |
6624 0;
6625
6626 dw[3] =
6627 __gen_offset(values->IndirectDataStartAddress, 6, 31) |
6628 0;
6629
6630 dw[4] =
6631 __gen_field(values->SIMDSize, 30, 31) |
6632 __gen_field(values->ThreadDepthCounterMaximum, 16, 21) |
6633 __gen_field(values->ThreadHeightCounterMaximum, 8, 13) |
6634 __gen_field(values->ThreadWidthCounterMaximum, 0, 5) |
6635 0;
6636
6637 dw[5] =
6638 __gen_field(values->ThreadGroupIDStartingX, 0, 31) |
6639 0;
6640
6641 dw[6] =
6642 0;
6643
6644 dw[7] =
6645 __gen_field(values->ThreadGroupIDXDimension, 0, 31) |
6646 0;
6647
6648 dw[8] =
6649 __gen_field(values->ThreadGroupIDStartingY, 0, 31) |
6650 0;
6651
6652 dw[9] =
6653 0;
6654
6655 dw[10] =
6656 __gen_field(values->ThreadGroupIDYDimension, 0, 31) |
6657 0;
6658
6659 dw[11] =
6660 __gen_field(values->ThreadGroupIDStartingResumeZ, 0, 31) |
6661 0;
6662
6663 dw[12] =
6664 __gen_field(values->ThreadGroupIDZDimension, 0, 31) |
6665 0;
6666
6667 dw[13] =
6668 __gen_field(values->RightExecutionMask, 0, 31) |
6669 0;
6670
6671 dw[14] =
6672 __gen_field(values->BottomExecutionMask, 0, 31) |
6673 0;
6674
6675 }
6676
6677 #define GEN9_MEDIA_CURBE_LOAD_length_bias 0x00000002
6678 #define GEN9_MEDIA_CURBE_LOAD_header \
6679 .CommandType = 3, \
6680 .Pipeline = 2, \
6681 .MediaCommandOpcode = 0, \
6682 .SubOpcode = 1, \
6683 .DwordLength = 2
6684
6685 #define GEN9_MEDIA_CURBE_LOAD_length 0x00000004
6686
6687 struct GEN9_MEDIA_CURBE_LOAD {
6688 uint32_t CommandType;
6689 uint32_t Pipeline;
6690 uint32_t MediaCommandOpcode;
6691 uint32_t SubOpcode;
6692 uint32_t DwordLength;
6693 uint32_t CURBETotalDataLength;
6694 uint32_t CURBEDataStartAddress;
6695 };
6696
6697 static inline void
6698 GEN9_MEDIA_CURBE_LOAD_pack(__gen_user_data *data, void * restrict dst,
6699 const struct GEN9_MEDIA_CURBE_LOAD * restrict values)
6700 {
6701 uint32_t *dw = (uint32_t * restrict) dst;
6702
6703 dw[0] =
6704 __gen_field(values->CommandType, 29, 31) |
6705 __gen_field(values->Pipeline, 27, 28) |
6706 __gen_field(values->MediaCommandOpcode, 24, 26) |
6707 __gen_field(values->SubOpcode, 16, 23) |
6708 __gen_field(values->DwordLength, 0, 15) |
6709 0;
6710
6711 dw[1] =
6712 0;
6713
6714 dw[2] =
6715 __gen_field(values->CURBETotalDataLength, 0, 16) |
6716 0;
6717
6718 dw[3] =
6719 __gen_field(values->CURBEDataStartAddress, 0, 31) |
6720 0;
6721
6722 }
6723
6724 #define GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length_bias 0x00000002
6725 #define GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_header\
6726 .CommandType = 3, \
6727 .Pipeline = 2, \
6728 .MediaCommandOpcode = 0, \
6729 .SubOpcode = 2, \
6730 .DwordLength = 2
6731
6732 #define GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 0x00000004
6733
6734 struct GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD {
6735 uint32_t CommandType;
6736 uint32_t Pipeline;
6737 uint32_t MediaCommandOpcode;
6738 uint32_t SubOpcode;
6739 uint32_t DwordLength;
6740 uint32_t InterfaceDescriptorTotalLength;
6741 uint32_t InterfaceDescriptorDataStartAddress;
6742 };
6743
6744 static inline void
6745 GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_pack(__gen_user_data *data, void * restrict dst,
6746 const struct GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD * restrict values)
6747 {
6748 uint32_t *dw = (uint32_t * restrict) dst;
6749
6750 dw[0] =
6751 __gen_field(values->CommandType, 29, 31) |
6752 __gen_field(values->Pipeline, 27, 28) |
6753 __gen_field(values->MediaCommandOpcode, 24, 26) |
6754 __gen_field(values->SubOpcode, 16, 23) |
6755 __gen_field(values->DwordLength, 0, 15) |
6756 0;
6757
6758 dw[1] =
6759 0;
6760
6761 dw[2] =
6762 __gen_field(values->InterfaceDescriptorTotalLength, 0, 16) |
6763 0;
6764
6765 dw[3] =
6766 __gen_offset(values->InterfaceDescriptorDataStartAddress, 0, 31) |
6767 0;
6768
6769 }
6770
6771 #define GEN9_MEDIA_OBJECT_length_bias 0x00000002
6772 #define GEN9_MEDIA_OBJECT_header \
6773 .CommandType = 3, \
6774 .MediaCommandPipeline = 2, \
6775 .MediaCommandOpcode = 1, \
6776 .MediaCommandSubOpcode = 0
6777
6778 #define GEN9_MEDIA_OBJECT_length 0x00000000
6779
6780 struct GEN9_MEDIA_OBJECT {
6781 uint32_t CommandType;
6782 uint32_t MediaCommandPipeline;
6783 uint32_t MediaCommandOpcode;
6784 uint32_t MediaCommandSubOpcode;
6785 uint32_t DwordLength;
6786 uint32_t InterfaceDescriptorOffset;
6787 bool ChildrenPresent;
6788 uint32_t SliceDestinationSelectMSBs;
6789 #define Nothreadsynchronization 0
6790 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
6791 uint32_t ThreadSynchronization;
6792 uint32_t ForceDestination;
6793 #define Notusingscoreboard 0
6794 #define Usingscoreboard 1
6795 uint32_t UseScoreboard;
6796 #define Slice0 0
6797 #define Slice1 1
6798 #define Slice2 2
6799 uint32_t SliceDestinationSelect;
6800 #define Subslice3 3
6801 #define SubSlice2 2
6802 #define SubSlice1 1
6803 #define SubSlice0 0
6804 uint32_t SubSliceDestinationSelect;
6805 uint32_t IndirectDataLength;
6806 __gen_address_type IndirectDataStartAddress;
6807 uint32_t ScoredboardY;
6808 uint32_t ScoreboardX;
6809 uint32_t ScoreboardColor;
6810 bool ScoreboardMask;
6811 /* variable length fields follow */
6812 };
6813
6814 static inline void
6815 GEN9_MEDIA_OBJECT_pack(__gen_user_data *data, void * restrict dst,
6816 const struct GEN9_MEDIA_OBJECT * restrict values)
6817 {
6818 uint32_t *dw = (uint32_t * restrict) dst;
6819
6820 dw[0] =
6821 __gen_field(values->CommandType, 29, 31) |
6822 __gen_field(values->MediaCommandPipeline, 27, 28) |
6823 __gen_field(values->MediaCommandOpcode, 24, 26) |
6824 __gen_field(values->MediaCommandSubOpcode, 16, 23) |
6825 __gen_field(values->DwordLength, 0, 15) |
6826 0;
6827
6828 dw[1] =
6829 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6830 0;
6831
6832 dw[2] =
6833 __gen_field(values->ChildrenPresent, 31, 31) |
6834 __gen_field(values->SliceDestinationSelectMSBs, 25, 26) |
6835 __gen_field(values->ThreadSynchronization, 24, 24) |
6836 __gen_field(values->ForceDestination, 22, 22) |
6837 __gen_field(values->UseScoreboard, 21, 21) |
6838 __gen_field(values->SliceDestinationSelect, 19, 20) |
6839 __gen_field(values->SubSliceDestinationSelect, 17, 18) |
6840 __gen_field(values->IndirectDataLength, 0, 16) |
6841 0;
6842
6843 uint32_t dw3 =
6844 0;
6845
6846 dw[3] =
6847 __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, dw3);
6848
6849 dw[4] =
6850 __gen_field(values->ScoredboardY, 16, 24) |
6851 __gen_field(values->ScoreboardX, 0, 8) |
6852 0;
6853
6854 dw[5] =
6855 __gen_field(values->ScoreboardColor, 16, 19) |
6856 __gen_field(values->ScoreboardMask, 0, 7) |
6857 0;
6858
6859 /* variable length fields follow */
6860 }
6861
6862 #define GEN9_MEDIA_OBJECT_GRPID_length_bias 0x00000002
6863 #define GEN9_MEDIA_OBJECT_GRPID_header \
6864 .CommandType = 3, \
6865 .MediaCommandPipeline = 2, \
6866 .MediaCommandOpcode = 1, \
6867 .MediaCommandSubOpcode = 6
6868
6869 #define GEN9_MEDIA_OBJECT_GRPID_length 0x00000000
6870
6871 struct GEN9_MEDIA_OBJECT_GRPID {
6872 uint32_t CommandType;
6873 uint32_t MediaCommandPipeline;
6874 uint32_t MediaCommandOpcode;
6875 uint32_t MediaCommandSubOpcode;
6876 uint32_t DwordLength;
6877 uint32_t InterfaceDescriptorOffset;
6878 uint32_t SliceDestinationSelectMSB;
6879 uint32_t EndofThreadGroup;
6880 uint32_t ForceDestination;
6881 #define Notusingscoreboard 0
6882 #define Usingscoreboard 1
6883 uint32_t UseScoreboard;
6884 #define Slice0 0
6885 #define Slice1 1
6886 #define Slice2 2
6887 uint32_t SliceDestinationSelect;
6888 #define Subslice3 3
6889 #define SubSlice2 2
6890 #define SubSlice1 1
6891 #define SubSlice0 0
6892 uint32_t SubSliceDestinationSelect;
6893 uint32_t IndirectDataLength;
6894 __gen_address_type IndirectDataStartAddress;
6895 uint32_t ScoreboardY;
6896 uint32_t ScoreboardX;
6897 uint32_t ScoreboardColor;
6898 bool ScoreboardMask;
6899 uint32_t GroupID;
6900 /* variable length fields follow */
6901 };
6902
6903 static inline void
6904 GEN9_MEDIA_OBJECT_GRPID_pack(__gen_user_data *data, void * restrict dst,
6905 const struct GEN9_MEDIA_OBJECT_GRPID * restrict values)
6906 {
6907 uint32_t *dw = (uint32_t * restrict) dst;
6908
6909 dw[0] =
6910 __gen_field(values->CommandType, 29, 31) |
6911 __gen_field(values->MediaCommandPipeline, 27, 28) |
6912 __gen_field(values->MediaCommandOpcode, 24, 26) |
6913 __gen_field(values->MediaCommandSubOpcode, 16, 23) |
6914 __gen_field(values->DwordLength, 0, 15) |
6915 0;
6916
6917 dw[1] =
6918 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6919 0;
6920
6921 dw[2] =
6922 __gen_field(values->SliceDestinationSelectMSB, 24, 24) |
6923 __gen_field(values->EndofThreadGroup, 23, 23) |
6924 __gen_field(values->ForceDestination, 22, 22) |
6925 __gen_field(values->UseScoreboard, 21, 21) |
6926 __gen_field(values->SliceDestinationSelect, 19, 20) |
6927 __gen_field(values->SubSliceDestinationSelect, 17, 18) |
6928 __gen_field(values->IndirectDataLength, 0, 16) |
6929 0;
6930
6931 uint32_t dw3 =
6932 0;
6933
6934 dw[3] =
6935 __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, dw3);
6936
6937 dw[4] =
6938 __gen_field(values->ScoreboardY, 16, 24) |
6939 __gen_field(values->ScoreboardX, 0, 8) |
6940 0;
6941
6942 dw[5] =
6943 __gen_field(values->ScoreboardColor, 16, 19) |
6944 __gen_field(values->ScoreboardMask, 0, 7) |
6945 0;
6946
6947 dw[6] =
6948 __gen_field(values->GroupID, 0, 31) |
6949 0;
6950
6951 /* variable length fields follow */
6952 }
6953
6954 #define GEN9_MEDIA_OBJECT_PRT_length_bias 0x00000002
6955 #define GEN9_MEDIA_OBJECT_PRT_header \
6956 .CommandType = 3, \
6957 .Pipeline = 2, \
6958 .MediaCommandOpcode = 1, \
6959 .SubOpcode = 2, \
6960 .DwordLength = 14
6961
6962 #define GEN9_MEDIA_OBJECT_PRT_length 0x00000010
6963
6964 struct GEN9_MEDIA_OBJECT_PRT {
6965 uint32_t CommandType;
6966 uint32_t Pipeline;
6967 uint32_t MediaCommandOpcode;
6968 uint32_t SubOpcode;
6969 uint32_t DwordLength;
6970 uint32_t InterfaceDescriptorOffset;
6971 bool ChildrenPresent;
6972 bool PRT_FenceNeeded;
6973 #define Rootthreadqueue 0
6974 #define VFEstateflush 1
6975 uint32_t PRT_FenceType;
6976 uint32_t InlineData[12];
6977 };
6978
6979 static inline void
6980 GEN9_MEDIA_OBJECT_PRT_pack(__gen_user_data *data, void * restrict dst,
6981 const struct GEN9_MEDIA_OBJECT_PRT * restrict values)
6982 {
6983 uint32_t *dw = (uint32_t * restrict) dst;
6984
6985 dw[0] =
6986 __gen_field(values->CommandType, 29, 31) |
6987 __gen_field(values->Pipeline, 27, 28) |
6988 __gen_field(values->MediaCommandOpcode, 24, 26) |
6989 __gen_field(values->SubOpcode, 16, 23) |
6990 __gen_field(values->DwordLength, 0, 15) |
6991 0;
6992
6993 dw[1] =
6994 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
6995 0;
6996
6997 dw[2] =
6998 __gen_field(values->ChildrenPresent, 31, 31) |
6999 __gen_field(values->PRT_FenceNeeded, 23, 23) |
7000 __gen_field(values->PRT_FenceType, 22, 22) |
7001 0;
7002
7003 dw[3] =
7004 0;
7005
7006 for (uint32_t i = 0, j = 4; i < 12; i += 1, j++) {
7007 dw[j] =
7008 __gen_field(values->InlineData[i + 0], 0, 31) |
7009 0;
7010 }
7011
7012 }
7013
7014 #define GEN9_MEDIA_OBJECT_WALKER_length_bias 0x00000002
7015 #define GEN9_MEDIA_OBJECT_WALKER_header \
7016 .CommandType = 3, \
7017 .Pipeline = 2, \
7018 .MediaCommandOpcode = 1, \
7019 .SubOpcode = 3
7020
7021 #define GEN9_MEDIA_OBJECT_WALKER_length 0x00000000
7022
7023 struct GEN9_MEDIA_OBJECT_WALKER {
7024 uint32_t CommandType;
7025 uint32_t Pipeline;
7026 uint32_t MediaCommandOpcode;
7027 uint32_t SubOpcode;
7028 uint32_t DwordLength;
7029 uint32_t InterfaceDescriptorOffset;
7030 #define Nothreadsynchronization 0
7031 #define Threaddispatchissynchronizedbythespawnrootthreadmessage 1
7032 uint32_t ThreadSynchronization;
7033 uint32_t MaskedDispatch;
7034 #define Notusingscoreboard 0
7035 #define Usingscoreboard 1
7036 uint32_t UseScoreboard;
7037 uint32_t IndirectDataLength;
7038 uint32_t IndirectDataStartAddress;
7039 uint32_t GroupIDLoopSelect;
7040 bool ScoreboardMask;
7041 uint32_t ColorCountMinusOne;
7042 uint32_t MiddleLoopExtraSteps;
7043 uint32_t LocalMidLoopUnitY;
7044 uint32_t MidLoopUnitX;
7045 uint32_t GlobalLoopExecCount;
7046 uint32_t LocalLoopExecCount;
7047 uint32_t BlockResolutionY;
7048 uint32_t BlockResolutionX;
7049 uint32_t LocalStartY;
7050 uint32_t LocalStartX;
7051 uint32_t LocalOuterLoopStrideY;
7052 uint32_t LocalOuterLoopStrideX;
7053 uint32_t LocalInnerLoopUnitY;
7054 uint32_t LocalInnerLoopUnitX;
7055 uint32_t GlobalResolutionY;
7056 uint32_t GlobalResolutionX;
7057 uint32_t GlobalStartY;
7058 uint32_t GlobalStartX;
7059 uint32_t GlobalOuterLoopStrideY;
7060 uint32_t GlobalOuterLoopStrideX;
7061 uint32_t GlobalInnerLoopUnitY;
7062 uint32_t GlobalInnerLoopUnitX;
7063 /* variable length fields follow */
7064 };
7065
7066 static inline void
7067 GEN9_MEDIA_OBJECT_WALKER_pack(__gen_user_data *data, void * restrict dst,
7068 const struct GEN9_MEDIA_OBJECT_WALKER * restrict values)
7069 {
7070 uint32_t *dw = (uint32_t * restrict) dst;
7071
7072 dw[0] =
7073 __gen_field(values->CommandType, 29, 31) |
7074 __gen_field(values->Pipeline, 27, 28) |
7075 __gen_field(values->MediaCommandOpcode, 24, 26) |
7076 __gen_field(values->SubOpcode, 16, 23) |
7077 __gen_field(values->DwordLength, 0, 15) |
7078 0;
7079
7080 dw[1] =
7081 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
7082 0;
7083
7084 dw[2] =
7085 __gen_field(values->ThreadSynchronization, 24, 24) |
7086 __gen_field(values->MaskedDispatch, 22, 23) |
7087 __gen_field(values->UseScoreboard, 21, 21) |
7088 __gen_field(values->IndirectDataLength, 0, 16) |
7089 0;
7090
7091 dw[3] =
7092 __gen_field(values->IndirectDataStartAddress, 0, 31) |
7093 0;
7094
7095 dw[4] =
7096 0;
7097
7098 dw[5] =
7099 __gen_field(values->GroupIDLoopSelect, 8, 31) |
7100 __gen_field(values->ScoreboardMask, 0, 7) |
7101 0;
7102
7103 dw[6] =
7104 __gen_field(values->ColorCountMinusOne, 24, 27) |
7105 __gen_field(values->MiddleLoopExtraSteps, 16, 20) |
7106 __gen_field(values->LocalMidLoopUnitY, 12, 13) |
7107 __gen_field(values->MidLoopUnitX, 8, 9) |
7108 0;
7109
7110 dw[7] =
7111 __gen_field(values->GlobalLoopExecCount, 16, 27) |
7112 __gen_field(values->LocalLoopExecCount, 0, 11) |
7113 0;
7114
7115 dw[8] =
7116 __gen_field(values->BlockResolutionY, 16, 26) |
7117 __gen_field(values->BlockResolutionX, 0, 10) |
7118 0;
7119
7120 dw[9] =
7121 __gen_field(values->LocalStartY, 16, 26) |
7122 __gen_field(values->LocalStartX, 0, 10) |
7123 0;
7124
7125 dw[10] =
7126 0;
7127
7128 dw[11] =
7129 __gen_field(values->LocalOuterLoopStrideY, 16, 27) |
7130 __gen_field(values->LocalOuterLoopStrideX, 0, 11) |
7131 0;
7132
7133 dw[12] =
7134 __gen_field(values->LocalInnerLoopUnitY, 16, 27) |
7135 __gen_field(values->LocalInnerLoopUnitX, 0, 11) |
7136 0;
7137
7138 dw[13] =
7139 __gen_field(values->GlobalResolutionY, 16, 26) |
7140 __gen_field(values->GlobalResolutionX, 0, 10) |
7141 0;
7142
7143 dw[14] =
7144 __gen_field(values->GlobalStartY, 16, 27) |
7145 __gen_field(values->GlobalStartX, 0, 11) |
7146 0;
7147
7148 dw[15] =
7149 __gen_field(values->GlobalOuterLoopStrideY, 16, 27) |
7150 __gen_field(values->GlobalOuterLoopStrideX, 0, 11) |
7151 0;
7152
7153 dw[16] =
7154 __gen_field(values->GlobalInnerLoopUnitY, 16, 27) |
7155 __gen_field(values->GlobalInnerLoopUnitX, 0, 11) |
7156 0;
7157
7158 /* variable length fields follow */
7159 }
7160
7161 #define GEN9_MEDIA_STATE_FLUSH_length_bias 0x00000002
7162 #define GEN9_MEDIA_STATE_FLUSH_header \
7163 .CommandType = 3, \
7164 .Pipeline = 2, \
7165 .MediaCommandOpcode = 0, \
7166 .SubOpcode = 4, \
7167 .DwordLength = 0
7168
7169 #define GEN9_MEDIA_STATE_FLUSH_length 0x00000002
7170
7171 struct GEN9_MEDIA_STATE_FLUSH {
7172 uint32_t CommandType;
7173 uint32_t Pipeline;
7174 uint32_t MediaCommandOpcode;
7175 uint32_t SubOpcode;
7176 uint32_t DwordLength;
7177 bool FlushtoGO;
7178 uint32_t WatermarkRequired;
7179 uint32_t InterfaceDescriptorOffset;
7180 };
7181
7182 static inline void
7183 GEN9_MEDIA_STATE_FLUSH_pack(__gen_user_data *data, void * restrict dst,
7184 const struct GEN9_MEDIA_STATE_FLUSH * restrict values)
7185 {
7186 uint32_t *dw = (uint32_t * restrict) dst;
7187
7188 dw[0] =
7189 __gen_field(values->CommandType, 29, 31) |
7190 __gen_field(values->Pipeline, 27, 28) |
7191 __gen_field(values->MediaCommandOpcode, 24, 26) |
7192 __gen_field(values->SubOpcode, 16, 23) |
7193 __gen_field(values->DwordLength, 0, 15) |
7194 0;
7195
7196 dw[1] =
7197 __gen_field(values->FlushtoGO, 7, 7) |
7198 __gen_field(values->WatermarkRequired, 6, 6) |
7199 __gen_field(values->InterfaceDescriptorOffset, 0, 5) |
7200 0;
7201
7202 }
7203
7204 #define GEN9_MEDIA_VFE_STATE_length_bias 0x00000002
7205 #define GEN9_MEDIA_VFE_STATE_header \
7206 .CommandType = 3, \
7207 .Pipeline = 2, \
7208 .MediaCommandOpcode = 0, \
7209 .SubOpcode = 0, \
7210 .DwordLength = 7
7211
7212 #define GEN9_MEDIA_VFE_STATE_length 0x00000009
7213
7214 struct GEN9_MEDIA_VFE_STATE {
7215 uint32_t CommandType;
7216 uint32_t Pipeline;
7217 uint32_t MediaCommandOpcode;
7218 uint32_t SubOpcode;
7219 uint32_t DwordLength;
7220 uint32_t ScratchSpaceBasePointer;
7221 uint32_t StackSize;
7222 uint32_t PerThreadScratchSpace;
7223 uint32_t ScratchSpaceBasePointerHigh;
7224 uint32_t MaximumNumberofThreads;
7225 uint32_t NumberofURBEntries;
7226 #define Maintainingtheexistingtimestampstate 0
7227 #define Resettingrelativetimerandlatchingtheglobaltimestamp 1
7228 uint32_t ResetGatewayTimer;
7229 uint32_t SliceDisable;
7230 uint32_t URBEntryAllocationSize;
7231 uint32_t CURBEAllocationSize;
7232 #define Scoreboarddisabled 0
7233 #define Scoreboardenabled 1
7234 uint32_t ScoreboardEnable;
7235 #define StallingScoreboard 0
7236 #define NonStallingScoreboard 1
7237 uint32_t ScoreboardType;
7238 uint32_t ScoreboardMask;
7239 uint32_t Scoreboard3DeltaY;
7240 uint32_t Scoreboard3DeltaX;
7241 uint32_t Scoreboard2DeltaY;
7242 uint32_t Scoreboard2DeltaX;
7243 uint32_t Scoreboard1DeltaY;
7244 uint32_t Scoreboard1DeltaX;
7245 uint32_t Scoreboard0DeltaY;
7246 uint32_t Scoreboard0DeltaX;
7247 uint32_t Scoreboard7DeltaY;
7248 uint32_t Scoreboard7DeltaX;
7249 uint32_t Scoreboard6DeltaY;
7250 uint32_t Scoreboard6DeltaX;
7251 uint32_t Scoreboard5DeltaY;
7252 uint32_t Scoreboard5DeltaX;
7253 uint32_t Scoreboard4DeltaY;
7254 uint32_t Scoreboard4DeltaX;
7255 };
7256
7257 static inline void
7258 GEN9_MEDIA_VFE_STATE_pack(__gen_user_data *data, void * restrict dst,
7259 const struct GEN9_MEDIA_VFE_STATE * restrict values)
7260 {
7261 uint32_t *dw = (uint32_t * restrict) dst;
7262
7263 dw[0] =
7264 __gen_field(values->CommandType, 29, 31) |
7265 __gen_field(values->Pipeline, 27, 28) |
7266 __gen_field(values->MediaCommandOpcode, 24, 26) |
7267 __gen_field(values->SubOpcode, 16, 23) |
7268 __gen_field(values->DwordLength, 0, 15) |
7269 0;
7270
7271 dw[1] =
7272 __gen_offset(values->ScratchSpaceBasePointer, 10, 31) |
7273 __gen_field(values->StackSize, 4, 7) |
7274 __gen_field(values->PerThreadScratchSpace, 0, 3) |
7275 0;
7276
7277 dw[2] =
7278 __gen_offset(values->ScratchSpaceBasePointerHigh, 0, 15) |
7279 0;
7280
7281 dw[3] =
7282 __gen_field(values->MaximumNumberofThreads, 16, 31) |
7283 __gen_field(values->NumberofURBEntries, 8, 15) |
7284 __gen_field(values->ResetGatewayTimer, 7, 7) |
7285 0;
7286
7287 dw[4] =
7288 __gen_field(values->SliceDisable, 0, 1) |
7289 0;
7290
7291 dw[5] =
7292 __gen_field(values->URBEntryAllocationSize, 16, 31) |
7293 __gen_field(values->CURBEAllocationSize, 0, 15) |
7294 0;
7295
7296 dw[6] =
7297 __gen_field(values->ScoreboardEnable, 31, 31) |
7298 __gen_field(values->ScoreboardType, 30, 30) |
7299 __gen_field(values->ScoreboardMask, 0, 7) |
7300 0;
7301
7302 dw[7] =
7303 __gen_field(values->Scoreboard3DeltaY, 28, 31) |
7304 __gen_field(values->Scoreboard3DeltaX, 24, 27) |
7305 __gen_field(values->Scoreboard2DeltaY, 20, 23) |
7306 __gen_field(values->Scoreboard2DeltaX, 16, 19) |
7307 __gen_field(values->Scoreboard1DeltaY, 12, 15) |
7308 __gen_field(values->Scoreboard1DeltaX, 8, 11) |
7309 __gen_field(values->Scoreboard0DeltaY, 4, 7) |
7310 __gen_field(values->Scoreboard0DeltaX, 0, 3) |
7311 0;
7312
7313 dw[8] =
7314 __gen_field(values->Scoreboard7DeltaY, 28, 31) |
7315 __gen_field(values->Scoreboard7DeltaX, 24, 27) |
7316 __gen_field(values->Scoreboard6DeltaY, 20, 23) |
7317 __gen_field(values->Scoreboard6DeltaX, 16, 19) |
7318 __gen_field(values->Scoreboard5DeltaY, 12, 15) |
7319 __gen_field(values->Scoreboard5DeltaX, 8, 11) |
7320 __gen_field(values->Scoreboard4DeltaY, 4, 7) |
7321 __gen_field(values->Scoreboard4DeltaX, 0, 3) |
7322 0;
7323
7324 }
7325
7326 #define GEN9_MI_ARB_CHECK_length_bias 0x00000001
7327 #define GEN9_MI_ARB_CHECK_header \
7328 .CommandType = 0, \
7329 .MICommandOpcode = 5
7330
7331 #define GEN9_MI_ARB_CHECK_length 0x00000001
7332
7333 struct GEN9_MI_ARB_CHECK {
7334 uint32_t CommandType;
7335 uint32_t MICommandOpcode;
7336 };
7337
7338 static inline void
7339 GEN9_MI_ARB_CHECK_pack(__gen_user_data *data, void * restrict dst,
7340 const struct GEN9_MI_ARB_CHECK * restrict values)
7341 {
7342 uint32_t *dw = (uint32_t * restrict) dst;
7343
7344 dw[0] =
7345 __gen_field(values->CommandType, 29, 31) |
7346 __gen_field(values->MICommandOpcode, 23, 28) |
7347 0;
7348
7349 }
7350
7351 #define GEN9_MI_BATCH_BUFFER_END_length_bias 0x00000001
7352 #define GEN9_MI_BATCH_BUFFER_END_header \
7353 .CommandType = 0, \
7354 .MICommandOpcode = 10
7355
7356 #define GEN9_MI_BATCH_BUFFER_END_length 0x00000001
7357
7358 struct GEN9_MI_BATCH_BUFFER_END {
7359 uint32_t CommandType;
7360 uint32_t MICommandOpcode;
7361 };
7362
7363 static inline void
7364 GEN9_MI_BATCH_BUFFER_END_pack(__gen_user_data *data, void * restrict dst,
7365 const struct GEN9_MI_BATCH_BUFFER_END * restrict values)
7366 {
7367 uint32_t *dw = (uint32_t * restrict) dst;
7368
7369 dw[0] =
7370 __gen_field(values->CommandType, 29, 31) |
7371 __gen_field(values->MICommandOpcode, 23, 28) |
7372 0;
7373
7374 }
7375
7376 #define GEN9_MI_CLFLUSH_length_bias 0x00000002
7377 #define GEN9_MI_CLFLUSH_header \
7378 .CommandType = 0, \
7379 .MICommandOpcode = 39
7380
7381 #define GEN9_MI_CLFLUSH_length 0x00000000
7382
7383 struct GEN9_MI_CLFLUSH {
7384 uint32_t CommandType;
7385 uint32_t MICommandOpcode;
7386 #define PerProcessGraphicsAddress 0
7387 #define GlobalGraphicsAddress 1
7388 uint32_t UseGlobalGTT;
7389 uint32_t DwordLength;
7390 __gen_address_type PageBaseAddress;
7391 uint32_t StartingCachelineOffset;
7392 /* variable length fields follow */
7393 };
7394
7395 static inline void
7396 GEN9_MI_CLFLUSH_pack(__gen_user_data *data, void * restrict dst,
7397 const struct GEN9_MI_CLFLUSH * restrict values)
7398 {
7399 uint32_t *dw = (uint32_t * restrict) dst;
7400
7401 dw[0] =
7402 __gen_field(values->CommandType, 29, 31) |
7403 __gen_field(values->MICommandOpcode, 23, 28) |
7404 __gen_field(values->UseGlobalGTT, 22, 22) |
7405 __gen_field(values->DwordLength, 0, 9) |
7406 0;
7407
7408 uint32_t dw1 =
7409 __gen_field(values->StartingCachelineOffset, 6, 11) |
7410 0;
7411
7412 uint64_t qw1 =
7413 __gen_combine_address(data, &dw[1], values->PageBaseAddress, dw1);
7414
7415 dw[1] = qw1;
7416 dw[2] = qw1 >> 32;
7417
7418 /* variable length fields follow */
7419 }
7420
7421 #define GEN9_MI_COPY_MEM_MEM_length_bias 0x00000002
7422 #define GEN9_MI_COPY_MEM_MEM_header \
7423 .CommandType = 0, \
7424 .MICommandOpcode = 46, \
7425 .DwordLength = 3
7426
7427 #define GEN9_MI_COPY_MEM_MEM_length 0x00000005
7428
7429 struct GEN9_MI_COPY_MEM_MEM {
7430 uint32_t CommandType;
7431 uint32_t MICommandOpcode;
7432 #define PerProcessGraphicsAddress 0
7433 #define GlobalGraphicsAddress 1
7434 uint32_t UseGlobalGTTSource;
7435 #define PerProcessGraphicsAddress 0
7436 #define GlobalGraphicsAddress 1
7437 uint32_t UseGlobalGTTDestination;
7438 uint32_t DwordLength;
7439 __gen_address_type DestinationMemoryAddress;
7440 __gen_address_type SourceMemoryAddress;
7441 };
7442
7443 static inline void
7444 GEN9_MI_COPY_MEM_MEM_pack(__gen_user_data *data, void * restrict dst,
7445 const struct GEN9_MI_COPY_MEM_MEM * restrict values)
7446 {
7447 uint32_t *dw = (uint32_t * restrict) dst;
7448
7449 dw[0] =
7450 __gen_field(values->CommandType, 29, 31) |
7451 __gen_field(values->MICommandOpcode, 23, 28) |
7452 __gen_field(values->UseGlobalGTTSource, 22, 22) |
7453 __gen_field(values->UseGlobalGTTDestination, 21, 21) |
7454 __gen_field(values->DwordLength, 0, 7) |
7455 0;
7456
7457 uint32_t dw1 =
7458 0;
7459
7460 uint64_t qw1 =
7461 __gen_combine_address(data, &dw[1], values->DestinationMemoryAddress, dw1);
7462
7463 dw[1] = qw1;
7464 dw[2] = qw1 >> 32;
7465
7466 uint32_t dw3 =
7467 0;
7468
7469 uint64_t qw3 =
7470 __gen_combine_address(data, &dw[3], values->SourceMemoryAddress, dw3);
7471
7472 dw[3] = qw3;
7473 dw[4] = qw3 >> 32;
7474
7475 }
7476
7477 #define GEN9_MI_DISPLAY_FLIP_length_bias 0x00000002
7478 #define GEN9_MI_DISPLAY_FLIP_header \
7479 .CommandType = 0, \
7480 .MICommandOpcode = 20
7481
7482 #define GEN9_MI_DISPLAY_FLIP_length 0x00000003
7483
7484 struct GEN9_MI_DISPLAY_FLIP {
7485 uint32_t CommandType;
7486 uint32_t MICommandOpcode;
7487 bool AsyncFlipIndicator;
7488 #define DisplayPlane1 0
7489 #define DisplayPlane2 1
7490 #define DisplayPlane3 2
7491 #define DisplayPlane4 4
7492 #define DisplayPlane5 5
7493 #define DisplayPlane6 6
7494 #define DisplayPlane7 7
7495 #define DisplayPlane8 8
7496 #define DisplayPlane9 9
7497 #define DisplayPlane10 10
7498 #define DisplayPlane11 11
7499 #define DisplayPlane12 12
7500 uint32_t DisplayPlaneSelect;
7501 uint32_t DwordLength;
7502 bool Stereoscopic3DMode;
7503 uint32_t DisplayBufferPitch;
7504 #define Linear 0
7505 #define TiledX 1
7506 #define TiledYLegacyYB 4
7507 #define TiledYF 5
7508 bool TileParameter;
7509 __gen_address_type DisplayBufferBaseAddress;
7510 #define SyncFlip 0
7511 #define AsyncFlip 1
7512 #define Stereo3DFlip 2
7513 uint32_t FlipType;
7514 __gen_address_type LeftEyeDisplayBufferBaseAddress;
7515 };
7516
7517 static inline void
7518 GEN9_MI_DISPLAY_FLIP_pack(__gen_user_data *data, void * restrict dst,
7519 const struct GEN9_MI_DISPLAY_FLIP * restrict values)
7520 {
7521 uint32_t *dw = (uint32_t * restrict) dst;
7522
7523 dw[0] =
7524 __gen_field(values->CommandType, 29, 31) |
7525 __gen_field(values->MICommandOpcode, 23, 28) |
7526 __gen_field(values->AsyncFlipIndicator, 22, 22) |
7527 __gen_field(values->DisplayPlaneSelect, 8, 12) |
7528 __gen_field(values->DwordLength, 0, 7) |
7529 0;
7530
7531 dw[1] =
7532 __gen_field(values->Stereoscopic3DMode, 31, 31) |
7533 __gen_field(values->DisplayBufferPitch, 6, 15) |
7534 __gen_field(values->TileParameter, 0, 2) |
7535 0;
7536
7537 uint32_t dw2 =
7538 __gen_field(values->FlipType, 0, 1) |
7539 0;
7540
7541 dw[2] =
7542 __gen_combine_address(data, &dw[2], values->DisplayBufferBaseAddress, dw2);
7543
7544 uint32_t dw3 =
7545 0;
7546
7547 dw[3] =
7548 __gen_combine_address(data, &dw[3], values->LeftEyeDisplayBufferBaseAddress, dw3);
7549
7550 }
7551
7552 #define GEN9_MI_LOAD_REGISTER_MEM_length_bias 0x00000002
7553 #define GEN9_MI_LOAD_REGISTER_MEM_header \
7554 .CommandType = 0, \
7555 .MICommandOpcode = 41, \
7556 .DwordLength = 2
7557
7558 #define GEN9_MI_LOAD_REGISTER_MEM_length 0x00000004
7559
7560 struct GEN9_MI_LOAD_REGISTER_MEM {
7561 uint32_t CommandType;
7562 uint32_t MICommandOpcode;
7563 bool UseGlobalGTT;
7564 uint32_t AsyncModeEnable;
7565 uint32_t DwordLength;
7566 uint32_t RegisterAddress;
7567 __gen_address_type MemoryAddress;
7568 };
7569
7570 static inline void
7571 GEN9_MI_LOAD_REGISTER_MEM_pack(__gen_user_data *data, void * restrict dst,
7572 const struct GEN9_MI_LOAD_REGISTER_MEM * restrict values)
7573 {
7574 uint32_t *dw = (uint32_t * restrict) dst;
7575
7576 dw[0] =
7577 __gen_field(values->CommandType, 29, 31) |
7578 __gen_field(values->MICommandOpcode, 23, 28) |
7579 __gen_field(values->UseGlobalGTT, 22, 22) |
7580 __gen_field(values->AsyncModeEnable, 21, 21) |
7581 __gen_field(values->DwordLength, 0, 7) |
7582 0;
7583
7584 dw[1] =
7585 __gen_offset(values->RegisterAddress, 2, 22) |
7586 0;
7587
7588 uint32_t dw2 =
7589 0;
7590
7591 uint64_t qw2 =
7592 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
7593
7594 dw[2] = qw2;
7595 dw[3] = qw2 >> 32;
7596
7597 }
7598
7599 #define GEN9_MI_LOAD_SCAN_LINES_EXCL_length_bias 0x00000002
7600 #define GEN9_MI_LOAD_SCAN_LINES_EXCL_header \
7601 .CommandType = 0, \
7602 .MICommandOpcode = 19, \
7603 .DwordLength = 0
7604
7605 #define GEN9_MI_LOAD_SCAN_LINES_EXCL_length 0x00000002
7606
7607 struct GEN9_MI_LOAD_SCAN_LINES_EXCL {
7608 uint32_t CommandType;
7609 uint32_t MICommandOpcode;
7610 #define DisplayPlaneA 0
7611 #define DisplayPlaneB 1
7612 #define DisplayPlaneC 4
7613 uint32_t DisplayPlaneSelect;
7614 uint32_t DwordLength;
7615 uint32_t StartScanLineNumber;
7616 uint32_t EndScanLineNumber;
7617 };
7618
7619 static inline void
7620 GEN9_MI_LOAD_SCAN_LINES_EXCL_pack(__gen_user_data *data, void * restrict dst,
7621 const struct GEN9_MI_LOAD_SCAN_LINES_EXCL * restrict values)
7622 {
7623 uint32_t *dw = (uint32_t * restrict) dst;
7624
7625 dw[0] =
7626 __gen_field(values->CommandType, 29, 31) |
7627 __gen_field(values->MICommandOpcode, 23, 28) |
7628 __gen_field(values->DisplayPlaneSelect, 19, 21) |
7629 __gen_field(values->DwordLength, 0, 5) |
7630 0;
7631
7632 dw[1] =
7633 __gen_field(values->StartScanLineNumber, 16, 28) |
7634 __gen_field(values->EndScanLineNumber, 0, 12) |
7635 0;
7636
7637 }
7638
7639 #define GEN9_MI_LOAD_SCAN_LINES_INCL_length_bias 0x00000002
7640 #define GEN9_MI_LOAD_SCAN_LINES_INCL_header \
7641 .CommandType = 0, \
7642 .MICommandOpcode = 18, \
7643 .DwordLength = 0
7644
7645 #define GEN9_MI_LOAD_SCAN_LINES_INCL_length 0x00000002
7646
7647 struct GEN9_MI_LOAD_SCAN_LINES_INCL {
7648 uint32_t CommandType;
7649 uint32_t MICommandOpcode;
7650 #define DisplayPlane1A 0
7651 #define DisplayPlane1B 1
7652 #define DisplayPlane1C 4
7653 uint32_t DisplayPlaneSelect;
7654 #define NeverForward 0
7655 #define AlwaysForward 1
7656 #define ConditionallyForward 2
7657 bool ScanLineEventDoneForward;
7658 uint32_t DwordLength;
7659 uint32_t StartScanLineNumber;
7660 uint32_t EndScanLineNumber;
7661 };
7662
7663 static inline void
7664 GEN9_MI_LOAD_SCAN_LINES_INCL_pack(__gen_user_data *data, void * restrict dst,
7665 const struct GEN9_MI_LOAD_SCAN_LINES_INCL * restrict values)
7666 {
7667 uint32_t *dw = (uint32_t * restrict) dst;
7668
7669 dw[0] =
7670 __gen_field(values->CommandType, 29, 31) |
7671 __gen_field(values->MICommandOpcode, 23, 28) |
7672 __gen_field(values->DisplayPlaneSelect, 19, 21) |
7673 __gen_field(values->ScanLineEventDoneForward, 17, 18) |
7674 __gen_field(values->DwordLength, 0, 5) |
7675 0;
7676
7677 dw[1] =
7678 __gen_field(values->StartScanLineNumber, 16, 28) |
7679 __gen_field(values->EndScanLineNumber, 0, 12) |
7680 0;
7681
7682 }
7683
7684 #define GEN9_MI_LOAD_URB_MEM_length_bias 0x00000002
7685 #define GEN9_MI_LOAD_URB_MEM_header \
7686 .CommandType = 0, \
7687 .MICommandOpcode = 44, \
7688 .DwordLength = 2
7689
7690 #define GEN9_MI_LOAD_URB_MEM_length 0x00000004
7691
7692 struct GEN9_MI_LOAD_URB_MEM {
7693 uint32_t CommandType;
7694 uint32_t MICommandOpcode;
7695 uint32_t DwordLength;
7696 uint32_t URBAddress;
7697 __gen_address_type MemoryAddress;
7698 };
7699
7700 static inline void
7701 GEN9_MI_LOAD_URB_MEM_pack(__gen_user_data *data, void * restrict dst,
7702 const struct GEN9_MI_LOAD_URB_MEM * restrict values)
7703 {
7704 uint32_t *dw = (uint32_t * restrict) dst;
7705
7706 dw[0] =
7707 __gen_field(values->CommandType, 29, 31) |
7708 __gen_field(values->MICommandOpcode, 23, 28) |
7709 __gen_field(values->DwordLength, 0, 7) |
7710 0;
7711
7712 dw[1] =
7713 __gen_field(values->URBAddress, 2, 14) |
7714 0;
7715
7716 uint32_t dw2 =
7717 0;
7718
7719 uint64_t qw2 =
7720 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
7721
7722 dw[2] = qw2;
7723 dw[3] = qw2 >> 32;
7724
7725 }
7726
7727 #define GEN9_MI_MATH_length_bias 0x00000002
7728 #define GEN9_MI_MATH_header \
7729 .CommandType = 0, \
7730 .MICommandOpcode = 26
7731
7732 #define GEN9_MI_MATH_length 0x00000000
7733
7734 struct GEN9_MI_MATH {
7735 uint32_t CommandType;
7736 uint32_t MICommandOpcode;
7737 uint32_t DwordLength;
7738 uint32_t ALUINSTRUCTION1;
7739 uint32_t ALUINSTRUCTION2;
7740 /* variable length fields follow */
7741 };
7742
7743 static inline void
7744 GEN9_MI_MATH_pack(__gen_user_data *data, void * restrict dst,
7745 const struct GEN9_MI_MATH * restrict values)
7746 {
7747 uint32_t *dw = (uint32_t * restrict) dst;
7748
7749 dw[0] =
7750 __gen_field(values->CommandType, 29, 31) |
7751 __gen_field(values->MICommandOpcode, 23, 28) |
7752 __gen_field(values->DwordLength, 0, 7) |
7753 0;
7754
7755 dw[1] =
7756 __gen_field(values->ALUINSTRUCTION1, 0, 31) |
7757 0;
7758
7759 dw[2] =
7760 __gen_field(values->ALUINSTRUCTION2, 0, 31) |
7761 0;
7762
7763 /* variable length fields follow */
7764 }
7765
7766 #define GEN9_MI_NOOP_length_bias 0x00000001
7767 #define GEN9_MI_NOOP_header \
7768 .CommandType = 0, \
7769 .MICommandOpcode = 0
7770
7771 #define GEN9_MI_NOOP_length 0x00000001
7772
7773 struct GEN9_MI_NOOP {
7774 uint32_t CommandType;
7775 uint32_t MICommandOpcode;
7776 bool IdentificationNumberRegisterWriteEnable;
7777 uint32_t IdentificationNumber;
7778 };
7779
7780 static inline void
7781 GEN9_MI_NOOP_pack(__gen_user_data *data, void * restrict dst,
7782 const struct GEN9_MI_NOOP * restrict values)
7783 {
7784 uint32_t *dw = (uint32_t * restrict) dst;
7785
7786 dw[0] =
7787 __gen_field(values->CommandType, 29, 31) |
7788 __gen_field(values->MICommandOpcode, 23, 28) |
7789 __gen_field(values->IdentificationNumberRegisterWriteEnable, 22, 22) |
7790 __gen_field(values->IdentificationNumber, 0, 21) |
7791 0;
7792
7793 }
7794
7795 #define GEN9_MI_PREDICATE_length_bias 0x00000001
7796 #define GEN9_MI_PREDICATE_header \
7797 .CommandType = 0, \
7798 .MICommandOpcode = 12
7799
7800 #define GEN9_MI_PREDICATE_length 0x00000001
7801
7802 struct GEN9_MI_PREDICATE {
7803 uint32_t CommandType;
7804 uint32_t MICommandOpcode;
7805 #define LOAD_KEEP 0
7806 #define LOAD_LOAD 2
7807 #define LOAD_LOADINV 3
7808 uint32_t LoadOperation;
7809 #define COMBINE_SET 0
7810 #define COMBINE_AND 1
7811 #define COMBINE_OR 2
7812 #define COMBINE_XOR 3
7813 uint32_t CombineOperation;
7814 #define COMPARE_SRCS_EQUAL 2
7815 #define COMPARE_DELTAS_EQUAL 3
7816 uint32_t CompareOperation;
7817 };
7818
7819 static inline void
7820 GEN9_MI_PREDICATE_pack(__gen_user_data *data, void * restrict dst,
7821 const struct GEN9_MI_PREDICATE * restrict values)
7822 {
7823 uint32_t *dw = (uint32_t * restrict) dst;
7824
7825 dw[0] =
7826 __gen_field(values->CommandType, 29, 31) |
7827 __gen_field(values->MICommandOpcode, 23, 28) |
7828 __gen_field(values->LoadOperation, 6, 7) |
7829 __gen_field(values->CombineOperation, 3, 4) |
7830 __gen_field(values->CompareOperation, 0, 1) |
7831 0;
7832
7833 }
7834
7835 #define GEN9_MI_REPORT_HEAD_length_bias 0x00000001
7836 #define GEN9_MI_REPORT_HEAD_header \
7837 .CommandType = 0, \
7838 .MICommandOpcode = 7
7839
7840 #define GEN9_MI_REPORT_HEAD_length 0x00000001
7841
7842 struct GEN9_MI_REPORT_HEAD {
7843 uint32_t CommandType;
7844 uint32_t MICommandOpcode;
7845 };
7846
7847 static inline void
7848 GEN9_MI_REPORT_HEAD_pack(__gen_user_data *data, void * restrict dst,
7849 const struct GEN9_MI_REPORT_HEAD * restrict values)
7850 {
7851 uint32_t *dw = (uint32_t * restrict) dst;
7852
7853 dw[0] =
7854 __gen_field(values->CommandType, 29, 31) |
7855 __gen_field(values->MICommandOpcode, 23, 28) |
7856 0;
7857
7858 }
7859
7860 #define GEN9_MI_RS_CONTEXT_length_bias 0x00000001
7861 #define GEN9_MI_RS_CONTEXT_header \
7862 .CommandType = 0, \
7863 .MICommandOpcode = 15
7864
7865 #define GEN9_MI_RS_CONTEXT_length 0x00000001
7866
7867 struct GEN9_MI_RS_CONTEXT {
7868 uint32_t CommandType;
7869 uint32_t MICommandOpcode;
7870 #define RS_RESTORE 0
7871 #define RS_SAVE 1
7872 uint32_t ResourceStreamerSave;
7873 };
7874
7875 static inline void
7876 GEN9_MI_RS_CONTEXT_pack(__gen_user_data *data, void * restrict dst,
7877 const struct GEN9_MI_RS_CONTEXT * restrict values)
7878 {
7879 uint32_t *dw = (uint32_t * restrict) dst;
7880
7881 dw[0] =
7882 __gen_field(values->CommandType, 29, 31) |
7883 __gen_field(values->MICommandOpcode, 23, 28) |
7884 __gen_field(values->ResourceStreamerSave, 0, 0) |
7885 0;
7886
7887 }
7888
7889 #define GEN9_MI_RS_CONTROL_length_bias 0x00000001
7890 #define GEN9_MI_RS_CONTROL_header \
7891 .CommandType = 0, \
7892 .MICommandOpcode = 6
7893
7894 #define GEN9_MI_RS_CONTROL_length 0x00000001
7895
7896 struct GEN9_MI_RS_CONTROL {
7897 uint32_t CommandType;
7898 uint32_t MICommandOpcode;
7899 #define RS_STOP 0
7900 #define RS_START 1
7901 uint32_t ResourceStreamerControl;
7902 };
7903
7904 static inline void
7905 GEN9_MI_RS_CONTROL_pack(__gen_user_data *data, void * restrict dst,
7906 const struct GEN9_MI_RS_CONTROL * restrict values)
7907 {
7908 uint32_t *dw = (uint32_t * restrict) dst;
7909
7910 dw[0] =
7911 __gen_field(values->CommandType, 29, 31) |
7912 __gen_field(values->MICommandOpcode, 23, 28) |
7913 __gen_field(values->ResourceStreamerControl, 0, 0) |
7914 0;
7915
7916 }
7917
7918 #define GEN9_MI_RS_STORE_DATA_IMM_length_bias 0x00000002
7919 #define GEN9_MI_RS_STORE_DATA_IMM_header \
7920 .CommandType = 0, \
7921 .MICommandOpcode = 43, \
7922 .DwordLength = 2
7923
7924 #define GEN9_MI_RS_STORE_DATA_IMM_length 0x00000004
7925
7926 struct GEN9_MI_RS_STORE_DATA_IMM {
7927 uint32_t CommandType;
7928 uint32_t MICommandOpcode;
7929 uint32_t DwordLength;
7930 __gen_address_type DestinationAddress;
7931 uint32_t CoreModeEnable;
7932 uint32_t DataDWord0;
7933 };
7934
7935 static inline void
7936 GEN9_MI_RS_STORE_DATA_IMM_pack(__gen_user_data *data, void * restrict dst,
7937 const struct GEN9_MI_RS_STORE_DATA_IMM * restrict values)
7938 {
7939 uint32_t *dw = (uint32_t * restrict) dst;
7940
7941 dw[0] =
7942 __gen_field(values->CommandType, 29, 31) |
7943 __gen_field(values->MICommandOpcode, 23, 28) |
7944 __gen_field(values->DwordLength, 0, 7) |
7945 0;
7946
7947 uint32_t dw1 =
7948 __gen_field(values->CoreModeEnable, 0, 0) |
7949 0;
7950
7951 uint64_t qw1 =
7952 __gen_combine_address(data, &dw[1], values->DestinationAddress, dw1);
7953
7954 dw[1] = qw1;
7955 dw[2] = qw1 >> 32;
7956
7957 dw[3] =
7958 __gen_field(values->DataDWord0, 0, 31) |
7959 0;
7960
7961 }
7962
7963 #define GEN9_MI_SET_CONTEXT_length_bias 0x00000002
7964 #define GEN9_MI_SET_CONTEXT_header \
7965 .CommandType = 0, \
7966 .MICommandOpcode = 24, \
7967 .DwordLength = 0
7968
7969 #define GEN9_MI_SET_CONTEXT_length 0x00000002
7970
7971 struct GEN9_MI_SET_CONTEXT {
7972 uint32_t CommandType;
7973 uint32_t MICommandOpcode;
7974 uint32_t DwordLength;
7975 __gen_address_type LogicalContextAddress;
7976 uint32_t ReservedMustbe1;
7977 bool CoreModeEnable;
7978 bool ResourceStreamerStateSaveEnable;
7979 bool ResourceStreamerStateRestoreEnable;
7980 uint32_t ForceRestore;
7981 uint32_t RestoreInhibit;
7982 };
7983
7984 static inline void
7985 GEN9_MI_SET_CONTEXT_pack(__gen_user_data *data, void * restrict dst,
7986 const struct GEN9_MI_SET_CONTEXT * restrict values)
7987 {
7988 uint32_t *dw = (uint32_t * restrict) dst;
7989
7990 dw[0] =
7991 __gen_field(values->CommandType, 29, 31) |
7992 __gen_field(values->MICommandOpcode, 23, 28) |
7993 __gen_field(values->DwordLength, 0, 7) |
7994 0;
7995
7996 uint32_t dw1 =
7997 __gen_field(values->ReservedMustbe1, 8, 8) |
7998 __gen_field(values->CoreModeEnable, 4, 4) |
7999 __gen_field(values->ResourceStreamerStateSaveEnable, 3, 3) |
8000 __gen_field(values->ResourceStreamerStateRestoreEnable, 2, 2) |
8001 __gen_field(values->ForceRestore, 1, 1) |
8002 __gen_field(values->RestoreInhibit, 0, 0) |
8003 0;
8004
8005 dw[1] =
8006 __gen_combine_address(data, &dw[1], values->LogicalContextAddress, dw1);
8007
8008 }
8009
8010 #define GEN9_MI_SET_PREDICATE_length_bias 0x00000001
8011 #define GEN9_MI_SET_PREDICATE_header \
8012 .CommandType = 0, \
8013 .MICommandOpcode = 1
8014
8015 #define GEN9_MI_SET_PREDICATE_length 0x00000001
8016
8017 struct GEN9_MI_SET_PREDICATE {
8018 uint32_t CommandType;
8019 uint32_t MICommandOpcode;
8020 #define NOOPNever 0
8021 #define NOOPonResult2clear 1
8022 #define NOOPonResult2set 2
8023 #define NOOPonResultclear 3
8024 #define NOOPonResultset 4
8025 #define Executewhenonesliceenabled 5
8026 #define Executewhentwoslicesareenabled 6
8027 #define Executewhenthreeslicesareenabled 7
8028 #define NOOPAlways 15
8029 uint32_t PREDICATEENABLE;
8030 };
8031
8032 static inline void
8033 GEN9_MI_SET_PREDICATE_pack(__gen_user_data *data, void * restrict dst,
8034 const struct GEN9_MI_SET_PREDICATE * restrict values)
8035 {
8036 uint32_t *dw = (uint32_t * restrict) dst;
8037
8038 dw[0] =
8039 __gen_field(values->CommandType, 29, 31) |
8040 __gen_field(values->MICommandOpcode, 23, 28) |
8041 __gen_field(values->PREDICATEENABLE, 0, 3) |
8042 0;
8043
8044 }
8045
8046 #define GEN9_MI_STORE_DATA_INDEX_length_bias 0x00000002
8047 #define GEN9_MI_STORE_DATA_INDEX_header \
8048 .CommandType = 0, \
8049 .MICommandOpcode = 33, \
8050 .DwordLength = 1
8051
8052 #define GEN9_MI_STORE_DATA_INDEX_length 0x00000003
8053
8054 struct GEN9_MI_STORE_DATA_INDEX {
8055 uint32_t CommandType;
8056 uint32_t MICommandOpcode;
8057 uint32_t UsePerProcessHardwareStatusPage;
8058 uint32_t DwordLength;
8059 uint32_t Offset;
8060 uint32_t DataDWord0;
8061 uint32_t DataDWord1;
8062 };
8063
8064 static inline void
8065 GEN9_MI_STORE_DATA_INDEX_pack(__gen_user_data *data, void * restrict dst,
8066 const struct GEN9_MI_STORE_DATA_INDEX * restrict values)
8067 {
8068 uint32_t *dw = (uint32_t * restrict) dst;
8069
8070 dw[0] =
8071 __gen_field(values->CommandType, 29, 31) |
8072 __gen_field(values->MICommandOpcode, 23, 28) |
8073 __gen_field(values->UsePerProcessHardwareStatusPage, 21, 21) |
8074 __gen_field(values->DwordLength, 0, 7) |
8075 0;
8076
8077 dw[1] =
8078 __gen_field(values->Offset, 2, 11) |
8079 0;
8080
8081 dw[2] =
8082 __gen_field(values->DataDWord0, 0, 31) |
8083 0;
8084
8085 dw[3] =
8086 __gen_field(values->DataDWord1, 0, 31) |
8087 0;
8088
8089 }
8090
8091 #define GEN9_MI_STORE_URB_MEM_length_bias 0x00000002
8092 #define GEN9_MI_STORE_URB_MEM_header \
8093 .CommandType = 0, \
8094 .MICommandOpcode = 45, \
8095 .DwordLength = 2
8096
8097 #define GEN9_MI_STORE_URB_MEM_length 0x00000004
8098
8099 struct GEN9_MI_STORE_URB_MEM {
8100 uint32_t CommandType;
8101 uint32_t MICommandOpcode;
8102 uint32_t DwordLength;
8103 uint32_t URBAddress;
8104 __gen_address_type MemoryAddress;
8105 };
8106
8107 static inline void
8108 GEN9_MI_STORE_URB_MEM_pack(__gen_user_data *data, void * restrict dst,
8109 const struct GEN9_MI_STORE_URB_MEM * restrict values)
8110 {
8111 uint32_t *dw = (uint32_t * restrict) dst;
8112
8113 dw[0] =
8114 __gen_field(values->CommandType, 29, 31) |
8115 __gen_field(values->MICommandOpcode, 23, 28) |
8116 __gen_field(values->DwordLength, 0, 7) |
8117 0;
8118
8119 dw[1] =
8120 __gen_field(values->URBAddress, 2, 14) |
8121 0;
8122
8123 uint32_t dw2 =
8124 0;
8125
8126 uint64_t qw2 =
8127 __gen_combine_address(data, &dw[2], values->MemoryAddress, dw2);
8128
8129 dw[2] = qw2;
8130 dw[3] = qw2 >> 32;
8131
8132 }
8133
8134 #define GEN9_MI_SUSPEND_FLUSH_length_bias 0x00000001
8135 #define GEN9_MI_SUSPEND_FLUSH_header \
8136 .CommandType = 0, \
8137 .MICommandOpcode = 11
8138
8139 #define GEN9_MI_SUSPEND_FLUSH_length 0x00000001
8140
8141 struct GEN9_MI_SUSPEND_FLUSH {
8142 uint32_t CommandType;
8143 uint32_t MICommandOpcode;
8144 bool SuspendFlush;
8145 };
8146
8147 static inline void
8148 GEN9_MI_SUSPEND_FLUSH_pack(__gen_user_data *data, void * restrict dst,
8149 const struct GEN9_MI_SUSPEND_FLUSH * restrict values)
8150 {
8151 uint32_t *dw = (uint32_t * restrict) dst;
8152
8153 dw[0] =
8154 __gen_field(values->CommandType, 29, 31) |
8155 __gen_field(values->MICommandOpcode, 23, 28) |
8156 __gen_field(values->SuspendFlush, 0, 0) |
8157 0;
8158
8159 }
8160
8161 #define GEN9_MI_TOPOLOGY_FILTER_length_bias 0x00000001
8162 #define GEN9_MI_TOPOLOGY_FILTER_header \
8163 .CommandType = 0, \
8164 .MICommandOpcode = 13
8165
8166 #define GEN9_MI_TOPOLOGY_FILTER_length 0x00000001
8167
8168 struct GEN9_MI_TOPOLOGY_FILTER {
8169 uint32_t CommandType;
8170 uint32_t MICommandOpcode;
8171 uint32_t TopologyFilterValue;
8172 };
8173
8174 static inline void
8175 GEN9_MI_TOPOLOGY_FILTER_pack(__gen_user_data *data, void * restrict dst,
8176 const struct GEN9_MI_TOPOLOGY_FILTER * restrict values)
8177 {
8178 uint32_t *dw = (uint32_t * restrict) dst;
8179
8180 dw[0] =
8181 __gen_field(values->CommandType, 29, 31) |
8182 __gen_field(values->MICommandOpcode, 23, 28) |
8183 __gen_field(values->TopologyFilterValue, 0, 5) |
8184 0;
8185
8186 }
8187
8188 #define GEN9_MI_UPDATE_GTT_length_bias 0x00000002
8189 #define GEN9_MI_UPDATE_GTT_header \
8190 .CommandType = 0, \
8191 .MICommandOpcode = 35
8192
8193 #define GEN9_MI_UPDATE_GTT_length 0x00000000
8194
8195 struct GEN9_MI_UPDATE_GTT {
8196 uint32_t CommandType;
8197 uint32_t MICommandOpcode;
8198 uint32_t DwordLength;
8199 __gen_address_type EntryAddress;
8200 /* variable length fields follow */
8201 };
8202
8203 static inline void
8204 GEN9_MI_UPDATE_GTT_pack(__gen_user_data *data, void * restrict dst,
8205 const struct GEN9_MI_UPDATE_GTT * restrict values)
8206 {
8207 uint32_t *dw = (uint32_t * restrict) dst;
8208
8209 dw[0] =
8210 __gen_field(values->CommandType, 29, 31) |
8211 __gen_field(values->MICommandOpcode, 23, 28) |
8212 __gen_field(values->DwordLength, 0, 9) |
8213 0;
8214
8215 uint32_t dw1 =
8216 0;
8217
8218 dw[1] =
8219 __gen_combine_address(data, &dw[1], values->EntryAddress, dw1);
8220
8221 /* variable length fields follow */
8222 }
8223
8224 #define GEN9_MI_URB_ATOMIC_ALLOC_length_bias 0x00000001
8225 #define GEN9_MI_URB_ATOMIC_ALLOC_header \
8226 .CommandType = 0, \
8227 .MICommandOpcode = 9
8228
8229 #define GEN9_MI_URB_ATOMIC_ALLOC_length 0x00000001
8230
8231 struct GEN9_MI_URB_ATOMIC_ALLOC {
8232 uint32_t CommandType;
8233 uint32_t MICommandOpcode;
8234 uint32_t URBAtomicStorageOffset;
8235 uint32_t URBAtomicStorageSize;
8236 };
8237
8238 static inline void
8239 GEN9_MI_URB_ATOMIC_ALLOC_pack(__gen_user_data *data, void * restrict dst,
8240 const struct GEN9_MI_URB_ATOMIC_ALLOC * restrict values)
8241 {
8242 uint32_t *dw = (uint32_t * restrict) dst;
8243
8244 dw[0] =
8245 __gen_field(values->CommandType, 29, 31) |
8246 __gen_field(values->MICommandOpcode, 23, 28) |
8247 __gen_field(values->URBAtomicStorageOffset, 12, 19) |
8248 __gen_field(values->URBAtomicStorageSize, 0, 8) |
8249 0;
8250
8251 }
8252
8253 #define GEN9_MI_USER_INTERRUPT_length_bias 0x00000001
8254 #define GEN9_MI_USER_INTERRUPT_header \
8255 .CommandType = 0, \
8256 .MICommandOpcode = 2
8257
8258 #define GEN9_MI_USER_INTERRUPT_length 0x00000001
8259
8260 struct GEN9_MI_USER_INTERRUPT {
8261 uint32_t CommandType;
8262 uint32_t MICommandOpcode;
8263 };
8264
8265 static inline void
8266 GEN9_MI_USER_INTERRUPT_pack(__gen_user_data *data, void * restrict dst,
8267 const struct GEN9_MI_USER_INTERRUPT * restrict values)
8268 {
8269 uint32_t *dw = (uint32_t * restrict) dst;
8270
8271 dw[0] =
8272 __gen_field(values->CommandType, 29, 31) |
8273 __gen_field(values->MICommandOpcode, 23, 28) |
8274 0;
8275
8276 }
8277
8278 #define GEN9_MI_WAIT_FOR_EVENT_length_bias 0x00000001
8279 #define GEN9_MI_WAIT_FOR_EVENT_header \
8280 .CommandType = 0, \
8281 .MICommandOpcode = 3
8282
8283 #define GEN9_MI_WAIT_FOR_EVENT_length 0x00000001
8284
8285 struct GEN9_MI_WAIT_FOR_EVENT {
8286 uint32_t CommandType;
8287 uint32_t MICommandOpcode;
8288 bool DisplayPlane1CVerticalBlankWaitEnable;
8289 bool DisplayPlane6FlipPendingWaitEnable;
8290 bool DisplayPlane12FlipPendingWaitEnable;
8291 bool DisplayPlane11FlipPendingWaitEnable;
8292 bool DisplayPlane10FlipPendingWaitEnable;
8293 bool DisplayPlane9FlipPendingWaitEnable;
8294 bool DisplayPlane3FlipPendingWaitEnable;
8295 bool DisplayPlane1CScanLineWaitEnable;
8296 bool DisplayPlane1BVerticalBlankWaitEnable;
8297 bool DisplayPlane5FlipPendingWaitEnable;
8298 bool DisplayPlane2FlipPendingWaitEnable;
8299 bool DisplayPlane1BScanLineWaitEnable;
8300 bool DisplayPlane8FlipPendingWaitEnable;
8301 bool DisplayPlane7FlipPendingWaitEnable;
8302 bool DisplayPlane1AVerticalBlankWaitEnable;
8303 bool DisplayPlane4FlipPendingWaitEnable;
8304 bool DisplayPlane1FlipPendingWaitEnable;
8305 bool DisplayPlnae1AScanLineWaitEnable;
8306 };
8307
8308 static inline void
8309 GEN9_MI_WAIT_FOR_EVENT_pack(__gen_user_data *data, void * restrict dst,
8310 const struct GEN9_MI_WAIT_FOR_EVENT * restrict values)
8311 {
8312 uint32_t *dw = (uint32_t * restrict) dst;
8313
8314 dw[0] =
8315 __gen_field(values->CommandType, 29, 31) |
8316 __gen_field(values->MICommandOpcode, 23, 28) |
8317 __gen_field(values->DisplayPlane1CVerticalBlankWaitEnable, 21, 21) |
8318 __gen_field(values->DisplayPlane6FlipPendingWaitEnable, 20, 20) |
8319 __gen_field(values->DisplayPlane12FlipPendingWaitEnable, 19, 19) |
8320 __gen_field(values->DisplayPlane11FlipPendingWaitEnable, 18, 18) |
8321 __gen_field(values->DisplayPlane10FlipPendingWaitEnable, 17, 17) |
8322 __gen_field(values->DisplayPlane9FlipPendingWaitEnable, 16, 16) |
8323 __gen_field(values->DisplayPlane3FlipPendingWaitEnable, 15, 15) |
8324 __gen_field(values->DisplayPlane1CScanLineWaitEnable, 14, 14) |
8325 __gen_field(values->DisplayPlane1BVerticalBlankWaitEnable, 11, 11) |
8326 __gen_field(values->DisplayPlane5FlipPendingWaitEnable, 10, 10) |
8327 __gen_field(values->DisplayPlane2FlipPendingWaitEnable, 9, 9) |
8328 __gen_field(values->DisplayPlane1BScanLineWaitEnable, 8, 8) |
8329 __gen_field(values->DisplayPlane8FlipPendingWaitEnable, 7, 7) |
8330 __gen_field(values->DisplayPlane7FlipPendingWaitEnable, 6, 6) |
8331 __gen_field(values->DisplayPlane1AVerticalBlankWaitEnable, 3, 3) |
8332 __gen_field(values->DisplayPlane4FlipPendingWaitEnable, 2, 2) |
8333 __gen_field(values->DisplayPlane1FlipPendingWaitEnable, 1, 1) |
8334 __gen_field(values->DisplayPlnae1AScanLineWaitEnable, 0, 0) |
8335 0;
8336
8337 }
8338
8339 #define GEN9_PIPE_CONTROL_length_bias 0x00000002
8340 #define GEN9_PIPE_CONTROL_header \
8341 .CommandType = 3, \
8342 .CommandSubType = 3, \
8343 ._3DCommandOpcode = 2, \
8344 ._3DCommandSubOpcode = 0, \
8345 .DwordLength = 4
8346
8347 #define GEN9_PIPE_CONTROL_length 0x00000006
8348
8349 struct GEN9_PIPE_CONTROL {
8350 uint32_t CommandType;
8351 uint32_t CommandSubType;
8352 uint32_t _3DCommandOpcode;
8353 uint32_t _3DCommandSubOpcode;
8354 uint32_t DwordLength;
8355 bool FlushLLC;
8356 #define DAT_PPGTT 0
8357 #define DAT_GGTT 1
8358 uint32_t DestinationAddressType;
8359 #define NoLRIOperation 0
8360 #define MMIOWriteImmediateData 1
8361 uint32_t LRIPostSyncOperation;
8362 uint32_t StoreDataIndex;
8363 uint32_t CommandStreamerStallEnable;
8364 #define DontReset 0
8365 #define Reset 1
8366 uint32_t GlobalSnapshotCountReset;
8367 uint32_t TLBInvalidate;
8368 bool GenericMediaStateClear;
8369 #define NoWrite 0
8370 #define WriteImmediateData 1
8371 #define WritePSDepthCount 2
8372 #define WriteTimestamp 3
8373 uint32_t PostSyncOperation;
8374 bool DepthStallEnable;
8375 #define DisableFlush 0
8376 #define EnableFlush 1
8377 bool RenderTargetCacheFlushEnable;
8378 bool InstructionCacheInvalidateEnable;
8379 bool TextureCacheInvalidationEnable;
8380 bool IndirectStatePointersDisable;
8381 bool NotifyEnable;
8382 bool PipeControlFlushEnable;
8383 bool DCFlushEnable;
8384 bool VFCacheInvalidationEnable;
8385 bool ConstantCacheInvalidationEnable;
8386 bool StateCacheInvalidationEnable;
8387 bool StallAtPixelScoreboard;
8388 #define FlushDisabled 0
8389 #define FlushEnabled 1
8390 bool DepthCacheFlushEnable;
8391 __gen_address_type Address;
8392 uint64_t ImmediateData;
8393 };
8394
8395 static inline void
8396 GEN9_PIPE_CONTROL_pack(__gen_user_data *data, void * restrict dst,
8397 const struct GEN9_PIPE_CONTROL * restrict values)
8398 {
8399 uint32_t *dw = (uint32_t * restrict) dst;
8400
8401 dw[0] =
8402 __gen_field(values->CommandType, 29, 31) |
8403 __gen_field(values->CommandSubType, 27, 28) |
8404 __gen_field(values->_3DCommandOpcode, 24, 26) |
8405 __gen_field(values->_3DCommandSubOpcode, 16, 23) |
8406 __gen_field(values->DwordLength, 0, 7) |
8407 0;
8408
8409 dw[1] =
8410 __gen_field(values->FlushLLC, 26, 26) |
8411 __gen_field(values->DestinationAddressType, 24, 24) |
8412 __gen_field(values->LRIPostSyncOperation, 23, 23) |
8413 __gen_field(values->StoreDataIndex, 21, 21) |
8414 __gen_field(values->CommandStreamerStallEnable, 20, 20) |
8415 __gen_field(values->GlobalSnapshotCountReset, 19, 19) |
8416 __gen_field(values->TLBInvalidate, 18, 18) |
8417 __gen_field(values->GenericMediaStateClear, 16, 16) |
8418 __gen_field(values->PostSyncOperation, 14, 15) |
8419 __gen_field(values->DepthStallEnable, 13, 13) |
8420 __gen_field(values->RenderTargetCacheFlushEnable, 12, 12) |
8421 __gen_field(values->InstructionCacheInvalidateEnable, 11, 11) |
8422 __gen_field(values->TextureCacheInvalidationEnable, 10, 10) |
8423 __gen_field(values->IndirectStatePointersDisable, 9, 9) |
8424 __gen_field(values->NotifyEnable, 8, 8) |
8425 __gen_field(values->PipeControlFlushEnable, 7, 7) |
8426 __gen_field(values->DCFlushEnable, 5, 5) |
8427 __gen_field(values->VFCacheInvalidationEnable, 4, 4) |
8428 __gen_field(values->ConstantCacheInvalidationEnable, 3, 3) |
8429 __gen_field(values->StateCacheInvalidationEnable, 2, 2) |
8430 __gen_field(values->StallAtPixelScoreboard, 1, 1) |
8431 __gen_field(values->DepthCacheFlushEnable, 0, 0) |
8432 0;
8433
8434 uint32_t dw2 =
8435 0;
8436
8437 uint64_t qw2 =
8438 __gen_combine_address(data, &dw[2], values->Address, dw2);
8439
8440 dw[2] = qw2;
8441 dw[3] = qw2 >> 32;
8442
8443 uint64_t qw4 =
8444 __gen_field(values->ImmediateData, 0, 63) |
8445 0;
8446
8447 dw[4] = qw4;
8448 dw[5] = qw4 >> 32;
8449
8450 }
8451
8452 #define GEN9_SCISSOR_RECT_length 0x00000002
8453
8454 struct GEN9_SCISSOR_RECT {
8455 uint32_t ScissorRectangleYMin;
8456 uint32_t ScissorRectangleXMin;
8457 uint32_t ScissorRectangleYMax;
8458 uint32_t ScissorRectangleXMax;
8459 };
8460
8461 static inline void
8462 GEN9_SCISSOR_RECT_pack(__gen_user_data *data, void * restrict dst,
8463 const struct GEN9_SCISSOR_RECT * restrict values)
8464 {
8465 uint32_t *dw = (uint32_t * restrict) dst;
8466
8467 dw[0] =
8468 __gen_field(values->ScissorRectangleYMin, 16, 31) |
8469 __gen_field(values->ScissorRectangleXMin, 0, 15) |
8470 0;
8471
8472 dw[1] =
8473 __gen_field(values->ScissorRectangleYMax, 16, 31) |
8474 __gen_field(values->ScissorRectangleXMax, 0, 15) |
8475 0;
8476
8477 }
8478
8479 #define GEN9_SF_CLIP_VIEWPORT_length 0x00000010
8480
8481 struct GEN9_SF_CLIP_VIEWPORT {
8482 float ViewportMatrixElementm00;
8483 float ViewportMatrixElementm11;
8484 float ViewportMatrixElementm22;
8485 float ViewportMatrixElementm30;
8486 float ViewportMatrixElementm31;
8487 float ViewportMatrixElementm32;
8488 float XMinClipGuardband;
8489 float XMaxClipGuardband;
8490 float YMinClipGuardband;
8491 float YMaxClipGuardband;
8492 float XMinViewPort;
8493 float XMaxViewPort;
8494 float YMinViewPort;
8495 float YMaxViewPort;
8496 };
8497
8498 static inline void
8499 GEN9_SF_CLIP_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
8500 const struct GEN9_SF_CLIP_VIEWPORT * restrict values)
8501 {
8502 uint32_t *dw = (uint32_t * restrict) dst;
8503
8504 dw[0] =
8505 __gen_float(values->ViewportMatrixElementm00) |
8506 0;
8507
8508 dw[1] =
8509 __gen_float(values->ViewportMatrixElementm11) |
8510 0;
8511
8512 dw[2] =
8513 __gen_float(values->ViewportMatrixElementm22) |
8514 0;
8515
8516 dw[3] =
8517 __gen_float(values->ViewportMatrixElementm30) |
8518 0;
8519
8520 dw[4] =
8521 __gen_float(values->ViewportMatrixElementm31) |
8522 0;
8523
8524 dw[5] =
8525 __gen_float(values->ViewportMatrixElementm32) |
8526 0;
8527
8528 dw[6] =
8529 0;
8530
8531 dw[7] =
8532 0;
8533
8534 dw[8] =
8535 __gen_float(values->XMinClipGuardband) |
8536 0;
8537
8538 dw[9] =
8539 __gen_float(values->XMaxClipGuardband) |
8540 0;
8541
8542 dw[10] =
8543 __gen_float(values->YMinClipGuardband) |
8544 0;
8545
8546 dw[11] =
8547 __gen_float(values->YMaxClipGuardband) |
8548 0;
8549
8550 dw[12] =
8551 __gen_float(values->XMinViewPort) |
8552 0;
8553
8554 dw[13] =
8555 __gen_float(values->XMaxViewPort) |
8556 0;
8557
8558 dw[14] =
8559 __gen_float(values->YMinViewPort) |
8560 0;
8561
8562 dw[15] =
8563 __gen_float(values->YMaxViewPort) |
8564 0;
8565
8566 }
8567
8568 #define GEN9_BLEND_STATE_length 0x00000011
8569
8570 #define GEN9_BLEND_STATE_ENTRY_length 0x00000002
8571
8572 struct GEN9_BLEND_STATE_ENTRY {
8573 bool LogicOpEnable;
8574 uint32_t LogicOpFunction;
8575 uint32_t PreBlendSourceOnlyClampEnable;
8576 #define COLORCLAMP_UNORM 0
8577 #define COLORCLAMP_SNORM 1
8578 #define COLORCLAMP_RTFORMAT 2
8579 uint32_t ColorClampRange;
8580 bool PreBlendColorClampEnable;
8581 bool PostBlendColorClampEnable;
8582 bool ColorBufferBlendEnable;
8583 uint32_t SourceBlendFactor;
8584 uint32_t DestinationBlendFactor;
8585 uint32_t ColorBlendFunction;
8586 uint32_t SourceAlphaBlendFactor;
8587 uint32_t DestinationAlphaBlendFactor;
8588 uint32_t AlphaBlendFunction;
8589 bool WriteDisableAlpha;
8590 bool WriteDisableRed;
8591 bool WriteDisableGreen;
8592 bool WriteDisableBlue;
8593 };
8594
8595 static inline void
8596 GEN9_BLEND_STATE_ENTRY_pack(__gen_user_data *data, void * restrict dst,
8597 const struct GEN9_BLEND_STATE_ENTRY * restrict values)
8598 {
8599 uint32_t *dw = (uint32_t * restrict) dst;
8600
8601 uint64_t qw0 =
8602 __gen_field(values->LogicOpEnable, 63, 63) |
8603 __gen_field(values->LogicOpFunction, 59, 62) |
8604 __gen_field(values->PreBlendSourceOnlyClampEnable, 36, 36) |
8605 __gen_field(values->ColorClampRange, 34, 35) |
8606 __gen_field(values->PreBlendColorClampEnable, 33, 33) |
8607 __gen_field(values->PostBlendColorClampEnable, 32, 32) |
8608 __gen_field(values->ColorBufferBlendEnable, 31, 31) |
8609 __gen_field(values->SourceBlendFactor, 26, 30) |
8610 __gen_field(values->DestinationBlendFactor, 21, 25) |
8611 __gen_field(values->ColorBlendFunction, 18, 20) |
8612 __gen_field(values->SourceAlphaBlendFactor, 13, 17) |
8613 __gen_field(values->DestinationAlphaBlendFactor, 8, 12) |
8614 __gen_field(values->AlphaBlendFunction, 5, 7) |
8615 __gen_field(values->WriteDisableAlpha, 3, 3) |
8616 __gen_field(values->WriteDisableRed, 2, 2) |
8617 __gen_field(values->WriteDisableGreen, 1, 1) |
8618 __gen_field(values->WriteDisableBlue, 0, 0) |
8619 0;
8620
8621 dw[0] = qw0;
8622 dw[1] = qw0 >> 32;
8623
8624 }
8625
8626 struct GEN9_BLEND_STATE {
8627 bool AlphaToCoverageEnable;
8628 bool IndependentAlphaBlendEnable;
8629 bool AlphaToOneEnable;
8630 bool AlphaToCoverageDitherEnable;
8631 bool AlphaTestEnable;
8632 uint32_t AlphaTestFunction;
8633 bool ColorDitherEnable;
8634 uint32_t XDitherOffset;
8635 uint32_t YDitherOffset;
8636 struct GEN9_BLEND_STATE_ENTRY Entry[8];
8637 };
8638
8639 static inline void
8640 GEN9_BLEND_STATE_pack(__gen_user_data *data, void * restrict dst,
8641 const struct GEN9_BLEND_STATE * restrict values)
8642 {
8643 uint32_t *dw = (uint32_t * restrict) dst;
8644
8645 dw[0] =
8646 __gen_field(values->AlphaToCoverageEnable, 31, 31) |
8647 __gen_field(values->IndependentAlphaBlendEnable, 30, 30) |
8648 __gen_field(values->AlphaToOneEnable, 29, 29) |
8649 __gen_field(values->AlphaToCoverageDitherEnable, 28, 28) |
8650 __gen_field(values->AlphaTestEnable, 27, 27) |
8651 __gen_field(values->AlphaTestFunction, 24, 26) |
8652 __gen_field(values->ColorDitherEnable, 23, 23) |
8653 __gen_field(values->XDitherOffset, 21, 22) |
8654 __gen_field(values->YDitherOffset, 19, 20) |
8655 0;
8656
8657 for (uint32_t i = 0, j = 1; i < 8; i++, j += 2)
8658 GEN9_BLEND_STATE_ENTRY_pack(data, &dw[j], &values->Entry[i]);
8659 }
8660
8661 #define GEN9_CC_VIEWPORT_length 0x00000002
8662
8663 struct GEN9_CC_VIEWPORT {
8664 float MinimumDepth;
8665 float MaximumDepth;
8666 };
8667
8668 static inline void
8669 GEN9_CC_VIEWPORT_pack(__gen_user_data *data, void * restrict dst,
8670 const struct GEN9_CC_VIEWPORT * restrict values)
8671 {
8672 uint32_t *dw = (uint32_t * restrict) dst;
8673
8674 dw[0] =
8675 __gen_float(values->MinimumDepth) |
8676 0;
8677
8678 dw[1] =
8679 __gen_float(values->MaximumDepth) |
8680 0;
8681
8682 }
8683
8684 #define GEN9_COLOR_CALC_STATE_length 0x00000006
8685
8686 struct GEN9_COLOR_CALC_STATE {
8687 #define Cancelled 0
8688 #define NotCancelled 1
8689 uint32_t RoundDisableFunctionDisable;
8690 #define ALPHATEST_UNORM8 0
8691 #define ALPHATEST_FLOAT32 1
8692 uint32_t AlphaTestFormat;
8693 uint32_t AlphaReferenceValueAsUNORM8;
8694 float AlphaReferenceValueAsFLOAT32;
8695 float BlendConstantColorRed;
8696 float BlendConstantColorGreen;
8697 float BlendConstantColorBlue;
8698 float BlendConstantColorAlpha;
8699 };
8700
8701 static inline void
8702 GEN9_COLOR_CALC_STATE_pack(__gen_user_data *data, void * restrict dst,
8703 const struct GEN9_COLOR_CALC_STATE * restrict values)
8704 {
8705 uint32_t *dw = (uint32_t * restrict) dst;
8706
8707 dw[0] =
8708 __gen_field(values->RoundDisableFunctionDisable, 15, 15) |
8709 __gen_field(values->AlphaTestFormat, 0, 0) |
8710 0;
8711
8712 dw[1] =
8713 __gen_field(values->AlphaReferenceValueAsUNORM8, 0, 31) |
8714 __gen_float(values->AlphaReferenceValueAsFLOAT32) |
8715 0;
8716
8717 dw[2] =
8718 __gen_float(values->BlendConstantColorRed) |
8719 0;
8720
8721 dw[3] =
8722 __gen_float(values->BlendConstantColorGreen) |
8723 0;
8724
8725 dw[4] =
8726 __gen_float(values->BlendConstantColorBlue) |
8727 0;
8728
8729 dw[5] =
8730 __gen_float(values->BlendConstantColorAlpha) |
8731 0;
8732
8733 }
8734
8735 #define GEN9_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_length 0x00000001
8736
8737 struct GEN9_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR {
8738 uint32_t ExtendedMessageLength;
8739 #define NoTermination 0
8740 #define EOT 1
8741 uint32_t EndOfThread;
8742 uint32_t TargetFunctionID;
8743 };
8744
8745 static inline void
8746 GEN9_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_pack(__gen_user_data *data, void * restrict dst,
8747 const struct GEN9_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR * restrict values)
8748 {
8749 uint32_t *dw = (uint32_t * restrict) dst;
8750
8751 dw[0] =
8752 __gen_field(values->ExtendedMessageLength, 6, 9) |
8753 __gen_field(values->EndOfThread, 5, 5) |
8754 __gen_field(values->TargetFunctionID, 0, 3) |
8755 0;
8756
8757 }
8758
8759 #define GEN9_INTERFACE_DESCRIPTOR_DATA_length 0x00000008
8760
8761 struct GEN9_INTERFACE_DESCRIPTOR_DATA {
8762 uint32_t KernelStartPointer;
8763 uint32_t KernelStartPointerHigh;
8764 #define Ftz 0
8765 #define SetByKernel 1
8766 uint32_t DenormMode;
8767 #define Multiple 0
8768 #define Single 1
8769 uint32_t SingleProgramFlow;
8770 #define NormalPriority 0
8771 #define HighPriority 1
8772 uint32_t ThreadPriority;
8773 #define IEEE754 0
8774 #define Alternate 1
8775 uint32_t FloatingPointMode;
8776 bool IllegalOpcodeExceptionEnable;
8777 bool MaskStackExceptionEnable;
8778 bool SoftwareExceptionEnable;
8779 uint32_t SamplerStatePointer;
8780 #define Nosamplersused 0
8781 #define Between1and4samplersused 1
8782 #define Between5and8samplersused 2
8783 #define Between9and12samplersused 3
8784 #define Between13and16samplersused 4
8785 uint32_t SamplerCount;
8786 uint32_t BindingTablePointer;
8787 uint32_t BindingTableEntryCount;
8788 uint32_t ConstantIndirectURBEntryReadLength;
8789 uint32_t ConstantURBEntryReadOffset;
8790 #define RTNE 0
8791 #define RU 1
8792 #define RD 2
8793 #define RTZ 3
8794 uint32_t RoundingMode;
8795 bool BarrierEnable;
8796 #define Encodes0K 0
8797 #define Encodes1K 1
8798 #define Encodes2K 2
8799 #define Encodes4K 3
8800 #define Encodes8K 4
8801 #define Encodes16K 5
8802 #define Encodes32K 6
8803 #define Encodes64K 7
8804 uint32_t SharedLocalMemorySize;
8805 bool GlobalBarrierEnable;
8806 uint32_t NumberofThreadsinGPGPUThreadGroup;
8807 uint32_t CrossThreadConstantDataReadLength;
8808 };
8809
8810 static inline void
8811 GEN9_INTERFACE_DESCRIPTOR_DATA_pack(__gen_user_data *data, void * restrict dst,
8812 const struct GEN9_INTERFACE_DESCRIPTOR_DATA * restrict values)
8813 {
8814 uint32_t *dw = (uint32_t * restrict) dst;
8815
8816 dw[0] =
8817 __gen_offset(values->KernelStartPointer, 6, 31) |
8818 0;
8819
8820 dw[1] =
8821 __gen_offset(values->KernelStartPointerHigh, 0, 15) |
8822 0;
8823
8824 dw[2] =
8825 __gen_field(values->DenormMode, 19, 19) |
8826 __gen_field(values->SingleProgramFlow, 18, 18) |
8827 __gen_field(values->ThreadPriority, 17, 17) |
8828 __gen_field(values->FloatingPointMode, 16, 16) |
8829 __gen_field(values->IllegalOpcodeExceptionEnable, 13, 13) |
8830 __gen_field(values->MaskStackExceptionEnable, 11, 11) |
8831 __gen_field(values->SoftwareExceptionEnable, 7, 7) |
8832 0;
8833
8834 dw[3] =
8835 __gen_offset(values->SamplerStatePointer, 5, 31) |
8836 __gen_field(values->SamplerCount, 2, 4) |
8837 0;
8838
8839 dw[4] =
8840 __gen_offset(values->BindingTablePointer, 5, 15) |
8841 __gen_field(values->BindingTableEntryCount, 0, 4) |
8842 0;
8843
8844 dw[5] =
8845 __gen_field(values->ConstantIndirectURBEntryReadLength, 16, 31) |
8846 __gen_field(values->ConstantURBEntryReadOffset, 0, 15) |
8847 0;
8848
8849 dw[6] =
8850 __gen_field(values->RoundingMode, 22, 23) |
8851 __gen_field(values->BarrierEnable, 21, 21) |
8852 __gen_field(values->SharedLocalMemorySize, 16, 20) |
8853 __gen_field(values->GlobalBarrierEnable, 15, 15) |
8854 __gen_field(values->NumberofThreadsinGPGPUThreadGroup, 0, 9) |
8855 0;
8856
8857 dw[7] =
8858 __gen_field(values->CrossThreadConstantDataReadLength, 0, 7) |
8859 0;
8860
8861 }
8862
8863 #define GEN9_ROUNDINGPRECISIONTABLE_3_BITS_length 0x00000001
8864
8865 struct GEN9_ROUNDINGPRECISIONTABLE_3_BITS {
8866 #define _116 0
8867 #define _216 1
8868 #define _316 2
8869 #define _416 3
8870 #define _516 4
8871 #define _616 5
8872 #define _716 6
8873 #define _816 7
8874 uint32_t RoundingPrecision;
8875 };
8876
8877 static inline void
8878 GEN9_ROUNDINGPRECISIONTABLE_3_BITS_pack(__gen_user_data *data, void * restrict dst,
8879 const struct GEN9_ROUNDINGPRECISIONTABLE_3_BITS * restrict values)
8880 {
8881 uint32_t *dw = (uint32_t * restrict) dst;
8882
8883 dw[0] =
8884 __gen_field(values->RoundingPrecision, 0, 2) |
8885 0;
8886
8887 }
8888
8889 #define GEN9_BINDING_TABLE_STATE_length 0x00000001
8890
8891 struct GEN9_BINDING_TABLE_STATE {
8892 uint32_t SurfaceStatePointer;
8893 };
8894
8895 static inline void
8896 GEN9_BINDING_TABLE_STATE_pack(__gen_user_data *data, void * restrict dst,
8897 const struct GEN9_BINDING_TABLE_STATE * restrict values)
8898 {
8899 uint32_t *dw = (uint32_t * restrict) dst;
8900
8901 dw[0] =
8902 __gen_offset(values->SurfaceStatePointer, 6, 31) |
8903 0;
8904
8905 }
8906
8907 #define GEN9_RENDER_SURFACE_STATE_length 0x00000010
8908
8909 struct GEN9_RENDER_SURFACE_STATE {
8910 #define SURFTYPE_1D 0
8911 #define SURFTYPE_2D 1
8912 #define SURFTYPE_3D 2
8913 #define SURFTYPE_CUBE 3
8914 #define SURFTYPE_BUFFER 4
8915 #define SURFTYPE_STRBUF 5
8916 #define SURFTYPE_NULL 7
8917 uint32_t SurfaceType;
8918 bool SurfaceArray;
8919 bool ASTC_Enable;
8920 uint32_t SurfaceFormat;
8921 #define VALIGN4 1
8922 #define VALIGN8 2
8923 #define VALIGN16 3
8924 uint32_t SurfaceVerticalAlignment;
8925 #define HALIGN4 1
8926 #define HALIGN8 2
8927 #define HALIGN16 3
8928 uint32_t SurfaceHorizontalAlignment;
8929 #define LINEAR 0
8930 #define WMAJOR 1
8931 #define XMAJOR 2
8932 #define YMAJOR 3
8933 uint32_t TileMode;
8934 uint32_t VerticalLineStride;
8935 uint32_t VerticalLineStrideOffset;
8936 bool SamplerL2BypassModeDisable;
8937 #define WriteOnlyCache 0
8938 #define ReadWriteCache 1
8939 uint32_t RenderCacheReadWriteMode;
8940 #define NORMAL_MODE 0
8941 #define PROGRESSIVE_FRAME 2
8942 #define INTERLACED_FRAME 3
8943 uint32_t MediaBoundaryPixelMode;
8944 bool CubeFaceEnablePositiveZ;
8945 bool CubeFaceEnableNegativeZ;
8946 bool CubeFaceEnablePositiveY;
8947 bool CubeFaceEnableNegativeY;
8948 bool CubeFaceEnablePositiveX;
8949 bool CubeFaceEnableNegativeX;
8950 struct GEN9_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState;
8951 float BaseMipLevel;
8952 uint32_t SurfaceQPitch;
8953 uint32_t Height;
8954 uint32_t Width;
8955 uint32_t Depth;
8956 uint32_t SurfacePitch;
8957 #define _0DEG 0
8958 #define _90DEG 1
8959 #define _180DEG 2
8960 #define _270DEG 3
8961 uint32_t RenderTargetAndSampleUnormRotation;
8962 uint32_t MinimumArrayElement;
8963 uint32_t RenderTargetViewExtent;
8964 #define MSS 0
8965 #define DEPTH_STENCIL 1
8966 uint32_t MultisampledSurfaceStorageFormat;
8967 #define MULTISAMPLECOUNT_1 0
8968 #define MULTISAMPLECOUNT_2 1
8969 #define MULTISAMPLECOUNT_4 2
8970 #define MULTISAMPLECOUNT_8 3
8971 #define MULTISAMPLECOUNT_16 4
8972 uint32_t NumberofMultisamples;
8973 uint32_t MultisamplePositionPaletteIndex;
8974 uint32_t XOffset;
8975 uint32_t YOffset;
8976 bool EWADisableForCube;
8977 #define NONE 0
8978 #define _4KB 1
8979 #define _64KB 2
8980 #define TILEYF 1
8981 #define TILEYS 2
8982 uint32_t TiledResourceMode;
8983 #define GPUcoherent 0
8984 #define IAcoherent 1
8985 uint32_t CoherencyType;
8986 uint32_t MipTailStartLOD;
8987 uint32_t SurfaceMinLOD;
8988 uint32_t MIPCountLOD;
8989 uint32_t AuxiliarySurfaceQPitch;
8990 uint32_t AuxiliarySurfacePitch;
8991 #define AUX_NONE 0
8992 #define AUX_CCS_D 1
8993 #define AUX_APPEND 2
8994 #define AUX_HIZ 3
8995 #define AUX_CCS_E 5
8996 uint32_t AuxiliarySurfaceMode;
8997 bool SeparateUVPlaneEnable;
8998 uint32_t XOffsetforUorUVPlane;
8999 uint32_t YOffsetforUorUVPlane;
9000 #define Horizontal 0
9001 #define Vertical 1
9002 uint32_t MemoryCompressionMode;
9003 bool MemoryCompressionEnable;
9004 uint32_t ShaderChannelSelectRed;
9005 uint32_t ShaderChannelSelectGreen;
9006 uint32_t ShaderChannelSelectBlue;
9007 uint32_t ShaderChannelSelectAlpha;
9008 float ResourceMinLOD;
9009 __gen_address_type SurfaceBaseAddress;
9010 uint32_t XOffsetforVPlane;
9011 uint32_t YOffsetforVPlane;
9012 uint32_t AuxiliaryTableIndexforMediaCompressedSurface;
9013 __gen_address_type AuxiliarySurfaceBaseAddress;
9014 uint32_t QuiltHeight;
9015 uint32_t QuiltWidth;
9016 float HierarchicalDepthClearValue;
9017 uint32_t RedClearColor;
9018 uint32_t GreenClearColor;
9019 uint32_t BlueClearColor;
9020 uint32_t AlphaClearColor;
9021 };
9022
9023 static inline void
9024 GEN9_RENDER_SURFACE_STATE_pack(__gen_user_data *data, void * restrict dst,
9025 const struct GEN9_RENDER_SURFACE_STATE * restrict values)
9026 {
9027 uint32_t *dw = (uint32_t * restrict) dst;
9028
9029 dw[0] =
9030 __gen_field(values->SurfaceType, 29, 31) |
9031 __gen_field(values->SurfaceArray, 28, 28) |
9032 __gen_field(values->ASTC_Enable, 27, 27) |
9033 __gen_field(values->SurfaceFormat, 18, 26) |
9034 __gen_field(values->SurfaceVerticalAlignment, 16, 17) |
9035 __gen_field(values->SurfaceHorizontalAlignment, 14, 15) |
9036 __gen_field(values->TileMode, 12, 13) |
9037 __gen_field(values->VerticalLineStride, 11, 11) |
9038 __gen_field(values->VerticalLineStrideOffset, 10, 10) |
9039 __gen_field(values->SamplerL2BypassModeDisable, 9, 9) |
9040 __gen_field(values->RenderCacheReadWriteMode, 8, 8) |
9041 __gen_field(values->MediaBoundaryPixelMode, 6, 7) |
9042 __gen_field(values->CubeFaceEnablePositiveZ, 0, 0) |
9043 __gen_field(values->CubeFaceEnableNegativeZ, 1, 1) |
9044 __gen_field(values->CubeFaceEnablePositiveY, 2, 2) |
9045 __gen_field(values->CubeFaceEnableNegativeY, 3, 3) |
9046 __gen_field(values->CubeFaceEnablePositiveX, 4, 4) |
9047 __gen_field(values->CubeFaceEnableNegativeX, 5, 5) |
9048 0;
9049
9050 uint32_t dw_MemoryObjectControlState;
9051 GEN9_MEMORY_OBJECT_CONTROL_STATE_pack(data, &dw_MemoryObjectControlState, &values->MemoryObjectControlState);
9052 dw[1] =
9053 __gen_field(dw_MemoryObjectControlState, 24, 30) |
9054 __gen_field(values->BaseMipLevel * (1 << 1), 19, 23) |
9055 __gen_field(values->SurfaceQPitch, 0, 14) |
9056 0;
9057
9058 dw[2] =
9059 __gen_field(values->Height, 16, 29) |
9060 __gen_field(values->Width, 0, 13) |
9061 0;
9062
9063 dw[3] =
9064 __gen_field(values->Depth, 21, 31) |
9065 __gen_field(values->SurfacePitch, 0, 17) |
9066 0;
9067
9068 dw[4] =
9069 __gen_field(values->RenderTargetAndSampleUnormRotation, 29, 30) |
9070 __gen_field(values->MinimumArrayElement, 18, 28) |
9071 __gen_field(values->RenderTargetViewExtent, 7, 17) |
9072 __gen_field(values->MultisampledSurfaceStorageFormat, 6, 6) |
9073 __gen_field(values->NumberofMultisamples, 3, 5) |
9074 __gen_field(values->MultisamplePositionPaletteIndex, 0, 2) |
9075 0;
9076
9077 dw[5] =
9078 __gen_offset(values->XOffset, 25, 31) |
9079 __gen_offset(values->YOffset, 21, 23) |
9080 __gen_field(values->EWADisableForCube, 20, 20) |
9081 __gen_field(values->TiledResourceMode, 18, 19) |
9082 __gen_field(values->CoherencyType, 14, 14) |
9083 __gen_field(values->MipTailStartLOD, 8, 11) |
9084 __gen_field(values->SurfaceMinLOD, 4, 7) |
9085 __gen_field(values->MIPCountLOD, 0, 3) |
9086 0;
9087
9088 dw[6] =
9089 __gen_field(values->AuxiliarySurfaceQPitch, 16, 30) |
9090 __gen_field(values->AuxiliarySurfacePitch, 3, 11) |
9091 __gen_field(values->AuxiliarySurfaceMode, 0, 2) |
9092 __gen_field(values->SeparateUVPlaneEnable, 31, 31) |
9093 __gen_field(values->XOffsetforUorUVPlane, 16, 29) |
9094 __gen_field(values->YOffsetforUorUVPlane, 0, 13) |
9095 0;
9096
9097 dw[7] =
9098 __gen_field(values->MemoryCompressionMode, 31, 31) |
9099 __gen_field(values->MemoryCompressionEnable, 30, 30) |
9100 __gen_field(values->ShaderChannelSelectRed, 25, 27) |
9101 __gen_field(values->ShaderChannelSelectGreen, 22, 24) |
9102 __gen_field(values->ShaderChannelSelectBlue, 19, 21) |
9103 __gen_field(values->ShaderChannelSelectAlpha, 16, 18) |
9104 __gen_field(values->ResourceMinLOD * (1 << 8), 0, 11) |
9105 0;
9106
9107 uint32_t dw8 =
9108 0;
9109
9110 uint64_t qw8 =
9111 __gen_combine_address(data, &dw[8], values->SurfaceBaseAddress, dw8);
9112
9113 dw[8] = qw8;
9114 dw[9] = qw8 >> 32;
9115
9116 uint32_t dw10 =
9117 __gen_field(values->XOffsetforVPlane, 48, 61) |
9118 __gen_field(values->YOffsetforVPlane, 32, 45) |
9119 __gen_field(values->AuxiliaryTableIndexforMediaCompressedSurface, 21, 31) |
9120 __gen_field(values->QuiltHeight, 5, 9) |
9121 __gen_field(values->QuiltWidth, 0, 4) |
9122 0;
9123
9124 uint64_t qw10 =
9125 __gen_combine_address(data, &dw[10], values->AuxiliarySurfaceBaseAddress, dw10);
9126
9127 dw[10] = qw10;
9128 dw[11] = qw10 >> 32;
9129
9130 dw[12] =
9131 __gen_float(values->HierarchicalDepthClearValue) |
9132 __gen_field(values->RedClearColor, 0, 31) |
9133 0;
9134
9135 dw[13] =
9136 __gen_field(values->GreenClearColor, 0, 31) |
9137 0;
9138
9139 dw[14] =
9140 __gen_field(values->BlueClearColor, 0, 31) |
9141 0;
9142
9143 dw[15] =
9144 __gen_field(values->AlphaClearColor, 0, 31) |
9145 0;
9146
9147 }
9148
9149 #define GEN9_FILTER_COEFFICIENT_length 0x00000001
9150
9151 struct GEN9_FILTER_COEFFICIENT {
9152 uint32_t FilterCoefficient;
9153 };
9154
9155 static inline void
9156 GEN9_FILTER_COEFFICIENT_pack(__gen_user_data *data, void * restrict dst,
9157 const struct GEN9_FILTER_COEFFICIENT * restrict values)
9158 {
9159 uint32_t *dw = (uint32_t * restrict) dst;
9160
9161 dw[0] =
9162 __gen_field(values->FilterCoefficient, 0, 7) |
9163 0;
9164
9165 }
9166
9167 #define GEN9_SAMPLER_STATE_length 0x00000004
9168
9169 struct GEN9_SAMPLER_STATE {
9170 bool SamplerDisable;
9171 #define DX10OGL 0
9172 #define DX9 1
9173 uint32_t TextureBorderColorMode;
9174 #define CLAMP_NONE 0
9175 #define CLAMP_OGL 2
9176 uint32_t LODPreClampMode;
9177 uint32_t CoarseLODQualityMode;
9178 #define MIPFILTER_NONE 0
9179 #define MIPFILTER_NEAREST 1
9180 #define MIPFILTER_LINEAR 3
9181 uint32_t MipModeFilter;
9182 #define MAPFILTER_NEAREST 0
9183 #define MAPFILTER_LINEAR 1
9184 #define MAPFILTER_ANISOTROPIC 2
9185 #define MAPFILTER_MONO 6
9186 uint32_t MagModeFilter;
9187 #define MAPFILTER_NEAREST 0
9188 #define MAPFILTER_LINEAR 1
9189 #define MAPFILTER_ANISOTROPIC 2
9190 #define MAPFILTER_MONO 6
9191 uint32_t MinModeFilter;
9192 float TextureLODBias;
9193 #define LEGACY 0
9194 #define EWAApproximation 1
9195 uint32_t AnisotropicAlgorithm;
9196 float MinLOD;
9197 float MaxLOD;
9198 bool ChromaKeyEnable;
9199 uint32_t ChromaKeyIndex;
9200 #define KEYFILTER_KILL_ON_ANY_MATCH 0
9201 #define KEYFILTER_REPLACE_BLACK 1
9202 uint32_t ChromaKeyMode;
9203 #define PREFILTEROPALWAYS 0
9204 #define PREFILTEROPNEVER 1
9205 #define PREFILTEROPLESS 2
9206 #define PREFILTEROPEQUAL 3
9207 #define PREFILTEROPLEQUAL 4
9208 #define PREFILTEROPGREATER 5
9209 #define PREFILTEROPNOTEQUAL 6
9210 #define PREFILTEROPGEQUAL 7
9211 uint32_t ShadowFunction;
9212 #define PROGRAMMED 0
9213 #define OVERRIDE 1
9214 uint32_t CubeSurfaceControlMode;
9215 uint32_t IndirectStatePointer;
9216 #define MIPNONE 0
9217 #define MIPFILTER 1
9218 uint32_t LODClampMagnificationMode;
9219 #define STD_FILTER 0
9220 #define COMPARISON 1
9221 #define MINIMUM 2
9222 #define MAXIMUM 3
9223 uint32_t ReductionType;
9224 #define RATIO21 0
9225 #define RATIO41 1
9226 #define RATIO61 2
9227 #define RATIO81 3
9228 #define RATIO101 4
9229 #define RATIO121 5
9230 #define RATIO141 6
9231 #define RATIO161 7
9232 uint32_t MaximumAnisotropy;
9233 bool RAddressMinFilterRoundingEnable;
9234 bool RAddressMagFilterRoundingEnable;
9235 bool VAddressMinFilterRoundingEnable;
9236 bool VAddressMagFilterRoundingEnable;
9237 bool UAddressMinFilterRoundingEnable;
9238 bool UAddressMagFilterRoundingEnable;
9239 #define FULL 0
9240 #define HIGH 1
9241 #define MED 2
9242 #define LOW 3
9243 uint32_t TrilinearFilterQuality;
9244 bool NonnormalizedCoordinateEnable;
9245 bool ReductionTypeEnable;
9246 uint32_t TCXAddressControlMode;
9247 uint32_t TCYAddressControlMode;
9248 uint32_t TCZAddressControlMode;
9249 };
9250
9251 static inline void
9252 GEN9_SAMPLER_STATE_pack(__gen_user_data *data, void * restrict dst,
9253 const struct GEN9_SAMPLER_STATE * restrict values)
9254 {
9255 uint32_t *dw = (uint32_t * restrict) dst;
9256
9257 dw[0] =
9258 __gen_field(values->SamplerDisable, 31, 31) |
9259 __gen_field(values->TextureBorderColorMode, 29, 29) |
9260 __gen_field(values->LODPreClampMode, 27, 28) |
9261 __gen_field(values->CoarseLODQualityMode, 22, 26) |
9262 __gen_field(values->MipModeFilter, 20, 21) |
9263 __gen_field(values->MagModeFilter, 17, 19) |
9264 __gen_field(values->MinModeFilter, 14, 16) |
9265 __gen_fixed(values->TextureLODBias, 1, 13, true, 8) |
9266 __gen_field(values->AnisotropicAlgorithm, 0, 0) |
9267 0;
9268
9269 dw[1] =
9270 __gen_field(values->MinLOD * (1 << 8), 20, 31) |
9271 __gen_field(values->MaxLOD * (1 << 8), 8, 19) |
9272 __gen_field(values->ChromaKeyEnable, 7, 7) |
9273 __gen_field(values->ChromaKeyIndex, 5, 6) |
9274 __gen_field(values->ChromaKeyMode, 4, 4) |
9275 __gen_field(values->ShadowFunction, 1, 3) |
9276 __gen_field(values->CubeSurfaceControlMode, 0, 0) |
9277 0;
9278
9279 dw[2] =
9280 __gen_field(values->IndirectStatePointer, 6, 23) |
9281 __gen_field(values->LODClampMagnificationMode, 0, 0) |
9282 0;
9283
9284 dw[3] =
9285 __gen_field(values->ReductionType, 22, 23) |
9286 __gen_field(values->MaximumAnisotropy, 19, 21) |
9287 __gen_field(values->RAddressMinFilterRoundingEnable, 13, 13) |
9288 __gen_field(values->RAddressMagFilterRoundingEnable, 14, 14) |
9289 __gen_field(values->VAddressMinFilterRoundingEnable, 15, 15) |
9290 __gen_field(values->VAddressMagFilterRoundingEnable, 16, 16) |
9291 __gen_field(values->UAddressMinFilterRoundingEnable, 17, 17) |
9292 __gen_field(values->UAddressMagFilterRoundingEnable, 18, 18) |
9293 __gen_field(values->TrilinearFilterQuality, 11, 12) |
9294 __gen_field(values->NonnormalizedCoordinateEnable, 10, 10) |
9295 __gen_field(values->ReductionTypeEnable, 9, 9) |
9296 __gen_field(values->TCXAddressControlMode, 6, 8) |
9297 __gen_field(values->TCYAddressControlMode, 3, 5) |
9298 __gen_field(values->TCZAddressControlMode, 0, 2) |
9299 0;
9300
9301 }
9302
9303 #define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_length 0x00000008
9304
9305 struct GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS {
9306 uint32_t Table0YFilterCoefficientn1;
9307 uint32_t Table0XFilterCoefficientn1;
9308 uint32_t Table0YFilterCoefficientn0;
9309 uint32_t Table0XFilterCoefficientn0;
9310 uint32_t Table0YFilterCoefficientn3;
9311 uint32_t Table0XFilterCoefficientn3;
9312 uint32_t Table0YFilterCoefficientn2;
9313 uint32_t Table0XFilterCoefficientn2;
9314 uint32_t Table0YFilterCoefficientn5;
9315 uint32_t Table0XFilterCoefficientn5;
9316 uint32_t Table0YFilterCoefficientn4;
9317 uint32_t Table0XFilterCoefficientn4;
9318 uint32_t Table0YFilterCoefficientn7;
9319 uint32_t Table0XFilterCoefficientn7;
9320 uint32_t Table0YFilterCoefficientn6;
9321 uint32_t Table0XFilterCoefficientn6;
9322 uint32_t Table1XFilterCoefficientn3;
9323 uint32_t Table1XFilterCoefficientn2;
9324 uint32_t Table1XFilterCoefficientn5;
9325 uint32_t Table1XFilterCoefficientn4;
9326 uint32_t Table1YFilterCoefficientn3;
9327 uint32_t Table1YFilterCoefficientn2;
9328 uint32_t Table1YFilterCoefficientn5;
9329 uint32_t Table1YFilterCoefficientn4;
9330 };
9331
9332 static inline void
9333 GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_pack(__gen_user_data *data, void * restrict dst,
9334 const struct GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS * restrict values)
9335 {
9336 uint32_t *dw = (uint32_t * restrict) dst;
9337
9338 dw[0] =
9339 __gen_field(values->Table0YFilterCoefficientn1, 24, 31) |
9340 __gen_field(values->Table0XFilterCoefficientn1, 16, 23) |
9341 __gen_field(values->Table0YFilterCoefficientn0, 8, 15) |
9342 __gen_field(values->Table0XFilterCoefficientn0, 0, 7) |
9343 0;
9344
9345 dw[1] =
9346 __gen_field(values->Table0YFilterCoefficientn3, 24, 31) |
9347 __gen_field(values->Table0XFilterCoefficientn3, 16, 23) |
9348 __gen_field(values->Table0YFilterCoefficientn2, 8, 15) |
9349 __gen_field(values->Table0XFilterCoefficientn2, 0, 7) |
9350 0;
9351
9352 dw[2] =
9353 __gen_field(values->Table0YFilterCoefficientn5, 24, 31) |
9354 __gen_field(values->Table0XFilterCoefficientn5, 16, 23) |
9355 __gen_field(values->Table0YFilterCoefficientn4, 8, 15) |
9356 __gen_field(values->Table0XFilterCoefficientn4, 0, 7) |
9357 0;
9358
9359 dw[3] =
9360 __gen_field(values->Table0YFilterCoefficientn7, 24, 31) |
9361 __gen_field(values->Table0XFilterCoefficientn7, 16, 23) |
9362 __gen_field(values->Table0YFilterCoefficientn6, 8, 15) |
9363 __gen_field(values->Table0XFilterCoefficientn6, 0, 7) |
9364 0;
9365
9366 dw[4] =
9367 __gen_field(values->Table1XFilterCoefficientn3, 24, 31) |
9368 __gen_field(values->Table1XFilterCoefficientn2, 16, 23) |
9369 0;
9370
9371 dw[5] =
9372 __gen_field(values->Table1XFilterCoefficientn5, 8, 15) |
9373 __gen_field(values->Table1XFilterCoefficientn4, 0, 7) |
9374 0;
9375
9376 dw[6] =
9377 __gen_field(values->Table1YFilterCoefficientn3, 24, 31) |
9378 __gen_field(values->Table1YFilterCoefficientn2, 16, 23) |
9379 0;
9380
9381 dw[7] =
9382 __gen_field(values->Table1YFilterCoefficientn5, 8, 15) |
9383 __gen_field(values->Table1YFilterCoefficientn4, 0, 7) |
9384 0;
9385
9386 }
9387
9388 /* Enum 3D_Prim_Topo_Type */
9389 #define _3DPRIM_POINTLIST 1
9390 #define _3DPRIM_LINELIST 2
9391 #define _3DPRIM_LINESTRIP 3
9392 #define _3DPRIM_TRILIST 4
9393 #define _3DPRIM_TRISTRIP 5
9394 #define _3DPRIM_TRIFAN 6
9395 #define _3DPRIM_QUADLIST 7
9396 #define _3DPRIM_QUADSTRIP 8
9397 #define _3DPRIM_LINELIST_ADJ 9
9398 #define _3DPRIM_LINESTRIP_ADJ 10
9399 #define _3DPRIM_TRILIST_ADJ 11
9400 #define _3DPRIM_TRISTRIP_ADJ 12
9401 #define _3DPRIM_TRISTRIP_REVERSE 13
9402 #define _3DPRIM_POLYGON 14
9403 #define _3DPRIM_RECTLIST 15
9404 #define _3DPRIM_LINELOOP 16
9405 #define _3DPRIM_POINTLIST_BF 17
9406 #define _3DPRIM_LINESTRIP_CONT 18
9407 #define _3DPRIM_LINESTRIP_BF 19
9408 #define _3DPRIM_LINESTRIP_CONT_BF 20
9409 #define _3DPRIM_TRIFAN_NOSTIPPLE 22
9410 #define _3DPRIM_PATCHLIST_1 32
9411 #define _3DPRIM_PATCHLIST_2 33
9412 #define _3DPRIM_PATCHLIST_3 34
9413 #define _3DPRIM_PATCHLIST_4 35
9414 #define _3DPRIM_PATCHLIST_5 36
9415 #define _3DPRIM_PATCHLIST_6 37
9416 #define _3DPRIM_PATCHLIST_7 38
9417 #define _3DPRIM_PATCHLIST_8 39
9418 #define _3DPRIM_PATCHLIST_9 40
9419 #define _3DPRIM_PATCHLIST_10 41
9420 #define _3DPRIM_PATCHLIST_11 42
9421 #define _3DPRIM_PATCHLIST_12 43
9422 #define _3DPRIM_PATCHLIST_13 44
9423 #define _3DPRIM_PATCHLIST_14 45
9424 #define _3DPRIM_PATCHLIST_15 46
9425 #define _3DPRIM_PATCHLIST_16 47
9426 #define _3DPRIM_PATCHLIST_17 48
9427 #define _3DPRIM_PATCHLIST_18 49
9428 #define _3DPRIM_PATCHLIST_19 50
9429 #define _3DPRIM_PATCHLIST_20 51
9430 #define _3DPRIM_PATCHLIST_21 52
9431 #define _3DPRIM_PATCHLIST_22 53
9432 #define _3DPRIM_PATCHLIST_23 54
9433 #define _3DPRIM_PATCHLIST_24 55
9434 #define _3DPRIM_PATCHLIST_25 56
9435 #define _3DPRIM_PATCHLIST_26 57
9436 #define _3DPRIM_PATCHLIST_27 58
9437 #define _3DPRIM_PATCHLIST_28 59
9438 #define _3DPRIM_PATCHLIST_29 60
9439 #define _3DPRIM_PATCHLIST_30 61
9440 #define _3DPRIM_PATCHLIST_31 62
9441 #define _3DPRIM_PATCHLIST_32 63
9442
9443 /* Enum 3D_Vertex_Component_Control */
9444 #define VFCOMP_NOSTORE 0
9445 #define VFCOMP_STORE_SRC 1
9446 #define VFCOMP_STORE_0 2
9447 #define VFCOMP_STORE_1_FP 3
9448 #define VFCOMP_STORE_1_INT 4
9449 #define VFCOMP_STORE_PID 7
9450
9451 /* Enum COMPONENT_ENABLES */
9452 #define CE_NONE 0
9453 #define CE_X 1
9454 #define CE_Y 2
9455 #define CE_XY 3
9456 #define CE_Z 4
9457 #define CE_XZ 5
9458 #define CE_YZ 6
9459 #define CE_XYZ 7
9460 #define CE_W 8
9461 #define CE_XW 9
9462 #define CE_YW 10
9463 #define CE_XYW 11
9464 #define CE_ZW 12
9465 #define CE_XZW 13
9466 #define CE_YZW 14
9467 #define CE_XYZW 15
9468
9469 /* Enum Attribute_Component_Format */
9470 #define ACF_DISABLED 0
9471 #define ACF_XY 1
9472 #define ACF_XYZ 2
9473 #define ACF_XYZW 3
9474
9475 /* Enum WRAP_SHORTEST_ENABLE */
9476 #define WSE_X 1
9477 #define WSE_Y 2
9478 #define WSE_XY 3
9479 #define WSE_Z 4
9480 #define WSE_XZ 5
9481 #define WSE_YZ 6
9482 #define WSE_XYZ 7
9483 #define WSE_W 8
9484 #define WSE_XW 9
9485 #define WSE_YW 10
9486 #define WSE_XYW 11
9487 #define WSE_ZW 12
9488 #define WSE_XZW 13
9489 #define WSE_YZW 14
9490 #define WSE_XYZW 15
9491
9492 /* Enum 3D_Stencil_Operation */
9493 #define STENCILOP_KEEP 0
9494 #define STENCILOP_ZERO 1
9495 #define STENCILOP_REPLACE 2
9496 #define STENCILOP_INCRSAT 3
9497 #define STENCILOP_DECRSAT 4
9498 #define STENCILOP_INCR 5
9499 #define STENCILOP_DECR 6
9500 #define STENCILOP_INVERT 7
9501
9502 /* Enum 3D_Color_Buffer_Blend_Factor */
9503 #define BLENDFACTOR_ONE 1
9504 #define BLENDFACTOR_SRC_COLOR 2
9505 #define BLENDFACTOR_SRC_ALPHA 3
9506 #define BLENDFACTOR_DST_ALPHA 4
9507 #define BLENDFACTOR_DST_COLOR 5
9508 #define BLENDFACTOR_SRC_ALPHA_SATURATE 6
9509 #define BLENDFACTOR_CONST_COLOR 7
9510 #define BLENDFACTOR_CONST_ALPHA 8
9511 #define BLENDFACTOR_SRC1_COLOR 9
9512 #define BLENDFACTOR_SRC1_ALPHA 10
9513 #define BLENDFACTOR_ZERO 17
9514 #define BLENDFACTOR_INV_SRC_COLOR 18
9515 #define BLENDFACTOR_INV_SRC_ALPHA 19
9516 #define BLENDFACTOR_INV_DST_ALPHA 20
9517 #define BLENDFACTOR_INV_DST_COLOR 21
9518 #define BLENDFACTOR_INV_CONST_COLOR 23
9519 #define BLENDFACTOR_INV_CONST_ALPHA 24
9520 #define BLENDFACTOR_INV_SRC1_COLOR 25
9521 #define BLENDFACTOR_INV_SRC1_ALPHA 26
9522
9523 /* Enum 3D_Color_Buffer_Blend_Function */
9524 #define BLENDFUNCTION_ADD 0
9525 #define BLENDFUNCTION_SUBTRACT 1
9526 #define BLENDFUNCTION_REVERSE_SUBTRACT 2
9527 #define BLENDFUNCTION_MIN 3
9528 #define BLENDFUNCTION_MAX 4
9529
9530 /* Enum 3D_Compare_Function */
9531 #define COMPAREFUNCTION_ALWAYS 0
9532 #define COMPAREFUNCTION_NEVER 1
9533 #define COMPAREFUNCTION_LESS 2
9534 #define COMPAREFUNCTION_EQUAL 3
9535 #define COMPAREFUNCTION_LEQUAL 4
9536 #define COMPAREFUNCTION_GREATER 5
9537 #define COMPAREFUNCTION_NOTEQUAL 6
9538 #define COMPAREFUNCTION_GEQUAL 7
9539
9540 /* Enum 3D_Logic_Op_Function */
9541 #define LOGICOP_CLEAR 0
9542 #define LOGICOP_NOR 1
9543 #define LOGICOP_AND_INVERTED 2
9544 #define LOGICOP_COPY_INVERTED 3
9545 #define LOGICOP_AND_REVERSE 4
9546 #define LOGICOP_INVERT 5
9547 #define LOGICOP_XOR 6
9548 #define LOGICOP_NAND 7
9549 #define LOGICOP_AND 8
9550 #define LOGICOP_EQUIV 9
9551 #define LOGICOP_NOOP 10
9552 #define LOGICOP_OR_INVERTED 11
9553 #define LOGICOP_COPY 12
9554 #define LOGICOP_OR_REVERSE 13
9555 #define LOGICOP_OR 14
9556 #define LOGICOP_SET 15
9557
9558 /* Enum SURFACE_FORMAT */
9559 #define R32G32B32A32_FLOAT 0
9560 #define R32G32B32A32_SINT 1
9561 #define R32G32B32A32_UINT 2
9562 #define R32G32B32A32_UNORM 3
9563 #define R32G32B32A32_SNORM 4
9564 #define R64G64_FLOAT 5
9565 #define R32G32B32X32_FLOAT 6
9566 #define R32G32B32A32_SSCALED 7
9567 #define R32G32B32A32_USCALED 8
9568 #define R32G32B32A32_SFIXED 32
9569 #define R64G64_PASSTHRU 33
9570 #define R32G32B32_FLOAT 64
9571 #define R32G32B32_SINT 65
9572 #define R32G32B32_UINT 66
9573 #define R32G32B32_UNORM 67
9574 #define R32G32B32_SNORM 68
9575 #define R32G32B32_SSCALED 69
9576 #define R32G32B32_USCALED 70
9577 #define R32G32B32_SFIXED 80
9578 #define R16G16B16A16_UNORM 128
9579 #define R16G16B16A16_SNORM 129
9580 #define R16G16B16A16_SINT 130
9581 #define R16G16B16A16_UINT 131
9582 #define R16G16B16A16_FLOAT 132
9583 #define R32G32_FLOAT 133
9584 #define R32G32_SINT 134
9585 #define R32G32_UINT 135
9586 #define R32_FLOAT_X8X24_TYPELESS 136
9587 #define X32_TYPELESS_G8X24_UINT 137
9588 #define L32A32_FLOAT 138
9589 #define R32G32_UNORM 139
9590 #define R32G32_SNORM 140
9591 #define R64_FLOAT 141
9592 #define R16G16B16X16_UNORM 142
9593 #define R16G16B16X16_FLOAT 143
9594 #define A32X32_FLOAT 144
9595 #define L32X32_FLOAT 145
9596 #define I32X32_FLOAT 146
9597 #define R16G16B16A16_SSCALED 147
9598 #define R16G16B16A16_USCALED 148
9599 #define R32G32_SSCALED 149
9600 #define R32G32_USCALED 150
9601 #define R32G32_SFIXED 160
9602 #define R64_PASSTHRU 161
9603 #define B8G8R8A8_UNORM 192
9604 #define B8G8R8A8_UNORM_SRGB 193
9605 #define R10G10B10A2_UNORM 194
9606 #define R10G10B10A2_UNORM_SRGB 195
9607 #define R10G10B10A2_UINT 196
9608 #define R10G10B10_SNORM_A2_UNORM 197
9609 #define R8G8B8A8_UNORM 199
9610 #define R8G8B8A8_UNORM_SRGB 200
9611 #define R8G8B8A8_SNORM 201
9612 #define R8G8B8A8_SINT 202
9613 #define R8G8B8A8_UINT 203
9614 #define R16G16_UNORM 204
9615 #define R16G16_SNORM 205
9616 #define R16G16_SINT 206
9617 #define R16G16_UINT 207
9618 #define R16G16_FLOAT 208
9619 #define B10G10R10A2_UNORM 209
9620 #define B10G10R10A2_UNORM_SRGB 210
9621 #define R11G11B10_FLOAT 211
9622 #define R32_SINT 214
9623 #define R32_UINT 215
9624 #define R32_FLOAT 216
9625 #define R24_UNORM_X8_TYPELESS 217
9626 #define X24_TYPELESS_G8_UINT 218
9627 #define L32_UNORM 221
9628 #define A32_UNORM 222
9629 #define L16A16_UNORM 223
9630 #define I24X8_UNORM 224
9631 #define L24X8_UNORM 225
9632 #define A24X8_UNORM 226
9633 #define I32_FLOAT 227
9634 #define L32_FLOAT 228
9635 #define A32_FLOAT 229
9636 #define X8B8_UNORM_G8R8_SNORM 230
9637 #define A8X8_UNORM_G8R8_SNORM 231
9638 #define B8X8_UNORM_G8R8_SNORM 232
9639 #define B8G8R8X8_UNORM 233
9640 #define B8G8R8X8_UNORM_SRGB 234
9641 #define R8G8B8X8_UNORM 235
9642 #define R8G8B8X8_UNORM_SRGB 236
9643 #define R9G9B9E5_SHAREDEXP 237
9644 #define B10G10R10X2_UNORM 238
9645 #define L16A16_FLOAT 240
9646 #define R32_UNORM 241
9647 #define R32_SNORM 242
9648 #define R10G10B10X2_USCALED 243
9649 #define R8G8B8A8_SSCALED 244
9650 #define R8G8B8A8_USCALED 245
9651 #define R16G16_SSCALED 246
9652 #define R16G16_USCALED 247
9653 #define R32_SSCALED 248
9654 #define R32_USCALED 249
9655 #define B5G6R5_UNORM 256
9656 #define B5G6R5_UNORM_SRGB 257
9657 #define B5G5R5A1_UNORM 258
9658 #define B5G5R5A1_UNORM_SRGB 259
9659 #define B4G4R4A4_UNORM 260
9660 #define B4G4R4A4_UNORM_SRGB 261
9661 #define R8G8_UNORM 262
9662 #define R8G8_SNORM 263
9663 #define R8G8_SINT 264
9664 #define R8G8_UINT 265
9665 #define R16_UNORM 266
9666 #define R16_SNORM 267
9667 #define R16_SINT 268
9668 #define R16_UINT 269
9669 #define R16_FLOAT 270
9670 #define A8P8_UNORM_PALETTE0 271
9671 #define A8P8_UNORM_PALETTE1 272
9672 #define I16_UNORM 273
9673 #define L16_UNORM 274
9674 #define A16_UNORM 275
9675 #define L8A8_UNORM 276
9676 #define I16_FLOAT 277
9677 #define L16_FLOAT 278
9678 #define A16_FLOAT 279
9679 #define L8A8_UNORM_SRGB 280
9680 #define R5G5_SNORM_B6_UNORM 281
9681 #define B5G5R5X1_UNORM 282
9682 #define B5G5R5X1_UNORM_SRGB 283
9683 #define R8G8_SSCALED 284
9684 #define R8G8_USCALED 285
9685 #define R16_SSCALED 286
9686 #define R16_USCALED 287
9687 #define P8A8_UNORM_PALETTE0 290
9688 #define P8A8_UNORM_PALETTE1 291
9689 #define A1B5G5R5_UNORM 292
9690 #define A4B4G4R4_UNORM 293
9691 #define L8A8_UINT 294
9692 #define L8A8_SINT 295
9693 #define R8_UNORM 320
9694 #define R8_SNORM 321
9695 #define R8_SINT 322
9696 #define R8_UINT 323
9697 #define A8_UNORM 324
9698 #define I8_UNORM 325
9699 #define L8_UNORM 326
9700 #define P4A4_UNORM_PALETTE0 327
9701 #define A4P4_UNORM_PALETTE0 328
9702 #define R8_SSCALED 329
9703 #define R8_USCALED 330
9704 #define P8_UNORM_PALETTE0 331
9705 #define L8_UNORM_SRGB 332
9706 #define P8_UNORM_PALETTE1 333
9707 #define P4A4_UNORM_PALETTE1 334
9708 #define A4P4_UNORM_PALETTE1 335
9709 #define Y8_UNORM 336
9710 #define L8_UINT 338
9711 #define L8_SINT 339
9712 #define I8_UINT 340
9713 #define I8_SINT 341
9714 #define DXT1_RGB_SRGB 384
9715 #define R1_UNORM 385
9716 #define YCRCB_NORMAL 386
9717 #define YCRCB_SWAPUVY 387
9718 #define P2_UNORM_PALETTE0 388
9719 #define P2_UNORM_PALETTE1 389
9720 #define BC1_UNORM 390
9721 #define BC2_UNORM 391
9722 #define BC3_UNORM 392
9723 #define BC4_UNORM 393
9724 #define BC5_UNORM 394
9725 #define BC1_UNORM_SRGB 395
9726 #define BC2_UNORM_SRGB 396
9727 #define BC3_UNORM_SRGB 397
9728 #define MONO8 398
9729 #define YCRCB_SWAPUV 399
9730 #define YCRCB_SWAPY 400
9731 #define DXT1_RGB 401
9732 #define FXT1 402
9733 #define R8G8B8_UNORM 403
9734 #define R8G8B8_SNORM 404
9735 #define R8G8B8_SSCALED 405
9736 #define R8G8B8_USCALED 406
9737 #define R64G64B64A64_FLOAT 407
9738 #define R64G64B64_FLOAT 408
9739 #define BC4_SNORM 409
9740 #define BC5_SNORM 410
9741 #define R16G16B16_FLOAT 411
9742 #define R16G16B16_UNORM 412
9743 #define R16G16B16_SNORM 413
9744 #define R16G16B16_SSCALED 414
9745 #define R16G16B16_USCALED 415
9746 #define BC6H_SF16 417
9747 #define BC7_UNORM 418
9748 #define BC7_UNORM_SRGB 419
9749 #define BC6H_UF16 420
9750 #define PLANAR_420_8 421
9751 #define R8G8B8_UNORM_SRGB 424
9752 #define ETC1_RGB8 425
9753 #define ETC2_RGB8 426
9754 #define EAC_R11 427
9755 #define EAC_RG11 428
9756 #define EAC_SIGNED_R11 429
9757 #define EAC_SIGNED_RG11 430
9758 #define ETC2_SRGB8 431
9759 #define R16G16B16_UINT 432
9760 #define R16G16B16_SINT 433
9761 #define R32_SFIXED 434
9762 #define R10G10B10A2_SNORM 435
9763 #define R10G10B10A2_USCALED 436
9764 #define R10G10B10A2_SSCALED 437
9765 #define R10G10B10A2_SINT 438
9766 #define B10G10R10A2_SNORM 439
9767 #define B10G10R10A2_USCALED 440
9768 #define B10G10R10A2_SSCALED 441
9769 #define B10G10R10A2_UINT 442
9770 #define B10G10R10A2_SINT 443
9771 #define R64G64B64A64_PASSTHRU 444
9772 #define R64G64B64_PASSTHRU 445
9773 #define ETC2_RGB8_PTA 448
9774 #define ETC2_SRGB8_PTA 449
9775 #define ETC2_EAC_RGBA8 450
9776 #define ETC2_EAC_SRGB8_A8 451
9777 #define R8G8B8_UINT 456
9778 #define R8G8B8_SINT 457
9779 #define RAW 511
9780
9781 /* Enum Shader Channel Select */
9782 #define SCS_ZERO 0
9783 #define SCS_ONE 1
9784 #define SCS_RED 4
9785 #define SCS_GREEN 5
9786 #define SCS_BLUE 6
9787 #define SCS_ALPHA 7
9788
9789 /* Enum Texture Coordinate Mode */
9790 #define TCM_WRAP 0
9791 #define TCM_MIRROR 1
9792 #define TCM_CLAMP 2
9793 #define TCM_CUBE 3
9794 #define TCM_CLAMP_BORDER 4
9795 #define TCM_MIRROR_ONCE 5
9796 #define TCM_HALF_BORDER 6
9797