src/vulkan/isl_image.c

   1 /*
   2  * Copyright 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "isl.h"
  25 #include "brw_compiler.h"
  26
  27 enum isl_format
  28 isl_lower_storage_image_format(const struct isl_device *dev,
  29                                enum isl_format format)
  30 {
  31    switch (format) {
  32    /* These are never lowered.  Up to BDW we'll have to fall back to untyped
  33     * surface access for 128bpp formats.
  34     */
  35    case ISL_FORMAT_R32G32B32A32_UINT:
  36    case ISL_FORMAT_R32G32B32A32_SINT:
  37    case ISL_FORMAT_R32G32B32A32_FLOAT:
  38    case ISL_FORMAT_R32_UINT:
  39    case ISL_FORMAT_R32_SINT:
  40    case ISL_FORMAT_R32_FLOAT:
  41       return format;
  42
  43    /* From HSW to BDW the only 64bpp format supported for typed access is
  44     * RGBA_UINT16.  IVB falls back to untyped.
  45     */
  46    case ISL_FORMAT_R16G16B16A16_UINT:
  47    case ISL_FORMAT_R16G16B16A16_SINT:
  48    case ISL_FORMAT_R16G16B16A16_FLOAT:
  49    case ISL_FORMAT_R32G32_UINT:
  50    case ISL_FORMAT_R32G32_SINT:
  51    case ISL_FORMAT_R32G32_FLOAT:
  52       return (ISL_DEV_GEN(dev) >= 9 ? format :
  53               ISL_DEV_GEN(dev) >= 8 || dev->info->is_haswell ?
  54               ISL_FORMAT_R16G16B16A16_UINT :
  55               ISL_FORMAT_R32G32_UINT);
  56
  57    /* Up to BDW no SINT or FLOAT formats of less than 32 bits per component
  58     * are supported.  IVB doesn't support formats with more than one component
  59     * for typed access.  For 8 and 16 bpp formats IVB relies on the
  60     * undocumented behavior that typed reads from R_UINT8 and R_UINT16
  61     * surfaces actually do a 32-bit misaligned read.  The alternative would be
  62     * to use two surface state entries with different formats for each image,
  63     * one for reading (using R_UINT32) and another one for writing (using
  64     * R_UINT8 or R_UINT16), but that would complicate the shaders we generate
  65     * even more.
  66     */
  67    case ISL_FORMAT_R8G8B8A8_UINT:
  68    case ISL_FORMAT_R8G8B8A8_SINT:
  69       return (ISL_DEV_GEN(dev) >= 9 ? format :
  70               ISL_DEV_GEN(dev) >= 8 || dev->info->is_haswell ?
  71               ISL_FORMAT_R8G8B8A8_UINT : ISL_FORMAT_R32_UINT);
  72
  73    case ISL_FORMAT_R16G16_UINT:
  74    case ISL_FORMAT_R16G16_SINT:
  75    case ISL_FORMAT_R16G16_FLOAT:
  76       return (ISL_DEV_GEN(dev) >= 9 ? format :
  77               ISL_DEV_GEN(dev) >= 8 || dev->info->is_haswell ?
  78               ISL_FORMAT_R16G16_UINT : ISL_FORMAT_R32_UINT);
  79
  80    case ISL_FORMAT_R8G8_UINT:
  81    case ISL_FORMAT_R8G8_SINT:
  82       return (ISL_DEV_GEN(dev) >= 9 ? format :
  83               ISL_DEV_GEN(dev) >= 8 || dev->info->is_haswell ?
  84               ISL_FORMAT_R8G8_UINT : ISL_FORMAT_R16_UINT);
  85
  86    case ISL_FORMAT_R16_UINT:
  87    case ISL_FORMAT_R16_FLOAT:
  88    case ISL_FORMAT_R16_SINT:
  89       return (ISL_DEV_GEN(dev) >= 9 ? format : ISL_FORMAT_R16_UINT);
  90
  91    case ISL_FORMAT_R8_UINT:
  92    case ISL_FORMAT_R8_SINT:
  93       return (ISL_DEV_GEN(dev) >= 9 ? format : ISL_FORMAT_R8_UINT);
  94
  95    /* Neither the 2/10/10/10 nor the 11/11/10 packed formats are supported
  96     * by the hardware.
  97     */
  98    case ISL_FORMAT_R10G10B10A2_UINT:
  99    case ISL_FORMAT_R10G10B10A2_UNORM:
 100    case ISL_FORMAT_R11G11B10_FLOAT:
 101       return ISL_FORMAT_R32_UINT;
 102
 103    /* No normalized fixed-point formats are supported by the hardware. */
 104    case ISL_FORMAT_R16G16B16A16_UNORM:
 105    case ISL_FORMAT_R16G16B16A16_SNORM:
 106       return (ISL_DEV_GEN(dev) >= 8 || dev->info->is_haswell ?
 107               ISL_FORMAT_R16G16B16A16_UINT :
 108               ISL_FORMAT_R32G32_UINT);
 109
 110    case ISL_FORMAT_R8G8B8A8_UNORM:
 111    case ISL_FORMAT_R8G8B8A8_SNORM:
 112       return (ISL_DEV_GEN(dev) >= 8 || dev->info->is_haswell ?
 113               ISL_FORMAT_R8G8B8A8_UINT : ISL_FORMAT_R32_UINT);
 114
 115    case ISL_FORMAT_R16G16_UNORM:
 116    case ISL_FORMAT_R16G16_SNORM:
 117       return (ISL_DEV_GEN(dev) >= 8 || dev->info->is_haswell ?
 118               ISL_FORMAT_R16G16_UINT : ISL_FORMAT_R32_UINT);
 119
 120    case ISL_FORMAT_R8G8_UNORM:
 121    case ISL_FORMAT_R8G8_SNORM:
 122       return (ISL_DEV_GEN(dev) >= 8 || dev->info->is_haswell ?
 123               ISL_FORMAT_R8G8_UINT : ISL_FORMAT_R16_UINT);
 124
 125    case ISL_FORMAT_R16_UNORM:
 126    case ISL_FORMAT_R16_SNORM:
 127       return ISL_FORMAT_R16_UINT;
 128
 129    case ISL_FORMAT_R8_UNORM:
 130    case ISL_FORMAT_R8_SNORM:
 131       return ISL_FORMAT_R8_UINT;
 132
 133    default:
 134       assert(!"Unknown image format");
 135       return ISL_FORMAT_UNSUPPORTED;
 136    }
 137 }