src/vulkan/pipeline.c

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <assert.h>
  25 #include <stdbool.h>
  26 #include <string.h>
  27 #include <unistd.h>
  28 #include <fcntl.h>
  29
  30 #include "private.h"
  31
  32 // Shader functions
  33
  34 VkResult anv_CreateShaderModule(
  35     VkDevice                                    _device,
  36     const VkShaderModuleCreateInfo*             pCreateInfo,
  37     VkShader*                                   pShaderModule)
  38 {
  39    ANV_FROM_HANDLE(anv_device, device, _device);
  40    struct anv_shader_module *module;
  41
  42    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SHADER_MODULE_CREATE_INFO);
  43    assert(pCreateInfo->flags == 0);
  44
  45    module = anv_device_alloc(device, sizeof(*module) + pCreateInfo->codeSize, 8,
  46                              VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
  47    if (module == NULL)
  48       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
  49
  50    module->size = pCreateInfo->codeSize;
  51    memcpy(module->data, pCreateInfo->pCode, module->size);
  52
  53    *pShaderModule = (VkShaderModule) module;
  54
  55    return VK_SUCCESS;
  56 }
  57
  58 VkResult anv_CreateShader(
  59     VkDevice                                    _device,
  60     const VkShaderCreateInfo*                   pCreateInfo,
  61     VkShader*                                   pShader)
  62 {
  63    ANV_FROM_HANDLE(anv_device, device, _device);
  64    ANV_FROM_HANDLE(anv_shader_module, module, pCreateInfo->module);
  65    struct anv_shader *shader;
  66
  67    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SHADER_CREATE_INFO);
  68    assert(pCreateInfo->flags == 0);
  69
  70    size_t name_len = strlen(pCreateInfo->pName);
  71
  72    if (strcmp(pCreateInfo->pName, "main") != 0) {
  73       anv_finishme("Multiple shaders per module not really supported");
  74    }
  75
  76    shader = anv_device_alloc(device, sizeof(*shader) + name_len + 1, 8,
  77                              VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
  78    if (shader == NULL)
  79       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
  80
  81    shader->module = module;
  82    memcpy(shader->entrypoint, pCreateInfo->pName, name_len + 1);
  83
  84    *pShader = (VkShader) shader;
  85
  86    return VK_SUCCESS;
  87 }
  88
  89 VkResult anv_CreatePipelineCache(
  90     VkDevice                                    device,
  91     const VkPipelineCacheCreateInfo*            pCreateInfo,
  92     VkPipelineCache*                            pPipelineCache)
  93 {
  94    *pPipelineCache = 1;
  95
  96    stub_return(VK_SUCCESS);
  97 }
  98
  99 size_t anv_GetPipelineCacheSize(
 100     VkDevice                                    device,
 101     VkPipelineCache                             pipelineCache)
 102 {
 103    stub_return(0);
 104 }
 105
 106 VkResult anv_GetPipelineCacheData(
 107     VkDevice                                    device,
 108     VkPipelineCache                             pipelineCache,
 109     void*                                       pData)
 110 {
 111    stub_return(VK_UNSUPPORTED);
 112 }
 113
 114 VkResult anv_MergePipelineCaches(
 115     VkDevice                                    device,
 116     VkPipelineCache                             destCache,
 117     uint32_t                                    srcCacheCount,
 118     const VkPipelineCache*                      pSrcCaches)
 119 {
 120    stub_return(VK_UNSUPPORTED);
 121 }
 122
 123 // Pipeline functions
 124
 125 static void
 126 emit_vertex_input(struct anv_pipeline *pipeline,
 127                   const VkPipelineVertexInputStateCreateInfo *info)
 128 {
 129    const uint32_t num_dwords = 1 + info->attributeCount * 2;
 130    uint32_t *p;
 131    bool instancing_enable[32];
 132
 133    pipeline->vb_used = 0;
 134    for (uint32_t i = 0; i < info->bindingCount; i++) {
 135       const VkVertexInputBindingDescription *desc =
 136          &info->pVertexBindingDescriptions[i];
 137
 138       pipeline->vb_used |= 1 << desc->binding;
 139       pipeline->binding_stride[desc->binding] = desc->strideInBytes;
 140
 141       /* Step rate is programmed per vertex element (attribute), not
 142        * binding. Set up a map of which bindings step per instance, for
 143        * reference by vertex element setup. */
 144       switch (desc->stepRate) {
 145       default:
 146       case VK_VERTEX_INPUT_STEP_RATE_VERTEX:
 147          instancing_enable[desc->binding] = false;
 148          break;
 149       case VK_VERTEX_INPUT_STEP_RATE_INSTANCE:
 150          instancing_enable[desc->binding] = true;
 151          break;
 152       }
 153    }
 154
 155    p = anv_batch_emitn(&pipeline->batch, num_dwords,
 156                        GEN8_3DSTATE_VERTEX_ELEMENTS);
 157
 158    for (uint32_t i = 0; i < info->attributeCount; i++) {
 159       const VkVertexInputAttributeDescription *desc =
 160          &info->pVertexAttributeDescriptions[i];
 161       const struct anv_format *format = anv_format_for_vk_format(desc->format);
 162
 163       struct GEN8_VERTEX_ELEMENT_STATE element = {
 164          .VertexBufferIndex = desc->binding,
 165          .Valid = true,
 166          .SourceElementFormat = format->surface_format,
 167          .EdgeFlagEnable = false,
 168          .SourceElementOffset = desc->offsetInBytes,
 169          .Component0Control = VFCOMP_STORE_SRC,
 170          .Component1Control = format->num_channels >= 2 ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
 171          .Component2Control = format->num_channels >= 3 ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
 172          .Component3Control = format->num_channels >= 4 ? VFCOMP_STORE_SRC : VFCOMP_STORE_1_FP
 173       };
 174       GEN8_VERTEX_ELEMENT_STATE_pack(NULL, &p[1 + i * 2], &element);
 175
 176       anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_INSTANCING,
 177                      .InstancingEnable = instancing_enable[desc->binding],
 178                      .VertexElementIndex = i,
 179                      /* Vulkan so far doesn't have an instance divisor, so
 180                       * this is always 1 (ignored if not instancing). */
 181                      .InstanceDataStepRate = 1);
 182    }
 183
 184    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_SGVS,
 185                   .VertexIDEnable = pipeline->vs_prog_data.uses_vertexid,
 186                   .VertexIDComponentNumber = 2,
 187                   .VertexIDElementOffset = info->bindingCount,
 188                   .InstanceIDEnable = pipeline->vs_prog_data.uses_instanceid,
 189                   .InstanceIDComponentNumber = 3,
 190                   .InstanceIDElementOffset = info->bindingCount);
 191 }
 192
 193 static void
 194 emit_ia_state(struct anv_pipeline *pipeline,
 195               const VkPipelineIaStateCreateInfo *info,
 196               const struct anv_pipeline_create_info *extra)
 197 {
 198    static const uint32_t vk_to_gen_primitive_type[] = {
 199       [VK_PRIMITIVE_TOPOLOGY_POINT_LIST]        = _3DPRIM_POINTLIST,
 200       [VK_PRIMITIVE_TOPOLOGY_LINE_LIST]         = _3DPRIM_LINELIST,
 201       [VK_PRIMITIVE_TOPOLOGY_LINE_STRIP]        = _3DPRIM_LINESTRIP,
 202       [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST]     = _3DPRIM_TRILIST,
 203       [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP]    = _3DPRIM_TRISTRIP,
 204       [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_FAN]      = _3DPRIM_TRIFAN,
 205       [VK_PRIMITIVE_TOPOLOGY_LINE_LIST_ADJ]     = _3DPRIM_LINELIST_ADJ,
 206       [VK_PRIMITIVE_TOPOLOGY_LINE_STRIP_ADJ]    = _3DPRIM_LINESTRIP_ADJ,
 207       [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST_ADJ] = _3DPRIM_TRILIST_ADJ,
 208       [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP_ADJ] = _3DPRIM_TRISTRIP_ADJ,
 209       [VK_PRIMITIVE_TOPOLOGY_PATCH]             = _3DPRIM_PATCHLIST_1
 210    };
 211    uint32_t topology = vk_to_gen_primitive_type[info->topology];
 212
 213    if (extra && extra->use_rectlist)
 214       topology = _3DPRIM_RECTLIST;
 215
 216    struct GEN8_3DSTATE_VF vf = {
 217       GEN8_3DSTATE_VF_header,
 218       .IndexedDrawCutIndexEnable = info->primitiveRestartEnable,
 219    };
 220    GEN8_3DSTATE_VF_pack(NULL, pipeline->state_vf, &vf);
 221
 222    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_TOPOLOGY,
 223                   .PrimitiveTopologyType = topology);
 224 }
 225
 226 static void
 227 emit_rs_state(struct anv_pipeline *pipeline,
 228               const VkPipelineRsStateCreateInfo *info,
 229               const struct anv_pipeline_create_info *extra)
 230 {
 231    static const uint32_t vk_to_gen_cullmode[] = {
 232       [VK_CULL_MODE_NONE]                       = CULLMODE_NONE,
 233       [VK_CULL_MODE_FRONT]                      = CULLMODE_FRONT,
 234       [VK_CULL_MODE_BACK]                       = CULLMODE_BACK,
 235       [VK_CULL_MODE_FRONT_AND_BACK]             = CULLMODE_BOTH
 236    };
 237
 238    static const uint32_t vk_to_gen_fillmode[] = {
 239       [VK_FILL_MODE_POINTS]                     = RASTER_POINT,
 240       [VK_FILL_MODE_WIREFRAME]                  = RASTER_WIREFRAME,
 241       [VK_FILL_MODE_SOLID]                      = RASTER_SOLID
 242    };
 243
 244    static const uint32_t vk_to_gen_front_face[] = {
 245       [VK_FRONT_FACE_CCW]                       = CounterClockwise,
 246       [VK_FRONT_FACE_CW]                        = Clockwise
 247    };
 248
 249    struct GEN8_3DSTATE_SF sf = {
 250       GEN8_3DSTATE_SF_header,
 251       .ViewportTransformEnable = !(extra && extra->disable_viewport),
 252       .TriangleStripListProvokingVertexSelect = 0,
 253       .LineStripListProvokingVertexSelect = 0,
 254       .TriangleFanProvokingVertexSelect = 0,
 255       .PointWidthSource = pipeline->writes_point_size ? Vertex : State,
 256       .PointWidth = 1.0,
 257    };
 258
 259    /* FINISHME: bool32_t rasterizerDiscardEnable; */
 260
 261    GEN8_3DSTATE_SF_pack(NULL, pipeline->state_sf, &sf);
 262
 263    struct GEN8_3DSTATE_RASTER raster = {
 264       GEN8_3DSTATE_RASTER_header,
 265       .FrontWinding = vk_to_gen_front_face[info->frontFace],
 266       .CullMode = vk_to_gen_cullmode[info->cullMode],
 267       .FrontFaceFillMode = vk_to_gen_fillmode[info->fillMode],
 268       .BackFaceFillMode = vk_to_gen_fillmode[info->fillMode],
 269       .ScissorRectangleEnable = !(extra && extra->disable_scissor),
 270       .ViewportZClipTestEnable = info->depthClipEnable
 271    };
 272
 273    GEN8_3DSTATE_RASTER_pack(NULL, pipeline->state_raster, &raster);
 274
 275    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_SBE,
 276                   .ForceVertexURBEntryReadLength = false,
 277                   .ForceVertexURBEntryReadOffset = false,
 278                   .PointSpriteTextureCoordinateOrigin = UPPERLEFT,
 279                   .NumberofSFOutputAttributes =
 280                      pipeline->wm_prog_data.num_varying_inputs);
 281
 282 }
 283
 284 static void
 285 emit_cb_state(struct anv_pipeline *pipeline,
 286               const VkPipelineCbStateCreateInfo *info)
 287 {
 288    struct anv_device *device = pipeline->device;
 289
 290    static const uint32_t vk_to_gen_logic_op[] = {
 291       [VK_LOGIC_OP_COPY]                        = LOGICOP_COPY,
 292       [VK_LOGIC_OP_CLEAR]                       = LOGICOP_CLEAR,
 293       [VK_LOGIC_OP_AND]                         = LOGICOP_AND,
 294       [VK_LOGIC_OP_AND_REVERSE]                 = LOGICOP_AND_REVERSE,
 295       [VK_LOGIC_OP_AND_INVERTED]                = LOGICOP_AND_INVERTED,
 296       [VK_LOGIC_OP_NOOP]                        = LOGICOP_NOOP,
 297       [VK_LOGIC_OP_XOR]                         = LOGICOP_XOR,
 298       [VK_LOGIC_OP_OR]                          = LOGICOP_OR,
 299       [VK_LOGIC_OP_NOR]                         = LOGICOP_NOR,
 300       [VK_LOGIC_OP_EQUIV]                       = LOGICOP_EQUIV,
 301       [VK_LOGIC_OP_INVERT]                      = LOGICOP_INVERT,
 302       [VK_LOGIC_OP_OR_REVERSE]                  = LOGICOP_OR_REVERSE,
 303       [VK_LOGIC_OP_COPY_INVERTED]               = LOGICOP_COPY_INVERTED,
 304       [VK_LOGIC_OP_OR_INVERTED]                 = LOGICOP_OR_INVERTED,
 305       [VK_LOGIC_OP_NAND]                        = LOGICOP_NAND,
 306       [VK_LOGIC_OP_SET]                         = LOGICOP_SET,
 307    };
 308
 309    static const uint32_t vk_to_gen_blend[] = {
 310       [VK_BLEND_ZERO]                           = BLENDFACTOR_ZERO,
 311       [VK_BLEND_ONE]                            = BLENDFACTOR_ONE,
 312       [VK_BLEND_SRC_COLOR]                      = BLENDFACTOR_SRC_COLOR,
 313       [VK_BLEND_ONE_MINUS_SRC_COLOR]            = BLENDFACTOR_INV_SRC_COLOR,
 314       [VK_BLEND_DEST_COLOR]                     = BLENDFACTOR_DST_COLOR,
 315       [VK_BLEND_ONE_MINUS_DEST_COLOR]           = BLENDFACTOR_INV_DST_COLOR,
 316       [VK_BLEND_SRC_ALPHA]                      = BLENDFACTOR_SRC_ALPHA,
 317       [VK_BLEND_ONE_MINUS_SRC_ALPHA]            = BLENDFACTOR_INV_SRC_ALPHA,
 318       [VK_BLEND_DEST_ALPHA]                     = BLENDFACTOR_DST_ALPHA,
 319       [VK_BLEND_ONE_MINUS_DEST_ALPHA]           = BLENDFACTOR_INV_DST_ALPHA,
 320       [VK_BLEND_CONSTANT_COLOR]                 = BLENDFACTOR_CONST_COLOR,
 321       [VK_BLEND_ONE_MINUS_CONSTANT_COLOR]       = BLENDFACTOR_INV_CONST_COLOR,
 322       [VK_BLEND_CONSTANT_ALPHA]                 = BLENDFACTOR_CONST_ALPHA,
 323       [VK_BLEND_ONE_MINUS_CONSTANT_ALPHA]       = BLENDFACTOR_INV_CONST_ALPHA,
 324       [VK_BLEND_SRC_ALPHA_SATURATE]             = BLENDFACTOR_SRC_ALPHA_SATURATE,
 325       [VK_BLEND_SRC1_COLOR]                     = BLENDFACTOR_SRC1_COLOR,
 326       [VK_BLEND_ONE_MINUS_SRC1_COLOR]           = BLENDFACTOR_INV_SRC1_COLOR,
 327       [VK_BLEND_SRC1_ALPHA]                     = BLENDFACTOR_SRC1_ALPHA,
 328       [VK_BLEND_ONE_MINUS_SRC1_ALPHA]           = BLENDFACTOR_INV_SRC1_ALPHA,
 329    };
 330
 331    static const uint32_t vk_to_gen_blend_op[] = {
 332       [VK_BLEND_OP_ADD]                         = BLENDFUNCTION_ADD,
 333       [VK_BLEND_OP_SUBTRACT]                    = BLENDFUNCTION_SUBTRACT,
 334       [VK_BLEND_OP_REVERSE_SUBTRACT]            = BLENDFUNCTION_REVERSE_SUBTRACT,
 335       [VK_BLEND_OP_MIN]                         = BLENDFUNCTION_MIN,
 336       [VK_BLEND_OP_MAX]                         = BLENDFUNCTION_MAX,
 337    };
 338
 339    uint32_t num_dwords = 1 + info->attachmentCount * 2;
 340    pipeline->blend_state =
 341       anv_state_pool_alloc(&device->dynamic_state_pool, num_dwords * 4, 64);
 342
 343    struct GEN8_BLEND_STATE blend_state = {
 344       .AlphaToCoverageEnable = info->alphaToCoverageEnable,
 345    };
 346
 347    uint32_t *state = pipeline->blend_state.map;
 348    GEN8_BLEND_STATE_pack(NULL, state, &blend_state);
 349
 350    for (uint32_t i = 0; i < info->attachmentCount; i++) {
 351       const VkPipelineCbAttachmentState *a = &info->pAttachments[i];
 352
 353       struct GEN8_BLEND_STATE_ENTRY entry = {
 354          .LogicOpEnable = info->logicOpEnable,
 355          .LogicOpFunction = vk_to_gen_logic_op[info->logicOp],
 356          .ColorBufferBlendEnable = a->blendEnable,
 357          .PreBlendSourceOnlyClampEnable = false,
 358          .PreBlendColorClampEnable = false,
 359          .PostBlendColorClampEnable = false,
 360          .SourceBlendFactor = vk_to_gen_blend[a->srcBlendColor],
 361          .DestinationBlendFactor = vk_to_gen_blend[a->destBlendColor],
 362          .ColorBlendFunction = vk_to_gen_blend_op[a->blendOpColor],
 363          .SourceAlphaBlendFactor = vk_to_gen_blend[a->srcBlendAlpha],
 364          .DestinationAlphaBlendFactor = vk_to_gen_blend[a->destBlendAlpha],
 365          .AlphaBlendFunction = vk_to_gen_blend_op[a->blendOpAlpha],
 366          .WriteDisableAlpha = !(a->channelWriteMask & VK_CHANNEL_A_BIT),
 367          .WriteDisableRed = !(a->channelWriteMask & VK_CHANNEL_R_BIT),
 368          .WriteDisableGreen = !(a->channelWriteMask & VK_CHANNEL_G_BIT),
 369          .WriteDisableBlue = !(a->channelWriteMask & VK_CHANNEL_B_BIT),
 370       };
 371
 372       GEN8_BLEND_STATE_ENTRY_pack(NULL, state + i * 2 + 1, &entry);
 373    }
 374
 375    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_BLEND_STATE_POINTERS,
 376                   .BlendStatePointer = pipeline->blend_state.offset,
 377                   .BlendStatePointerValid = true);
 378 }
 379
 380 static const uint32_t vk_to_gen_compare_op[] = {
 381    [VK_COMPARE_OP_NEVER]                        = COMPAREFUNCTION_NEVER,
 382    [VK_COMPARE_OP_LESS]                         = COMPAREFUNCTION_LESS,
 383    [VK_COMPARE_OP_EQUAL]                        = COMPAREFUNCTION_EQUAL,
 384    [VK_COMPARE_OP_LESS_EQUAL]                   = COMPAREFUNCTION_LEQUAL,
 385    [VK_COMPARE_OP_GREATER]                      = COMPAREFUNCTION_GREATER,
 386    [VK_COMPARE_OP_NOT_EQUAL]                    = COMPAREFUNCTION_NOTEQUAL,
 387    [VK_COMPARE_OP_GREATER_EQUAL]                = COMPAREFUNCTION_GEQUAL,
 388    [VK_COMPARE_OP_ALWAYS]                       = COMPAREFUNCTION_ALWAYS,
 389 };
 390
 391 static const uint32_t vk_to_gen_stencil_op[] = {
 392    [VK_STENCIL_OP_KEEP]                         = 0,
 393    [VK_STENCIL_OP_ZERO]                         = 0,
 394    [VK_STENCIL_OP_REPLACE]                      = 0,
 395    [VK_STENCIL_OP_INC_CLAMP]                    = 0,
 396    [VK_STENCIL_OP_DEC_CLAMP]                    = 0,
 397    [VK_STENCIL_OP_INVERT]                       = 0,
 398    [VK_STENCIL_OP_INC_WRAP]                     = 0,
 399    [VK_STENCIL_OP_DEC_WRAP]                     = 0
 400 };
 401
 402 static void
 403 emit_ds_state(struct anv_pipeline *pipeline,
 404               const VkPipelineDsStateCreateInfo *info)
 405 {
 406    if (info == NULL) {
 407       /* We're going to OR this together with the dynamic state.  We need
 408        * to make sure it's initialized to something useful.
 409        */
 410       memset(pipeline->state_wm_depth_stencil, 0,
 411              sizeof(pipeline->state_wm_depth_stencil));
 412       return;
 413    }
 414
 415    /* bool32_t depthBoundsEnable;          // optional (depth_bounds_test) */
 416
 417    struct GEN8_3DSTATE_WM_DEPTH_STENCIL wm_depth_stencil = {
 418       .DepthTestEnable = info->depthTestEnable,
 419       .DepthBufferWriteEnable = info->depthWriteEnable,
 420       .DepthTestFunction = vk_to_gen_compare_op[info->depthCompareOp],
 421       .DoubleSidedStencilEnable = true,
 422
 423       .StencilTestEnable = info->stencilTestEnable,
 424       .StencilFailOp = vk_to_gen_stencil_op[info->front.stencilFailOp],
 425       .StencilPassDepthPassOp = vk_to_gen_stencil_op[info->front.stencilPassOp],
 426       .StencilPassDepthFailOp = vk_to_gen_stencil_op[info->front.stencilDepthFailOp],
 427       .StencilTestFunction = vk_to_gen_compare_op[info->front.stencilCompareOp],
 428       .BackfaceStencilFailOp = vk_to_gen_stencil_op[info->back.stencilFailOp],
 429       .BackfaceStencilPassDepthPassOp = vk_to_gen_stencil_op[info->back.stencilPassOp],
 430       .BackfaceStencilPassDepthFailOp =vk_to_gen_stencil_op[info->back.stencilDepthFailOp],
 431       .BackfaceStencilTestFunction = vk_to_gen_compare_op[info->back.stencilCompareOp],
 432    };
 433
 434    GEN8_3DSTATE_WM_DEPTH_STENCIL_pack(NULL, pipeline->state_wm_depth_stencil, &wm_depth_stencil);
 435 }
 436
 437 static void
 438 anv_pipeline_destroy(struct anv_device *device,
 439                      struct anv_object *object,
 440                      VkObjectType obj_type)
 441 {
 442    struct anv_pipeline *pipeline = (struct anv_pipeline*) object;
 443
 444    assert(obj_type == VK_OBJECT_TYPE_PIPELINE);
 445
 446    anv_compiler_free(pipeline);
 447    anv_reloc_list_finish(&pipeline->batch.relocs, pipeline->device);
 448    anv_state_stream_finish(&pipeline->program_stream);
 449    anv_state_pool_free(&device->dynamic_state_pool, pipeline->blend_state);
 450    anv_device_free(pipeline->device, pipeline);
 451 }
 452
 453 VkResult
 454 anv_pipeline_create(
 455     VkDevice                                    _device,
 456     const VkGraphicsPipelineCreateInfo*         pCreateInfo,
 457     const struct anv_pipeline_create_info *     extra,
 458     VkPipeline*                                 pPipeline)
 459 {
 460    struct anv_device *device = (struct anv_device *) _device;
 461    struct anv_pipeline *pipeline;
 462    VkResult result;
 463    uint32_t offset, length;
 464
 465    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO);
 466
 467    pipeline = anv_device_alloc(device, sizeof(*pipeline), 8,
 468                                VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
 469    if (pipeline == NULL)
 470       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
 471
 472    pipeline->base.destructor = anv_pipeline_destroy;
 473    pipeline->device = device;
 474    pipeline->layout = (struct anv_pipeline_layout *) pCreateInfo->layout;
 475    memset(pipeline->shaders, 0, sizeof(pipeline->shaders));
 476
 477    result = anv_reloc_list_init(&pipeline->batch.relocs, device);
 478    if (result != VK_SUCCESS) {
 479       anv_device_free(device, pipeline);
 480       return result;
 481    }
 482    pipeline->batch.next = pipeline->batch.start = pipeline->batch_data;
 483    pipeline->batch.end = pipeline->batch.start + sizeof(pipeline->batch_data);
 484
 485    anv_state_stream_init(&pipeline->program_stream,
 486                          &device->instruction_block_pool);
 487
 488    for (uint32_t i = 0; i < pCreateInfo->stageCount; i++) {
 489       pipeline->shaders[pCreateInfo->pStages[i].stage] =
 490          (struct anv_shader *) pCreateInfo->pStages[i].shader;
 491    }
 492
 493    if (pCreateInfo->pTessState)
 494       anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_TESS_STATE_CREATE_INFO");
 495    if (pCreateInfo->pVpState)
 496       anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_VP_STATE_CREATE_INFO");
 497    if (pCreateInfo->pMsState)
 498       anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_MS_STATE_CREATE_INFO");
 499
 500    pipeline->use_repclear = extra && extra->use_repclear;
 501
 502    anv_compiler_run(device->compiler, pipeline);
 503
 504    /* FIXME: The compiler dead-codes FS inputs when we don't have a VS, so we
 505     * hard code this to num_attributes - 2. This is because the attributes
 506     * include VUE header and position, which aren't counted as varying
 507     * inputs. */
 508    if (pipeline->vs_simd8 == NO_KERNEL) {
 509       pipeline->wm_prog_data.num_varying_inputs =
 510          pCreateInfo->pVertexInputState->attributeCount - 2;
 511    }
 512
 513    assert(pCreateInfo->pVertexInputState);
 514    emit_vertex_input(pipeline, pCreateInfo->pVertexInputState);
 515    assert(pCreateInfo->pIaState);
 516    emit_ia_state(pipeline, pCreateInfo->pIaState, extra);
 517    assert(pCreateInfo->pRsState);
 518    emit_rs_state(pipeline, pCreateInfo->pRsState, extra);
 519    emit_ds_state(pipeline, pCreateInfo->pDsState);
 520    emit_cb_state(pipeline, pCreateInfo->pCbState);
 521
 522    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_STATISTICS,
 523                    .StatisticsEnable = true);
 524    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_HS, .Enable = false);
 525    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_TE, .TEEnable = false);
 526    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_DS, .FunctionEnable = false);
 527    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_STREAMOUT, .SOFunctionEnable = false);
 528
 529    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS,
 530                   .ConstantBufferOffset = 0,
 531                   .ConstantBufferSize = 4);
 532    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS,
 533                   .ConstantBufferOffset = 4,
 534                   .ConstantBufferSize = 4);
 535    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS,
 536                   .ConstantBufferOffset = 8,
 537                   .ConstantBufferSize = 4);
 538
 539    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_WM_CHROMAKEY,
 540                   .ChromaKeyKillEnable = false);
 541    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_SBE_SWIZ);
 542    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_AA_LINE_PARAMETERS);
 543
 544    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_CLIP,
 545                   .ClipEnable = true,
 546                   .ViewportXYClipTestEnable = !(extra && extra->disable_viewport),
 547                   .MinimumPointWidth = 0.125,
 548                   .MaximumPointWidth = 255.875);
 549
 550    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_WM,
 551                   .StatisticsEnable = true,
 552                   .LineEndCapAntialiasingRegionWidth = _05pixels,
 553                   .LineAntialiasingRegionWidth = _10pixels,
 554                   .EarlyDepthStencilControl = NORMAL,
 555                   .ForceThreadDispatchEnable = NORMAL,
 556                   .PointRasterizationRule = RASTRULE_UPPER_RIGHT,
 557                   .BarycentricInterpolationMode =
 558                      pipeline->wm_prog_data.barycentric_interp_modes);
 559
 560    uint32_t samples = 1;
 561    uint32_t log2_samples = __builtin_ffs(samples) - 1;
 562    bool enable_sampling = samples > 1 ? true : false;
 563
 564    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_MULTISAMPLE,
 565                   .PixelPositionOffsetEnable = enable_sampling,
 566                   .PixelLocation = CENTER,
 567                   .NumberofMultisamples = log2_samples);
 568
 569    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_SAMPLE_MASK,
 570                   .SampleMask = 0xffff);
 571
 572    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_VS,
 573                   .VSURBStartingAddress = pipeline->urb.vs_start,
 574                   .VSURBEntryAllocationSize = pipeline->urb.vs_size - 1,
 575                   .VSNumberofURBEntries = pipeline->urb.nr_vs_entries);
 576
 577    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_GS,
 578                   .GSURBStartingAddress = pipeline->urb.gs_start,
 579                   .GSURBEntryAllocationSize = pipeline->urb.gs_size - 1,
 580                   .GSNumberofURBEntries = pipeline->urb.nr_gs_entries);
 581
 582    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_HS,
 583                   .HSURBStartingAddress = pipeline->urb.vs_start,
 584                   .HSURBEntryAllocationSize = 0,
 585                   .HSNumberofURBEntries = 0);
 586
 587    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_DS,
 588                   .DSURBStartingAddress = pipeline->urb.vs_start,
 589                   .DSURBEntryAllocationSize = 0,
 590                   .DSNumberofURBEntries = 0);
 591
 592    const struct brw_gs_prog_data *gs_prog_data = &pipeline->gs_prog_data;
 593    offset = 1;
 594    length = (gs_prog_data->base.vue_map.num_slots + 1) / 2 - offset;
 595
 596    if (pipeline->gs_vec4 == NO_KERNEL)
 597       anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_GS, .Enable = false);
 598    else
 599       anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_GS,
 600                      .SingleProgramFlow = false,
 601                      .KernelStartPointer = pipeline->gs_vec4,
 602                      .VectorMaskEnable = Vmask,
 603                      .SamplerCount = 0,
 604                      .BindingTableEntryCount = 0,
 605                      .ExpectedVertexCount = pipeline->gs_vertex_count,
 606
 607                      .ScratchSpaceBasePointer = pipeline->scratch_start[VK_SHADER_STAGE_GEOMETRY],
 608                      .PerThreadScratchSpace = ffs(gs_prog_data->base.base.total_scratch / 2048),
 609
 610                      .OutputVertexSize = gs_prog_data->output_vertex_size_hwords * 2 - 1,
 611                      .OutputTopology = gs_prog_data->output_topology,
 612                      .VertexURBEntryReadLength = gs_prog_data->base.urb_read_length,
 613                      .DispatchGRFStartRegisterForURBData =
 614                         gs_prog_data->base.base.dispatch_grf_start_reg,
 615
 616                      .MaximumNumberofThreads = device->info.max_gs_threads,
 617                      .ControlDataHeaderSize = gs_prog_data->control_data_header_size_hwords,
 618                      //pipeline->gs_prog_data.dispatch_mode |
 619                      .StatisticsEnable = true,
 620                      .IncludePrimitiveID = gs_prog_data->include_primitive_id,
 621                      .ReorderMode = TRAILING,
 622                      .Enable = true,
 623
 624                      .ControlDataFormat = gs_prog_data->control_data_format,
 625
 626                      /* FIXME: mesa sets this based on ctx->Transform.ClipPlanesEnabled:
 627                       * UserClipDistanceClipTestEnableBitmask_3DSTATE_GS(v)
 628                       * UserClipDistanceCullTestEnableBitmask(v)
 629                       */
 630
 631                      .VertexURBEntryOutputReadOffset = offset,
 632                      .VertexURBEntryOutputLength = length);
 633
 634    const struct brw_vue_prog_data *vue_prog_data = &pipeline->vs_prog_data.base;
 635    /* Skip the VUE header and position slots */
 636    offset = 1;
 637    length = (vue_prog_data->vue_map.num_slots + 1) / 2 - offset;
 638
 639    if (pipeline->vs_simd8 == NO_KERNEL || (extra && extra->disable_vs))
 640       anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VS,
 641                      .FunctionEnable = false,
 642                      .VertexURBEntryOutputReadOffset = 1,
 643                      /* Even if VS is disabled, SBE still gets the amount of
 644                       * vertex data to read from this field. We use attribute
 645                       * count - 1, as we don't count the VUE header here. */
 646                      .VertexURBEntryOutputLength =
 647                         DIV_ROUND_UP(pCreateInfo->pVertexInputState->attributeCount - 1, 2));
 648    else
 649       anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VS,
 650                      .KernelStartPointer = pipeline->vs_simd8,
 651                      .SingleVertexDispatch = Multiple,
 652                      .VectorMaskEnable = Dmask,
 653                      .SamplerCount = 0,
 654                      .BindingTableEntryCount =
 655                      vue_prog_data->base.binding_table.size_bytes / 4,
 656                      .ThreadDispatchPriority = Normal,
 657                      .FloatingPointMode = IEEE754,
 658                      .IllegalOpcodeExceptionEnable = false,
 659                      .AccessesUAV = false,
 660                      .SoftwareExceptionEnable = false,
 661
 662                      .ScratchSpaceBasePointer = pipeline->scratch_start[VK_SHADER_STAGE_VERTEX],
 663                      .PerThreadScratchSpace = ffs(vue_prog_data->base.total_scratch / 2048),
 664
 665                      .DispatchGRFStartRegisterForURBData =
 666                      vue_prog_data->base.dispatch_grf_start_reg,
 667                      .VertexURBEntryReadLength = vue_prog_data->urb_read_length,
 668                      .VertexURBEntryReadOffset = 0,
 669
 670                      .MaximumNumberofThreads = device->info.max_vs_threads - 1,
 671                      .StatisticsEnable = false,
 672                      .SIMD8DispatchEnable = true,
 673                      .VertexCacheDisable = false,
 674                      .FunctionEnable = true,
 675
 676                      .VertexURBEntryOutputReadOffset = offset,
 677                      .VertexURBEntryOutputLength = length,
 678                      .UserClipDistanceClipTestEnableBitmask = 0,
 679                      .UserClipDistanceCullTestEnableBitmask = 0);
 680
 681    const struct brw_wm_prog_data *wm_prog_data = &pipeline->wm_prog_data;
 682    uint32_t ksp0, ksp2, grf_start0, grf_start2;
 683
 684    ksp2 = 0;
 685    grf_start2 = 0;
 686    if (pipeline->ps_simd8 != NO_KERNEL) {
 687       ksp0 = pipeline->ps_simd8;
 688       grf_start0 = wm_prog_data->base.dispatch_grf_start_reg;
 689       if (pipeline->ps_simd16 != NO_KERNEL) {
 690          ksp2 = pipeline->ps_simd16;
 691          grf_start2 = wm_prog_data->dispatch_grf_start_reg_16;
 692       }
 693    } else if (pipeline->ps_simd16 != NO_KERNEL) {
 694       ksp0 = pipeline->ps_simd16;
 695       grf_start0 = wm_prog_data->dispatch_grf_start_reg_16;
 696    } else {
 697       unreachable("no ps shader");
 698    }
 699
 700    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PS,
 701                   .KernelStartPointer0 = ksp0,
 702
 703                   .SingleProgramFlow = false,
 704                   .VectorMaskEnable = true,
 705                   .SamplerCount = 1,
 706
 707                   .ScratchSpaceBasePointer = pipeline->scratch_start[VK_SHADER_STAGE_FRAGMENT],
 708                   .PerThreadScratchSpace = ffs(wm_prog_data->base.total_scratch / 2048),
 709
 710                   .MaximumNumberofThreadsPerPSD = 64 - 2,
 711                   .PositionXYOffsetSelect = wm_prog_data->uses_pos_offset ?
 712                      POSOFFSET_SAMPLE: POSOFFSET_NONE,
 713                   .PushConstantEnable = wm_prog_data->base.nr_params > 0,
 714                   ._8PixelDispatchEnable = pipeline->ps_simd8 != NO_KERNEL,
 715                   ._16PixelDispatchEnable = pipeline->ps_simd16 != NO_KERNEL,
 716                   ._32PixelDispatchEnable = false,
 717
 718                   .DispatchGRFStartRegisterForConstantSetupData0 = grf_start0,
 719                   .DispatchGRFStartRegisterForConstantSetupData1 = 0,
 720                   .DispatchGRFStartRegisterForConstantSetupData2 = grf_start2,
 721
 722                   .KernelStartPointer1 = 0,
 723                   .KernelStartPointer2 = ksp2);
 724
 725    bool per_sample_ps = false;
 726    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PS_EXTRA,
 727                   .PixelShaderValid = true,
 728                   .PixelShaderKillsPixel = wm_prog_data->uses_kill,
 729                   .PixelShaderComputedDepthMode = wm_prog_data->computed_depth_mode,
 730                   .AttributeEnable = wm_prog_data->num_varying_inputs > 0,
 731                   .oMaskPresenttoRenderTarget = wm_prog_data->uses_omask,
 732                   .PixelShaderIsPerSample = per_sample_ps);
 733
 734    *pPipeline = (VkPipeline) pipeline;
 735
 736    return VK_SUCCESS;
 737 }
 738
 739 VkResult anv_CreateGraphicsPipelines(
 740     VkDevice                                    _device,
 741     VkPipelineCache                             pipelineCache,
 742     uint32_t                                    count,
 743     const VkGraphicsPipelineCreateInfo*         pCreateInfos,
 744     VkPipeline*                                 pPipelines)
 745 {
 746    ANV_FROM_HANDLE(anv_device, device, _device);
 747    VkResult result = VK_SUCCESS;
 748
 749    unsigned i = 0;
 750    for (; i < count; i++) {
 751       result = anv_pipeline_create(_device, &pCreateInfos[i],
 752                                    NULL, &pPipelines[i]);
 753       if (result != VK_SUCCESS) {
 754          for (unsigned j = 0; j < i; j++) {
 755             anv_pipeline_destroy(device, (struct anv_object *)pPipelines[j],
 756                                  VK_OBJECT_TYPE_PIPELINE);
 757          }
 758
 759          return result;
 760       }
 761    }
 762
 763    return VK_SUCCESS;
 764 }
 765
 766 static VkResult anv_compute_pipeline_create(
 767     VkDevice                                    _device,
 768     const VkComputePipelineCreateInfo*          pCreateInfo,
 769     VkPipeline*                                 pPipeline)
 770 {
 771    struct anv_device *device = (struct anv_device *) _device;
 772    struct anv_pipeline *pipeline;
 773    VkResult result;
 774
 775    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO);
 776
 777    pipeline = anv_device_alloc(device, sizeof(*pipeline), 8,
 778                                VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
 779    if (pipeline == NULL)
 780       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
 781
 782    pipeline->base.destructor = anv_pipeline_destroy;
 783    pipeline->device = device;
 784    pipeline->layout = (struct anv_pipeline_layout *) pCreateInfo->layout;
 785
 786    result = anv_reloc_list_init(&pipeline->batch.relocs, device);
 787    if (result != VK_SUCCESS) {
 788       anv_device_free(device, pipeline);
 789       return result;
 790    }
 791    pipeline->batch.next = pipeline->batch.start = pipeline->batch_data;
 792    pipeline->batch.end = pipeline->batch.start + sizeof(pipeline->batch_data);
 793
 794    anv_state_stream_init(&pipeline->program_stream,
 795                          &device->instruction_block_pool);
 796
 797    memset(pipeline->shaders, 0, sizeof(pipeline->shaders));
 798
 799    pipeline->shaders[VK_SHADER_STAGE_COMPUTE] =
 800       (struct anv_shader *) pCreateInfo->cs.shader;
 801
 802    pipeline->use_repclear = false;
 803
 804    anv_compiler_run(device->compiler, pipeline);
 805
 806    const struct brw_cs_prog_data *cs_prog_data = &pipeline->cs_prog_data;
 807
 808    anv_batch_emit(&pipeline->batch, GEN8_MEDIA_VFE_STATE,
 809                   .ScratchSpaceBasePointer = pipeline->scratch_start[VK_SHADER_STAGE_FRAGMENT],
 810                   .PerThreadScratchSpace = ffs(cs_prog_data->base.total_scratch / 2048),
 811                   .ScratchSpaceBasePointerHigh = 0,
 812                   .StackSize = 0,
 813
 814                   .MaximumNumberofThreads = device->info.max_cs_threads - 1,
 815                   .NumberofURBEntries = 2,
 816                   .ResetGatewayTimer = true,
 817                   .BypassGatewayControl = true,
 818                   .URBEntryAllocationSize = 2,
 819                   .CURBEAllocationSize = 0);
 820
 821    struct brw_cs_prog_data *prog_data = &pipeline->cs_prog_data;
 822    uint32_t group_size = prog_data->local_size[0] *
 823       prog_data->local_size[1] * prog_data->local_size[2];
 824    pipeline->cs_thread_width_max = DIV_ROUND_UP(group_size, prog_data->simd_size);
 825    uint32_t remainder = group_size & (prog_data->simd_size - 1);
 826
 827    if (remainder > 0)
 828       pipeline->cs_right_mask = ~0u >> (32 - remainder);
 829    else
 830       pipeline->cs_right_mask = ~0u >> (32 - prog_data->simd_size);
 831
 832
 833    *pPipeline = (VkPipeline) pipeline;
 834
 835    return VK_SUCCESS;
 836 }
 837
 838 VkResult anv_CreateComputePipelines(
 839     VkDevice                                    _device,
 840     VkPipelineCache                             pipelineCache,
 841     uint32_t                                    count,
 842     const VkComputePipelineCreateInfo*          pCreateInfos,
 843     VkPipeline*                                 pPipelines)
 844 {
 845    ANV_FROM_HANDLE(anv_device, device, _device);
 846    VkResult result = VK_SUCCESS;
 847
 848    unsigned i = 0;
 849    for (; i < count; i++) {
 850       result = anv_compute_pipeline_create(_device, &pCreateInfos[i],
 851                                            &pPipelines[i]);
 852       if (result != VK_SUCCESS) {
 853          for (unsigned j = 0; j < i; j++) {
 854             anv_pipeline_destroy(device, (struct anv_object *)pPipelines[j],
 855                                  VK_OBJECT_TYPE_PIPELINE);
 856          }
 857
 858          return result;
 859       }
 860    }
 861
 862    return VK_SUCCESS;
 863 }
 864
 865 // Pipeline layout functions
 866
 867 VkResult anv_CreatePipelineLayout(
 868     VkDevice                                    _device,
 869     const VkPipelineLayoutCreateInfo*           pCreateInfo,
 870     VkPipelineLayout*                           pPipelineLayout)
 871 {
 872    struct anv_device *device = (struct anv_device *) _device;
 873    struct anv_pipeline_layout *layout;
 874
 875    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO);
 876
 877    layout = anv_device_alloc(device, sizeof(*layout), 8,
 878                              VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
 879    if (layout == NULL)
 880       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
 881
 882    layout->num_sets = pCreateInfo->descriptorSetCount;
 883
 884    uint32_t surface_start[VK_SHADER_STAGE_NUM] = { 0, };
 885    uint32_t sampler_start[VK_SHADER_STAGE_NUM] = { 0, };
 886
 887    for (uint32_t s = 0; s < VK_SHADER_STAGE_NUM; s++) {
 888       layout->stage[s].surface_count = 0;
 889       layout->stage[s].sampler_count = 0;
 890    }
 891
 892    for (uint32_t i = 0; i < pCreateInfo->descriptorSetCount; i++) {
 893       struct anv_descriptor_set_layout *set_layout =
 894          (struct anv_descriptor_set_layout *) pCreateInfo->pSetLayouts[i];
 895
 896       layout->set[i].layout = set_layout;
 897       for (uint32_t s = 0; s < VK_SHADER_STAGE_NUM; s++) {
 898          layout->set[i].surface_start[s] = surface_start[s];
 899          surface_start[s] += set_layout->stage[s].surface_count;
 900          layout->set[i].sampler_start[s] = sampler_start[s];
 901          sampler_start[s] += set_layout->stage[s].sampler_count;
 902
 903          layout->stage[s].surface_count += set_layout->stage[s].surface_count;
 904          layout->stage[s].sampler_count += set_layout->stage[s].sampler_count;
 905       }
 906    }
 907
 908    *pPipelineLayout = (VkPipelineLayout) layout;
 909
 910    return VK_SUCCESS;
 911 }