src/vulkan/pipeline.c

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <assert.h>
  25 #include <stdbool.h>
  26 #include <string.h>
  27 #include <unistd.h>
  28 #include <fcntl.h>
  29
  30 #include "private.h"
  31
  32 // Shader functions
  33
  34 VkResult anv_CreateShader(
  35     VkDevice                                    _device,
  36     const VkShaderCreateInfo*                   pCreateInfo,
  37     VkShader*                                   pShader)
  38 {
  39    struct anv_device *device = (struct anv_device *) _device;
  40    struct anv_shader *shader;
  41
  42    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SHADER_CREATE_INFO);
  43
  44    shader = anv_device_alloc(device, sizeof(*shader) + pCreateInfo->codeSize, 8,
  45                                VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
  46    if (shader == NULL)
  47       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
  48
  49    shader->size = pCreateInfo->codeSize;
  50    memcpy(shader->data, pCreateInfo->pCode, shader->size);
  51
  52    *pShader = (VkShader) shader;
  53
  54    return VK_SUCCESS;
  55 }
  56
  57 // Pipeline functions
  58
  59 static void
  60 emit_vertex_input(struct anv_pipeline *pipeline, VkPipelineVertexInputCreateInfo *info)
  61 {
  62    const uint32_t num_dwords = 1 + info->attributeCount * 2;
  63    uint32_t *p;
  64    bool instancing_enable[32];
  65
  66    pipeline->vb_used = 0;
  67    for (uint32_t i = 0; i < info->bindingCount; i++) {
  68       const VkVertexInputBindingDescription *desc =
  69          &info->pVertexBindingDescriptions[i];
  70
  71       pipeline->vb_used |= 1 << desc->binding;
  72       pipeline->binding_stride[desc->binding] = desc->strideInBytes;
  73
  74       /* Step rate is programmed per vertex element (attribute), not
  75        * binding. Set up a map of which bindings step per instance, for
  76        * reference by vertex element setup. */
  77       switch (desc->stepRate) {
  78       default:
  79       case VK_VERTEX_INPUT_STEP_RATE_VERTEX:
  80          instancing_enable[desc->binding] = false;
  81          break;
  82       case VK_VERTEX_INPUT_STEP_RATE_INSTANCE:
  83          instancing_enable[desc->binding] = true;
  84          break;
  85       }
  86    }
  87
  88    p = anv_batch_emitn(&pipeline->batch, num_dwords,
  89                        GEN8_3DSTATE_VERTEX_ELEMENTS);
  90
  91    for (uint32_t i = 0; i < info->attributeCount; i++) {
  92       const VkVertexInputAttributeDescription *desc =
  93          &info->pVertexAttributeDescriptions[i];
  94       const struct anv_format *format = anv_format_for_vk_format(desc->format);
  95
  96       struct GEN8_VERTEX_ELEMENT_STATE element = {
  97          .VertexBufferIndex = desc->binding,
  98          .Valid = true,
  99          .SourceElementFormat = format->format,
 100          .EdgeFlagEnable = false,
 101          .SourceElementOffset = desc->offsetInBytes,
 102          .Component0Control = VFCOMP_STORE_SRC,
 103          .Component1Control = format->channels >= 2 ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
 104          .Component2Control = format->channels >= 3 ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
 105          .Component3Control = format->channels >= 4 ? VFCOMP_STORE_SRC : VFCOMP_STORE_1_FP
 106       };
 107       GEN8_VERTEX_ELEMENT_STATE_pack(NULL, &p[1 + i * 2], &element);
 108
 109       anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_INSTANCING,
 110                      .InstancingEnable = instancing_enable[desc->binding],
 111                      .VertexElementIndex = i,
 112                      /* Vulkan so far doesn't have an instance divisor, so
 113                       * this is always 1 (ignored if not instancing). */
 114                      .InstanceDataStepRate = 1);
 115    }
 116
 117    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_SGVS,
 118                   .VertexIDEnable = pipeline->vs_prog_data.uses_vertexid,
 119                   .VertexIDComponentNumber = 2,
 120                   .VertexIDElementOffset = info->bindingCount,
 121                   .InstanceIDEnable = pipeline->vs_prog_data.uses_instanceid,
 122                   .InstanceIDComponentNumber = 3,
 123                   .InstanceIDElementOffset = info->bindingCount);
 124 }
 125
 126 static void
 127 emit_ia_state(struct anv_pipeline *pipeline,
 128               VkPipelineIaStateCreateInfo *info,
 129               const struct anv_pipeline_create_info *extra)
 130 {
 131    static const uint32_t vk_to_gen_primitive_type[] = {
 132       [VK_PRIMITIVE_TOPOLOGY_POINT_LIST] = _3DPRIM_POINTLIST,
 133       [VK_PRIMITIVE_TOPOLOGY_LINE_LIST] = _3DPRIM_LINELIST,
 134       [VK_PRIMITIVE_TOPOLOGY_LINE_STRIP] = _3DPRIM_LINESTRIP,
 135       [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST] = _3DPRIM_TRILIST,
 136       [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP] = _3DPRIM_TRISTRIP,
 137       [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_FAN] = _3DPRIM_TRIFAN,
 138       [VK_PRIMITIVE_TOPOLOGY_LINE_LIST_ADJ] = _3DPRIM_LINELIST_ADJ,
 139       [VK_PRIMITIVE_TOPOLOGY_LINE_STRIP_ADJ] = _3DPRIM_LISTSTRIP_ADJ,
 140       [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST_ADJ] = _3DPRIM_TRILIST_ADJ,
 141       [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP_ADJ] = _3DPRIM_TRISTRIP_ADJ,
 142       [VK_PRIMITIVE_TOPOLOGY_PATCH] = _3DPRIM_PATCHLIST_1
 143    };
 144    uint32_t topology = vk_to_gen_primitive_type[info->topology];
 145
 146    if (extra && extra->use_rectlist)
 147       topology = _3DPRIM_RECTLIST;
 148
 149    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF,
 150                   .IndexedDrawCutIndexEnable = info->primitiveRestartEnable,
 151                   .CutIndex = info->primitiveRestartIndex);
 152    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_TOPOLOGY,
 153                   .PrimitiveTopologyType = topology);
 154 }
 155
 156 static void
 157 emit_rs_state(struct anv_pipeline *pipeline, VkPipelineRsStateCreateInfo *info,
 158               const struct anv_pipeline_create_info *extra)
 159
 160 {
 161    static const uint32_t vk_to_gen_cullmode[] = {
 162       [VK_CULL_MODE_NONE] = CULLMODE_NONE,
 163       [VK_CULL_MODE_FRONT] = CULLMODE_FRONT,
 164       [VK_CULL_MODE_BACK] = CULLMODE_BACK,
 165       [VK_CULL_MODE_FRONT_AND_BACK] = CULLMODE_BOTH
 166    };
 167
 168    static const uint32_t vk_to_gen_fillmode[] = {
 169       [VK_FILL_MODE_POINTS] = RASTER_POINT,
 170       [VK_FILL_MODE_WIREFRAME] = RASTER_WIREFRAME,
 171       [VK_FILL_MODE_SOLID] = RASTER_SOLID
 172    };
 173
 174    static const uint32_t vk_to_gen_front_face[] = {
 175       [VK_FRONT_FACE_CCW] = CounterClockwise,
 176       [VK_FRONT_FACE_CW] = Clockwise
 177    };
 178
 179    static const uint32_t vk_to_gen_coordinate_origin[] = {
 180       [VK_COORDINATE_ORIGIN_UPPER_LEFT] = UPPERLEFT,
 181       [VK_COORDINATE_ORIGIN_LOWER_LEFT] = LOWERLEFT
 182    };
 183
 184    struct GEN8_3DSTATE_SF sf = {
 185       GEN8_3DSTATE_SF_header,
 186       .ViewportTransformEnable = !(extra && extra->disable_viewport),
 187       .TriangleStripListProvokingVertexSelect =
 188          info->provokingVertex == VK_PROVOKING_VERTEX_FIRST ? 0 : 2,
 189       .LineStripListProvokingVertexSelect =
 190          info->provokingVertex == VK_PROVOKING_VERTEX_FIRST ? 0 : 1,
 191       .TriangleFanProvokingVertexSelect =
 192          info->provokingVertex == VK_PROVOKING_VERTEX_FIRST ? 0 : 2,
 193       .PointWidthSource = info->programPointSize ? Vertex : State,
 194    };
 195
 196    /* bool32_t                                    rasterizerDiscardEnable; */
 197
 198
 199    GEN8_3DSTATE_SF_pack(NULL, pipeline->state_sf, &sf);
 200
 201    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_RASTER,
 202                   .FrontWinding = vk_to_gen_front_face[info->frontFace],
 203                   .CullMode = vk_to_gen_cullmode[info->cullMode],
 204                   .FrontFaceFillMode = vk_to_gen_fillmode[info->fillMode],
 205                   .BackFaceFillMode = vk_to_gen_fillmode[info->fillMode],
 206                   .ScissorRectangleEnable = !(extra && extra->disable_scissor),
 207                   .ViewportZClipTestEnable = info->depthClipEnable);
 208
 209    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_SBE,
 210                   .ForceVertexURBEntryReadLength = false,
 211                   .ForceVertexURBEntryReadOffset = false,
 212                   .PointSpriteTextureCoordinateOrigin =
 213                      vk_to_gen_coordinate_origin[info->pointOrigin],
 214                   .NumberofSFOutputAttributes =
 215                      pipeline->wm_prog_data.num_varying_inputs);
 216
 217 }
 218
 219 VkResult anv_CreateGraphicsPipeline(
 220     VkDevice                                    device,
 221     const VkGraphicsPipelineCreateInfo*         pCreateInfo,
 222     VkPipeline*                                 pPipeline)
 223 {
 224    return anv_pipeline_create(device, pCreateInfo, NULL, pPipeline);
 225 }
 226
 227
 228 VkResult
 229 anv_pipeline_create(
 230     VkDevice                                    _device,
 231     const VkGraphicsPipelineCreateInfo*         pCreateInfo,
 232     const struct anv_pipeline_create_info *     extra,
 233     VkPipeline*                                 pPipeline)
 234 {
 235    struct anv_device *device = (struct anv_device *) _device;
 236    struct anv_pipeline *pipeline;
 237    const struct anv_common *common;
 238    VkPipelineShaderStageCreateInfo *shader_create_info;
 239    VkPipelineIaStateCreateInfo *ia_info;
 240    VkPipelineRsStateCreateInfo *rs_info;
 241    VkPipelineVertexInputCreateInfo *vi_info;
 242    VkResult result;
 243    uint32_t offset, length;
 244
 245    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO);
 246
 247    pipeline = anv_device_alloc(device, sizeof(*pipeline), 8,
 248                                VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
 249    if (pipeline == NULL)
 250       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
 251
 252    pipeline->device = device;
 253    pipeline->layout = (struct anv_pipeline_layout *) pCreateInfo->layout;
 254    memset(pipeline->shaders, 0, sizeof(pipeline->shaders));
 255    result = anv_batch_init(&pipeline->batch, device);
 256    if (result != VK_SUCCESS)
 257       goto fail;
 258
 259    anv_state_stream_init(&pipeline->program_stream,
 260                          &device->instruction_block_pool);
 261
 262    for (common = pCreateInfo->pNext; common; common = common->pNext) {
 263       switch (common->sType) {
 264       case VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_CREATE_INFO:
 265          vi_info = (VkPipelineVertexInputCreateInfo *) common;
 266          break;
 267       case VK_STRUCTURE_TYPE_PIPELINE_IA_STATE_CREATE_INFO:
 268          ia_info = (VkPipelineIaStateCreateInfo *) common;
 269          break;
 270       case VK_STRUCTURE_TYPE_PIPELINE_TESS_STATE_CREATE_INFO:
 271       case VK_STRUCTURE_TYPE_PIPELINE_VP_STATE_CREATE_INFO:
 272          break;
 273       case VK_STRUCTURE_TYPE_PIPELINE_RS_STATE_CREATE_INFO:
 274          rs_info = (VkPipelineRsStateCreateInfo *) common;
 275          break;
 276       case VK_STRUCTURE_TYPE_PIPELINE_MS_STATE_CREATE_INFO:
 277       case VK_STRUCTURE_TYPE_PIPELINE_CB_STATE_CREATE_INFO:
 278       case VK_STRUCTURE_TYPE_PIPELINE_DS_STATE_CREATE_INFO:
 279       case VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO:
 280          shader_create_info = (VkPipelineShaderStageCreateInfo *) common;
 281          pipeline->shaders[shader_create_info->shader.stage] =
 282             (struct anv_shader *) shader_create_info->shader.shader;
 283          break;
 284       default:
 285          break;
 286       }
 287    }
 288
 289    pipeline->use_repclear = extra && extra->use_repclear;
 290
 291    anv_compiler_run(device->compiler, pipeline);
 292
 293    /* FIXME: The compiler dead-codes FS inputs when we don't have a VS, so we
 294     * hard code this to num_attributes - 2. This is because the attributes
 295     * include VUE header and position, which aren't counted as varying
 296     * inputs. */
 297    if (pipeline->vs_simd8 == NO_KERNEL)
 298       pipeline->wm_prog_data.num_varying_inputs = vi_info->attributeCount - 2;
 299
 300    emit_vertex_input(pipeline, vi_info);
 301    emit_ia_state(pipeline, ia_info, extra);
 302    emit_rs_state(pipeline, rs_info, extra);
 303
 304    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_CLIP,
 305                   .ClipEnable = true,
 306                   .ViewportXYClipTestEnable = !(extra && extra->disable_viewport));
 307
 308    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_WM,
 309                   .StatisticsEnable = true,
 310                   .LineEndCapAntialiasingRegionWidth = _05pixels,
 311                   .LineAntialiasingRegionWidth = _10pixels,
 312                   .EarlyDepthStencilControl = NORMAL,
 313                   .ForceThreadDispatchEnable = NORMAL,
 314                   .PointRasterizationRule = RASTRULE_UPPER_RIGHT,
 315                   .BarycentricInterpolationMode =
 316                      pipeline->wm_prog_data.barycentric_interp_modes);
 317
 318    uint32_t samples = 1;
 319    uint32_t log2_samples = __builtin_ffs(samples) - 1;
 320    bool enable_sampling = samples > 1 ? true : false;
 321
 322    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_MULTISAMPLE,
 323                   .PixelPositionOffsetEnable = enable_sampling,
 324                   .PixelLocation = CENTER,
 325                   .NumberofMultisamples = log2_samples);
 326
 327    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_VS,
 328                   .VSURBStartingAddress = pipeline->urb.vs_start,
 329                   .VSURBEntryAllocationSize = pipeline->urb.vs_size - 1,
 330                   .VSNumberofURBEntries = pipeline->urb.nr_vs_entries);
 331
 332    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_GS,
 333                   .GSURBStartingAddress = pipeline->urb.gs_start,
 334                   .GSURBEntryAllocationSize = pipeline->urb.gs_size - 1,
 335                   .GSNumberofURBEntries = pipeline->urb.nr_gs_entries);
 336
 337    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_HS,
 338                   .HSURBStartingAddress = pipeline->urb.vs_start,
 339                   .HSURBEntryAllocationSize = 0,
 340                   .HSNumberofURBEntries = 0);
 341
 342    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_DS,
 343                   .DSURBStartingAddress = pipeline->urb.vs_start,
 344                   .DSURBEntryAllocationSize = 0,
 345                   .DSNumberofURBEntries = 0);
 346
 347    const struct brw_gs_prog_data *gs_prog_data = &pipeline->gs_prog_data;
 348    offset = 1;
 349    length = (gs_prog_data->base.vue_map.num_slots + 1) / 2 - offset;
 350
 351    if (pipeline->gs_vec4 == NO_KERNEL)
 352       anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_GS, .Enable = false);
 353    else
 354       anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_GS,
 355                      .SingleProgramFlow = false,
 356                      .KernelStartPointer = pipeline->gs_vec4,
 357                      .VectorMaskEnable = Vmask,
 358                      .SamplerCount = 0,
 359                      .BindingTableEntryCount = 0,
 360                      .ExpectedVertexCount = pipeline->gs_vertex_count,
 361
 362                      .PerThreadScratchSpace = 0,
 363                      .ScratchSpaceBasePointer = 0,
 364
 365                      .OutputVertexSize = gs_prog_data->output_vertex_size_hwords * 2 - 1,
 366                      .OutputTopology = gs_prog_data->output_topology,
 367                      .VertexURBEntryReadLength = gs_prog_data->base.urb_read_length,
 368                      .DispatchGRFStartRegisterForURBData =
 369                         gs_prog_data->base.base.dispatch_grf_start_reg,
 370
 371                      .MaximumNumberofThreads = device->info.max_gs_threads,
 372                      .ControlDataHeaderSize = gs_prog_data->control_data_header_size_hwords,
 373                      //pipeline->gs_prog_data.dispatch_mode |
 374                      .StatisticsEnable = true,
 375                      .IncludePrimitiveID = gs_prog_data->include_primitive_id,
 376                      .ReorderMode = TRAILING,
 377                      .Enable = true,
 378
 379                      .ControlDataFormat = gs_prog_data->control_data_format,
 380
 381                      /* FIXME: mesa sets this based on ctx->Transform.ClipPlanesEnabled:
 382                       * UserClipDistanceClipTestEnableBitmask_3DSTATE_GS(v)
 383                       * UserClipDistanceCullTestEnableBitmask(v)
 384                       */
 385
 386                      .VertexURBEntryOutputReadOffset = offset,
 387                      .VertexURBEntryOutputLength = length);
 388
 389    //trp_generate_blend_hw_cmds(batch, pipeline);
 390
 391    const struct brw_vue_prog_data *vue_prog_data = &pipeline->vs_prog_data.base;
 392    /* Skip the VUE header and position slots */
 393    offset = 1;
 394    length = (vue_prog_data->vue_map.num_slots + 1) / 2 - offset;
 395
 396    if (pipeline->vs_simd8 == NO_KERNEL || (extra && extra->disable_vs))
 397       anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VS,
 398                      .FunctionEnable = false,
 399                      .VertexURBEntryOutputReadOffset = 1,
 400                      /* Even if VS is disabled, SBE still gets the amount of
 401                       * vertex data to read from this field. We use attribute
 402                       * count - 1, as we don't count the VUE header here. */
 403                      .VertexURBEntryOutputLength =
 404                         DIV_ROUND_UP(vi_info->attributeCount - 1, 2));
 405    else
 406       anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VS,
 407                      .KernelStartPointer = pipeline->vs_simd8,
 408                      .SingleVertexDispatch = Multiple,
 409                      .VectorMaskEnable = Dmask,
 410                      .SamplerCount = 0,
 411                      .BindingTableEntryCount =
 412                      vue_prog_data->base.binding_table.size_bytes / 4,
 413                      .ThreadDispatchPriority = Normal,
 414                      .FloatingPointMode = IEEE754,
 415                      .IllegalOpcodeExceptionEnable = false,
 416                      .AccessesUAV = false,
 417                      .SoftwareExceptionEnable = false,
 418
 419                      /* FIXME: pointer needs to be assigned outside as it aliases
 420                       * PerThreadScratchSpace.
 421                       */
 422                      .ScratchSpaceBasePointer = 0,
 423                      .PerThreadScratchSpace = 0,
 424
 425                      .DispatchGRFStartRegisterForURBData =
 426                      vue_prog_data->base.dispatch_grf_start_reg,
 427                      .VertexURBEntryReadLength = vue_prog_data->urb_read_length,
 428                      .VertexURBEntryReadOffset = 0,
 429
 430                      .MaximumNumberofThreads = device->info.max_vs_threads - 1,
 431                      .StatisticsEnable = false,
 432                      .SIMD8DispatchEnable = true,
 433                      .VertexCacheDisable = ia_info->disableVertexReuse,
 434                      .FunctionEnable = true,
 435
 436                      .VertexURBEntryOutputReadOffset = offset,
 437                      .VertexURBEntryOutputLength = length,
 438                      .UserClipDistanceClipTestEnableBitmask = 0,
 439                      .UserClipDistanceCullTestEnableBitmask = 0);
 440
 441    const struct brw_wm_prog_data *wm_prog_data = &pipeline->wm_prog_data;
 442    uint32_t ksp0, ksp2, grf_start0, grf_start2;
 443
 444    ksp2 = 0;
 445    grf_start2 = 0;
 446    if (pipeline->ps_simd8 != NO_KERNEL) {
 447       ksp0 = pipeline->ps_simd8;
 448       grf_start0 = wm_prog_data->base.dispatch_grf_start_reg;
 449       if (pipeline->ps_simd16 != NO_KERNEL) {
 450          ksp2 = pipeline->ps_simd16;
 451          grf_start2 = wm_prog_data->dispatch_grf_start_reg_16;
 452       }
 453    } else if (pipeline->ps_simd16 != NO_KERNEL) {
 454       ksp0 = pipeline->ps_simd16;
 455       grf_start0 = wm_prog_data->dispatch_grf_start_reg_16;
 456    } else {
 457       unreachable("no ps shader");
 458    }
 459
 460    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PS,
 461                   .KernelStartPointer0 = ksp0,
 462
 463                   .SingleProgramFlow = false,
 464                   .VectorMaskEnable = true,
 465                   .SamplerCount = 1,
 466
 467                   .ScratchSpaceBasePointer = 0,
 468                   .PerThreadScratchSpace = 0,
 469
 470                   .MaximumNumberofThreadsPerPSD = 64 - 2,
 471                   .PositionXYOffsetSelect = wm_prog_data->uses_pos_offset ?
 472                      POSOFFSET_SAMPLE: POSOFFSET_NONE,
 473                   .PushConstantEnable = wm_prog_data->base.nr_params > 0,
 474                   ._8PixelDispatchEnable = pipeline->ps_simd8 != NO_KERNEL,
 475                   ._16PixelDispatchEnable = pipeline->ps_simd16 != NO_KERNEL,
 476                   ._32PixelDispatchEnable = false,
 477
 478                   .DispatchGRFStartRegisterForConstantSetupData0 = grf_start0,
 479                   .DispatchGRFStartRegisterForConstantSetupData1 = 0,
 480                   .DispatchGRFStartRegisterForConstantSetupData2 = grf_start2,
 481
 482                   .KernelStartPointer1 = 0,
 483                   .KernelStartPointer2 = ksp2);
 484
 485    bool per_sample_ps = false;
 486    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PS_EXTRA,
 487                   .PixelShaderValid = true,
 488                   .PixelShaderKillsPixel = wm_prog_data->uses_kill,
 489                   .PixelShaderComputedDepthMode = wm_prog_data->computed_depth_mode,
 490                   .AttributeEnable = wm_prog_data->num_varying_inputs > 0,
 491                   .oMaskPresenttoRenderTarget = wm_prog_data->uses_omask,
 492                   .PixelShaderIsPerSample = per_sample_ps);
 493
 494    *pPipeline = (VkPipeline) pipeline;
 495
 496    return VK_SUCCESS;
 497
 498  fail:
 499    anv_device_free(device, pipeline);
 500
 501    return result;
 502 }
 503
 504 VkResult
 505 anv_pipeline_destroy(struct anv_pipeline *pipeline)
 506 {
 507    anv_compiler_free(pipeline);
 508    anv_batch_finish(&pipeline->batch, pipeline->device);
 509    anv_device_free(pipeline->device, pipeline);
 510
 511    return VK_SUCCESS;
 512 }
 513
 514 VkResult anv_CreateGraphicsPipelineDerivative(
 515     VkDevice                                    device,
 516     const VkGraphicsPipelineCreateInfo*         pCreateInfo,
 517     VkPipeline                                  basePipeline,
 518     VkPipeline*                                 pPipeline)
 519 {
 520    stub_return(VK_UNSUPPORTED);
 521 }
 522
 523 VkResult anv_CreateComputePipeline(
 524     VkDevice                                    device,
 525     const VkComputePipelineCreateInfo*          pCreateInfo,
 526     VkPipeline*                                 pPipeline)
 527 {
 528    stub_return(VK_UNSUPPORTED);
 529 }
 530
 531 VkResult anv_StorePipeline(
 532     VkDevice                                    device,
 533     VkPipeline                                  pipeline,
 534     size_t*                                     pDataSize,
 535     void*                                       pData)
 536 {
 537    stub_return(VK_UNSUPPORTED);
 538 }
 539
 540 VkResult anv_LoadPipeline(
 541     VkDevice                                    device,
 542     size_t                                      dataSize,
 543     const void*                                 pData,
 544     VkPipeline*                                 pPipeline)
 545 {
 546    stub_return(VK_UNSUPPORTED);
 547 }
 548
 549 VkResult anv_LoadPipelineDerivative(
 550     VkDevice                                    device,
 551     size_t                                      dataSize,
 552     const void*                                 pData,
 553     VkPipeline                                  basePipeline,
 554     VkPipeline*                                 pPipeline)
 555 {
 556    stub_return(VK_UNSUPPORTED);
 557 }
 558
 559 // Pipeline layout functions
 560
 561 VkResult anv_CreatePipelineLayout(
 562     VkDevice                                    _device,
 563     const VkPipelineLayoutCreateInfo*           pCreateInfo,
 564     VkPipelineLayout*                           pPipelineLayout)
 565 {
 566    struct anv_device *device = (struct anv_device *) _device;
 567    struct anv_pipeline_layout *layout;
 568
 569    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO);
 570
 571    layout = anv_device_alloc(device, sizeof(*layout), 8,
 572                              VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
 573    if (layout == NULL)
 574       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
 575
 576    layout->num_sets = pCreateInfo->descriptorSetCount;
 577
 578    uint32_t surface_start[VK_NUM_SHADER_STAGE] = { 0, };
 579    uint32_t sampler_start[VK_NUM_SHADER_STAGE] = { 0, };
 580
 581    for (uint32_t s = 0; s < VK_NUM_SHADER_STAGE; s++) {
 582       layout->stage[s].surface_count = 0;
 583       layout->stage[s].sampler_count = 0;
 584    }
 585
 586    for (uint32_t i = 0; i < pCreateInfo->descriptorSetCount; i++) {
 587       struct anv_descriptor_set_layout *set_layout =
 588          (struct anv_descriptor_set_layout *) pCreateInfo->pSetLayouts[i];
 589
 590       layout->set[i].layout = set_layout;
 591       for (uint32_t s = 0; s < VK_NUM_SHADER_STAGE; s++) {
 592          layout->set[i].surface_start[s] = surface_start[s];
 593          surface_start[s] += set_layout->stage[s].surface_count;
 594          layout->set[i].sampler_start[s] = sampler_start[s];
 595          sampler_start[s] += set_layout->stage[s].sampler_count;
 596
 597          layout->stage[s].surface_count += set_layout->stage[s].surface_count;
 598          layout->stage[s].sampler_count += set_layout->stage[s].sampler_count;
 599       }
 600    }
 601
 602    *pPipelineLayout = (VkPipelineLayout) layout;
 603
 604    return VK_SUCCESS;
 605 }