src/vulkan/pipeline.c

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <assert.h>
  25 #include <stdbool.h>
  26 #include <string.h>
  27 #include <unistd.h>
  28 #include <fcntl.h>
  29
  30 #include "private.h"
  31
  32 // Shader functions
  33
  34 VkResult VKAPI vkCreateShader(
  35     VkDevice                                    _device,
  36     const VkShaderCreateInfo*                   pCreateInfo,
  37     VkShader*                                   pShader)
  38 {
  39    struct anv_device *device = (struct anv_device *) _device;
  40    struct anv_shader *shader;
  41
  42    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SHADER_CREATE_INFO);
  43
  44    shader = anv_device_alloc(device, sizeof(*shader) + pCreateInfo->codeSize, 8,
  45                                VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
  46    if (shader == NULL)
  47       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
  48
  49    shader->size = pCreateInfo->codeSize;
  50    memcpy(shader->data, pCreateInfo->pCode, shader->size);
  51
  52    *pShader = (VkShader) shader;
  53
  54    return VK_SUCCESS;
  55 }
  56
  57 // Pipeline functions
  58
  59 static void
  60 emit_vertex_input(struct anv_pipeline *pipeline, VkPipelineVertexInputCreateInfo *info)
  61 {
  62    const uint32_t num_dwords = 1 + info->attributeCount * 2;
  63    uint32_t *p;
  64    bool instancing_enable[32];
  65
  66    for (uint32_t i = 0; i < info->bindingCount; i++) {
  67       const VkVertexInputBindingDescription *desc =
  68          &info->pVertexBindingDescriptions[i];
  69
  70       pipeline->binding_stride[desc->binding] = desc->strideInBytes;
  71
  72       /* Step rate is programmed per vertex element (attribute), not
  73        * binding. Set up a map of which bindings step per instance, for
  74        * reference by vertex element setup. */
  75       switch (desc->stepRate) {
  76       default:
  77       case VK_VERTEX_INPUT_STEP_RATE_VERTEX:
  78          instancing_enable[desc->binding] = false;
  79          break;
  80       case VK_VERTEX_INPUT_STEP_RATE_INSTANCE:
  81          instancing_enable[desc->binding] = true;
  82          break;
  83       }
  84    }
  85
  86    p = anv_batch_emitn(&pipeline->batch, num_dwords,
  87                        GEN8_3DSTATE_VERTEX_ELEMENTS);
  88
  89    for (uint32_t i = 0; i < info->attributeCount; i++) {
  90       const VkVertexInputAttributeDescription *desc =
  91          &info->pVertexAttributeDescriptions[i];
  92       const struct anv_format *format = anv_format_for_vk_format(desc->format);
  93
  94       struct GEN8_VERTEX_ELEMENT_STATE element = {
  95          .VertexBufferIndex = desc->location,
  96          .Valid = true,
  97          .SourceElementFormat = format->format,
  98          .EdgeFlagEnable = false,
  99          .SourceElementOffset = desc->offsetInBytes,
 100          .Component0Control = VFCOMP_STORE_SRC,
 101          .Component1Control = format->channels >= 2 ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
 102          .Component2Control = format->channels >= 3 ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
 103          .Component3Control = format->channels >= 4 ? VFCOMP_STORE_SRC : VFCOMP_STORE_1_FP
 104       };
 105       GEN8_VERTEX_ELEMENT_STATE_pack(NULL, &p[1 + i * 2], &element);
 106
 107       anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_INSTANCING,
 108                      .InstancingEnable = instancing_enable[desc->binding],
 109                      .VertexElementIndex = i,
 110                      /* Vulkan so far doesn't have an instance divisor, so
 111                       * this is always 1 (ignored if not instancing). */
 112                      .InstanceDataStepRate = 1);
 113    }
 114
 115    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_SGVS,
 116                   .VertexIDEnable = pipeline->vs_prog_data.uses_vertexid,
 117                   .VertexIDComponentNumber = 2,
 118                   .VertexIDElementOffset = info->bindingCount,
 119                   .InstanceIDEnable = pipeline->vs_prog_data.uses_instanceid,
 120                   .InstanceIDComponentNumber = 3,
 121                   .InstanceIDElementOffset = info->bindingCount);
 122 }
 123
 124 static void
 125 emit_ia_state(struct anv_pipeline *pipeline, VkPipelineIaStateCreateInfo *info)
 126 {
 127    static const uint32_t vk_to_gen_primitive_type[] = {
 128       [VK_PRIMITIVE_TOPOLOGY_POINT_LIST] = _3DPRIM_POINTLIST,
 129       [VK_PRIMITIVE_TOPOLOGY_LINE_LIST] = _3DPRIM_LINELIST,
 130       [VK_PRIMITIVE_TOPOLOGY_LINE_STRIP] = _3DPRIM_LINESTRIP,
 131       [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST] = _3DPRIM_TRILIST,
 132       [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP] = _3DPRIM_TRISTRIP,
 133       [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_FAN] = _3DPRIM_TRIFAN,
 134       [VK_PRIMITIVE_TOPOLOGY_LINE_LIST_ADJ] = _3DPRIM_LINELIST_ADJ,
 135       [VK_PRIMITIVE_TOPOLOGY_LINE_STRIP_ADJ] = _3DPRIM_LISTSTRIP_ADJ,
 136       [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST_ADJ] = _3DPRIM_TRILIST_ADJ,
 137       [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP_ADJ] = _3DPRIM_TRISTRIP_ADJ,
 138       [VK_PRIMITIVE_TOPOLOGY_PATCH] = _3DPRIM_PATCHLIST_1
 139    };
 140
 141    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF,
 142                   .IndexedDrawCutIndexEnable = info->primitiveRestartEnable,
 143                   .CutIndex = info->primitiveRestartIndex);
 144    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VF_TOPOLOGY,
 145                   .PrimitiveTopologyType = vk_to_gen_primitive_type[info->topology]);
 146 }
 147
 148 static void
 149 emit_rs_state(struct anv_pipeline *pipeline, VkPipelineRsStateCreateInfo *info)
 150 {
 151    static const uint32_t vk_to_gen_cullmode[] = {
 152       [VK_CULL_MODE_NONE] = CULLMODE_NONE,
 153       [VK_CULL_MODE_FRONT] = CULLMODE_FRONT,
 154       [VK_CULL_MODE_BACK] = CULLMODE_BACK,
 155       [VK_CULL_MODE_FRONT_AND_BACK] = CULLMODE_BOTH
 156    };
 157
 158    static const uint32_t vk_to_gen_fillmode[] = {
 159       [VK_FILL_MODE_POINTS] = RASTER_POINT,
 160       [VK_FILL_MODE_WIREFRAME] = RASTER_WIREFRAME,
 161       [VK_FILL_MODE_SOLID] = RASTER_SOLID
 162    };
 163
 164    static const uint32_t vk_to_gen_front_face[] = {
 165       [VK_FRONT_FACE_CCW] = CounterClockwise,
 166       [VK_FRONT_FACE_CW] = Clockwise
 167    };
 168
 169    static const uint32_t vk_to_gen_coordinate_origin[] = {
 170       [VK_COORDINATE_ORIGIN_UPPER_LEFT] = UPPERLEFT,
 171       [VK_COORDINATE_ORIGIN_LOWER_LEFT] = LOWERLEFT
 172    };
 173
 174    struct GEN8_3DSTATE_SF sf = {
 175       GEN8_3DSTATE_SF_header,
 176       .ViewportTransformEnable = true,
 177       .TriangleStripListProvokingVertexSelect =
 178          info->provokingVertex == VK_PROVOKING_VERTEX_FIRST ? 0 : 2,
 179       .LineStripListProvokingVertexSelect =
 180          info->provokingVertex == VK_PROVOKING_VERTEX_FIRST ? 0 : 1,
 181       .TriangleFanProvokingVertexSelect =
 182          info->provokingVertex == VK_PROVOKING_VERTEX_FIRST ? 0 : 2,
 183       .PointWidthSource = info->programPointSize ? Vertex : State,
 184    };
 185
 186    /* bool32_t                                    rasterizerDiscardEnable; */
 187
 188
 189    GEN8_3DSTATE_SF_pack(NULL, pipeline->state_sf, &sf);
 190
 191    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_RASTER,
 192                   .FrontWinding = vk_to_gen_front_face[info->frontFace],
 193                   .CullMode = vk_to_gen_cullmode[info->cullMode],
 194                   .FrontFaceFillMode = vk_to_gen_fillmode[info->fillMode],
 195                   .BackFaceFillMode = vk_to_gen_fillmode[info->fillMode],
 196                   .ScissorRectangleEnable = true,
 197                   .ViewportZClipTestEnable = info->depthClipEnable);
 198
 199    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_SBE,
 200                   .ForceVertexURBEntryReadLength = false,
 201                   .ForceVertexURBEntryReadOffset = false,
 202                   .PointSpriteTextureCoordinateOrigin =
 203                      vk_to_gen_coordinate_origin[info->pointOrigin],
 204                   .NumberofSFOutputAttributes =
 205                      pipeline->wm_prog_data.num_varying_inputs);
 206
 207 }
 208
 209 VkResult VKAPI vkCreateGraphicsPipeline(
 210     VkDevice                                    _device,
 211     const VkGraphicsPipelineCreateInfo*         pCreateInfo,
 212     VkPipeline*                                 pPipeline)
 213 {
 214    struct anv_device *device = (struct anv_device *) _device;
 215    struct anv_pipeline *pipeline;
 216    const struct anv_common *common;
 217    VkPipelineShaderStageCreateInfo *shader_create_info;
 218    VkPipelineIaStateCreateInfo *ia_info;
 219    VkPipelineRsStateCreateInfo *rs_info;
 220    VkPipelineVertexInputCreateInfo *vi_info;
 221    VkResult result;
 222    uint32_t offset, length;
 223
 224    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO);
 225
 226    pipeline = anv_device_alloc(device, sizeof(*pipeline), 8,
 227                                VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
 228    if (pipeline == NULL)
 229       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
 230
 231    pipeline->device = device;
 232    pipeline->layout = (struct anv_pipeline_layout *) pCreateInfo->layout;
 233    memset(pipeline->shaders, 0, sizeof(pipeline->shaders));
 234    result = anv_batch_init(&pipeline->batch, device);
 235    if (result != VK_SUCCESS)
 236       goto fail;
 237
 238    for (common = pCreateInfo->pNext; common; common = common->pNext) {
 239       switch (common->sType) {
 240       case VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_CREATE_INFO:
 241          vi_info = (VkPipelineVertexInputCreateInfo *) common;
 242          break;
 243       case VK_STRUCTURE_TYPE_PIPELINE_IA_STATE_CREATE_INFO:
 244          ia_info = (VkPipelineIaStateCreateInfo *) common;
 245          break;
 246       case VK_STRUCTURE_TYPE_PIPELINE_TESS_STATE_CREATE_INFO:
 247       case VK_STRUCTURE_TYPE_PIPELINE_VP_STATE_CREATE_INFO:
 248          break;
 249       case VK_STRUCTURE_TYPE_PIPELINE_RS_STATE_CREATE_INFO:
 250          rs_info = (VkPipelineRsStateCreateInfo *) common;
 251          break;
 252       case VK_STRUCTURE_TYPE_PIPELINE_MS_STATE_CREATE_INFO:
 253       case VK_STRUCTURE_TYPE_PIPELINE_CB_STATE_CREATE_INFO:
 254       case VK_STRUCTURE_TYPE_PIPELINE_DS_STATE_CREATE_INFO:
 255       case VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO:
 256          shader_create_info = (VkPipelineShaderStageCreateInfo *) common;
 257          pipeline->shaders[shader_create_info->shader.stage] =
 258             (struct anv_shader *) shader_create_info->shader.shader;
 259          break;
 260       default:
 261          break;
 262       }
 263    }
 264
 265    pipeline->use_repclear = false;
 266
 267    anv_compiler_run(device->compiler, pipeline);
 268
 269    emit_vertex_input(pipeline, vi_info);
 270    emit_ia_state(pipeline, ia_info);
 271    emit_rs_state(pipeline, rs_info);
 272
 273    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_WM,
 274                   .StatisticsEnable = true,
 275                   .LineEndCapAntialiasingRegionWidth = _05pixels,
 276                   .LineAntialiasingRegionWidth = _10pixels,
 277                   .EarlyDepthStencilControl = NORMAL,
 278                   .ForceThreadDispatchEnable = NORMAL,
 279                   .PointRasterizationRule = RASTRULE_UPPER_RIGHT,
 280                   .BarycentricInterpolationMode =
 281                      pipeline->wm_prog_data.barycentric_interp_modes);
 282
 283    uint32_t samples = 1;
 284    uint32_t log2_samples = __builtin_ffs(samples) - 1;
 285    bool enable_sampling = samples > 1 ? true : false;
 286
 287    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_MULTISAMPLE,
 288                   .PixelPositionOffsetEnable = enable_sampling,
 289                   .PixelLocation = CENTER,
 290                   .NumberofMultisamples = log2_samples);
 291
 292    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_VS,
 293                   .VSURBStartingAddress = pipeline->urb.vs_start,
 294                   .VSURBEntryAllocationSize = pipeline->urb.vs_size - 1,
 295                   .VSNumberofURBEntries = pipeline->urb.nr_vs_entries);
 296
 297    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_GS,
 298                   .GSURBStartingAddress = pipeline->urb.gs_start,
 299                   .GSURBEntryAllocationSize = pipeline->urb.gs_size - 1,
 300                   .GSNumberofURBEntries = pipeline->urb.nr_gs_entries);
 301
 302    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_HS,
 303                   .HSURBStartingAddress = pipeline->urb.vs_start,
 304                   .HSURBEntryAllocationSize = 0,
 305                   .HSNumberofURBEntries = 0);
 306
 307    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_URB_DS,
 308                   .DSURBStartingAddress = pipeline->urb.vs_start,
 309                   .DSURBEntryAllocationSize = 0,
 310                   .DSNumberofURBEntries = 0);
 311
 312    const struct brw_gs_prog_data *gs_prog_data = &pipeline->gs_prog_data;
 313    offset = 1;
 314    length = (gs_prog_data->base.vue_map.num_slots + 1) / 2 - offset;
 315
 316    if (pipeline->gs_vec4 == NO_KERNEL)
 317       anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_GS, .Enable = false);
 318    else
 319       anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_GS,
 320                      .SingleProgramFlow = false,
 321                      .KernelStartPointer = pipeline->gs_vec4,
 322                      .VectorMaskEnable = Vmask,
 323                      .SamplerCount = 0,
 324                      .BindingTableEntryCount = 0,
 325                      .ExpectedVertexCount = pipeline->gs_vertex_count,
 326
 327                      .PerThreadScratchSpace = 0,
 328                      .ScratchSpaceBasePointer = 0,
 329
 330                      .OutputVertexSize = gs_prog_data->output_vertex_size_hwords * 2 - 1,
 331                      .OutputTopology = gs_prog_data->output_topology,
 332                      .VertexURBEntryReadLength = gs_prog_data->base.urb_read_length,
 333                      .DispatchGRFStartRegisterForURBData =
 334                         gs_prog_data->base.base.dispatch_grf_start_reg,
 335
 336                      .MaximumNumberofThreads = device->info.max_gs_threads,
 337                      .ControlDataHeaderSize = gs_prog_data->control_data_header_size_hwords,
 338                      //pipeline->gs_prog_data.dispatch_mode |
 339                      .StatisticsEnable = true,
 340                      .IncludePrimitiveID = gs_prog_data->include_primitive_id,
 341                      .ReorderMode = TRAILING,
 342                      .Enable = true,
 343
 344                      .ControlDataFormat = gs_prog_data->control_data_format,
 345
 346                      /* FIXME: mesa sets this based on ctx->Transform.ClipPlanesEnabled:
 347                       * UserClipDistanceClipTestEnableBitmask_3DSTATE_GS(v)
 348                       * UserClipDistanceCullTestEnableBitmask(v)
 349                       */
 350
 351                      .VertexURBEntryOutputReadOffset = offset,
 352                      .VertexURBEntryOutputLength = length);
 353
 354    //trp_generate_blend_hw_cmds(batch, pipeline);
 355
 356    const struct brw_vue_prog_data *vue_prog_data = &pipeline->vs_prog_data.base;
 357    /* Skip the VUE header and position slots */
 358    offset = 1;
 359    length = (vue_prog_data->vue_map.num_slots + 1) / 2 - offset;
 360
 361    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_VS,
 362                   .KernelStartPointer = pipeline->vs_simd8,
 363                   .SingleVertexDispatch = Multiple,
 364                   .VectorMaskEnable = Dmask,
 365                   .SamplerCount = 0,
 366                   .BindingTableEntryCount =
 367                      vue_prog_data->base.binding_table.size_bytes / 4,
 368                   .ThreadDispatchPriority = Normal,
 369                   .FloatingPointMode = IEEE754,
 370                   .IllegalOpcodeExceptionEnable = false,
 371                   .AccessesUAV = false,
 372                   .SoftwareExceptionEnable = false,
 373
 374                   /* FIXME: pointer needs to be assigned outside as it aliases
 375                    * PerThreadScratchSpace.
 376                    */
 377                   .ScratchSpaceBasePointer = 0,
 378                   .PerThreadScratchSpace = 0,
 379
 380                   .DispatchGRFStartRegisterForURBData =
 381                      vue_prog_data->base.dispatch_grf_start_reg,
 382                   .VertexURBEntryReadLength = vue_prog_data->urb_read_length,
 383                   .VertexURBEntryReadOffset = 0,
 384
 385                   .MaximumNumberofThreads = device->info.max_vs_threads - 1,
 386                   .StatisticsEnable = false,
 387                   .SIMD8DispatchEnable = true,
 388                   .VertexCacheDisable = ia_info->disableVertexReuse,
 389                   .FunctionEnable = true,
 390
 391                   .VertexURBEntryOutputReadOffset = offset,
 392                   .VertexURBEntryOutputLength = length,
 393                   .UserClipDistanceClipTestEnableBitmask = 0,
 394                   .UserClipDistanceCullTestEnableBitmask = 0);
 395
 396    const struct brw_wm_prog_data *wm_prog_data = &pipeline->wm_prog_data;
 397    uint32_t ksp0, ksp2, grf_start0, grf_start2;
 398
 399    ksp2 = 0;
 400    grf_start2 = 0;
 401    if (pipeline->ps_simd8 != NO_KERNEL) {
 402       ksp0 = pipeline->ps_simd8;
 403       grf_start0 = wm_prog_data->base.dispatch_grf_start_reg;
 404       if (pipeline->ps_simd16 != NO_KERNEL) {
 405          ksp2 = pipeline->ps_simd16;
 406          grf_start2 = wm_prog_data->dispatch_grf_start_reg_16;
 407       }
 408    } else if (pipeline->ps_simd16 != NO_KERNEL) {
 409       ksp0 = pipeline->ps_simd16;
 410       grf_start0 = wm_prog_data->dispatch_grf_start_reg_16;
 411    } else {
 412       unreachable("no ps shader");
 413    }
 414
 415    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PS,
 416                   .KernelStartPointer0 = ksp0,
 417
 418                   .SingleProgramFlow = false,
 419                   .VectorMaskEnable = true,
 420                   .SamplerCount = 0,
 421
 422                   .ScratchSpaceBasePointer = 0,
 423                   .PerThreadScratchSpace = 0,
 424
 425                   .MaximumNumberofThreadsPerPSD = 64 - 2,
 426                   .PositionXYOffsetSelect = wm_prog_data->uses_pos_offset ?
 427                      POSOFFSET_SAMPLE: POSOFFSET_NONE,
 428                   .PushConstantEnable = wm_prog_data->base.nr_params > 0,
 429                   ._8PixelDispatchEnable = pipeline->ps_simd8 != NO_KERNEL,
 430                   ._16PixelDispatchEnable = pipeline->ps_simd16 != NO_KERNEL,
 431                   ._32PixelDispatchEnable = false,
 432
 433                   .DispatchGRFStartRegisterForConstantSetupData0 = grf_start0,
 434                   .DispatchGRFStartRegisterForConstantSetupData1 = 0,
 435                   .DispatchGRFStartRegisterForConstantSetupData2 = grf_start2,
 436
 437                   .KernelStartPointer1 = 0,
 438                   .KernelStartPointer2 = ksp2);
 439
 440    bool per_sample_ps = false;
 441    anv_batch_emit(&pipeline->batch, GEN8_3DSTATE_PS_EXTRA,
 442                   .PixelShaderValid = true,
 443                   .PixelShaderKillsPixel = wm_prog_data->uses_kill,
 444                   .PixelShaderComputedDepthMode = wm_prog_data->computed_depth_mode,
 445                   .AttributeEnable = wm_prog_data->num_varying_inputs > 0,
 446                   .oMaskPresenttoRenderTarget = wm_prog_data->uses_omask,
 447                   .PixelShaderIsPerSample = per_sample_ps);
 448
 449    *pPipeline = (VkPipeline) pipeline;
 450
 451    return VK_SUCCESS;
 452
 453  fail:
 454    anv_device_free(device, pipeline);
 455
 456    return result;
 457 }
 458
 459 VkResult
 460 anv_pipeline_destroy(struct anv_pipeline *pipeline)
 461 {
 462    anv_compiler_free(pipeline);
 463    anv_batch_finish(&pipeline->batch, pipeline->device);
 464    anv_device_free(pipeline->device, pipeline);
 465
 466    return VK_SUCCESS;
 467 }
 468
 469 VkResult VKAPI vkCreateGraphicsPipelineDerivative(
 470     VkDevice                                    device,
 471     const VkGraphicsPipelineCreateInfo*         pCreateInfo,
 472     VkPipeline                                  basePipeline,
 473     VkPipeline*                                 pPipeline)
 474 {
 475    return VK_UNSUPPORTED;
 476 }
 477
 478 VkResult VKAPI vkCreateComputePipeline(
 479     VkDevice                                    device,
 480     const VkComputePipelineCreateInfo*          pCreateInfo,
 481     VkPipeline*                                 pPipeline)
 482 {
 483    return VK_UNSUPPORTED;
 484 }
 485
 486 VkResult VKAPI vkStorePipeline(
 487     VkDevice                                    device,
 488     VkPipeline                                  pipeline,
 489     size_t*                                     pDataSize,
 490     void*                                       pData)
 491 {
 492    return VK_UNSUPPORTED;
 493 }
 494
 495 VkResult VKAPI vkLoadPipeline(
 496     VkDevice                                    device,
 497     size_t                                      dataSize,
 498     const void*                                 pData,
 499     VkPipeline*                                 pPipeline)
 500 {
 501    return VK_UNSUPPORTED;
 502 }
 503
 504 VkResult VKAPI vkLoadPipelineDerivative(
 505     VkDevice                                    device,
 506     size_t                                      dataSize,
 507     const void*                                 pData,
 508     VkPipeline                                  basePipeline,
 509     VkPipeline*                                 pPipeline)
 510 {
 511    return VK_UNSUPPORTED;
 512 }
 513
 514 // Pipeline layout functions
 515
 516 VkResult VKAPI vkCreatePipelineLayout(
 517     VkDevice                                    _device,
 518     const VkPipelineLayoutCreateInfo*           pCreateInfo,
 519     VkPipelineLayout*                           pPipelineLayout)
 520 {
 521    struct anv_device *device = (struct anv_device *) _device;
 522    struct anv_pipeline_layout *layout;
 523    struct anv_pipeline_layout_entry *entry;
 524    uint32_t total;
 525    size_t size;
 526
 527    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO);
 528
 529    total = 0;
 530    for (uint32_t i = 0; i < pCreateInfo->descriptorSetCount; i++) {
 531       struct anv_descriptor_set_layout *set_layout =
 532          (struct anv_descriptor_set_layout *) pCreateInfo->pSetLayouts[i];
 533       for (uint32_t j = 0; j < set_layout->count; j++)
 534          total += set_layout->total;
 535    }
 536
 537    size = sizeof(*layout) + total * sizeof(layout->entries[0]);
 538    layout = anv_device_alloc(device, size, 8,
 539                              VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
 540    if (layout == NULL)
 541       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
 542
 543    entry = layout->entries;
 544    for (uint32_t s = 0; s < VK_NUM_SHADER_STAGE; s++) {
 545       layout->stage[s].entries = entry;
 546
 547       for (uint32_t i = 0; i < pCreateInfo->descriptorSetCount; i++) {
 548          struct anv_descriptor_set_layout *set_layout =
 549             (struct anv_descriptor_set_layout *) pCreateInfo->pSetLayouts[i];
 550          for (uint32_t j = 0; j < set_layout->count; j++)
 551             if (set_layout->bindings[j].mask & (1 << s)) {
 552                entry->type = set_layout->bindings[j].type;
 553                entry->set = i;
 554                entry->index = j;
 555                entry++;
 556             }
 557       }
 558
 559       layout->stage[s].count = entry - layout->stage[s].entries;
 560    }
 561
 562    *pPipelineLayout = (VkPipelineLayout) layout;
 563
 564    return VK_SUCCESS;
 565 }