1 # == Intermediate wire definitions ==#
3 Wire#(Bit#({1})) wrcell{0}_mux<-mkDWire(0);'''
5 GenericIOType cell{0}_mux_out=unpack(0);
6 Wire#(Bit#(1)) cell{0}_mux_in<-mkDWire(0);
9 Wire#(Bit#(1)) wruart{0}_rx<-mkDWire(0);
10 Wire#(Bit#(1)) wruart{0}_tx<-mkDWire(0);
11 GenericIOType uart{0}_rx_io = GenericIOType{{
21 GenericIOType uart{0}_tx_io = GenericIOType{{
22 outputval:wruart{0}_tx,
33 Wire#(Bit#(1)) wrspi{0}_sclk<-mkDWire(0);
34 Wire#(Bit#(1)) wrspi{0}_mosi<-mkDWire(0);
35 Wire#(Bit#(1)) wrspi{0}_nss<-mkDWire(0);
36 Wire#(Bit#(1)) wrspi{0}_miso<-mkDWire(0);
37 GenericIOType spi{0}_sclk_io = GenericIOType{{
38 outputval:wrspi{0}_sclk,
47 GenericIOType spi{0}_mosi_io = GenericIOType{{
48 outputval:wrspi{0}_mosi,
57 GenericIOType spi{0}_nss_io = GenericIOType{{
58 outputval:wrspi{0}_nss,
67 GenericIOType spi{0}_miso_io = GenericIOType{{
79 Wire#(Bit#(1)) wrtwi{0}_sda_out<-mkDWire(0);
80 Wire#(Bit#(1)) wrtwi{0}_sda_outen<-mkDWire(0);
81 Wire#(Bit#(1)) wrtwi{0}_sda_in<-mkDWire(0);
82 Wire#(Bit#(1)) wrtwi{0}_scl_out<-mkDWire(0);
83 Wire#(Bit#(1)) wrtwi{0}_scl_outen<-mkDWire(0);
84 Wire#(Bit#(1)) wrtwi{0}_scl_in<-mkDWire(0);
85 GenericIOType twi{0}_sda_io = GenericIOType{{
86 outputval:wrtwi{0}_sda_out,
87 output_en:wrtwi{0}_sda_outen,
88 input_en:~wrtwi{0}_sda_outen,
95 GenericIOType twi{0}_scl_io = GenericIOType{{
96 outputval:wrtwi{0}_scl_out,
97 output_en:wrtwi{0}_scl_outen,
98 input_en:~wrtwi{0}_scl_outen,
108 Wire#(Bit#(1)) wrsd{0}_clk<-mkDWire(0);
109 Wire#(Bit#(1)) wrsd{0}_cmd<-mkDWire(0);
110 Wire#(Bit#(1)) wrsd{0}_d0_out<-mkDWire(0);
111 Wire#(Bit#(1)) wrsd{0}_d0_outen<-mkDWire(0);
112 Wire#(Bit#(1)) wrsd{0}_d0_in<-mkDWire(0);
113 Wire#(Bit#(1)) wrsd{0}_d1_out<-mkDWire(0);
114 Wire#(Bit#(1)) wrsd{0}_d1_outen<-mkDWire(0);
115 Wire#(Bit#(1)) wrsd{0}_d1_in<-mkDWire(0);
116 Wire#(Bit#(1)) wrsd{0}_d2_out<-mkDWire(0);
117 Wire#(Bit#(1)) wrsd{0}_d2_outen<-mkDWire(0);
118 Wire#(Bit#(1)) wrsd{0}_d2_in<-mkDWire(0);
119 Wire#(Bit#(1)) wrsd{0}_d3_out<-mkDWire(0);
120 Wire#(Bit#(1)) wrsd{0}_d3_outen<-mkDWire(0);
121 Wire#(Bit#(1)) wrsd{0}_d3_in<-mkDWire(0);
122 GenericIOType sd{0}_clk_io = GenericIOType{{
123 outputval:wrsd{0}_clk,
132 GenericIOType sd{0}_cmd_io = GenericIOType{{
133 outputval:wrsd{0}_cmd,
142 GenericIOType sd{0}_d0_io = GenericIOType{{
143 outputval:wrsd{0}_d0_out,
144 output_en:wrsd{0}_d0_outen,
145 input_en:~wrsd{0}_d0_outen,
152 GenericIOType sd{0}_d1_io = GenericIOType{{
153 outputval:wrsd{0}_d1_out,
154 output_en:wrsd{0}_d1_outen,
155 input_en:~wrsd{0}_d1_outen,
162 GenericIOType sd{0}_d2_io = GenericIOType{{
163 outputval:wrsd{0}_d2_out,
164 output_en:wrsd{0}_d2_outen,
165 input_en:~wrsd{0}_d2_outen,
172 GenericIOType sd{0}_d3_io = GenericIOType{{
173 outputval:wrsd{0}_d3_out,
174 output_en:wrsd{0}_d3_outen,
175 input_en:~wrsd{0}_d3_outen,
185 Wire#(Bit#(1)) wrjtag{0}_tdi<-mkDWire(0);
186 Wire#(Bit#(1)) wrjtag{0}_tms<-mkDWire(0);
187 Wire#(Bit#(1)) wrjtag{0}_tclk<-mkDWire(0);
188 Wire#(Bit#(1)) wrjtag{0}_trst<-mkDWire(0);
189 Wire#(Bit#(1)) wrjtag{0}_tdo<-mkDWire(0);
190 GenericIOType jtag{0}_tdi_io = GenericIOType{{
200 GenericIOType jtag{0}_tms_io = GenericIOType{{
210 GenericIOType jtag{0}_tclk_io = GenericIOType{{
220 GenericIOType jtag{0}_trst_io = GenericIOType{{
230 GenericIOType jtag{0}_tdo_io = GenericIOType{{
231 outputval:wrjtag{0}_tdo,
243 Wire#(Bit#(1)) wrpwm{0}_pwm<-mkDWire(0);
244 GenericIOType pwm{0}_pwm_io = GenericIOType{{
245 outputval:wrpwm{0}_pwm,
255 # =================================== #