techlibs/common/gate2lut.v

   1 (* techmap_celltype = "$_NOT_" *)
   2 module _90_lut_not (A, Y);
   3     input A;
   4     output Y;
   5
   6     wire [`LUT_WIDTH-1:0] AA;
   7     assign AA = {A};
   8
   9     \$lut #(
  10         .WIDTH(`LUT_WIDTH),
  11         .LUT(4'b01)
  12     ) lut (
  13         .A(AA),
  14         .Y(Y)
  15     );
  16 endmodule
  17
  18 (* techmap_celltype = "$_OR_" *)
  19 module _90_lut_or (A, B, Y);
  20     input A, B;
  21     output Y;
  22
  23     wire [`LUT_WIDTH-1:0] AA;
  24     assign AA = {B, A};
  25
  26     \$lut #(
  27         .WIDTH(`LUT_WIDTH),
  28         .LUT(4'b1110)
  29     ) lut (
  30         .A(AA),
  31         .Y(Y)
  32     );
  33 endmodule
  34
  35 (* techmap_celltype = "$_AND_" *)
  36 module _90_lut_and (A, B, Y);
  37     input A, B;
  38     output Y;
  39
  40     wire [`LUT_WIDTH-1:0] AA;
  41     assign AA = {B, A};
  42
  43     \$lut #(
  44         .WIDTH(`LUT_WIDTH),
  45         .LUT(4'b1000)
  46     ) lut (
  47         .A(AA),
  48         .Y(Y)
  49     );
  50 endmodule
  51
  52 (* techmap_celltype = "$_XOR_" *)
  53 module _90_lut_xor (A, B, Y);
  54     input A, B;
  55     output Y;
  56
  57     wire [`LUT_WIDTH-1:0] AA;
  58     assign AA = {B, A};
  59
  60     \$lut #(
  61         .WIDTH(`LUT_WIDTH),
  62         .LUT(4'b0110)
  63     ) lut (
  64         .A(AA),
  65         .Y(Y)
  66     );
  67 endmodule
  68
  69 (* techmap_celltype = "$_MUX_" *)
  70 module _90_lut_mux (A, B, S, Y);
  71     input A, B, S;
  72     output Y;
  73
  74     wire [`LUT_WIDTH-1:0] AA;
  75     assign AA = {S, B, A};
  76
  77     \$lut #(
  78         .WIDTH(`LUT_WIDTH),
  79         //     A 1010 1010
  80         //     B 1100 1100
  81         //     S 1111 0000
  82         .LUT(8'b 1100_1010)
  83     ) lut (
  84         .A(AA),
  85         .Y(Y)
  86     );
  87 endmodule