techlibs/coolrunner2/cells_counter_map.v

   1 module \$__COUNT_ (CE, CLK, OUT, POUT, RST, UP);
   2
   3     input wire CE;
   4     input wire CLK;
   5     output wire OUT;
   6     (* force_downto *)
   7     output wire[WIDTH-1:0] POUT;
   8     input wire RST;
   9     input wire UP;
  10
  11     parameter COUNT_TO = 1;
  12     parameter RESET_MODE = "RISING";
  13     parameter RESET_TO_MAX = 0;
  14     parameter HAS_POUT = 0;
  15     parameter HAS_CE = 0;
  16     parameter WIDTH = 8;
  17     parameter DIRECTION = "DOWN";
  18
  19     if (DIRECTION == "UP") begin
  20         if (WIDTH < 2) begin
  21             initial begin
  22                 $display("ERROR: \$__COUNT_ must be at least 2 bits wide (bug in extract_counter pass?).");
  23                 $finish;
  24             end
  25         end
  26
  27         // FIXME: Max width?
  28
  29         assign OUT = POUT == COUNT_TO;
  30
  31         if (HAS_CE) begin
  32             genvar i;
  33             for (i = 0; i < WIDTH; i++) begin: countbits
  34                 // each bit = (cur & !reset) ^ (all prev & !reset)
  35                 wire xor_to_mc_bitn;
  36                 FDCP #(
  37                     .INIT(0)
  38                 ) bitn_ff (
  39                     .C(CLK),
  40                     .CLR(0),
  41                     .D(xor_to_mc_bitn),
  42                     .PRE(0),
  43                     .Q(POUT[i])
  44                 );
  45                 wire orterm_to_xor_bitn;
  46                 wire pterm0_to_or_bitn;
  47                 wire pterm1_to_or_bitn;
  48                 MACROCELL_XOR #(
  49                     .INVERT_OUT(0)
  50                 ) bitn_xor (
  51                     .IN_ORTERM(orterm_to_xor_bitn),
  52                     .IN_PTC(pterm1_to_or_bitn),
  53                     .OUT(xor_to_mc_bitn)
  54                 );
  55                 ORTERM #(
  56                     .WIDTH(1)
  57                 ) bitn_or (
  58                     .IN(pterm0_to_or_bitn),
  59                     .OUT(orterm_to_xor_bitn)
  60                 );
  61                 ANDTERM #(
  62                     .COMP_INP(1),
  63                     .TRUE_INP(1)
  64                 ) bitn_pterm0 (
  65                     .IN(POUT[i]),
  66                     .IN_B(OUT),
  67                     .OUT(pterm0_to_or_bitn)
  68                 );
  69                 ANDTERM #(
  70                     .COMP_INP(1),
  71                     .TRUE_INP(i + 1)
  72                 ) bitn_pterm1 (
  73                     .IN({POUT[i-1:0], CE}),
  74                     .IN_B(OUT),
  75                     .OUT(pterm1_to_or_bitn)
  76                 );
  77             end
  78         end else begin
  79             // Bit0 is special; toggle unless reset
  80             // cur  reset           out
  81             // 0    0               1
  82             // 0    1               0
  83             // 1    0               0
  84             // 1    1               0
  85             wire xor_to_mc_bit0;
  86             FDCP #(
  87                 .INIT(0)
  88             ) bit0_ff (
  89                 .C(CLK),
  90                 .CLR(0),
  91                 .D(xor_to_mc_bit0),
  92                 .PRE(0),
  93                 .Q(POUT[0])
  94             );
  95             wire pterm_to_xor_bit0;
  96             MACROCELL_XOR #(
  97                 .INVERT_OUT(0)
  98             ) bit0_xor (
  99                 .IN_PTC(pterm_to_xor_bit0),
 100                 .OUT(xor_to_mc_bit0)
 101             );
 102             ANDTERM #(
 103                 .COMP_INP(2),
 104                 .TRUE_INP(0)
 105             ) bit0_pterm (
 106                 .IN(),
 107                 .IN_B({POUT[0], OUT}),
 108                 .OUT(pterm_to_xor_bit0)
 109             );
 110
 111             genvar i;
 112             for (i = 1; i < WIDTH; i++) begin: countbits
 113                 // each bit = (cur & !reset) ^ (all prev & !reset)
 114                 wire xor_to_mc_bitn;
 115                 FDCP #(
 116                     .INIT(0)
 117                 ) bitn_ff (
 118                     .C(CLK),
 119                     .CLR(0),
 120                     .D(xor_to_mc_bitn),
 121                     .PRE(0),
 122                     .Q(POUT[i])
 123                 );
 124                 wire orterm_to_xor_bitn;
 125                 wire pterm0_to_or_bitn;
 126                 wire pterm1_to_or_bitn;
 127                 MACROCELL_XOR #(
 128                     .INVERT_OUT(0)
 129                 ) bitn_xor (
 130                     .IN_ORTERM(orterm_to_xor_bitn),
 131                     .IN_PTC(pterm1_to_or_bitn),
 132                     .OUT(xor_to_mc_bitn)
 133                 );
 134                 ORTERM #(
 135                     .WIDTH(1)
 136                 ) bitn_or (
 137                     .IN(pterm0_to_or_bitn),
 138                     .OUT(orterm_to_xor_bitn)
 139                 );
 140                 ANDTERM #(
 141                     .COMP_INP(1),
 142                     .TRUE_INP(1)
 143                 ) bitn_pterm0 (
 144                     .IN(POUT[i]),
 145                     .IN_B(OUT),
 146                     .OUT(pterm0_to_or_bitn)
 147                 );
 148                 ANDTERM #(
 149                     .COMP_INP(1),
 150                     .TRUE_INP(i)
 151                 ) bitn_pterm1 (
 152                     .IN(POUT[i-1:0]),
 153                     .IN_B(OUT),
 154                     .OUT(pterm1_to_or_bitn)
 155                 );
 156             end
 157         end
 158     end
 159
 160     // FIXME: down counters
 161
 162 endmodule