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HEAD
Remove abc_flop attributes for now
[yosys.git]
/
techlibs
/
coolrunner2
/
cells_latch.v
1
module $_DLATCH_P_(input E, input D, output Q);
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LDCP _TECHMAP_REPLACE_ (
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.D(D),
4
.G(E),
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.Q(Q),
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.PRE(1'b0),
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.CLR(1'b0)
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);
9
endmodule
10
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module $_DLATCH_N_(input E, input D, output Q);
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LDCP_N _TECHMAP_REPLACE_ (
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.D(D),
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.G(E),
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.Q(Q),
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.PRE(1'b0),
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.CLR(1'b0)
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);
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endmodule