Remove abc_flop attributes for now
[yosys.git] / techlibs / coolrunner2 / cells_latch.v
1 module $_DLATCH_P_(input E, input D, output Q);
2 LDCP _TECHMAP_REPLACE_ (
3 .D(D),
4 .G(E),
5 .Q(Q),
6 .PRE(1'b0),
7 .CLR(1'b0)
8 );
9 endmodule
10
11 module $_DLATCH_N_(input E, input D, output Q);
12 LDCP_N _TECHMAP_REPLACE_ (
13 .D(D),
14 .G(E),
15 .Q(Q),
16 .PRE(1'b0),
17 .CLR(1'b0)
18 );
19 endmodule