2 * yosys -- Yosys Open SYnthesis Suite
4 * Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com>
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include "kernel/register.h"
21 #include "kernel/celltypes.h"
22 #include "kernel/rtlil.h"
23 #include "kernel/log.h"
26 PRIVATE_NAMESPACE_BEGIN
28 struct SynthEasicPass
: public ScriptPass
30 SynthEasicPass() : ScriptPass("synth_easic", "synthesis for eASIC platform") { }
34 // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
36 log(" synth_easic [options]\n");
38 log("This command runs synthesis for eASIC platform.\n");
40 log(" -top <module>\n");
41 log(" use the specified module as top module\n");
43 log(" -vlog <file>\n");
44 log(" write the design to the specified structural Verilog file. writing of\n");
45 log(" an output file is omitted if this parameter is not specified.\n");
47 log(" -etools <path>\n");
48 log(" set path to the eTools installation. (default=/opt/eTools)\n");
50 log(" -run <from_label>:<to_label>\n");
51 log(" only run the commands between the labels (see below). an empty\n");
52 log(" from label is synonymous to 'begin', and empty to label is\n");
53 log(" synonymous to the end of the command list.\n");
56 log(" do not flatten design before synthesis\n");
59 log(" run 'abc' with '-dff -D 1' options\n");
62 log("The following commands are executed by this synthesis command:\n");
67 string top_opt
, vlog_file
, etools_path
;
70 void clear_flags() override
72 top_opt
= "-auto-top";
74 etools_path
= "/opt/eTools";
79 void execute(std::vector
<std::string
> args
, RTLIL::Design
*design
) override
81 string run_from
, run_to
;
85 for (argidx
= 1; argidx
< args
.size(); argidx
++)
87 if (args
[argidx
] == "-top" && argidx
+1 < args
.size()) {
88 top_opt
= "-top " + args
[++argidx
];
91 if (args
[argidx
] == "-vlog" && argidx
+1 < args
.size()) {
92 vlog_file
= args
[++argidx
];
95 if (args
[argidx
] == "-etools" && argidx
+1 < args
.size()) {
96 etools_path
= args
[++argidx
];
99 if (args
[argidx
] == "-run" && argidx
+1 < args
.size()) {
100 size_t pos
= args
[argidx
+1].find(':');
101 if (pos
== std::string::npos
)
103 run_from
= args
[++argidx
].substr(0, pos
);
104 run_to
= args
[argidx
].substr(pos
+1);
107 if (args
[argidx
] == "-noflatten") {
111 if (args
[argidx
] == "-retime") {
117 extra_args(args
, argidx
, design
);
119 if (!design
->full_selection())
120 log_cmd_error("This command only operates on fully selected designs!\n");
122 log_header(design
, "Executing SYNTH_EASIC pass.\n");
125 run_script(design
, run_from
, run_to
);
130 void script() override
132 string phys_clk_lib
= stringf("%s/data_ruby28/design_libs/logical/timing/gp/n3x_phys_clk_0v893ff125c.lib", etools_path
.c_str());
133 string logic_lut_lib
= stringf("%s/data_ruby28/design_libs/logical/timing/gp/n3x_logic_lut_0v893ff125c.lib", etools_path
.c_str());
135 if (check_label("begin"))
137 run(stringf("read_liberty -lib %s", help_mode
? "<etools_phys_clk_lib>" : phys_clk_lib
.c_str()));
138 run(stringf("read_liberty -lib %s", help_mode
? "<etools_logic_lut_lib>" : logic_lut_lib
.c_str()));
139 run(stringf("hierarchy -check %s", help_mode
? "-top <top>" : top_opt
.c_str()));
142 if (flatten
&& check_label("flatten", "(unless -noflatten)"))
148 if (check_label("coarse"))
150 run("synth -run coarse");
153 if (check_label("fine"))
155 run("opt -fast -mux_undef -undriven -fine");
157 run("opt -undriven -fine");
160 if (retime
|| help_mode
) {
161 run("abc -dff -D 1", " (only if -retime)");
162 run("opt_clean", "(only if -retime)");
166 if (check_label("map"))
168 run(stringf("dfflibmap -liberty %s", help_mode
? "<etools_phys_clk_lib>" : phys_clk_lib
.c_str()));
169 run(stringf("abc -liberty %s", help_mode
? "<etools_logic_lut_lib>" : logic_lut_lib
.c_str()));
173 if (check_label("check"))
175 run("hierarchy -check");
177 run("check -noinit");
178 run("blackbox =A:whitebox");
181 if (check_label("vlog"))
183 if (!vlog_file
.empty() || help_mode
)
184 run(stringf("write_verilog -noexpr -attr2comment %s", help_mode
? "<file-name>" : vlog_file
.c_str()));
189 PRIVATE_NAMESPACE_END