Merge pull request #1559 from YosysHQ/efinix_test_fix
[yosys.git] / techlibs / ecp5 / abc9_map.v
1 // ---------------------------------------
2
3 // Attach a (combinatorial) black-box onto the output
4 // of this LUTRAM primitive to capture its
5 // asynchronous read behaviour
6 module TRELLIS_DPR16X4 (
7 (* techmap_autopurge *) input [3:0] DI,
8 (* techmap_autopurge *) input [3:0] WAD,
9 (* techmap_autopurge *) input WRE,
10 (* techmap_autopurge *) input WCK,
11 (* techmap_autopurge *) input [3:0] RAD,
12 output [3:0] DO
13 );
14 parameter WCKMUX = "WCK";
15 parameter WREMUX = "WRE";
16 parameter [63:0] INITVAL = 64'h0000000000000000;
17 wire [3:0] $DO;
18
19 TRELLIS_DPR16X4 #(
20 .WCKMUX(WCKMUX), .WREMUX(WREMUX), .INITVAL(INITVAL)
21 ) _TECHMAP_REPLACE_ (
22 .DI(DI), .WAD(WAD), .WRE(WRE), .WCK(WCK),
23 .RAD(RAD), .DO($DO)
24 );
25
26 $__ABC9_DPR16X4_COMB do (.$DO($DO), .RAD(RAD), .DO(DO));
27 endmodule