Remove peepopt call in synth_xilinx since already in synth -run coarse
[yosys.git] / techlibs / ecp5 / abc_5g.box
1 # NB: Inputs/Outputs must be ordered alphabetically
2 # (with exceptions for carry in/out)
3
4 # Box 1 : CCU2C (2xCARRY + 2xLUT4)
5 # Outputs: S0, S1, COUT
6 # (NB: carry chain input/output must be last
7 # input/output and bus has been moved
8 # there overriding the otherwise
9 # alphabetical ordering)
10 # name ID w/b ins outs
11 CCU2C 1 1 9 3
12
13 #A0 A1 B0 B1 C0 C1 D0 D1 CIN
14 379 - 379 - 275 - 141 - 257
15 630 379 630 379 526 275 392 141 273
16 516 516 516 516 412 412 278 278 43
17
18 # Box 2 : TRELLIS_DPR16X4 (16x4 dist ram)
19 # Outputs: DO0, DO1, DO2, DO3
20 # name ID w/b ins outs
21 TRELLIS_DPR16X4 2 0 14 4
22
23 #DI0 DI1 DI2 DI3 RAD0 RAD1 RAD2 RAD3 WAD0 WAD1 WAD2 WAD3 WCK WRE
24 - - - - 141 379 275 379 - - - - - -
25 - - - - 141 379 275 379 - - - - - -
26 - - - - 141 379 275 379 - - - - - -
27 - - - - 141 379 275 379 - - - - - -
28
29 # Box 3 : PFUMX (MUX2)
30 # Outputs: Z
31 # name ID w/b ins outs
32 PFUMX 3 1 3 1
33
34 #ALUT BLUT C0
35 98 98 151
36
37 # Box 4 : L6MUX21 (MUX2)
38 # Outputs: Z
39 # name ID w/b ins outs
40 L6MUX21 4 1 3 1
41
42 #D0 D1 SD
43 140 141 148