Remove peepopt call in synth_xilinx since already in synth -run coarse
[yosys.git] / techlibs / ecp5 / brams_connect.py
1 #!/usr/bin/env python3
2
3 def write_bus_ports(f, ada_bits, adb_bits, dia_bits, dob_bits):
4 ada_conn = [".ADA%d(%s)" % (i, ada_bits[i]) for i in range(len(ada_bits))]
5 adb_conn = [".ADB%d(%s)" % (i, adb_bits[i]) for i in range(len(adb_bits))]
6 dia_conn = [".DIA%d(%s)" % (i, dia_bits[i]) for i in range(len(dia_bits))]
7 dob_conn = [".DOB%d(%s)" % (i, dob_bits[i]) for i in range(len(dob_bits))]
8 print(" %s," % ", ".join(ada_conn), file=f)
9 print(" %s," % ", ".join(adb_conn), file=f)
10 print(" %s," % ", ".join(dia_conn), file=f)
11 print(" %s," % ", ".join(dob_conn), file=f)
12
13 with open("techlibs/ecp5/bram_conn_1.vh", "w") as f:
14 ada_bits = ["A1ADDR[%d]" % i for i in range(14)]
15 adb_bits = ["B1ADDR[%d]" % i for i in range(14)]
16 dia_bits = ["A1DATA[0]"] + ["1'b0" for i in range(17)]
17 dob_bits = ["B1DATA[0]"]
18 write_bus_ports(f, ada_bits, adb_bits, dia_bits, dob_bits)
19
20 with open("techlibs/ecp5/bram_conn_2.vh", "w") as f:
21 ada_bits = ["1'b0"] + ["A1ADDR[%d]" % i for i in range(13)]
22 adb_bits = ["1'b0"] + ["B1ADDR[%d]" % i for i in range(13)]
23 dia_bits = ["A1DATA[%d]" % i for i in range(2)] + ["1'b0" for i in range(16)]
24 dob_bits = ["B1DATA[%d]" % i for i in range(2)]
25 write_bus_ports(f, ada_bits, adb_bits, dia_bits, dob_bits)
26
27 with open("techlibs/ecp5/bram_conn_4.vh", "w") as f:
28 ada_bits = ["1'b0", "1'b0"] + ["A1ADDR[%d]" % i for i in range(12)]
29 adb_bits = ["1'b0", "1'b0"] + ["B1ADDR[%d]" % i for i in range(12)]
30 dia_bits = ["A1DATA[%d]" % i for i in range(4)] + ["1'b0" for i in range(14)]
31 dob_bits = ["B1DATA[%d]" % i for i in range(4)]
32 write_bus_ports(f, ada_bits, adb_bits, dia_bits, dob_bits)
33
34 with open("techlibs/ecp5/bram_conn_9.vh", "w") as f:
35 ada_bits = ["1'b0", "1'b0", "1'b0"] + ["A1ADDR[%d]" % i for i in range(11)]
36 adb_bits = ["1'b0", "1'b0", "1'b0"] + ["B1ADDR[%d]" % i for i in range(11)]
37 dia_bits = ["A1DATA[%d]" % i for i in range(9)] + ["1'b0" for i in range(9)]
38 dob_bits = ["B1DATA[%d]" % i for i in range(9)]
39 write_bus_ports(f, ada_bits, adb_bits, dia_bits, dob_bits)
40
41 with open("techlibs/ecp5/bram_conn_18.vh", "w") as f:
42 ada_bits = ["A1EN[0]", "A1EN[1]", "1'b0", "1'b0"] + ["A1ADDR[%d]" % i for i in range(10)]
43 adb_bits = ["1'b0", "1'b0", "1'b0", "1'b0"] + ["B1ADDR[%d]" % i for i in range(10)]
44 dia_bits = ["A1DATA[%d]" % i for i in range(18)]
45 dob_bits = ["B1DATA[%d]" % i for i in range(18)]
46 write_bus_ports(f, ada_bits, adb_bits, dia_bits, dob_bits)