techlibs/ecp5/brams_map.v

   1 module \$__ECP5_DP16KD (CLK2, CLK3, A1ADDR, A1DATA, A1EN, B1ADDR, B1DATA, B1EN);
   2         parameter CFG_ABITS = 10;
   3         parameter CFG_DBITS = 18;
   4         parameter CFG_ENABLE_A = 2;
   5
   6         parameter CLKPOL2 = 1;
   7         parameter CLKPOL3 = 1;
   8         parameter [18431:0] INIT = 18432'bx;
   9         parameter TRANSP2 = 0;
  10
  11         input CLK2;
  12         input CLK3;
  13
  14         input [CFG_ABITS-1:0] A1ADDR;
  15         input [CFG_DBITS-1:0] A1DATA;
  16         input [CFG_ENABLE_A-1:0] A1EN;
  17
  18         input [CFG_ABITS-1:0] B1ADDR;
  19         output [CFG_DBITS-1:0] B1DATA;
  20         input B1EN;
  21
  22         localparam CLKAMUX = CLKPOL2 ? "CLKA" : "INV";
  23         localparam CLKBMUX = CLKPOL3 ? "CLKB" : "INV";
  24
  25         localparam WRITEMODE_A = TRANSP2 ? "WRITETHROUGH" : "READBEFOREWRITE";
  26
  27         generate if (CFG_DBITS == 1) begin
  28                 DP16KD #(
  29                         `include "bram_init_1_2_4.vh"
  30                         .DATA_WIDTH_A(1),
  31                         .DATA_WIDTH_B(1),
  32                         .CLKAMUX(CLKAMUX),
  33                         .CLKBMUX(CLKBMUX),
  34                         .WRITEMODE_A(WRITEMODE_A),
  35                         .WRITEMODE_B("READBEFOREWRITE"),
  36                         .GSR("DISABLED")
  37                 ) _TECHMAP_REPLACE_ (
  38                         `include "bram_conn_1.vh"
  39                         .CLKA(CLK2), .CLKB(CLK3),
  40                         .WEA(|A1EN), .CEA(1'b1), .OCEA(1'b1),
  41                         .WEB(1'b0), .CEB(B1EN), .OCEB(1'b1),
  42                         .RSTA(1'b0), .RSTB(1'b0)
  43                 );
  44         end else if (CFG_DBITS == 2) begin
  45                 DP16KD #(
  46                         `include "bram_init_1_2_4.vh"
  47                         .DATA_WIDTH_A(2),
  48                         .DATA_WIDTH_B(2),
  49                         .CLKAMUX(CLKAMUX),
  50                         .CLKBMUX(CLKBMUX),
  51                         .WRITEMODE_A(WRITEMODE_A),
  52                         .WRITEMODE_B("READBEFOREWRITE"),
  53                         .GSR("DISABLED")
  54                 ) _TECHMAP_REPLACE_ (
  55                         `include "bram_conn_2.vh"
  56                         .CLKA(CLK2), .CLKB(CLK3),
  57                         .WEA(|A1EN), .CEA(1'b1), .OCEA(1'b1),
  58                         .WEB(1'b0), .CEB(B1EN), .OCEB(1'b1),
  59                         .RSTA(1'b0), .RSTB(1'b0)
  60                 );
  61         end else if (CFG_DBITS <= 4) begin
  62                 DP16KD #(
  63                         `include "bram_init_1_2_4.vh"
  64                         .DATA_WIDTH_A(4),
  65                         .DATA_WIDTH_B(4),
  66                         .CLKAMUX(CLKAMUX),
  67                         .CLKBMUX(CLKBMUX),
  68                         .WRITEMODE_A(WRITEMODE_A),
  69                         .WRITEMODE_B("READBEFOREWRITE"),
  70                         .GSR("DISABLED")
  71                 ) _TECHMAP_REPLACE_ (
  72                         `include "bram_conn_4.vh"
  73                         .CLKA(CLK2), .CLKB(CLK3),
  74                         .WEA(|A1EN), .CEA(1'b1), .OCEA(1'b1),
  75                         .WEB(1'b0), .CEB(B1EN), .OCEB(1'b1),
  76                         .RSTA(1'b0), .RSTB(1'b0)
  77                 );
  78         end else if (CFG_DBITS <= 9) begin
  79                 DP16KD #(
  80                         `include "bram_init_9_18_36.vh"
  81                         .DATA_WIDTH_A(9),
  82                         .DATA_WIDTH_B(9),
  83                         .CLKAMUX(CLKAMUX),
  84                         .CLKBMUX(CLKBMUX),
  85                         .WRITEMODE_A(WRITEMODE_A),
  86                         .WRITEMODE_B("READBEFOREWRITE"),
  87                         .GSR("DISABLED")
  88                 ) _TECHMAP_REPLACE_ (
  89                         `include "bram_conn_9.vh"
  90                         .CLKA(CLK2), .CLKB(CLK3),
  91                         .WEA(|A1EN), .CEA(1'b1), .OCEA(1'b1),
  92                         .WEB(1'b0), .CEB(B1EN), .OCEB(1'b1),
  93                         .RSTA(1'b0), .RSTB(1'b0)
  94                 );
  95         end else if (CFG_DBITS <= 18) begin
  96                 DP16KD #(
  97                         `include "bram_init_9_18_36.vh"
  98                         .DATA_WIDTH_A(18),
  99                         .DATA_WIDTH_B(18),
 100                         .CLKAMUX(CLKAMUX),
 101                         .CLKBMUX(CLKBMUX),
 102                         .WRITEMODE_A(WRITEMODE_A),
 103                         .WRITEMODE_B("READBEFOREWRITE"),
 104                         .GSR("DISABLED")
 105                 ) _TECHMAP_REPLACE_ (
 106                         `include "bram_conn_18.vh"
 107                         .CLKA(CLK2), .CLKB(CLK3),
 108                         .WEA(|A1EN), .CEA(1'b1), .OCEA(1'b1),
 109                         .WEB(1'b0), .CEB(B1EN), .OCEB(1'b1),
 110                         .RSTA(1'b0), .RSTB(1'b0)
 111                 );
 112         end else begin
 113                 wire TECHMAP_FAIL = 1'b1;
 114         end endgenerate
 115 endmodule