Techmap flops before ABC again
[yosys.git] / techlibs / ecp5 / dram.txt
1 bram $__TRELLIS_DPR16X4
2 init 1
3 abits 4
4 dbits 4
5 groups 2
6 ports 1 1
7 wrmode 0 1
8 enable 0 1
9 transp 0 0
10 clocks 0 1
11 clkpol 0 2
12 endbram
13
14 match $__TRELLIS_DPR16X4
15 make_outreg
16 min wports 1
17 endmatch