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ecp5: cleanup unused +/ecp5/abc9_model.v
[yosys.git] / techlibs / ecp5 / synth_ecp5.cc
1 /*
2 * yosys -- Yosys Open SYnthesis Suite
3 *
4 * Copyright (C) 2012 Clifford Wolf <clifford@clifford.at>
5 * Copyright (C) 2018 David Shah <dave@ds0.me>
6 *
7 * Permission to use, copy, modify, and/or distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 *
19 */
20
21 #include "kernel/register.h"
22 #include "kernel/celltypes.h"
23 #include "kernel/rtlil.h"
24 #include "kernel/log.h"
25
26 USING_YOSYS_NAMESPACE
27 PRIVATE_NAMESPACE_BEGIN
28
29 struct SynthEcp5Pass : public ScriptPass
30 {
31 SynthEcp5Pass() : ScriptPass("synth_ecp5", "synthesis for ECP5 FPGAs") { }
32
33 void on_register() YS_OVERRIDE
34 {
35 RTLIL::constpad["synth_ecp5.abc9.W"] = "300";
36 }
37
38 void help() YS_OVERRIDE
39 {
40 // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
41 log("\n");
42 log(" synth_ecp5 [options]\n");
43 log("\n");
44 log("This command runs synthesis for ECP5 FPGAs.\n");
45 log("\n");
46 log(" -top <module>\n");
47 log(" use the specified module as top module\n");
48 log("\n");
49 log(" -blif <file>\n");
50 log(" write the design to the specified BLIF file. writing of an output file\n");
51 log(" is omitted if this parameter is not specified.\n");
52 log("\n");
53 log(" -edif <file>\n");
54 log(" write the design to the specified EDIF file. writing of an output file\n");
55 log(" is omitted if this parameter is not specified.\n");
56 log("\n");
57 log(" -json <file>\n");
58 log(" write the design to the specified JSON file. writing of an output file\n");
59 log(" is omitted if this parameter is not specified.\n");
60 log("\n");
61 log(" -run <from_label>:<to_label>\n");
62 log(" only run the commands between the labels (see below). an empty\n");
63 log(" from label is synonymous to 'begin', and empty to label is\n");
64 log(" synonymous to the end of the command list.\n");
65 log("\n");
66 log(" -noflatten\n");
67 log(" do not flatten design before synthesis\n");
68 log("\n");
69 log(" -dff\n");
70 log(" run 'abc'/'abc9' with -dff option\n");
71 log("\n");
72 log(" -retime\n");
73 log(" run 'abc' with '-dff -D 1' options\n");
74 log("\n");
75 log(" -noccu2\n");
76 log(" do not use CCU2 cells in output netlist\n");
77 log("\n");
78 log(" -nodffe\n");
79 log(" do not use flipflops with CE in output netlist\n");
80 log("\n");
81 log(" -nobram\n");
82 log(" do not use block RAM cells in output netlist\n");
83 log("\n");
84 log(" -nolutram\n");
85 log(" do not use LUT RAM cells in output netlist\n");
86 log("\n");
87 log(" -nowidelut\n");
88 log(" do not use PFU muxes to implement LUTs larger than LUT4s\n");
89 log("\n");
90 log(" -asyncprld\n");
91 log(" use async PRLD mode to implement DLATCH and DFFSR (EXPERIMENTAL)\n");
92 log("\n");
93 log(" -abc2\n");
94 log(" run two passes of 'abc' for slightly improved logic density\n");
95 log("\n");
96 log(" -abc9\n");
97 log(" use new ABC9 flow (EXPERIMENTAL)\n");
98 log("\n");
99 log(" -vpr\n");
100 log(" generate an output netlist (and BLIF file) suitable for VPR\n");
101 log(" (this feature is experimental and incomplete)\n");
102 log("\n");
103 log(" -nodsp\n");
104 log(" do not map multipliers to MULT18X18D\n");
105 log("\n");
106 log("\n");
107 log("The following commands are executed by this synthesis command:\n");
108 help_script();
109 log("\n");
110 }
111
112 string top_opt, blif_file, edif_file, json_file;
113 bool noccu2, nodffe, nobram, nolutram, nowidelut, asyncprld, flatten, dff, retime, abc2, abc9, nodsp, vpr;
114
115 void clear_flags() YS_OVERRIDE
116 {
117 top_opt = "-auto-top";
118 blif_file = "";
119 edif_file = "";
120 json_file = "";
121 noccu2 = false;
122 nodffe = false;
123 nobram = false;
124 nolutram = false;
125 nowidelut = false;
126 asyncprld = false;
127 flatten = true;
128 dff = false;
129 retime = false;
130 abc2 = false;
131 vpr = false;
132 abc9 = false;
133 nodsp = false;
134 }
135
136 void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
137 {
138 string run_from, run_to;
139 clear_flags();
140
141 size_t argidx;
142 for (argidx = 1; argidx < args.size(); argidx++)
143 {
144 if (args[argidx] == "-top" && argidx+1 < args.size()) {
145 top_opt = "-top " + args[++argidx];
146 continue;
147 }
148 if (args[argidx] == "-blif" && argidx+1 < args.size()) {
149 blif_file = args[++argidx];
150 continue;
151 }
152 if (args[argidx] == "-edif" && argidx+1 < args.size()) {
153 edif_file = args[++argidx];
154 continue;
155 }
156 if (args[argidx] == "-json" && argidx+1 < args.size()) {
157 json_file = args[++argidx];
158 continue;
159 }
160 if (args[argidx] == "-run" && argidx+1 < args.size()) {
161 size_t pos = args[argidx+1].find(':');
162 if (pos == std::string::npos)
163 break;
164 run_from = args[++argidx].substr(0, pos);
165 run_to = args[argidx].substr(pos+1);
166 continue;
167 }
168 if (args[argidx] == "-flatten") {
169 flatten = true;
170 continue;
171 }
172 if (args[argidx] == "-noflatten") {
173 flatten = false;
174 continue;
175 }
176 if (args[argidx] == "-dff") {
177 dff = true;
178 continue;
179 }
180 if (args[argidx] == "-retime") {
181 retime = true;
182 continue;
183 }
184 if (args[argidx] == "-noccu2") {
185 noccu2 = true;
186 continue;
187 }
188 if (args[argidx] == "-nodffe") {
189 nodffe = true;
190 continue;
191 }
192 if (args[argidx] == "-nobram") {
193 nobram = true;
194 continue;
195 }
196 if (args[argidx] == "-asyncprld") {
197 asyncprld = true;
198 continue;
199 }
200 if (args[argidx] == "-nolutram" || /*deprecated alias*/ args[argidx] == "-nodram") {
201 nolutram = true;
202 continue;
203 }
204 if (args[argidx] == "-nowidelut" || /*deprecated alias*/ args[argidx] == "-nomux") {
205 nowidelut = true;
206 continue;
207 }
208 if (args[argidx] == "-abc2") {
209 abc2 = true;
210 continue;
211 }
212 if (args[argidx] == "-vpr") {
213 vpr = true;
214 continue;
215 }
216 if (args[argidx] == "-abc9") {
217 abc9 = true;
218 continue;
219 }
220 if (args[argidx] == "-nodsp") {
221 nodsp = true;
222 continue;
223 }
224 break;
225 }
226 extra_args(args, argidx, design);
227
228 if (!design->full_selection())
229 log_cmd_error("This command only operates on fully selected designs!\n");
230
231 if (abc9 && retime)
232 log_cmd_error("-retime option not currently compatible with -abc9!\n");
233
234 log_header(design, "Executing SYNTH_ECP5 pass.\n");
235 log_push();
236
237 run_script(design, run_from, run_to);
238
239 log_pop();
240 }
241
242 void script() YS_OVERRIDE
243 {
244 if (check_label("begin"))
245 {
246 run("read_verilog -lib -specify +/ecp5/cells_sim.v +/ecp5/cells_bb.v");
247 run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
248 }
249
250 if (check_label("coarse"))
251 {
252 run("proc");
253 if (flatten || help_mode)
254 run("flatten");
255 run("tribuf -logic");
256 run("deminout");
257 run("opt_expr");
258 run("opt_clean");
259 run("check");
260 run("opt");
261 run("wreduce");
262 run("peepopt");
263 run("opt_clean");
264 run("share");
265 run("techmap -map +/cmp2lut.v -D LUT_WIDTH=4");
266 run("opt_expr");
267 run("opt_clean");
268 if (!nodsp) {
269 run("techmap -map +/mul2dsp.v -map +/ecp5/dsp_map.v -D DSP_A_MAXWIDTH=18 -D DSP_B_MAXWIDTH=18 -D DSP_A_MINWIDTH=2 -D DSP_B_MINWIDTH=2 -D DSP_NAME=$__MUL18X18", "(unless -nodsp)");
270 run("chtype -set $mul t:$__soft_mul", "(unless -nodsp)");
271 }
272 run("alumacc");
273 run("opt");
274 run("fsm");
275 run("opt -fast");
276 run("memory -nomap");
277 run("opt_clean");
278 }
279
280 if (!nobram && check_label("map_bram", "(skip if -nobram)"))
281 {
282 run("memory_bram -rules +/ecp5/brams.txt");
283 run("techmap -map +/ecp5/brams_map.v");
284 }
285
286 if (!nolutram && check_label("map_lutram", "(skip if -nolutram)"))
287 {
288 run("memory_bram -rules +/ecp5/lutrams.txt");
289 run("techmap -map +/ecp5/lutrams_map.v");
290 }
291
292 if (check_label("map_ffram"))
293 {
294 run("opt -fast -mux_undef -undriven -fine");
295 run("memory_map -iattr -attr !ram_block -attr !rom_block -attr logic_block "
296 "-attr syn_ramstyle=auto -attr syn_ramstyle=registers "
297 "-attr syn_romstyle=auto -attr syn_romstyle=logic");
298 run("opt -undriven -fine");
299 }
300
301 if (check_label("map_gates"))
302 {
303 if (noccu2)
304 run("techmap");
305 else
306 run("techmap -map +/techmap.v -map +/ecp5/arith_map.v");
307 run("opt -fast");
308 if (retime || help_mode)
309 run("abc -dff -D 1", "(only if -retime)");
310 }
311
312 if (check_label("map_ffs"))
313 {
314 run("dff2dffs");
315 run("opt_clean");
316 if (!nodffe)
317 run("dff2dffe -direct-match $_DFF_* -direct-match $__DFFS_*");
318 if ((abc9 && dff) || help_mode)
319 run("zinit -all w:* t:$_DFF_?_ t:$_DFFE_??_ t:$__DFFS*", "(only if -abc9 and -dff");
320 run(stringf("techmap -D NO_LUT %s -map +/ecp5/cells_map.v", help_mode ? "[-D ASYNC_PRLD]" : (asyncprld ? "-D ASYNC_PRLD" : "")));
321 run("opt_expr -undriven -mux_undef");
322 run("simplemap");
323 run("ecp5_ffinit");
324 run("ecp5_gsr");
325 run("attrmvcp -copy -attr syn_useioff");
326 run("opt_clean");
327 }
328
329 if (check_label("map_luts"))
330 {
331 if (abc2 || help_mode)
332 run("abc", " (only if -abc2)");
333 if (!asyncprld || help_mode)
334 run("techmap -map +/ecp5/latches_map.v", "(skip if -asyncprld)");
335
336 if (abc9) {
337 std::string abc9_opts;
338 if (nowidelut)
339 abc9_opts += " -maxlut 4";
340 std::string k = "synth_ecp5.abc9.W";
341 if (active_design && active_design->scratchpad.count(k))
342 abc9_opts += stringf(" -W %s", active_design->scratchpad_get_string(k).c_str());
343 else
344 abc9_opts += stringf(" -W %s", RTLIL::constpad.at(k).c_str());
345 if (nowidelut)
346 abc9_opts += " -maxlut 4";
347 if (dff)
348 abc9_opts += " -dff";
349 run("abc9" + abc9_opts);
350 } else {
351 std::string abc_args = " -dress";
352 if (nowidelut)
353 abc_args += " -lut 4";
354 else
355 abc_args += " -lut 4:7";
356 if (dff)
357 abc_args += " -dff";
358 run("abc" + abc_args);
359 }
360 run("clean");
361 }
362
363 if (check_label("map_cells"))
364 {
365 if (help_mode)
366 run("techmap -map +/ecp5/cells_map.v", "(skip if -vpr)");
367 else if (!vpr)
368 run("techmap -map +/ecp5/cells_map.v");
369 run("opt_lut_ins -tech ecp5");
370 run("clean");
371 }
372
373 if (check_label("check"))
374 {
375 run("autoname");
376 run("hierarchy -check");
377 run("stat");
378 run("check -noinit");
379 }
380
381 if (check_label("blif"))
382 {
383 if (!blif_file.empty() || help_mode) {
384 if (vpr || help_mode) {
385 run(stringf("opt_clean -purge"),
386 " (vpr mode)");
387 run(stringf("write_blif -attr -cname -conn -param %s",
388 help_mode ? "<file-name>" : blif_file.c_str()),
389 " (vpr mode)");
390 }
391 if (!vpr)
392 run(stringf("write_blif -gates -attr -param %s",
393 help_mode ? "<file-name>" : blif_file.c_str()),
394 " (non-vpr mode)");
395 }
396 }
397
398 if (check_label("edif"))
399 {
400 if (!edif_file.empty() || help_mode)
401 run(stringf("write_edif %s", help_mode ? "<file-name>" : edif_file.c_str()));
402 }
403
404 if (check_label("json"))
405 {
406 if (!json_file.empty() || help_mode)
407 run(stringf("write_json %s", help_mode ? "<file-name>" : json_file.c_str()));
408 }
409 }
410 } SynthEcp5Pass;
411
412 PRIVATE_NAMESPACE_END