techlibs/efinix/synth_efinix.cc

   1 /*
   2  *  yosys -- Yosys Open SYnthesis Suite
   3  *
   4  *  Copyright (C) 2019  Miodrag Milanovic <miodrag@symbioticeda.com>
   5  *  Copyright (C) 2019  Clifford Wolf <clifford@clifford.at>
   6  *
   7  *  Permission to use, copy, modify, and/or distribute this software for any
   8  *  purpose with or without fee is hereby granted, provided that the above
   9  *  copyright notice and this permission notice appear in all copies.
  10  *
  11  *  THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  12  *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  13  *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  14  *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  15  *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  16  *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  17  *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  18  *
  19  */
  20
  21 #include "kernel/register.h"
  22 #include "kernel/celltypes.h"
  23 #include "kernel/rtlil.h"
  24 #include "kernel/log.h"
  25
  26 USING_YOSYS_NAMESPACE
  27 PRIVATE_NAMESPACE_BEGIN
  28
  29 struct SynthEfinixPass : public ScriptPass
  30 {
  31         SynthEfinixPass() : ScriptPass("synth_efinix", "synthesis for Efinix FPGAs") { }
  32
  33         void help() YS_OVERRIDE
  34         {
  35                 //   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
  36                 log("\n");
  37                 log("    synth_efinix [options]\n");
  38                 log("\n");
  39                 log("This command runs synthesis for Efinix FPGAs.\n");
  40                 log("\n");
  41                 log("    -top <module>\n");
  42                 log("        use the specified module as top module\n");
  43                 log("\n");
  44                 log("    -edif <file>\n");
  45                 log("        write the design to the specified EDIF file. writing of an output file\n");
  46                 log("        is omitted if this parameter is not specified.\n");
  47                 log("\n");
  48                 log("    -json <file>\n");
  49                 log("        write the design to the specified JSON file. writing of an output file\n");
  50                 log("        is omitted if this parameter is not specified.\n");
  51                 log("\n");
  52                 log("    -run <from_label>:<to_label>\n");
  53                 log("        only run the commands between the labels (see below). an empty\n");
  54                 log("        from label is synonymous to 'begin', and empty to label is\n");
  55                 log("        synonymous to the end of the command list.\n");
  56                 log("\n");
  57                 log("    -noflatten\n");
  58                 log("        do not flatten design before synthesis\n");
  59                 log("\n");
  60                 log("    -retime\n");
  61                 log("        run 'abc' with -dff option\n");
  62                 log("\n");
  63                 log("\n");
  64                 log("The following commands are executed by this synthesis command:\n");
  65                 help_script();
  66                 log("\n");
  67         }
  68
  69         string top_opt, edif_file, json_file;
  70         bool flatten, retime;
  71
  72         void clear_flags() YS_OVERRIDE
  73         {
  74                 top_opt = "-auto-top";
  75                 edif_file = "";
  76                 json_file = "";
  77                 flatten = true;
  78                 retime = false;
  79         }
  80
  81         void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
  82         {
  83                 string run_from, run_to;
  84                 clear_flags();
  85
  86                 size_t argidx;
  87                 for (argidx = 1; argidx < args.size(); argidx++)
  88                 {
  89                         if (args[argidx] == "-top" && argidx+1 < args.size()) {
  90                                 top_opt = "-top " + args[++argidx];
  91                                 continue;
  92                         }
  93                         if (args[argidx] == "-edif" && argidx+1 < args.size()) {
  94                                 edif_file = args[++argidx];
  95                                 continue;
  96                         }
  97                         if (args[argidx] == "-json" && argidx+1 < args.size()) {
  98                                 json_file = args[++argidx];
  99                                 continue;
 100                         }
 101                         if (args[argidx] == "-run" && argidx+1 < args.size()) {
 102                                 size_t pos = args[argidx+1].find(':');
 103                                 if (pos == std::string::npos)
 104                                         break;
 105                                 run_from = args[++argidx].substr(0, pos);
 106                                 run_to = args[argidx].substr(pos+1);
 107                                 continue;
 108                         }
 109                         if (args[argidx] == "-noflatten") {
 110                                 flatten = false;
 111                                 continue;
 112                         }
 113                         if (args[argidx] == "-retime") {
 114                                 retime = true;
 115                                 continue;
 116                         }
 117                         break;
 118                 }
 119                 extra_args(args, argidx, design);
 120
 121                 if (!design->full_selection())
 122                         log_cmd_error("This command only operates on fully selected designs!\n");
 123
 124                 log_header(design, "Executing SYNTH_EFINIX pass.\n");
 125                 log_push();
 126
 127                 run_script(design, run_from, run_to);
 128
 129                 log_pop();
 130         }
 131
 132         void script() YS_OVERRIDE
 133         {
 134                 if (check_label("begin"))
 135                 {
 136                         run("read_verilog -lib +/efinix/cells_sim.v");
 137                         run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
 138                 }
 139
 140                 if (flatten && check_label("flatten", "(unless -noflatten)"))
 141                 {
 142                         run("proc");
 143                         run("flatten");
 144                         run("tribuf -logic");
 145                         run("deminout");
 146                 }
 147
 148                 if (check_label("coarse"))
 149                 {
 150                         run("synth -run coarse");
 151                 }
 152
 153                 if (check_label("map_bram", "(skip if -nobram)"))
 154                 {
 155                         run("memory_bram -rules +/efinix/bram.txt");
 156                         run("techmap -map +/efinix/brams_map.v");
 157                         run("setundef -zero -params t:EFX_RAM_5K");
 158                 }
 159
 160                 if (check_label("fine"))
 161                 {
 162                         run("opt -fast -mux_undef -undriven -fine");
 163                         run("memory_map");
 164                         run("opt -undriven -fine");
 165                         run("techmap -map +/techmap.v -map +/efinix/arith_map.v");
 166                         if (retime || help_mode)
 167                                 run("abc -dff", "(only if -retime)");
 168                 }
 169
 170                 if (check_label("map_ffs"))
 171                 {
 172                         run("dffsr2dff");
 173                         run("techmap -D NO_LUT -map +/efinix/cells_map.v");
 174                         run("dffinit -strinit SET RESET -ff AL_MAP_SEQ q REGSET -noreinit");
 175                         run("opt_expr -mux_undef");
 176                         run("simplemap");
 177                 }
 178
 179                 if (check_label("map_luts"))
 180                 {
 181                         run("abc -lut 4");
 182                         run("clean");
 183                 }
 184
 185                 if (check_label("map_cells"))
 186                 {
 187                         run("techmap -map +/efinix/cells_map.v");
 188                         run("clean");
 189                 }
 190
 191                 if (check_label("map_gbuf"))
 192                 {
 193                         run("efinix_gbuf");
 194                         run("efinix_fixcarry");
 195                         run("clean");
 196                 }
 197
 198                 if (check_label("check"))
 199                 {
 200                         run("hierarchy -check");
 201                         run("stat");
 202                         run("check -noinit");
 203                 }
 204
 205                 if (check_label("edif"))
 206                 {
 207                         if (!edif_file.empty() || help_mode)
 208                                 run(stringf("write_edif %s", help_mode ? "<file-name>" : edif_file.c_str()));
 209                 }
 210
 211                 if (check_label("json"))
 212                 {
 213                         if (!json_file.empty() || help_mode)
 214                                 run(stringf("write_json %s", help_mode ? "<file-name>" : json_file.c_str()));
 215                 }
 216         }
 217 } SynthEfinixPass;
 218
 219 PRIVATE_NAMESPACE_END