techlibs/gowin/brams_map.v

   1 /* Semi Dual Port (SDP) memory have the following configurations:
   2  * Memory Config    RAM(BIT)   Port Mode   Memory Depth   Data Depth
   3  * ----------------|---------| ----------|--------------|------------|
   4  * B-SRAM_16K_SD1      16K      16Kx1       16,384           1
   5  * B-SRAM_8K_SD2       16K       8Kx2        8,192           2
   6  * B-SRAM_4K_SD4       16K       4Kx2        4,096           4
   7  */
   8 module \$__GW1NR_SDP (CLK2, CLK3, A1ADDR, A1DATA, A1EN, B1ADDR, B1DATA, B1EN);
   9         parameter CFG_ABITS = 10;
  10         parameter CFG_DBITS = 16;
  11         parameter CFG_ENABLE_A = 3;
  12
  13         parameter [16383:0] INIT = 16384'hx;
  14         parameter CLKPOL2 = 1;
  15         parameter CLKPOL3 = 1;
  16
  17         input CLK2;
  18         input CLK3;
  19
  20         input [CFG_ABITS-1:0] A1ADDR;
  21         input [CFG_DBITS-1:0] A1DATA;
  22         input [CFG_ENABLE_A-1:0] A1EN;
  23
  24         input [CFG_ABITS-1:0] B1ADDR;
  25         output [CFG_DBITS-1:0] B1DATA;
  26         input B1EN;
  27
  28
  29         generate if (CFG_DBITS == 1) begin
  30                 SDP   #(
  31                         .READ_MODE(0),
  32                         .BIT_WIDTH_0(1),
  33                         .BIT_WIDTH_1(1),
  34                         .BLK_SEL(3'b000),
  35                         .RESET_MODE("SYNC")
  36                 ) _TECHMAP_REPLACE_ (
  37                         .CLKA(CLK2),   .CLKB(CLK3),
  38                         .WREA(A1EN),   .OCE(1'b0), .CEA(1'b1),
  39                         .WREB(1'b0),   .CEB(B1EN),
  40                         .RESETA(1'b0), .RESETB(1'b0), .BLKSEL(3'b000),
  41                         .DI(A1DATA), .DO(B1DATA), .ADA(A1ADDR), .ADB(B1ADDR)
  42                 );
  43         end else if (CFG_DBITS == 2) begin
  44                 SDP    #(
  45                         .READ_MODE(0),
  46                         .BIT_WIDTH_0(2),
  47                         .BIT_WIDTH_1(2),
  48                         .BLK_SEL(3'b000),
  49                         .RESET_MODE("SYNC")
  50                 ) _TECHMAP_REPLACE_ (
  51                         .CLKA(CLK2),   .CLKB(CLK3),
  52                         .WREA(A1EN),   .OCE(1'b0), .CEA(1'b1),
  53                         .WREB(1'b0),   .CEB(B1EN),
  54                         .RESETA(1'b0), .RESETB(1'b0), .BLKSEL(3'b000),
  55                         .DI(A1DATA), .DO(B1DATA), .ADA(A1ADDR), .ADB(B1ADDR)
  56                 );
  57         end else if (CFG_DBITS <= 4) begin
  58                 SDP    #(
  59                         .READ_MODE(0),
  60                         .BIT_WIDTH_0(4),
  61                         .BIT_WIDTH_1(4),
  62                         .BLK_SEL(3'b000),
  63                         .RESET_MODE("SYNC")
  64                 ) _TECHMAP_REPLACE_ (
  65                         .CLKA(CLK2),   .CLKB(CLK3),
  66                         .WREA(A1EN),   .OCE(1'b0),
  67                         .WREB(1'b0),   .CEB(B1EN), .CEA(1'b1),
  68                         .RESETA(1'b0), .RESETB(1'b0), .BLKSEL(3'b000),
  69                         .DI(A1DATA), .DO(B1DATA), .ADA(A1ADDR), .ADB(B1ADDR)
  70                 );
  71         end else if (CFG_DBITS <= 8) begin
  72                 SDP    #(
  73                         .READ_MODE(0),
  74                         .BIT_WIDTH_0(8),
  75                         .BIT_WIDTH_1(8),
  76                         .BLK_SEL(3'b000),
  77                         .RESET_MODE("SYNC")
  78                 ) _TECHMAP_REPLACE_ (
  79                         .CLKA(CLK2),   .CLKB(CLK3),
  80                         .WREA(A1EN),   .OCE(1'b0), .CEA(1'b1),
  81                         .WREB(1'b0),   .CEB(B1EN),
  82                         .RESETA(1'b0), .RESETB(1'b0), .BLKSEL(3'b000),
  83                         .DI(A1DATA), .DO(B1DATA), .ADA(A1ADDR), .ADB(B1ADDR)
  84                 );
  85         end else if (CFG_DBITS <= 16) begin
  86                 SDP    #(
  87                         .READ_MODE(0),
  88                         .BIT_WIDTH_0(16),
  89                         .BIT_WIDTH_1(16),
  90                         .BLK_SEL(3'b000),
  91                         .RESET_MODE("SYNC")
  92                 ) _TECHMAP_REPLACE_ (
  93                         .CLKA(CLK2),   .CLKB(CLK3),
  94                         .WREA(A1EN),   .OCE(1'b0),
  95                         .WREB(1'b0),   .CEB(B1EN), .CEA(1'b1),
  96                         .RESETA(1'b0), .RESETB(1'b0), .BLKSEL(3'b000),
  97                         .DI(A1DATA), .DO(B1DATA), .ADA(A1ADDR), .ADB(B1ADDR)
  98                 );
  99         end else begin
 100                 wire TECHMAP_FAIL = 1'b1;
 101         end endgenerate
 102
 103 endmodule