techlibs/gowin/determine_init.cc

   1 /*
   2  *  yosys -- Yosys Open SYnthesis Suite
   3  *
   4  *  Copyright (C) 2018 Icenowy Zheng <icenowy@aosc.io>
   5  *
   6  *  Permission to use, copy, modify, and/or distribute this software for any
   7  *  purpose with or without fee is hereby granted, provided that the above
   8  *  copyright notice and this permission notice appear in all copies.
   9  *
  10  *  THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11  *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12  *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13  *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14  *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15  *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16  *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17  *
  18  */
  19
  20 #include "kernel/yosys.h"
  21 #include "kernel/sigtools.h"
  22
  23 USING_YOSYS_NAMESPACE
  24 PRIVATE_NAMESPACE_BEGIN
  25
  26 struct DetermineInitPass : public Pass {
  27         DetermineInitPass() : Pass("determine_init", "Determine the init value of cells") { }
  28         void help() YS_OVERRIDE
  29         {
  30                 log("\n");
  31                 log("    determine_init [selection]\n");
  32                 log("\n");
  33                 log("Determine the init value of cells that doesn't allow unknown init value.\n");
  34                 log("\n");
  35         }
  36
  37         Const determine_init(Const init)
  38         {
  39                 for (int i = 0; i < GetSize(init); i++) {
  40                         if (init[i] != State::S0 && init[i] != State::S1)
  41                                 init[i] = State::S0;
  42                 }
  43
  44                 return init;
  45         }
  46
  47         void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
  48         {
  49                 log_header(design, "Executing DETERMINE_INIT pass (determine init value for cells).\n");
  50
  51                 extra_args(args, args.size(), design);
  52
  53                 int cnt = 0;
  54                 for (auto module : design->selected_modules())
  55                 {
  56                         for (auto cell : module->selected_cells())
  57                         {
  58                                 if (cell->type == "\\RAM16S4")
  59                                 {
  60                                         cell->setParam("\\INIT_0", determine_init(cell->getParam("\\INIT_0")));
  61                                         cell->setParam("\\INIT_1", determine_init(cell->getParam("\\INIT_1")));
  62                                         cell->setParam("\\INIT_2", determine_init(cell->getParam("\\INIT_2")));
  63                                         cell->setParam("\\INIT_3", determine_init(cell->getParam("\\INIT_3")));
  64                                         cnt++;
  65                                 }
  66                         }
  67                 }
  68                 log_header(design, "Updated %d cells with determined init value.\n", cnt);
  69         }
  70 } DetermineInitPass;
  71
  72 PRIVATE_NAMESPACE_END