techlibs/greenpak4/cells_blackbox.v

   1 module \$__COUNT_ (CE, CLK, OUT, POUT, RST, UP);
   2
   3         input wire CE;
   4         input wire CLK;
   5         output reg OUT;
   6         output reg[WIDTH-1:0] POUT;
   7         input wire RST;
   8         input wire UP;
   9
  10         parameter COUNT_TO = 1;
  11         parameter RESET_MODE = "RISING";
  12         parameter RESET_TO_MAX = "1";
  13         parameter HAS_POUT = 0;
  14         parameter HAS_CE = 0;
  15         parameter WIDTH = 8;
  16         parameter DIRECTION = "DOWN";
  17
  18 endmodule