Try new LUT delays
[yosys.git] / techlibs / greenpak4 / cells_map.v
1 module GP_DFFS(input D, CLK, nSET, output reg Q);
2 parameter [0:0] INIT = 1'bx;
3 GP_DFFSR #(
4 .INIT(INIT),
5 .SRMODE(1'b1),
6 ) _TECHMAP_REPLACE_ (
7 .D(D),
8 .CLK(CLK),
9 .nSR(nSET),
10 .Q(Q)
11 );
12 endmodule
13
14 module GP_DFFR(input D, CLK, nRST, output reg Q);
15 parameter [0:0] INIT = 1'bx;
16 GP_DFFSR #(
17 .INIT(INIT),
18 .SRMODE(1'b0),
19 ) _TECHMAP_REPLACE_ (
20 .D(D),
21 .CLK(CLK),
22 .nSR(nRST),
23 .Q(Q)
24 );
25 endmodule
26
27 module GP_DFFSI(input D, CLK, nSET, output reg nQ);
28 parameter [0:0] INIT = 1'bx;
29 GP_DFFSRI #(
30 .INIT(INIT),
31 .SRMODE(1'b1),
32 ) _TECHMAP_REPLACE_ (
33 .D(D),
34 .CLK(CLK),
35 .nSR(nSET),
36 .nQ(nQ)
37 );
38 endmodule
39
40 module GP_DFFRI(input D, CLK, nRST, output reg nQ);
41 parameter [0:0] INIT = 1'bx;
42 GP_DFFSRI #(
43 .INIT(INIT),
44 .SRMODE(1'b0),
45 ) _TECHMAP_REPLACE_ (
46 .D(D),
47 .CLK(CLK),
48 .nSR(nRST),
49 .nQ(nQ)
50 );
51 endmodule
52
53 module GP_DLATCHS(input D, nCLK, nSET, output reg Q);
54 parameter [0:0] INIT = 1'bx;
55 GP_DLATCHSR #(
56 .INIT(INIT),
57 .SRMODE(1'b1),
58 ) _TECHMAP_REPLACE_ (
59 .D(D),
60 .nCLK(nCLK),
61 .nSR(nSET),
62 .Q(Q)
63 );
64 endmodule
65
66 module GP_DLATCHR(input D, nCLK, nRST, output reg Q);
67 parameter [0:0] INIT = 1'bx;
68 GP_DLATCHSR #(
69 .INIT(INIT),
70 .SRMODE(1'b0),
71 ) _TECHMAP_REPLACE_ (
72 .D(D),
73 .nCLK(nCLK),
74 .nSR(nRST),
75 .Q(Q)
76 );
77 endmodule
78
79 module GP_DLATCHSI(input D, nCLK, nSET, output reg nQ);
80 parameter [0:0] INIT = 1'bx;
81 GP_DLATCHSRI #(
82 .INIT(INIT),
83 .SRMODE(1'b1),
84 ) _TECHMAP_REPLACE_ (
85 .D(D),
86 .nCLK(nCLK),
87 .nSR(nSET),
88 .nQ(nQ)
89 );
90 endmodule
91
92 module GP_DLATCHRI(input D, nCLK, nRST, output reg nQ);
93 parameter [0:0] INIT = 1'bx;
94 GP_DLATCHSRI #(
95 .INIT(INIT),
96 .SRMODE(1'b0),
97 ) _TECHMAP_REPLACE_ (
98 .D(D),
99 .nCLK(nCLK),
100 .nSR(nRST),
101 .nQ(nQ)
102 );
103 endmodule
104
105 module GP_OBUFT(input IN, input OE, output OUT);
106 GP_IOBUF _TECHMAP_REPLACE_ (
107 .IN(IN),
108 .OE(OE),
109 .IO(OUT),
110 .OUT()
111 );
112 endmodule
113
114 module \$lut (A, Y);
115 parameter WIDTH = 0;
116 parameter LUT = 0;
117
118 input [WIDTH-1:0] A;
119 output Y;
120
121 generate
122 if (WIDTH == 1) begin
123 if(LUT == 2'b01) begin
124 GP_INV _TECHMAP_REPLACE_ (.OUT(Y), .IN(A[0]) );
125 end
126 else begin
127 GP_2LUT #(.INIT({2'b00, LUT})) _TECHMAP_REPLACE_ (.OUT(Y),
128 .IN0(A[0]), .IN1(1'b0));
129 end
130 end else
131 if (WIDTH == 2) begin
132 GP_2LUT #(.INIT(LUT)) _TECHMAP_REPLACE_ (.OUT(Y),
133 .IN0(A[0]), .IN1(A[1]));
134 end else
135 if (WIDTH == 3) begin
136 GP_3LUT #(.INIT(LUT)) _TECHMAP_REPLACE_ (.OUT(Y),
137 .IN0(A[0]), .IN1(A[1]), .IN2(A[2]));
138 end else
139 if (WIDTH == 4) begin
140 GP_4LUT #(.INIT(LUT)) _TECHMAP_REPLACE_ (.OUT(Y),
141 .IN0(A[0]), .IN1(A[1]), .IN2(A[2]), .IN3(A[3]));
142 end else begin
143 wire _TECHMAP_FAIL_ = 1;
144 end
145 endgenerate
146 endmodule
147
148 module \$__COUNT_ (CE, CLK, OUT, POUT, RST, UP);
149
150 input wire CE;
151 input wire CLK;
152 output reg OUT;
153 output reg[WIDTH-1:0] POUT;
154 input wire RST;
155 input wire UP;
156
157 parameter COUNT_TO = 1;
158 parameter RESET_MODE = "RISING";
159 parameter RESET_TO_MAX = 0;
160 parameter HAS_POUT = 0;
161 parameter HAS_CE = 0;
162 parameter WIDTH = 8;
163 parameter DIRECTION = "DOWN";
164
165 //If we have a DIRECTION other than DOWN fail... GP_COUNTx_ADV is not supported yet
166 if(DIRECTION != "DOWN") begin
167 initial begin
168 $display("ERROR: \$__COUNT_ support for GP_COUNTx_ADV is not yet implemented. This counter should never have been extracted (bug in extract_counter pass?).");
169 $finish;
170 end
171 end
172
173 //If counter is more than 14 bits wide, complain (also shouldn't happen)
174 else if(WIDTH > 14) begin
175 initial begin
176 $display("ERROR: \$__COUNT_ support for cascaded counters is not yet implemented. This counter should never have been extracted (bug in extract_counter pass?).");
177 $finish;
178 end
179 end
180
181 //If counter is more than 8 bits wide and has parallel output, we have a problem
182 else if(WIDTH > 8 && HAS_POUT) begin
183 initial begin
184 $display("ERROR: \$__COUNT_ support for 9-14 bit counters with parallel output is not yet implemented. This counter should never have been extracted (bug in extract_counter pass?).");
185 $finish;
186 end
187 end
188
189 //Looks like a legal counter! Do something with it
190 else if(WIDTH <= 8) begin
191 if(HAS_CE) begin
192 wire ce_not;
193 GP_INV ceinv(
194 .IN(CE),
195 .OUT(ce_not)
196 );
197 GP_COUNT8_ADV #(
198 .COUNT_TO(COUNT_TO),
199 .RESET_MODE(RESET_MODE),
200 .RESET_VALUE(RESET_TO_MAX ? "COUNT_TO" : "ZERO"),
201 .CLKIN_DIVIDE(1)
202 ) _TECHMAP_REPLACE_ (
203 .CLK(CLK),
204 .RST(RST),
205 .OUT(OUT),
206 .UP(1'b0), //always count down for now
207 .KEEP(ce_not),
208 .POUT(POUT)
209 );
210 end
211 else begin
212 GP_COUNT8 #(
213 .COUNT_TO(COUNT_TO),
214 .RESET_MODE(RESET_MODE),
215 .CLKIN_DIVIDE(1)
216 ) _TECHMAP_REPLACE_ (
217 .CLK(CLK),
218 .RST(RST),
219 .OUT(OUT),
220 .POUT(POUT)
221 );
222 end
223 end
224
225 else begin
226 if(HAS_CE) begin
227 wire ce_not;
228 GP_INV ceinv(
229 .IN(CE),
230 .OUT(ce_not)
231 );
232 GP_COUNT14_ADV #(
233 .COUNT_TO(COUNT_TO),
234 .RESET_MODE(RESET_TO_MAX ? "COUNT_TO" : "ZERO"),
235 .RESET_VALUE("COUNT_TO"),
236 .CLKIN_DIVIDE(1)
237 ) _TECHMAP_REPLACE_ (
238 .CLK(CLK),
239 .RST(RST),
240 .OUT(OUT),
241 .UP(1'b0), //always count down for now
242 .KEEP(ce_not),
243 .POUT(POUT)
244 );
245 end
246 else begin
247 GP_COUNT14 #(
248 .COUNT_TO(COUNT_TO),
249 .RESET_MODE(RESET_MODE),
250 .CLKIN_DIVIDE(1)
251 ) _TECHMAP_REPLACE_ (
252 .CLK(CLK),
253 .RST(RST),
254 .OUT(OUT)
255 );
256 end
257 end
258
259 endmodule