Add (* abc_flop_q *) to brams_bb.v
[yosys.git] / techlibs / greenpak4 / cells_sim.v
1 `timescale 1ns/1ps
2
3 `include "cells_sim_ams.v"
4 `include "cells_sim_digital.v"
5 `include "cells_sim_wip.v"