1 module GP_DFF(input D, CLK, output reg Q);
2 parameter [0:0] INIT = 1'bx;
4 always @(posedge CLK) begin
9 module GP_DFFS(input D, CLK, nSET, output reg Q);
10 parameter [0:0] INIT = 1'bx;
12 always @(posedge CLK, negedge nSET) begin
20 module GP_DFFR(input D, CLK, nRST, output reg Q);
21 parameter [0:0] INIT = 1'bx;
23 always @(posedge CLK, negedge nRST) begin
31 module GP_DFFSR(input D, CLK, nSR, output reg Q);
32 parameter [0:0] INIT = 1'bx;
33 parameter [0:0] SRMODE = 1'bx;
35 always @(posedge CLK, negedge nSR) begin
43 module GP_2LUT(input IN0, IN1, output OUT);
44 parameter [3:0] INIT = 0;
45 assign OUT = INIT[{IN1, IN0}];
48 module GP_3LUT(input IN0, IN1, IN2, output OUT);
49 parameter [7:0] INIT = 0;
50 assign OUT = INIT[{IN2, IN1, IN0}];
53 module GP_4LUT(input IN0, IN1, IN2, IN3, output OUT);
54 parameter [15:0] INIT = 0;
55 assign OUT = INIT[{IN3, IN2, IN1, IN0}];
58 module GP_VDD(output OUT);
62 module GP_VSS(output OUT);
66 module GP_LFOSC(input PWRDN, output reg CLKOUT);
68 parameter PWRDN_EN = 0;
69 parameter AUTO_PWRDN = 0;
70 parameter OUT_DIV = 1;
78 //half period of 1730 Hz