Another bugfix for ice40 and xilinx brams_init make rules
[yosys.git] / techlibs / ice40 / brams_init.py
1 #!/usr/bin/python
2
3 from __future__ import division
4 from __future__ import print_function
5
6 def write_init_vh(filename, initbits):
7 with open(filename, "w") as f:
8 for i in range(16):
9 print("localparam [255:0] INIT_%X = {" % i, file=f)
10 for k in range(32):
11 print(" %s%s" % (", ".join(["INIT[%4d]" % initbits[i*256 + 255 - k*8 - l] for l in range(8)]), "," if k != 31 else ""), file=f)
12 print("};", file=f);
13
14 write_init_vh("techlibs/ice40/brams_init1.vh", [i//2 + 2048*(i%2) for i in range(4096)])
15 write_init_vh("techlibs/ice40/brams_init2.vh", [i//4 + 1024*(i%4) for i in range(4096)])
16 write_init_vh("techlibs/ice40/brams_init3.vh", [i//8 + 512*(i%8) for i in range(4096)])
17