techlibs/ice40/synth_ice40.cc

   1 /*
   2  *  yosys -- Yosys Open SYnthesis Suite
   3  *
   4  *  Copyright (C) 2012  Clifford Wolf <clifford@clifford.at>
   5  *
   6  *  Permission to use, copy, modify, and/or distribute this software for any
   7  *  purpose with or without fee is hereby granted, provided that the above
   8  *  copyright notice and this permission notice appear in all copies.
   9  *
  10  *  THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11  *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12  *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13  *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14  *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15  *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16  *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17  *
  18  */
  19
  20 #include "kernel/register.h"
  21 #include "kernel/celltypes.h"
  22 #include "kernel/rtlil.h"
  23 #include "kernel/log.h"
  24
  25 USING_YOSYS_NAMESPACE
  26 PRIVATE_NAMESPACE_BEGIN
  27
  28 struct SynthIce40Pass : public ScriptPass
  29 {
  30         SynthIce40Pass() : ScriptPass("synth_ice40", "synthesis for iCE40 FPGAs") { }
  31
  32         void help() YS_OVERRIDE
  33         {
  34                 //   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
  35                 log("\n");
  36                 log("    synth_ice40 [options]\n");
  37                 log("\n");
  38                 log("This command runs synthesis for iCE40 FPGAs.\n");
  39                 log("\n");
  40                 log("    -top <module>\n");
  41                 log("        use the specified module as top module\n");
  42                 log("\n");
  43                 log("    -blif <file>\n");
  44                 log("        write the design to the specified BLIF file. writing of an output file\n");
  45                 log("        is omitted if this parameter is not specified.\n");
  46                 log("\n");
  47                 log("    -edif <file>\n");
  48                 log("        write the design to the specified EDIF file. writing of an output file\n");
  49                 log("        is omitted if this parameter is not specified.\n");
  50                 log("\n");
  51                 log("    -json <file>\n");
  52                 log("        write the design to the specified JSON file. writing of an output file\n");
  53                 log("        is omitted if this parameter is not specified.\n");
  54                 log("\n");
  55                 log("    -run <from_label>:<to_label>\n");
  56                 log("        only run the commands between the labels (see below). an empty\n");
  57                 log("        from label is synonymous to 'begin', and empty to label is\n");
  58                 log("        synonymous to the end of the command list.\n");
  59                 log("\n");
  60                 log("    -noflatten\n");
  61                 log("        do not flatten design before synthesis\n");
  62                 log("\n");
  63                 log("    -retime\n");
  64                 log("        run 'abc' with -dff option\n");
  65                 log("\n");
  66                 log("    -relut\n");
  67                 log("        combine LUTs after synthesis\n");
  68                 log("\n");
  69                 log("    -nocarry\n");
  70                 log("        do not use SB_CARRY cells in output netlist\n");
  71                 log("\n");
  72                 log("    -nodffe\n");
  73                 log("        do not use SB_DFFE* cells in output netlist\n");
  74                 log("\n");
  75                 log("    -dffe_min_ce_use <min_ce_use>\n");
  76                 log("        do not use SB_DFFE* cells if the resulting CE line would go to less\n");
  77                 log("        than min_ce_use SB_DFFE*in output netlist\n");
  78                 log("\n");
  79                 log("    -nobram\n");
  80                 log("        do not use SB_RAM40_4K* cells in output netlist\n");
  81                 log("\n");
  82                 log("    -dsp\n");
  83                 log("        use iCE40 UltraPlus DSP cells for large arithmetic\n");
  84                 log("\n");
  85                 log("    -noabc\n");
  86                 log("        use built-in Yosys LUT techmapping instead of abc\n");
  87                 log("\n");
  88                 log("    -abc2\n");
  89                 log("        run two passes of 'abc' for slightly improved logic density\n");
  90                 log("\n");
  91                 log("    -vpr\n");
  92                 log("        generate an output netlist (and BLIF file) suitable for VPR\n");
  93                 log("        (this feature is experimental and incomplete)\n");
  94                 log("\n");
  95                 log("\n");
  96                 log("The following commands are executed by this synthesis command:\n");
  97                 help_script();
  98                 log("\n");
  99         }
 100
 101         string top_opt, blif_file, edif_file, json_file;
 102         bool nocarry, nodffe, nobram, dsp, flatten, retime, relut, noabc, abc2, vpr;
 103         int min_ce_use;
 104
 105         void clear_flags() YS_OVERRIDE
 106         {
 107                 top_opt = "-auto-top";
 108                 blif_file = "";
 109                 edif_file = "";
 110                 json_file = "";
 111                 nocarry = false;
 112                 nodffe = false;
 113                 min_ce_use = -1;
 114                 nobram = false;
 115                 dsp = false;
 116                 flatten = true;
 117                 retime = false;
 118                 relut = false;
 119                 noabc = false;
 120                 abc2 = false;
 121                 vpr = false;
 122         }
 123
 124         void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
 125         {
 126                 string run_from, run_to;
 127                 clear_flags();
 128
 129                 size_t argidx;
 130                 for (argidx = 1; argidx < args.size(); argidx++)
 131                 {
 132                         if (args[argidx] == "-top" && argidx+1 < args.size()) {
 133                                 top_opt = "-top " + args[++argidx];
 134                                 continue;
 135                         }
 136                         if (args[argidx] == "-blif" && argidx+1 < args.size()) {
 137                                 blif_file = args[++argidx];
 138                                 continue;
 139                         }
 140                         if (args[argidx] == "-edif" && argidx+1 < args.size()) {
 141                                 edif_file = args[++argidx];
 142                                 continue;
 143                         }
 144                         if (args[argidx] == "-json" && argidx+1 < args.size()) {
 145                                 json_file = args[++argidx];
 146                                 continue;
 147                         }
 148                         if (args[argidx] == "-run" && argidx+1 < args.size()) {
 149                                 size_t pos = args[argidx+1].find(':');
 150                                 if (pos == std::string::npos)
 151                                         break;
 152                                 run_from = args[++argidx].substr(0, pos);
 153                                 run_to = args[argidx].substr(pos+1);
 154                                 continue;
 155                         }
 156                         if (args[argidx] == "-flatten") {
 157                                 flatten = true;
 158                                 continue;
 159                         }
 160                         if (args[argidx] == "-noflatten") {
 161                                 flatten = false;
 162                                 continue;
 163                         }
 164                         if (args[argidx] == "-retime") {
 165                                 retime = true;
 166                                 continue;
 167                         }
 168                         if (args[argidx] == "-relut") {
 169                                 relut = true;
 170                                 continue;
 171                         }
 172                         if (args[argidx] == "-nocarry") {
 173                                 nocarry = true;
 174                                 continue;
 175                         }
 176                         if (args[argidx] == "-nodffe") {
 177                                 nodffe = true;
 178                                 continue;
 179                         }
 180                         if (args[argidx] == "-dffe_min_ce_use" && argidx+1 < args.size()) {
 181                                 min_ce_use = std::stoi(args[++argidx]);
 182                                 continue;
 183                         }
 184                         if (args[argidx] == "-nobram") {
 185                                 nobram = true;
 186                                 continue;
 187                         }
 188                         if (args[argidx] == "-dsp") {
 189                                 dsp = true;
 190                                 continue;
 191                         }
 192                         if (args[argidx] == "-noabc") {
 193                                 noabc = true;
 194                                 continue;
 195                         }
 196                         if (args[argidx] == "-abc2") {
 197                                 abc2 = true;
 198                                 continue;
 199                         }
 200                         if (args[argidx] == "-vpr") {
 201                                 vpr = true;
 202                                 continue;
 203                         }
 204                         break;
 205                 }
 206                 extra_args(args, argidx, design);
 207
 208                 if (!design->full_selection())
 209                         log_cmd_error("This command only operates on fully selected designs!\n");
 210
 211                 log_header(design, "Executing SYNTH_ICE40 pass.\n");
 212                 log_push();
 213
 214                 run_script(design, run_from, run_to);
 215
 216                 log_pop();
 217         }
 218
 219         void script() YS_OVERRIDE
 220         {
 221                 if (check_label("begin"))
 222                 {
 223                         run("read_verilog -lib +/ice40/cells_sim.v");
 224                         run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
 225                         run("proc");
 226                 }
 227
 228                 if (flatten && check_label("flatten", "(unless -noflatten)"))
 229                 {
 230                         run("flatten");
 231                         run("tribuf -logic");
 232                         run("deminout");
 233                 }
 234
 235                 if (check_label("coarse"))
 236                 {
 237                         run("opt_expr");
 238                         run("opt_clean");
 239                         run("check");
 240                         run("opt");
 241                         run("wreduce");
 242                         run("share");
 243                         run("techmap -map +/cmp2lut.v -D LUT_WIDTH=4");
 244                         run("opt_expr");
 245                         run("opt_clean");
 246                         if (help_mode || dsp)
 247                                 run("ice40_dsp", "(if -dsp)");
 248                         run("alumacc");
 249                         run("opt");
 250                         run("fsm");
 251                         run("opt -fast");
 252                         run("memory -nomap");
 253                         run("opt_clean");
 254                 }
 255
 256                 if (!nobram && check_label("bram", "(skip if -nobram)"))
 257                 {
 258                         run("memory_bram -rules +/ice40/brams.txt");
 259                         run("techmap -map +/ice40/brams_map.v");
 260                 }
 261
 262                 if (check_label("map"))
 263                 {
 264                         run("opt -fast -mux_undef -undriven -fine");
 265                         run("memory_map");
 266                         run("opt -undriven -fine");
 267                 }
 268
 269                 if (check_label("map_gates"))
 270                 {
 271                         if (nocarry)
 272                                 run("techmap");
 273                         else
 274                                 run("techmap -map +/techmap.v -map +/ice40/arith_map.v");
 275                         if (retime || help_mode)
 276                                 run("abc -dff", "(only if -retime)");
 277                         run("ice40_opt");
 278                 }
 279
 280                 if (check_label("map_ffs"))
 281                 {
 282                         run("dffsr2dff");
 283                         if (!nodffe)
 284                                 run("dff2dffe -direct-match $_DFF_*");
 285                         if (min_ce_use >= 0) {
 286                                 run("opt_merge");
 287                                 run(stringf("dff2dffe -unmap-mince %d", min_ce_use));
 288                         }
 289                         run("techmap -D NO_LUT -map +/ice40/cells_map.v");
 290                         run("opt_expr -mux_undef");
 291                         run("simplemap");
 292                         run("ice40_ffinit");
 293                         run("ice40_ffssr");
 294                         run("ice40_opt -full");
 295                 }
 296
 297                 if (check_label("map_luts"))
 298                 {
 299                         if (abc2 || help_mode) {
 300                                 run("abc", "      (only if -abc2)");
 301                                 run("ice40_opt", "(only if -abc2)");
 302                         }
 303                         run("techmap -map +/ice40/latches_map.v");
 304                         if (noabc || help_mode) {
 305                                 run("simplemap", "                               (only if -noabc)");
 306                                 run("techmap -map +/gate2lut.v -D LUT_WIDTH=4", "(only if -noabc)");
 307                         }
 308                         if (!noabc) {
 309                                 run("abc -dress -lut 4", "(skip if -noabc)");
 310                         }
 311                         run("clean");
 312                         if (relut || help_mode) {
 313                                 run("ice40_unlut", "                            (only if -relut)");
 314                                 run("opt_lut -dlogic SB_CARRY:I0=1:I1=2:CI=3", "(only if -relut)");
 315                         }
 316                 }
 317
 318                 if (check_label("map_cells"))
 319                 {
 320                         if (vpr)
 321                                 run("techmap -D NO_LUT -map +/ice40/cells_map.v");
 322                         else
 323                                 run("techmap -map +/ice40/cells_map.v", "(with -D NO_LUT in vpr mode)");
 324
 325                         run("clean");
 326                 }
 327
 328                 if (check_label("check"))
 329                 {
 330                         run("hierarchy -check");
 331                         run("stat");
 332                         run("check -noinit");
 333                 }
 334
 335                 if (check_label("blif"))
 336                 {
 337                         if (!blif_file.empty() || help_mode) {
 338                                 if (vpr || help_mode) {
 339                                         run(stringf("opt_clean -purge"),
 340                                                         "                                 (vpr mode)");
 341                                         run(stringf("write_blif -attr -cname -conn -param %s",
 342                                                         help_mode ? "<file-name>" : blif_file.c_str()),
 343                                                         " (vpr mode)");
 344                                 }
 345                                 if (!vpr)
 346                                         run(stringf("write_blif -gates -attr -param %s",
 347                                                         help_mode ? "<file-name>" : blif_file.c_str()),
 348                                                         "       (non-vpr mode)");
 349                         }
 350                 }
 351
 352                 if (check_label("edif"))
 353                 {
 354                         if (!edif_file.empty() || help_mode)
 355                                 run(stringf("write_edif %s", help_mode ? "<file-name>" : edif_file.c_str()));
 356                 }
 357
 358                 if (check_label("json"))
 359                 {
 360                         if (!json_file.empty() || help_mode)
 361                                 run(stringf("write_json %s", help_mode ? "<file-name>" : json_file.c_str()));
 362                 }
 363         }
 364 } SynthIce40Pass;
 365
 366 PRIVATE_NAMESPACE_END