Merge pull request #455 from daveshah1/up5k
[yosys.git] / techlibs / intel / Makefile.inc
1
2 OBJS += techlibs/intel/synth_intel.o
3
4 $(eval $(call add_share_file,share/intel/common,techlibs/intel/common/m9k_bb.v))
5 $(eval $(call add_share_file,share/intel/common,techlibs/intel/common/altpll_bb.v))
6 $(eval $(call add_share_file,share/intel/common,techlibs/intel/common/brams.txt))
7 $(eval $(call add_share_file,share/intel/common,techlibs/intel/common/brams_map.v))
8 $(eval $(call add_share_file,share/intel/max10,techlibs/intel/max10/cells_sim.v))
9 $(eval $(call add_share_file,share/intel/a10gx,techlibs/intel/a10gx/cells_sim.v))
10 $(eval $(call add_share_file,share/intel/cyclonev,techlibs/intel/cyclonev/cells_sim.v))
11 $(eval $(call add_share_file,share/intel/cyclone10,techlibs/intel/cyclone10/cells_sim.v))
12 $(eval $(call add_share_file,share/intel/cycloneiv,techlibs/intel/cycloneiv/cells_sim.v))
13 $(eval $(call add_share_file,share/intel/cycloneive,techlibs/intel/cycloneive/cells_sim.v))
14 $(eval $(call add_share_file,share/intel/max10,techlibs/intel/max10/cells_map.v))
15 $(eval $(call add_share_file,share/intel/a10gx,techlibs/intel/a10gx/cells_map.v))
16 $(eval $(call add_share_file,share/intel/cyclonev,techlibs/intel/cyclonev/cells_map.v))
17 $(eval $(call add_share_file,share/intel/cyclone10,techlibs/intel/cyclone10/cells_map.v))
18 $(eval $(call add_share_file,share/intel/cycloneiv,techlibs/intel/cycloneiv/cells_map.v))
19 $(eval $(call add_share_file,share/intel/cycloneive,techlibs/intel/cycloneive/cells_map.v))
20 #$(eval $(call add_share_file,share/intel/max10,techlibs/intel/max10/arith_map.v))
21 #$(eval $(call add_share_file,share/intel/a10gx,techlibs/intel/a10gx/arith_map.v))
22 #$(eval $(call add_share_file,share/intel/cycloneiv,techlibs/intel/cycloneiv/arith_map.v))
23 #$(eval $(call add_share_file,share/intel/cycloneive,techlibs/intel/cycloneive/arith_map.v))
24