techlibs/nexus/latches_map.v

   1 module \$_DLATCH_N_ (E, D, Q);
   2   wire [1023:0] _TECHMAP_DO_ = "simplemap; opt";
   3   input E, D;
   4   output Q = !E ? D : Q;
   5 endmodule
   6
   7 module \$_DLATCH_P_ (E, D, Q);
   8   wire [1023:0] _TECHMAP_DO_ = "simplemap; opt";
   9   input E, D;
  10   output Q = E ? D : Q;
  11 endmodule