techlibs/sf2/synth_sf2.cc

   1 /*
   2  *  yosys -- Yosys Open SYnthesis Suite
   3  *
   4  *  Copyright (C) 2012  Clifford Wolf <clifford@clifford.at>
   5  *
   6  *  Permission to use, copy, modify, and/or distribute this software for any
   7  *  purpose with or without fee is hereby granted, provided that the above
   8  *  copyright notice and this permission notice appear in all copies.
   9  *
  10  *  THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11  *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12  *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13  *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14  *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15  *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16  *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17  *
  18  */
  19
  20 #include "kernel/register.h"
  21 #include "kernel/celltypes.h"
  22 #include "kernel/rtlil.h"
  23 #include "kernel/log.h"
  24
  25 USING_YOSYS_NAMESPACE
  26 PRIVATE_NAMESPACE_BEGIN
  27
  28 struct SynthSf2Pass : public ScriptPass
  29 {
  30         SynthSf2Pass() : ScriptPass("synth_sf2", "synthesis for SmartFusion2 and IGLOO2 FPGAs") { }
  31
  32         void help() YS_OVERRIDE
  33         {
  34                 //   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
  35                 log("\n");
  36                 log("    synth_sf2 [options]\n");
  37                 log("\n");
  38                 log("This command runs synthesis for SmartFusion2 and IGLOO2 FPGAs.\n");
  39                 log("\n");
  40                 log("    -top <module>\n");
  41                 log("        use the specified module as top module\n");
  42                 log("\n");
  43                 log("    -edif <file>\n");
  44                 log("        write the design to the specified EDIF file. writing of an output file\n");
  45                 log("        is omitted if this parameter is not specified.\n");
  46                 log("\n");
  47                 log("    -vlog <file>\n");
  48                 log("        write the design to the specified Verilog file. writing of an output file\n");
  49                 log("        is omitted if this parameter is not specified.\n");
  50                 log("\n");
  51                 log("    -json <file>\n");
  52                 log("        write the design to the specified JSON file. writing of an output file\n");
  53                 log("        is omitted if this parameter is not specified.\n");
  54                 log("\n");
  55                 log("    -run <from_label>:<to_label>\n");
  56                 log("        only run the commands between the labels (see below). an empty\n");
  57                 log("        from label is synonymous to 'begin', and empty to label is\n");
  58                 log("        synonymous to the end of the command list.\n");
  59                 log("\n");
  60                 log("    -noflatten\n");
  61                 log("        do not flatten design before synthesis\n");
  62                 log("\n");
  63                 log("    -noiobs\n");
  64                 log("        run synthesis in \"block mode\", i.e. do not insert IO buffers\n");
  65                 log("\n");
  66                 log("    -clkbuf\n");
  67                 log("        insert direct PAD->global_net buffers\n");
  68                 log("\n");
  69                 log("    -retime\n");
  70                 log("        run 'abc' with '-dff -D 1' options\n");
  71                 log("\n");
  72                 log("\n");
  73                 log("The following commands are executed by this synthesis command:\n");
  74                 help_script();
  75                 log("\n");
  76         }
  77
  78         string top_opt, edif_file, vlog_file, json_file;
  79         bool flatten, retime, iobs, clkbuf;
  80
  81         void clear_flags() YS_OVERRIDE
  82         {
  83                 top_opt = "-auto-top";
  84                 edif_file = "";
  85                 vlog_file = "";
  86                 json_file = "";
  87                 flatten = true;
  88                 retime = false;
  89                 iobs = true;
  90                 clkbuf = false;
  91         }
  92
  93         void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
  94         {
  95                 string run_from, run_to;
  96                 clear_flags();
  97
  98                 size_t argidx;
  99                 for (argidx = 1; argidx < args.size(); argidx++)
 100                 {
 101                         if (args[argidx] == "-top" && argidx+1 < args.size()) {
 102                                 top_opt = "-top " + args[++argidx];
 103                                 continue;
 104                         }
 105                         if (args[argidx] == "-edif" && argidx+1 < args.size()) {
 106                                 edif_file = args[++argidx];
 107                                 continue;
 108                         }
 109                         if (args[argidx] == "-vlog" && argidx+1 < args.size()) {
 110                                 vlog_file = args[++argidx];
 111                                 continue;
 112                         }
 113                         if (args[argidx] == "-json" && argidx+1 < args.size()) {
 114                                 json_file = args[++argidx];
 115                                 continue;
 116                         }
 117                         if (args[argidx] == "-run" && argidx+1 < args.size()) {
 118                                 size_t pos = args[argidx+1].find(':');
 119                                 if (pos == std::string::npos)
 120                                         break;
 121                                 run_from = args[++argidx].substr(0, pos);
 122                                 run_to = args[argidx].substr(pos+1);
 123                                 continue;
 124                         }
 125                         if (args[argidx] == "-noflatten") {
 126                                 flatten = false;
 127                                 continue;
 128                         }
 129                         if (args[argidx] == "-retime") {
 130                                 retime = true;
 131                                 continue;
 132                         }
 133                         if (args[argidx] == "-noiobs") {
 134                                 iobs = false;
 135                                 continue;
 136                         }
 137                         if (args[argidx] == "-clkbuf") {
 138                                 clkbuf = true;
 139                                 continue;
 140                         }
 141                         break;
 142                 }
 143                 extra_args(args, argidx, design);
 144
 145                 if (!design->full_selection())
 146                         log_cmd_error("This command only operates on fully selected designs!\n");
 147
 148                 log_header(design, "Executing SYNTH_SF2 pass.\n");
 149                 log_push();
 150
 151                 run_script(design, run_from, run_to);
 152
 153                 log_pop();
 154         }
 155
 156         void script() YS_OVERRIDE
 157         {
 158                 if (check_label("begin"))
 159                 {
 160                         run("read_verilog -lib +/sf2/cells_sim.v");
 161                         run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
 162                 }
 163
 164                 if (flatten && check_label("flatten", "(unless -noflatten)"))
 165                 {
 166                         run("proc");
 167                         run("flatten");
 168                         run("tribuf -logic");
 169                         run("deminout");
 170                 }
 171
 172                 if (check_label("coarse"))
 173                 {
 174                         run("synth -run coarse");
 175                 }
 176
 177                 if (check_label("fine"))
 178                 {
 179                         run("opt -fast -mux_undef -undriven -fine");
 180                         run("memory_map");
 181                         run("opt -undriven -fine");
 182                         run("techmap -map +/techmap.v -map +/sf2/arith_map.v");
 183                         run("opt -fast");
 184                         if (retime || help_mode)
 185                                 run("abc -dff -D 1", "(only if -retime)");
 186                 }
 187
 188                 if (check_label("map_ffs"))
 189                 {
 190                         run("techmap -D NO_LUT -map +/sf2/cells_map.v");
 191                         run("opt_expr -mux_undef");
 192                         run("simplemap");
 193                         // run("sf2_ffinit");
 194                         // run("sf2_ffssr");
 195                         // run("sf2_opt -full");
 196                 }
 197
 198                 if (check_label("map_luts"))
 199                 {
 200                         run("abc -lut 4");
 201                         run("clean");
 202                 }
 203
 204                 if (check_label("map_cells"))
 205                 {
 206                         run("techmap -map +/sf2/cells_map.v");
 207                         run("clean");
 208                 }
 209
 210                 if (check_label("map_iobs"))
 211                 {
 212                         if (help_mode)
 213                                 run("sf2_iobs [-clkbuf]", "(unless -noiobs)");
 214                         else if (iobs)
 215                                 run(clkbuf ? "sf2_iobs -clkbuf" : "sf2_iobs");
 216                         run("clean");
 217                 }
 218
 219                 if (check_label("check"))
 220                 {
 221                         run("hierarchy -check");
 222                         run("stat");
 223                         run("check -noinit");
 224                 }
 225
 226                 if (check_label("edif"))
 227                 {
 228                         if (!edif_file.empty() || help_mode)
 229                                 run(stringf("write_edif -gndvccy %s", help_mode ? "<file-name>" : edif_file.c_str()));
 230                 }
 231
 232                 if (check_label("vlog"))
 233                 {
 234                         if (!vlog_file.empty() || help_mode)
 235                                 run(stringf("write_verilog %s", help_mode ? "<file-name>" : vlog_file.c_str()));
 236                 }
 237
 238                 if (check_label("json"))
 239                 {
 240                         if (!json_file.empty() || help_mode)
 241                                 run(stringf("write_json %s", help_mode ? "<file-name>" : json_file.c_str()));
 242                 }
 243         }
 244 } SynthSf2Pass;
 245
 246 PRIVATE_NAMESPACE_END