Try new LUT delays
[yosys.git] / techlibs / xilinx / abc.lut
1 # Max delays from https://github.com/SymbiFlow/prjxray-db/blob/34ea6eb08a63d21ec16264ad37a0a7b142ff6031/artix7/timings/CLBLL_L.sdf
2
3 # K area delay
4 1 1 248
5 2 2 248 372
6 3 3 248 372 496
7 4 3 248 372 496 620
8 5 3 248 372 496 620 744
9 6 5 124 248 372 496 620 744
10 # F7BMUX
11 7 10 296 420 544 668 792 916 1040
12 # F8MUX
13 # F8MUX+F7BMUX
14 8 20 273 569 693 817 941 1065 1189 1313