b5817a6e0aa188698c0a12ae02a43ce4c15a417c
[yosys.git] / techlibs / xilinx / abc_xc7.box
1 # Max delays from https://github.com/SymbiFlow/prjxray-db/blob/34ea6eb08a63d21ec16264ad37a0a7b142ff6031/artix7/timings/CLBLL_L.sdf
2
3 # NB: Inputs/Outputs must be ordered alphabetically
4 # (with exceptions for carry in/out)
5
6 # F7BMUX slower than F7AMUX
7 # Inputs: I0 I1 S0
8 # Outputs: O
9 F7BMUX 1 1 3 1
10 217 223 296
11
12 # Inputs: I0 I1 S0
13 # Outputs: O
14 MUXF8 2 1 3 1
15 104 94 273
16
17 # CARRY4 + CARRY4_[ABCD]X
18 # Inputs: CYINIT DI0 DI1 DI2 DI3 S0 S1 S2 S3 CI
19 # Outputs: O0 O1 O2 O3 CO0 CO1 CO2 CO3
20 # (NB: carry chain input/output must be last
21 # input/output and have been moved there
22 # overriding the alphabetical ordering)
23 CARRY4 3 1 10 8
24 482 - - - - 223 - - - 222
25 598 407 - - - 400 205 - - 334
26 584 556 537 - - 523 558 226 - 239
27 642 615 596 438 - 582 618 330 227 313
28 536 379 - - - 340 - - - 271
29 494 465 445 - - 433 469 - - 157
30 592 540 520 356 - 512 548 292 - 228
31 580 526 507 398 385 508 528 378 380 114