Merge branch 'xaig' into xc7mux
[yosys.git] / techlibs / xilinx / cells.box
1 # Max delays from https://pastebin.com/v2hrcksd
2 # from https://github.com/SymbiFlow/prjxray/pull/706#issuecomment-479380321
3
4 # F7BMUX slower than F7AMUX
5 # Inputs: 0 1 S0
6 # Outputs: OUT
7 F7BMUX 1 1 3 1
8 217 223 296
9
10 # Inputs: 0 1 S0
11 # Outputs: OUT
12 MUXF8 2 1 3 1
13 104 94 273