projects
/
yosys.git
/ blob
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
history
|
raw
|
HEAD
Add (* abc_flop_q *) to brams_bb.v
[yosys.git]
/
techlibs
/
xilinx
/
drams.txt
1
2
bram $__XILINX_RAM64X1D
3
init 1
4
abits 6
5
dbits 1
6
groups 2
7
ports 1 1
8
wrmode 0 1
9
enable 0 1
10
transp 0 0
11
clocks 0 1
12
clkpol 0 2
13
endbram
14
15
bram $__XILINX_RAM128X1D
16
init 1
17
abits 7
18
dbits 1
19
groups 2
20
ports 1 1
21
wrmode 0 1
22
enable 0 1
23
transp 0 0
24
clocks 0 1
25
clkpol 0 2
26
endbram
27
28
match $__XILINX_RAM64X1D
29
min bits 5
30
min wports 1
31
make_outreg
32
or_next_if_better
33
endmatch
34
35
match $__XILINX_RAM128X1D
36
min bits 9
37
min wports 1
38
make_outreg
39
endmatch
40